[llvm] [ValueTracking] Improve `Bitcast` handling to match SDAG (PR #125935)

[Abhishek Kaushik via llvm-commits]

abhishek-kaushik22 wrote:

@RKSimon Can you please help me with some more tests? I only have this one from I got from the C code you provided in the issue (compiled with O0).

```llvm
define dso_local noundef <2 x i64> @shift64(<2 x i64> noundef %v, <2 x i64> noundef %s) {
entry:
  %__q1.addr.i = alloca i64, align 8
  %__q0.addr.i = alloca i64, align 8
  %.compoundliteral.i = alloca <2 x i64>, align 16
  %__a.addr.i13 = alloca <2 x i64>, align 16
  %__a.addr.i12 = alloca <2 x i64>, align 16
  %__a.addr.i11 = alloca <2 x double>, align 16
  %__a.addr.i9 = alloca <2 x i64>, align 16
  %__count.addr.i10 = alloca <2 x i64>, align 16
  %__a.addr.i8 = alloca <2 x i64>, align 16
  %__count.addr.i = alloca <2 x i64>, align 16
  %__q.addr.i = alloca i64, align 8
  %__a.addr.i = alloca <2 x i64>, align 16
  %__b.addr.i = alloca <2 x i64>, align 16
  %v.addr = alloca <2 x i64>, align 16
  %s.addr = alloca <2 x i64>, align 16
  %x_ = alloca <2 x i64>, align 16
  %_y = alloca <2 x i64>, align 16
  %xy = alloca <2 x i64>, align 16
  store <2 x i64> %v, ptr %v.addr, align 16
  store <2 x i64> %s, ptr %s.addr, align 16
  %0 = load <2 x i64>, ptr %s.addr, align 16
  store i64 63, ptr %__q.addr.i, align 8
  %1 = load i64, ptr %__q.addr.i, align 8
  %2 = load i64, ptr %__q.addr.i, align 8
  store i64 %1, ptr %__q1.addr.i, align 8
  store i64 %2, ptr %__q0.addr.i, align 8
  %3 = load i64, ptr %__q0.addr.i, align 8
  %vecinit.i = insertelement <2 x i64> poison, i64 %3, i32 0
  %4 = load i64, ptr %__q1.addr.i, align 8
  %vecinit1.i = insertelement <2 x i64> %vecinit.i, i64 %4, i32 1
  store <2 x i64> %vecinit1.i, ptr %.compoundliteral.i, align 16
  %5 = load <2 x i64>, ptr %.compoundliteral.i, align 16
  store <2 x i64> %0, ptr %__a.addr.i, align 16
  store <2 x i64> %5, ptr %__b.addr.i, align 16
  %6 = load <2 x i64>, ptr %__a.addr.i, align 16
  %7 = load <2 x i64>, ptr %__b.addr.i, align 16
  %and.i = and <2 x i64> %6, %7
  store <2 x i64> %and.i, ptr %s.addr, align 16
  %8 = load <2 x i64>, ptr %v.addr, align 16
  %9 = load <2 x i64>, ptr %s.addr, align 16
  store <2 x i64> %8, ptr %__a.addr.i9, align 16
  store <2 x i64> %9, ptr %__count.addr.i10, align 16
  %10 = load <2 x i64>, ptr %__a.addr.i9, align 16
  %11 = load <2 x i64>, ptr %__count.addr.i10, align 16
  %12 = call noundef <2 x i64> @llvm.x86.sse2.psll.q(<2 x i64> %10, <2 x i64> %11)
  store <2 x i64> %12, ptr %x_, align 16
  %13 = load <2 x i64>, ptr %v.addr, align 16
  %14 = load <2 x i64>, ptr %s.addr, align 16
  %cast = bitcast <2 x i64> %14 to <16 x i8>
  %psrldq = shufflevector <16 x i8> %cast, <16 x i8> zeroinitializer, <16 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23>
  %cast3 = bitcast <16 x i8> %psrldq to <2 x i64>
  store <2 x i64> %13, ptr %__a.addr.i8, align 16
  store <2 x i64> %cast3, ptr %__count.addr.i, align 16
  %15 = load <2 x i64>, ptr %__a.addr.i8, align 16
  %16 = load <2 x i64>, ptr %__count.addr.i, align 16
  %17 = call noundef <2 x i64> @llvm.x86.sse2.psll.q(<2 x i64> %15, <2 x i64> %16)
  store <2 x i64> %17, ptr %_y, align 16
  %18 = load <2 x i64>, ptr %x_, align 16
  store <2 x i64> %18, ptr %__a.addr.i13, align 16
  %19 = load <2 x i64>, ptr %__a.addr.i13, align 16
  %20 = bitcast <2 x i64> %19 to <2 x double>
  %21 = load <2 x i64>, ptr %_y, align 16
  store <2 x i64> %21, ptr %__a.addr.i12, align 16
  %22 = load <2 x i64>, ptr %__a.addr.i12, align 16
  %23 = bitcast <2 x i64> %22 to <2 x double>
  %shufp = shufflevector <2 x double> %20, <2 x double> %23, <2 x i32> <i32 0, i32 3>
  store <2 x double> %shufp, ptr %__a.addr.i11, align 16
  %24 = load <2 x double>, ptr %__a.addr.i11, align 16
  %25 = bitcast <2 x double> %24 to <2 x i64>
  store <2 x i64> %25, ptr %xy, align 16
  %26 = load <2 x i64>, ptr %xy, align 16
  ret <2 x i64> %26
}

declare <2 x i64> @llvm.x86.sse2.psll.q(<2 x i64>, <2 x i64>) #1

```

https://github.com/llvm/llvm-project/pull/125935