[llvm] [DAG][X86]added shrd in combineor for bzhiq+shlq+or (PR #125734)

[Simon Pilgrim via llvm-commits]

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@@ -51887,6 +51887,20 @@ static SDValue combineOr(SDNode *N, SelectionDAG &DAG,
     }
   }
 
+  using namespace llvm::SDPatternMatch;
+  APInt MaskConst,ShlConst;
+  SDValue A, B;
+  if(sd_match(N,m_Or(m_Shl(m_Value(B),m_ConstInt(ShlConst)),m_And(m_Value(A),m_ConstInt(MaskConst))))){
+    uint64_t shiftValue = ShlConst.getZExtValue();
+    if(MaskConst.isMask(shiftValue)){
+      unsigned numbits = B.getScalarValueSizeInBits();
+      unsigned newshift=numbits-shiftValue;
+      SDValue newSHL = DAG.getNode(ISD::SHL,dl,VT,A,DAG.getConstant(newshift, dl, MVT::i8));
+      SDValue R = DAG.getNode(ISD::FSHR,dl,VT,B,newSHL,DAG.getConstant(newshift, dl, MVT::i8));
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RKSimon wrote:

Replace both getConstant with getShiftAmountConstant (and MVT::i8 with VT) - will make it easier to generalize in the future.

https://github.com/llvm/llvm-project/pull/125734