[llvm] SCEV: teach isImpliedViaOperations about samesign (PR #124270)

[Ramkumar Ramachandra via llvm-commits]

artagnon wrote:

Okay, I've finished my investigation, and I believe that the regression is orthogonal to samesign support, and purely due to the LFTR logic in IndVarSimplify in attempting to optimize loop exits.

  %8 = icmp slt i64 %indvars.iv.next, %indvars.iv.next7

was changed to:

  %exitcond.not = icmp eq i64 %indvars.iv.next, %indvars.iv8

In the first case, SCEVExpander::isHighCostExpansion returned true, and the LFTR logic was disabled. In the second case, as we have a better exit-count, isHighCostExpansion returned false, and the LFTR logic kicked in, changing the exit and adding extra instructions to compensate.

I'm not sure what we can do about this, because isHighCostExpansion is quite ad-hoc about costing, so I would say that we have to live with this regression unless there is a fundamental change in how the LFTR works. As a consolation, I improved IndVarSimplify in https://github.com/llvm/llvm-project/pull/125764 and https://github.com/llvm/llvm-project/pull/125828.

I think this patch is good to go as-is, although I will rebase it before landing.

https://github.com/llvm/llvm-project/pull/124270