[llvm] [SelectionDAG] Add PARTIAL_REDUCE_U/SMLA ISD Nodes (PR #125207)

[Sander de Smalen via llvm-commits]

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@@ -5634,6 +5634,11 @@ class TargetLowering : public TargetLoweringBase {
                                        LoadSDNode *OriginalLoad,
                                        SelectionDAG &DAG) const;
 
+  // Expands PARTIAL_REDUCE_S/UMLA nodes to a series of simpler operations,
+  // consisting of zext/sext, extract_subvector, mul and add operations.
+  SDValue expandPartialReduceMLA(SDLoc DL, SDValue Acc, SDValue Input1,
+                                 SDValue Input2, SelectionDAG &DAG) const;
+
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sdesmalen-arm wrote:

nit: this is in the section "Instruction Emitting Hooks", could you move it to the "Legalization utility functions" section instead?

https://github.com/llvm/llvm-project/pull/125207