[llvm] SimplifyIndVar: teach widenLoopCompare about samesign (PR #125764)

Ramkumar Ramachandra via llvm-commits llvm-commits at lists.llvm.org
Wed Feb 5 00:05:24 PST 2025


artagnon wrote:

> I think something the tests don't cover is that the RHS is sign extended rather than zero extended. (They use constant 1 where it makes no difference.)

I didn't want to change the gold tests, so I've added some additional tests. Let me know if this is fine.

https://github.com/llvm/llvm-project/pull/125764


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