[llvm] [IR][RISCV] Add llvm.vector.(de)interleave3/5/7 (PR #124825)

Pengcheng Wang via llvm-commits llvm-commits at lists.llvm.org
Tue Feb 4 21:54:06 PST 2025


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@@ -300,6 +300,8 @@ def IIT_V1 : IIT_Vec<1, 28>;
 def IIT_VARARG : IIT_VT<isVoid, 29>;
 def IIT_HALF_VEC_ARG : IIT_Base<30>;
 def IIT_SAME_VEC_WIDTH_ARG : IIT_Base<31>;
+def IIT_ONE_THIRD_VEC_ARG : IIT_Base<32>;
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wangpc-pp wrote:

Why don't we make them consecutive?
(I don't know why we have a bubble between 31 and 34...)

https://github.com/llvm/llvm-project/pull/124825


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