[clang] [llvm] [HLSL] [DXIL] Implement the `AddUint64` HLSL function and the `UAddc` DXIL op (PR #125319)

[Deric Cheung via llvm-commits]

================
@@ -2023,6 +2024,18 @@ static bool CheckAllArgsHaveFloatRepresentation(Sema *S, CallExpr *TheCall) {
                                     checkAllFloatTypes);
 }
 
+static bool CheckUnsignedIntegerRepresentation(Sema *S, CallExpr *TheCall) {
+  auto checkUnsignedInteger = [](clang::QualType PassedType) -> bool {
+    clang::QualType BaseType =
+        PassedType->isVectorType()
+            ? PassedType->getAs<clang::VectorType>()->getElementType()
+            : PassedType;
+    return !BaseType->isUnsignedIntegerType();
----------------
Icohedron wrote:

According to what I see in the original issue and in the DXC implementation, only unsigned integers are allowed (specifically, `uint2` and `uint4`). 
`clang/test/SemaHLSL/BuiltIns/AddUIint64-errors.hlsl` has a test with `int2` passed as arguments that is expected to fail.

As for checking if the integer is 32-bits, that is a good idea. The following test is currently valid and does not emit an error.
```c++
uint2 test_16_bit_integer_type(uint16_t2 a, uint16_t2 b) {
  return __builtin_hlsl_adduint64(a, b);
}
```
I am having trouble trying to implement a check on the integer bit count however. 
I do not know how to get access to `llvm::IntegerType::getIntegerBitWidth()` from a `clang::QualType`.




https://github.com/llvm/llvm-project/pull/125319