[clang] [llvm] [clangd] Add support for the c2000 architecture (PR #125663)
James Nagurne via llvm-commits
llvm-commits at lists.llvm.org
Tue Feb 4 14:50:29 PST 2025
================
@@ -0,0 +1,356 @@
+#include "C2000.h"
+#include "Targets.h"
+#include "clang/Basic/Builtins.h"
+#include "clang/Basic/Diagnostic.h"
+#include "clang/Basic/MacroBuilder.h"
+#include "clang/Basic/TargetBuiltins.h"
+
+using namespace clang;
+using namespace clang::targets;
+
+const char *const C2000TargetInfo::GCCRegNames[] = {
+ "ACC", "XAR0", "XAR1", "XAR2", "XAR3", "XAR4", "XAR5", "XAR6", "XAR7"};
+
+ArrayRef<const char *> C2000TargetInfo::getGCCRegNames() const {
+ return llvm::ArrayRef(GCCRegNames);
+}
+
+bool C2000TargetInfo::handleTargetFeatures(std::vector<std::string> &Features,
+ DiagnosticsEngine &Diags) {
+
+ for (const auto &Feature : Features) {
+ if (Feature == "+eabi") {
+ eabi = true;
+ continue;
+ }
+ if (Feature == "+strict_ansi") {
+ strict = true;
+ continue;
+ }
+ if (Feature == "+cla_support") {
+ cla_support = true;
+ }
+ if (Feature == "+cla0") {
+ cla0 = true;
+ continue;
+ }
+ if (Feature == "+cla1") {
+ cla1 = true;
+ continue;
+ }
+ if (Feature == "+cla2") {
+ cla2 = true;
+ continue;
+ }
+ if (Feature == "+relaxed") {
+ relaxed = true;
+ continue;
+ }
+ if (Feature == "+fpu64") {
+ fpu64 = true;
+ continue;
+ }
+ if (Feature == "+fpu32") {
+ fpu32 = true;
+ continue;
+ }
+ if (Feature == "+tmu_support") {
+ tmu_support = true;
+ }
+ if (Feature == "+tmu1") {
+ tmu1 = true;
+ continue;
+ }
+ if (Feature == "+idiv0") {
+ idiv0 = true;
+ continue;
+ }
+ if (Feature == "+vcu_support") {
+ vcu_support = true;
+ }
+ if (Feature == "+vcu2") {
+ vcu2 = true;
+ continue;
+ }
+ if (Feature == "+vcrc") {
+ vcrc = true;
+ continue;
+ }
+ if (Feature == "+opt_level") {
+ opt = true;
+ continue;
+ }
+ }
+ return true;
+}
+
+bool C2000TargetInfo::hasFeature(StringRef Feature) const {
+ return llvm::StringSwitch<bool>(Feature)
+ .Case("eabi", eabi)
+ .Case("strict_ansi", strict)
+ .Case("cla-support", cla_support)
+ .Case("cla0", cla0)
+ .Case("cla1", cla1)
+ .Case("cla2", cla2)
+ .Case("relaxed", relaxed)
+ .Case("fpu64", fpu64)
+ .Case("fpu32", fpu32)
+ .Case("tmu-support", tmu_support)
+ .Case("tmu1", tmu1)
+ .Case("vcu-support", vcu_support)
+ .Case("vcu2", vcu2)
+ .Case("vcrc", vcrc)
+ .Case("opt-level", opt)
+ .Default(false);
+}
+
+void C2000TargetInfo::getTargetDefines(const LangOptions &Opts,
+ MacroBuilder &Builder) const {
+ Builder.undefineMacro("__CHAR_BIT__"); // FIXME: Implement 16-bit char
+ Builder.defineMacro("__CHAR_BIT__", "16");
+ Builder.defineMacro("__TMS320C2000__");
+ Builder.defineMacro("_TMS320C2000");
+ Builder.defineMacro("__TMS320C28XX__");
+ Builder.defineMacro("_TMS320C28XX");
+ Builder.defineMacro("__TMS320C28X__");
+ Builder.defineMacro("_TMS320C28X");
+ Builder.defineMacro("__TI_STRICT_FP_MODE__");
+ Builder.defineMacro("__COMPILER_VERSION__");
+ Builder.defineMacro("__TI_COMPILER_VERSION__");
+ Builder.defineMacro("__TI_COMPILER_VERSION__QUAL_ID");
+ Builder.defineMacro("__TI_COMPILER_VERSION__QUAL__", "QUAL_LETTER");
+ Builder.defineMacro("__little_endian__");
+ Builder.defineMacro("__PTRDIFF_T_TYPE__", "signed long");
+ Builder.defineMacro("__SIZE_T_TYPE__", "unsigned long");
+ Builder.defineMacro("__WCHAR_T_TYPE__", "long unsigned");
+ Builder.defineMacro("__TI_WCHAR_T_BITS", "16");
+ Builder.defineMacro("__TI_C99_COMPLEX_ENABLED");
+ Builder.defineMacro("__TI_GNU_ATTRIBUTE_SUPPORT__");
+ Builder.defineMacro("__LARGE_MODEL__");
+ Builder.defineMacro("__signed_chars__");
+ Builder.defineMacro("__OPTIMIZE_FOR_SPACE");
+
+ if (hasFeature("eabi"))
+ Builder.defineMacro("__TI_EABI__");
+ if (hasFeature("strict_ansi"))
+ Builder.defineMacro("__TI_STRICT_ANSI_MODE__");
+ if (hasFeature("cla-support"))
+ Builder.defineMacro("__TMS320C28XX_CLA__");
+
+ if (hasFeature("cla0"))
+ Builder.defineMacro("__TMS320C28XX_CLA0__");
+ else if (hasFeature("cla1"))
+ Builder.defineMacro("__TMS320C28XX_CLA1__");
+ else if (hasFeature("cla2"))
+ Builder.defineMacro("__TMS320C28XX_CLA2__");
+
+ if (hasFeature("fpu64")) {
+ Builder.defineMacro("__TMS320C28XX_FPU64__");
+ Builder.defineMacro("__TMS320C28XX_FPU32__");
+ } else if (hasFeature("fpu32"))
+ Builder.defineMacro("__TMS320C28XX_FPU32__");
+ if (hasFeature("idiv0"))
+ Builder.defineMacro("__TMS320C28XX_IDIV__");
+ if (hasFeature("tmu1"))
+ Builder.defineMacro("__TMS320C28XX_TMU1__");
+ if (hasFeature("tmu-support")) {
+ Builder.defineMacro("__TMS320C28XX_TMU0__");
+ Builder.defineMacro("__TMS320C28XX_TMU__");
+ }
+ if (hasFeature("vcu-support"))
+ Builder.defineMacro("__TMS320C28XX_VCU0__");
+ if (hasFeature("vcu2"))
+ Builder.defineMacro("__TMS320C28XX_VCU2__");
+ else if (hasFeature("vcrc"))
+ Builder.defineMacro("__TMS320C28XX_VCRC__");
+ if (hasFeature("opt-level"))
+ Builder.defineMacro("_INLINE");
+ if (hasFeature("relaxed"))
+ Builder.undefineMacro("__TI_STRICT_FP_MODE__");
+
+ Builder.defineMacro("__cregister", "");
----------------
DragonDisciple wrote:
This preprocesses away type qualifiers that are only available in the TI compiler's implementation
https://github.com/llvm/llvm-project/pull/125663
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