[llvm] [MIPS]Remove unnecessary SLL instructions on MIPS64el (PR #109386)
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Sun Jan 26 11:01:43 PST 2025
================
@@ -1210,6 +1211,41 @@ static SDValue performSHLCombine(SDNode *N, SelectionDAG &DAG,
DAG.getConstant(SMSize, DL, MVT::i32));
}
+static SDValue performSignExtendCombine(SDNode *N, SelectionDAG &DAG, TargetLowering::DAGCombinerInfo &DCI,const MipsSubtarget &Subtarget) {
+ if (DCI.Level != AfterLegalizeDAG) {
+ return SDValue();
+ }
+
+ if (!Subtarget.isGP64bit()) {
+ return SDValue();
+ }
+
+ SDValue N0 = N->getOperand(0);
+ EVT VT = N->getValueType(0);
+
+ if (N0->getNumOperands() != 2) {
+ return SDValue();
+ }
+
+ // Pattern match XOR.
+ // $dst = (sign_extend (xor (trunc $src, i32), -1), i64)
+ // => $dst = (xor ($src, -1), i64)
+ if (N0.getOpcode() == ISD::XOR &&
+ N0.getOperand(0).getOpcode() == ISD::TRUNCATE &&
+ N0.getOperand(1).getOpcode() == ISD::Constant) {
+ SDValue TruncateOperand = N0.getOperand(0).getOperand(0);
+ if (VT == MVT::i64 && VT == TruncateOperand->getValueType(0)) {
+ APInt MinusOne(32, -1, true);
+ if (N0.getConstantOperandAPInt(1) == MinusOne) {
+ return DAG.getNode(ISD::XOR, SDLoc(N0), VT, TruncateOperand,
+ DAG.getTargetConstant(-1, SDLoc(N0), VT));
----------------
topperc wrote:
This should not be a target constant. TargetConstant should only nodes that always take an immediate for that operand.
https://github.com/llvm/llvm-project/pull/109386
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