[llvm] [Intrinsics][AArch64] Add intrinsic to mask off aliasing vector lanes (PR #117007)

[David Green via llvm-commits]

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@@ -2076,6 +2087,9 @@ bool DAGTypeLegalizer::PromoteIntegerOperand(SDNode *N, unsigned OpNo) {
   case ISD::VECTOR_FIND_LAST_ACTIVE:
     Res = PromoteIntOp_VECTOR_FIND_LAST_ACTIVE(N, OpNo);
     break;
+  case ISD::EXPERIMENTAL_ALIAS_LANE_MASK:
+    Res = DAGTypeLegalizer::PromoteIntOp_EXPERIMENTAL_ALIAS_LANE_MASK(N, OpNo);
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davemgreen wrote:

Remove `DAGTypeLegalizer::`

https://github.com/llvm/llvm-project/pull/117007