[llvm] d910fbc - [RISCV][NFC] cR Constraint Release Note

[Sam Elliott via llvm-commits]

Author: Sam Elliott
Date: 2025-01-24T14:46:01-08:00
New Revision: d910fbcbd10c5e72d0771dd9607e7133ae51dc70

URL: https://github.com/llvm/llvm-project/commit/d910fbcbd10c5e72d0771dd9607e7133ae51dc70
DIFF: https://github.com/llvm/llvm-project/commit/d910fbcbd10c5e72d0771dd9607e7133ae51dc70.diff

LOG: [RISCV][NFC] cR Constraint Release Note

Added: 
    

Modified: 
    llvm/docs/ReleaseNotes.md

Removed: 
    


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diff  --git a/llvm/docs/ReleaseNotes.md b/llvm/docs/ReleaseNotes.md
index 05d902641d0933..0872f20bea590e 100644
--- a/llvm/docs/ReleaseNotes.md
+++ b/llvm/docs/ReleaseNotes.md
@@ -272,6 +272,9 @@ Changes to the RISC-V Backend
   * `cf` constraint meaning an RVC-encoding compatible FPR (`f8`-`f15`)
   * `R` constraint meaning an even-odd GPR pair (prints as the even register,
     but both registers in the pair are considered live).
+  * `cR` constraint meaning an RVC-encoding compatible even-odd GPR Pair (prints
+    as an even register between `x8` and `x14`, but both registers in the pair
+    are considered live).
   * `N` modifer meaning print the register encoding (0-31) rather than the name.
 * `f` and `cf` inline assembly constraints, when using F-/D-/H-in-X extensions,
   will use the relevant GPR rather than FPR. This makes inline assembly portable