[llvm] [LV][EVL] Generate negative strided load/store for reversed load/store (PR #123608)

[Shih-Po Hung via llvm-commits]

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@@ -1776,6 +1776,10 @@ class TargetTransformInfo {
   /// otherwise scalar epilogue loop.
   bool preferEpilogueVectorization() const;
 
+  /// Return true if the loop vectorizer prefer strided load/store when
+  /// vectorizing reversed load/store.
+  bool preferStridedLoadStore() const;
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arcbbb wrote:

https://github.com/llvm/llvm-project/blob/main/llvm/lib/Target/RISCV/RISCVSchedSiFive7.td
As the scheduler in x280, unit-stride loads operate at DLEN per cycle, while strided loads operate at one element per cycle.
but I'm not sure whether negative stride loads here are classified as unit-stride loads in u-arch.

https://github.com/llvm/llvm-project/pull/123608