[llvm] [TableGen] Add a DenseSet to track WriteRes that are referenced by some ReadAdvance. NFC (PR #124160)
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Thu Jan 23 09:39:05 PST 2025
https://github.com/topperc created https://github.com/llvm/llvm-project/pull/124160
Use this to remove a linear scan from CodeGenProcModel::hasReadOfWrite.
This reduces build time of RISCVGenSubtargetInfo.inc on by machine from ~6 seconds to ~3 seconds.
>From f3cf5ca8b9708ee35c6f762ab7de74ba94ba3c9e Mon Sep 17 00:00:00 2001
From: Craig Topper <craig.topper at sifive.com>
Date: Thu, 23 Jan 2025 09:22:53 -0800
Subject: [PATCH] [TableGen] Add a DenseSet to track WriteRes that are
referenced by some ReadAdvance. NFC
Use this to remove a linear scan from CodeGenProcModel::hasReadOfWrite.
This reduces build time of RISCVGenSubtargetInfo.inc on by machine
from ~6 seconds to ~3 seconds.
---
llvm/utils/TableGen/Common/CodeGenSchedule.cpp | 11 ++++-------
llvm/utils/TableGen/Common/CodeGenSchedule.h | 3 +++
2 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/llvm/utils/TableGen/Common/CodeGenSchedule.cpp b/llvm/utils/TableGen/Common/CodeGenSchedule.cpp
index 8919a278f352bf..631b24ce2ad129 100644
--- a/llvm/utils/TableGen/Common/CodeGenSchedule.cpp
+++ b/llvm/utils/TableGen/Common/CodeGenSchedule.cpp
@@ -2129,13 +2129,15 @@ void CodeGenSchedModels::addWriteRes(const Record *ProcWriteResDef,
void CodeGenSchedModels::addReadAdvance(const Record *ProcReadAdvanceDef,
CodeGenProcModel &PM) {
for (const Record *ValidWrite :
- ProcReadAdvanceDef->getValueAsListOfDefs("ValidWrites"))
+ ProcReadAdvanceDef->getValueAsListOfDefs("ValidWrites")) {
if (getSchedRWIdx(ValidWrite, /*IsRead=*/false) == 0)
PrintFatalError(
ProcReadAdvanceDef->getLoc(),
"ReadAdvance referencing a ValidWrite that is not used by "
"any instruction (" +
ValidWrite->getName() + ")");
+ PM.ReadOfWriteSet.insert(ValidWrite);
+ }
ConstRecVec &RADefs = PM.ReadAdvanceDefs;
if (is_contained(RADefs, ProcReadAdvanceDef))
@@ -2173,12 +2175,7 @@ bool CodeGenProcModel::isUnsupported(const CodeGenInstruction &Inst) const {
}
bool CodeGenProcModel::hasReadOfWrite(const Record *WriteDef) const {
- for (auto &RADef : ReadAdvanceDefs) {
- ConstRecVec ValidWrites = RADef->getValueAsListOfDefs("ValidWrites");
- if (is_contained(ValidWrites, WriteDef))
- return true;
- }
- return false;
+ return ReadOfWriteSet.count(WriteDef) != 0;
}
#ifndef NDEBUG
diff --git a/llvm/utils/TableGen/Common/CodeGenSchedule.h b/llvm/utils/TableGen/Common/CodeGenSchedule.h
index 5d5aa44d882e59..67979e7cbfe758 100644
--- a/llvm/utils/TableGen/Common/CodeGenSchedule.h
+++ b/llvm/utils/TableGen/Common/CodeGenSchedule.h
@@ -250,6 +250,9 @@ struct CodeGenProcModel {
// Map from the ReadType field to the parent ReadAdvance record.
DenseMap<const Record *, const Record *> ReadAdvanceMap;
+ // Set of WriteRes that are referenced by a ReadAdvance.
+ DenseSet<const Record *> ReadOfWriteSet;
+
// Per-operand machine model resources associated with this processor.
ConstRecVec ProcResourceDefs;
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