[clang] [llvm] [AArch64] Improve bcvtn2 and remove aarch64_neon_bfcvt intrinsics (PR #120363)

[Sjoerd Meijer via llvm-commits]

sjoerdmeijer wrote:

Hey @davemgreen, we are looking at a runtime failure in a test from the GCC test-suite: `./testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmash_lane_f16_1.c`

I think to reproduce this, this will work:

   clang vfmash_lane_f16_1.c -mcpu=neoverse-v2 -O0 -lm -o ./vfmash_lane_f16_1.exe

and

    $ ./vfmash_lane_f16_1.exe
     Aborted

Seems to be fine when compiled with -O1 and up.

There are some scary compiler warning messages, e.g.:

  ./arm-neon-ref.h:335:41: warning: value size does not match register size specified by the constraint and modifier [-Wasm-operand-widths]  

But haven't looked yet if this important, also haven't looked at the root cause yet.

https://github.com/llvm/llvm-project/pull/120363