[llvm] [NFC][DirectX] Clean-up of `DXIL.td` (PR #124005)
Finn Plummer via llvm-commits
llvm-commits at lists.llvm.org
Wed Jan 22 13:13:42 PST 2025
https://github.com/inbelic created https://github.com/llvm/llvm-project/pull/124005
- Runs clang-format on `DXIL.td`
Note: this does not include the suggested formatting changes to `defset list<DXILOpClasses> OpClasses` as it does not enforce the formatting that is primarily used elsewhere
- Reorders currently defined `DXIL` ops by opcode in ascending order to be consistent with other definitions
>From d716c53d4500504cc402518eb6cda3053a0139e7 Mon Sep 17 00:00:00 2001
From: Finn Plummer <canadienfinn at gmail.com>
Date: Wed, 22 Jan 2025 20:47:44 +0000
Subject: [PATCH 1/2] [NFC][DirectX] Run clang-format on DXIL.td
- this neglects to use the clang-formatting for the defset of OpClasses
as this hinders readability
---
llvm/lib/Target/DirectX/DXIL.td | 305 ++++++++++++++++----------------
1 file changed, 151 insertions(+), 154 deletions(-)
diff --git a/llvm/lib/Target/DirectX/DXIL.td b/llvm/lib/Target/DirectX/DXIL.td
index beb9b56dba30aa..5784cc3e90f07d 100644
--- a/llvm/lib/Target/DirectX/DXIL.td
+++ b/llvm/lib/Target/DirectX/DXIL.td
@@ -235,7 +235,7 @@ defset list<DXILOpClass> OpClasses = {
def writeSamplerFeedback : DXILOpClass;
def writeSamplerFeedbackBias : DXILOpClass;
def writeSamplerFeedbackGrad : DXILOpClass;
- def writeSamplerFeedbackLevel: DXILOpClass;
+ def writeSamplerFeedbackLevel : DXILOpClass;
// This is a sentinel definition. Hence placed at the end here and
// not as part of the above alphabetically sorted valid definitions.
@@ -307,34 +307,35 @@ class Attributes<Version ver = DXIL1_0, list<DXILAttribute> attrs> {
list<DXILAttribute> fn_attrs = attrs;
}
-defvar BarrierMode_DeviceMemoryBarrier = 2;
+defvar BarrierMode_DeviceMemoryBarrier = 2;
defvar BarrierMode_DeviceMemoryBarrierWithGroupSync = 3;
-defvar BarrierMode_GroupMemoryBarrier = 8;
-defvar BarrierMode_GroupMemoryBarrierWithGroupSync = 9;
-defvar BarrierMode_AllMemoryBarrier = 10;
-defvar BarrierMode_AllMemoryBarrierWithGroupSync = 11;
+defvar BarrierMode_GroupMemoryBarrier = 8;
+defvar BarrierMode_GroupMemoryBarrierWithGroupSync = 9;
+defvar BarrierMode_AllMemoryBarrier = 10;
+defvar BarrierMode_AllMemoryBarrierWithGroupSync = 11;
-defvar WaveOpKind_Sum = 0;
+defvar WaveOpKind_Sum = 0;
defvar WaveOpKind_Product = 1;
-defvar WaveOpKind_Min = 2;
-defvar WaveOpKind_Max = 3;
+defvar WaveOpKind_Min = 2;
+defvar WaveOpKind_Max = 3;
-defvar SignedOpKind_Signed = 0;
+defvar SignedOpKind_Signed = 0;
defvar SignedOpKind_Unsigned = 1;
// Intrinsic arg selection
class IntrinArgSelectType;
def IntrinArgSelect_Index : IntrinArgSelectType;
-def IntrinArgSelect_I8 : IntrinArgSelectType;
-def IntrinArgSelect_I32 : IntrinArgSelectType;
+def IntrinArgSelect_I8 : IntrinArgSelectType;
+def IntrinArgSelect_I32 : IntrinArgSelectType;
class IntrinArgSelect<IntrinArgSelectType type_, int value_> {
IntrinArgSelectType type = type_;
int value = value_;
-}
+};
+
class IntrinArgIndex<int index> : IntrinArgSelect<IntrinArgSelect_Index, index>;
-class IntrinArgI8 <int value> : IntrinArgSelect<IntrinArgSelect_I8, value>;
-class IntrinArgI32 <int value> : IntrinArgSelect<IntrinArgSelect_I32, value>;
+class IntrinArgI8<int value> : IntrinArgSelect<IntrinArgSelect_I8, value>;
+class IntrinArgI32<int value> : IntrinArgSelect<IntrinArgSelect_I32, value>;
// Select which intrinsic to lower from for a DXILOp.
// If the intrinsic is the only argument given to IntrinSelect, then the
@@ -364,7 +365,8 @@ class IntrinArgI32 <int value> : IntrinArgSelect<IntrinArgSelect_I32, value>;
// >,
// ]
//
-class IntrinSelect<Intrinsic intrinsic_, list<IntrinArgSelect> arg_selects_=[]> {
+class IntrinSelect<Intrinsic intrinsic_,
+ list<IntrinArgSelect> arg_selects_ = []> {
Intrinsic intrinsic = intrinsic_;
list<IntrinArgSelect> arg_selects = arg_selects_;
}
@@ -404,9 +406,9 @@ class DXILOp<int opcode, DXILOpClass opclass> {
// Concrete definitions of DXIL Operations
-def Abs : DXILOp<6, unary> {
+def Abs : DXILOp<6, unary> {
let Doc = "Returns the absolute value of the input.";
- let intrinsics = [ IntrinSelect<int_fabs> ];
+ let intrinsics = [IntrinSelect<int_fabs>];
let arguments = [OverloadTy];
let result = OverloadTy;
let overloads = [Overloads<DXIL1_0, [HalfTy, FloatTy, DoubleTy]>];
@@ -414,9 +416,10 @@ def Abs : DXILOp<6, unary> {
let attributes = [Attributes<DXIL1_0, [ReadNone]>];
}
-def Saturate : DXILOp<7, unary> {
- let Doc = "Clamps a single or double precision floating point value to [0.0f...1.0f].";
- let intrinsics = [ IntrinSelect<int_dx_saturate> ];
+def Saturate : DXILOp<7, unary> {
+ let Doc = "Clamps a single or double precision floating point value to "
+ "[0.0f...1.0f].";
+ let intrinsics = [IntrinSelect<int_dx_saturate>];
let arguments = [OverloadTy];
let result = OverloadTy;
let overloads = [Overloads<DXIL1_0, [HalfTy, FloatTy, DoubleTy]>];
@@ -424,9 +427,9 @@ def Saturate : DXILOp<7, unary> {
let attributes = [Attributes<DXIL1_0, [ReadNone]>];
}
-def IsInf : DXILOp<9, isSpecialFloat> {
+def IsInf : DXILOp<9, isSpecialFloat> {
let Doc = "Determines if the specified value is infinite.";
- let intrinsics = [ IntrinSelect<int_dx_isinf> ];
+ let intrinsics = [IntrinSelect<int_dx_isinf>];
let arguments = [OverloadTy];
let result = Int1Ty;
let overloads = [Overloads<DXIL1_0, [HalfTy, FloatTy]>];
@@ -434,9 +437,9 @@ def IsInf : DXILOp<9, isSpecialFloat> {
let attributes = [Attributes<DXIL1_0, [ReadNone]>];
}
-def Cos : DXILOp<12, unary> {
+def Cos : DXILOp<12, unary> {
let Doc = "Returns cosine(theta) for theta in radians.";
- let intrinsics = [ IntrinSelect<int_cos> ];
+ let intrinsics = [IntrinSelect<int_cos>];
let arguments = [OverloadTy];
let result = OverloadTy;
let overloads = [Overloads<DXIL1_0, [HalfTy, FloatTy]>];
@@ -444,9 +447,9 @@ def Cos : DXILOp<12, unary> {
let attributes = [Attributes<DXIL1_0, [ReadNone]>];
}
-def Sin : DXILOp<13, unary> {
+def Sin : DXILOp<13, unary> {
let Doc = "Returns sine(theta) for theta in radians.";
- let intrinsics = [ IntrinSelect<int_sin> ];
+ let intrinsics = [IntrinSelect<int_sin>];
let arguments = [OverloadTy];
let result = OverloadTy;
let overloads = [Overloads<DXIL1_0, [HalfTy, FloatTy]>];
@@ -454,9 +457,9 @@ def Sin : DXILOp<13, unary> {
let attributes = [Attributes<DXIL1_0, [ReadNone]>];
}
-def Tan : DXILOp<14, unary> {
+def Tan : DXILOp<14, unary> {
let Doc = "Returns tangent(theta) for theta in radians.";
- let intrinsics = [ IntrinSelect<int_tan> ];
+ let intrinsics = [IntrinSelect<int_tan>];
let arguments = [OverloadTy];
let result = OverloadTy;
let overloads = [Overloads<DXIL1_0, [HalfTy, FloatTy]>];
@@ -464,9 +467,9 @@ def Tan : DXILOp<14, unary> {
let attributes = [Attributes<DXIL1_0, [ReadNone]>];
}
-def ACos : DXILOp<15, unary> {
+def ACos : DXILOp<15, unary> {
let Doc = "Returns the arccosine of the specified value.";
- let intrinsics = [ IntrinSelect<int_acos> ];
+ let intrinsics = [IntrinSelect<int_acos>];
let arguments = [OverloadTy];
let result = OverloadTy;
let overloads = [Overloads<DXIL1_0, [HalfTy, FloatTy]>];
@@ -474,9 +477,9 @@ def ACos : DXILOp<15, unary> {
let attributes = [Attributes<DXIL1_0, [ReadNone]>];
}
-def ASin : DXILOp<16, unary> {
+def ASin : DXILOp<16, unary> {
let Doc = "Returns the arcsine of the specified value.";
- let intrinsics = [ IntrinSelect<int_asin> ];
+ let intrinsics = [IntrinSelect<int_asin>];
let arguments = [OverloadTy];
let result = OverloadTy;
let overloads = [Overloads<DXIL1_0, [HalfTy, FloatTy]>];
@@ -484,9 +487,9 @@ def ASin : DXILOp<16, unary> {
let attributes = [Attributes<DXIL1_0, [ReadNone]>];
}
-def ATan : DXILOp<17, unary> {
+def ATan : DXILOp<17, unary> {
let Doc = "Returns the arctangent of the specified value.";
- let intrinsics = [ IntrinSelect<int_atan> ];
+ let intrinsics = [IntrinSelect<int_atan>];
let arguments = [OverloadTy];
let result = OverloadTy;
let overloads = [Overloads<DXIL1_0, [HalfTy, FloatTy]>];
@@ -494,9 +497,9 @@ def ATan : DXILOp<17, unary> {
let attributes = [Attributes<DXIL1_0, [ReadNone]>];
}
-def HCos : DXILOp<18, unary> {
+def HCos : DXILOp<18, unary> {
let Doc = "Returns the hyperbolic cosine of the specified value.";
- let intrinsics = [ IntrinSelect<int_cosh> ];
+ let intrinsics = [IntrinSelect<int_cosh>];
let arguments = [OverloadTy];
let result = OverloadTy;
let overloads = [Overloads<DXIL1_0, [HalfTy, FloatTy]>];
@@ -504,9 +507,9 @@ def HCos : DXILOp<18, unary> {
let attributes = [Attributes<DXIL1_0, [ReadNone]>];
}
-def HSin : DXILOp<19, unary> {
+def HSin : DXILOp<19, unary> {
let Doc = "Returns the hyperbolic sine of the specified value.";
- let intrinsics = [ IntrinSelect<int_sinh> ];
+ let intrinsics = [IntrinSelect<int_sinh>];
let arguments = [OverloadTy];
let result = OverloadTy;
let overloads = [Overloads<DXIL1_0, [HalfTy, FloatTy]>];
@@ -514,9 +517,9 @@ def HSin : DXILOp<19, unary> {
let attributes = [Attributes<DXIL1_0, [ReadNone]>];
}
-def HTan : DXILOp<20, unary> {
+def HTan : DXILOp<20, unary> {
let Doc = "Returns the hyperbolic tan of the specified value.";
- let intrinsics = [ IntrinSelect<int_tanh> ];
+ let intrinsics = [IntrinSelect<int_tanh>];
let arguments = [OverloadTy];
let result = OverloadTy;
let overloads = [Overloads<DXIL1_0, [HalfTy, FloatTy]>];
@@ -524,10 +527,10 @@ def HTan : DXILOp<20, unary> {
let attributes = [Attributes<DXIL1_0, [ReadNone]>];
}
-def Exp2 : DXILOp<21, unary> {
+def Exp2 : DXILOp<21, unary> {
let Doc = "Returns the base 2 exponential, or 2**x, of the specified value. "
"exp2(x) = 2**x.";
- let intrinsics = [ IntrinSelect<int_exp2> ];
+ let intrinsics = [IntrinSelect<int_exp2>];
let arguments = [OverloadTy];
let result = OverloadTy;
let overloads = [Overloads<DXIL1_0, [HalfTy, FloatTy]>];
@@ -535,10 +538,10 @@ def Exp2 : DXILOp<21, unary> {
let attributes = [Attributes<DXIL1_0, [ReadNone]>];
}
-def Frac : DXILOp<22, unary> {
+def Frac : DXILOp<22, unary> {
let Doc = "Returns a fraction from 0 to 1 that represents the decimal part "
"of the input.";
- let intrinsics = [ IntrinSelect<int_dx_frac> ];
+ let intrinsics = [IntrinSelect<int_dx_frac>];
let arguments = [OverloadTy];
let result = OverloadTy;
let overloads = [Overloads<DXIL1_0, [HalfTy, FloatTy]>];
@@ -546,9 +549,9 @@ def Frac : DXILOp<22, unary> {
let attributes = [Attributes<DXIL1_0, [ReadNone]>];
}
-def Log2 : DXILOp<23, unary> {
+def Log2 : DXILOp<23, unary> {
let Doc = "Returns the base-2 logarithm of the specified value.";
- let intrinsics = [ IntrinSelect<int_log2> ];
+ let intrinsics = [IntrinSelect<int_log2>];
let arguments = [OverloadTy];
let result = OverloadTy;
let overloads = [Overloads<DXIL1_0, [HalfTy, FloatTy]>];
@@ -556,10 +559,10 @@ def Log2 : DXILOp<23, unary> {
let attributes = [Attributes<DXIL1_0, [ReadNone]>];
}
-def Sqrt : DXILOp<24, unary> {
+def Sqrt : DXILOp<24, unary> {
let Doc = "Returns the square root of the specified floating-point value, "
"per component.";
- let intrinsics = [ IntrinSelect<int_sqrt> ];
+ let intrinsics = [IntrinSelect<int_sqrt>];
let arguments = [OverloadTy];
let result = OverloadTy;
let overloads = [Overloads<DXIL1_0, [HalfTy, FloatTy]>];
@@ -567,10 +570,10 @@ def Sqrt : DXILOp<24, unary> {
let attributes = [Attributes<DXIL1_0, [ReadNone]>];
}
-def RSqrt : DXILOp<25, unary> {
+def RSqrt : DXILOp<25, unary> {
let Doc = "Returns the reciprocal of the square root of the specified value. "
"rsqrt(x) = 1 / sqrt(x).";
- let intrinsics = [ IntrinSelect<int_dx_rsqrt> ];
+ let intrinsics = [IntrinSelect<int_dx_rsqrt>];
let arguments = [OverloadTy];
let result = OverloadTy;
let overloads = [Overloads<DXIL1_0, [HalfTy, FloatTy]>];
@@ -578,10 +581,10 @@ def RSqrt : DXILOp<25, unary> {
let attributes = [Attributes<DXIL1_0, [ReadNone]>];
}
-def Round : DXILOp<26, unary> {
+def Round : DXILOp<26, unary> {
let Doc = "Returns the input rounded to the nearest integer within a "
"floating-point type.";
- let intrinsics = [ IntrinSelect<int_roundeven> ];
+ let intrinsics = [IntrinSelect<int_roundeven>];
let arguments = [OverloadTy];
let result = OverloadTy;
let overloads = [Overloads<DXIL1_0, [HalfTy, FloatTy]>];
@@ -589,10 +592,10 @@ def Round : DXILOp<26, unary> {
let attributes = [Attributes<DXIL1_0, [ReadNone]>];
}
-def Floor : DXILOp<27, unary> {
+def Floor : DXILOp<27, unary> {
let Doc =
"Returns the largest integer that is less than or equal to the input.";
- let intrinsics = [ IntrinSelect<int_floor> ];
+ let intrinsics = [IntrinSelect<int_floor>];
let arguments = [OverloadTy];
let result = OverloadTy;
let overloads = [Overloads<DXIL1_0, [HalfTy, FloatTy]>];
@@ -600,10 +603,10 @@ def Floor : DXILOp<27, unary> {
let attributes = [Attributes<DXIL1_0, [ReadNone]>];
}
-def Ceil : DXILOp<28, unary> {
+def Ceil : DXILOp<28, unary> {
let Doc = "Returns the smallest integer that is greater than or equal to the "
"input.";
- let intrinsics = [ IntrinSelect<int_ceil> ];
+ let intrinsics = [IntrinSelect<int_ceil>];
let arguments = [OverloadTy];
let result = OverloadTy;
let overloads = [Overloads<DXIL1_0, [HalfTy, FloatTy]>];
@@ -611,9 +614,9 @@ def Ceil : DXILOp<28, unary> {
let attributes = [Attributes<DXIL1_0, [ReadNone]>];
}
-def Trunc : DXILOp<29, unary> {
+def Trunc : DXILOp<29, unary> {
let Doc = "Returns the specified value truncated to the integer component.";
- let intrinsics = [ IntrinSelect<int_trunc> ];
+ let intrinsics = [IntrinSelect<int_trunc>];
let arguments = [OverloadTy];
let result = OverloadTy;
let overloads = [Overloads<DXIL1_0, [HalfTy, FloatTy]>];
@@ -621,23 +624,21 @@ def Trunc : DXILOp<29, unary> {
let attributes = [Attributes<DXIL1_0, [ReadNone]>];
}
-def Rbits : DXILOp<30, unary> {
+def Rbits : DXILOp<30, unary> {
let Doc = "Returns the specified value with its bits reversed.";
- let intrinsics = [ IntrinSelect<int_bitreverse> ];
+ let intrinsics = [IntrinSelect<int_bitreverse>];
let arguments = [OverloadTy];
let result = OverloadTy;
- let overloads =
- [Overloads<DXIL1_0, [Int16Ty, Int32Ty, Int64Ty]>];
+ let overloads = [Overloads<DXIL1_0, [Int16Ty, Int32Ty, Int64Ty]>];
let stages = [Stages<DXIL1_0, [all_stages]>];
let attributes = [Attributes<DXIL1_0, [ReadNone]>];
}
-def CountBits : DXILOp<31, unaryBits> {
+def CountBits : DXILOp<31, unaryBits> {
let Doc = "Returns the number of 1 bits in the specified value.";
let arguments = [OverloadTy];
let result = Int32Ty;
- let overloads =
- [Overloads<DXIL1_0, [Int16Ty, Int32Ty, Int64Ty]>];
+ let overloads = [Overloads<DXIL1_0, [Int16Ty, Int32Ty, Int64Ty]>];
let stages = [Stages<DXIL1_0, [all_stages]>];
let attributes = [Attributes<DXIL1_0, [ReadNone]>];
}
@@ -645,145 +646,133 @@ def CountBits : DXILOp<31, unaryBits> {
def FirstbitLo : DXILOp<32, unaryBits> {
let Doc = "Returns the location of the first set bit starting from "
"the lowest order bit and working upward.";
- let intrinsics = [ IntrinSelect<int_dx_firstbitlow> ];
+ let intrinsics = [IntrinSelect<int_dx_firstbitlow>];
let arguments = [OverloadTy];
let result = Int32Ty;
- let overloads =
- [Overloads<DXIL1_0, [Int16Ty, Int32Ty, Int64Ty]>];
+ let overloads = [Overloads<DXIL1_0, [Int16Ty, Int32Ty, Int64Ty]>];
let stages = [Stages<DXIL1_0, [all_stages]>];
let attributes = [Attributes<DXIL1_0, [ReadNone]>];
}
-def FirstbitHi : DXILOp<33, unaryBits> {
+def FirstbitHi : DXILOp<33, unaryBits> {
let Doc = "Returns the location of the first set bit starting from "
"the highest order bit and working downward.";
- let intrinsics = [ IntrinSelect<int_dx_firstbituhigh> ];
+ let intrinsics = [IntrinSelect<int_dx_firstbituhigh>];
let arguments = [OverloadTy];
let result = Int32Ty;
- let overloads =
- [Overloads<DXIL1_0, [Int16Ty, Int32Ty, Int64Ty]>];
+ let overloads = [Overloads<DXIL1_0, [Int16Ty, Int32Ty, Int64Ty]>];
let stages = [Stages<DXIL1_0, [all_stages]>];
let attributes = [Attributes<DXIL1_0, [ReadNone]>];
}
-def FirstbitSHi : DXILOp<34, unaryBits> {
+def FirstbitSHi : DXILOp<34, unaryBits> {
let Doc = "Returns the location of the first set bit from "
"the highest order bit based on the sign.";
- let intrinsics = [ IntrinSelect<int_dx_firstbitshigh> ];
+ let intrinsics = [IntrinSelect<int_dx_firstbitshigh>];
let arguments = [OverloadTy];
let result = Int32Ty;
- let overloads =
- [Overloads<DXIL1_0, [Int16Ty, Int32Ty, Int64Ty]>];
+ let overloads = [Overloads<DXIL1_0, [Int16Ty, Int32Ty, Int64Ty]>];
let stages = [Stages<DXIL1_0, [all_stages]>];
let attributes = [Attributes<DXIL1_0, [ReadNone]>];
}
-def FMax : DXILOp<35, binary> {
+def FMax : DXILOp<35, binary> {
let Doc = "Float maximum. FMax(a,b) = a > b ? a : b";
- let intrinsics = [ IntrinSelect<int_maxnum> ];
+ let intrinsics = [IntrinSelect<int_maxnum>];
let arguments = [OverloadTy, OverloadTy];
let result = OverloadTy;
- let overloads =
- [Overloads<DXIL1_0, [HalfTy, FloatTy, DoubleTy]>];
+ let overloads = [Overloads<DXIL1_0, [HalfTy, FloatTy, DoubleTy]>];
let stages = [Stages<DXIL1_0, [all_stages]>];
let attributes = [Attributes<DXIL1_0, [ReadNone]>];
}
-def FMin : DXILOp<36, binary> {
+def FMin : DXILOp<36, binary> {
let Doc = "Float minimum. FMin(a,b) = a < b ? a : b";
- let intrinsics = [ IntrinSelect<int_minnum> ];
+ let intrinsics = [IntrinSelect<int_minnum>];
let arguments = [OverloadTy, OverloadTy];
let result = OverloadTy;
- let overloads =
- [Overloads<DXIL1_0, [HalfTy, FloatTy, DoubleTy]>];
+ let overloads = [Overloads<DXIL1_0, [HalfTy, FloatTy, DoubleTy]>];
let stages = [Stages<DXIL1_0, [all_stages]>];
let attributes = [Attributes<DXIL1_0, [ReadNone]>];
}
-def SMax : DXILOp<37, binary> {
+def SMax : DXILOp<37, binary> {
let Doc = "Signed integer maximum. SMax(a,b) = a > b ? a : b";
- let intrinsics = [ IntrinSelect<int_smax> ];
+ let intrinsics = [IntrinSelect<int_smax>];
let arguments = [OverloadTy, OverloadTy];
let result = OverloadTy;
- let overloads =
- [Overloads<DXIL1_0, [Int16Ty, Int32Ty, Int64Ty]>];
+ let overloads = [Overloads<DXIL1_0, [Int16Ty, Int32Ty, Int64Ty]>];
let stages = [Stages<DXIL1_0, [all_stages]>];
let attributes = [Attributes<DXIL1_0, [ReadNone]>];
}
-def SMin : DXILOp<38, binary> {
+def SMin : DXILOp<38, binary> {
let Doc = "Signed integer minimum. SMin(a,b) = a < b ? a : b";
- let intrinsics = [ IntrinSelect<int_smin> ];
+ let intrinsics = [IntrinSelect<int_smin>];
let arguments = [OverloadTy, OverloadTy];
let result = OverloadTy;
- let overloads =
- [Overloads<DXIL1_0, [Int16Ty, Int32Ty, Int64Ty]>];
+ let overloads = [Overloads<DXIL1_0, [Int16Ty, Int32Ty, Int64Ty]>];
let stages = [Stages<DXIL1_0, [all_stages]>];
let attributes = [Attributes<DXIL1_0, [ReadNone]>];
}
-def UMax : DXILOp<39, binary> {
+def UMax : DXILOp<39, binary> {
let Doc = "Unsigned integer maximum. UMax(a,b) = a > b ? a : b";
- let intrinsics = [ IntrinSelect<int_umax> ];
+ let intrinsics = [IntrinSelect<int_umax>];
let arguments = [OverloadTy, OverloadTy];
let result = OverloadTy;
- let overloads =
- [Overloads<DXIL1_0, [Int16Ty, Int32Ty, Int64Ty]>];
+ let overloads = [Overloads<DXIL1_0, [Int16Ty, Int32Ty, Int64Ty]>];
let stages = [Stages<DXIL1_0, [all_stages]>];
let attributes = [Attributes<DXIL1_0, [ReadNone]>];
}
-def UMin : DXILOp<40, binary> {
+def UMin : DXILOp<40, binary> {
let Doc = "Unsigned integer minimum. UMin(a,b) = a < b ? a : b";
- let intrinsics = [ IntrinSelect<int_umin> ];
+ let intrinsics = [IntrinSelect<int_umin>];
let arguments = [OverloadTy, OverloadTy];
let result = OverloadTy;
- let overloads =
- [Overloads<DXIL1_0, [Int16Ty, Int32Ty, Int64Ty]>];
+ let overloads = [Overloads<DXIL1_0, [Int16Ty, Int32Ty, Int64Ty]>];
let stages = [Stages<DXIL1_0, [all_stages]>];
let attributes = [Attributes<DXIL1_0, [ReadNone]>];
}
-def FMad : DXILOp<46, tertiary> {
+def FMad : DXILOp<46, tertiary> {
let Doc = "Floating point arithmetic multiply/add operation. fmad(m,a,b) = m "
"* a + b.";
- let intrinsics = [ IntrinSelect<int_fmuladd> ];
+ let intrinsics = [IntrinSelect<int_fmuladd>];
let arguments = [OverloadTy, OverloadTy, OverloadTy];
let result = OverloadTy;
- let overloads =
- [Overloads<DXIL1_0, [HalfTy, FloatTy, DoubleTy]>];
+ let overloads = [Overloads<DXIL1_0, [HalfTy, FloatTy, DoubleTy]>];
let stages = [Stages<DXIL1_0, [all_stages]>];
let attributes = [Attributes<DXIL1_0, [ReadNone]>];
}
-def IMad : DXILOp<48, tertiary> {
+def IMad : DXILOp<48, tertiary> {
let Doc = "Signed integer arithmetic multiply/add operation. imad(m,a,b) = m "
"* a + b.";
- let intrinsics = [ IntrinSelect<int_dx_imad> ];
+ let intrinsics = [IntrinSelect<int_dx_imad>];
let arguments = [OverloadTy, OverloadTy, OverloadTy];
let result = OverloadTy;
- let overloads =
- [Overloads<DXIL1_0, [Int16Ty, Int32Ty, Int64Ty]>];
+ let overloads = [Overloads<DXIL1_0, [Int16Ty, Int32Ty, Int64Ty]>];
let stages = [Stages<DXIL1_0, [all_stages]>];
let attributes = [Attributes<DXIL1_0, [ReadNone]>];
}
-def UMad : DXILOp<49, tertiary> {
+def UMad : DXILOp<49, tertiary> {
let Doc = "Unsigned integer arithmetic multiply/add operation. umad(m,a, = m "
"* a + b.";
- let intrinsics = [ IntrinSelect<int_dx_umad> ];
+ let intrinsics = [IntrinSelect<int_dx_umad>];
let arguments = [OverloadTy, OverloadTy, OverloadTy];
let result = OverloadTy;
- let overloads =
- [Overloads<DXIL1_0, [Int16Ty, Int32Ty, Int64Ty]>];
+ let overloads = [Overloads<DXIL1_0, [Int16Ty, Int32Ty, Int64Ty]>];
let stages = [Stages<DXIL1_0, [all_stages]>];
let attributes = [Attributes<DXIL1_0, [ReadNone]>];
}
-def Dot2 : DXILOp<54, dot2> {
+def Dot2 : DXILOp<54, dot2> {
let Doc = "dot product of two float vectors Dot(a,b) = a[0]*b[0] + ... + "
"a[n]*b[n] where n is 0 to 1 inclusive";
- let intrinsics = [ IntrinSelect<int_dx_dot2> ];
+ let intrinsics = [IntrinSelect<int_dx_dot2>];
let arguments = !listsplat(OverloadTy, 4);
let result = OverloadTy;
let overloads = [Overloads<DXIL1_0, [HalfTy, FloatTy]>];
@@ -791,10 +780,10 @@ def Dot2 : DXILOp<54, dot2> {
let attributes = [Attributes<DXIL1_0, [ReadNone]>];
}
-def Dot3 : DXILOp<55, dot3> {
+def Dot3 : DXILOp<55, dot3> {
let Doc = "dot product of two float vectors Dot(a,b) = a[0]*b[0] + ... + "
"a[n]*b[n] where n is 0 to 2 inclusive";
- let intrinsics = [ IntrinSelect<int_dx_dot3> ];
+ let intrinsics = [IntrinSelect<int_dx_dot3>];
let arguments = !listsplat(OverloadTy, 6);
let result = OverloadTy;
let overloads = [Overloads<DXIL1_0, [HalfTy, FloatTy]>];
@@ -802,10 +791,10 @@ def Dot3 : DXILOp<55, dot3> {
let attributes = [Attributes<DXIL1_0, [ReadNone]>];
}
-def Dot4 : DXILOp<56, dot4> {
+def Dot4 : DXILOp<56, dot4> {
let Doc = "dot product of two float vectors Dot(a,b) = a[0]*b[0] + ... + "
"a[n]*b[n] where n is 0 to 3 inclusive";
- let intrinsics = [ IntrinSelect<int_dx_dot4> ];
+ let intrinsics = [IntrinSelect<int_dx_dot4>];
let arguments = !listsplat(OverloadTy, 8);
let result = OverloadTy;
let overloads = [Overloads<DXIL1_0, [HalfTy, FloatTy]>];
@@ -868,15 +857,15 @@ def CheckAccessFullyMapped : DXILOp<71, checkAccessFullyMapped> {
def Discard : DXILOp<82, discard> {
let Doc = "discard the current pixel";
- let intrinsics = [ IntrinSelect<int_dx_discard> ];
+ let intrinsics = [IntrinSelect<int_dx_discard>];
let arguments = [Int1Ty];
let result = VoidTy;
let stages = [Stages<DXIL1_0, [pixel]>];
}
-def ThreadId : DXILOp<93, threadId> {
+def ThreadId : DXILOp<93, threadId> {
let Doc = "Reads the thread ID";
- let intrinsics = [ IntrinSelect<int_dx_thread_id> ];
+ let intrinsics = [IntrinSelect<int_dx_thread_id>];
let arguments = [OverloadTy];
let result = OverloadTy;
let overloads = [Overloads<DXIL1_0, [Int32Ty]>];
@@ -884,9 +873,9 @@ def ThreadId : DXILOp<93, threadId> {
let attributes = [Attributes<DXIL1_0, [ReadNone]>];
}
-def GroupId : DXILOp<94, groupId> {
+def GroupId : DXILOp<94, groupId> {
let Doc = "Reads the group ID (SV_GroupID)";
- let intrinsics = [ IntrinSelect<int_dx_group_id> ];
+ let intrinsics = [IntrinSelect<int_dx_group_id>];
let arguments = [OverloadTy];
let result = OverloadTy;
let overloads = [Overloads<DXIL1_0, [Int32Ty]>];
@@ -894,9 +883,9 @@ def GroupId : DXILOp<94, groupId> {
let attributes = [Attributes<DXIL1_0, [ReadNone]>];
}
-def ThreadIdInGroup : DXILOp<95, threadIdInGroup> {
+def ThreadIdInGroup : DXILOp<95, threadIdInGroup> {
let Doc = "Reads the thread ID within the group (SV_GroupThreadID)";
- let intrinsics = [ IntrinSelect<int_dx_thread_id_in_group> ];
+ let intrinsics = [IntrinSelect<int_dx_thread_id_in_group>];
let arguments = [OverloadTy];
let result = OverloadTy;
let overloads = [Overloads<DXIL1_0, [Int32Ty]>];
@@ -904,26 +893,26 @@ def ThreadIdInGroup : DXILOp<95, threadIdInGroup> {
let attributes = [Attributes<DXIL1_0, [ReadNone]>];
}
-def FlattenedThreadIdInGroup : DXILOp<96, flattenedThreadIdInGroup> {
+def FlattenedThreadIdInGroup : DXILOp<96, flattenedThreadIdInGroup> {
let Doc = "Provides a flattened index for a given thread within a given "
"group (SV_GroupIndex)";
- let intrinsics = [ IntrinSelect<int_dx_flattened_thread_id_in_group> ];
+ let intrinsics = [IntrinSelect<int_dx_flattened_thread_id_in_group>];
let result = OverloadTy;
let overloads = [Overloads<DXIL1_0, [Int32Ty]>];
let stages = [Stages<DXIL1_0, [compute, mesh, amplification, node]>];
let attributes = [Attributes<DXIL1_0, [ReadNone]>];
}
-def MakeDouble : DXILOp<101, makeDouble> {
+def MakeDouble : DXILOp<101, makeDouble> {
let Doc = "creates a double value";
- let intrinsics = [ IntrinSelect<int_dx_asdouble> ];
+ let intrinsics = [IntrinSelect<int_dx_asdouble>];
let arguments = [Int32Ty, Int32Ty];
let result = DoubleTy;
let stages = [Stages<DXIL1_0, [all_stages]>];
let attributes = [Attributes<DXIL1_0, [ReadNone]>];
}
-def SplitDouble : DXILOp<102, splitDouble> {
+def SplitDouble : DXILOp<102, splitDouble> {
let Doc = "Splits a double into 2 uints";
let arguments = [OverloadTy];
let result = SplitDoubleTy;
@@ -972,7 +961,7 @@ def RawBufferStore : DXILOp<140, rawBufferStore> {
def Dot4AddI8Packed : DXILOp<163, dot4AddPacked> {
let Doc = "signed dot product of 4 x i8 vectors packed into i32, with "
"accumulate to i32";
- let intrinsics = [ IntrinSelect<int_dx_dot4add_i8packed> ];
+ let intrinsics = [IntrinSelect<int_dx_dot4add_i8packed>];
let arguments = [Int32Ty, Int32Ty, Int32Ty];
let result = Int32Ty;
let stages = [Stages<DXIL1_0, [all_stages]>];
@@ -982,7 +971,7 @@ def Dot4AddI8Packed : DXILOp<163, dot4AddPacked> {
def Dot4AddU8Packed : DXILOp<164, dot4AddPacked> {
let Doc = "unsigned dot product of 4 x i8 vectors packed into i32, with "
"accumulate to i32";
- let intrinsics = [ IntrinSelect<int_dx_dot4add_u8packed> ];
+ let intrinsics = [IntrinSelect<int_dx_dot4add_u8packed>];
let arguments = [Int32Ty, Int32Ty, Int32Ty];
let result = Int32Ty;
let stages = [Stages<DXIL1_0, [all_stages]>];
@@ -1006,8 +995,9 @@ def CreateHandleFromBinding : DXILOp<217, createHandleFromBinding> {
}
def WaveActiveAllTrue : DXILOp<114, waveAllTrue> {
- let Doc = "returns true if the expression is true in all of the active lanes in the current wave";
- let intrinsics = [ IntrinSelect<int_dx_wave_all> ];
+ let Doc = "returns true if the expression is true in all of the active lanes "
+ "in the current wave";
+ let intrinsics = [IntrinSelect<int_dx_wave_all>];
let arguments = [Int1Ty];
let result = Int1Ty;
let stages = [Stages<DXIL1_0, [all_stages]>];
@@ -1015,8 +1005,9 @@ def WaveActiveAllTrue : DXILOp<114, waveAllTrue> {
}
def WaveActiveAnyTrue : DXILOp<113, waveAnyTrue> {
- let Doc = "returns true if the expression is true in any of the active lanes in the current wave";
- let intrinsics = [ IntrinSelect<int_dx_wave_any> ];
+ let Doc = "returns true if the expression is true in any of the active lanes "
+ "in the current wave";
+ let intrinsics = [IntrinSelect<int_dx_wave_any>];
let arguments = [Int1Ty];
let result = Int1Ty;
let stages = [Stages<DXIL1_0, [all_stages]>];
@@ -1026,43 +1017,50 @@ def WaveActiveAnyTrue : DXILOp<113, waveAnyTrue> {
def WaveActiveOp : DXILOp<119, waveActiveOp> {
let Doc = "returns the result of the operation across waves";
let intrinsics = [
- IntrinSelect<
- int_dx_wave_reduce_sum,
- [ IntrinArgIndex<0>, IntrinArgI8<WaveOpKind_Sum>, IntrinArgI8<SignedOpKind_Signed> ]>,
- IntrinSelect<
- int_dx_wave_reduce_usum,
- [ IntrinArgIndex<0>, IntrinArgI8<WaveOpKind_Sum>, IntrinArgI8<SignedOpKind_Unsigned> ]>,
+ IntrinSelect<int_dx_wave_reduce_sum,
+ [
+ IntrinArgIndex<0>, IntrinArgI8<WaveOpKind_Sum>,
+ IntrinArgI8<SignedOpKind_Signed>
+ ]>,
+ IntrinSelect<int_dx_wave_reduce_usum,
+ [
+ IntrinArgIndex<0>, IntrinArgI8<WaveOpKind_Sum>,
+ IntrinArgI8<SignedOpKind_Unsigned>
+ ]>,
];
let arguments = [OverloadTy, Int8Ty, Int8Ty];
let result = OverloadTy;
- let overloads = [Overloads<DXIL1_0, [HalfTy, FloatTy, DoubleTy, Int16Ty, Int32Ty, Int64Ty]>];
+ let overloads = [
+ Overloads<DXIL1_0, [HalfTy, FloatTy, DoubleTy, Int16Ty, Int32Ty, Int64Ty]>
+ ];
let stages = [Stages<DXIL1_0, [all_stages]>];
let attributes = [Attributes<DXIL1_0, [ReadNone]>];
}
-def WaveIsFirstLane : DXILOp<110, waveIsFirstLane> {
+def WaveIsFirstLane : DXILOp<110, waveIsFirstLane> {
let Doc = "returns 1 for the first lane in the wave";
- let intrinsics = [ IntrinSelect<int_dx_wave_is_first_lane> ];
+ let intrinsics = [IntrinSelect<int_dx_wave_is_first_lane>];
let arguments = [];
let result = Int1Ty;
let stages = [Stages<DXIL1_0, [all_stages]>];
let properties = [IsWave];
}
-def WaveReadLaneAt: DXILOp<117, waveReadLaneAt> {
+def WaveReadLaneAt : DXILOp<117, waveReadLaneAt> {
let Doc = "returns the value from the specified lane";
- let intrinsics = [ IntrinSelect<int_dx_wave_readlane> ];
+ let intrinsics = [IntrinSelect<int_dx_wave_readlane>];
let arguments = [OverloadTy, Int32Ty];
let result = OverloadTy;
- let overloads = [Overloads<DXIL1_0, [HalfTy, FloatTy, DoubleTy, Int1Ty, Int16Ty, Int32Ty, Int64Ty]>];
+ let overloads = [Overloads<
+ DXIL1_0, [HalfTy, FloatTy, DoubleTy, Int1Ty, Int16Ty, Int32Ty, Int64Ty]>];
let stages = [Stages<DXIL1_0, [all_stages]>];
let properties = [IsWave];
}
def WaveGetLaneIndex : DXILOp<111, waveGetLaneIndex> {
let Doc = "returns the index of the current lane in the wave";
- let intrinsics = [ IntrinSelect<int_dx_wave_getlaneindex> ];
+ let intrinsics = [IntrinSelect<int_dx_wave_getlaneindex>];
let arguments = [];
let result = Int32Ty;
let stages = [Stages<DXIL1_0, [all_stages]>];
@@ -1072,7 +1070,7 @@ def WaveGetLaneIndex : DXILOp<111, waveGetLaneIndex> {
def WaveAllBitCount : DXILOp<135, waveAllOp> {
let Doc = "returns the count of bits set to 1 across the wave";
- let intrinsics = [ IntrinSelect<int_dx_wave_active_countbits> ];
+ let intrinsics = [IntrinSelect<int_dx_wave_active_countbits>];
let arguments = [Int1Ty];
let result = Int32Ty;
let stages = [Stages<DXIL1_0, [all_stages]>];
@@ -1082,9 +1080,8 @@ def WaveAllBitCount : DXILOp<135, waveAllOp> {
def Barrier : DXILOp<80, barrier> {
let Doc = "inserts a memory barrier in the shader";
let intrinsics = [
- IntrinSelect<
- int_dx_group_memory_barrier_with_group_sync,
- [ IntrinArgI32<BarrierMode_GroupMemoryBarrierWithGroupSync> ]>,
+ IntrinSelect<int_dx_group_memory_barrier_with_group_sync,
+ [IntrinArgI32<BarrierMode_GroupMemoryBarrierWithGroupSync>]>,
];
let arguments = [Int32Ty];
>From 16d43d6c73eaa7d4b0b1dd6a2fbf4ff1c872cab6 Mon Sep 17 00:00:00 2001
From: Finn Plummer <canadienfinn at gmail.com>
Date: Wed, 22 Jan 2025 21:05:57 +0000
Subject: [PATCH 2/2] [NFC][DirectX] Enforce ordering of DXIL Ops in DXIL.td
- this reorders existing dxil ops to be in ascending order with respect
to their opcodes
- this helps be consistent with dxil.rst and other resources listing the
opcodes
---
llvm/lib/Target/DirectX/DXIL.td | 196 ++++++++++++++++----------------
1 file changed, 99 insertions(+), 97 deletions(-)
diff --git a/llvm/lib/Target/DirectX/DXIL.td b/llvm/lib/Target/DirectX/DXIL.td
index 5784cc3e90f07d..8f1586a9828f36 100644
--- a/llvm/lib/Target/DirectX/DXIL.td
+++ b/llvm/lib/Target/DirectX/DXIL.td
@@ -405,6 +405,8 @@ class DXILOp<int opcode, DXILOpClass opclass> {
}
// Concrete definitions of DXIL Operations
+//
+// This are sorted by ascending value of the DXIL Opcodes
def Abs : DXILOp<6, unary> {
let Doc = "Returns the absolute value of the input.";
@@ -855,6 +857,20 @@ def CheckAccessFullyMapped : DXILOp<71, checkAccessFullyMapped> {
let attributes = [Attributes<DXIL1_0, [ReadOnly]>];
}
+def Barrier : DXILOp<80, barrier> {
+ let Doc = "inserts a memory barrier in the shader";
+ let intrinsics = [
+ IntrinSelect<int_dx_group_memory_barrier_with_group_sync,
+ [IntrinArgI32<BarrierMode_GroupMemoryBarrierWithGroupSync>]>,
+ ];
+
+ let arguments = [Int32Ty];
+ let result = VoidTy;
+ let stages = [Stages<DXIL1_0, [compute, library]>];
+ let attributes = [Attributes<DXIL1_0, []>];
+ let properties = [IsBarrier];
+}
+
def Discard : DXILOp<82, discard> {
let Doc = "discard the current pixel";
let intrinsics = [IntrinSelect<int_dx_discard>];
@@ -921,6 +937,89 @@ def SplitDouble : DXILOp<102, splitDouble> {
let attributes = [Attributes<DXIL1_0, [ReadNone]>];
}
+def WaveIsFirstLane : DXILOp<110, waveIsFirstLane> {
+ let Doc = "returns 1 for the first lane in the wave";
+ let intrinsics = [IntrinSelect<int_dx_wave_is_first_lane>];
+ let arguments = [];
+ let result = Int1Ty;
+ let stages = [Stages<DXIL1_0, [all_stages]>];
+ let properties = [IsWave];
+}
+
+def WaveGetLaneIndex : DXILOp<111, waveGetLaneIndex> {
+ let Doc = "returns the index of the current lane in the wave";
+ let intrinsics = [IntrinSelect<int_dx_wave_getlaneindex>];
+ let arguments = [];
+ let result = Int32Ty;
+ let stages = [Stages<DXIL1_0, [all_stages]>];
+ let attributes = [Attributes<DXIL1_0, [ReadOnly]>];
+ let properties = [IsWave];
+}
+
+def WaveActiveAnyTrue : DXILOp<113, waveAnyTrue> {
+ let Doc = "returns true if the expression is true in any of the active lanes "
+ "in the current wave";
+ let intrinsics = [IntrinSelect<int_dx_wave_any>];
+ let arguments = [Int1Ty];
+ let result = Int1Ty;
+ let stages = [Stages<DXIL1_0, [all_stages]>];
+ let properties = [IsWave];
+}
+
+def WaveActiveAllTrue : DXILOp<114, waveAllTrue> {
+ let Doc = "returns true if the expression is true in all of the active lanes "
+ "in the current wave";
+ let intrinsics = [IntrinSelect<int_dx_wave_all>];
+ let arguments = [Int1Ty];
+ let result = Int1Ty;
+ let stages = [Stages<DXIL1_0, [all_stages]>];
+ let properties = [IsWave];
+}
+
+def WaveReadLaneAt : DXILOp<117, waveReadLaneAt> {
+ let Doc = "returns the value from the specified lane";
+ let intrinsics = [IntrinSelect<int_dx_wave_readlane>];
+ let arguments = [OverloadTy, Int32Ty];
+ let result = OverloadTy;
+ let overloads = [Overloads<
+ DXIL1_0, [HalfTy, FloatTy, DoubleTy, Int1Ty, Int16Ty, Int32Ty, Int64Ty]>];
+ let stages = [Stages<DXIL1_0, [all_stages]>];
+ let properties = [IsWave];
+}
+
+def WaveActiveOp : DXILOp<119, waveActiveOp> {
+ let Doc = "returns the result of the operation across waves";
+ let intrinsics = [
+ IntrinSelect<int_dx_wave_reduce_sum,
+ [
+ IntrinArgIndex<0>, IntrinArgI8<WaveOpKind_Sum>,
+ IntrinArgI8<SignedOpKind_Signed>
+ ]>,
+ IntrinSelect<int_dx_wave_reduce_usum,
+ [
+ IntrinArgIndex<0>, IntrinArgI8<WaveOpKind_Sum>,
+ IntrinArgI8<SignedOpKind_Unsigned>
+ ]>,
+ ];
+
+ let arguments = [OverloadTy, Int8Ty, Int8Ty];
+ let result = OverloadTy;
+ let overloads = [
+ Overloads<DXIL1_0, [HalfTy, FloatTy, DoubleTy, Int16Ty, Int32Ty, Int64Ty]>
+ ];
+ let stages = [Stages<DXIL1_0, [all_stages]>];
+ let attributes = [Attributes<DXIL1_0, [ReadNone]>];
+}
+
+def WaveAllBitCount : DXILOp<135, waveAllOp> {
+ let Doc = "returns the count of bits set to 1 across the wave";
+ let intrinsics = [IntrinSelect<int_dx_wave_active_countbits>];
+ let arguments = [Int1Ty];
+ let result = Int32Ty;
+ let stages = [Stages<DXIL1_0, [all_stages]>];
+ let properties = [IsWave];
+}
+
def RawBufferLoad : DXILOp<139, rawBufferLoad> {
let Doc = "reads from a raw buffer and structured buffer";
// Handle, Coord0, Coord1, Mask, Alignment
@@ -993,100 +1092,3 @@ def CreateHandleFromBinding : DXILOp<217, createHandleFromBinding> {
let stages = [Stages<DXIL1_6, [all_stages]>];
let attributes = [Attributes<DXIL1_0, [ReadNone]>];
}
-
-def WaveActiveAllTrue : DXILOp<114, waveAllTrue> {
- let Doc = "returns true if the expression is true in all of the active lanes "
- "in the current wave";
- let intrinsics = [IntrinSelect<int_dx_wave_all>];
- let arguments = [Int1Ty];
- let result = Int1Ty;
- let stages = [Stages<DXIL1_0, [all_stages]>];
- let properties = [IsWave];
-}
-
-def WaveActiveAnyTrue : DXILOp<113, waveAnyTrue> {
- let Doc = "returns true if the expression is true in any of the active lanes "
- "in the current wave";
- let intrinsics = [IntrinSelect<int_dx_wave_any>];
- let arguments = [Int1Ty];
- let result = Int1Ty;
- let stages = [Stages<DXIL1_0, [all_stages]>];
- let properties = [IsWave];
-}
-
-def WaveActiveOp : DXILOp<119, waveActiveOp> {
- let Doc = "returns the result of the operation across waves";
- let intrinsics = [
- IntrinSelect<int_dx_wave_reduce_sum,
- [
- IntrinArgIndex<0>, IntrinArgI8<WaveOpKind_Sum>,
- IntrinArgI8<SignedOpKind_Signed>
- ]>,
- IntrinSelect<int_dx_wave_reduce_usum,
- [
- IntrinArgIndex<0>, IntrinArgI8<WaveOpKind_Sum>,
- IntrinArgI8<SignedOpKind_Unsigned>
- ]>,
- ];
-
- let arguments = [OverloadTy, Int8Ty, Int8Ty];
- let result = OverloadTy;
- let overloads = [
- Overloads<DXIL1_0, [HalfTy, FloatTy, DoubleTy, Int16Ty, Int32Ty, Int64Ty]>
- ];
- let stages = [Stages<DXIL1_0, [all_stages]>];
- let attributes = [Attributes<DXIL1_0, [ReadNone]>];
-}
-
-def WaveIsFirstLane : DXILOp<110, waveIsFirstLane> {
- let Doc = "returns 1 for the first lane in the wave";
- let intrinsics = [IntrinSelect<int_dx_wave_is_first_lane>];
- let arguments = [];
- let result = Int1Ty;
- let stages = [Stages<DXIL1_0, [all_stages]>];
- let properties = [IsWave];
-}
-
-def WaveReadLaneAt : DXILOp<117, waveReadLaneAt> {
- let Doc = "returns the value from the specified lane";
- let intrinsics = [IntrinSelect<int_dx_wave_readlane>];
- let arguments = [OverloadTy, Int32Ty];
- let result = OverloadTy;
- let overloads = [Overloads<
- DXIL1_0, [HalfTy, FloatTy, DoubleTy, Int1Ty, Int16Ty, Int32Ty, Int64Ty]>];
- let stages = [Stages<DXIL1_0, [all_stages]>];
- let properties = [IsWave];
-}
-
-def WaveGetLaneIndex : DXILOp<111, waveGetLaneIndex> {
- let Doc = "returns the index of the current lane in the wave";
- let intrinsics = [IntrinSelect<int_dx_wave_getlaneindex>];
- let arguments = [];
- let result = Int32Ty;
- let stages = [Stages<DXIL1_0, [all_stages]>];
- let attributes = [Attributes<DXIL1_0, [ReadOnly]>];
- let properties = [IsWave];
-}
-
-def WaveAllBitCount : DXILOp<135, waveAllOp> {
- let Doc = "returns the count of bits set to 1 across the wave";
- let intrinsics = [IntrinSelect<int_dx_wave_active_countbits>];
- let arguments = [Int1Ty];
- let result = Int32Ty;
- let stages = [Stages<DXIL1_0, [all_stages]>];
- let properties = [IsWave];
-}
-
-def Barrier : DXILOp<80, barrier> {
- let Doc = "inserts a memory barrier in the shader";
- let intrinsics = [
- IntrinSelect<int_dx_group_memory_barrier_with_group_sync,
- [IntrinArgI32<BarrierMode_GroupMemoryBarrierWithGroupSync>]>,
- ];
-
- let arguments = [Int32Ty];
- let result = VoidTy;
- let stages = [Stages<DXIL1_0, [compute, library]>];
- let attributes = [Attributes<DXIL1_0, []>];
- let properties = [IsBarrier];
-}
More information about the llvm-commits
mailing list