[llvm] [RISCV][VLOPT] Don't reduce the VL is the same as CommonVL (PR #123878)

[Philip Reames via llvm-commits]

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@@ -4244,6 +4244,21 @@ bool RISCV::isVLKnownLE(const MachineOperand &LHS, const MachineOperand &RHS) {
   return LHS.getImm() <= RHS.getImm();
 }
 
+/// Given two VL operands, do we know that LHS < RHS?
+bool RISCV::isVLKnownLT(const MachineOperand &LHS, const MachineOperand &RHS) {
+  if (LHS.isReg() && RHS.isReg() && LHS.getReg().isVirtual() &&
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preames wrote:

Put an early-exit here which checks for LHS and RHS both being immediates and this simplifies greatly.  

https://github.com/llvm/llvm-project/pull/123878