[compiler-rt] ffde268 - [compiler-rt] Make Arm builtins aware of endianness in VMOVs (#123204)
via llvm-commits
llvm-commits at lists.llvm.org
Wed Jan 22 02:56:51 PST 2025
Author: Victor Campos
Date: 2025-01-22T10:56:48Z
New Revision: ffde2687be1fcb92c0c686aee441b83e71531457
URL: https://github.com/llvm/llvm-project/commit/ffde2687be1fcb92c0c686aee441b83e71531457
DIFF: https://github.com/llvm/llvm-project/commit/ffde2687be1fcb92c0c686aee441b83e71531457.diff
LOG: [compiler-rt] Make Arm builtins aware of endianness in VMOVs (#123204)
This patch makes Arm builtins aware of endianness in VMOVs.
Before this patch, the functions' definitions assumed little endian,
which made any program compiled for big endian incorrect.
Added:
Modified:
compiler-rt/lib/builtins/arm/adddf3vfp.S
compiler-rt/lib/builtins/arm/aeabi_dcmp.S
compiler-rt/lib/builtins/arm/divdf3vfp.S
compiler-rt/lib/builtins/arm/eqdf2vfp.S
compiler-rt/lib/builtins/arm/extendsfdf2vfp.S
compiler-rt/lib/builtins/arm/fixdfsivfp.S
compiler-rt/lib/builtins/arm/fixunsdfsivfp.S
compiler-rt/lib/builtins/arm/floatsidfvfp.S
compiler-rt/lib/builtins/arm/floatunssidfvfp.S
compiler-rt/lib/builtins/arm/gedf2vfp.S
compiler-rt/lib/builtins/arm/gtdf2vfp.S
compiler-rt/lib/builtins/arm/ledf2vfp.S
compiler-rt/lib/builtins/arm/ltdf2vfp.S
compiler-rt/lib/builtins/arm/muldf3vfp.S
compiler-rt/lib/builtins/arm/nedf2vfp.S
compiler-rt/lib/builtins/arm/subdf3vfp.S
compiler-rt/lib/builtins/arm/truncdfsf2vfp.S
compiler-rt/lib/builtins/arm/unorddf2vfp.S
compiler-rt/lib/builtins/assembly.h
Removed:
################################################################################
diff --git a/compiler-rt/lib/builtins/arm/adddf3vfp.S b/compiler-rt/lib/builtins/arm/adddf3vfp.S
index 1a271db0847c2e..280f5ab075638b 100644
--- a/compiler-rt/lib/builtins/arm/adddf3vfp.S
+++ b/compiler-rt/lib/builtins/arm/adddf3vfp.S
@@ -19,10 +19,10 @@ DEFINE_COMPILERRT_FUNCTION(__adddf3vfp)
#if defined(COMPILER_RT_ARMHF_TARGET)
vadd.f64 d0, d0, d1
#else
- vmov d6, r0, r1 // move first param from r0/r1 pair into d6
- vmov d7, r2, r3 // move second param from r2/r3 pair into d7
+ VMOV_TO_DOUBLE(d6, r0, r1) // move first param from r0/r1 pair into d6
+ VMOV_TO_DOUBLE(d7, r2, r3) // move second param from r2/r3 pair into d7
vadd.f64 d6, d6, d7
- vmov r0, r1, d6 // move result back to r0/r1 pair
+ VMOV_FROM_DOUBLE(r0, r1, d6) // move result back to r0/r1 pair
#endif
bx lr
END_COMPILERRT_FUNCTION(__adddf3vfp)
diff --git a/compiler-rt/lib/builtins/arm/aeabi_dcmp.S b/compiler-rt/lib/builtins/arm/aeabi_dcmp.S
index 5f720670ddd7c1..bee14b3ff8afec 100644
--- a/compiler-rt/lib/builtins/arm/aeabi_dcmp.S
+++ b/compiler-rt/lib/builtins/arm/aeabi_dcmp.S
@@ -18,9 +18,9 @@
// }
#if defined(COMPILER_RT_ARMHF_TARGET)
-# define CONVERT_DCMP_ARGS_TO_DF2_ARGS \
- vmov d0, r0, r1 SEPARATOR \
- vmov d1, r2, r3
+# define CONVERT_DCMP_ARGS_TO_DF2_ARGS \
+ VMOV_TO_DOUBLE(d0, r0, r1) \
+ VMOV_TO_DOUBLE(d1, r2, r3)
#else
# define CONVERT_DCMP_ARGS_TO_DF2_ARGS
#endif
diff --git a/compiler-rt/lib/builtins/arm/divdf3vfp.S b/compiler-rt/lib/builtins/arm/divdf3vfp.S
index ad50b57a651dbf..c8c0aa84c192fd 100644
--- a/compiler-rt/lib/builtins/arm/divdf3vfp.S
+++ b/compiler-rt/lib/builtins/arm/divdf3vfp.S
@@ -20,10 +20,10 @@ DEFINE_COMPILERRT_FUNCTION(__divdf3vfp)
#if defined(COMPILER_RT_ARMHF_TARGET)
vdiv.f64 d0, d0, d1
#else
- vmov d6, r0, r1 // move first param from r0/r1 pair into d6
- vmov d7, r2, r3 // move second param from r2/r3 pair into d7
+ VMOV_TO_DOUBLE(d6, r0, r1) // move first param from r0/r1 pair into d6
+ VMOV_TO_DOUBLE(d7, r2, r3) // move second param from r2/r3 pair into d7
vdiv.f64 d5, d6, d7
- vmov r0, r1, d5 // move result back to r0/r1 pair
+ VMOV_FROM_DOUBLE(r0, r1, d5) // move result back to r0/r1 pair
#endif
bx lr
END_COMPILERRT_FUNCTION(__divdf3vfp)
diff --git a/compiler-rt/lib/builtins/arm/eqdf2vfp.S b/compiler-rt/lib/builtins/arm/eqdf2vfp.S
index 2a0a64b97e7d4a..a6f341dc1f46d7 100644
--- a/compiler-rt/lib/builtins/arm/eqdf2vfp.S
+++ b/compiler-rt/lib/builtins/arm/eqdf2vfp.S
@@ -20,8 +20,8 @@ DEFINE_COMPILERRT_FUNCTION(__eqdf2vfp)
#if defined(COMPILER_RT_ARMHF_TARGET)
vcmp.f64 d0, d1
#else
- vmov d6, r0, r1 // load r0/r1 pair in double register
- vmov d7, r2, r3 // load r2/r3 pair in double register
+ VMOV_TO_DOUBLE(d6, r0, r1) // load r0/r1 pair in double register
+ VMOV_TO_DOUBLE(d7, r2, r3) // load r2/r3 pair in double register
vcmp.f64 d6, d7
#endif
vmrs apsr_nzcv, fpscr
diff --git a/compiler-rt/lib/builtins/arm/extendsfdf2vfp.S b/compiler-rt/lib/builtins/arm/extendsfdf2vfp.S
index 37c8be8dcd9c73..815be830003a22 100644
--- a/compiler-rt/lib/builtins/arm/extendsfdf2vfp.S
+++ b/compiler-rt/lib/builtins/arm/extendsfdf2vfp.S
@@ -23,7 +23,7 @@ DEFINE_COMPILERRT_FUNCTION(__extendsfdf2vfp)
#else
vmov s15, r0 // load float register from R0
vcvt.f64.f32 d7, s15 // convert single to double
- vmov r0, r1, d7 // return result in r0/r1 pair
+ VMOV_FROM_DOUBLE(r0, r1, d7) // return result in r0/r1 pair
#endif
bx lr
END_COMPILERRT_FUNCTION(__extendsfdf2vfp)
diff --git a/compiler-rt/lib/builtins/arm/fixdfsivfp.S b/compiler-rt/lib/builtins/arm/fixdfsivfp.S
index af1d4f4fa5f5e9..d708f3f4d80517 100644
--- a/compiler-rt/lib/builtins/arm/fixdfsivfp.S
+++ b/compiler-rt/lib/builtins/arm/fixdfsivfp.S
@@ -22,7 +22,7 @@ DEFINE_COMPILERRT_FUNCTION(__fixdfsivfp)
vcvt.s32.f64 s0, d0
vmov r0, s0
#else
- vmov d7, r0, r1 // load double register from R0/R1
+ VMOV_TO_DOUBLE(d7, r0, r1) // load double register from R0/R1
vcvt.s32.f64 s15, d7 // convert double to 32-bit int into s15
vmov r0, s15 // move s15 to result register
#endif
diff --git a/compiler-rt/lib/builtins/arm/fixunsdfsivfp.S b/compiler-rt/lib/builtins/arm/fixunsdfsivfp.S
index 44e6dbd4989e11..a3dda15e8c045a 100644
--- a/compiler-rt/lib/builtins/arm/fixunsdfsivfp.S
+++ b/compiler-rt/lib/builtins/arm/fixunsdfsivfp.S
@@ -23,7 +23,7 @@ DEFINE_COMPILERRT_FUNCTION(__fixunsdfsivfp)
vcvt.u32.f64 s0, d0
vmov r0, s0
#else
- vmov d7, r0, r1 // load double register from R0/R1
+ VMOV_TO_DOUBLE(d7, r0, r1) // load double register from R0/R1
vcvt.u32.f64 s15, d7 // convert double to 32-bit int into s15
vmov r0, s15 // move s15 to result register
#endif
diff --git a/compiler-rt/lib/builtins/arm/floatsidfvfp.S b/compiler-rt/lib/builtins/arm/floatsidfvfp.S
index ae8d2465889c6f..d0fc5e8a4480b2 100644
--- a/compiler-rt/lib/builtins/arm/floatsidfvfp.S
+++ b/compiler-rt/lib/builtins/arm/floatsidfvfp.S
@@ -24,7 +24,7 @@ DEFINE_COMPILERRT_FUNCTION(__floatsidfvfp)
#else
vmov s15, r0 // move int to float register s15
vcvt.f64.s32 d7, s15 // convert 32-bit int in s15 to double in d7
- vmov r0, r1, d7 // move d7 to result register pair r0/r1
+ VMOV_FROM_DOUBLE(r0, r1, d7) // move d7 to result register pair r0/r1
#endif
bx lr
END_COMPILERRT_FUNCTION(__floatsidfvfp)
diff --git a/compiler-rt/lib/builtins/arm/floatunssidfvfp.S b/compiler-rt/lib/builtins/arm/floatunssidfvfp.S
index 0932dab2bdb9d6..5acc2d5c0b25d7 100644
--- a/compiler-rt/lib/builtins/arm/floatunssidfvfp.S
+++ b/compiler-rt/lib/builtins/arm/floatunssidfvfp.S
@@ -24,7 +24,7 @@ DEFINE_COMPILERRT_FUNCTION(__floatunssidfvfp)
#else
vmov s15, r0 // move int to float register s15
vcvt.f64.u32 d7, s15 // convert 32-bit int in s15 to double in d7
- vmov r0, r1, d7 // move d7 to result register pair r0/r1
+ VMOV_FROM_DOUBLE(r0, r1, d7) // move d7 to result register pair r0/r1
#endif
bx lr
END_COMPILERRT_FUNCTION(__floatunssidfvfp)
diff --git a/compiler-rt/lib/builtins/arm/gedf2vfp.S b/compiler-rt/lib/builtins/arm/gedf2vfp.S
index 2af9d909967b0e..00746b891c9971 100644
--- a/compiler-rt/lib/builtins/arm/gedf2vfp.S
+++ b/compiler-rt/lib/builtins/arm/gedf2vfp.S
@@ -21,8 +21,8 @@ DEFINE_COMPILERRT_FUNCTION(__gedf2vfp)
#if defined(COMPILER_RT_ARMHF_TARGET)
vcmp.f64 d0, d1
#else
- vmov d6, r0, r1 // load r0/r1 pair in double register
- vmov d7, r2, r3 // load r2/r3 pair in double register
+ VMOV_TO_DOUBLE(d6, r0, r1) // load r0/r1 pair in double register
+ VMOV_TO_DOUBLE(d7, r2, r3) // load r2/r3 pair in double register
vcmp.f64 d6, d7
#endif
vmrs apsr_nzcv, fpscr
diff --git a/compiler-rt/lib/builtins/arm/gtdf2vfp.S b/compiler-rt/lib/builtins/arm/gtdf2vfp.S
index 782ad8cac013d3..980a09eb24b01c 100644
--- a/compiler-rt/lib/builtins/arm/gtdf2vfp.S
+++ b/compiler-rt/lib/builtins/arm/gtdf2vfp.S
@@ -21,8 +21,8 @@ DEFINE_COMPILERRT_FUNCTION(__gtdf2vfp)
#if defined(COMPILER_RT_ARMHF_TARGET)
vcmp.f64 d0, d1
#else
- vmov d6, r0, r1 // load r0/r1 pair in double register
- vmov d7, r2, r3 // load r2/r3 pair in double register
+ VMOV_TO_DOUBLE(d6, r0, r1) // load r0/r1 pair in double register
+ VMOV_TO_DOUBLE(d7, r2, r3) // load r2/r3 pair in double register
vcmp.f64 d6, d7
#endif
vmrs apsr_nzcv, fpscr
diff --git a/compiler-rt/lib/builtins/arm/ledf2vfp.S b/compiler-rt/lib/builtins/arm/ledf2vfp.S
index 0097e4b6c129a5..c7fe6d84535a47 100644
--- a/compiler-rt/lib/builtins/arm/ledf2vfp.S
+++ b/compiler-rt/lib/builtins/arm/ledf2vfp.S
@@ -21,8 +21,8 @@ DEFINE_COMPILERRT_FUNCTION(__ledf2vfp)
#if defined(COMPILER_RT_ARMHF_TARGET)
vcmp.f64 d0, d1
#else
- vmov d6, r0, r1 // load r0/r1 pair in double register
- vmov d7, r2, r3 // load r2/r3 pair in double register
+ VMOV_TO_DOUBLE(d6, r0, r1) // load r0/r1 pair in double register
+ VMOV_TO_DOUBLE(d7, r2, r3) // load r2/r3 pair in double register
vcmp.f64 d6, d7
#endif
vmrs apsr_nzcv, fpscr
diff --git a/compiler-rt/lib/builtins/arm/ltdf2vfp.S b/compiler-rt/lib/builtins/arm/ltdf2vfp.S
index a126aa9e0536ad..be5827075f993b 100644
--- a/compiler-rt/lib/builtins/arm/ltdf2vfp.S
+++ b/compiler-rt/lib/builtins/arm/ltdf2vfp.S
@@ -21,8 +21,8 @@ DEFINE_COMPILERRT_FUNCTION(__ltdf2vfp)
#if defined(COMPILER_RT_ARMHF_TARGET)
vcmp.f64 d0, d1
#else
- vmov d6, r0, r1 // load r0/r1 pair in double register
- vmov d7, r2, r3 // load r2/r3 pair in double register
+ VMOV_TO_DOUBLE(d6, r0, r1) // load r0/r1 pair in double register
+ VMOV_TO_DOUBLE(d7, r2, r3) // load r2/r3 pair in double register
vcmp.f64 d6, d7
#endif
vmrs apsr_nzcv, fpscr
diff --git a/compiler-rt/lib/builtins/arm/muldf3vfp.S b/compiler-rt/lib/builtins/arm/muldf3vfp.S
index 9adc937bcb3f09..97daf7363787bc 100644
--- a/compiler-rt/lib/builtins/arm/muldf3vfp.S
+++ b/compiler-rt/lib/builtins/arm/muldf3vfp.S
@@ -20,10 +20,10 @@ DEFINE_COMPILERRT_FUNCTION(__muldf3vfp)
#if defined(COMPILER_RT_ARMHF_TARGET)
vmul.f64 d0, d0, d1
#else
- vmov d6, r0, r1 // move first param from r0/r1 pair into d6
- vmov d7, r2, r3 // move second param from r2/r3 pair into d7
+ VMOV_TO_DOUBLE(d6, r0, r1) // move first param from r0/r1 pair into d6
+ VMOV_TO_DOUBLE(d7, r2, r3) // move second param from r2/r3 pair into d7
vmul.f64 d6, d6, d7
- vmov r0, r1, d6 // move result back to r0/r1 pair
+ VMOV_FROM_DOUBLE(r0, r1, d6) // move result back to r0/r1 pair
#endif
bx lr
END_COMPILERRT_FUNCTION(__muldf3vfp)
diff --git a/compiler-rt/lib/builtins/arm/nedf2vfp.S b/compiler-rt/lib/builtins/arm/nedf2vfp.S
index 32d35c41d46649..5edafc25988db9 100644
--- a/compiler-rt/lib/builtins/arm/nedf2vfp.S
+++ b/compiler-rt/lib/builtins/arm/nedf2vfp.S
@@ -20,8 +20,8 @@ DEFINE_COMPILERRT_FUNCTION(__nedf2vfp)
#if defined(COMPILER_RT_ARMHF_TARGET)
vcmp.f64 d0, d1
#else
- vmov d6, r0, r1 // load r0/r1 pair in double register
- vmov d7, r2, r3 // load r2/r3 pair in double register
+ VMOV_TO_DOUBLE(d6, r0, r1) // load r0/r1 pair in double register
+ VMOV_TO_DOUBLE(d7, r2, r3) // load r2/r3 pair in double register
vcmp.f64 d6, d7
#endif
vmrs apsr_nzcv, fpscr
diff --git a/compiler-rt/lib/builtins/arm/subdf3vfp.S b/compiler-rt/lib/builtins/arm/subdf3vfp.S
index f4eaf9af1afee8..2a7b1d38b577fe 100644
--- a/compiler-rt/lib/builtins/arm/subdf3vfp.S
+++ b/compiler-rt/lib/builtins/arm/subdf3vfp.S
@@ -20,10 +20,10 @@ DEFINE_COMPILERRT_FUNCTION(__subdf3vfp)
#if defined(COMPILER_RT_ARMHF_TARGET)
vsub.f64 d0, d0, d1
#else
- vmov d6, r0, r1 // move first param from r0/r1 pair into d6
- vmov d7, r2, r3 // move second param from r2/r3 pair into d7
+ VMOV_TO_DOUBLE(d6, r0, r1) // move first param from r0/r1 pair into d6
+ VMOV_TO_DOUBLE(d7, r2, r3) // move second param from r2/r3 pair into d7
vsub.f64 d6, d6, d7
- vmov r0, r1, d6 // move result back to r0/r1 pair
+ VMOV_FROM_DOUBLE(r0, r1, d6) // move result back to r0/r1 pair
#endif
bx lr
END_COMPILERRT_FUNCTION(__subdf3vfp)
diff --git a/compiler-rt/lib/builtins/arm/truncdfsf2vfp.S b/compiler-rt/lib/builtins/arm/truncdfsf2vfp.S
index e1c171262a78b6..541d025b4f922d 100644
--- a/compiler-rt/lib/builtins/arm/truncdfsf2vfp.S
+++ b/compiler-rt/lib/builtins/arm/truncdfsf2vfp.S
@@ -21,7 +21,7 @@ DEFINE_COMPILERRT_FUNCTION(__truncdfsf2vfp)
#if defined(COMPILER_RT_ARMHF_TARGET)
vcvt.f32.f64 s0, d0
#else
- vmov d7, r0, r1 // load double from r0/r1 pair
+ VMOV_TO_DOUBLE(d7, r0, r1) // load double from r0/r1 pair
vcvt.f32.f64 s15, d7 // convert double to single (trucate precision)
vmov r0, s15 // return result in r0
#endif
diff --git a/compiler-rt/lib/builtins/arm/unorddf2vfp.S b/compiler-rt/lib/builtins/arm/unorddf2vfp.S
index ea36a1cb55949e..3abb622c81ecba 100644
--- a/compiler-rt/lib/builtins/arm/unorddf2vfp.S
+++ b/compiler-rt/lib/builtins/arm/unorddf2vfp.S
@@ -21,8 +21,8 @@ DEFINE_COMPILERRT_FUNCTION(__unorddf2vfp)
#if defined(COMPILER_RT_ARMHF_TARGET)
vcmp.f64 d0, d1
#else
- vmov d6, r0, r1 // load r0/r1 pair in double register
- vmov d7, r2, r3 // load r2/r3 pair in double register
+ VMOV_TO_DOUBLE(d6, r0, r1) // load r0/r1 pair in double register
+ VMOV_TO_DOUBLE(d7, r2, r3) // load r2/r3 pair in double register
vcmp.f64 d6, d7
#endif
vmrs apsr_nzcv, fpscr
diff --git a/compiler-rt/lib/builtins/assembly.h b/compiler-rt/lib/builtins/assembly.h
index 8c42fc773483bc..34c71241524dc9 100644
--- a/compiler-rt/lib/builtins/assembly.h
+++ b/compiler-rt/lib/builtins/assembly.h
@@ -290,4 +290,16 @@
CFI_END
#endif
+#ifdef __arm__
+#include "int_endianness.h"
+
+#if _YUGA_BIG_ENDIAN
+#define VMOV_TO_DOUBLE(dst, src0, src1) vmov dst, src1, src0 SEPARATOR
+#define VMOV_FROM_DOUBLE(dst0, dst1, src) vmov dst1, dst0, src SEPARATOR
+#else
+#define VMOV_TO_DOUBLE(dst, src0, src1) vmov dst, src0, src1 SEPARATOR
+#define VMOV_FROM_DOUBLE(dst0, dst1, src) vmov dst0, dst1, src SEPARATOR
+#endif
+#endif
+
#endif // COMPILERRT_ASSEMBLY_H
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