[llvm] [GISel] Add more FP opcodes to CSE (PR #123624)
via llvm-commits
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Wed Jan 22 00:40:09 PST 2025
https://github.com/lialan updated https://github.com/llvm/llvm-project/pull/123624
>From 34e0d623353646f7cf16f11d8b1bb4f399b63fa2 Mon Sep 17 00:00:00 2001
From: Alan Li <me at alanli.org>
Date: Mon, 20 Jan 2025 22:05:08 +0800
Subject: [PATCH] First commit
---
llvm/lib/CodeGen/GlobalISel/CSEInfo.cpp | 11 ++
llvm/unittests/CodeGen/GlobalISel/CSETest.cpp | 115 ++++++++++++++++++
2 files changed, 126 insertions(+)
diff --git a/llvm/lib/CodeGen/GlobalISel/CSEInfo.cpp b/llvm/lib/CodeGen/GlobalISel/CSEInfo.cpp
index 0ac4a8a0aa910b..42b4ee9f108f02 100644
--- a/llvm/lib/CodeGen/GlobalISel/CSEInfo.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/CSEInfo.cpp
@@ -10,6 +10,7 @@
//===----------------------------------------------------------------------===//
#include "llvm/CodeGen/GlobalISel/CSEInfo.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
+#include "llvm/CodeGen/TargetOpcodes.h"
#include "llvm/InitializePasses.h"
#include "llvm/Support/Error.h"
@@ -65,6 +66,16 @@ bool CSEConfigFull::shouldCSEOpc(unsigned Opc) {
case TargetOpcode::G_BUILD_VECTOR:
case TargetOpcode::G_BUILD_VECTOR_TRUNC:
case TargetOpcode::G_SEXT_INREG:
+ case TargetOpcode::G_FADD:
+ case TargetOpcode::G_FSUB:
+ case TargetOpcode::G_FMUL:
+ case TargetOpcode::G_FDIV:
+ case TargetOpcode::G_FABS:
+ // TODO: support G_FNEG.
+ case TargetOpcode::G_FMAXNUM:
+ case TargetOpcode::G_FMINNUM:
+ case TargetOpcode::G_FMAXNUM_IEEE:
+ case TargetOpcode::G_FMINNUM_IEEE:
return true;
}
return false;
diff --git a/llvm/unittests/CodeGen/GlobalISel/CSETest.cpp b/llvm/unittests/CodeGen/GlobalISel/CSETest.cpp
index 822707a1f4ed32..92d5289eb16312 100644
--- a/llvm/unittests/CodeGen/GlobalISel/CSETest.cpp
+++ b/llvm/unittests/CodeGen/GlobalISel/CSETest.cpp
@@ -75,6 +75,121 @@ TEST_F(AArch64GISelMITest, TestCSE) {
auto MIBUnmerge2 = CSEB.buildUnmerge({s32, s32}, Copies[0]);
EXPECT_TRUE(&*MIBUnmerge == &*MIBUnmerge2);
+ // Check G_FADD
+ {
+ auto MIBFAdd = CSEB.buildFAdd(s32, Copies[0], Copies[1]);
+ auto MIBFAdd2 = CSEB.buildFAdd(s32, Copies[0], Copies[1]);
+ EXPECT_TRUE(&*MIBFAdd == &*MIBFAdd2);
+
+ MIBFAdd2.setFlag(MachineInstr::FmNsz);
+ EXPECT_FALSE(&*MIBFAdd == &*MIBFAdd2);
+
+ MIBFAdd2.clearFlag(MachineInstr::FmNsz);
+ EXPECT_TRUE(&*MIBFAdd == &*MIBFAdd2);
+ }
+
+ // Check G_FSUB
+ {
+ auto MIBFSub = CSEB.buildFSub(s32, Copies[0], Copies[1]);
+ auto MIBFSub2 = CSEB.buildFSub(s32, Copies[0], Copies[1]);
+ EXPECT_TRUE(&*MIBFSub == &*MIBFSub2);
+
+ MIBFSub2.setFlag(MachineInstr::FmNoNans);
+ EXPECT_FALSE(&*MIBFSub == &*MIBFSub2);
+
+ MIBFSub2.clearFlag(MachineInstr::FmNoNans);
+ EXPECT_TRUE(&*MIBFSub == &*MIBFSub2);
+ }
+
+ // Check G_FMUL
+ {
+ auto MIBFMul = CSEB.buildFMul(s32, Copies[0], Copies[1]);
+ auto MIBFMul2 = CSEB.buildFMul(s32, Copies[0], Copies[1]);
+ EXPECT_TRUE(&*MIBFMul == &*MIBFMul2);
+
+ MIBFMul2.setFlag(MachineInstr::FmNoNans);
+ EXPECT_FALSE(&*MIBFMul == &*MIBFMul2);
+
+ MIBFMul2.clearFlag(MachineInstr::FmNoNans);
+ EXPECT_TRUE(&*MIBFMul == &*MIBFMul2);
+ }
+
+ // Check G_FDIV
+ {
+ auto MIBFDiv = CSEB.buildFDiv(s32, Copies[0], Copies[1]);
+ auto MIBFDiv2 = CSEB.buildFDiv(s32, Copies[0], Copies[1]);
+ EXPECT_TRUE(&*MIBFDiv == &*MIBFDiv2);
+
+ MIBFDiv2.setFlag(MachineInstr::FmNoNans);
+ EXPECT_FALSE(&*MIBFDiv == &*MIBFDiv2);
+
+ MIBFDiv2.clearFlag(MachineInstr::FmNoNans);
+ EXPECT_TRUE(&*MIBFDiv == &*MIBFDiv2);
+ }
+
+ // Check G_FABS
+ {
+ auto MIBFAbs = CSEB.buildFAbs(s32, Copies[0]);
+ auto MIBFAbs2 = CSEB.buildFAbs(s32, Copies[0]);
+ EXPECT_TRUE(&*MIBFAbs == &*MIBFAbs2);
+
+ MIBFAbs2.setFlag(MachineInstr::FmNsz);
+ EXPECT_FALSE(&*MIBFAbs == &*MIBFAbs2);
+
+ MIBFAbs2.clearFlag(MachineInstr::FmNsz);
+ EXPECT_TRUE(&*MIBFAbs == &*MIBFAbs2);
+ }
+
+ // Check G_FMINNUM/F_MAXNUM:
+ {
+ auto MIBFMinNum = CSEB.buildFMinNum(s32, Copies[0], Copies[1]);
+ auto MIBFMinNum2 = CSEB.buildFMinNum(s32, Copies[0], Copies[1]);
+ EXPECT_TRUE(&*MIBFMinNum == &*MIBFMinNum2);
+
+ MIBFMinNum2.setFlag(MachineInstr::FmNsz);
+ EXPECT_FALSE(&*MIBFMinNum == &*MIBFMinNum2);
+
+ MIBFMinNum2.clearFlag(MachineInstr::FmNsz);
+ EXPECT_TRUE(&*MIBFMinNum == &*MIBFMinNum2);
+ }
+
+ {
+ auto MIBFMaxNum = CSEB.buildFMaxNum(s32, Copies[0], Copies[1]);
+ auto MIBFMaxNum2 = CSEB.buildFMaxNum(s32, Copies[0], Copies[1]);
+ EXPECT_TRUE(&*MIBFMaxNum == &*MIBFMaxNum2);
+
+ MIBFMaxNum2.setFlag(MachineInstr::FmNsz);
+ EXPECT_FALSE(&*MIBFMaxNum == &*MIBFMaxNum2);
+
+ MIBFMaxNum2.clearFlag(MachineInstr::FmNsz);
+ EXPECT_TRUE(&*MIBFMaxNum == &*MIBFMaxNum2);
+ }
+
+ // Check G_FMINNUM_IEEE/F_MAXNUM_IEEE:
+ {
+ auto MIBFMinNumIEEE = CSEB.buildFMinNumIEEE(s32, Copies[0], Copies[1]);
+ auto MIBFMinNumIEEE2 = CSEB.buildFMinNumIEEE(s32, Copies[0], Copies[1]);
+ EXPECT_TRUE(&*MIBFMinNumIEEE == &*MIBFMinNumIEEE2);
+
+ MIBFMinNumIEEE2.setFlag(MachineInstr::FmNsz);
+ EXPECT_FALSE(&*MIBFMinNumIEEE == &*MIBFMinNumIEEE2);
+
+ MIBFMinNumIEEE2.clearFlag(MachineInstr::FmNsz);
+ EXPECT_TRUE(&*MIBFMinNumIEEE == &*MIBFMinNumIEEE2);
+ }
+
+ {
+ auto MIBFMaxNumIEEE = CSEB.buildFMaxNumIEEE(s32, Copies[0], Copies[1]);
+ auto MIBFMaxNumIEEE2 = CSEB.buildFMaxNumIEEE(s32, Copies[0], Copies[1]);
+ EXPECT_TRUE(&*MIBFMaxNumIEEE == &*MIBFMaxNumIEEE2);
+
+ MIBFMaxNumIEEE2.setFlag(MachineInstr::FmNsz);
+ EXPECT_FALSE(&*MIBFMaxNumIEEE == &*MIBFMaxNumIEEE2);
+
+ MIBFMaxNumIEEE2.clearFlag(MachineInstr::FmNsz);
+ EXPECT_TRUE(&*MIBFMaxNumIEEE == &*MIBFMaxNumIEEE2);
+ }
+
// Check G_BUILD_VECTOR
Register Reg1 = MRI->createGenericVirtualRegister(s32);
Register Reg2 = MRI->createGenericVirtualRegister(s32);
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