[llvm] [GISel] matchFPSelect to use FMINMAX IEEE variant (PR #123774)

via llvm-commits llvm-commits at lists.llvm.org
Tue Jan 21 22:04:06 PST 2025


https://github.com/lialan updated https://github.com/llvm/llvm-project/pull/123774

>From 2f3b529a3ec446626a41a8851f627b19f47ac4dd Mon Sep 17 00:00:00 2001
From: Alan Li <me at alanli.org>
Date: Wed, 22 Jan 2025 14:03:16 +0800
Subject: [PATCH] [GISel] Relax the conditions when combining into FMIN/MAX

---
 llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp | 17 ++---------------
 1 file changed, 2 insertions(+), 15 deletions(-)

diff --git a/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp b/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
index b193d8bb0aa18a..8540affb9a154c 100644
--- a/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
@@ -6522,21 +6522,8 @@ bool CombinerHelper::matchFPSelectToMinMax(Register Dst, Register Cond,
     return false;
   // Decide what type of max/min this should be based off of the predicate.
   unsigned Opc = getFPMinMaxOpcForSelect(Pred, DstTy, ResWithKnownNaNInfo);
-  if (!Opc || !isLegal({Opc, {DstTy}}))
-    return false;
-  // Comparisons between signed zero and zero may have different results...
-  // unless we have fmaximum/fminimum. In that case, we know -0 < 0.
-  if (Opc != TargetOpcode::G_FMAXIMUM && Opc != TargetOpcode::G_FMINIMUM) {
-    // We don't know if a comparison between two 0s will give us a consistent
-    // result. Be conservative and only proceed if at least one side is
-    // non-zero.
-    auto KnownNonZeroSide = getFConstantVRegValWithLookThrough(CmpLHS, MRI);
-    if (!KnownNonZeroSide || !KnownNonZeroSide->Value.isNonZero()) {
-      KnownNonZeroSide = getFConstantVRegValWithLookThrough(CmpRHS, MRI);
-      if (!KnownNonZeroSide || !KnownNonZeroSide->Value.isNonZero())
-        return false;
-    }
-  }
+  if (!Opc || !isLegalOrBeforeLegalizer({Opc, {DstTy}}))
+    return false;
   MatchInfo = [=](MachineIRBuilder &B) {
     B.buildInstr(Opc, {Dst}, {CmpLHS, CmpRHS});
   };



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