[llvm] [MacroFusion][RISCV] Allocate same register for second instruction of fusible pair (PR #77461)
Pengcheng Wang via llvm-commits
llvm-commits at lists.llvm.org
Tue Jan 21 19:27:06 PST 2025
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@@ -114,6 +114,7 @@ class MachineInstr
// this instruction.
Unpredictable = 1 << 16, // Instruction with unpredictable condition.
NoConvergent = 1 << 17, // Call does not require convergence guarantees.
+ Fusible = 1 << 18, // Instruction is the second of a fusible pair.
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wangpc-pp wrote:
> What if the second fusion instruction is an instruction with 2 register sources instead of 1 register and an immediate. We'll need to know which operand to constrain.
Then we need to handle them case by case via opcode when adding hints.
https://github.com/llvm/llvm-project/pull/77461
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