[llvm] e700106 - [RISCV] Revise naming and style in matchSplatAsGather [nfc]

[Philip Reames via llvm-commits]

Author: Philip Reames
Date: 2025-01-21T13:09:25-08:00
New Revision: e7001061b73c97960a3b01537851b089e84b2a8e

URL: https://github.com/llvm/llvm-project/commit/e7001061b73c97960a3b01537851b089e84b2a8e
DIFF: https://github.com/llvm/llvm-project/commit/e7001061b73c97960a3b01537851b089e84b2a8e.diff

LOG: [RISCV] Revise naming and style in matchSplatAsGather [nfc]

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVISelLowering.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index fe6dd0ac6d5a4e..f7efd5f437fbb1 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -3517,12 +3517,12 @@ static SDValue matchSplatAsGather(SDValue SplatVal, MVT VT, const SDLoc &DL,
                                   const RISCVSubtarget &Subtarget) {
   if (SplatVal.getOpcode() != ISD::EXTRACT_VECTOR_ELT)
     return SDValue();
-  SDValue Vec = SplatVal.getOperand(0);
+  SDValue Src = SplatVal.getOperand(0);
   // Don't perform this optimization for i1 vectors, or if the element types are
   // 
diff erent
   // FIXME: Support i1 vectors, maybe by promoting to i8?
   MVT EltTy = VT.getVectorElementType();
-  MVT SrcVT = Vec.getSimpleValueType();
+  MVT SrcVT = Src.getSimpleValueType();
   if (EltTy == MVT::i1 || EltTy != SrcVT.getVectorElementType())
     return SDValue();
   SDValue Idx = SplatVal.getOperand(1);
@@ -3545,29 +3545,26 @@ static SDValue matchSplatAsGather(SDValue SplatVal, MVT VT, const SDLoc &DL,
   MVT SrcContainerVT = SrcVT;
   if (SrcVT.isFixedLengthVector()) {
     SrcContainerVT = getContainerForFixedLengthVector(DAG, SrcVT, Subtarget);
-    Vec = convertToScalableVector(SrcContainerVT, Vec, DAG, Subtarget);
+    Src = convertToScalableVector(SrcContainerVT, Src, DAG, Subtarget);
   }
 
   // Put Vec in a VT sized vector
   if (SrcContainerVT.getVectorMinNumElements() <
       ContainerVT.getVectorMinNumElements())
-    Vec = DAG.getNode(ISD::INSERT_SUBVECTOR, DL, ContainerVT,
-                      DAG.getUNDEF(ContainerVT), Vec,
+    Src = DAG.getNode(ISD::INSERT_SUBVECTOR, DL, ContainerVT,
+                      DAG.getUNDEF(ContainerVT), Src,
                       DAG.getVectorIdxConstant(0, DL));
   else
-    Vec = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, ContainerVT, Vec,
+    Src = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, ContainerVT, Src,
                       DAG.getVectorIdxConstant(0, DL));
 
   // We checked that Idx fits inside VT earlier
   auto [Mask, VL] = getDefaultVLOps(VT, ContainerVT, DL, DAG, Subtarget);
-
-  SDValue Gather = DAG.getNode(RISCVISD::VRGATHER_VX_VL, DL, ContainerVT, Vec,
+  SDValue Gather = DAG.getNode(RISCVISD::VRGATHER_VX_VL, DL, ContainerVT, Src,
                                Idx, DAG.getUNDEF(ContainerVT), Mask, VL);
-
-  if (!VT.isFixedLengthVector())
-    return Gather;
-
-  return convertFromScalableVector(VT, Gather, DAG, Subtarget);
+  if (VT.isFixedLengthVector())
+    Gather = convertFromScalableVector(VT, Gather, DAG, Subtarget);
+  return Gather;
 }
 
 /// Try and optimize BUILD_VECTORs with "dominant values" - these are values