[llvm] cdb4da3 - [NVPTX] Fix failing test and incorrect `mcpu` reading in reflect

[Joseph Huber via llvm-commits]

Author: Joseph Huber
Date: 2025-01-21T13:25:04-06:00
New Revision: cdb4da32dbc362dc03125e965bf9847604856b31

URL: https://github.com/llvm/llvm-project/commit/cdb4da32dbc362dc03125e965bf9847604856b31
DIFF: https://github.com/llvm/llvm-project/commit/cdb4da32dbc362dc03125e965bf9847604856b31.diff

LOG: [NVPTX] Fix failing test and incorrect `mcpu` reading in reflect

Summary:
Test uses nvptx in 32-bit mode and calling `mcpu` is broken and caused
asan failures.

Added: 
    

Modified: 
    llvm/lib/Target/NVPTX/NVVMReflect.cpp
    llvm/test/CodeGen/NVPTX/f32-lg2.ll
    llvm/test/CodeGen/NVPTX/nvvm-reflect-arch.ll
    llvm/test/CodeGen/NVPTX/nvvm-reflect-ocl.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/NVPTX/NVVMReflect.cpp b/llvm/lib/Target/NVPTX/NVVMReflect.cpp
index 0cd584c4074447..e0f9936eb6da2e 100644
--- a/llvm/lib/Target/NVPTX/NVVMReflect.cpp
+++ b/llvm/lib/Target/NVPTX/NVVMReflect.cpp
@@ -47,7 +47,9 @@ using namespace llvm;
 
 #define DEBUG_TYPE "nvptx-reflect"
 
-namespace llvm { void initializeNVVMReflectPass(PassRegistry &); }
+namespace llvm {
+void initializeNVVMReflectPass(PassRegistry &);
+}
 
 namespace {
 class NVVMReflect : public FunctionPass {
@@ -61,15 +63,15 @@ class NVVMReflect : public FunctionPass {
 
   bool runOnFunction(Function &) override;
 };
-}
+} // namespace
 
 FunctionPass *llvm::createNVVMReflectPass(unsigned int SmVersion) {
   return new NVVMReflect(SmVersion);
 }
 
 static cl::opt<bool>
-NVVMReflectEnabled("nvvm-reflect-enable", cl::init(true), cl::Hidden,
-                   cl::desc("NVVM reflection, enabled by default"));
+    NVVMReflectEnabled("nvvm-reflect-enable", cl::init(true), cl::Hidden,
+                       cl::desc("NVVM reflection, enabled by default"));
 
 char NVVMReflect::ID = 0;
 INITIALIZE_PASS(NVVMReflect, "nvvm-reflect",
@@ -189,8 +191,7 @@ static bool runNVVMReflect(Function &F, unsigned SmVersion) {
   // until we find a terminator that we can then remove.
   while (!ToSimplify.empty()) {
     Instruction *I = ToSimplify.pop_back_val();
-    if (Constant *C =
-            ConstantFoldInstruction(I, F.getDataLayout())) {
+    if (Constant *C = ConstantFoldInstruction(I, F.getDataLayout())) {
       for (User *U : I->users())
         if (Instruction *I = dyn_cast<Instruction>(U))
           ToSimplify.push_back(I);
@@ -220,13 +221,7 @@ bool NVVMReflect::runOnFunction(Function &F) {
   return runNVVMReflect(F, SmVersion);
 }
 
-NVVMReflectPass::NVVMReflectPass() {
-  // Get the CPU string from the command line if not provided.
-  std::string MCPU = codegen::getMCPU();
-  StringRef SM = MCPU;
-  if (!SM.consume_front("sm_") || SM.consumeInteger(10, SmVersion))
-    SmVersion = 0;
-}
+NVVMReflectPass::NVVMReflectPass() {}
 
 PreservedAnalyses NVVMReflectPass::run(Function &F,
                                        FunctionAnalysisManager &AM) {

diff  --git a/llvm/test/CodeGen/NVPTX/f32-lg2.ll b/llvm/test/CodeGen/NVPTX/f32-lg2.ll
index 13324c68609262..43c521978fed80 100644
--- a/llvm/test/CodeGen/NVPTX/f32-lg2.ll
+++ b/llvm/test/CodeGen/NVPTX/f32-lg2.ll
@@ -1,7 +1,7 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
 ; RUN: llc < %s -mcpu=sm_20 -mattr=+ptx32 | FileCheck --check-prefixes=CHECK %s
 ; RUN: %if ptxas %{ llc < %s -mcpu=sm_20 -mattr=+ptx32 | %ptxas-verify %}
-target triple = "nvptx-nvidia-cuda"
+target triple = "nvptx64-nvidia-cuda"
 
 declare float @llvm.nvvm.lg2.approx.f(float)
 declare float @llvm.nvvm.lg2.approx.ftz.f(float)

diff  --git a/llvm/test/CodeGen/NVPTX/nvvm-reflect-arch.ll b/llvm/test/CodeGen/NVPTX/nvvm-reflect-arch.ll
index 83cb3cde48de18..ac5875c6ab1043 100644
--- a/llvm/test/CodeGen/NVPTX/nvvm-reflect-arch.ll
+++ b/llvm/test/CodeGen/NVPTX/nvvm-reflect-arch.ll
@@ -1,9 +1,9 @@
 ; Libdevice in recent CUDA versions relies on __CUDA_ARCH reflecting GPU type.
 ; Verify that __nvvm_reflect() is replaced with an appropriate value.
 ;
-; RUN: opt %s -S -passes='nvvm-reflect' -mtriple=nvptx64 -mcpu=sm_20 \
+; RUN: opt %s -S -passes='default<O2>' -mtriple=nvptx64 -mcpu=sm_20 \
 ; RUN:   | FileCheck %s --check-prefixes=COMMON,SM20
-; RUN: opt %s -S -passes='nvvm-reflect' -mtriple=nvptx64 -mcpu=sm_35 \
+; RUN: opt %s -S -passes='default<O2>' -mtriple=nvptx64 -mcpu=sm_35 \
 ; RUN:   | FileCheck %s --check-prefixes=COMMON,SM35
 
 @"$str" = private addrspace(1) constant [12 x i8] c"__CUDA_ARCH\00"

diff  --git a/llvm/test/CodeGen/NVPTX/nvvm-reflect-ocl.ll b/llvm/test/CodeGen/NVPTX/nvvm-reflect-ocl.ll
index bf8d6e2cca3071..9d383218dce86a 100644
--- a/llvm/test/CodeGen/NVPTX/nvvm-reflect-ocl.ll
+++ b/llvm/test/CodeGen/NVPTX/nvvm-reflect-ocl.ll
@@ -1,8 +1,8 @@
 ; Verify that __nvvm_reflect_ocl() is replaced with an appropriate value
 ;
-; RUN: opt %s -S -passes='nvvm-reflect' -mtriple=nvptx64 -mcpu=sm_20 \
+; RUN: opt %s -S -passes='default<O2>' -mtriple=nvptx64 -mcpu=sm_20 \
 ; RUN:   | FileCheck %s --check-prefixes=COMMON,SM20
-; RUN: opt %s -S -passes='nvvm-reflect' -mtriple=nvptx64 -mcpu=sm_35 \
+; RUN: opt %s -S -passes='default<O2>' -mtriple=nvptx64 -mcpu=sm_35 \
 ; RUN:   | FileCheck %s --check-prefixes=COMMON,SM35
 
 @"$str" = private addrspace(4) constant [12 x i8] c"__CUDA_ARCH\00"