[llvm] [AMDGPU] selecting v_sat_pk instruction, version 2 (PR #123297)

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Tue Jan 21 05:20:39 PST 2025


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@@ -817,11 +817,33 @@ SITargetLowering::SITargetLowering(const TargetMachine &TM,
                          Custom);
     }
 
-    // Avoid true 16 instruction
-    if (!Subtarget->hasTrue16BitInsts() || !Subtarget->useRealTrue16Insts()) {
-      // MVT::v2i16 for src type check in foldToSaturated
-      // MVT::v2i8 for dst type check in CustomLowerNode
-      setOperationAction(ISD::TRUNCATE_SSAT_U, {MVT::v2i16, MVT::v2i8}, Custom);
+    // True 16 instruction is current not supported
+    // FIXME: Add support for true 16 when supported
+    if (!(Subtarget->hasTrue16BitInsts() && Subtarget->useRealTrue16Insts())) {
+      // MVT::vNi16 for src type check in foldToSaturated
+      // MVT::vNi8 for dst type check in CustomLowerNode
+      setOperationAction(ISD::TRUNCATE_SSAT_U,
+                         {
+                             MVT::v2i16,
----------------
arsenm wrote:

For step 1 I wouldn't do this. The fix for this kind of issue is in the combiner forming them, not the legalizer rules for a specific operation 

https://github.com/llvm/llvm-project/pull/123297


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