[llvm] [AMDGPU][NewPM] Port AMDGPUMarkLastScratchLoad to NPM (PR #123729)
Akshat Oke via llvm-commits
llvm-commits at lists.llvm.org
Tue Jan 21 02:57:08 PST 2025
https://github.com/optimisan created https://github.com/llvm/llvm-project/pull/123729
None
>From 6794b4cc91170aa45a7d8fe2371677a0eed820be Mon Sep 17 00:00:00 2001
From: Akshat Oke <Akshat.Oke at amd.com>
Date: Tue, 21 Jan 2025 10:45:22 +0000
Subject: [PATCH] [AMDGPU][NewPM] Port AMDGPUMarkLastScratchLoad to NPM
---
llvm/lib/Target/AMDGPU/AMDGPU.h | 4 +-
.../AMDGPU/AMDGPUMarkLastScratchLoad.cpp | 48 ++++++++++++++-----
.../Target/AMDGPU/AMDGPUMarkLastScratchLoad.h | 23 +++++++++
llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def | 1 +
.../lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 5 +-
...rval-bug-in-rename-independent-subregs.mir | 1 +
.../AMDGPU/vgpr-mark-last-scratch-load.mir | 1 +
7 files changed, 68 insertions(+), 15 deletions(-)
create mode 100644 llvm/lib/Target/AMDGPU/AMDGPUMarkLastScratchLoad.h
diff --git a/llvm/lib/Target/AMDGPU/AMDGPU.h b/llvm/lib/Target/AMDGPU/AMDGPU.h
index 12a8c155d3de2e..89117e9e81d8bf 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPU.h
+++ b/llvm/lib/Target/AMDGPU/AMDGPU.h
@@ -195,8 +195,8 @@ extern char &AMDGPURegBankSelectID;
void initializeAMDGPURegBankLegalizePass(PassRegistry &);
extern char &AMDGPURegBankLegalizeID;
-void initializeAMDGPUMarkLastScratchLoadPass(PassRegistry &);
-extern char &AMDGPUMarkLastScratchLoadID;
+void initializeAMDGPUMarkLastScratchLoadLegacyPass(PassRegistry &);
+extern char &AMDGPUMarkLastScratchLoadLegacyID;
void initializeSILowerSGPRSpillsLegacyPass(PassRegistry &);
extern char &SILowerSGPRSpillsLegacyID;
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUMarkLastScratchLoad.cpp b/llvm/lib/Target/AMDGPU/AMDGPUMarkLastScratchLoad.cpp
index 8eef0c58921090..5d8de216ad4df4 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUMarkLastScratchLoad.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUMarkLastScratchLoad.cpp
@@ -13,6 +13,7 @@
//
//===----------------------------------------------------------------------===//
+#include "AMDGPUMarkLastScratchLoad.h"
#include "AMDGPU.h"
#include "GCNSubtarget.h"
#include "llvm/CodeGen/LiveIntervals.h"
@@ -25,18 +26,26 @@ using namespace llvm;
namespace {
-class AMDGPUMarkLastScratchLoad : public MachineFunctionPass {
+class AMDGPUMarkLastScratchLoad {
private:
LiveStacks *LS = nullptr;
LiveIntervals *LIS = nullptr;
SlotIndexes *SI = nullptr;
const SIInstrInfo *SII = nullptr;
+public:
+ AMDGPUMarkLastScratchLoad(LiveStacks *LS, LiveIntervals *LIS, SlotIndexes *SI)
+ : LS(LS), LIS(LIS), SI(SI) {}
+ bool run(MachineFunction &MF);
+};
+
+class AMDGPUMarkLastScratchLoadLegacy : public MachineFunctionPass {
public:
static char ID;
- AMDGPUMarkLastScratchLoad() : MachineFunctionPass(ID) {
- initializeAMDGPUMarkLastScratchLoadPass(*PassRegistry::getPassRegistry());
+ AMDGPUMarkLastScratchLoadLegacy() : MachineFunctionPass(ID) {
+ initializeAMDGPUMarkLastScratchLoadLegacyPass(
+ *PassRegistry::getPassRegistry());
}
bool runOnMachineFunction(MachineFunction &MF) override;
@@ -56,17 +65,33 @@ class AMDGPUMarkLastScratchLoad : public MachineFunctionPass {
} // end anonymous namespace
-bool AMDGPUMarkLastScratchLoad::runOnMachineFunction(MachineFunction &MF) {
+bool AMDGPUMarkLastScratchLoadLegacy::runOnMachineFunction(
+ MachineFunction &MF) {
if (skipFunction(MF.getFunction()))
return false;
+ auto *LS = &getAnalysis<LiveStacksWrapperLegacy>().getLS();
+ auto *LIS = &getAnalysis<LiveIntervalsWrapperPass>().getLIS();
+ auto *SI = &getAnalysis<SlotIndexesWrapperPass>().getSI();
+
+ return AMDGPUMarkLastScratchLoad(LS, LIS, SI).run(MF);
+}
+
+PreservedAnalyses
+AMDGPUMarkLastScratchLoadPass::run(MachineFunction &MF,
+ MachineFunctionAnalysisManager &MFAM) {
+ auto *LS = &MFAM.getResult<LiveStacksAnalysis>(MF);
+ auto *LIS = &MFAM.getResult<LiveIntervalsAnalysis>(MF);
+ auto *SI = &MFAM.getResult<SlotIndexesAnalysis>(MF);
+
+ AMDGPUMarkLastScratchLoad(LS, LIS, SI).run(MF);
+ return PreservedAnalyses::all();
+}
+bool AMDGPUMarkLastScratchLoad::run(MachineFunction &MF) {
const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>();
if (ST.getGeneration() < AMDGPUSubtarget::GFX12)
return false;
- LS = &getAnalysis<LiveStacksWrapperLegacy>().getLS();
- LIS = &getAnalysis<LiveIntervalsWrapperPass>().getLIS();
- SI = &getAnalysis<SlotIndexesWrapperPass>().getSI();
SII = ST.getInstrInfo();
SlotIndexes &Slots = *LIS->getSlotIndexes();
@@ -130,13 +155,14 @@ bool AMDGPUMarkLastScratchLoad::runOnMachineFunction(MachineFunction &MF) {
return Changed;
}
-char AMDGPUMarkLastScratchLoad::ID = 0;
+char AMDGPUMarkLastScratchLoadLegacy::ID = 0;
-char &llvm::AMDGPUMarkLastScratchLoadID = AMDGPUMarkLastScratchLoad::ID;
+char &llvm::AMDGPUMarkLastScratchLoadLegacyID =
+ AMDGPUMarkLastScratchLoadLegacy::ID;
-INITIALIZE_PASS_BEGIN(AMDGPUMarkLastScratchLoad, DEBUG_TYPE,
+INITIALIZE_PASS_BEGIN(AMDGPUMarkLastScratchLoadLegacy, DEBUG_TYPE,
"AMDGPU Mark last scratch load", false, false)
INITIALIZE_PASS_DEPENDENCY(SlotIndexesWrapperPass)
INITIALIZE_PASS_DEPENDENCY(LiveStacksWrapperLegacy)
-INITIALIZE_PASS_END(AMDGPUMarkLastScratchLoad, DEBUG_TYPE,
+INITIALIZE_PASS_END(AMDGPUMarkLastScratchLoadLegacy, DEBUG_TYPE,
"AMDGPU Mark last scratch load", false, false)
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUMarkLastScratchLoad.h b/llvm/lib/Target/AMDGPU/AMDGPUMarkLastScratchLoad.h
new file mode 100644
index 00000000000000..60becd68a2e802
--- /dev/null
+++ b/llvm/lib/Target/AMDGPU/AMDGPUMarkLastScratchLoad.h
@@ -0,0 +1,23 @@
+//===- AMDGPUMarkLastScratchLoad.h ------------------------------*- C++- *-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPUMARKLASTSCRATCHLOAD_H
+#define LLVM_LIB_TARGET_AMDGPU_AMDGPUMARKLASTSCRATCHLOAD_H
+
+#include "llvm/CodeGen/MachinePassManager.h"
+
+namespace llvm {
+class AMDGPUMarkLastScratchLoadPass
+ : public PassInfoMixin<AMDGPUMarkLastScratchLoadPass> {
+public:
+ PreservedAnalyses run(MachineFunction &MF,
+ MachineFunctionAnalysisManager &MFAM);
+};
+} // namespace llvm
+
+#endif // LLVM_LIB_TARGET_AMDGPU_AMDGPUMARKLASTSCRATCHLOAD_H
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def b/llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
index ce3aeb93ec4caa..c09ac31b91d8c4 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
+++ b/llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
@@ -97,6 +97,7 @@ FUNCTION_PASS_WITH_PARAMS(
#define MACHINE_FUNCTION_PASS(NAME, CREATE_PASS)
#endif
MACHINE_FUNCTION_PASS("amdgpu-isel", AMDGPUISelDAGToDAGPass(*this))
+MACHINE_FUNCTION_PASS("amdgpu-mark-last-scratch-load", AMDGPUMarkLastScratchLoadPass())
MACHINE_FUNCTION_PASS("si-fix-sgpr-copies", SIFixSGPRCopiesPass())
MACHINE_FUNCTION_PASS("si-i1-copies", SILowerI1CopiesPass())
MACHINE_FUNCTION_PASS("si-fix-vgpr-copies", SIFixVGPRCopiesPass())
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
index 3fe17457cb3606..7f1b2a0fd3cfb8 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
@@ -22,6 +22,7 @@
#include "AMDGPUIGroupLP.h"
#include "AMDGPUISelDAGToDAG.h"
#include "AMDGPUMacroFusion.h"
+#include "AMDGPUMarkLastScratchLoad.h"
#include "AMDGPUOpenCLEnqueuedBlockLowering.h"
#include "AMDGPUPerfHintAnalysis.h"
#include "AMDGPURemoveIncompatibleFunctions.h"
@@ -484,7 +485,7 @@ extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeAMDGPUTarget() {
initializeAMDGPURegBankSelectPass(*PR);
initializeAMDGPURegBankLegalizePass(*PR);
initializeSILowerWWMCopiesPass(*PR);
- initializeAMDGPUMarkLastScratchLoadPass(*PR);
+ initializeAMDGPUMarkLastScratchLoadLegacyPass(*PR);
initializeSILowerSGPRSpillsLegacyPass(*PR);
initializeSIFixSGPRCopiesLegacyPass(*PR);
initializeSIFixVGPRCopiesLegacyPass(*PR);
@@ -1628,7 +1629,7 @@ bool GCNPassConfig::addRegAssignAndRewriteOptimized() {
addPreRewrite();
addPass(&VirtRegRewriterID);
- addPass(&AMDGPUMarkLastScratchLoadID);
+ addPass(&AMDGPUMarkLastScratchLoadLegacyID);
return true;
}
diff --git a/llvm/test/CodeGen/AMDGPU/live-interval-bug-in-rename-independent-subregs.mir b/llvm/test/CodeGen/AMDGPU/live-interval-bug-in-rename-independent-subregs.mir
index 98b1b69101e51d..cbde6e88e12ef9 100644
--- a/llvm/test/CodeGen/AMDGPU/live-interval-bug-in-rename-independent-subregs.mir
+++ b/llvm/test/CodeGen/AMDGPU/live-interval-bug-in-rename-independent-subregs.mir
@@ -1,6 +1,7 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 4
# RUN: llc -mtriple=amdgcn--amdpal -mcpu=gfx1010 -start-before=rename-independent-subregs -mattr=+wavefrontsize64 -stop-before=amdgpu-mark-last-scratch-load %s -o - | FileCheck -check-prefix=REG_ALLOC %s
# RUN: llc -mtriple=amdgcn--amdpal -mcpu=gfx1010 -start-before=rename-independent-subregs -mattr=+wavefrontsize64 -stop-after=machine-cp %s -o - | FileCheck -check-prefix=DEAD_INST_DEL %s
+# TODO: add test for NPM once RA is ported
---
name: _amdgpu_cs_main
diff --git a/llvm/test/CodeGen/AMDGPU/vgpr-mark-last-scratch-load.mir b/llvm/test/CodeGen/AMDGPU/vgpr-mark-last-scratch-load.mir
index cee45216968df6..f17d77015e71c2 100644
--- a/llvm/test/CodeGen/AMDGPU/vgpr-mark-last-scratch-load.mir
+++ b/llvm/test/CodeGen/AMDGPU/vgpr-mark-last-scratch-load.mir
@@ -1,5 +1,6 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 3
# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1200 -o - %s -run-pass=greedy -run-pass=amdgpu-mark-last-scratch-load -verify-machineinstrs | FileCheck -check-prefix=CHECK %s
+# TODO: Add test for NPM once Greedy is ported.
--- |
define amdgpu_cs void @test_spill_12x32() "amdgpu-num-vgpr"="12" {
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