[llvm] [AMDGPU][NewPM] Port AMDGPUReserveWWMRegs to NPM (PR #123722)
Akshat Oke via llvm-commits
llvm-commits at lists.llvm.org
Tue Jan 21 01:51:43 PST 2025
https://github.com/optimisan created https://github.com/llvm/llvm-project/pull/123722
None
>From d1ac5e22f5f72e48ddd5bc883f141b73eec852c8 Mon Sep 17 00:00:00 2001
From: Akshat Oke <Akshat.Oke at amd.com>
Date: Tue, 21 Jan 2025 09:36:14 +0000
Subject: [PATCH] [AMDGPU][NewPM] Port AMDGPUReserveWWMRegs to NPM
---
llvm/lib/Target/AMDGPU/AMDGPU.h | 4 +--
llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def | 1 +
.../Target/AMDGPU/AMDGPUReserveWWMRegs.cpp | 31 ++++++++++++++-----
llvm/lib/Target/AMDGPU/AMDGPUReserveWWMRegs.h | 23 ++++++++++++++
.../lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 7 +++--
5 files changed, 54 insertions(+), 12 deletions(-)
create mode 100644 llvm/lib/Target/AMDGPU/AMDGPUReserveWWMRegs.h
diff --git a/llvm/lib/Target/AMDGPU/AMDGPU.h b/llvm/lib/Target/AMDGPU/AMDGPU.h
index 5d9a830f041a74..ab2ab11bc43f82 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPU.h
+++ b/llvm/lib/Target/AMDGPU/AMDGPU.h
@@ -156,8 +156,8 @@ struct AMDGPULowerBufferFatPointersPass
const TargetMachine &TM;
};
-void initializeAMDGPUReserveWWMRegsPass(PassRegistry &);
-extern char &AMDGPUReserveWWMRegsID;
+void initializeAMDGPUReserveWWMRegsLegacyPass(PassRegistry &);
+extern char &AMDGPUReserveWWMRegsLegacyID;
void initializeAMDGPURewriteOutArgumentsPass(PassRegistry &);
extern char &AMDGPURewriteOutArgumentsID;
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def b/llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
index 09a39d23d801b9..1c21b6fad8a049 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
+++ b/llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
@@ -97,6 +97,7 @@ FUNCTION_PASS_WITH_PARAMS(
#define MACHINE_FUNCTION_PASS(NAME, CREATE_PASS)
#endif
MACHINE_FUNCTION_PASS("amdgpu-isel", AMDGPUISelDAGToDAGPass(*this))
+MACHINE_FUNCTION_PASS("amdgpu-reserve-wwm-regs", AMDGPUReserveWWMRegsPass())
MACHINE_FUNCTION_PASS("si-fix-sgpr-copies", SIFixSGPRCopiesPass())
MACHINE_FUNCTION_PASS("si-i1-copies", SILowerI1CopiesPass())
MACHINE_FUNCTION_PASS("si-fold-operands", SIFoldOperandsPass());
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUReserveWWMRegs.cpp b/llvm/lib/Target/AMDGPU/AMDGPUReserveWWMRegs.cpp
index e0348e192977b2..1adaa599590709 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUReserveWWMRegs.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUReserveWWMRegs.cpp
@@ -14,6 +14,7 @@
//
//===----------------------------------------------------------------------===//
+#include "AMDGPUReserveWWMRegs.h"
#include "AMDGPU.h"
#include "MCTargetDesc/AMDGPUMCTargetDesc.h"
#include "SIMachineFunctionInfo.h"
@@ -27,12 +28,12 @@ using namespace llvm;
namespace {
-class AMDGPUReserveWWMRegs : public MachineFunctionPass {
+class AMDGPUReserveWWMRegsLegacy : public MachineFunctionPass {
public:
static char ID;
- AMDGPUReserveWWMRegs() : MachineFunctionPass(ID) {
- initializeAMDGPUReserveWWMRegsPass(*PassRegistry::getPassRegistry());
+ AMDGPUReserveWWMRegsLegacy() : MachineFunctionPass(ID) {
+ initializeAMDGPUReserveWWMRegsLegacyPass(*PassRegistry::getPassRegistry());
}
bool runOnMachineFunction(MachineFunction &MF) override;
@@ -47,16 +48,32 @@ class AMDGPUReserveWWMRegs : public MachineFunctionPass {
}
};
+class AMDGPUReserveWWMRegs {
+public:
+ bool run(MachineFunction &MF);
+};
+
} // End anonymous namespace.
-INITIALIZE_PASS(AMDGPUReserveWWMRegs, DEBUG_TYPE,
+INITIALIZE_PASS(AMDGPUReserveWWMRegsLegacy, DEBUG_TYPE,
"AMDGPU Reserve WWM Registers", false, false)
-char AMDGPUReserveWWMRegs::ID = 0;
+char AMDGPUReserveWWMRegsLegacy::ID = 0;
+
+char &llvm::AMDGPUReserveWWMRegsLegacyID = AMDGPUReserveWWMRegsLegacy::ID;
-char &llvm::AMDGPUReserveWWMRegsID = AMDGPUReserveWWMRegs::ID;
+bool AMDGPUReserveWWMRegsLegacy::runOnMachineFunction(MachineFunction &MF) {
+ return AMDGPUReserveWWMRegs().run(MF);
+}
+
+PreservedAnalyses
+AMDGPUReserveWWMRegsPass::run(MachineFunction &MF,
+ MachineFunctionAnalysisManager &) {
+ AMDGPUReserveWWMRegs().run(MF);
+ return PreservedAnalyses::all();
+}
-bool AMDGPUReserveWWMRegs::runOnMachineFunction(MachineFunction &MF) {
+bool AMDGPUReserveWWMRegs::run(MachineFunction &MF) {
SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>();
bool Changed = false;
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUReserveWWMRegs.h b/llvm/lib/Target/AMDGPU/AMDGPUReserveWWMRegs.h
new file mode 100644
index 00000000000000..f1742c0f265161
--- /dev/null
+++ b/llvm/lib/Target/AMDGPU/AMDGPUReserveWWMRegs.h
@@ -0,0 +1,23 @@
+//===- AMDGPUReserveWWMRegs.h -----------------------------------*- C++- *-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPURESERVEWWMREGS_H
+#define LLVM_LIB_TARGET_AMDGPU_AMDGPURESERVEWWMREGS_H
+
+#include "llvm/CodeGen/MachinePassManager.h"
+
+namespace llvm {
+class AMDGPUReserveWWMRegsPass
+ : public PassInfoMixin<AMDGPUReserveWWMRegsPass> {
+public:
+ PreservedAnalyses run(MachineFunction &MF,
+ MachineFunctionAnalysisManager &MFAM);
+};
+} // namespace llvm
+
+#endif // LLVM_LIB_TARGET_AMDGPU_AMDGPURESERVEWWMREGS_H
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
index 53ec80b8f72049..48ce9c249edd1f 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
@@ -25,6 +25,7 @@
#include "AMDGPUOpenCLEnqueuedBlockLowering.h"
#include "AMDGPUPerfHintAnalysis.h"
#include "AMDGPURemoveIncompatibleFunctions.h"
+#include "AMDGPUReserveWWMRegs.h"
#include "AMDGPUSplitModule.h"
#include "AMDGPUTargetObjectFile.h"
#include "AMDGPUTargetTransformInfo.h"
@@ -515,7 +516,7 @@ extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeAMDGPUTarget() {
initializeAMDGPURemoveIncompatibleFunctionsLegacyPass(*PR);
initializeAMDGPULowerModuleLDSLegacyPass(*PR);
initializeAMDGPULowerBufferFatPointersPass(*PR);
- initializeAMDGPUReserveWWMRegsPass(*PR);
+ initializeAMDGPUReserveWWMRegsLegacyPass(*PR);
initializeAMDGPURewriteOutArgumentsPass(*PR);
initializeAMDGPURewriteUndefForPHILegacyPass(*PR);
initializeAMDGPUUnifyMetadataPass(*PR);
@@ -1582,7 +1583,7 @@ bool GCNPassConfig::addRegAssignAndRewriteFast() {
addPass(createWWMRegAllocPass(false));
addPass(&SILowerWWMCopiesID);
- addPass(&AMDGPUReserveWWMRegsID);
+ addPass(&AMDGPUReserveWWMRegsLegacyID);
// For allocating per-thread VGPRs.
addPass(createVGPRAllocPass(false));
@@ -1619,7 +1620,7 @@ bool GCNPassConfig::addRegAssignAndRewriteOptimized() {
addPass(createWWMRegAllocPass(true));
addPass(&SILowerWWMCopiesID);
addPass(createVirtRegRewriter(false));
- addPass(&AMDGPUReserveWWMRegsID);
+ addPass(&AMDGPUReserveWWMRegsLegacyID);
// For allocating per-thread VGPRs.
addPass(createVGPRAllocPass(true));
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