[llvm] [BOLT][AArch64] Introduce SPE mode in BasicAggregation (PR #120741)

[Paschalis Mpeis via llvm-commits]

paschalis-mpeis wrote:

> is there a way to configure SPE to only collect taken branches?

What I believe you are asking here is to configure SPE to get us a pair of $\bf\textsf{\color{blue}SRC}$ -> $\textsf{\color{blue}TGT}$, where SRC and TGT are two taken branches. In other words, make SPE act as an LBR-like buffer with a branch stack depth of 1.

I don't think that is possible. SPE does some periodic capture of events packets, in our case branches.
Please consider the example below:
```
.  000007c0:  PC 0xAAA el2 ns=1
.  000007c9:  PAD
.  000007d3:  B COND
.  000007d5:  EV RETIRED NOT-TAKEN MISPRED
.  000007da:  LAT 12 ISSUE
.  000007dd:  LAT 13 TOT
.  000007e0:  TGT 0xBBB el2 ns=1
.  000007e9:  PAD
.  000007f7:  TS 12345
```

- `PC`: is the instruction that was captured, in our case the source branch
	- we can know whether the branch at `PC` was taken or not, and if it was a prediction miss/hit
	- this aligns with the [blogpost](https://community.arm.com/arm-community-blogs/b/tools-software-ides-blog/posts/introduction-to-statistical-profiling-support-in-streamline) you've provided
- `TGT`: is the target address of the landing block, ie where execution will continue next
	- actually this is not a branch
	- SPE has no information which the next branch will be, and whether it will be taken or not
	- we cannot configure SPE to do this
- `PBT`: optional HW feature pointing to the previous block  ([FEAT_SPE_PBT](https://developer.arm.com/documentation/109697/2024_12/Feature-descriptions/The-Armv8-7-architecture-extension))
	- it is a statistical profiling of the Previous Branch Target
	- TMU there is no known HW implementation of this optional feature.

I could re-word some points in the PR/patch to make the above more clear.

(@mikewilliams-arm feel free to correct me if I missed anything)




https://github.com/llvm/llvm-project/pull/120741