[llvm] [IR] Replace of PointerType::get(Type) with opaque version (NFC) (PR #123617)
via llvm-commits
llvm-commits at lists.llvm.org
Mon Jan 20 06:15:46 PST 2025
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-llvm-ir
@llvm/pr-subscribers-tools-llvm-exegesis
@llvm/pr-subscribers-backend-aarch64
Author: Mats Jun Larsen (junlarsen)
<details>
<summary>Changes</summary>
In accordance with https://github.com/llvm/llvm-project/issues/123569
In order to keep the patch at reasonable size, this PR only covers for the llvm subproject, unittests excluded
---
Patch is 34.15 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/123617.diff
38 Files Affected:
- (modified) llvm/include/llvm/CodeGen/BasicTTIImpl.h (+5-6)
- (modified) llvm/include/llvm/IR/GlobalValue.h (+2-1)
- (modified) llvm/lib/Bitcode/Reader/BitcodeReader.cpp (+1-1)
- (modified) llvm/lib/CodeGen/GlobalISel/CallLowering.cpp (+2-2)
- (modified) llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp (+2-2)
- (modified) llvm/lib/ExecutionEngine/Orc/IndirectionUtils.cpp (+2-2)
- (modified) llvm/lib/FuzzMutate/RandomIRBuilder.cpp (+1-1)
- (modified) llvm/lib/IR/Core.cpp (+2-1)
- (modified) llvm/lib/IR/Instructions.cpp (+1-1)
- (modified) llvm/lib/IR/Type.cpp (+1-1)
- (modified) llvm/lib/Linker/IRMover.cpp (+1-1)
- (modified) llvm/lib/SandboxIR/Type.cpp (+1-1)
- (modified) llvm/lib/Target/AArch64/AArch64Arm64ECCallLowering.cpp (+2-2)
- (modified) llvm/lib/Target/AMDGPU/AMDGPUAsanInstrumentation.cpp (+1-1)
- (modified) llvm/lib/Target/AMDGPU/AMDGPUPrintfRuntimeBinding.cpp (+3-3)
- (modified) llvm/lib/Target/AMDGPU/R600ISelLowering.cpp (+2-2)
- (modified) llvm/lib/Target/AMDGPU/SIISelLowering.cpp (+2-1)
- (modified) llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp (+1-1)
- (modified) llvm/lib/Target/NVPTX/NVPTXGenericToNVVM.cpp (+1-2)
- (modified) llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp (+4-4)
- (modified) llvm/lib/Target/NVPTX/NVPTXLowerAlloca.cpp (+4-2)
- (modified) llvm/lib/Target/NVPTX/NVPTXLowerArgs.cpp (+2-2)
- (modified) llvm/lib/Target/X86/X86ISelLowering.cpp (+1-1)
- (modified) llvm/lib/Target/X86/X86InstCombineIntrinsic.cpp (+2-2)
- (modified) llvm/lib/Transforms/CFGuard/CFGuard.cpp (+1-1)
- (modified) llvm/lib/Transforms/IPO/AttributorAttributes.cpp (+1-1)
- (modified) llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp (+3-2)
- (modified) llvm/lib/Transforms/Instrumentation/DataFlowSanitizer.cpp (+6-8)
- (modified) llvm/lib/Transforms/Instrumentation/GCOVProfiling.cpp (+1-1)
- (modified) llvm/lib/Transforms/Instrumentation/MemProfiler.cpp (+1-1)
- (modified) llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp (+2-2)
- (modified) llvm/lib/Transforms/Instrumentation/TypeSanitizer.cpp (+1-1)
- (modified) llvm/lib/Transforms/Utils/CodeExtractor.cpp (+2-2)
- (modified) llvm/lib/Transforms/Utils/LowerGlobalDtors.cpp (+1-1)
- (modified) llvm/lib/Transforms/Utils/ModuleUtils.cpp (+4-4)
- (modified) llvm/tools/llvm-exegesis/lib/Assembler.cpp (+2-2)
- (modified) llvm/tools/llvm-reduce/deltas/ReduceOpcodes.cpp (+1-4)
- (modified) llvm/tools/llvm-stress/llvm-stress.cpp (+2-2)
``````````diff
diff --git a/llvm/include/llvm/CodeGen/BasicTTIImpl.h b/llvm/include/llvm/CodeGen/BasicTTIImpl.h
index c9f142d64ae9e4..46bb84b4fec4f1 100644
--- a/llvm/include/llvm/CodeGen/BasicTTIImpl.h
+++ b/llvm/include/llvm/CodeGen/BasicTTIImpl.h
@@ -223,12 +223,11 @@ class BasicTTIImplBase : public TargetTransformInfoImplCRTPBase<T> {
//
// First, compute the cost of the individual memory operations.
InstructionCost AddrExtractCost =
- IsGatherScatter
- ? getScalarizationOverhead(
- FixedVectorType::get(
- PointerType::get(VT->getElementType(), 0), VF),
- /*Insert=*/false, /*Extract=*/true, CostKind)
- : 0;
+ IsGatherScatter ? getScalarizationOverhead(
+ FixedVectorType::get(
+ PointerType::get(VT->getContext(), 0), VF),
+ /*Insert=*/false, /*Extract=*/true, CostKind)
+ : 0;
// The cost of the scalar loads/stores.
InstructionCost MemoryOpCost =
diff --git a/llvm/include/llvm/IR/GlobalValue.h b/llvm/include/llvm/IR/GlobalValue.h
index d9104d7af5f972..2176e2c2cfbfcb 100644
--- a/llvm/include/llvm/IR/GlobalValue.h
+++ b/llvm/include/llvm/IR/GlobalValue.h
@@ -79,7 +79,8 @@ class GlobalValue : public Constant {
protected:
GlobalValue(Type *Ty, ValueTy VTy, AllocInfo AllocInfo, LinkageTypes Linkage,
const Twine &Name, unsigned AddressSpace)
- : Constant(PointerType::get(Ty, AddressSpace), VTy, AllocInfo),
+ : Constant(PointerType::get(Ty->getContext(), AddressSpace), VTy,
+ AllocInfo),
ValueType(Ty), Visibility(DefaultVisibility),
UnnamedAddrVal(unsigned(UnnamedAddr::None)),
DllStorageClass(DefaultStorageClass), ThreadLocal(NotThreadLocal),
diff --git a/llvm/lib/Bitcode/Reader/BitcodeReader.cpp b/llvm/lib/Bitcode/Reader/BitcodeReader.cpp
index 56f5ff4b20e5db..551dfd4af88bb2 100644
--- a/llvm/lib/Bitcode/Reader/BitcodeReader.cpp
+++ b/llvm/lib/Bitcode/Reader/BitcodeReader.cpp
@@ -2598,7 +2598,7 @@ Error BitcodeReader::parseTypeTableBody() {
!PointerType::isValidElementType(ResultTy))
return error("Invalid type");
ContainedIDs.push_back(Record[0]);
- ResultTy = PointerType::get(ResultTy, AddressSpace);
+ ResultTy = PointerType::get(ResultTy->getContext(), AddressSpace);
break;
}
case bitc::TYPE_CODE_OPAQUE_POINTER: { // OPAQUE_POINTER: [addrspace]
diff --git a/llvm/lib/CodeGen/GlobalISel/CallLowering.cpp b/llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
index d17b20d977ce99..437dc4f42baece 100644
--- a/llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
@@ -1054,7 +1054,7 @@ void CallLowering::insertSRetIncomingArgument(
DemoteReg = MRI.createGenericVirtualRegister(
LLT::pointer(AS, DL.getPointerSizeInBits(AS)));
- Type *PtrTy = PointerType::get(F.getReturnType(), AS);
+ Type *PtrTy = PointerType::get(F.getContext(), AS);
SmallVector<EVT, 1> ValueVTs;
ComputeValueVTs(*TLI, DL, PtrTy, ValueVTs);
@@ -1081,7 +1081,7 @@ void CallLowering::insertSRetOutgoingArgument(MachineIRBuilder &MIRBuilder,
DL.getTypeAllocSize(RetTy), DL.getPrefTypeAlign(RetTy), false);
Register DemoteReg = MIRBuilder.buildFrameIndex(FramePtrTy, FI).getReg(0);
- ArgInfo DemoteArg(DemoteReg, PointerType::get(RetTy, AS),
+ ArgInfo DemoteArg(DemoteReg, PointerType::get(RetTy->getContext(), AS),
ArgInfo::NoArgIndex);
setArgFlags(DemoteArg, AttributeList::ReturnIndex, DL, CB);
DemoteArg.Flags[0].setSRet();
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
index 8a5d7c0b022d90..9f1aadcb279a99 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
@@ -11004,8 +11004,8 @@ TargetLowering::LowerCallTo(TargetLowering::CallLoweringInfo &CLI) const {
MachineFunction &MF = CLI.DAG.getMachineFunction();
DemoteStackIdx =
MF.getFrameInfo().CreateStackObject(TySize, Alignment, false);
- Type *StackSlotPtrType = PointerType::get(CLI.RetTy,
- DL.getAllocaAddrSpace());
+ Type *StackSlotPtrType =
+ PointerType::get(CLI.RetTy->getContext(), DL.getAllocaAddrSpace());
DemoteStackSlot = CLI.DAG.getFrameIndex(DemoteStackIdx, getFrameIndexTy(DL));
ArgListEntry Entry;
diff --git a/llvm/lib/ExecutionEngine/Orc/IndirectionUtils.cpp b/llvm/lib/ExecutionEngine/Orc/IndirectionUtils.cpp
index ee9acf0ab33a40..7fb84e97fe4ed8 100644
--- a/llvm/lib/ExecutionEngine/Orc/IndirectionUtils.cpp
+++ b/llvm/lib/ExecutionEngine/Orc/IndirectionUtils.cpp
@@ -273,8 +273,8 @@ createLocalIndirectStubsManagerBuilder(const Triple &T) {
Constant* createIRTypedAddress(FunctionType &FT, ExecutorAddr Addr) {
Constant *AddrIntVal =
ConstantInt::get(Type::getInt64Ty(FT.getContext()), Addr.getValue());
- Constant *AddrPtrVal =
- ConstantExpr::getIntToPtr(AddrIntVal, PointerType::get(&FT, 0));
+ Constant *AddrPtrVal = ConstantExpr::getIntToPtr(
+ AddrIntVal, PointerType::get(FT.getContext(), 0));
return AddrPtrVal;
}
diff --git a/llvm/lib/FuzzMutate/RandomIRBuilder.cpp b/llvm/lib/FuzzMutate/RandomIRBuilder.cpp
index a684307586a61d..8aea3d6f7e059f 100644
--- a/llvm/lib/FuzzMutate/RandomIRBuilder.cpp
+++ b/llvm/lib/FuzzMutate/RandomIRBuilder.cpp
@@ -370,7 +370,7 @@ Instruction *RandomIRBuilder::newSink(BasicBlock &BB,
Type *Ty = V->getType();
Ptr = createStackMemory(BB.getParent(), Ty, PoisonValue::get(Ty));
} else {
- Ptr = PoisonValue::get(PointerType::get(V->getType(), 0));
+ Ptr = PoisonValue::get(PointerType::get(V->getContext(), 0));
}
}
diff --git a/llvm/lib/IR/Core.cpp b/llvm/lib/IR/Core.cpp
index dc5ca68bd9985e..15ab9674f496d6 100644
--- a/llvm/lib/IR/Core.cpp
+++ b/llvm/lib/IR/Core.cpp
@@ -873,7 +873,8 @@ LLVMTypeRef LLVMArrayType2(LLVMTypeRef ElementType, uint64_t ElementCount) {
}
LLVMTypeRef LLVMPointerType(LLVMTypeRef ElementType, unsigned AddressSpace) {
- return wrap(PointerType::get(unwrap(ElementType), AddressSpace));
+ return wrap(
+ PointerType::get(unwrap(ElementType)->getContext(), AddressSpace));
}
LLVMBool LLVMPointerTypeIsOpaque(LLVMTypeRef Ty) {
diff --git a/llvm/lib/IR/Instructions.cpp b/llvm/lib/IR/Instructions.cpp
index 50560e9cf218e4..b585d8cfbf2e2b 100644
--- a/llvm/lib/IR/Instructions.cpp
+++ b/llvm/lib/IR/Instructions.cpp
@@ -1214,7 +1214,7 @@ AllocaInst::AllocaInst(Type *Ty, unsigned AddrSpace, Value *ArraySize,
AllocaInst::AllocaInst(Type *Ty, unsigned AddrSpace, Value *ArraySize,
Align Align, const Twine &Name,
InsertPosition InsertBefore)
- : UnaryInstruction(PointerType::get(Ty, AddrSpace), Alloca,
+ : UnaryInstruction(PointerType::get(Ty->getContext(), AddrSpace), Alloca,
getAISize(Ty->getContext(), ArraySize), InsertBefore),
AllocatedType(Ty) {
setAlignment(Align);
diff --git a/llvm/lib/IR/Type.cpp b/llvm/lib/IR/Type.cpp
index ffa80faf6e249f..277985b6b00a31 100644
--- a/llvm/lib/IR/Type.cpp
+++ b/llvm/lib/IR/Type.cpp
@@ -857,7 +857,7 @@ PointerType::PointerType(LLVMContext &C, unsigned AddrSpace)
}
PointerType *Type::getPointerTo(unsigned AddrSpace) const {
- return PointerType::get(const_cast<Type*>(this), AddrSpace);
+ return PointerType::get(getContext(), AddrSpace);
}
bool PointerType::isValidElementType(Type *ElemTy) {
diff --git a/llvm/lib/Linker/IRMover.cpp b/llvm/lib/Linker/IRMover.cpp
index be3535ae94ff4e..274e61e898d21b 100644
--- a/llvm/lib/Linker/IRMover.cpp
+++ b/llvm/lib/Linker/IRMover.cpp
@@ -297,7 +297,7 @@ Type *TypeMapTy::get(Type *Ty, SmallPtrSet<StructType *, 8> &Visited) {
return *Entry = VectorType::get(ElementTypes[0],
cast<VectorType>(Ty)->getElementCount());
case Type::PointerTyID:
- return *Entry = PointerType::get(ElementTypes[0],
+ return *Entry = PointerType::get(Ty->getContext(),
cast<PointerType>(Ty)->getAddressSpace());
case Type::FunctionTyID:
return *Entry = FunctionType::get(ElementTypes[0],
diff --git a/llvm/lib/SandboxIR/Type.cpp b/llvm/lib/SandboxIR/Type.cpp
index 9ecff5f0165a9d..4d7c71334eca3c 100644
--- a/llvm/lib/SandboxIR/Type.cpp
+++ b/llvm/lib/SandboxIR/Type.cpp
@@ -47,7 +47,7 @@ void Type::dump() {
PointerType *PointerType::get(Type *ElementType, unsigned AddressSpace) {
return cast<PointerType>(ElementType->getContext().getType(
- llvm::PointerType::get(ElementType->LLVMTy, AddressSpace)));
+ llvm::PointerType::get(ElementType->LLVMTy->getContext(), AddressSpace)));
}
PointerType *PointerType::get(Context &Ctx, unsigned AddressSpace) {
diff --git a/llvm/lib/Target/AArch64/AArch64Arm64ECCallLowering.cpp b/llvm/lib/Target/AArch64/AArch64Arm64ECCallLowering.cpp
index 415edb189e60c4..abd2df301880c4 100644
--- a/llvm/lib/Target/AArch64/AArch64Arm64ECCallLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64Arm64ECCallLowering.cpp
@@ -793,9 +793,9 @@ bool AArch64Arm64ECCallLowering::runOnModule(Module &Mod) {
VoidTy = Type::getVoidTy(M->getContext());
GuardFnType = FunctionType::get(PtrTy, {PtrTy, PtrTy}, false);
- GuardFnPtrType = PointerType::get(GuardFnType, 0);
+ GuardFnPtrType = PointerType::get(M->getContext(), 0);
DispatchFnType = FunctionType::get(PtrTy, {PtrTy, PtrTy, PtrTy}, false);
- DispatchFnPtrType = PointerType::get(DispatchFnType, 0);
+ DispatchFnPtrType = PointerType::get(M->getContext(), 0);
GuardFnCFGlobal =
M->getOrInsertGlobal("__os_arm64x_check_icall_cfg", GuardFnPtrType);
GuardFnGlobal =
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUAsanInstrumentation.cpp b/llvm/lib/Target/AMDGPU/AMDGPUAsanInstrumentation.cpp
index 067fc981740331..6554863e08c913 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUAsanInstrumentation.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUAsanInstrumentation.cpp
@@ -161,7 +161,7 @@ static void instrumentAddressImpl(Module &M, IRBuilder<> &IRB,
size_t AccessSizeIndex = TypeStoreSizeToSizeIndex(TypeStoreSize);
Type *ShadowTy = IntegerType::get(M.getContext(),
std::max(8U, TypeStoreSize >> AsanScale));
- Type *ShadowPtrTy = PointerType::get(ShadowTy, 0);
+ Type *ShadowPtrTy = PointerType::get(M.getContext(), 0);
Value *AddrLong = IRB.CreatePtrToInt(Addr, IntptrTy);
Value *ShadowPtr =
memToShadow(M, IRB, IntptrTy, AddrLong, AsanScale, AsanOffset);
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUPrintfRuntimeBinding.cpp b/llvm/lib/Target/AMDGPU/AMDGPUPrintfRuntimeBinding.cpp
index a899805dc46b1a..459f85ae6169a1 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUPrintfRuntimeBinding.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUPrintfRuntimeBinding.cpp
@@ -277,7 +277,7 @@ bool AMDGPUPrintfRuntimeBindingImpl::lowerPrintfForGpu(Module &M) {
Type *Tys_alloc[1] = {SizetTy};
Type *I8Ty = Type::getInt8Ty(Ctx);
- Type *I8Ptr = PointerType::get(I8Ty, 1);
+ Type *I8Ptr = PointerType::get(Ctx, 1);
FunctionType *FTy_alloc = FunctionType::get(I8Ptr, Tys_alloc, false);
FunctionCallee PrintfAllocFn =
M.getOrInsertFunction(StringRef("__printf_alloc"), FTy_alloc, Attr);
@@ -300,7 +300,7 @@ bool AMDGPUPrintfRuntimeBindingImpl::lowerPrintfForGpu(Module &M) {
// basicblock splits after buffer overflow check
//
ConstantPointerNull *zeroIntPtr =
- ConstantPointerNull::get(PointerType::get(I8Ty, 1));
+ ConstantPointerNull::get(PointerType::get(Ctx, 1));
auto *cmp = cast<ICmpInst>(Builder.CreateICmpNE(pcall, zeroIntPtr, ""));
if (!CI->use_empty()) {
Value *result =
@@ -320,7 +320,7 @@ bool AMDGPUPrintfRuntimeBindingImpl::lowerPrintfForGpu(Module &M) {
I8Ty, pcall, ConstantInt::get(Ctx, APInt(32, 0)), "PrintBuffID",
BrnchPoint);
- Type *idPointer = PointerType::get(I32Ty, AMDGPUAS::GLOBAL_ADDRESS);
+ Type *idPointer = PointerType::get(Ctx, AMDGPUAS::GLOBAL_ADDRESS);
Value *id_gep_cast =
new BitCastInst(BufferIdx, idPointer, "PrintBuffIdCast", BrnchPoint);
diff --git a/llvm/lib/Target/AMDGPU/R600ISelLowering.cpp b/llvm/lib/Target/AMDGPU/R600ISelLowering.cpp
index c2e952418f1be2..157ca4b08020a8 100644
--- a/llvm/lib/Target/AMDGPU/R600ISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/R600ISelLowering.cpp
@@ -762,8 +762,8 @@ SDValue R600TargetLowering::LowerImplicitParameter(SelectionDAG &DAG, EVT VT,
const SDLoc &DL,
unsigned DwordOffset) const {
unsigned ByteOffset = DwordOffset * 4;
- PointerType * PtrType = PointerType::get(VT.getTypeForEVT(*DAG.getContext()),
- AMDGPUAS::PARAM_I_ADDRESS);
+ PointerType *PtrType =
+ PointerType::get(*DAG.getContext(), AMDGPUAS::PARAM_I_ADDRESS);
// We shouldn't be using an offset wider than 16-bits for implicit parameters.
assert(isInt<16>(ByteOffset));
diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
index c4b1038b12d042..7170dd79d08e6c 100644
--- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
@@ -7819,7 +7819,8 @@ SDValue SITargetLowering::LowerGlobalAddress(AMDGPUMachineFunction *MFI,
SIInstrInfo::MO_GOTPCREL32);
Type *Ty = PtrVT.getTypeForEVT(*DAG.getContext());
- PointerType *PtrTy = PointerType::get(Ty, AMDGPUAS::CONSTANT_ADDRESS);
+ PointerType *PtrTy =
+ PointerType::get(*DAG.getContext(), AMDGPUAS::CONSTANT_ADDRESS);
const DataLayout &DataLayout = DAG.getDataLayout();
Align Alignment = DataLayout.getABITypeAlign(PtrTy);
MachinePointerInfo PtrInfo =
diff --git a/llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp b/llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
index 639f3bf8fc62e3..6d24b7c230c7f1 100644
--- a/llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
+++ b/llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
@@ -84,7 +84,7 @@ static Value *simplifyNeonVld1(const IntrinsicInst &II, unsigned MemAlign,
return nullptr;
auto *BCastInst = Builder.CreateBitCast(II.getArgOperand(0),
- PointerType::get(II.getType(), 0));
+ PointerType::get(II.getContext(), 0));
return Builder.CreateAlignedLoad(II.getType(), BCastInst, Align(Alignment));
}
diff --git a/llvm/lib/Target/NVPTX/NVPTXGenericToNVVM.cpp b/llvm/lib/Target/NVPTX/NVPTXGenericToNVVM.cpp
index 76c6c8fb38d62e..75fcf6829c5042 100644
--- a/llvm/lib/Target/NVPTX/NVPTXGenericToNVVM.cpp
+++ b/llvm/lib/Target/NVPTX/NVPTXGenericToNVVM.cpp
@@ -154,8 +154,7 @@ Value *GenericToNVVM::remapConstant(Module *M, Function *F, Constant *C,
if (I != GVMap.end()) {
GlobalVariable *GV = I->second;
NewValue = Builder.CreateAddrSpaceCast(
- GV,
- PointerType::get(GV->getValueType(), llvm::ADDRESS_SPACE_GENERIC));
+ GV, PointerType::get(GV->getContext(), llvm::ADDRESS_SPACE_GENERIC));
}
} else if (isa<ConstantAggregate>(C)) {
// If any element in the constant vector or aggregate C is or uses a global
diff --git a/llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp b/llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
index c40c09c204fd78..ed493d50712a2a 100644
--- a/llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
+++ b/llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
@@ -2804,8 +2804,8 @@ SDValue NVPTXTargetLowering::LowerVAARG(SDValue Op, SelectionDAG &DAG) const {
Tmp1 = DAG.getStore(VAListLoad.getValue(1), DL, Tmp1, Tmp2,
MachinePointerInfo(V));
- const Value *SrcV =
- Constant::getNullValue(PointerType::get(Ty, ADDRESS_SPACE_LOCAL));
+ const Value *SrcV = Constant::getNullValue(
+ PointerType::get(*DAG.getContext(), ADDRESS_SPACE_LOCAL));
// Load the actual argument out of the pointer VAList
return DAG.getLoad(VT, DL, Tmp1, VAList, MachinePointerInfo(SrcV));
@@ -3194,8 +3194,8 @@ SDValue NVPTXTargetLowering::LowerFormalArguments(
SDValue VecAddr =
DAG.getNode(ISD::ADD, dl, PtrVT, Arg,
DAG.getConstant(Offsets[VecIdx], dl, PtrVT));
- Value *srcValue = Constant::getNullValue(PointerType::get(
- EltVT.getTypeForEVT(F->getContext()), ADDRESS_SPACE_PARAM));
+ Value *srcValue = Constant::getNullValue(
+ PointerType::get(F->getContext(), ADDRESS_SPACE_PARAM));
const MaybeAlign PartAlign = [&]() -> MaybeAlign {
if (aggregateIsPacked)
diff --git a/llvm/lib/Target/NVPTX/NVPTXLowerAlloca.cpp b/llvm/lib/Target/NVPTX/NVPTXLowerAlloca.cpp
index be144c5ab7bafc..a7544ce2df1a22 100644
--- a/llvm/lib/Target/NVPTX/NVPTXLowerAlloca.cpp
+++ b/llvm/lib/Target/NVPTX/NVPTXLowerAlloca.cpp
@@ -90,13 +90,15 @@ bool NVPTXLowerAlloca::runOnFunction(Function &F) {
// addrspacecast to ADDRESS_SPACE_GENERIC.
if (AllocAddrSpace == ADDRESS_SPACE_GENERIC) {
auto ASCastToLocalAS = new AddrSpaceCastInst(
- allocaInst, PointerType::get(ETy, ADDRESS_SPACE_LOCAL), "");
+ allocaInst,
+ PointerType::get(ETy->getContext(), ADDRESS_SPACE_LOCAL), "");
ASCastToLocalAS->insertAfter(allocaInst);
AllocaInLocalAS = ASCastToLocalAS;
}
auto AllocaInGenericAS = new AddrSpaceCastInst(
- AllocaInLocalAS, PointerType::get(ETy, ADDRESS_SPACE_GENERIC), "");
+ AllocaInLocalAS,
+ PointerType::get(ETy->getContext(), ADDRESS_SPACE_GENERIC), "");
AllocaInGenericAS->insertAfter(AllocaInLocalAS);
for (Use &AllocaUse : llvm::make_early_inc_range(allocaInst->uses())) {
diff --git a/llvm/lib/Target/NVPTX/NVPTXLowerArgs.cpp b/llvm/lib/Target/NVPTX/NVPTXLowerArgs.cpp
index ceb9d852d8ec85..c763b54c8dbfe8 100644
--- a/llvm/lib/Target/NVPTX/NVPTXLowerArgs.cpp
+++ b/llvm/lib/Target/NVPTX/NVPTXLowerArgs.cpp
@@ -594,8 +594,8 @@ void NVPTXLowerArgs::handleByValParam(const NVPTXTargetMachine &TM,
UsesToUpdate.push_back(&U);
Value *ArgInParamAS = new AddrSpaceCastInst(
- Arg, PointerType::get(StructType, ADDRESS_SPACE_PARAM), Arg->getName(),
- FirstInst);
+ Arg, PointerType::get(StructType->getContext(), ADDRESS_SPACE_PARAM),
+ Arg->getName(), FirstInst);
for (Use *U : UsesToUpdate)
convertToParamAS(U, ArgInParamAS, HasCvtaParam, IsGridConstant);
LLVM_DEBUG(dbgs() << "No need to copy or cast " << *Arg << "\n");
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 33ddcb57e9b08b..d644dfa3ed3e34 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -29644,7 +29644,7 @@ SDValue X86TargetLowering::LowerWin64_i128OP(SDValue Op, SelectionDAG &DAG) cons
InChain =
DAG.getStore(InChain, dl, Op->getOperand(i), StackPtr, MPI, Align(16));
Type *ArgTy = ArgVT.getTypeForEVT(*DAG.getContext());
- Entry.Ty = PointerType::get(ArgTy,0);
+ Entry.Ty = PointerType::get(*DAG.getContext(), 0);
Entry.IsSExt = false;
Entry.IsZExt = false;
Args.push_back(Entry);
diff --git a/llvm/lib/Target/X86/X86InstCombineIntrinsic.cpp b/llvm/lib/Target/X86/X86InstCombineIntrinsic.cpp
index 7c9738bf082164..4426113f599ac4 100644
--- a/llvm/lib/Target/X86/X86InstCombineIntrinsic.cpp
+++ b/llvm/lib/Target/X86/X86InstCombineIntrinsic.cpp
@@ -70,7 +70,7 @@ static Instruction *simplifyX86MaskedLoad(IntrinsicInst &II, InstCombiner &IC) {
// First, cast the x86 intrinsic scalar pointer to a vector pointer to match
// the LLVM intrinsic definition for the pointer argument.
unsigned AddrSpace = cast<PointerType>(Ptr->getType())->getAddressSpace();
- PointerType *VecPtrTy = PointerType::get(II.getType(), AddrSpace);
+ PointerType *VecPtrTy = PointerType::get(II.getContext(), AddrSpace);
Value *PtrCast = IC.Builder.CreateBitCast(Ptr, VecPtrTy, "castvec");
// The pass-through vector for an x86 masked load is a zero vector.
@@ -105,7 +105,7 @@ static bool simplifyX86MaskedStore(IntrinsicInst &II, InstCombiner &IC) {
// intrinsic to the LLVM intrins...
[truncated]
``````````
</details>
https://github.com/llvm/llvm-project/pull/123617
More information about the llvm-commits
mailing list