[llvm] [AArch64][SDAG] Detect non-zeroes in truncating buildvectors in fshl lowering (PR #123597)

[Simon Pilgrim via llvm-commits]

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@@ -7970,7 +7970,7 @@ static bool isNonZeroModBitWidthOrUndef(SDValue Z, unsigned BW) {
   return ISD::matchUnaryPredicate(
       Z,
       [=](ConstantSDNode *C) { return !C || C->getAPIntValue().urem(BW) != 0; },
-      true);
+      true, true);
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RKSimon wrote:

`/*AllowUndefs=*/true, /*AllowTrunc=*/true`

https://github.com/llvm/llvm-project/pull/123597