[llvm] [MachineScheduler] Fix physreg dependencies of ExitSU (PR #123541)

Sergei Barannikov via llvm-commits llvm-commits at lists.llvm.org
Sun Jan 19 20:25:17 PST 2025


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@@ -209,13 +209,17 @@ void ScheduleDAGInstrs::addSchedBarrierDeps() {
   ExitSU.setInstr(ExitMI);
   // Add dependencies on the defs and uses of the instruction.
   if (ExitMI) {
+    const MCInstrDesc &MIDesc = ExitMI->getDesc();
     for (const MachineOperand &MO : ExitMI->all_uses()) {
+      unsigned OpIdx = MO.getOperandNo();
       Register Reg = MO.getReg();
       if (Reg.isPhysical()) {
+        bool IsRealUse = OpIdx < MIDesc.getNumOperands() ||
+                         MIDesc.hasImplicitUseOfPhysReg(Reg);
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s-barannikov wrote:

> I'm assuming getting this accurate isn't required for correctness?

As far as I'm aware, getting this accurate isn't required for correctness. My motivation for fixing this was to move comparisons away from branches if the latency between them is high (which is true on my target).

> MIDesc.hasImplicitUseOfPhysReg also looks buggy to me. It doesn't have the MCRI argument like hasImplicitDefOfPhysReg, so it will miss any aliases

Good point, I'll add a FIXME.


https://github.com/llvm/llvm-project/pull/123541


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