[llvm] 33f9d83 - [X86] X86FixupVectorConstants - split ConvertToBroadcastAVX512 helper to handle single bitwidth at a time.
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Sat Jan 18 06:42:02 PST 2025
Author: Simon Pilgrim
Date: 2025-01-18T14:08:48Z
New Revision: 33f9d839eff79707ae8879a497f7ae9fab6b83ac
URL: https://github.com/llvm/llvm-project/commit/33f9d839eff79707ae8879a497f7ae9fab6b83ac
DIFF: https://github.com/llvm/llvm-project/commit/33f9d839eff79707ae8879a497f7ae9fab6b83ac.diff
LOG: [X86] X86FixupVectorConstants - split ConvertToBroadcastAVX512 helper to handle single bitwidth at a time.
Attempt 32-bit broadcasts first, and then fallback to 64-bit broadcasts on failure.
We lose an explicit assertion for matching operand numbers but X86InstrFoldTables already does something similar.
Pulled out of WIP patch #73509
Added:
Modified:
llvm/lib/Target/X86/X86FixupVectorConstants.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/X86FixupVectorConstants.cpp b/llvm/lib/Target/X86/X86FixupVectorConstants.cpp
index 7390cc58054528..453898e132ca45 100644
--- a/llvm/lib/Target/X86/X86FixupVectorConstants.cpp
+++ b/llvm/lib/Target/X86/X86FixupVectorConstants.cpp
@@ -649,41 +649,25 @@ bool X86FixupVectorConstantsPass::processInstruction(MachineFunction &MF,
}
}
- auto ConvertToBroadcastAVX512 = [&](unsigned OpSrc32, unsigned OpSrc64) {
- unsigned OpBcst32 = 0, OpBcst64 = 0;
- unsigned OpNoBcst32 = 0, OpNoBcst64 = 0;
- if (OpSrc32) {
+ auto ConvertToBroadcast = [&](unsigned OpSrc, int BW) {
+ if (OpSrc) {
if (const X86FoldTableEntry *Mem2Bcst =
- llvm::lookupBroadcastFoldTableBySize(OpSrc32, 32)) {
- OpBcst32 = Mem2Bcst->DstOp;
- OpNoBcst32 = Mem2Bcst->Flags & TB_INDEX_MASK;
+ llvm::lookupBroadcastFoldTableBySize(OpSrc, BW)) {
+ unsigned OpBcst = Mem2Bcst->DstOp;
+ unsigned OpNoBcst = Mem2Bcst->Flags & TB_INDEX_MASK;
+ FixupEntry Fixups[] = {{(int)OpBcst, 1, BW, rebuildSplatCst}};
+ // TODO: Add support for RegBitWidth, but currently rebuildSplatCst
+ // doesn't require it (defaults to Constant::getPrimitiveSizeInBits).
+ return FixupConstant(Fixups, 0, OpNoBcst);
}
}
- if (OpSrc64) {
- if (const X86FoldTableEntry *Mem2Bcst =
- llvm::lookupBroadcastFoldTableBySize(OpSrc64, 64)) {
- OpBcst64 = Mem2Bcst->DstOp;
- OpNoBcst64 = Mem2Bcst->Flags & TB_INDEX_MASK;
- }
- }
- assert(((OpBcst32 == 0) || (OpBcst64 == 0) || (OpNoBcst32 == OpNoBcst64)) &&
- "OperandNo mismatch");
-
- if (OpBcst32 || OpBcst64) {
- unsigned OpNo = OpBcst32 == 0 ? OpNoBcst64 : OpNoBcst32;
- FixupEntry Fixups[] = {{(int)OpBcst32, 32, 32, rebuildSplatCst},
- {(int)OpBcst64, 64, 64, rebuildSplatCst}};
- // TODO: Add support for RegBitWidth, but currently rebuildSplatCst
- // doesn't require it (defaults to Constant::getPrimitiveSizeInBits).
- return FixupConstant(Fixups, 0, OpNo);
- }
return false;
};
// Attempt to find a AVX512 mapping from a full width memory-fold instruction
// to a broadcast-fold instruction variant.
if ((MI.getDesc().TSFlags & X86II::EncodingMask) == X86II::EVEX)
- return ConvertToBroadcastAVX512(Opc, Opc);
+ return ConvertToBroadcast(Opc, 32) || ConvertToBroadcast(Opc, 64);
// Reverse the X86InstrInfo::setExecutionDomainCustom EVEX->VEX logic
// conversion to see if we can convert to a broadcasted (integer) logic op.
@@ -740,7 +724,7 @@ bool X86FixupVectorConstantsPass::processInstruction(MachineFunction &MF,
break;
}
if (OpSrc32 || OpSrc64)
- return ConvertToBroadcastAVX512(OpSrc32, OpSrc64);
+ return ConvertToBroadcast(OpSrc32, 32) || ConvertToBroadcast(OpSrc64, 64);
}
return false;
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