[llvm] ebfdd38 - [SLP][NFC]Replace undef with constant zero in tests, NFC
Alexey Bataev via llvm-commits
llvm-commits at lists.llvm.org
Fri Jan 17 09:55:15 PST 2025
Author: Alexey Bataev
Date: 2025-01-17T09:48:03-08:00
New Revision: ebfdd38228d4e21597642301fb75f5b02ff3ee06
URL: https://github.com/llvm/llvm-project/commit/ebfdd38228d4e21597642301fb75f5b02ff3ee06
DIFF: https://github.com/llvm/llvm-project/commit/ebfdd38228d4e21597642301fb75f5b02ff3ee06.diff
LOG: [SLP][NFC]Replace undef with constant zero in tests, NFC
Added:
llvm/test/Transforms/SLPVectorizer/insert-element-build-vector-const.ll
Modified:
llvm/test/Transforms/SLPVectorizer/AArch64/vectorize-free-extracts-inserts.ll
llvm/test/Transforms/SLPVectorizer/X86/hadd.ll
llvm/test/Transforms/SLPVectorizer/X86/sitofp.ll
llvm/test/Transforms/SLPVectorizer/X86/value-bug.ll
llvm/test/Transforms/SLPVectorizer/X86/vectorize-widest-phis.ll
llvm/test/Transforms/SLPVectorizer/insert-element-build-vector.ll
Removed:
llvm/test/Transforms/SLPVectorizer/insert-element-build-vector-const-undef.ll
################################################################################
diff --git a/llvm/test/Transforms/SLPVectorizer/AArch64/vectorize-free-extracts-inserts.ll b/llvm/test/Transforms/SLPVectorizer/AArch64/vectorize-free-extracts-inserts.ll
index 4755c690c07111..4b6f0438b89151 100644
--- a/llvm/test/Transforms/SLPVectorizer/AArch64/vectorize-free-extracts-inserts.ll
+++ b/llvm/test/Transforms/SLPVectorizer/AArch64/vectorize-free-extracts-inserts.ll
@@ -34,7 +34,7 @@ bb:
%a.lane.0 = fmul double %v1.lane.0, %v2.lane.2
%a.lane.1 = fmul double %v1.lane.1, %v2.lane.3
- %a.ins.0 = insertelement <2 x double> undef, double %a.lane.0, i32 0
+ %a.ins.0 = insertelement <2 x double> zeroinitializer, double %a.lane.0, i32 0
%a.ins.1 = insertelement <2 x double> %a.ins.0, double %a.lane.1, i32 1
call void @use(double %v1.lane.0)
@@ -73,7 +73,7 @@ bb:
%a.lane.0 = fmul double %v1.lane.0, %v2.lane.2
%a.lane.1 = fmul double %v3.lane.1, %v2.lane.2
- %a.ins.0 = insertelement <2 x double> undef, double %a.lane.0, i32 0
+ %a.ins.0 = insertelement <2 x double> zeroinitializer, double %a.lane.0, i32 0
%a.ins.1 = insertelement <2 x double> %a.ins.0, double %a.lane.1, i32 1
call void @use(double %v1.lane.0)
@@ -95,7 +95,8 @@ define void @noop_extract_second_2_lanes(ptr %ptr.1, ptr %ptr.2) {
; CHECK-NEXT: [[TMP0:%.*]] = shufflevector <4 x double> [[V_1]], <4 x double> poison, <2 x i32> <i32 2, i32 3>
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x double> [[V_2]], <4 x double> poison, <2 x i32> <i32 2, i32 2>
; CHECK-NEXT: [[TMP2:%.*]] = fmul <2 x double> [[TMP0]], [[TMP1]]
-; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <2 x double> [[TMP2]], <2 x double> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
+; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <2 x double> [[TMP2]], <2 x double> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>
+; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <4 x double> zeroinitializer, <4 x double> [[TMP4]], <4 x i32> <i32 4, i32 5, i32 2, i32 3>
; CHECK-NEXT: call void @use(double [[V1_LANE_2]])
; CHECK-NEXT: call void @use(double [[V1_LANE_3]])
; CHECK-NEXT: store <4 x double> [[TMP3]], ptr [[PTR_1]], align 8
@@ -112,7 +113,7 @@ bb:
%a.lane.0 = fmul double %v1.lane.2, %v2.lane.2
%a.lane.1 = fmul double %v1.lane.3, %v2.lane.2
- %a.ins.0 = insertelement <4 x double> undef, double %a.lane.0, i32 0
+ %a.ins.0 = insertelement <4 x double> zeroinitializer, double %a.lane.0, i32 0
%a.ins.1 = insertelement <4 x double> %a.ins.0, double %a.lane.1, i32 1
call void @use(double %v1.lane.2)
@@ -149,7 +150,7 @@ bb:
%a.lane.0 = fmul double %v1.lane.1, %v2.lane.2
%a.lane.1 = fmul double %v1.lane.0, %v2.lane.2
- %a.ins.0 = insertelement <2 x double> undef, double %a.lane.0, i32 0
+ %a.ins.0 = insertelement <2 x double> zeroinitializer, double %a.lane.0, i32 0
%a.ins.1 = insertelement <2 x double> %a.ins.0, double %a.lane.1, i32 1
call void @use(double %v1.lane.0)
@@ -170,7 +171,8 @@ define void @extract_lanes_1_and_2(ptr %ptr.1, ptr %ptr.2) {
; CHECK-NEXT: [[TMP0:%.*]] = shufflevector <4 x double> [[V_1]], <4 x double> poison, <2 x i32> <i32 1, i32 2>
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x double> [[V_2]], <4 x double> poison, <2 x i32> <i32 2, i32 2>
; CHECK-NEXT: [[TMP2:%.*]] = fmul <2 x double> [[TMP0]], [[TMP1]]
-; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <2 x double> [[TMP2]], <2 x double> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
+; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <2 x double> [[TMP2]], <2 x double> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>
+; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <4 x double> zeroinitializer, <4 x double> [[TMP4]], <4 x i32> <i32 4, i32 5, i32 2, i32 3>
; CHECK-NEXT: call void @use(double [[V1_LANE_1]])
; CHECK-NEXT: call void @use(double [[V1_LANE_2]])
; CHECK-NEXT: store <4 x double> [[TMP3]], ptr [[PTR_1]], align 8
@@ -187,7 +189,7 @@ bb:
%a.lane.0 = fmul double %v1.lane.1, %v2.lane.2
%a.lane.1 = fmul double %v1.lane.2, %v2.lane.2
- %a.ins.0 = insertelement <4 x double> undef, double %a.lane.0, i32 0
+ %a.ins.0 = insertelement <4 x double> zeroinitializer, double %a.lane.0, i32 0
%a.ins.1 = insertelement <4 x double> %a.ins.0, double %a.lane.1, i32 1
call void @use(double %v1.lane.1)
@@ -213,7 +215,8 @@ define void @noop_extracts_existing_vector_4_lanes(ptr %ptr.1, ptr %ptr.2) {
; CHECK-NEXT: [[TMP0:%.*]] = shufflevector <9 x double> [[V_1]], <9 x double> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x double> [[V_2]], <4 x double> poison, <4 x i32> <i32 2, i32 0, i32 2, i32 2>
; CHECK-NEXT: [[TMP2:%.*]] = fmul <4 x double> [[TMP0]], [[TMP1]]
-; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <4 x double> [[TMP2]], <4 x double> undef, <9 x i32> <i32 2, i32 3, i32 0, i32 1, i32 4, i32 5, i32 6, i32 7, i32 7>
+; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <4 x double> [[TMP2]], <4 x double> poison, <9 x i32> <i32 2, i32 3, i32 0, i32 1, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
+; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <9 x double> zeroinitializer, <9 x double> [[TMP4]], <9 x i32> <i32 9, i32 10, i32 11, i32 12, i32 4, i32 5, i32 6, i32 7, i32 8>
; CHECK-NEXT: call void @use(double [[V1_LANE_0]])
; CHECK-NEXT: call void @use(double [[V1_LANE_1]])
; CHECK-NEXT: call void @use(double [[V1_LANE_2]])
@@ -235,7 +238,7 @@ bb:
%a.lane.1 = fmul double %v1.lane.3, %v2.lane.2
%a.lane.2 = fmul double %v1.lane.0, %v2.lane.2
%a.lane.3 = fmul double %v1.lane.1, %v2.lane.0
- %a.ins.0 = insertelement <9 x double> undef, double %a.lane.0, i32 0
+ %a.ins.0 = insertelement <9 x double> zeroinitializer, double %a.lane.0, i32 0
%a.ins.1 = insertelement <9 x double> %a.ins.0, double %a.lane.1, i32 1
%a.ins.2 = insertelement <9 x double> %a.ins.1, double %a.lane.2, i32 2
%a.ins.3 = insertelement <9 x double> %a.ins.2, double %a.lane.3, i32 3
@@ -261,7 +264,8 @@ define void @extracts_jumbled_4_lanes(ptr %ptr.1, ptr %ptr.2) {
; CHECK-NEXT: [[TMP0:%.*]] = shufflevector <9 x double> [[V_1]], <9 x double> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x double> [[V_2]], <4 x double> poison, <4 x i32> <i32 2, i32 2, i32 1, i32 0>
; CHECK-NEXT: [[TMP2:%.*]] = fmul <4 x double> [[TMP0]], [[TMP1]]
-; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <4 x double> [[TMP2]], <4 x double> undef, <9 x i32> <i32 0, i32 2, i32 1, i32 3, i32 4, i32 5, i32 6, i32 7, i32 7>
+; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <4 x double> [[TMP2]], <4 x double> poison, <9 x i32> <i32 0, i32 2, i32 1, i32 3, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
+; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <9 x double> zeroinitializer, <9 x double> [[TMP4]], <9 x i32> <i32 9, i32 10, i32 11, i32 12, i32 4, i32 5, i32 6, i32 7, i32 8>
; CHECK-NEXT: call void @use(double [[V1_LANE_0]])
; CHECK-NEXT: call void @use(double [[V1_LANE_1]])
; CHECK-NEXT: call void @use(double [[V1_LANE_2]])
@@ -283,7 +287,7 @@ bb:
%a.lane.1 = fmul double %v1.lane.2, %v2.lane.1
%a.lane.2 = fmul double %v1.lane.1, %v2.lane.2
%a.lane.3 = fmul double %v1.lane.3, %v2.lane.0
- %a.ins.0 = insertelement <9 x double> undef, double %a.lane.0, i32 0
+ %a.ins.0 = insertelement <9 x double> zeroinitializer, double %a.lane.0, i32 0
%a.ins.1 = insertelement <9 x double> %a.ins.0, double %a.lane.1, i32 1
%a.ins.2 = insertelement <9 x double> %a.ins.1, double %a.lane.2, i32 2
%a.ins.3 = insertelement <9 x double> %a.ins.2, double %a.lane.3, i32 3
@@ -313,12 +317,14 @@ define void @noop_extracts_9_lanes(ptr %ptr.1, ptr %ptr.2) {
; CHECK-NEXT: [[TMP2:%.*]] = fmul <8 x double> [[TMP0]], [[TMP1]]
; CHECK-NEXT: [[A_LANE_8:%.*]] = fmul double [[V1_LANE_2]], [[V2_LANE_0]]
; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <8 x double> [[TMP2]], <8 x double> poison, <9 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 poison>
-; CHECK-NEXT: [[A_INS_8:%.*]] = insertelement <9 x double> [[TMP3]], double [[A_LANE_8]], i32 8
+; CHECK-NEXT: [[A_INS_72:%.*]] = shufflevector <9 x double> zeroinitializer, <9 x double> [[TMP3]], <9 x i32> <i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 8>
+; CHECK-NEXT: [[A_INS_8:%.*]] = insertelement <9 x double> [[A_INS_72]], double [[A_LANE_8]], i32 8
; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <9 x double> [[V_1]], <9 x double> poison, <8 x i32> <i32 6, i32 7, i32 8, i32 0, i32 1, i32 2, i32 3, i32 4>
; CHECK-NEXT: [[TMP6:%.*]] = fmul <8 x double> [[TMP4]], [[TMP5]]
; CHECK-NEXT: [[B_LANE_8:%.*]] = fmul double [[V1_LANE_5]], [[V2_LANE_0]]
; CHECK-NEXT: [[TMP7:%.*]] = shufflevector <8 x double> [[TMP6]], <8 x double> poison, <9 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 poison>
-; CHECK-NEXT: [[B_INS_8:%.*]] = insertelement <9 x double> [[TMP7]], double [[B_LANE_8]], i32 8
+; CHECK-NEXT: [[B_INS_71:%.*]] = shufflevector <9 x double> zeroinitializer, <9 x double> [[TMP7]], <9 x i32> <i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 8>
+; CHECK-NEXT: [[B_INS_8:%.*]] = insertelement <9 x double> [[B_INS_71]], double [[B_LANE_8]], i32 8
; CHECK-NEXT: [[RES:%.*]] = fsub <9 x double> [[A_INS_8]], [[B_INS_8]]
; CHECK-NEXT: store <9 x double> [[RES]], ptr [[PTR_1]], align 8
; CHECK-NEXT: ret void
@@ -350,7 +356,7 @@ bb:
%a.lane.7 = fmul double %v1.lane.1, %v2.lane.1
%a.lane.8 = fmul double %v1.lane.2, %v2.lane.0
- %a.ins.0 = insertelement <9 x double> undef, double %a.lane.0, i32 0
+ %a.ins.0 = insertelement <9 x double> zeroinitializer, double %a.lane.0, i32 0
%a.ins.1 = insertelement <9 x double> %a.ins.0, double %a.lane.1, i32 1
%a.ins.2 = insertelement <9 x double> %a.ins.1, double %a.lane.2, i32 2
%a.ins.3 = insertelement <9 x double> %a.ins.2, double %a.lane.3, i32 3
@@ -370,7 +376,7 @@ bb:
%b.lane.7 = fmul double %v1.lane.4, %v2.lane.1
%b.lane.8 = fmul double %v1.lane.5, %v2.lane.0
- %b.ins.0 = insertelement <9 x double> undef, double %b.lane.0, i32 0
+ %b.ins.0 = insertelement <9 x double> zeroinitializer, double %b.lane.0, i32 0
%b.ins.1 = insertelement <9 x double> %b.ins.0, double %b.lane.1, i32 1
%b.ins.2 = insertelement <9 x double> %b.ins.1, double %b.lane.2, i32 2
%b.ins.3 = insertelement <9 x double> %b.ins.2, double %b.lane.3, i32 3
@@ -401,12 +407,14 @@ define void @first_mul_chain_jumbled(ptr %ptr.1, ptr %ptr.2) {
; CHECK-NEXT: [[V2_LANE_1:%.*]] = extractelement <4 x double> [[V_2]], i32 1
; CHECK-NEXT: [[A_LANE_8:%.*]] = fmul double [[V1_LANE_2]], [[V2_LANE_1]]
; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <8 x double> [[TMP2]], <8 x double> poison, <9 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 poison>
-; CHECK-NEXT: [[A_INS_8:%.*]] = insertelement <9 x double> [[TMP3]], double [[A_LANE_8]], i32 8
+; CHECK-NEXT: [[A_INS_72:%.*]] = shufflevector <9 x double> zeroinitializer, <9 x double> [[TMP3]], <9 x i32> <i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 8>
+; CHECK-NEXT: [[A_INS_8:%.*]] = insertelement <9 x double> [[A_INS_72]], double [[A_LANE_8]], i32 8
; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <9 x double> [[V_1]], <9 x double> poison, <8 x i32> <i32 6, i32 7, i32 8, i32 0, i32 1, i32 2, i32 3, i32 4>
; CHECK-NEXT: [[TMP5:%.*]] = fmul <8 x double> [[TMP4]], [[TMP1]]
; CHECK-NEXT: [[B_LANE_8:%.*]] = fmul double [[V1_LANE_5]], [[V2_LANE_0]]
; CHECK-NEXT: [[TMP6:%.*]] = shufflevector <8 x double> [[TMP5]], <8 x double> poison, <9 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 poison>
-; CHECK-NEXT: [[B_INS_8:%.*]] = insertelement <9 x double> [[TMP6]], double [[B_LANE_8]], i32 8
+; CHECK-NEXT: [[B_INS_71:%.*]] = shufflevector <9 x double> zeroinitializer, <9 x double> [[TMP6]], <9 x i32> <i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 8>
+; CHECK-NEXT: [[B_INS_8:%.*]] = insertelement <9 x double> [[B_INS_71]], double [[B_LANE_8]], i32 8
; CHECK-NEXT: [[RES:%.*]] = fsub <9 x double> [[A_INS_8]], [[B_INS_8]]
; CHECK-NEXT: store <9 x double> [[RES]], ptr [[PTR_1]], align 8
; CHECK-NEXT: ret void
@@ -438,7 +446,7 @@ bb:
%a.lane.7 = fmul double %v1.lane.0, %v2.lane.2
%a.lane.8 = fmul double %v1.lane.2, %v2.lane.1
- %a.ins.0 = insertelement <9 x double> undef, double %a.lane.0, i32 0
+ %a.ins.0 = insertelement <9 x double> zeroinitializer, double %a.lane.0, i32 0
%a.ins.1 = insertelement <9 x double> %a.ins.0, double %a.lane.1, i32 1
%a.ins.2 = insertelement <9 x double> %a.ins.1, double %a.lane.2, i32 2
%a.ins.3 = insertelement <9 x double> %a.ins.2, double %a.lane.3, i32 3
@@ -458,7 +466,7 @@ bb:
%b.lane.7 = fmul double %v1.lane.4, %v2.lane.2
%b.lane.8 = fmul double %v1.lane.5, %v2.lane.0
- %b.ins.0 = insertelement <9 x double> undef, double %b.lane.0, i32 0
+ %b.ins.0 = insertelement <9 x double> zeroinitializer, double %b.lane.0, i32 0
%b.ins.1 = insertelement <9 x double> %b.ins.0, double %b.lane.1, i32 1
%b.ins.2 = insertelement <9 x double> %b.ins.1, double %b.lane.2, i32 2
%b.ins.3 = insertelement <9 x double> %b.ins.2, double %b.lane.3, i32 3
@@ -490,12 +498,14 @@ define void @first_and_second_mul_chain_jumbled(ptr %ptr.1, ptr %ptr.2) {
; CHECK-NEXT: [[TMP2:%.*]] = fmul <8 x double> [[TMP0]], [[TMP1]]
; CHECK-NEXT: [[A_LANE_8:%.*]] = fmul double [[V1_LANE_2]], [[V2_LANE_0]]
; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <8 x double> [[TMP2]], <8 x double> poison, <9 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 poison>
-; CHECK-NEXT: [[A_INS_8:%.*]] = insertelement <9 x double> [[TMP3]], double [[A_LANE_8]], i32 8
+; CHECK-NEXT: [[A_INS_72:%.*]] = shufflevector <9 x double> zeroinitializer, <9 x double> [[TMP3]], <9 x i32> <i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 8>
+; CHECK-NEXT: [[A_INS_8:%.*]] = insertelement <9 x double> [[A_INS_72]], double [[A_LANE_8]], i32 8
; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <9 x double> [[V_1]], <9 x double> poison, <8 x i32> <i32 7, i32 6, i32 8, i32 1, i32 0, i32 3, i32 2, i32 5>
; CHECK-NEXT: [[TMP6:%.*]] = fmul <8 x double> [[TMP4]], [[TMP5]]
; CHECK-NEXT: [[B_LANE_8:%.*]] = fmul double [[V1_LANE_4]], [[V2_LANE_2]]
; CHECK-NEXT: [[TMP7:%.*]] = shufflevector <8 x double> [[TMP6]], <8 x double> poison, <9 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 poison>
-; CHECK-NEXT: [[B_INS_8:%.*]] = insertelement <9 x double> [[TMP7]], double [[B_LANE_8]], i32 8
+; CHECK-NEXT: [[B_INS_71:%.*]] = shufflevector <9 x double> zeroinitializer, <9 x double> [[TMP7]], <9 x i32> <i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 8>
+; CHECK-NEXT: [[B_INS_8:%.*]] = insertelement <9 x double> [[B_INS_71]], double [[B_LANE_8]], i32 8
; CHECK-NEXT: [[RES:%.*]] = fsub <9 x double> [[A_INS_8]], [[B_INS_8]]
; CHECK-NEXT: store <9 x double> [[RES]], ptr [[PTR_1]], align 8
; CHECK-NEXT: ret void
@@ -527,7 +537,7 @@ bb:
%a.lane.7 = fmul double %v1.lane.0, %v2.lane.1
%a.lane.8 = fmul double %v1.lane.2, %v2.lane.0
- %a.ins.0 = insertelement <9 x double> undef, double %a.lane.0, i32 0
+ %a.ins.0 = insertelement <9 x double> zeroinitializer, double %a.lane.0, i32 0
%a.ins.1 = insertelement <9 x double> %a.ins.0, double %a.lane.1, i32 1
%a.ins.2 = insertelement <9 x double> %a.ins.1, double %a.lane.2, i32 2
%a.ins.3 = insertelement <9 x double> %a.ins.2, double %a.lane.3, i32 3
@@ -547,7 +557,7 @@ bb:
%b.lane.7 = fmul double %v1.lane.5, %v2.lane.0
%b.lane.8 = fmul double %v1.lane.4, %v2.lane.2
- %b.ins.0 = insertelement <9 x double> undef, double %b.lane.0, i32 0
+ %b.ins.0 = insertelement <9 x double> zeroinitializer, double %b.lane.0, i32 0
%b.ins.1 = insertelement <9 x double> %b.ins.0, double %b.lane.1, i32 1
%b.ins.2 = insertelement <9 x double> %b.ins.1, double %b.lane.2, i32 2
%b.ins.3 = insertelement <9 x double> %b.ins.2, double %b.lane.3, i32 3
diff --git a/llvm/test/Transforms/SLPVectorizer/X86/hadd.ll b/llvm/test/Transforms/SLPVectorizer/X86/hadd.ll
index e30f84e4f17b67..b83d35541bbae3 100644
--- a/llvm/test/Transforms/SLPVectorizer/X86/hadd.ll
+++ b/llvm/test/Transforms/SLPVectorizer/X86/hadd.ll
@@ -23,7 +23,7 @@ define <2 x double> @test_v2f64(<2 x double> %a, <2 x double> %b) {
%b1 = extractelement <2 x double> %b, i32 1
%r0 = fadd double %a0, %a1
%r1 = fadd double %b0, %b1
- %r00 = insertelement <2 x double> undef, double %r0, i32 0
+ %r00 = insertelement <2 x double> zeroinitializer, double %r0, i32 0
%r01 = insertelement <2 x double> %r00, double %r1, i32 1
ret <2 x double> %r01
}
@@ -47,7 +47,7 @@ define <4 x float> @test_v4f32(<4 x float> %a, <4 x float> %b) {
%r1 = fadd float %a2, %a3
%r2 = fadd float %b0, %b1
%r3 = fadd float %b2, %b3
- %r00 = insertelement <4 x float> undef, float %r0, i32 0
+ %r00 = insertelement <4 x float> zeroinitializer, float %r0, i32 0
%r01 = insertelement <4 x float> %r00, float %r1, i32 1
%r02 = insertelement <4 x float> %r01, float %r2, i32 2
%r03 = insertelement <4 x float> %r02, float %r3, i32 3
@@ -67,7 +67,7 @@ define <2 x i64> @test_v2i64(<2 x i64> %a, <2 x i64> %b) {
%b1 = extractelement <2 x i64> %b, i32 1
%r0 = add i64 %a0, %a1
%r1 = add i64 %b0, %b1
- %r00 = insertelement <2 x i64> undef, i64 %r0, i32 0
+ %r00 = insertelement <2 x i64> zeroinitializer, i64 %r0, i32 0
%r01 = insertelement <2 x i64> %r00, i64 %r1, i32 1
ret <2 x i64> %r01
}
@@ -91,7 +91,7 @@ define <4 x i32> @test_v4i32(<4 x i32> %a, <4 x i32> %b) {
%r1 = add i32 %a2, %a3
%r2 = add i32 %b0, %b1
%r3 = add i32 %b2, %b3
- %r00 = insertelement <4 x i32> undef, i32 %r0, i32 0
+ %r00 = insertelement <4 x i32> zeroinitializer, i32 %r0, i32 0
%r01 = insertelement <4 x i32> %r00, i32 %r1, i32 1
%r02 = insertelement <4 x i32> %r01, i32 %r2, i32 2
%r03 = insertelement <4 x i32> %r02, i32 %r3, i32 3
@@ -129,7 +129,7 @@ define <8 x i16> @test_v8i16(<8 x i16> %a, <8 x i16> %b) {
%r5 = add i16 %b2, %b3
%r6 = add i16 %b4, %b5
%r7 = add i16 %b6, %b7
- %r00 = insertelement <8 x i16> undef, i16 %r0, i32 0
+ %r00 = insertelement <8 x i16> zeroinitializer, i16 %r0, i32 0
%r01 = insertelement <8 x i16> %r00, i16 %r1, i32 1
%r02 = insertelement <8 x i16> %r01, i16 %r2, i32 2
%r03 = insertelement <8 x i16> %r02, i16 %r3, i32 3
@@ -204,7 +204,7 @@ define <4 x double> @test_v4f64(<4 x double> %a, <4 x double> %b) {
%r1 = fadd double %b0, %b1
%r2 = fadd double %a2, %a3
%r3 = fadd double %b2, %b3
- %r00 = insertelement <4 x double> undef, double %r0, i32 0
+ %r00 = insertelement <4 x double> zeroinitializer, double %r0, i32 0
%r01 = insertelement <4 x double> %r00, double %r1, i32 1
%r02 = insertelement <4 x double> %r01, double %r2, i32 2
%r03 = insertelement <4 x double> %r02, double %r3, i32 3
@@ -213,16 +213,41 @@ define <4 x double> @test_v4f64(<4 x double> %a, <4 x double> %b) {
; PR50392
define <4 x double> @test_v4f64_partial_swizzle(<4 x double> %a, <4 x double> %b) {
-; CHECK-LABEL: @test_v4f64_partial_swizzle(
-; CHECK-NEXT: [[B2:%.*]] = extractelement <4 x double> [[B:%.*]], i64 2
-; CHECK-NEXT: [[B3:%.*]] = extractelement <4 x double> [[B]], i64 3
-; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x double> [[A:%.*]], <4 x double> [[B]], <2 x i32> <i32 0, i32 4>
-; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <4 x double> [[A]], <4 x double> [[B]], <2 x i32> <i32 1, i32 5>
-; CHECK-NEXT: [[TMP3:%.*]] = fadd <2 x double> [[TMP1]], [[TMP2]]
-; CHECK-NEXT: [[R3:%.*]] = fadd double [[B2]], [[B3]]
-; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <2 x double> [[TMP3]], <2 x double> <double undef, double poison>, <4 x i32> <i32 0, i32 2, i32 1, i32 poison>
-; CHECK-NEXT: [[R03:%.*]] = insertelement <4 x double> [[TMP4]], double [[R3]], i64 3
-; CHECK-NEXT: ret <4 x double> [[R03]]
+; SSE-LABEL: @test_v4f64_partial_swizzle(
+; SSE-NEXT: [[B2:%.*]] = extractelement <4 x double> [[B:%.*]], i64 2
+; SSE-NEXT: [[B3:%.*]] = extractelement <4 x double> [[B]], i64 3
+; SSE-NEXT: [[TMP1:%.*]] = shufflevector <4 x double> [[A:%.*]], <4 x double> [[B]], <2 x i32> <i32 0, i32 4>
+; SSE-NEXT: [[TMP2:%.*]] = shufflevector <4 x double> [[A]], <4 x double> [[B]], <2 x i32> <i32 1, i32 5>
+; SSE-NEXT: [[TMP3:%.*]] = fadd <2 x double> [[TMP1]], [[TMP2]]
+; SSE-NEXT: [[R3:%.*]] = fadd double [[B2]], [[B3]]
+; SSE-NEXT: [[TMP4:%.*]] = shufflevector <2 x double> [[TMP3]], <2 x double> poison, <4 x i32> <i32 0, i32 poison, i32 1, i32 poison>
+; SSE-NEXT: [[R0212:%.*]] = insertelement <4 x double> [[TMP4]], double 0.000000e+00, i64 1
+; SSE-NEXT: [[R03:%.*]] = insertelement <4 x double> [[R0212]], double [[R3]], i64 3
+; SSE-NEXT: ret <4 x double> [[R03]]
+;
+; SLM-LABEL: @test_v4f64_partial_swizzle(
+; SLM-NEXT: [[A0:%.*]] = extractelement <4 x double> [[A:%.*]], i64 0
+; SLM-NEXT: [[A1:%.*]] = extractelement <4 x double> [[A]], i64 1
+; SLM-NEXT: [[R0:%.*]] = fadd double [[A0]], [[A1]]
+; SLM-NEXT: [[TMP1:%.*]] = shufflevector <4 x double> [[B:%.*]], <4 x double> poison, <2 x i32> <i32 1, i32 2>
+; SLM-NEXT: [[TMP2:%.*]] = shufflevector <4 x double> [[B]], <4 x double> poison, <2 x i32> <i32 0, i32 3>
+; SLM-NEXT: [[TMP3:%.*]] = fadd <2 x double> [[TMP1]], [[TMP2]]
+; SLM-NEXT: [[R00:%.*]] = insertelement <4 x double> <double poison, double 0.000000e+00, double poison, double poison>, double [[R0]], i64 0
+; SLM-NEXT: [[TMP4:%.*]] = shufflevector <2 x double> [[TMP3]], <2 x double> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>
+; SLM-NEXT: [[R031:%.*]] = shufflevector <4 x double> [[R00]], <4 x double> [[TMP4]], <4 x i32> <i32 0, i32 1, i32 4, i32 5>
+; SLM-NEXT: ret <4 x double> [[R031]]
+;
+; AVX-LABEL: @test_v4f64_partial_swizzle(
+; AVX-NEXT: [[B2:%.*]] = extractelement <4 x double> [[B:%.*]], i64 2
+; AVX-NEXT: [[B3:%.*]] = extractelement <4 x double> [[B]], i64 3
+; AVX-NEXT: [[TMP1:%.*]] = shufflevector <4 x double> [[A:%.*]], <4 x double> [[B]], <2 x i32> <i32 0, i32 4>
+; AVX-NEXT: [[TMP2:%.*]] = shufflevector <4 x double> [[A]], <4 x double> [[B]], <2 x i32> <i32 1, i32 5>
+; AVX-NEXT: [[TMP3:%.*]] = fadd <2 x double> [[TMP1]], [[TMP2]]
+; AVX-NEXT: [[R3:%.*]] = fadd double [[B2]], [[B3]]
+; AVX-NEXT: [[TMP4:%.*]] = shufflevector <2 x double> [[TMP3]], <2 x double> poison, <4 x i32> <i32 0, i32 poison, i32 1, i32 poison>
+; AVX-NEXT: [[R0212:%.*]] = insertelement <4 x double> [[TMP4]], double 0.000000e+00, i64 1
+; AVX-NEXT: [[R03:%.*]] = insertelement <4 x double> [[R0212]], double [[R3]], i64 3
+; AVX-NEXT: ret <4 x double> [[R03]]
;
%a0 = extractelement <4 x double> %a, i64 0
%a1 = extractelement <4 x double> %a, i64 1
@@ -233,7 +258,7 @@ define <4 x double> @test_v4f64_partial_swizzle(<4 x double> %a, <4 x double> %b
%r0 = fadd double %a0, %a1
%r2 = fadd double %b0, %b1
%r3 = fadd double %b2, %b3
- %r00 = insertelement <4 x double> undef, double %r0, i32 0
+ %r00 = insertelement <4 x double> zeroinitializer, double %r0, i32 0
%r02 = insertelement <4 x double> %r00, double %r2, i32 2
%r03 = insertelement <4 x double> %r02, double %r3, i32 3
ret <4 x double> %r03
@@ -290,7 +315,7 @@ define <8 x float> @test_v8f32(<8 x float> %a, <8 x float> %b) {
%r5 = fadd float %a6, %a7
%r6 = fadd float %b4, %b5
%r7 = fadd float %b6, %b7
- %r00 = insertelement <8 x float> undef, float %r0, i32 0
+ %r00 = insertelement <8 x float> zeroinitializer, float %r0, i32 0
%r01 = insertelement <8 x float> %r00, float %r1, i32 1
%r02 = insertelement <8 x float> %r01, float %r2, i32 2
%r03 = insertelement <8 x float> %r02, float %r3, i32 3
@@ -340,7 +365,7 @@ define <4 x i64> @test_v4i64(<4 x i64> %a, <4 x i64> %b) {
%r1 = add i64 %b0, %b1
%r2 = add i64 %a2, %a3
%r3 = add i64 %b2, %b3
- %r00 = insertelement <4 x i64> undef, i64 %r0, i32 0
+ %r00 = insertelement <4 x i64> zeroinitializer, i64 %r0, i32 0
%r01 = insertelement <4 x i64> %r00, i64 %r1, i32 1
%r02 = insertelement <4 x i64> %r01, i64 %r2, i32 2
%r03 = insertelement <4 x i64> %r02, i64 %r3, i32 3
@@ -398,7 +423,7 @@ define <8 x i32> @test_v8i32(<8 x i32> %a, <8 x i32> %b) {
%r5 = add i32 %a6, %a7
%r6 = add i32 %b4, %b5
%r7 = add i32 %b6, %b7
- %r00 = insertelement <8 x i32> undef, i32 %r0, i32 0
+ %r00 = insertelement <8 x i32> zeroinitializer, i32 %r0, i32 0
%r01 = insertelement <8 x i32> %r00, i32 %r1, i32 1
%r02 = insertelement <8 x i32> %r01, i32 %r2, i32 2
%r03 = insertelement <8 x i32> %r02, i32 %r3, i32 3
@@ -484,7 +509,7 @@ define <16 x i16> @test_v16i16(<16 x i16> %a, <16 x i16> %b) {
%r13 = add i16 %b10, %b11
%r14 = add i16 %b12, %b13
%r15 = add i16 %b14, %b15
- %rv0 = insertelement <16 x i16> undef, i16 %r0 , i32 0
+ %rv0 = insertelement <16 x i16> zeroinitializer, i16 %r0 , i32 0
%rv1 = insertelement <16 x i16> %rv0 , i16 %r1 , i32 1
%rv2 = insertelement <16 x i16> %rv1 , i16 %r2 , i32 2
%rv3 = insertelement <16 x i16> %rv2 , i16 %r3 , i32 3
diff --git a/llvm/test/Transforms/SLPVectorizer/X86/sitofp.ll b/llvm/test/Transforms/SLPVectorizer/X86/sitofp.ll
index 1c56eb2f2ce367..ad0027330868c6 100644
--- a/llvm/test/Transforms/SLPVectorizer/X86/sitofp.ll
+++ b/llvm/test/Transforms/SLPVectorizer/X86/sitofp.ll
@@ -1093,8 +1093,9 @@ define <4 x double> @sitofp_4xi32_4f64(i32 %a0, i32 %a1, i32 %a2, i32 %a3) #0 {
; SSE-NEXT: [[TMP5:%.*]] = insertelement <2 x i32> [[TMP4]], i32 [[A3:%.*]], i32 1
; SSE-NEXT: [[TMP6:%.*]] = sitofp <2 x i32> [[TMP5]] to <2 x double>
; SSE-NEXT: [[TMP7:%.*]] = shufflevector <2 x double> [[TMP3]], <2 x double> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>
+; SSE-NEXT: [[RES11:%.*]] = shufflevector <4 x double> zeroinitializer, <4 x double> [[TMP7]], <4 x i32> <i32 4, i32 5, i32 2, i32 3>
; SSE-NEXT: [[TMP8:%.*]] = shufflevector <2 x double> [[TMP6]], <2 x double> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>
-; SSE-NEXT: [[RES31:%.*]] = shufflevector <4 x double> [[TMP7]], <4 x double> [[TMP8]], <4 x i32> <i32 0, i32 1, i32 4, i32 5>
+; SSE-NEXT: [[RES31:%.*]] = shufflevector <4 x double> [[RES11]], <4 x double> [[TMP8]], <4 x i32> <i32 0, i32 1, i32 4, i32 5>
; SSE-NEXT: ret <4 x double> [[RES31]]
;
; AVX-LABEL: @sitofp_4xi32_4f64(
@@ -1109,7 +1110,7 @@ define <4 x double> @sitofp_4xi32_4f64(i32 %a0, i32 %a1, i32 %a2, i32 %a3) #0 {
%cvt1 = sitofp i32 %a1 to double
%cvt2 = sitofp i32 %a2 to double
%cvt3 = sitofp i32 %a3 to double
- %res0 = insertelement <4 x double> undef, double %cvt0, i32 0
+ %res0 = insertelement <4 x double> zeroinitializer, double %cvt0, i32 0
%res1 = insertelement <4 x double> %res0, double %cvt1, i32 1
%res2 = insertelement <4 x double> %res1, double %cvt2, i32 2
%res3 = insertelement <4 x double> %res2, double %cvt3, i32 3
@@ -1121,30 +1122,31 @@ define <4 x double> @sitofp_with_const_4xi32_4f64(i32 %a2, i32 %a3) #0 {
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x i32> poison, i32 [[A2:%.*]], i32 0
; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x i32> [[TMP1]], i32 [[A3:%.*]], i32 1
; CHECK-NEXT: [[TMP3:%.*]] = sitofp <2 x i32> [[TMP2]] to <2 x double>
-; CHECK-NEXT: [[RES0:%.*]] = insertelement <4 x double> undef, double 1.000000e+00, i32 3
-; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <2 x double> [[TMP3]], <2 x double> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 poison>
+; CHECK-NEXT: [[RES0:%.*]] = insertelement <4 x double> zeroinitializer, double 1.000000e+00, i32 3
+; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <2 x double> [[TMP3]], <2 x double> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>
; CHECK-NEXT: [[RES31:%.*]] = shufflevector <4 x double> [[RES0]], <4 x double> [[TMP4]], <4 x i32> <i32 4, i32 5, i32 2, i32 3>
; CHECK-NEXT: ret <4 x double> [[RES31]]
;
%cvt2 = sitofp i32 %a2 to double
%cvt3 = sitofp i32 %a3 to double
- %res0 = insertelement <4 x double> undef, double 1.0, i32 3
+ %res0 = insertelement <4 x double> zeroinitializer, double 1.0, i32 3
%res2 = insertelement <4 x double> %res0, double %cvt2, i32 0
%res3 = insertelement <4 x double> %res2, double %cvt3, i32 1
ret <4 x double> %res3
}
-define <4 x double> @sitofp_with_undef_4xi32_4f64(i32 %a2, i32 %a3) #0 {
-; CHECK-LABEL: @sitofp_with_undef_4xi32_4f64(
+define <4 x double> @sitofp_with_zeroinitializer_4xi32_4f64(i32 %a2, i32 %a3) #0 {
+; CHECK-LABEL: @sitofp_with_zeroinitializer_4xi32_4f64(
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x i32> poison, i32 [[A2:%.*]], i32 0
; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x i32> [[TMP1]], i32 [[A3:%.*]], i32 1
; CHECK-NEXT: [[TMP3:%.*]] = sitofp <2 x i32> [[TMP2]] to <2 x double>
-; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <2 x double> [[TMP3]], <2 x double> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
+; CHECK-NEXT: [[TMP5:%.*]] = shufflevector <2 x double> [[TMP3]], <2 x double> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>
+; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <4 x double> zeroinitializer, <4 x double> [[TMP5]], <4 x i32> <i32 4, i32 5, i32 2, i32 3>
; CHECK-NEXT: ret <4 x double> [[TMP4]]
;
%cvt2 = sitofp i32 %a2 to double
%cvt3 = sitofp i32 %a3 to double
- %res2 = insertelement <4 x double> undef, double %cvt2, i32 0
+ %res2 = insertelement <4 x double> zeroinitializer, double %cvt2, i32 0
%res3 = insertelement <4 x double> %res2, double %cvt3, i32 1
ret <4 x double> %res3
}
@@ -1162,7 +1164,7 @@ define <4 x float> @sitofp_4xi32_4f32(i32 %a0, i32 %a1, i32 %a2, i32 %a3) #0 {
%cvt1 = sitofp i32 %a1 to float
%cvt2 = sitofp i32 %a2 to float
%cvt3 = sitofp i32 %a3 to float
- %res0 = insertelement <4 x float> undef, float %cvt0, i32 0
+ %res0 = insertelement <4 x float> zeroinitializer, float %cvt0, i32 0
%res1 = insertelement <4 x float> %res0, float %cvt1, i32 1
%res2 = insertelement <4 x float> %res1, float %cvt2, i32 2
%res3 = insertelement <4 x float> %res2, float %cvt3, i32 3
diff --git a/llvm/test/Transforms/SLPVectorizer/X86/value-bug.ll b/llvm/test/Transforms/SLPVectorizer/X86/value-bug.ll
index c5cdcdc1eb1a59..3c34abcdd36a6f 100644
--- a/llvm/test/Transforms/SLPVectorizer/X86/value-bug.ll
+++ b/llvm/test/Transforms/SLPVectorizer/X86/value-bug.ll
@@ -13,27 +13,27 @@ define void @test(i1 %arg) {
; CHECK-NEXT: bb279:
; CHECK-NEXT: br label [[BB283:%.*]]
; CHECK: bb283:
-; CHECK-NEXT: [[TMP0:%.*]] = phi <2 x float> [ undef, [[BB279:%.*]] ], [ [[TMP11:%.*]], [[EXIT:%.*]] ]
-; CHECK-NEXT: [[TMP1:%.*]] = phi <2 x float> [ undef, [[BB279]] ], [ undef, [[EXIT]] ]
+; CHECK-NEXT: [[TMP0:%.*]] = phi <2 x float> [ zeroinitializer, [[BB279:%.*]] ], [ [[TMP11:%.*]], [[EXIT:%.*]] ]
+; CHECK-NEXT: [[TMP1:%.*]] = phi <2 x float> [ zeroinitializer, [[BB279]] ], [ zeroinitializer, [[EXIT]] ]
; CHECK-NEXT: br label [[BB284:%.*]]
; CHECK: bb284:
; CHECK-NEXT: [[TMP2:%.*]] = fpext <2 x float> [[TMP0]] to <2 x double>
-; CHECK-NEXT: [[TMP3:%.*]] = fsub <2 x double> [[TMP2]], undef
-; CHECK-NEXT: [[TMP4:%.*]] = fsub <2 x double> [[TMP3]], undef
+; CHECK-NEXT: [[TMP3:%.*]] = fsub <2 x double> [[TMP2]], zeroinitializer
+; CHECK-NEXT: [[TMP4:%.*]] = fsub <2 x double> [[TMP3]], zeroinitializer
; CHECK-NEXT: br label [[BB21_I:%.*]]
; CHECK: bb21.i:
-; CHECK-NEXT: br i1 %arg, label [[BB22_I:%.*]], label [[EXIT]]
+; CHECK-NEXT: br i1 [[ARG:%.*]], label [[BB22_I:%.*]], label [[EXIT]]
; CHECK: bb22.i:
-; CHECK-NEXT: [[TMP5:%.*]] = fadd <2 x double> undef, [[TMP4]]
+; CHECK-NEXT: [[TMP5:%.*]] = fadd <2 x double> zeroinitializer, [[TMP4]]
; CHECK-NEXT: br label [[BB32_I:%.*]]
; CHECK: bb32.i:
; CHECK-NEXT: [[TMP6:%.*]] = phi <2 x double> [ [[TMP5]], [[BB22_I]] ], [ zeroinitializer, [[BB32_I]] ]
-; CHECK-NEXT: br i1 %arg, label [[BB32_I]], label [[BB21_I]]
+; CHECK-NEXT: br i1 [[ARG]], label [[BB32_I]], label [[BB21_I]]
; CHECK: exit:
; CHECK-NEXT: [[TMP7:%.*]] = fpext <2 x float> [[TMP1]] to <2 x double>
-; CHECK-NEXT: [[TMP8:%.*]] = fmul <2 x double> [[TMP7]], <double undef, double 0.000000e+00>
-; CHECK-NEXT: [[TMP9:%.*]] = fadd <2 x double> undef, [[TMP8]]
-; CHECK-NEXT: [[TMP10:%.*]] = fadd <2 x double> [[TMP9]], undef
+; CHECK-NEXT: [[TMP8:%.*]] = fmul <2 x double> [[TMP7]], zeroinitializer
+; CHECK-NEXT: [[TMP9:%.*]] = fadd <2 x double> zeroinitializer, [[TMP8]]
+; CHECK-NEXT: [[TMP10:%.*]] = fadd <2 x double> [[TMP9]], zeroinitializer
; CHECK-NEXT: [[TMP11]] = fptrunc <2 x double> [[TMP10]] to <2 x float>
; CHECK-NEXT: br label [[BB283]]
;
@@ -41,27 +41,27 @@ bb279:
br label %bb283
bb283:
- %Av.sroa.8.0 = phi float [ undef, %bb279 ], [ %tmp315, %exit ]
- %Av.sroa.5.0 = phi float [ undef, %bb279 ], [ %tmp319, %exit ]
- %Av.sroa.3.0 = phi float [ undef, %bb279 ], [ %tmp307, %exit ]
- %Av.sroa.0.0 = phi float [ undef, %bb279 ], [ %tmp317, %exit ]
+ %Av.sroa.8.0 = phi float [ zeroinitializer, %bb279 ], [ %tmp315, %exit ]
+ %Av.sroa.5.0 = phi float [ zeroinitializer, %bb279 ], [ %tmp319, %exit ]
+ %Av.sroa.3.0 = phi float [ zeroinitializer, %bb279 ], [ %tmp307, %exit ]
+ %Av.sroa.0.0 = phi float [ zeroinitializer, %bb279 ], [ %tmp317, %exit ]
br label %bb284
bb284:
%tmp7.i = fpext float %Av.sroa.3.0 to double
- %tmp8.i = fsub double %tmp7.i, undef
- %tmp9.i = fsub double %tmp8.i, undef
+ %tmp8.i = fsub double %tmp7.i, zeroinitializer
+ %tmp9.i = fsub double %tmp8.i, zeroinitializer
%tmp17.i = fpext float %Av.sroa.8.0 to double
- %tmp19.i = fsub double %tmp17.i, undef
- %tmp20.i = fsub double %tmp19.i, undef
+ %tmp19.i = fsub double %tmp17.i, zeroinitializer
+ %tmp20.i = fsub double %tmp19.i, zeroinitializer
br label %bb21.i
bb21.i:
br i1 %arg, label %bb22.i, label %exit
bb22.i:
- %tmp24.i = fadd double undef, %tmp9.i
- %tmp26.i = fadd double undef, %tmp20.i
+ %tmp24.i = fadd double zeroinitializer, %tmp9.i
+ %tmp26.i = fadd double zeroinitializer, %tmp20.i
br label %bb32.i
bb32.i:
@@ -71,17 +71,17 @@ bb32.i:
exit:
%tmp303 = fpext float %Av.sroa.0.0 to double
- %tmp304 = fmul double %tmp303, undef
- %tmp305 = fadd double undef, %tmp304
- %tmp306 = fadd double %tmp305, undef
+ %tmp304 = fmul double %tmp303, zeroinitializer
+ %tmp305 = fadd double zeroinitializer, %tmp304
+ %tmp306 = fadd double %tmp305, zeroinitializer
%tmp307 = fptrunc double %tmp306 to float
%tmp311 = fpext float %Av.sroa.5.0 to double
%tmp312 = fmul double %tmp311, 0.000000e+00
- %tmp313 = fadd double undef, %tmp312
- %tmp314 = fadd double %tmp313, undef
+ %tmp313 = fadd double zeroinitializer, %tmp312
+ %tmp314 = fadd double %tmp313, zeroinitializer
%tmp315 = fptrunc double %tmp314 to float
- %tmp317 = fptrunc double undef to float
- %tmp319 = fptrunc double undef to float
+ %tmp317 = fptrunc double zeroinitializer to float
+ %tmp319 = fptrunc double zeroinitializer to float
br label %bb283
}
@@ -91,13 +91,13 @@ exit:
define <4 x double> @constant_folding() {
; CHECK-LABEL: @constant_folding(
; CHECK-NEXT: entry:
-; CHECK-NEXT: ret <4 x double> <double 2.000000e+00, double 1.000000e+00, double undef, double undef>
+; CHECK-NEXT: ret <4 x double> <double 2.000000e+00, double 1.000000e+00, double 0.000000e+00, double 0.000000e+00>
;
entry:
%t0 = fadd double 1.000000e+00 , 0.000000e+00
%t1 = fadd double 1.000000e+00 , 1.000000e+00
%t2 = fmul double %t0, 1.000000e+00
- %i1 = insertelement <4 x double> undef, double %t2, i32 1
+ %i1 = insertelement <4 x double> zeroinitializer, double %t2, i32 1
%t3 = fmul double %t1, 1.000000e+00
%i2 = insertelement <4 x double> %i1, double %t3, i32 0
ret <4 x double> %i2
diff --git a/llvm/test/Transforms/SLPVectorizer/X86/vectorize-widest-phis.ll b/llvm/test/Transforms/SLPVectorizer/X86/vectorize-widest-phis.ll
index a69849fabcef6a..6a479174777b02 100644
--- a/llvm/test/Transforms/SLPVectorizer/X86/vectorize-widest-phis.ll
+++ b/llvm/test/Transforms/SLPVectorizer/X86/vectorize-widest-phis.ll
@@ -4,26 +4,27 @@
define void @foo(i1 %arg) {
; CHECK-LABEL: @foo(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[CONV:%.*]] = uitofp i16 undef to float
-; CHECK-NEXT: [[SUB:%.*]] = fsub float 6.553500e+04, undef
+; CHECK-NEXT: [[CONV:%.*]] = uitofp i16 0 to float
+; CHECK-NEXT: [[SUB:%.*]] = fsub float 6.553500e+04, 0.000000e+00
; CHECK-NEXT: br label [[BB1:%.*]]
; CHECK: bb1:
-; CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x float> <float poison, float poison, float undef, float undef>, float [[SUB]], i32 0
+; CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x float> <float poison, float poison, float 0.000000e+00, float 0.000000e+00>, float [[SUB]], i32 0
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> [[TMP0]], float [[CONV]], i32 1
; CHECK-NEXT: br label [[BB2:%.*]]
; CHECK: bb2:
; CHECK-NEXT: [[TMP2:%.*]] = phi <4 x float> [ [[TMP1]], [[BB1]] ], [ [[TMP14:%.*]], [[BB3:%.*]] ]
-; CHECK-NEXT: [[TMP3:%.*]] = load double, ptr undef, align 8
-; CHECK-NEXT: br i1 %arg, label [[BB3]], label [[BB4:%.*]]
+; CHECK-NEXT: [[TMP3:%.*]] = load double, ptr null, align 8
+; CHECK-NEXT: br i1 [[ARG:%.*]], label [[BB3]], label [[BB4:%.*]]
; CHECK: bb4:
; CHECK-NEXT: [[TMP4:%.*]] = fpext <4 x float> [[TMP2]] to <4 x double>
-; CHECK-NEXT: [[CONV2:%.*]] = uitofp i16 undef to double
-; CHECK-NEXT: [[TMP5:%.*]] = insertelement <2 x double> <double undef, double poison>, double [[TMP3]], i32 1
-; CHECK-NEXT: [[TMP6:%.*]] = insertelement <2 x double> <double undef, double poison>, double [[CONV2]], i32 1
+; CHECK-NEXT: [[CONV2:%.*]] = uitofp i16 0 to double
+; CHECK-NEXT: [[TMP5:%.*]] = insertelement <2 x double> <double 0.000000e+00, double poison>, double [[TMP3]], i32 1
+; CHECK-NEXT: [[TMP6:%.*]] = insertelement <2 x double> <double 0.000000e+00, double poison>, double [[CONV2]], i32 1
; CHECK-NEXT: [[TMP7:%.*]] = fsub <2 x double> [[TMP5]], [[TMP6]]
; CHECK-NEXT: [[TMP8:%.*]] = fadd <2 x double> [[TMP5]], [[TMP6]]
; CHECK-NEXT: [[TMP9:%.*]] = shufflevector <2 x double> [[TMP7]], <2 x double> [[TMP8]], <2 x i32> <i32 0, i32 3>
-; CHECK-NEXT: [[TMP10:%.*]] = shufflevector <2 x double> [[TMP9]], <2 x double> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
+; CHECK-NEXT: [[TMP15:%.*]] = shufflevector <2 x double> [[TMP9]], <2 x double> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>
+; CHECK-NEXT: [[TMP10:%.*]] = shufflevector <4 x double> <double poison, double poison, double 0.000000e+00, double 0.000000e+00>, <4 x double> [[TMP15]], <4 x i32> <i32 4, i32 5, i32 2, i32 3>
; CHECK-NEXT: [[TMP11:%.*]] = fcmp ogt <4 x double> [[TMP10]], [[TMP4]]
; CHECK-NEXT: [[TMP12:%.*]] = fptrunc <4 x double> [[TMP10]] to <4 x float>
; CHECK-NEXT: [[TMP13:%.*]] = select <4 x i1> [[TMP11]], <4 x float> [[TMP2]], <4 x float> [[TMP12]]
@@ -33,8 +34,8 @@ define void @foo(i1 %arg) {
; CHECK-NEXT: br label [[BB2]]
;
entry:
- %conv = uitofp i16 undef to float
- %sub = fsub float 6.553500e+04, undef
+ %conv = uitofp i16 zeroinitializer to float
+ %sub = fsub float 6.553500e+04, zeroinitializer
br label %bb1
bb1:
@@ -43,28 +44,28 @@ bb1:
bb2:
%0 = phi float [ %sub, %bb1 ], [ %9, %bb3 ]
%1 = phi float [ %conv, %bb1 ], [ %10, %bb3 ]
- %2 = phi float [ undef, %bb1 ], [ %11, %bb3 ]
- %3 = phi float [ undef, %bb1 ], [ %12, %bb3 ]
- %4 = load double, ptr undef, align 8
+ %2 = phi float [ zeroinitializer, %bb1 ], [ %11, %bb3 ]
+ %3 = phi float [ zeroinitializer, %bb1 ], [ %12, %bb3 ]
+ %4 = load double, ptr zeroinitializer, align 8
br i1 %arg, label %bb3, label %bb4
bb4:
%ext = fpext float %3 to double
- %cmp1 = fcmp ogt double undef, %ext
- %5 = fptrunc double undef to float
+ %cmp1 = fcmp ogt double zeroinitializer, %ext
+ %5 = fptrunc double zeroinitializer to float
%sel1 = select i1 %cmp1, float %3, float %5
%ext2 = fpext float %2 to double
- %cmp2 = fcmp ogt double undef, %ext2
- %6 = fptrunc double undef to float
+ %cmp2 = fcmp ogt double zeroinitializer, %ext2
+ %6 = fptrunc double zeroinitializer to float
%sel2 = select i1 %cmp2, float %2, float %6
%ext3 = fpext float %1 to double
- %conv2 = uitofp i16 undef to double
+ %conv2 = uitofp i16 zeroinitializer to double
%add1 = fadd double %4, %conv2
%cmp3 = fcmp ogt double %add1, %ext3
%7 = fptrunc double %add1 to float
%sel3 = select i1 %cmp3, float %1, float %7
%ext4 = fpext float %0 to double
- %sub1 = fsub double undef, undef
+ %sub1 = fsub double zeroinitializer, zeroinitializer
%cmp4 = fcmp ogt double %sub1, %ext4
%8 = fptrunc double %sub1 to float
%sel4 = select i1 %cmp4, float %0, float %8
diff --git a/llvm/test/Transforms/SLPVectorizer/insert-element-build-vector-const-undef.ll b/llvm/test/Transforms/SLPVectorizer/insert-element-build-vector-const.ll
similarity index 81%
rename from llvm/test/Transforms/SLPVectorizer/insert-element-build-vector-const-undef.ll
rename to llvm/test/Transforms/SLPVectorizer/insert-element-build-vector-const.ll
index 48b5145622bdfe..a0e3950e49117a 100644
--- a/llvm/test/Transforms/SLPVectorizer/insert-element-build-vector-const-undef.ll
+++ b/llvm/test/Transforms/SLPVectorizer/insert-element-build-vector-const.ll
@@ -9,7 +9,8 @@ define <4 x float> @simple_select(<4 x float> %a, <4 x float> %b, <4 x i32> %c)
; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <4 x float> [[A:%.*]], <4 x float> poison, <2 x i32> <i32 0, i32 1>
; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <4 x float> [[B:%.*]], <4 x float> poison, <2 x i32> <i32 0, i32 1>
; CHECK-NEXT: [[TMP5:%.*]] = select <2 x i1> [[TMP2]], <2 x float> [[TMP3]], <2 x float> [[TMP4]]
-; CHECK-NEXT: [[TMP6:%.*]] = shufflevector <2 x float> [[TMP5]], <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
+; CHECK-NEXT: [[TMP7:%.*]] = shufflevector <2 x float> [[TMP5]], <2 x float> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>
+; CHECK-NEXT: [[TMP6:%.*]] = shufflevector <4 x float> <float poison, float poison, float 0.000000e+00, float 0.000000e+00>, <4 x float> [[TMP7]], <4 x i32> <i32 4, i32 5, i32 2, i32 3>
; CHECK-NEXT: ret <4 x float> [[TMP6]]
;
%c0 = extractelement <4 x i32> %c, i32 0
@@ -22,7 +23,7 @@ define <4 x float> @simple_select(<4 x float> %a, <4 x float> %b, <4 x i32> %c)
%cmp1 = icmp ne i32 %c1, 0
%s0 = select i1 %cmp0, float %a0, float %b0
%s1 = select i1 %cmp1, float %a1, float %b1
- %ra = insertelement <4 x float> <float poison, float poison, float undef, float undef>, float %s0, i32 0
+ %ra = insertelement <4 x float> <float poison, float poison, float 0.0, float 0.0>, float %s0, i32 0
%rb = insertelement <4 x float> %ra, float %s1, i32 1
ret <4 x float> %rb
}
diff --git a/llvm/test/Transforms/SLPVectorizer/insert-element-build-vector.ll b/llvm/test/Transforms/SLPVectorizer/insert-element-build-vector.ll
index 8e3a941932c976..0b896f4b3a36a4 100644
--- a/llvm/test/Transforms/SLPVectorizer/insert-element-build-vector.ll
+++ b/llvm/test/Transforms/SLPVectorizer/insert-element-build-vector.ll
@@ -32,7 +32,7 @@ define <4 x float> @simple_select(<4 x float> %a, <4 x float> %b, <4 x i32> %c)
%s1 = select i1 %cmp1, float %a1, float %b1
%s2 = select i1 %cmp2, float %a2, float %b2
%s3 = select i1 %cmp3, float %a3, float %b3
- %ra = insertelement <4 x float> undef, float %s0, i32 0
+ %ra = insertelement <4 x float> zeroinitializer, float %s0, i32 0
%rb = insertelement <4 x float> %ra, float %s1, i32 1
%rc = insertelement <4 x float> %rb, float %s2, i32 2
%rd = insertelement <4 x float> %rc, float %s3, i32 3
@@ -43,7 +43,8 @@ define <8 x float> @simple_select2(<4 x float> %a, <4 x float> %b, <4 x i32> %c)
; CHECK-LABEL: @simple_select2(
; CHECK-NEXT: [[TMP1:%.*]] = icmp ne <4 x i32> [[C:%.*]], zeroinitializer
; CHECK-NEXT: [[TMP2:%.*]] = select <4 x i1> [[TMP1]], <4 x float> [[A:%.*]], <4 x float> [[B:%.*]]
-; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <4 x float> [[TMP2]], <4 x float> undef, <8 x i32> <i32 0, i32 4, i32 1, i32 5, i32 2, i32 6, i32 7, i32 3>
+; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <4 x float> [[TMP2]], <4 x float> poison, <8 x i32> <i32 0, i32 poison, i32 1, i32 poison, i32 2, i32 poison, i32 poison, i32 3>
+; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <8 x float> zeroinitializer, <8 x float> [[TMP4]], <8 x i32> <i32 8, i32 1, i32 10, i32 3, i32 12, i32 5, i32 6, i32 15>
; CHECK-NEXT: ret <8 x float> [[TMP3]]
;
%c0 = extractelement <4 x i32> %c, i32 0
@@ -66,7 +67,7 @@ define <8 x float> @simple_select2(<4 x float> %a, <4 x float> %b, <4 x i32> %c)
%s1 = select i1 %cmp1, float %a1, float %b1
%s2 = select i1 %cmp2, float %a2, float %b2
%s3 = select i1 %cmp3, float %a3, float %b3
- %ra = insertelement <8 x float> undef, float %s0, i32 0
+ %ra = insertelement <8 x float> zeroinitializer, float %s0, i32 0
%rb = insertelement <8 x float> %ra, float %s1, i32 2
%rc = insertelement <8 x float> %rb, float %s2, i32 4
%rd = insertelement <8 x float> %rc, float %s3, i32 7
@@ -98,7 +99,7 @@ define <4 x float> @simple_select_eph(<4 x float> %a, <4 x float> %b, <4 x i32>
; THRESHOLD-NEXT: [[S1:%.*]] = select i1 [[CMP1]], float [[A1]], float [[B1]]
; THRESHOLD-NEXT: [[S2:%.*]] = select i1 [[CMP2]], float [[A2]], float [[B2]]
; THRESHOLD-NEXT: [[S3:%.*]] = select i1 [[CMP3]], float [[A3]], float [[B3]]
-; THRESHOLD-NEXT: [[RA:%.*]] = insertelement <4 x float> undef, float [[S0]], i32 0
+; THRESHOLD-NEXT: [[RA:%.*]] = insertelement <4 x float> zeroinitializer, float [[S0]], i32 0
; THRESHOLD-NEXT: [[RB:%.*]] = insertelement <4 x float> [[RA]], float [[S1]], i32 1
; THRESHOLD-NEXT: [[RC:%.*]] = insertelement <4 x float> [[RB]], float [[S2]], i32 2
; THRESHOLD-NEXT: [[RD:%.*]] = insertelement <4 x float> [[RC]], float [[S3]], i32 3
@@ -113,7 +114,7 @@ define <4 x float> @simple_select_eph(<4 x float> %a, <4 x float> %b, <4 x i32>
; THRESHOLD-NEXT: [[Q6:%.*]] = fadd float [[Q4]], [[Q5]]
; THRESHOLD-NEXT: [[QI:%.*]] = fcmp olt float [[Q6]], [[Q5]]
; THRESHOLD-NEXT: call void @llvm.assume(i1 [[QI]])
-; THRESHOLD-NEXT: ret <4 x float> undef
+; THRESHOLD-NEXT: ret <4 x float> zeroinitializer
;
; NOTHRESHOLD-LABEL: @simple_select_eph(
; NOTHRESHOLD-NEXT: [[C0:%.*]] = extractelement <4 x i32> [[C:%.*]], i32 0
@@ -136,7 +137,7 @@ define <4 x float> @simple_select_eph(<4 x float> %a, <4 x float> %b, <4 x i32>
; NOTHRESHOLD-NEXT: [[S1:%.*]] = select i1 [[CMP1]], float [[A1]], float [[B1]]
; NOTHRESHOLD-NEXT: [[S2:%.*]] = select i1 [[CMP2]], float [[A2]], float [[B2]]
; NOTHRESHOLD-NEXT: [[S3:%.*]] = select i1 [[CMP3]], float [[A3]], float [[B3]]
-; NOTHRESHOLD-NEXT: [[RA:%.*]] = insertelement <4 x float> undef, float [[S0]], i32 0
+; NOTHRESHOLD-NEXT: [[RA:%.*]] = insertelement <4 x float> zeroinitializer, float [[S0]], i32 0
; NOTHRESHOLD-NEXT: [[RB:%.*]] = insertelement <4 x float> [[RA]], float [[S1]], i32 1
; NOTHRESHOLD-NEXT: [[RC:%.*]] = insertelement <4 x float> [[RB]], float [[S2]], i32 2
; NOTHRESHOLD-NEXT: [[RD:%.*]] = insertelement <4 x float> [[RC]], float [[S3]], i32 3
@@ -149,7 +150,7 @@ define <4 x float> @simple_select_eph(<4 x float> %a, <4 x float> %b, <4 x i32>
; NOTHRESHOLD-NEXT: [[Q6:%.*]] = fadd float [[Q4]], [[Q5]]
; NOTHRESHOLD-NEXT: [[QI:%.*]] = fcmp olt float [[Q6]], [[Q5]]
; NOTHRESHOLD-NEXT: call void @llvm.assume(i1 [[QI]])
-; NOTHRESHOLD-NEXT: ret <4 x float> undef
+; NOTHRESHOLD-NEXT: ret <4 x float> zeroinitializer
;
; MINTREESIZE-LABEL: @simple_select_eph(
; MINTREESIZE-NEXT: [[C0:%.*]] = extractelement <4 x i32> [[C:%.*]], i32 0
@@ -176,7 +177,7 @@ define <4 x float> @simple_select_eph(<4 x float> %a, <4 x float> %b, <4 x i32>
; MINTREESIZE-NEXT: [[S1:%.*]] = select i1 [[CMP1]], float [[A1]], float [[B1]]
; MINTREESIZE-NEXT: [[S2:%.*]] = select i1 [[CMP2]], float [[A2]], float [[B2]]
; MINTREESIZE-NEXT: [[S3:%.*]] = select i1 [[CMP3]], float [[A3]], float [[B3]]
-; MINTREESIZE-NEXT: [[RA:%.*]] = insertelement <4 x float> undef, float [[S0]], i32 0
+; MINTREESIZE-NEXT: [[RA:%.*]] = insertelement <4 x float> zeroinitializer, float [[S0]], i32 0
; MINTREESIZE-NEXT: [[RB:%.*]] = insertelement <4 x float> [[RA]], float [[S1]], i32 1
; MINTREESIZE-NEXT: [[RC:%.*]] = insertelement <4 x float> [[RB]], float [[S2]], i32 2
; MINTREESIZE-NEXT: [[RD:%.*]] = insertelement <4 x float> [[RC]], float [[S3]], i32 3
@@ -193,7 +194,7 @@ define <4 x float> @simple_select_eph(<4 x float> %a, <4 x float> %b, <4 x i32>
; MINTREESIZE-NEXT: [[Q6:%.*]] = fadd float [[Q4]], [[Q5]]
; MINTREESIZE-NEXT: [[QI:%.*]] = fcmp olt float [[Q6]], [[Q5]]
; MINTREESIZE-NEXT: call void @llvm.assume(i1 [[QI]])
-; MINTREESIZE-NEXT: ret <4 x float> undef
+; MINTREESIZE-NEXT: ret <4 x float> zeroinitializer
;
%c0 = extractelement <4 x i32> %c, i32 0
%c1 = extractelement <4 x i32> %c, i32 1
@@ -215,7 +216,7 @@ define <4 x float> @simple_select_eph(<4 x float> %a, <4 x float> %b, <4 x i32>
%s1 = select i1 %cmp1, float %a1, float %b1
%s2 = select i1 %cmp2, float %a2, float %b2
%s3 = select i1 %cmp3, float %a3, float %b3
- %ra = insertelement <4 x float> undef, float %s0, i32 0
+ %ra = insertelement <4 x float> zeroinitializer, float %s0, i32 0
%rb = insertelement <4 x float> %ra, float %s1, i32 1
%rc = insertelement <4 x float> %rb, float %s2, i32 2
%rd = insertelement <4 x float> %rc, float %s3, i32 3
@@ -228,7 +229,7 @@ define <4 x float> @simple_select_eph(<4 x float> %a, <4 x float> %b, <4 x i32>
%q6 = fadd float %q4, %q5
%qi = fcmp olt float %q6, %q5
call void @llvm.assume(i1 %qi)
- ret <4 x float> undef
+ ret <4 x float> zeroinitializer
}
; Insert in an order
diff erent from the vector indices to make sure it
@@ -260,7 +261,7 @@ define <4 x float> @simple_select_insert_out_of_order(<4 x float> %a, <4 x float
%s1 = select i1 %cmp1, float %a1, float %b1
%s2 = select i1 %cmp2, float %a2, float %b2
%s3 = select i1 %cmp3, float %a3, float %b3
- %ra = insertelement <4 x float> undef, float %s0, i32 2
+ %ra = insertelement <4 x float> zeroinitializer, float %s0, i32 2
%rb = insertelement <4 x float> %ra, float %s1, i32 1
%rc = insertelement <4 x float> %rb, float %s2, i32 0
%rd = insertelement <4 x float> %rc, float %s3, i32 3
@@ -298,7 +299,7 @@ define <4 x float> @simple_select_users(<4 x float> %a, <4 x float> %b, <4 x i32
%s1 = select i1 %cmp1, float %a1, float %b1
%s2 = select i1 %cmp2, float %a2, float %b2
%s3 = select i1 %cmp3, float %a3, float %b3
- %ra = insertelement <4 x float> undef, float %s0, i32 0
+ %ra = insertelement <4 x float> zeroinitializer, float %s0, i32 0
%rb = insertelement <4 x float> %ra, float %s1, i32 1
%rc = insertelement <4 x float> %rb, float %s2, i32 2
%rd = insertelement <4 x float> %rc, float %s3, i32 3
@@ -319,9 +320,10 @@ define <4 x float> @simple_select_no_users(<4 x float> %a, <4 x float> %b, <4 x
; CHECK-NEXT: [[TMP8:%.*]] = shufflevector <4 x float> [[A]], <4 x float> poison, <2 x i32> <i32 2, i32 3>
; CHECK-NEXT: [[TMP9:%.*]] = shufflevector <4 x float> [[B]], <4 x float> poison, <2 x i32> <i32 2, i32 3>
; CHECK-NEXT: [[TMP10:%.*]] = select <2 x i1> [[TMP7]], <2 x float> [[TMP8]], <2 x float> [[TMP9]]
-; CHECK-NEXT: [[TMP11:%.*]] = shufflevector <2 x float> [[TMP5]], <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
+; CHECK-NEXT: [[TMP11:%.*]] = shufflevector <2 x float> [[TMP5]], <2 x float> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>
+; CHECK-NEXT: [[RB2:%.*]] = shufflevector <4 x float> zeroinitializer, <4 x float> [[TMP11]], <4 x i32> <i32 4, i32 5, i32 2, i32 3>
; CHECK-NEXT: [[TMP12:%.*]] = shufflevector <2 x float> [[TMP10]], <2 x float> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>
-; CHECK-NEXT: [[RD1:%.*]] = shufflevector <4 x float> [[TMP12]], <4 x float> undef, <4 x i32> <i32 4, i32 5, i32 0, i32 1>
+; CHECK-NEXT: [[RD1:%.*]] = shufflevector <4 x float> zeroinitializer, <4 x float> [[TMP12]], <4 x i32> <i32 0, i32 1, i32 4, i32 5>
; CHECK-NEXT: ret <4 x float> [[RD1]]
;
%c0 = extractelement <4 x i32> %c, i32 0
@@ -344,9 +346,9 @@ define <4 x float> @simple_select_no_users(<4 x float> %a, <4 x float> %b, <4 x
%s1 = select i1 %cmp1, float %a1, float %b1
%s2 = select i1 %cmp2, float %a2, float %b2
%s3 = select i1 %cmp3, float %a3, float %b3
- %ra = insertelement <4 x float> undef, float %s0, i32 0
+ %ra = insertelement <4 x float> zeroinitializer, float %s0, i32 0
%rb = insertelement <4 x float> %ra, float %s1, i32 1
- %rc = insertelement <4 x float> undef, float %s2, i32 2
+ %rc = insertelement <4 x float> zeroinitializer, float %s2, i32 2
%rd = insertelement <4 x float> %rc, float %s3, i32 3
ret <4 x float> %rd
}
@@ -359,7 +361,7 @@ define <4 x i32> @reconstruct(<4 x i32> %c) #0 {
; CHECK-NEXT: [[C1:%.*]] = extractelement <4 x i32> [[C]], i32 1
; CHECK-NEXT: [[C2:%.*]] = extractelement <4 x i32> [[C]], i32 2
; CHECK-NEXT: [[C3:%.*]] = extractelement <4 x i32> [[C]], i32 3
-; CHECK-NEXT: [[RA:%.*]] = insertelement <4 x i32> undef, i32 [[C0]], i32 0
+; CHECK-NEXT: [[RA:%.*]] = insertelement <4 x i32> zeroinitializer, i32 [[C0]], i32 0
; CHECK-NEXT: [[RB:%.*]] = insertelement <4 x i32> [[RA]], i32 [[C1]], i32 1
; CHECK-NEXT: [[RC:%.*]] = insertelement <4 x i32> [[RB]], i32 [[C2]], i32 2
; CHECK-NEXT: [[RD:%.*]] = insertelement <4 x i32> [[RC]], i32 [[C3]], i32 3
@@ -369,7 +371,7 @@ define <4 x i32> @reconstruct(<4 x i32> %c) #0 {
%c1 = extractelement <4 x i32> %c, i32 1
%c2 = extractelement <4 x i32> %c, i32 2
%c3 = extractelement <4 x i32> %c, i32 3
- %ra = insertelement <4 x i32> undef, i32 %c0, i32 0
+ %ra = insertelement <4 x i32> zeroinitializer, i32 %c0, i32 0
%rb = insertelement <4 x i32> %ra, i32 %c1, i32 1
%rc = insertelement <4 x i32> %rb, i32 %c2, i32 2
%rd = insertelement <4 x i32> %rc, i32 %c3, i32 3
@@ -392,13 +394,13 @@ define <2 x float> @simple_select_v2(<2 x float> %a, <2 x float> %b, <2 x i32> %
%cmp1 = icmp ne i32 %c1, 0
%s0 = select i1 %cmp0, float %a0, float %b0
%s1 = select i1 %cmp1, float %a1, float %b1
- %ra = insertelement <2 x float> undef, float %s0, i32 0
+ %ra = insertelement <2 x float> zeroinitializer, float %s0, i32 0
%rb = insertelement <2 x float> %ra, float %s1, i32 1
ret <2 x float> %rb
}
; Make sure when we construct partial vectors, we don't keep
-; re-visiting the insertelement chains starting with undef
+; re-visiting the insertelement chains starting with zeroinitializer
; (low cost threshold needed to force this to happen)
define <4 x float> @simple_select_partial_vector(<4 x float> %a, <4 x float> %b, <4 x i32> %c) #0 {
; CHECK-LABEL: @simple_select_partial_vector(
@@ -408,16 +410,16 @@ define <4 x float> @simple_select_partial_vector(<4 x float> %a, <4 x float> %b,
; CHECK-NEXT: [[A1:%.*]] = extractelement <4 x float> [[A]], i32 1
; CHECK-NEXT: [[B0:%.*]] = extractelement <4 x float> [[B:%.*]], i32 0
; CHECK-NEXT: [[B1:%.*]] = extractelement <4 x float> [[B]], i32 1
-; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x i32> undef, i32 [[C0]], i32 0
+; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x i32> zeroinitializer, i32 [[C0]], i32 0
; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x i32> [[TMP1]], i32 [[C1]], i32 1
; CHECK-NEXT: [[TMP3:%.*]] = icmp ne <2 x i32> [[TMP2]], zeroinitializer
-; CHECK-NEXT: [[TMP4:%.*]] = insertelement <2 x float> undef, float [[A0]], i32 0
+; CHECK-NEXT: [[TMP4:%.*]] = insertelement <2 x float> zeroinitializer, float [[A0]], i32 0
; CHECK-NEXT: [[TMP5:%.*]] = insertelement <2 x float> [[TMP4]], float [[A1]], i32 1
-; CHECK-NEXT: [[TMP6:%.*]] = insertelement <2 x float> undef, float [[B0]], i32 0
+; CHECK-NEXT: [[TMP6:%.*]] = insertelement <2 x float> zeroinitializer, float [[B0]], i32 0
; CHECK-NEXT: [[TMP7:%.*]] = insertelement <2 x float> [[TMP6]], float [[B1]], i32 1
; CHECK-NEXT: [[TMP8:%.*]] = select <2 x i1> [[TMP3]], <2 x float> [[TMP5]], <2 x float> [[TMP7]]
; CHECK-NEXT: [[TMP9:%.*]] = extractelement <2 x float> [[TMP8]], i32 0
-; CHECK-NEXT: [[RA:%.*]] = insertelement <4 x float> undef, float [[TMP9]], i32 0
+; CHECK-NEXT: [[RA:%.*]] = insertelement <4 x float> zeroinitializer, float [[TMP9]], i32 0
; CHECK-NEXT: [[TMP10:%.*]] = extractelement <2 x float> [[TMP8]], i32 1
; CHECK-NEXT: [[RB:%.*]] = insertelement <4 x float> [[RA]], float [[TMP10]], i32 1
; CHECK-NEXT: ret <4 x float> [[RB]]
@@ -428,16 +430,16 @@ define <4 x float> @simple_select_partial_vector(<4 x float> %a, <4 x float> %b,
%a1 = extractelement <4 x float> %a, i32 1
%b0 = extractelement <4 x float> %b, i32 0
%b1 = extractelement <4 x float> %b, i32 1
- %1 = insertelement <2 x i32> undef, i32 %c0, i32 0
+ %1 = insertelement <2 x i32> zeroinitializer, i32 %c0, i32 0
%2 = insertelement <2 x i32> %1, i32 %c1, i32 1
%3 = icmp ne <2 x i32> %2, zeroinitializer
- %4 = insertelement <2 x float> undef, float %a0, i32 0
+ %4 = insertelement <2 x float> zeroinitializer, float %a0, i32 0
%5 = insertelement <2 x float> %4, float %a1, i32 1
- %6 = insertelement <2 x float> undef, float %b0, i32 0
+ %6 = insertelement <2 x float> zeroinitializer, float %b0, i32 0
%7 = insertelement <2 x float> %6, float %b1, i32 1
%8 = select <2 x i1> %3, <2 x float> %5, <2 x float> %7
%9 = extractelement <2 x float> %8, i32 0
- %ra = insertelement <4 x float> undef, float %9, i32 0
+ %ra = insertelement <4 x float> zeroinitializer, float %9, i32 0
%10 = extractelement <2 x float> %8, i32 1
%rb = insertelement <4 x float> %ra, float %10, i32 1
ret <4 x float> %rb
@@ -453,7 +455,7 @@ define <4 x float> @reschedule_extract(<4 x float> %a, <4 x float> %b) {
%a0 = extractelement <4 x float> %a, i32 0
%b0 = extractelement <4 x float> %b, i32 0
%c0 = fadd float %a0, %b0
- %v0 = insertelement <4 x float> undef, float %c0, i32 0
+ %v0 = insertelement <4 x float> zeroinitializer, float %c0, i32 0
%a1 = extractelement <4 x float> %a, i32 1
%b1 = extractelement <4 x float> %b, i32 1
%c1 = fadd float %a1, %b1
@@ -488,7 +490,7 @@ define <4 x float> @take_credit(<4 x float> %a, <4 x float> %b) {
%a3 = extractelement <4 x float> %a, i32 3
%b3 = extractelement <4 x float> %b, i32 3
%c3 = fadd float %a3, %b3
- %v0 = insertelement <4 x float> undef, float %c0, i32 0
+ %v0 = insertelement <4 x float> zeroinitializer, float %c0, i32 0
%v1 = insertelement <4 x float> %v0, float %c1, i32 1
%v2 = insertelement <4 x float> %v1, float %c2, i32 2
%v3 = insertelement <4 x float> %v2, float %c3, i32 3
@@ -511,7 +513,7 @@ define <4 x double> @multi_tree(double %w, double %x, double %y, double %z) {
%t2 = fadd double %y , 2.000000e+00
%t3 = fadd double %z , 3.000000e+00
%t4 = fmul double %t0, 1.000000e+00
- %i1 = insertelement <4 x double> undef, double %t4, i32 3
+ %i1 = insertelement <4 x double> zeroinitializer, double %t4, i32 3
%t5 = fmul double %t1, 1.000000e+00
%i2 = insertelement <4 x double> %i1, double %t5, i32 2
%t6 = fmul double %t2, 1.000000e+00
@@ -550,7 +552,7 @@ define <8 x float> @_vadd256(<8 x float> %a, <8 x float> %b) local_unnamed_addr
%vecext20 = extractelement <8 x float> %a, i32 7
%vecext21 = extractelement <8 x float> %b, i32 7
%add22 = fadd float %vecext20, %vecext21
- %vecinit.i = insertelement <8 x float> undef, float %add, i32 0
+ %vecinit.i = insertelement <8 x float> zeroinitializer, float %add, i32 0
%vecinit1.i = insertelement <8 x float> %vecinit.i, float %add4, i32 1
%vecinit2.i = insertelement <8 x float> %vecinit1.i, float %add7, i32 2
%vecinit3.i = insertelement <8 x float> %vecinit2.i, float %add10, i32 3
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