[llvm] 8abbd76 - [X86] Regenerate VFPCLASS assembly comments. NFC.

[Simon Pilgrim via llvm-commits]

Author: Simon Pilgrim
Date: 2025-01-17T15:10:52Z
New Revision: 8abbd76cfb14ae4a4cb020dd3eb761ddd1db14d1

URL: https://github.com/llvm/llvm-project/commit/8abbd76cfb14ae4a4cb020dd3eb761ddd1db14d1
DIFF: https://github.com/llvm/llvm-project/commit/8abbd76cfb14ae4a4cb020dd3eb761ddd1db14d1.diff

LOG: [X86] Regenerate VFPCLASS assembly comments. NFC.

Added: 
    

Modified: 
    llvm/test/CodeGen/X86/avx512fp16-fminimum-fmaximum.ll
    llvm/test/CodeGen/X86/avx512fp16-intrinsics.ll
    llvm/test/CodeGen/X86/avx512fp16vl-intrinsics.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/X86/avx512fp16-fminimum-fmaximum.ll b/llvm/test/CodeGen/X86/avx512fp16-fminimum-fmaximum.ll
index 9db57fe68bb420..3ea79c856e1ca9 100644
--- a/llvm/test/CodeGen/X86/avx512fp16-fminimum-fmaximum.ll
+++ b/llvm/test/CodeGen/X86/avx512fp16-fminimum-fmaximum.ll
@@ -41,7 +41,7 @@ define <8 x half> @test_fminimum_v8f16(<8 x half> %x, <8 x half> %y) "no-nans-fp
 define half @test_fminimum_nnan(half %x, half %y) "no-nans-fp-math"="true" {
 ; CHECK-LABEL: test_fminimum_nnan:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    vfpclasssh $5, %xmm1, %k1
+; CHECK-NEXT:    vfpclasssh $5, %xmm1, %k1 # k1 = isQuietNaN(xmm1) | isNegativeZero(xmm1)
 ; CHECK-NEXT:    vmovaps %xmm0, %xmm2
 ; CHECK-NEXT:    vmovsh %xmm1, %xmm0, %xmm2 {%k1}
 ; CHECK-NEXT:    vmovsh %xmm0, %xmm0, %xmm1 {%k1}
@@ -78,7 +78,7 @@ define half @test_fminimum_combine_cmps(half %x, half %y) {
 ; CHECK-LABEL: test_fminimum_combine_cmps:
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    vdivsh %xmm0, %xmm1, %xmm1
-; CHECK-NEXT:    vfpclasssh $5, %xmm0, %k1
+; CHECK-NEXT:    vfpclasssh $5, %xmm0, %k1 # k1 = isQuietNaN(xmm0) | isNegativeZero(xmm0)
 ; CHECK-NEXT:    vmovaps %xmm1, %xmm2
 ; CHECK-NEXT:    vmovsh %xmm0, %xmm0, %xmm2 {%k1}
 ; CHECK-NEXT:    vmovsh %xmm1, %xmm0, %xmm0 {%k1}
@@ -121,7 +121,7 @@ define half @test_fmaximum_nnan(half %x, half %y) {
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    vaddsh %xmm1, %xmm0, %xmm2
 ; CHECK-NEXT:    vsubsh %xmm1, %xmm0, %xmm0
-; CHECK-NEXT:    vfpclasssh $3, %xmm0, %k1
+; CHECK-NEXT:    vfpclasssh $3, %xmm0, %k1 # k1 = isQuietNaN(xmm0) | isPositiveZero(xmm0)
 ; CHECK-NEXT:    vmovaps %xmm2, %xmm1
 ; CHECK-NEXT:    vmovsh %xmm0, %xmm0, %xmm1 {%k1}
 ; CHECK-NEXT:    vmovsh %xmm2, %xmm0, %xmm0 {%k1}
@@ -161,7 +161,7 @@ define half @test_fmaximum_combine_cmps(half %x, half %y) {
 ; CHECK-LABEL: test_fmaximum_combine_cmps:
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    vdivsh %xmm0, %xmm1, %xmm1
-; CHECK-NEXT:    vfpclasssh $3, %xmm0, %k1
+; CHECK-NEXT:    vfpclasssh $3, %xmm0, %k1 # k1 = isQuietNaN(xmm0) | isPositiveZero(xmm0)
 ; CHECK-NEXT:    vmovaps %xmm1, %xmm2
 ; CHECK-NEXT:    vmovsh %xmm0, %xmm0, %xmm2 {%k1}
 ; CHECK-NEXT:    vmovsh %xmm1, %xmm0, %xmm0 {%k1}

diff  --git a/llvm/test/CodeGen/X86/avx512fp16-intrinsics.ll b/llvm/test/CodeGen/X86/avx512fp16-intrinsics.ll
index 40578fe746edb4..85e1890c2b79a3 100644
--- a/llvm/test/CodeGen/X86/avx512fp16-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/avx512fp16-intrinsics.ll
@@ -244,8 +244,8 @@ declare <32 x i1> @llvm.x86.avx512fp16.fpclass.ph.512(<32 x half>, i32)
 define i32 @test_int_x86_avx512_fpclass_ph_512(<32 x half> %x0) {
 ; CHECK-LABEL: test_int_x86_avx512_fpclass_ph_512:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    vfpclassph $2, %zmm0, %k1
-; CHECK-NEXT:    vfpclassph $4, %zmm0, %k0 {%k1}
+; CHECK-NEXT:    vfpclassph $2, %zmm0, %k1 # k1 = isPositiveZero(zmm0)
+; CHECK-NEXT:    vfpclassph $4, %zmm0, %k0 {%k1} # k0 {%k1} = isNegativeZero(zmm0)
 ; CHECK-NEXT:    kmovd %k0, %eax
 ; CHECK-NEXT:    vzeroupper
 ; CHECK-NEXT:    retq
@@ -261,8 +261,8 @@ declare i8 @llvm.x86.avx512fp16.mask.fpclass.sh(<8 x half>, i32, i8)
 define i8 @test_int_x86_avx512_mask_fpclass_sh(<8 x half> %x0) {
 ; CHECK-LABEL: test_int_x86_avx512_mask_fpclass_sh:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    vfpclasssh $4, %xmm0, %k1
-; CHECK-NEXT:    vfpclasssh $2, %xmm0, %k0 {%k1}
+; CHECK-NEXT:    vfpclasssh $4, %xmm0, %k1 # k1 = isNegativeZero(xmm0)
+; CHECK-NEXT:    vfpclasssh $2, %xmm0, %k0 {%k1} # k0 {%k1} = isPositiveZero(xmm0)
 ; CHECK-NEXT:    kmovd %k0, %eax
 ; CHECK-NEXT:    # kill: def $al killed $al killed $eax
 ; CHECK-NEXT:    retq
@@ -274,7 +274,7 @@ define i8 @test_int_x86_avx512_mask_fpclass_sh(<8 x half> %x0) {
 define i8 @test_int_x86_avx512_mask_fpclass_sh_load(ptr %x0ptr) {
 ; CHECK-LABEL: test_int_x86_avx512_mask_fpclass_sh_load:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    vfpclasssh $4, (%rdi), %k0
+; CHECK-NEXT:    vfpclasssh $4, (%rdi), %k0 # k0 = isNegativeZero(mem)
 ; CHECK-NEXT:    kmovd %k0, %eax
 ; CHECK-NEXT:    # kill: def $al killed $al killed $eax
 ; CHECK-NEXT:    retq

diff  --git a/llvm/test/CodeGen/X86/avx512fp16vl-intrinsics.ll b/llvm/test/CodeGen/X86/avx512fp16vl-intrinsics.ll
index a0fc8180e10b9a..47bfea91f58dd1 100644
--- a/llvm/test/CodeGen/X86/avx512fp16vl-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/avx512fp16vl-intrinsics.ll
@@ -1131,7 +1131,7 @@ declare <16 x i1> @llvm.x86.avx512fp16.fpclass.ph.256(<16 x half>, i32)
 define i8 @test_int_x86_avx512_fpclass_ph_128(<8 x half> %x0) {
 ; CHECK-LABEL: test_int_x86_avx512_fpclass_ph_128:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    vfpclassph $2, %xmm0, %k1
+; CHECK-NEXT:    vfpclassph $2, %xmm0, %k1 # k1 = isPositiveZero(xmm0)
 ; CHECK-NEXT:    vfpclassph $4, %xmm0, %k0 {%k1}
 ; CHECK-NEXT:    kmovd %k0, %eax
 ; CHECK-NEXT:    # kill: def $al killed $al killed $eax
@@ -1146,7 +1146,7 @@ define i8 @test_int_x86_avx512_fpclass_ph_128(<8 x half> %x0) {
 define i16 @test_int_x86_avx512_fpclass_ph_256(<16 x half> %x0) {
 ; CHECK-LABEL: test_int_x86_avx512_fpclass_ph_256:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    vfpclassph $2, %ymm0, %k1
+; CHECK-NEXT:    vfpclassph $2, %ymm0, %k1 # k1 = isPositiveZero(ymm0)
 ; CHECK-NEXT:    vfpclassph $4, %ymm0, %k0 {%k1}
 ; CHECK-NEXT:    kmovd %k0, %eax
 ; CHECK-NEXT:    # kill: def $ax killed $ax killed $eax