[llvm] [RISCV][MC] Implement MC for Base P extension (PR #123271)

[Craig Topper via llvm-commits]

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@@ -0,0 +1,1068 @@
+//===-- RISCVInstrInfoP.td - RISC-V 'P' instructions -------*- tablegen -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+//
+// This file describes the RISC-V instructions from the standard 'Base P'
+// Packed SIMD instruction set extension.
+///
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topperc wrote:

Inconsistent number of slashes

https://github.com/llvm/llvm-project/pull/123271