[clang] [llvm] [RISCV][VLS] Support RISCV VLS calling convention (PR #100346)
Kito Cheng via llvm-commits
llvm-commits at lists.llvm.org
Thu Jan 16 19:04:43 PST 2025
================
@@ -359,9 +405,153 @@ ABIArgInfo RISCVABIInfo::coerceAndExpandFPCCEligibleStruct(
return ABIArgInfo::getCoerceAndExpand(CoerceToType, UnpaddedCoerceToType);
}
+bool RISCVABIInfo::detectVLSCCEligibleStruct(QualType Ty, unsigned ABIVLen,
+ llvm::Type *&VLSType) const {
+ // No riscv_vls_cc attribute.
+ if (ABIVLen == 1)
+ return false;
+
+ // Legal struct for VLS calling convention should fulfill following rules:
+ // 1. Struct element should be either "homogeneous fixed-length vectors" or "a
+ // fixed-length vector array".
+ // 2. Number of struct elements or array elements should be power of 2.
+ // 3. Total number of vector registers needed should not exceed 8.
+ //
+ // Examples: Assume ABI_VLEN = 128.
+ // These are legal structs:
+ // a. Structs with 1, 2, 4 or 8 "same" fixed-length vectors, e.g.
+ // struct {
+ // __attribute__((vector_size(16))) int a;
+ // __attribute__((vector_size(16))) int b;
+ // }
+ //
+ // b. Structs with "single" fixed-length vector array with lengh 1, 2, 4
+ // or 8, e.g.
+ // struct {
+ // __attribute__((vector_size(16))) int a[2];
+ // }
+ // These are illegal structs:
+ // a. Structs with 3 fixed-length vectors, e.g.
+ // struct {
+ // __attribute__((vector_size(16))) int a;
+ // __attribute__((vector_size(16))) int b;
+ // __attribute__((vector_size(16))) int c;
+ // }
----------------
kito-cheng wrote:
Non-power-of-2 tuple is legal for RISC-V so I think we should allow that
https://github.com/llvm/llvm-project/pull/100346
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