[llvm] [RISCV][MC] Implement MC for Base P extension (PR #123271)

[Kito Cheng via llvm-commits]

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@@ -1016,6 +1016,39 @@ def HasStdExtSmctrOrSsctr : Predicate<"Subtarget->hasStdExtSmctrOrSsctr()">,
                                "'Smctr' (Control Transfer Records Machine Level) or "
                                "'Ssctr' (Control Transfer Records Supervisor Level)">;
 
+// Packed SIMD Extensions
+def FeatureStdExtP
+    : RISCVExperimentalExtension<1, 0,
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kito-cheng wrote:

I guess that should be 0.12, although the spec define the version in a uncommon way...(012 rather than 0.12)

https://github.com/llvm/llvm-project/pull/123271