[clang] [llvm] [X86][AVX10.2-SATCVT][NFC] Remove NE from intrinsic and instruction name (PR #123275)
via llvm-commits
llvm-commits at lists.llvm.org
Thu Jan 16 18:48:31 PST 2025
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-mc
Author: Phoebe Wang (phoebewang)
<details>
<summary>Changes</summary>
Ref.: https://cdrdv2.intel.com/v1/dl/getContent/828965
---
Patch is 292.06 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/123275.diff
17 Files Affected:
- (modified) clang/include/clang/Basic/BuiltinsX86.td (+12-12)
- (modified) clang/lib/Headers/avx10_2_512satcvtintrin.h (+24-24)
- (modified) clang/lib/Headers/avx10_2satcvtintrin.h (+48-48)
- (modified) clang/test/CodeGen/X86/avx10_2_512satcvt-builtins.c (+48-48)
- (modified) clang/test/CodeGen/X86/avx10_2satcvt-builtins.c (+96-96)
- (modified) llvm/include/llvm/IR/IntrinsicsX86.td (+13-13)
- (modified) llvm/lib/Target/X86/X86InstrAVX10.td (+12-12)
- (modified) llvm/lib/Target/X86/X86IntrinsicsInfo.h (+18-18)
- (modified) llvm/test/CodeGen/X86/avx10_2_512satcvt-intrinsics.ll (+68-68)
- (modified) llvm/test/CodeGen/X86/avx10_2satcvt-intrinsics.ll (+136-136)
- (modified) llvm/test/MC/Disassembler/X86/avx10.2-satcvt-32.txt (+216-216)
- (modified) llvm/test/MC/Disassembler/X86/avx10.2-satcvt-64.txt (+216-216)
- (modified) llvm/test/MC/X86/avx10.2satcvt-32-att.s (+216-216)
- (modified) llvm/test/MC/X86/avx10.2satcvt-32-intel.s (+216-216)
- (modified) llvm/test/MC/X86/avx10.2satcvt-64-att.s (+216-216)
- (modified) llvm/test/MC/X86/avx10.2satcvt-64-intel.s (+216-216)
- (modified) llvm/test/TableGen/x86-fold-tables.inc (+72-72)
``````````diff
diff --git a/clang/include/clang/Basic/BuiltinsX86.td b/clang/include/clang/Basic/BuiltinsX86.td
index 18fc10eb85c027..33a4b4b15c7414 100644
--- a/clang/include/clang/Basic/BuiltinsX86.td
+++ b/clang/include/clang/Basic/BuiltinsX86.td
@@ -4987,27 +4987,27 @@ let Features = "avx10.2-256", Attributes = [NoThrow, RequiredVectorWidth<128>] i
def vminmaxsd_round_mask : X86Builtin<"_Vector<2, double>(_Vector<2, double>, _Vector<2, double>, _Constant int, _Vector<2, double>, unsigned char, _Constant int)">;
def vminmaxsh_round_mask : X86Builtin<"_Vector<8, _Float16>(_Vector<8, _Float16>, _Vector<8, _Float16>, _Constant int, _Vector<8, _Float16>, unsigned char, _Constant int)">;
def vminmaxss_round_mask : X86Builtin<"_Vector<4, float>(_Vector<4, float>, _Vector<4, float>, _Constant int, _Vector<4, float>, unsigned char, _Constant int)">;
- def vcvtnebf162ibs128 : X86Builtin<"_Vector<8, unsigned short>(_Vector<8, __bf16>)">;
+ def vcvtbf162ibs128 : X86Builtin<"_Vector<8, unsigned short>(_Vector<8, __bf16>)">;
}
let Features = "avx10.2-256", Attributes = [NoThrow, RequiredVectorWidth<256>] in {
- def vcvtnebf162ibs256 : X86Builtin<"_Vector<16, unsigned short>(_Vector<16, __bf16>)">;
+ def vcvtbf162ibs256 : X86Builtin<"_Vector<16, unsigned short>(_Vector<16, __bf16>)">;
}
let Features = "avx10.2-512", Attributes = [NoThrow, RequiredVectorWidth<512>] in {
- def vcvtnebf162ibs512 : X86Builtin<"_Vector<32, unsigned short>(_Vector<32, __bf16>)">;
+ def vcvtbf162ibs512 : X86Builtin<"_Vector<32, unsigned short>(_Vector<32, __bf16>)">;
}
let Features = "avx10.2-256", Attributes = [NoThrow, RequiredVectorWidth<128>] in {
- def vcvtnebf162iubs128 : X86Builtin<"_Vector<8, unsigned short>(_Vector<8, __bf16>)">;
+ def vcvtbf162iubs128 : X86Builtin<"_Vector<8, unsigned short>(_Vector<8, __bf16>)">;
}
let Features = "avx10.2-256", Attributes = [NoThrow, RequiredVectorWidth<256>] in {
- def vcvtnebf162iubs256 : X86Builtin<"_Vector<16, unsigned short>(_Vector<16, __bf16>)">;
+ def vcvtbf162iubs256 : X86Builtin<"_Vector<16, unsigned short>(_Vector<16, __bf16>)">;
}
let Features = "avx10.2-512", Attributes = [NoThrow, RequiredVectorWidth<512>] in {
- def vcvtnebf162iubs512 : X86Builtin<"_Vector<32, unsigned short>(_Vector<32, __bf16>)">;
+ def vcvtbf162iubs512 : X86Builtin<"_Vector<32, unsigned short>(_Vector<32, __bf16>)">;
}
let Features = "avx10.2-256", Attributes = [NoThrow, RequiredVectorWidth<128>] in {
@@ -5059,27 +5059,27 @@ let Features = "avx10.2-512", Attributes = [NoThrow, RequiredVectorWidth<512>] i
}
let Features = "avx10.2-256", Attributes = [NoThrow, RequiredVectorWidth<128>] in {
- def vcvttnebf162ibs128 : X86Builtin<"_Vector<8, unsigned short>(_Vector<8, __bf16>)">;
+ def vcvttbf162ibs128 : X86Builtin<"_Vector<8, unsigned short>(_Vector<8, __bf16>)">;
}
let Features = "avx10.2-256", Attributes = [NoThrow, RequiredVectorWidth<256>] in {
- def vcvttnebf162ibs256 : X86Builtin<"_Vector<16, unsigned short>(_Vector<16, __bf16>)">;
+ def vcvttbf162ibs256 : X86Builtin<"_Vector<16, unsigned short>(_Vector<16, __bf16>)">;
}
let Features = "avx10.2-512", Attributes = [NoThrow, RequiredVectorWidth<512>] in {
- def vcvttnebf162ibs512 : X86Builtin<"_Vector<32, unsigned short>(_Vector<32, __bf16>)">;
+ def vcvttbf162ibs512 : X86Builtin<"_Vector<32, unsigned short>(_Vector<32, __bf16>)">;
}
let Features = "avx10.2-256", Attributes = [NoThrow, RequiredVectorWidth<128>] in {
- def vcvttnebf162iubs128 : X86Builtin<"_Vector<8, unsigned short>(_Vector<8, __bf16>)">;
+ def vcvttbf162iubs128 : X86Builtin<"_Vector<8, unsigned short>(_Vector<8, __bf16>)">;
}
let Features = "avx10.2-256", Attributes = [NoThrow, RequiredVectorWidth<256>] in {
- def vcvttnebf162iubs256 : X86Builtin<"_Vector<16, unsigned short>(_Vector<16, __bf16>)">;
+ def vcvttbf162iubs256 : X86Builtin<"_Vector<16, unsigned short>(_Vector<16, __bf16>)">;
}
let Features = "avx10.2-512", Attributes = [NoThrow, RequiredVectorWidth<512>] in {
- def vcvttnebf162iubs512 : X86Builtin<"_Vector<32, unsigned short>(_Vector<32, __bf16>)">;
+ def vcvttbf162iubs512 : X86Builtin<"_Vector<32, unsigned short>(_Vector<32, __bf16>)">;
}
let Features = "avx10.2-256", Attributes = [NoThrow, RequiredVectorWidth<128>] in {
diff --git a/clang/lib/Headers/avx10_2_512satcvtintrin.h b/clang/lib/Headers/avx10_2_512satcvtintrin.h
index 0dadadb6a00bbb..7f41deb5212c5a 100644
--- a/clang/lib/Headers/avx10_2_512satcvtintrin.h
+++ b/clang/lib/Headers/avx10_2_512satcvtintrin.h
@@ -14,56 +14,56 @@
#ifndef __AVX10_2_512SATCVTINTRIN_H
#define __AVX10_2_512SATCVTINTRIN_H
-#define _mm512_ipcvtnebf16_epi8(A) \
- ((__m512i)__builtin_ia32_vcvtnebf162ibs512((__v32bf)(__m512bh)(A)))
+#define _mm512_ipcvtbf16_epi8(A) \
+ ((__m512i)__builtin_ia32_vcvtbf162ibs512((__v32bf)(__m512bh)(A)))
-#define _mm512_mask_ipcvtnebf16_epi8(W, U, A) \
+#define _mm512_mask_ipcvtbf16_epi8(W, U, A) \
((__m512i)__builtin_ia32_selectw_512((__mmask32)(U), \
- (__v32hi)_mm512_ipcvtnebf16_epi8(A), \
+ (__v32hi)_mm512_ipcvtbf16_epi8(A), \
(__v32hi)(__m512i)(W)))
-#define _mm512_maskz_ipcvtnebf16_epi8(U, A) \
+#define _mm512_maskz_ipcvtbf16_epi8(U, A) \
((__m512i)__builtin_ia32_selectw_512((__mmask32)(U), \
- (__v32hi)_mm512_ipcvtnebf16_epi8(A), \
+ (__v32hi)_mm512_ipcvtbf16_epi8(A), \
(__v32hi)_mm512_setzero_si512()))
-#define _mm512_ipcvtnebf16_epu8(A) \
- ((__m512i)__builtin_ia32_vcvtnebf162iubs512((__v32bf)(__m512bh)(A)))
+#define _mm512_ipcvtbf16_epu8(A) \
+ ((__m512i)__builtin_ia32_vcvtbf162iubs512((__v32bf)(__m512bh)(A)))
-#define _mm512_mask_ipcvtnebf16_epu8(W, U, A) \
+#define _mm512_mask_ipcvtbf16_epu8(W, U, A) \
((__m512i)__builtin_ia32_selectw_512((__mmask32)(U), \
- (__v32hi)_mm512_ipcvtnebf16_epu8(A), \
+ (__v32hi)_mm512_ipcvtbf16_epu8(A), \
(__v32hi)(__m512i)(W)))
-#define _mm512_maskz_ipcvtnebf16_epu8(U, A) \
+#define _mm512_maskz_ipcvtbf16_epu8(U, A) \
((__m512i)__builtin_ia32_selectw_512((__mmask32)(U), \
- (__v32hi)_mm512_ipcvtnebf16_epu8(A), \
+ (__v32hi)_mm512_ipcvtbf16_epu8(A), \
(__v32hi)_mm512_setzero_si512()))
-#define _mm512_ipcvttnebf16_epi8(A) \
- ((__m512i)__builtin_ia32_vcvttnebf162ibs512((__v32bf)(__m512bh)(A)))
+#define _mm512_ipcvttbf16_epi8(A) \
+ ((__m512i)__builtin_ia32_vcvttbf162ibs512((__v32bf)(__m512bh)(A)))
-#define _mm512_mask_ipcvttnebf16_epi8(W, U, A) \
+#define _mm512_mask_ipcvttbf16_epi8(W, U, A) \
((__m512i)__builtin_ia32_selectw_512((__mmask32)(U), \
- (__v32hi)_mm512_ipcvttnebf16_epi8(A), \
+ (__v32hi)_mm512_ipcvttbf16_epi8(A), \
(__v32hi)(__m512i)(W)))
-#define _mm512_maskz_ipcvttnebf16_epi8(U, A) \
+#define _mm512_maskz_ipcvttbf16_epi8(U, A) \
((__m512i)__builtin_ia32_selectw_512((__mmask32)(U), \
- (__v32hi)_mm512_ipcvttnebf16_epi8(A), \
+ (__v32hi)_mm512_ipcvttbf16_epi8(A), \
(__v32hi)_mm512_setzero_si512()))
-#define _mm512_ipcvttnebf16_epu8(A) \
- ((__m512i)__builtin_ia32_vcvttnebf162iubs512((__v32bf)(__m512bh)(A)))
+#define _mm512_ipcvttbf16_epu8(A) \
+ ((__m512i)__builtin_ia32_vcvttbf162iubs512((__v32bf)(__m512bh)(A)))
-#define _mm512_mask_ipcvttnebf16_epu8(W, U, A) \
+#define _mm512_mask_ipcvttbf16_epu8(W, U, A) \
((__m512i)__builtin_ia32_selectw_512((__mmask32)(U), \
- (__v32hi)_mm512_ipcvttnebf16_epu8(A), \
+ (__v32hi)_mm512_ipcvttbf16_epu8(A), \
(__v32hi)(__m512i)(W)))
-#define _mm512_maskz_ipcvttnebf16_epu8(U, A) \
+#define _mm512_maskz_ipcvttbf16_epu8(U, A) \
((__m512i)__builtin_ia32_selectw_512((__mmask32)(U), \
- (__v32hi)_mm512_ipcvttnebf16_epu8(A), \
+ (__v32hi)_mm512_ipcvttbf16_epu8(A), \
(__v32hi)_mm512_setzero_si512()))
#define _mm512_ipcvtph_epi8(A) \
diff --git a/clang/lib/Headers/avx10_2satcvtintrin.h b/clang/lib/Headers/avx10_2satcvtintrin.h
index dd5c44fdaf60e1..d16c60e6382df9 100644
--- a/clang/lib/Headers/avx10_2satcvtintrin.h
+++ b/clang/lib/Headers/avx10_2satcvtintrin.h
@@ -14,54 +14,54 @@
#ifndef __AVX10_2SATCVTINTRIN_H
#define __AVX10_2SATCVTINTRIN_H
-#define _mm_ipcvtnebf16_epi8(A) \
- ((__m128i)__builtin_ia32_vcvtnebf162ibs128((__v8bf)(__m128bh)(A)))
+#define _mm_ipcvtbf16_epi8(A) \
+ ((__m128i)__builtin_ia32_vcvtbf162ibs128((__v8bf)(__m128bh)(A)))
-#define _mm_mask_ipcvtnebf16_epi8(W, U, A) \
+#define _mm_mask_ipcvtbf16_epi8(W, U, A) \
((__m128i)__builtin_ia32_selectw_128( \
- (__mmask8)(U), (__v8hi)_mm_ipcvtnebf16_epi8(A), (__v8hi)(__m128i)(W)))
+ (__mmask8)(U), (__v8hi)_mm_ipcvtbf16_epi8(A), (__v8hi)(__m128i)(W)))
-#define _mm_maskz_ipcvtnebf16_epi8(U, A) \
+#define _mm_maskz_ipcvtbf16_epi8(U, A) \
((__m128i)__builtin_ia32_selectw_128((__mmask8)(U), \
- (__v8hi)_mm_ipcvtnebf16_epi8(A), \
+ (__v8hi)_mm_ipcvtbf16_epi8(A), \
(__v8hi)_mm_setzero_si128()))
-#define _mm256_ipcvtnebf16_epi8(A) \
- ((__m256i)__builtin_ia32_vcvtnebf162ibs256((__v16bf)(__m256bh)(A)))
+#define _mm256_ipcvtbf16_epi8(A) \
+ ((__m256i)__builtin_ia32_vcvtbf162ibs256((__v16bf)(__m256bh)(A)))
-#define _mm256_mask_ipcvtnebf16_epi8(W, U, A) \
+#define _mm256_mask_ipcvtbf16_epi8(W, U, A) \
((__m256i)__builtin_ia32_selectw_256((__mmask16)(U), \
- (__v16hi)_mm256_ipcvtnebf16_epi8(A), \
+ (__v16hi)_mm256_ipcvtbf16_epi8(A), \
(__v16hi)(__m256i)(W)))
-#define _mm256_maskz_ipcvtnebf16_epi8(U, A) \
+#define _mm256_maskz_ipcvtbf16_epi8(U, A) \
((__m256i)__builtin_ia32_selectw_256((__mmask16)(U), \
- (__v16hi)_mm256_ipcvtnebf16_epi8(A), \
+ (__v16hi)_mm256_ipcvtbf16_epi8(A), \
(__v16hi)_mm256_setzero_si256()))
-#define _mm_ipcvtnebf16_epu8(A) \
- ((__m128i)__builtin_ia32_vcvtnebf162iubs128((__v8bf)(__m128bh)(A)))
+#define _mm_ipcvtbf16_epu8(A) \
+ ((__m128i)__builtin_ia32_vcvtbf162iubs128((__v8bf)(__m128bh)(A)))
-#define _mm_mask_ipcvtnebf16_epu8(W, U, A) \
+#define _mm_mask_ipcvtbf16_epu8(W, U, A) \
((__m128i)__builtin_ia32_selectw_128( \
- (__mmask8)(U), (__v8hi)_mm_ipcvtnebf16_epu8(A), (__v8hi)(__m128i)(W)))
+ (__mmask8)(U), (__v8hi)_mm_ipcvtbf16_epu8(A), (__v8hi)(__m128i)(W)))
-#define _mm_maskz_ipcvtnebf16_epu8(U, A) \
+#define _mm_maskz_ipcvtbf16_epu8(U, A) \
((__m128i)__builtin_ia32_selectw_128((__mmask8)(U), \
- (__v8hi)_mm_ipcvtnebf16_epu8(A), \
+ (__v8hi)_mm_ipcvtbf16_epu8(A), \
(__v8hi)_mm_setzero_si128()))
-#define _mm256_ipcvtnebf16_epu8(A) \
- ((__m256i)__builtin_ia32_vcvtnebf162iubs256((__v16bf)(__m256bh)(A)))
+#define _mm256_ipcvtbf16_epu8(A) \
+ ((__m256i)__builtin_ia32_vcvtbf162iubs256((__v16bf)(__m256bh)(A)))
-#define _mm256_mask_ipcvtnebf16_epu8(W, U, A) \
+#define _mm256_mask_ipcvtbf16_epu8(W, U, A) \
((__m256i)__builtin_ia32_selectw_256((__mmask16)(U), \
- (__v16hi)_mm256_ipcvtnebf16_epu8(A), \
+ (__v16hi)_mm256_ipcvtbf16_epu8(A), \
(__v16hi)(__m256i)(W)))
-#define _mm256_maskz_ipcvtnebf16_epu8(U, A) \
+#define _mm256_maskz_ipcvtbf16_epu8(U, A) \
((__m256i)__builtin_ia32_selectw_256((__mmask16)(U), \
- (__v16hi)_mm256_ipcvtnebf16_epu8(A), \
+ (__v16hi)_mm256_ipcvtbf16_epu8(A), \
(__v16hi)_mm256_setzero_si256()))
#define _mm_ipcvtph_epi8(A) \
@@ -228,54 +228,54 @@
(__v8su)_mm256_setzero_si256(), \
(__mmask8)(U), (const int)R))
-#define _mm_ipcvttnebf16_epi8(A) \
- ((__m128i)__builtin_ia32_vcvttnebf162ibs128((__v8bf)(__m128bh)(A)))
+#define _mm_ipcvttbf16_epi8(A) \
+ ((__m128i)__builtin_ia32_vcvttbf162ibs128((__v8bf)(__m128bh)(A)))
-#define _mm_mask_ipcvttnebf16_epi8(W, U, A) \
+#define _mm_mask_ipcvttbf16_epi8(W, U, A) \
((__m128i)__builtin_ia32_selectw_128( \
- (__mmask8)(U), (__v8hi)_mm_ipcvttnebf16_epi8(A), (__v8hi)(__m128i)(W)))
+ (__mmask8)(U), (__v8hi)_mm_ipcvttbf16_epi8(A), (__v8hi)(__m128i)(W)))
-#define _mm_maskz_ipcvttnebf16_epi8(U, A) \
+#define _mm_maskz_ipcvttbf16_epi8(U, A) \
((__m128i)__builtin_ia32_selectw_128((__mmask8)(U), \
- (__v8hi)_mm_ipcvttnebf16_epi8(A), \
+ (__v8hi)_mm_ipcvttbf16_epi8(A), \
(__v8hi)_mm_setzero_si128()))
-#define _mm256_ipcvttnebf16_epi8(A) \
- ((__m256i)__builtin_ia32_vcvttnebf162ibs256((__v16bf)(__m256bh)(A)))
+#define _mm256_ipcvttbf16_epi8(A) \
+ ((__m256i)__builtin_ia32_vcvttbf162ibs256((__v16bf)(__m256bh)(A)))
-#define _mm256_mask_ipcvttnebf16_epi8(W, U, A) \
+#define _mm256_mask_ipcvttbf16_epi8(W, U, A) \
((__m256i)__builtin_ia32_selectw_256((__mmask16)(U), \
- (__v16hi)_mm256_ipcvttnebf16_epi8(A), \
+ (__v16hi)_mm256_ipcvttbf16_epi8(A), \
(__v16hi)(__m256i)(W)))
-#define _mm256_maskz_ipcvttnebf16_epi8(U, A) \
+#define _mm256_maskz_ipcvttbf16_epi8(U, A) \
((__m256i)__builtin_ia32_selectw_256((__mmask16)(U), \
- (__v16hi)_mm256_ipcvttnebf16_epi8(A), \
+ (__v16hi)_mm256_ipcvttbf16_epi8(A), \
(__v16hi)_mm256_setzero_si256()))
-#define _mm_ipcvttnebf16_epu8(A) \
- ((__m128i)__builtin_ia32_vcvttnebf162iubs128((__v8bf)(__m128bh)(A)))
+#define _mm_ipcvttbf16_epu8(A) \
+ ((__m128i)__builtin_ia32_vcvttbf162iubs128((__v8bf)(__m128bh)(A)))
-#define _mm_mask_ipcvttnebf16_epu8(W, U, A) \
+#define _mm_mask_ipcvttbf16_epu8(W, U, A) \
((__m128i)__builtin_ia32_selectw_128( \
- (__mmask8)(U), (__v8hi)_mm_ipcvttnebf16_epu8(A), (__v8hi)(__m128i)(W)))
+ (__mmask8)(U), (__v8hi)_mm_ipcvttbf16_epu8(A), (__v8hi)(__m128i)(W)))
-#define _mm_maskz_ipcvttnebf16_epu8(U, A) \
+#define _mm_maskz_ipcvttbf16_epu8(U, A) \
((__m128i)__builtin_ia32_selectw_128((__mmask8)(U), \
- (__v8hi)_mm_ipcvttnebf16_epu8(A), \
+ (__v8hi)_mm_ipcvttbf16_epu8(A), \
(__v8hi)_mm_setzero_si128()))
-#define _mm256_ipcvttnebf16_epu8(A) \
- ((__m256i)__builtin_ia32_vcvttnebf162iubs256((__v16bf)(__m256bh)(A)))
+#define _mm256_ipcvttbf16_epu8(A) \
+ ((__m256i)__builtin_ia32_vcvttbf162iubs256((__v16bf)(__m256bh)(A)))
-#define _mm256_mask_ipcvttnebf16_epu8(W, U, A) \
+#define _mm256_mask_ipcvttbf16_epu8(W, U, A) \
((__m256i)__builtin_ia32_selectw_256((__mmask16)(U), \
- (__v16hi)_mm256_ipcvttnebf16_epu8(A), \
+ (__v16hi)_mm256_ipcvttbf16_epu8(A), \
(__v16hi)(__m256i)(W)))
-#define _mm256_maskz_ipcvttnebf16_epu8(U, A) \
+#define _mm256_maskz_ipcvttbf16_epu8(U, A) \
((__m256i)__builtin_ia32_selectw_256((__mmask16)(U), \
- (__v16hi)_mm256_ipcvttnebf16_epu8(A), \
+ (__v16hi)_mm256_ipcvttbf16_epu8(A), \
(__v16hi)_mm256_setzero_si256()))
#define _mm_ipcvttph_epi8(A) \
diff --git a/clang/test/CodeGen/X86/avx10_2_512satcvt-builtins.c b/clang/test/CodeGen/X86/avx10_2_512satcvt-builtins.c
index bf6acaafcbcb93..0d3b0c278b44aa 100755
--- a/c...
[truncated]
``````````
</details>
https://github.com/llvm/llvm-project/pull/123275
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