[clang] [llvm] [X86][AVX10.2-SATCVT][NFC] Remove NE from intrinsic and instruction name (PR #123275)
Phoebe Wang via llvm-commits
llvm-commits at lists.llvm.org
Thu Jan 16 18:48:02 PST 2025
https://github.com/phoebewang created https://github.com/llvm/llvm-project/pull/123275
Ref.: https://cdrdv2.intel.com/v1/dl/getContent/828965
>From 45d639058356d439e34eb97dc70b2728779c2470 Mon Sep 17 00:00:00 2001
From: "Wang, Phoebe" <phoebe.wang at intel.com>
Date: Fri, 17 Jan 2025 10:45:56 +0800
Subject: [PATCH] [X86][AVX10.2-SATCVT][NFC] Remove NE from intrinsic and
instruction name
Ref.: https://cdrdv2.intel.com/v1/dl/getContent/828965
---
clang/include/clang/Basic/BuiltinsX86.td | 24 +-
clang/lib/Headers/avx10_2_512satcvtintrin.h | 48 +-
clang/lib/Headers/avx10_2satcvtintrin.h | 96 ++--
.../CodeGen/X86/avx10_2_512satcvt-builtins.c | 96 ++--
.../test/CodeGen/X86/avx10_2satcvt-builtins.c | 192 ++++----
llvm/include/llvm/IR/IntrinsicsX86.td | 26 +-
llvm/lib/Target/X86/X86InstrAVX10.td | 24 +-
llvm/lib/Target/X86/X86IntrinsicsInfo.h | 36 +-
.../X86/avx10_2_512satcvt-intrinsics.ll | 136 +++---
.../CodeGen/X86/avx10_2satcvt-intrinsics.ll | 272 +++++------
.../MC/Disassembler/X86/avx10.2-satcvt-32.txt | 432 +++++++++---------
.../MC/Disassembler/X86/avx10.2-satcvt-64.txt | 432 +++++++++---------
llvm/test/MC/X86/avx10.2satcvt-32-att.s | 432 +++++++++---------
llvm/test/MC/X86/avx10.2satcvt-32-intel.s | 432 +++++++++---------
llvm/test/MC/X86/avx10.2satcvt-64-att.s | 432 +++++++++---------
llvm/test/MC/X86/avx10.2satcvt-64-intel.s | 432 +++++++++---------
llvm/test/TableGen/x86-fold-tables.inc | 144 +++---
17 files changed, 1843 insertions(+), 1843 deletions(-)
diff --git a/clang/include/clang/Basic/BuiltinsX86.td b/clang/include/clang/Basic/BuiltinsX86.td
index 18fc10eb85c027..33a4b4b15c7414 100644
--- a/clang/include/clang/Basic/BuiltinsX86.td
+++ b/clang/include/clang/Basic/BuiltinsX86.td
@@ -4987,27 +4987,27 @@ let Features = "avx10.2-256", Attributes = [NoThrow, RequiredVectorWidth<128>] i
def vminmaxsd_round_mask : X86Builtin<"_Vector<2, double>(_Vector<2, double>, _Vector<2, double>, _Constant int, _Vector<2, double>, unsigned char, _Constant int)">;
def vminmaxsh_round_mask : X86Builtin<"_Vector<8, _Float16>(_Vector<8, _Float16>, _Vector<8, _Float16>, _Constant int, _Vector<8, _Float16>, unsigned char, _Constant int)">;
def vminmaxss_round_mask : X86Builtin<"_Vector<4, float>(_Vector<4, float>, _Vector<4, float>, _Constant int, _Vector<4, float>, unsigned char, _Constant int)">;
- def vcvtnebf162ibs128 : X86Builtin<"_Vector<8, unsigned short>(_Vector<8, __bf16>)">;
+ def vcvtbf162ibs128 : X86Builtin<"_Vector<8, unsigned short>(_Vector<8, __bf16>)">;
}
let Features = "avx10.2-256", Attributes = [NoThrow, RequiredVectorWidth<256>] in {
- def vcvtnebf162ibs256 : X86Builtin<"_Vector<16, unsigned short>(_Vector<16, __bf16>)">;
+ def vcvtbf162ibs256 : X86Builtin<"_Vector<16, unsigned short>(_Vector<16, __bf16>)">;
}
let Features = "avx10.2-512", Attributes = [NoThrow, RequiredVectorWidth<512>] in {
- def vcvtnebf162ibs512 : X86Builtin<"_Vector<32, unsigned short>(_Vector<32, __bf16>)">;
+ def vcvtbf162ibs512 : X86Builtin<"_Vector<32, unsigned short>(_Vector<32, __bf16>)">;
}
let Features = "avx10.2-256", Attributes = [NoThrow, RequiredVectorWidth<128>] in {
- def vcvtnebf162iubs128 : X86Builtin<"_Vector<8, unsigned short>(_Vector<8, __bf16>)">;
+ def vcvtbf162iubs128 : X86Builtin<"_Vector<8, unsigned short>(_Vector<8, __bf16>)">;
}
let Features = "avx10.2-256", Attributes = [NoThrow, RequiredVectorWidth<256>] in {
- def vcvtnebf162iubs256 : X86Builtin<"_Vector<16, unsigned short>(_Vector<16, __bf16>)">;
+ def vcvtbf162iubs256 : X86Builtin<"_Vector<16, unsigned short>(_Vector<16, __bf16>)">;
}
let Features = "avx10.2-512", Attributes = [NoThrow, RequiredVectorWidth<512>] in {
- def vcvtnebf162iubs512 : X86Builtin<"_Vector<32, unsigned short>(_Vector<32, __bf16>)">;
+ def vcvtbf162iubs512 : X86Builtin<"_Vector<32, unsigned short>(_Vector<32, __bf16>)">;
}
let Features = "avx10.2-256", Attributes = [NoThrow, RequiredVectorWidth<128>] in {
@@ -5059,27 +5059,27 @@ let Features = "avx10.2-512", Attributes = [NoThrow, RequiredVectorWidth<512>] i
}
let Features = "avx10.2-256", Attributes = [NoThrow, RequiredVectorWidth<128>] in {
- def vcvttnebf162ibs128 : X86Builtin<"_Vector<8, unsigned short>(_Vector<8, __bf16>)">;
+ def vcvttbf162ibs128 : X86Builtin<"_Vector<8, unsigned short>(_Vector<8, __bf16>)">;
}
let Features = "avx10.2-256", Attributes = [NoThrow, RequiredVectorWidth<256>] in {
- def vcvttnebf162ibs256 : X86Builtin<"_Vector<16, unsigned short>(_Vector<16, __bf16>)">;
+ def vcvttbf162ibs256 : X86Builtin<"_Vector<16, unsigned short>(_Vector<16, __bf16>)">;
}
let Features = "avx10.2-512", Attributes = [NoThrow, RequiredVectorWidth<512>] in {
- def vcvttnebf162ibs512 : X86Builtin<"_Vector<32, unsigned short>(_Vector<32, __bf16>)">;
+ def vcvttbf162ibs512 : X86Builtin<"_Vector<32, unsigned short>(_Vector<32, __bf16>)">;
}
let Features = "avx10.2-256", Attributes = [NoThrow, RequiredVectorWidth<128>] in {
- def vcvttnebf162iubs128 : X86Builtin<"_Vector<8, unsigned short>(_Vector<8, __bf16>)">;
+ def vcvttbf162iubs128 : X86Builtin<"_Vector<8, unsigned short>(_Vector<8, __bf16>)">;
}
let Features = "avx10.2-256", Attributes = [NoThrow, RequiredVectorWidth<256>] in {
- def vcvttnebf162iubs256 : X86Builtin<"_Vector<16, unsigned short>(_Vector<16, __bf16>)">;
+ def vcvttbf162iubs256 : X86Builtin<"_Vector<16, unsigned short>(_Vector<16, __bf16>)">;
}
let Features = "avx10.2-512", Attributes = [NoThrow, RequiredVectorWidth<512>] in {
- def vcvttnebf162iubs512 : X86Builtin<"_Vector<32, unsigned short>(_Vector<32, __bf16>)">;
+ def vcvttbf162iubs512 : X86Builtin<"_Vector<32, unsigned short>(_Vector<32, __bf16>)">;
}
let Features = "avx10.2-256", Attributes = [NoThrow, RequiredVectorWidth<128>] in {
diff --git a/clang/lib/Headers/avx10_2_512satcvtintrin.h b/clang/lib/Headers/avx10_2_512satcvtintrin.h
index 0dadadb6a00bbb..7f41deb5212c5a 100644
--- a/clang/lib/Headers/avx10_2_512satcvtintrin.h
+++ b/clang/lib/Headers/avx10_2_512satcvtintrin.h
@@ -14,56 +14,56 @@
#ifndef __AVX10_2_512SATCVTINTRIN_H
#define __AVX10_2_512SATCVTINTRIN_H
-#define _mm512_ipcvtnebf16_epi8(A) \
- ((__m512i)__builtin_ia32_vcvtnebf162ibs512((__v32bf)(__m512bh)(A)))
+#define _mm512_ipcvtbf16_epi8(A) \
+ ((__m512i)__builtin_ia32_vcvtbf162ibs512((__v32bf)(__m512bh)(A)))
-#define _mm512_mask_ipcvtnebf16_epi8(W, U, A) \
+#define _mm512_mask_ipcvtbf16_epi8(W, U, A) \
((__m512i)__builtin_ia32_selectw_512((__mmask32)(U), \
- (__v32hi)_mm512_ipcvtnebf16_epi8(A), \
+ (__v32hi)_mm512_ipcvtbf16_epi8(A), \
(__v32hi)(__m512i)(W)))
-#define _mm512_maskz_ipcvtnebf16_epi8(U, A) \
+#define _mm512_maskz_ipcvtbf16_epi8(U, A) \
((__m512i)__builtin_ia32_selectw_512((__mmask32)(U), \
- (__v32hi)_mm512_ipcvtnebf16_epi8(A), \
+ (__v32hi)_mm512_ipcvtbf16_epi8(A), \
(__v32hi)_mm512_setzero_si512()))
-#define _mm512_ipcvtnebf16_epu8(A) \
- ((__m512i)__builtin_ia32_vcvtnebf162iubs512((__v32bf)(__m512bh)(A)))
+#define _mm512_ipcvtbf16_epu8(A) \
+ ((__m512i)__builtin_ia32_vcvtbf162iubs512((__v32bf)(__m512bh)(A)))
-#define _mm512_mask_ipcvtnebf16_epu8(W, U, A) \
+#define _mm512_mask_ipcvtbf16_epu8(W, U, A) \
((__m512i)__builtin_ia32_selectw_512((__mmask32)(U), \
- (__v32hi)_mm512_ipcvtnebf16_epu8(A), \
+ (__v32hi)_mm512_ipcvtbf16_epu8(A), \
(__v32hi)(__m512i)(W)))
-#define _mm512_maskz_ipcvtnebf16_epu8(U, A) \
+#define _mm512_maskz_ipcvtbf16_epu8(U, A) \
((__m512i)__builtin_ia32_selectw_512((__mmask32)(U), \
- (__v32hi)_mm512_ipcvtnebf16_epu8(A), \
+ (__v32hi)_mm512_ipcvtbf16_epu8(A), \
(__v32hi)_mm512_setzero_si512()))
-#define _mm512_ipcvttnebf16_epi8(A) \
- ((__m512i)__builtin_ia32_vcvttnebf162ibs512((__v32bf)(__m512bh)(A)))
+#define _mm512_ipcvttbf16_epi8(A) \
+ ((__m512i)__builtin_ia32_vcvttbf162ibs512((__v32bf)(__m512bh)(A)))
-#define _mm512_mask_ipcvttnebf16_epi8(W, U, A) \
+#define _mm512_mask_ipcvttbf16_epi8(W, U, A) \
((__m512i)__builtin_ia32_selectw_512((__mmask32)(U), \
- (__v32hi)_mm512_ipcvttnebf16_epi8(A), \
+ (__v32hi)_mm512_ipcvttbf16_epi8(A), \
(__v32hi)(__m512i)(W)))
-#define _mm512_maskz_ipcvttnebf16_epi8(U, A) \
+#define _mm512_maskz_ipcvttbf16_epi8(U, A) \
((__m512i)__builtin_ia32_selectw_512((__mmask32)(U), \
- (__v32hi)_mm512_ipcvttnebf16_epi8(A), \
+ (__v32hi)_mm512_ipcvttbf16_epi8(A), \
(__v32hi)_mm512_setzero_si512()))
-#define _mm512_ipcvttnebf16_epu8(A) \
- ((__m512i)__builtin_ia32_vcvttnebf162iubs512((__v32bf)(__m512bh)(A)))
+#define _mm512_ipcvttbf16_epu8(A) \
+ ((__m512i)__builtin_ia32_vcvttbf162iubs512((__v32bf)(__m512bh)(A)))
-#define _mm512_mask_ipcvttnebf16_epu8(W, U, A) \
+#define _mm512_mask_ipcvttbf16_epu8(W, U, A) \
((__m512i)__builtin_ia32_selectw_512((__mmask32)(U), \
- (__v32hi)_mm512_ipcvttnebf16_epu8(A), \
+ (__v32hi)_mm512_ipcvttbf16_epu8(A), \
(__v32hi)(__m512i)(W)))
-#define _mm512_maskz_ipcvttnebf16_epu8(U, A) \
+#define _mm512_maskz_ipcvttbf16_epu8(U, A) \
((__m512i)__builtin_ia32_selectw_512((__mmask32)(U), \
- (__v32hi)_mm512_ipcvttnebf16_epu8(A), \
+ (__v32hi)_mm512_ipcvttbf16_epu8(A), \
(__v32hi)_mm512_setzero_si512()))
#define _mm512_ipcvtph_epi8(A) \
diff --git a/clang/lib/Headers/avx10_2satcvtintrin.h b/clang/lib/Headers/avx10_2satcvtintrin.h
index dd5c44fdaf60e1..d16c60e6382df9 100644
--- a/clang/lib/Headers/avx10_2satcvtintrin.h
+++ b/clang/lib/Headers/avx10_2satcvtintrin.h
@@ -14,54 +14,54 @@
#ifndef __AVX10_2SATCVTINTRIN_H
#define __AVX10_2SATCVTINTRIN_H
-#define _mm_ipcvtnebf16_epi8(A) \
- ((__m128i)__builtin_ia32_vcvtnebf162ibs128((__v8bf)(__m128bh)(A)))
+#define _mm_ipcvtbf16_epi8(A) \
+ ((__m128i)__builtin_ia32_vcvtbf162ibs128((__v8bf)(__m128bh)(A)))
-#define _mm_mask_ipcvtnebf16_epi8(W, U, A) \
+#define _mm_mask_ipcvtbf16_epi8(W, U, A) \
((__m128i)__builtin_ia32_selectw_128( \
- (__mmask8)(U), (__v8hi)_mm_ipcvtnebf16_epi8(A), (__v8hi)(__m128i)(W)))
+ (__mmask8)(U), (__v8hi)_mm_ipcvtbf16_epi8(A), (__v8hi)(__m128i)(W)))
-#define _mm_maskz_ipcvtnebf16_epi8(U, A) \
+#define _mm_maskz_ipcvtbf16_epi8(U, A) \
((__m128i)__builtin_ia32_selectw_128((__mmask8)(U), \
- (__v8hi)_mm_ipcvtnebf16_epi8(A), \
+ (__v8hi)_mm_ipcvtbf16_epi8(A), \
(__v8hi)_mm_setzero_si128()))
-#define _mm256_ipcvtnebf16_epi8(A) \
- ((__m256i)__builtin_ia32_vcvtnebf162ibs256((__v16bf)(__m256bh)(A)))
+#define _mm256_ipcvtbf16_epi8(A) \
+ ((__m256i)__builtin_ia32_vcvtbf162ibs256((__v16bf)(__m256bh)(A)))
-#define _mm256_mask_ipcvtnebf16_epi8(W, U, A) \
+#define _mm256_mask_ipcvtbf16_epi8(W, U, A) \
((__m256i)__builtin_ia32_selectw_256((__mmask16)(U), \
- (__v16hi)_mm256_ipcvtnebf16_epi8(A), \
+ (__v16hi)_mm256_ipcvtbf16_epi8(A), \
(__v16hi)(__m256i)(W)))
-#define _mm256_maskz_ipcvtnebf16_epi8(U, A) \
+#define _mm256_maskz_ipcvtbf16_epi8(U, A) \
((__m256i)__builtin_ia32_selectw_256((__mmask16)(U), \
- (__v16hi)_mm256_ipcvtnebf16_epi8(A), \
+ (__v16hi)_mm256_ipcvtbf16_epi8(A), \
(__v16hi)_mm256_setzero_si256()))
-#define _mm_ipcvtnebf16_epu8(A) \
- ((__m128i)__builtin_ia32_vcvtnebf162iubs128((__v8bf)(__m128bh)(A)))
+#define _mm_ipcvtbf16_epu8(A) \
+ ((__m128i)__builtin_ia32_vcvtbf162iubs128((__v8bf)(__m128bh)(A)))
-#define _mm_mask_ipcvtnebf16_epu8(W, U, A) \
+#define _mm_mask_ipcvtbf16_epu8(W, U, A) \
((__m128i)__builtin_ia32_selectw_128( \
- (__mmask8)(U), (__v8hi)_mm_ipcvtnebf16_epu8(A), (__v8hi)(__m128i)(W)))
+ (__mmask8)(U), (__v8hi)_mm_ipcvtbf16_epu8(A), (__v8hi)(__m128i)(W)))
-#define _mm_maskz_ipcvtnebf16_epu8(U, A) \
+#define _mm_maskz_ipcvtbf16_epu8(U, A) \
((__m128i)__builtin_ia32_selectw_128((__mmask8)(U), \
- (__v8hi)_mm_ipcvtnebf16_epu8(A), \
+ (__v8hi)_mm_ipcvtbf16_epu8(A), \
(__v8hi)_mm_setzero_si128()))
-#define _mm256_ipcvtnebf16_epu8(A) \
- ((__m256i)__builtin_ia32_vcvtnebf162iubs256((__v16bf)(__m256bh)(A)))
+#define _mm256_ipcvtbf16_epu8(A) \
+ ((__m256i)__builtin_ia32_vcvtbf162iubs256((__v16bf)(__m256bh)(A)))
-#define _mm256_mask_ipcvtnebf16_epu8(W, U, A) \
+#define _mm256_mask_ipcvtbf16_epu8(W, U, A) \
((__m256i)__builtin_ia32_selectw_256((__mmask16)(U), \
- (__v16hi)_mm256_ipcvtnebf16_epu8(A), \
+ (__v16hi)_mm256_ipcvtbf16_epu8(A), \
(__v16hi)(__m256i)(W)))
-#define _mm256_maskz_ipcvtnebf16_epu8(U, A) \
+#define _mm256_maskz_ipcvtbf16_epu8(U, A) \
((__m256i)__builtin_ia32_selectw_256((__mmask16)(U), \
- (__v16hi)_mm256_ipcvtnebf16_epu8(A), \
+ (__v16hi)_mm256_ipcvtbf16_epu8(A), \
(__v16hi)_mm256_setzero_si256()))
#define _mm_ipcvtph_epi8(A) \
@@ -228,54 +228,54 @@
(__v8su)_mm256_setzero_si256(), \
(__mmask8)(U), (const int)R))
-#define _mm_ipcvttnebf16_epi8(A) \
- ((__m128i)__builtin_ia32_vcvttnebf162ibs128((__v8bf)(__m128bh)(A)))
+#define _mm_ipcvttbf16_epi8(A) \
+ ((__m128i)__builtin_ia32_vcvttbf162ibs128((__v8bf)(__m128bh)(A)))
-#define _mm_mask_ipcvttnebf16_epi8(W, U, A) \
+#define _mm_mask_ipcvttbf16_epi8(W, U, A) \
((__m128i)__builtin_ia32_selectw_128( \
- (__mmask8)(U), (__v8hi)_mm_ipcvttnebf16_epi8(A), (__v8hi)(__m128i)(W)))
+ (__mmask8)(U), (__v8hi)_mm_ipcvttbf16_epi8(A), (__v8hi)(__m128i)(W)))
-#define _mm_maskz_ipcvttnebf16_epi8(U, A) \
+#define _mm_maskz_ipcvttbf16_epi8(U, A) \
((__m128i)__builtin_ia32_selectw_128((__mmask8)(U), \
- (__v8hi)_mm_ipcvttnebf16_epi8(A), \
+ (__v8hi)_mm_ipcvttbf16_epi8(A), \
(__v8hi)_mm_setzero_si128()))
-#define _mm256_ipcvttnebf16_epi8(A) \
- ((__m256i)__builtin_ia32_vcvttnebf162ibs256((__v16bf)(__m256bh)(A)))
+#define _mm256_ipcvttbf16_epi8(A) \
+ ((__m256i)__builtin_ia32_vcvttbf162ibs256((__v16bf)(__m256bh)(A)))
-#define _mm256_mask_ipcvttnebf16_epi8(W, U, A) \
+#define _mm256_mask_ipcvttbf16_epi8(W, U, A) \
((__m256i)__builtin_ia32_selectw_256((__mmask16)(U), \
- (__v16hi)_mm256_ipcvttnebf16_epi8(A), \
+ (__v16hi)_mm256_ipcvttbf16_epi8(A), \
(__v16hi)(__m256i)(W)))
-#define _mm256_maskz_ipcvttnebf16_epi8(U, A) \
+#define _mm256_maskz_ipcvttbf16_epi8(U, A) \
((__m256i)__builtin_ia32_selectw_256((__mmask16)(U), \
- (__v16hi)_mm256_ipcvttnebf16_epi8(A), \
+ (__v16hi)_mm256_ipcvttbf16_epi8(A), \
(__v16hi)_mm256_setzero_si256()))
-#define _mm_ipcvttnebf16_epu8(A) \
- ((__m128i)__builtin_ia32_vcvttnebf162iubs128((__v8bf)(__m128bh)(A)))
+#define _mm_ipcvttbf16_epu8(A) \
+ ((__m128i)__builtin_ia32_vcvttbf162iubs128((__v8bf)(__m128bh)(A)))
-#define _mm_mask_ipcvttnebf16_epu8(W, U, A) \
+#define _mm_mask_ipcvttbf16_epu8(W, U, A) \
((__m128i)__builtin_ia32_selectw_128( \
- (__mmask8)(U), (__v8hi)_mm_ipcvttnebf16_epu8(A), (__v8hi)(__m128i)(W)))
+ (__mmask8)(U), (__v8hi)_mm_ipcvttbf16_epu8(A), (__v8hi)(__m128i)(W)))
-#define _mm_maskz_ipcvttnebf16_epu8(U, A) \
+#define _mm_maskz_ipcvttbf16_epu8(U, A) \
((__m128i)__builtin_ia32_selectw_128((__mmask8)(U), \
- (__v8hi)_mm_ipcvttnebf16_epu8(A), \
+ (__v8hi)_mm_ipcvttbf16_epu8(A), \
(__v8hi)_mm_setzero_si128()))
-#define _mm256_ipcvttnebf16_epu8(A) \
- ((__m256i)__builtin_ia32_vcvttnebf162iubs256((__v16bf)(__m256bh)(A)))
+#define _mm256_ipcvttbf16_epu8(A) \
+ ((__m256i)__builtin_ia32_vcvttbf162iubs256((__v16bf)(__m256bh)(A)))
-#define _mm256_mask_ipcvttnebf16_epu8(W, U, A) \
+#define _mm256_mask_ipcvttbf16_epu8(W, U, A) \
((__m256i)__builtin_ia32_selectw_256((__mmask16)(U), \
- (__v16hi)_mm256_ipcvttnebf16_epu8(A), \
+ (__v16hi)_mm256_ipcvttbf16_epu8(A), \
(__v16hi)(__m256i)(W)))
-#define _mm256_maskz_ipcvttnebf16_epu8(U, A) \
+#define _mm256_maskz_ipcvttbf16_epu8(U, A) \
((__m256i)__builtin_ia32_selectw_256((__mmask16)(U), \
- (__v16hi)_mm256_ipcvttnebf16_epu8(A), \
+ (__v16hi)_mm256_ipcvttbf16_epu8(A), \
(__v16hi)_mm256_setzero_si256()))
#define _mm_ipcvttph_epi8(A) \
diff --git a/clang/test/CodeGen/X86/avx10_2_512satcvt-builtins.c b/clang/test/CodeGen/X86/avx10_2_512satcvt-builtins.c
index bf6acaafcbcb93..0d3b0c278b44aa 100755
--- a/clang/test/CodeGen/X86/avx10_2_512satcvt-builtins.c
+++ b/clang/test/CodeGen/X86/avx10_2_512satcvt-builtins.c
@@ -5,46 +5,46 @@
#include <immintrin.h>
-__m512i test_mm512_ipcvtnebf16_epi8(__m512bh __A) {
- // CHECK-LABEL: @test_mm512_ipcvtnebf16_epi8(
- // CHECK: @llvm.x86.avx10.vcvtnebf162ibs512
- return _mm512_ipcvtnebf16_epi8(__A);
+__m512i test_mm512_ipcvtbf16_epi8(__m512bh __A) {
+ // CHECK-LABEL: @test_mm512_ipcvtbf16_epi8(
+ // CHECK: @llvm.x86.avx10.vcvtbf162ibs512
+ return _mm512_ipcvtbf16_epi8(__A);
}
-__m512i test_mm512_mask_ipcvtnebf16_epi8(__m512i __S, __mmask32 __A, __m512bh __B) {
- // CHECK-LABEL: @test_mm512_mask_ipcvtnebf16_epi8(
- // CHECK: @llvm.x86.avx10.vcvtnebf162ibs512
+__m512i test_mm512_mask_ipcvtbf16_epi8(__m512i __S, __mmask32 __A, __m512bh __B) {
+ // CHECK-LABEL: @test_mm512_mask_ipcvtbf16_epi8(
+ // CHECK: @llvm.x86.avx10.vcvtbf162ibs512
// CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}}
- return _mm512_mask_ipcvtnebf16_epi8(__S, __A, __B);
+ return _mm512_mask_ipcvtbf16_epi8(__S, __A, __B);
}
-__m512i test_mm512_maskz_ipcvtnebf16_epi8(__mmask32 __A, __m512bh __B) {
- // CHECK-LABEL: @test_mm512_maskz_ipcvtnebf16_epi8
- // CHECK: @llvm.x86.avx10.vcvtnebf162ibs512
+__m512i test_mm512_maskz_ipcvtbf16_epi8(__mmask32 __A, __m512bh __B) {
+ // CHECK-LABEL: @test_mm512_maskz_ipcvtbf16_epi8
+ // CHECK: @llvm.x86.avx10.vcvtbf162ibs512
// CHECK: zeroinitializer
// CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}}
- return _mm512_maskz_ipcvtnebf16_epi8(__A, __B);
+ return _mm512_maskz_ipcvtbf16_epi8(__A, __B);
}
-__m512i test_mm512_ipcvtnebf16_epu8(__m512bh __A) {
- // CHECK-LABEL: @test_mm512_ipcvtnebf16_epu8(
- // CHECK: @llvm.x86.avx10.vcvtnebf162iubs512
- return _mm512_ipcvtnebf16_epu8(__A);
+__m512i test_mm512_ipcvtbf16_epu8(__m512bh __A) {
+ // CHECK-LABEL: @test_mm512_ipcvtbf16_epu8(
+ // CHECK: @llvm.x86.avx10.vcvtbf162iubs512
+ return _mm512_ipcvtbf16_epu8(__A);
}
-__m512i test_mm512_mask_ipcvtnebf16_epu8(__m512i __S, __mmask32 __A, __m512bh __B) {
- // CHECK-LABEL: @test_mm512_mask_ipcvtnebf16_epu8(
- // CHECK: @llvm.x86.avx10.vcvtnebf162iubs512
+__m512i test_mm512_mask_ipcvtbf16_epu8(__m512i __S, __mmask32 __A, __m512bh __B) {
+ // CHECK-LABEL: @test_mm512_mask_ipcvtbf16_epu8(
+ // CHECK: @llvm.x86.avx10.vcvtbf162iubs512
// CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}}
- return _mm512_mask_ipcvtnebf16_epu8(__S, __A, __B);
+ return _mm512_mask_ipcvtbf16_epu8(__S, __A, __B);
}
-__m512i test_mm512_maskz_ipcvtnebf16_epu8(__mmask32 __A, __m512bh __B) {
- // CHECK-LABEL: @test_mm512_maskz_ipcvtnebf16_epu8
- // CHECK: @llvm.x86.avx10.vcvtnebf162iubs512
+__m512i test_mm512_maskz_ipcvtbf16_epu8(__mmask32 __A, __m512bh __B) {
+ // CHECK-LABEL: @test_mm512_maskz_ipcvtbf16_epu8
+ // CHECK: @llvm.x86.avx10.vcvtbf162iubs512
// CHECK: zeroinitializer
// CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}}
- return _mm512_maskz_ipcvtnebf16_epu8(__A, __B);
+ return _mm512_maskz_ipcvtbf16_epu8(__A, __B);
}
__m512i test_mm512_ipcvtph_epi8(__m512h __A) {
@@ -191,46 +191,46 @@ __m512i test_mm512_maskz_ipcvt_roundps_epu8(__mmask16 __A, __m512 __B) {
return _mm512_maskz_ipcvt_roundps_epu8(__A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);
}
-__m512i test_mm512_ipcvttnebf16_epi8(__m512bh __A) {
- // CHECK-LABEL: @test_mm512_ipcvttnebf16_epi8(
- // CHECK: @llvm.x86.avx10.vcvttnebf162ibs512(
- return _mm512_ipcvttnebf16_epi8(__A);
+__m512i test_mm512_ipcvttbf16_epi8(__m512bh __A) {
+ // CHECK-LABEL: @test_mm512_ipcvttbf16_epi8(
+ // CHECK: @llvm.x86.avx10.vcvttbf162ibs512(
+ return _mm512_ipcvttbf16_epi8(__A);
}
-__m512i test_mm512_mask_ipcvttnebf16_epi8(__m512i __S, __mmask32 __A, __m512bh __B) {
- // CHECK-LABEL: @test_mm512_mask_ipcvttnebf16_epi8(
- // CHECK: @llvm.x86.avx10.vcvttnebf162ibs512(
+__m512i test_mm512_mask_ipcvttbf16_epi8(__m512i __S, __mmask32 __A, __m512bh __B) {
+ // CHECK-LABEL: @test_mm512_mask_ipcvttbf16_epi8(
+ // CHECK: @llvm.x86.avx10.vcvttbf162ibs512(
// CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}}
- return _mm512_mask_ipcvttnebf16_epi8(__S, __A, __B);
+ return _mm512_mask_ipcvttbf16_epi8(__S, __A, __B);
}
-__m512i test_mm512_maskz_ipcvttnebf16_epi8(__mmask32 __A, __m512bh __B) {
- // CHECK-LABEL: @test_mm512_maskz_ipcvttnebf16_epi8
- // CHECK: @llvm.x86.avx10.vcvttnebf162ibs512(
+__m512i test_mm512_maskz_ipcvttbf16_epi8(__mmask32 __A, __m512bh __B) {
+ // CHECK-LABEL: @test_mm512_maskz_ipcvttbf16_epi8
+ // CHECK: @llvm.x86.avx10.vcvttbf162ibs512(
// CHECK: zeroinitializer
// CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}}
- return _mm512_maskz_ipcvttnebf16_epi8(__A, __B);
+ return _mm512_maskz_ipcvttbf16_epi8(__A, __B);
}
-__m512i test_mm512_ipcvttnebf16_epu8(__m512bh __A) {
- // CHECK-LABEL: @test_mm512_ipcvttnebf16_epu8(
- // CHECK: @llvm.x86.avx10.vcvttnebf162iubs512(
- return _mm512_ipcvttnebf16_epu8(__A);
+__m512i test_mm512_ipcvttbf16_epu8(__m512bh __A) {
+ // CHECK-LABEL: @test_mm512_ipcvttbf16_epu8(
+ // CHECK: @llvm.x86.avx10.vcvttbf162iubs512(
+ return _mm512_ipcvttbf16_epu8(__A);
}
-__m512i test_mm512_mask_ipcvttnebf16_epu8(__m512i __S, __mmask32 __A, __m512bh __B) {
- // CHECK-LABEL: @test_mm512_mask_ipcvttnebf16_epu8(
- // CHECK: @llvm.x86.avx10.vcvttnebf162iubs512(
+__m512i test_mm512_mask_ipcvttbf16_epu8(__m512i __S, __mmask32 __A, __m512bh __B) {
+ // CHECK-LABEL: @test_mm512_mask_ipcvttbf16_epu8(
+ // CHECK: @llvm.x86.avx10.vcvttbf162iubs512(
// CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}}
- return _mm512_mask_ipcvttnebf16_epu8(__S, __A, __B);
+ return _mm512_mask_ipcvttbf16_epu8(__S, __A, __B);
}
-__m512i test_mm512_maskz_ipcvttnebf16_epu8(__mmask32 __A, __m512bh __B) {
- // CHECK-LABEL: @test_mm512_maskz_ipcvttnebf16_epu8
- // CHECK: @llvm.x86.avx10.vcvttnebf162iubs512(
+__m512i test_mm512_maskz_ipcvttbf16_epu8(__mmask32 __A, __m512bh __B) {
+ // CHECK-LABEL: @test_mm512_maskz_ipcvttbf16_epu8
+ // CHECK: @llvm.x86.avx10.vcvttbf162iubs512(
// CHECK: zeroinitializer
// CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}}
- return _mm512_maskz_ipcvttnebf16_epu8(__A, __B);
+ return _mm512_maskz_ipcvttbf16_epu8(__A, __B);
}
__m512i test_mm512_ipcvttph_epi8(__m512h __A) {
diff --git a/clang/test/CodeGen/X86/avx10_2satcvt-builtins.c b/clang/test/CodeGen/X86/avx10_2satcvt-builtins.c
index de9fbd4c81e50b..7c5fc087b9da41 100644
--- a/clang/test/CodeGen/X86/avx10_2satcvt-builtins.c
+++ b/clang/test/CodeGen/X86/avx10_2satcvt-builtins.c
@@ -5,87 +5,87 @@
#include <immintrin.h>
-__m128i test_mm_ipcvtnebf16_epi8(__m128bh __A) {
- // CHECK-LABEL: @test_mm_ipcvtnebf16_epi8(
- // CHECK: @llvm.x86.avx10.vcvtnebf162ibs128
- return _mm_ipcvtnebf16_epi8(__A);
+__m128i test_mm_ipcvtbf16_epi8(__m128bh __A) {
+ // CHECK-LABEL: @test_mm_ipcvtbf16_epi8(
+ // CHECK: @llvm.x86.avx10.vcvtbf162ibs128
+ return _mm_ipcvtbf16_epi8(__A);
}
-__m128i test_mm_mask_ipcvtnebf16_epi8(__m128i __S, __mmask8 __A, __m128bh __B) {
- // CHECK-LABEL: @test_mm_mask_ipcvtnebf16_epi8(
- // CHECK: @llvm.x86.avx10.vcvtnebf162ibs128
+__m128i test_mm_mask_ipcvtbf16_epi8(__m128i __S, __mmask8 __A, __m128bh __B) {
+ // CHECK-LABEL: @test_mm_mask_ipcvtbf16_epi8(
+ // CHECK: @llvm.x86.avx10.vcvtbf162ibs128
// CHECK: select <8 x i1> %{{.*}}, <8 x i16> %{{.*}}, <8 x i16> %{{.*}}
- return _mm_mask_ipcvtnebf16_epi8(__S, __A, __B);
+ return _mm_mask_ipcvtbf16_epi8(__S, __A, __B);
}
-__m128i test_mm_maskz_ipcvtnebf16_epi8(__mmask8 __A, __m128bh __B) {
- // CHECK-LABEL: @test_mm_maskz_ipcvtnebf16_epi8(
- // CHECK: @llvm.x86.avx10.vcvtnebf162ibs128
+__m128i test_mm_maskz_ipcvtbf16_epi8(__mmask8 __A, __m128bh __B) {
+ // CHECK-LABEL: @test_mm_maskz_ipcvtbf16_epi8(
+ // CHECK: @llvm.x86.avx10.vcvtbf162ibs128
// CHECK: zeroinitializer
// CHECK: select <8 x i1> %{{.*}}, <8 x i16> %{{.*}}, <8 x i16> %{{.*}}
- return _mm_maskz_ipcvtnebf16_epi8(__A, __B);
+ return _mm_maskz_ipcvtbf16_epi8(__A, __B);
}
-__m256i test_mm256_ipcvtnebf16_epi8(__m256bh __A) {
- // CHECK-LABEL: @test_mm256_ipcvtnebf16_epi8(
- // CHECK: @llvm.x86.avx10.vcvtnebf162ibs256
- return _mm256_ipcvtnebf16_epi8(__A);
+__m256i test_mm256_ipcvtbf16_epi8(__m256bh __A) {
+ // CHECK-LABEL: @test_mm256_ipcvtbf16_epi8(
+ // CHECK: @llvm.x86.avx10.vcvtbf162ibs256
+ return _mm256_ipcvtbf16_epi8(__A);
}
-__m256i test_mm256_mask_ipcvtnebf16_epi8(__m256i __S, __mmask16 __A, __m256bh __B) {
- // CHECK-LABEL: @test_mm256_mask_ipcvtnebf16_epi8(
- // CHECK: @llvm.x86.avx10.vcvtnebf162ibs256
+__m256i test_mm256_mask_ipcvtbf16_epi8(__m256i __S, __mmask16 __A, __m256bh __B) {
+ // CHECK-LABEL: @test_mm256_mask_ipcvtbf16_epi8(
+ // CHECK: @llvm.x86.avx10.vcvtbf162ibs256
// CHECK: select <16 x i1> %{{.*}}, <16 x i16> %{{.*}}, <16 x i16> %{{.*}}
- return _mm256_mask_ipcvtnebf16_epi8(__S, __A, __B);
+ return _mm256_mask_ipcvtbf16_epi8(__S, __A, __B);
}
-__m256i test_mm256_maskz_ipcvtnebf16_epi8(__mmask16 __A, __m256bh __B) {
- // CHECK-LABEL: @test_mm256_maskz_ipcvtnebf16_epi8(
- // CHECK: @llvm.x86.avx10.vcvtnebf162ibs256
+__m256i test_mm256_maskz_ipcvtbf16_epi8(__mmask16 __A, __m256bh __B) {
+ // CHECK-LABEL: @test_mm256_maskz_ipcvtbf16_epi8(
+ // CHECK: @llvm.x86.avx10.vcvtbf162ibs256
// CHECK: zeroinitializer
// CHECK: select <16 x i1> %{{.*}}, <16 x i16> %{{.*}}, <16 x i16> %{{.*}}
- return _mm256_maskz_ipcvtnebf16_epi8(__A, __B);
+ return _mm256_maskz_ipcvtbf16_epi8(__A, __B);
}
-__m128i test_mm_ipcvtnebf16_epu8(__m128bh __A) {
- // CHECK-LABEL: @test_mm_ipcvtnebf16_epu8(
- // CHECK: @llvm.x86.avx10.vcvtnebf162iubs128
- return _mm_ipcvtnebf16_epu8(__A);
+__m128i test_mm_ipcvtbf16_epu8(__m128bh __A) {
+ // CHECK-LABEL: @test_mm_ipcvtbf16_epu8(
+ // CHECK: @llvm.x86.avx10.vcvtbf162iubs128
+ return _mm_ipcvtbf16_epu8(__A);
}
-__m128i test_mm_mask_ipcvtnebf16_epu8(__m128i __S, __mmask8 __A, __m128bh __B) {
- // CHECK-LABEL: @test_mm_mask_ipcvtnebf16_epu8(
- // CHECK: @llvm.x86.avx10.vcvtnebf162iubs128
+__m128i test_mm_mask_ipcvtbf16_epu8(__m128i __S, __mmask8 __A, __m128bh __B) {
+ // CHECK-LABEL: @test_mm_mask_ipcvtbf16_epu8(
+ // CHECK: @llvm.x86.avx10.vcvtbf162iubs128
// CHECK: select <8 x i1> %{{.*}}, <8 x i16> %{{.*}}, <8 x i16> %{{.*}}
- return _mm_mask_ipcvtnebf16_epu8(__S, __A, __B);
+ return _mm_mask_ipcvtbf16_epu8(__S, __A, __B);
}
-__m128i test_mm_maskz_ipcvtnebf16_epu8(__mmask8 __A, __m128bh __B) {
- // CHECK-LABEL: @test_mm_maskz_ipcvtnebf16_epu8(
- // CHECK: @llvm.x86.avx10.vcvtnebf162iubs128
+__m128i test_mm_maskz_ipcvtbf16_epu8(__mmask8 __A, __m128bh __B) {
+ // CHECK-LABEL: @test_mm_maskz_ipcvtbf16_epu8(
+ // CHECK: @llvm.x86.avx10.vcvtbf162iubs128
// CHECK: select <8 x i1> %{{.*}}, <8 x i16> %{{.*}}, <8 x i16> %{{.*}}
- return _mm_maskz_ipcvtnebf16_epu8(__A, __B);
+ return _mm_maskz_ipcvtbf16_epu8(__A, __B);
}
-__m256i test_mm256_ipcvtnebf16_epu8(__m256bh __A) {
- // CHECK-LABEL: @test_mm256_ipcvtnebf16_epu8(
- // CHECK: @llvm.x86.avx10.vcvtnebf162iubs256
- return _mm256_ipcvtnebf16_epu8(__A);
+__m256i test_mm256_ipcvtbf16_epu8(__m256bh __A) {
+ // CHECK-LABEL: @test_mm256_ipcvtbf16_epu8(
+ // CHECK: @llvm.x86.avx10.vcvtbf162iubs256
+ return _mm256_ipcvtbf16_epu8(__A);
}
-__m256i test_mm256_mask_ipcvtnebf16_epu8(__m256i __S, __mmask16 __A, __m256bh __B) {
- // CHECK-LABEL: @test_mm256_mask_ipcvtnebf16_epu8(
- // CHECK: @llvm.x86.avx10.vcvtnebf162iubs256
+__m256i test_mm256_mask_ipcvtbf16_epu8(__m256i __S, __mmask16 __A, __m256bh __B) {
+ // CHECK-LABEL: @test_mm256_mask_ipcvtbf16_epu8(
+ // CHECK: @llvm.x86.avx10.vcvtbf162iubs256
// CHECK: select <16 x i1> %{{.*}}, <16 x i16> %{{.*}}, <16 x i16> %{{.*}}
- return _mm256_mask_ipcvtnebf16_epu8(__S, __A, __B);
+ return _mm256_mask_ipcvtbf16_epu8(__S, __A, __B);
}
-__m256i test_mm256_maskz_ipcvtnebf16_epu8(__mmask16 __A, __m256bh __B) {
- // CHECK-LABEL: @test_mm256_maskz_ipcvtnebf16_epu8(
- // CHECK: @llvm.x86.avx10.vcvtnebf162iubs256
+__m256i test_mm256_maskz_ipcvtbf16_epu8(__mmask16 __A, __m256bh __B) {
+ // CHECK-LABEL: @test_mm256_maskz_ipcvtbf16_epu8(
+ // CHECK: @llvm.x86.avx10.vcvtbf162iubs256
// CHECK: zeroinitializer
// CHECK: select <16 x i1> %{{.*}}, <16 x i16> %{{.*}}, <16 x i16> %{{.*}}
- return _mm256_maskz_ipcvtnebf16_epu8(__A, __B);
+ return _mm256_maskz_ipcvtbf16_epu8(__A, __B);
}
__m128i test_mm_ipcvtph_epi8(__m128h __A) {
@@ -302,88 +302,88 @@ __m256i test_mm256_maskz_ipcvt_roundps_epu8(__mmask8 __A, __m256 __B) {
return _mm256_maskz_ipcvt_roundps_epu8(__A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);
}
-__m128i test_mm_ipcvttnebf16_epi8(__m128bh __A) {
- // CHECK-LABEL: @test_mm_ipcvttnebf16_epi8(
- // CHECK: @llvm.x86.avx10.vcvttnebf162ibs128
- return _mm_ipcvttnebf16_epi8(__A);
+__m128i test_mm_ipcvttbf16_epi8(__m128bh __A) {
+ // CHECK-LABEL: @test_mm_ipcvttbf16_epi8(
+ // CHECK: @llvm.x86.avx10.vcvttbf162ibs128
+ return _mm_ipcvttbf16_epi8(__A);
}
-__m128i test_mm_mask_ipcvttnebf16_epi8(__m128i __S, __mmask8 __A, __m128bh __B) {
- // CHECK-LABEL: @test_mm_mask_ipcvttnebf16_epi8(
- // CHECK: @llvm.x86.avx10.vcvttnebf162ibs128
+__m128i test_mm_mask_ipcvttbf16_epi8(__m128i __S, __mmask8 __A, __m128bh __B) {
+ // CHECK-LABEL: @test_mm_mask_ipcvttbf16_epi8(
+ // CHECK: @llvm.x86.avx10.vcvttbf162ibs128
// CHECK: select <8 x i1> %{{.*}}, <8 x i16> %{{.*}}, <8 x i16> %{{.*}}
- return _mm_mask_ipcvttnebf16_epi8(__S, __A, __B);
+ return _mm_mask_ipcvttbf16_epi8(__S, __A, __B);
}
-__m128i test_mm_maskz_ipcvttnebf16_epi8(__mmask8 __A, __m128bh __B) {
- // CHECK-LABEL: @test_mm_maskz_ipcvttnebf16_epi8(
- // CHECK: @llvm.x86.avx10.vcvttnebf162ibs128
+__m128i test_mm_maskz_ipcvttbf16_epi8(__mmask8 __A, __m128bh __B) {
+ // CHECK-LABEL: @test_mm_maskz_ipcvttbf16_epi8(
+ // CHECK: @llvm.x86.avx10.vcvttbf162ibs128
// CHECK: zeroinitializer
// CHECK: select <8 x i1> %{{.*}}, <8 x i16> %{{.*}}, <8 x i16> %{{.*}}
- return _mm_maskz_ipcvttnebf16_epi8(__A, __B);
+ return _mm_maskz_ipcvttbf16_epi8(__A, __B);
}
-__m256i test_mm256_ipcvttnebf16_epi8(__m256bh __A) {
- // CHECK-LABEL: @test_mm256_ipcvttnebf16_epi8(
- // CHECK: @llvm.x86.avx10.vcvttnebf162ibs256
- return _mm256_ipcvttnebf16_epi8(__A);
+__m256i test_mm256_ipcvttbf16_epi8(__m256bh __A) {
+ // CHECK-LABEL: @test_mm256_ipcvttbf16_epi8(
+ // CHECK: @llvm.x86.avx10.vcvttbf162ibs256
+ return _mm256_ipcvttbf16_epi8(__A);
}
-__m256i test_mm256_mask_ipcvttnebf16_epi8(__m256i __S, __mmask16 __A, __m256bh __B) {
- // CHECK-LABEL: @test_mm256_mask_ipcvttnebf16_epi8(
- // CHECK: @llvm.x86.avx10.vcvttnebf162ibs256
+__m256i test_mm256_mask_ipcvttbf16_epi8(__m256i __S, __mmask16 __A, __m256bh __B) {
+ // CHECK-LABEL: @test_mm256_mask_ipcvttbf16_epi8(
+ // CHECK: @llvm.x86.avx10.vcvttbf162ibs256
// CHECK: select <16 x i1> %{{.*}}, <16 x i16> %{{.*}}, <16 x i16> %{{.*}}
- return _mm256_mask_ipcvttnebf16_epi8(__S, __A, __B);
+ return _mm256_mask_ipcvttbf16_epi8(__S, __A, __B);
}
-__m256i test_mm256_maskz_ipcvttnebf16_epi8(__mmask16 __A, __m256bh __B) {
- // CHECK-LABEL: @test_mm256_maskz_ipcvttnebf16_epi8(
- // CHECK: @llvm.x86.avx10.vcvttnebf162ibs256
+__m256i test_mm256_maskz_ipcvttbf16_epi8(__mmask16 __A, __m256bh __B) {
+ // CHECK-LABEL: @test_mm256_maskz_ipcvttbf16_epi8(
+ // CHECK: @llvm.x86.avx10.vcvttbf162ibs256
// CHECK: zeroinitializer
// CHECK: select <16 x i1> %{{.*}}, <16 x i16> %{{.*}}, <16 x i16> %{{.*}}
- return _mm256_maskz_ipcvttnebf16_epi8(__A, __B);
+ return _mm256_maskz_ipcvttbf16_epi8(__A, __B);
}
-__m128i test_mm_ipcvttnebf16_epu8(__m128bh __A) {
- // CHECK-LABEL: @test_mm_ipcvttnebf16_epu8(
- // CHECK: @llvm.x86.avx10.vcvttnebf162iubs128
- return _mm_ipcvttnebf16_epu8(__A);
+__m128i test_mm_ipcvttbf16_epu8(__m128bh __A) {
+ // CHECK-LABEL: @test_mm_ipcvttbf16_epu8(
+ // CHECK: @llvm.x86.avx10.vcvttbf162iubs128
+ return _mm_ipcvttbf16_epu8(__A);
}
-__m128i test_mm_mask_ipcvttnebf16_epu8(__m128i __S, __mmask8 __A, __m128bh __B) {
- // CHECK-LABEL: @test_mm_mask_ipcvttnebf16_epu8(
- // CHECK: @llvm.x86.avx10.vcvttnebf162iubs128
+__m128i test_mm_mask_ipcvttbf16_epu8(__m128i __S, __mmask8 __A, __m128bh __B) {
+ // CHECK-LABEL: @test_mm_mask_ipcvttbf16_epu8(
+ // CHECK: @llvm.x86.avx10.vcvttbf162iubs128
// CHECK: select <8 x i1> %{{.*}}, <8 x i16> %{{.*}}, <8 x i16> %{{.*}}
- return _mm_mask_ipcvttnebf16_epu8(__S, __A, __B);
+ return _mm_mask_ipcvttbf16_epu8(__S, __A, __B);
}
-__m128i test_mm_maskz_ipcvttnebf16_epu8(__mmask8 __A, __m128bh __B) {
- // CHECK-LABEL: @test_mm_maskz_ipcvttnebf16_epu8(
- // CHECK: @llvm.x86.avx10.vcvttnebf162iubs128
+__m128i test_mm_maskz_ipcvttbf16_epu8(__mmask8 __A, __m128bh __B) {
+ // CHECK-LABEL: @test_mm_maskz_ipcvttbf16_epu8(
+ // CHECK: @llvm.x86.avx10.vcvttbf162iubs128
// CHECK: zeroinitializer
// CHECK: select <8 x i1> %{{.*}}, <8 x i16> %{{.*}}, <8 x i16> %{{.*}}
- return _mm_maskz_ipcvttnebf16_epu8(__A, __B);
+ return _mm_maskz_ipcvttbf16_epu8(__A, __B);
}
-__m256i test_mm256_ipcvttnebf16_epu8(__m256bh __A) {
- // CHECK-LABEL: @test_mm256_ipcvttnebf16_epu8(
- // CHECK: @llvm.x86.avx10.vcvttnebf162iubs256
- return _mm256_ipcvttnebf16_epu8(__A);
+__m256i test_mm256_ipcvttbf16_epu8(__m256bh __A) {
+ // CHECK-LABEL: @test_mm256_ipcvttbf16_epu8(
+ // CHECK: @llvm.x86.avx10.vcvttbf162iubs256
+ return _mm256_ipcvttbf16_epu8(__A);
}
-__m256i test_mm256_mask_ipcvttnebf16_epu8(__m256i __S, __mmask16 __A, __m256bh __B) {
- // CHECK-LABEL: @test_mm256_mask_ipcvttnebf16_epu8(
- // CHECK: @llvm.x86.avx10.vcvttnebf162iubs256
+__m256i test_mm256_mask_ipcvttbf16_epu8(__m256i __S, __mmask16 __A, __m256bh __B) {
+ // CHECK-LABEL: @test_mm256_mask_ipcvttbf16_epu8(
+ // CHECK: @llvm.x86.avx10.vcvttbf162iubs256
// CHECK: select <16 x i1> %{{.*}}, <16 x i16> %{{.*}}, <16 x i16> %{{.*}}
- return _mm256_mask_ipcvttnebf16_epu8(__S, __A, __B);
+ return _mm256_mask_ipcvttbf16_epu8(__S, __A, __B);
}
-__m256i test_mm256_maskz_ipcvttnebf16_epu8(__mmask16 __A, __m256bh __B) {
- // CHECK-LABEL: @test_mm256_maskz_ipcvttnebf16_epu8(
- // CHECK: @llvm.x86.avx10.vcvttnebf162iubs256
+__m256i test_mm256_maskz_ipcvttbf16_epu8(__mmask16 __A, __m256bh __B) {
+ // CHECK-LABEL: @test_mm256_maskz_ipcvttbf16_epu8(
+ // CHECK: @llvm.x86.avx10.vcvttbf162iubs256
// CHECK: zeroinitializer
// CHECK: select <16 x i1> %{{.*}}, <16 x i16> %{{.*}}, <16 x i16> %{{.*}}
- return _mm256_maskz_ipcvttnebf16_epu8(__A, __B);
+ return _mm256_maskz_ipcvttbf16_epu8(__A, __B);
}
__m128i test_mm_ipcvttph_epi8(__m128h __A) {
diff --git a/llvm/include/llvm/IR/IntrinsicsX86.td b/llvm/include/llvm/IR/IntrinsicsX86.td
index 42b211e0e1f75a..38624a2570eb09 100644
--- a/llvm/include/llvm/IR/IntrinsicsX86.td
+++ b/llvm/include/llvm/IR/IntrinsicsX86.td
@@ -7346,22 +7346,22 @@ def int_x86_avx10_mask_vminmaxss_round : ClangBuiltin<"__builtin_ia32_vminmaxss_
//===----------------------------------------------------------------------===//
let TargetPrefix = "x86" in {
-def int_x86_avx10_vcvtnebf162ibs128 : ClangBuiltin<"__builtin_ia32_vcvtnebf162ibs128">,
+def int_x86_avx10_vcvtbf162ibs128 : ClangBuiltin<"__builtin_ia32_vcvtbf162ibs128">,
DefaultAttrsIntrinsic<[llvm_v8i16_ty], [llvm_v8bf16_ty],
[IntrNoMem]>;
-def int_x86_avx10_vcvtnebf162ibs256 : ClangBuiltin<"__builtin_ia32_vcvtnebf162ibs256">,
+def int_x86_avx10_vcvtbf162ibs256 : ClangBuiltin<"__builtin_ia32_vcvtbf162ibs256">,
DefaultAttrsIntrinsic<[llvm_v16i16_ty], [llvm_v16bf16_ty],
[IntrNoMem]>;
-def int_x86_avx10_vcvtnebf162ibs512 : ClangBuiltin<"__builtin_ia32_vcvtnebf162ibs512">,
+def int_x86_avx10_vcvtbf162ibs512 : ClangBuiltin<"__builtin_ia32_vcvtbf162ibs512">,
DefaultAttrsIntrinsic<[llvm_v32i16_ty], [llvm_v32bf16_ty],
[IntrNoMem]>;
-def int_x86_avx10_vcvtnebf162iubs128 : ClangBuiltin<"__builtin_ia32_vcvtnebf162iubs128">,
+def int_x86_avx10_vcvtbf162iubs128 : ClangBuiltin<"__builtin_ia32_vcvtbf162iubs128">,
DefaultAttrsIntrinsic<[llvm_v8i16_ty], [llvm_v8bf16_ty],
[IntrNoMem]>;
-def int_x86_avx10_vcvtnebf162iubs256 : ClangBuiltin<"__builtin_ia32_vcvtnebf162iubs256">,
+def int_x86_avx10_vcvtbf162iubs256 : ClangBuiltin<"__builtin_ia32_vcvtbf162iubs256">,
DefaultAttrsIntrinsic<[llvm_v16i16_ty], [llvm_v16bf16_ty],
[IntrNoMem]>;
-def int_x86_avx10_vcvtnebf162iubs512 : ClangBuiltin<"__builtin_ia32_vcvtnebf162iubs512">,
+def int_x86_avx10_vcvtbf162iubs512 : ClangBuiltin<"__builtin_ia32_vcvtbf162iubs512">,
DefaultAttrsIntrinsic<[llvm_v32i16_ty], [llvm_v32bf16_ty],
[IntrNoMem]>;
def int_x86_avx10_mask_vcvtph2ibs128 : ClangBuiltin<"__builtin_ia32_vcvtph2ibs128_mask">,
@@ -7400,22 +7400,22 @@ def int_x86_avx10_mask_vcvtps2iubs256 : ClangBuiltin<"__builtin_ia32_vcvtps2iubs
def int_x86_avx10_mask_vcvtps2iubs512 : ClangBuiltin<"__builtin_ia32_vcvtps2iubs512_mask">,
DefaultAttrsIntrinsic<[llvm_v16i32_ty], [llvm_v16f32_ty, llvm_v16i32_ty, llvm_i16_ty, llvm_i32_ty],
[IntrNoMem, ImmArg<ArgIndex<3>>]>;
-def int_x86_avx10_vcvttnebf162ibs128 : ClangBuiltin<"__builtin_ia32_vcvttnebf162ibs128">,
+def int_x86_avx10_vcvttbf162ibs128 : ClangBuiltin<"__builtin_ia32_vcvttbf162ibs128">,
DefaultAttrsIntrinsic<[llvm_v8i16_ty], [llvm_v8bf16_ty],
[IntrNoMem]>;
-def int_x86_avx10_vcvttnebf162ibs256 : ClangBuiltin<"__builtin_ia32_vcvttnebf162ibs256">,
+def int_x86_avx10_vcvttbf162ibs256 : ClangBuiltin<"__builtin_ia32_vcvttbf162ibs256">,
DefaultAttrsIntrinsic<[llvm_v16i16_ty], [llvm_v16bf16_ty],
[IntrNoMem]>;
-def int_x86_avx10_vcvttnebf162ibs512 : ClangBuiltin<"__builtin_ia32_vcvttnebf162ibs512">,
+def int_x86_avx10_vcvttbf162ibs512 : ClangBuiltin<"__builtin_ia32_vcvttbf162ibs512">,
DefaultAttrsIntrinsic<[llvm_v32i16_ty], [llvm_v32bf16_ty],
[IntrNoMem]>;
-def int_x86_avx10_vcvttnebf162iubs128 : ClangBuiltin<"__builtin_ia32_vcvttnebf162iubs128">,
+def int_x86_avx10_vcvttbf162iubs128 : ClangBuiltin<"__builtin_ia32_vcvttbf162iubs128">,
DefaultAttrsIntrinsic<[llvm_v8i16_ty], [llvm_v8bf16_ty],
[IntrNoMem]>;
-def int_x86_avx10_vcvttnebf162iubs256 : ClangBuiltin<"__builtin_ia32_vcvttnebf162iubs256">,
+def int_x86_avx10_vcvttbf162iubs256 : ClangBuiltin<"__builtin_ia32_vcvttbf162iubs256">,
DefaultAttrsIntrinsic<[llvm_v16i16_ty], [llvm_v16bf16_ty],
[IntrNoMem]>;
-def int_x86_avx10_vcvttnebf162iubs512 : ClangBuiltin<"__builtin_ia32_vcvttnebf162iubs512">,
+def int_x86_avx10_vcvttbf162iubs512 : ClangBuiltin<"__builtin_ia32_vcvttbf162iubs512">,
DefaultAttrsIntrinsic<[llvm_v32i16_ty], [llvm_v32bf16_ty],
[IntrNoMem]>;
def int_x86_avx10_mask_vcvttph2ibs128 : ClangBuiltin<"__builtin_ia32_vcvttph2ibs128_mask">,
@@ -7893,4 +7893,4 @@ def int_x86_movrsdi : ClangBuiltin<"__builtin_ia32_movrsdi">,
[IntrReadMem]>;
def int_x86_prefetchrs : ClangBuiltin<"__builtin_ia32_prefetchrs">,
Intrinsic<[], [llvm_ptr_ty], []>;
-}
\ No newline at end of file
+}
diff --git a/llvm/lib/Target/X86/X86InstrAVX10.td b/llvm/lib/Target/X86/X86InstrAVX10.td
index 127016184bc17b..83cb87f1062891 100644
--- a/llvm/lib/Target/X86/X86InstrAVX10.td
+++ b/llvm/lib/Target/X86/X86InstrAVX10.td
@@ -564,13 +564,13 @@ multiclass avx10_sat_cvt_base<bits<8> Opc, string OpStr, X86SchedWriteWidths sch
}
}
-defm VCVTNEBF162IBS : avx10_sat_cvt_base<0x69, "vcvtnebf162ibs",
- SchedWriteVecIMul, X86vcvtp2ibs,
- avx512vl_i16_info, avx512vl_bf16_info>,
+defm VCVTBF162IBS : avx10_sat_cvt_base<0x69, "vcvtbf162ibs",
+ SchedWriteVecIMul, X86vcvtp2ibs,
+ avx512vl_i16_info, avx512vl_bf16_info>,
AVX512XDIi8Base, T_MAP5, EVEX_CD8<16, CD8VF>;
-defm VCVTNEBF162IUBS : avx10_sat_cvt_base<0x6b, "vcvtnebf162iubs",
- SchedWriteVecIMul, X86vcvtp2iubs,
- avx512vl_i16_info, avx512vl_bf16_info>,
+defm VCVTBF162IUBS : avx10_sat_cvt_base<0x6b, "vcvtbf162iubs",
+ SchedWriteVecIMul, X86vcvtp2iubs,
+ avx512vl_i16_info, avx512vl_bf16_info>,
AVX512XDIi8Base, T_MAP5, EVEX_CD8<16, CD8VF>;
defm VCVTPH2IBS : avx10_sat_cvt_base<0x69, "vcvtph2ibs", SchedWriteVecIMul,
@@ -603,13 +603,13 @@ defm VCVTPS2IUBS : avx10_sat_cvt_base<0x6b, "vcvtps2iubs", SchedWriteVecIMul,
X86vcvtp2iubsRnd>,
AVX512PDIi8Base, T_MAP5, EVEX_CD8<32, CD8VF>;
-defm VCVTTNEBF162IBS : avx10_sat_cvt_base<0x68, "vcvttnebf162ibs",
- SchedWriteVecIMul, X86vcvttp2ibs,
- avx512vl_i16_info, avx512vl_bf16_info>,
+defm VCVTTBF162IBS : avx10_sat_cvt_base<0x68, "vcvttbf162ibs",
+ SchedWriteVecIMul, X86vcvttp2ibs,
+ avx512vl_i16_info, avx512vl_bf16_info>,
AVX512XDIi8Base, T_MAP5, EVEX_CD8<16, CD8VF>;
-defm VCVTTNEBF162IUBS : avx10_sat_cvt_base<0x6a, "vcvttnebf162iubs",
- SchedWriteVecIMul, X86vcvttp2iubs,
- avx512vl_i16_info, avx512vl_bf16_info>,
+defm VCVTTBF162IUBS : avx10_sat_cvt_base<0x6a, "vcvttbf162iubs",
+ SchedWriteVecIMul, X86vcvttp2iubs,
+ avx512vl_i16_info, avx512vl_bf16_info>,
AVX512XDIi8Base, T_MAP5, EVEX_CD8<16, CD8VF>;
defm VCVTTPH2IBS : avx10_sat_cvt_base<0x68, "vcvttph2ibs", SchedWriteVecIMul,
diff --git a/llvm/lib/Target/X86/X86IntrinsicsInfo.h b/llvm/lib/Target/X86/X86IntrinsicsInfo.h
index 86fd04046d16a0..5638075ff7f816 100644
--- a/llvm/lib/Target/X86/X86IntrinsicsInfo.h
+++ b/llvm/lib/Target/X86/X86IntrinsicsInfo.h
@@ -757,6 +757,18 @@ static const IntrinsicData IntrinsicsWithoutChain[] = {
X86_INTRINSIC_DATA(avx10_vcomsbf16le, COMI, X86ISD::COMI, ISD::SETLE),
X86_INTRINSIC_DATA(avx10_vcomsbf16lt, COMI, X86ISD::COMI, ISD::SETLT),
X86_INTRINSIC_DATA(avx10_vcomsbf16neq, COMI, X86ISD::COMI, ISD::SETNE),
+ X86_INTRINSIC_DATA(avx10_vcvtbf162ibs128, INTR_TYPE_1OP, X86ISD::CVTP2IBS,
+ 0),
+ X86_INTRINSIC_DATA(avx10_vcvtbf162ibs256, INTR_TYPE_1OP, X86ISD::CVTP2IBS,
+ 0),
+ X86_INTRINSIC_DATA(avx10_vcvtbf162ibs512, INTR_TYPE_1OP, X86ISD::CVTP2IBS,
+ 0),
+ X86_INTRINSIC_DATA(avx10_vcvtbf162iubs128, INTR_TYPE_1OP,
+ X86ISD::CVTP2IUBS, 0),
+ X86_INTRINSIC_DATA(avx10_vcvtbf162iubs256, INTR_TYPE_1OP,
+ X86ISD::CVTP2IUBS, 0),
+ X86_INTRINSIC_DATA(avx10_vcvtbf162iubs512, INTR_TYPE_1OP,
+ X86ISD::CVTP2IUBS, 0),
X86_INTRINSIC_DATA(avx10_vcvtne2ph2bf8128, INTR_TYPE_2OP,
X86ISD::VCVTNE2PH2BF8, 0),
X86_INTRINSIC_DATA(avx10_vcvtne2ph2bf8256, INTR_TYPE_2OP,
@@ -781,29 +793,17 @@ static const IntrinsicData IntrinsicsWithoutChain[] = {
X86ISD::VCVTNE2PH2HF8S, 0),
X86_INTRINSIC_DATA(avx10_vcvtne2ph2hf8s512, INTR_TYPE_2OP,
X86ISD::VCVTNE2PH2HF8S, 0),
- X86_INTRINSIC_DATA(avx10_vcvtnebf162ibs128, INTR_TYPE_1OP, X86ISD::CVTP2IBS,
- 0),
- X86_INTRINSIC_DATA(avx10_vcvtnebf162ibs256, INTR_TYPE_1OP, X86ISD::CVTP2IBS,
- 0),
- X86_INTRINSIC_DATA(avx10_vcvtnebf162ibs512, INTR_TYPE_1OP, X86ISD::CVTP2IBS,
- 0),
- X86_INTRINSIC_DATA(avx10_vcvtnebf162iubs128, INTR_TYPE_1OP,
- X86ISD::CVTP2IUBS, 0),
- X86_INTRINSIC_DATA(avx10_vcvtnebf162iubs256, INTR_TYPE_1OP,
- X86ISD::CVTP2IUBS, 0),
- X86_INTRINSIC_DATA(avx10_vcvtnebf162iubs512, INTR_TYPE_1OP,
- X86ISD::CVTP2IUBS, 0),
- X86_INTRINSIC_DATA(avx10_vcvttnebf162ibs128, INTR_TYPE_1OP,
+ X86_INTRINSIC_DATA(avx10_vcvttbf162ibs128, INTR_TYPE_1OP,
X86ISD::CVTTP2IBS, 0),
- X86_INTRINSIC_DATA(avx10_vcvttnebf162ibs256, INTR_TYPE_1OP,
+ X86_INTRINSIC_DATA(avx10_vcvttbf162ibs256, INTR_TYPE_1OP,
X86ISD::CVTTP2IBS, 0),
- X86_INTRINSIC_DATA(avx10_vcvttnebf162ibs512, INTR_TYPE_1OP,
+ X86_INTRINSIC_DATA(avx10_vcvttbf162ibs512, INTR_TYPE_1OP,
X86ISD::CVTTP2IBS, 0),
- X86_INTRINSIC_DATA(avx10_vcvttnebf162iubs128, INTR_TYPE_1OP,
+ X86_INTRINSIC_DATA(avx10_vcvttbf162iubs128, INTR_TYPE_1OP,
X86ISD::CVTTP2IUBS, 0),
- X86_INTRINSIC_DATA(avx10_vcvttnebf162iubs256, INTR_TYPE_1OP,
+ X86_INTRINSIC_DATA(avx10_vcvttbf162iubs256, INTR_TYPE_1OP,
X86ISD::CVTTP2IUBS, 0),
- X86_INTRINSIC_DATA(avx10_vcvttnebf162iubs512, INTR_TYPE_1OP,
+ X86_INTRINSIC_DATA(avx10_vcvttbf162iubs512, INTR_TYPE_1OP,
X86ISD::CVTTP2IUBS, 0),
X86_INTRINSIC_DATA(avx10_vcvttsd2sis, INTR_TYPE_1OP_SAE, X86ISD::CVTTS2SIS,
X86ISD::CVTTS2SIS_SAE),
diff --git a/llvm/test/CodeGen/X86/avx10_2_512satcvt-intrinsics.ll b/llvm/test/CodeGen/X86/avx10_2_512satcvt-intrinsics.ll
index 19860530c030a0..8430b2e1c028dd 100644
--- a/llvm/test/CodeGen/X86/avx10_2_512satcvt-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/avx10_2_512satcvt-intrinsics.ll
@@ -2,108 +2,108 @@
; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64 --show-mc-encoding -mattr=+avx10.2-512 | FileCheck %s --check-prefixes=CHECK,X64
; RUN: llc < %s -verify-machineinstrs -mtriple=i686 --show-mc-encoding -mattr=+avx10.2-512 | FileCheck %s --check-prefixes=CHECK,X86
-define dso_local <8 x i64> @test_mm512_ipcvtnebf16_epi8(<32 x bfloat> noundef %__A) {
-; CHECK-LABEL: test_mm512_ipcvtnebf16_epi8:
+define dso_local <8 x i64> @test_mm512_ipcvtbf16_epi8(<32 x bfloat> noundef %__A) {
+; CHECK-LABEL: test_mm512_ipcvtbf16_epi8:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: vcvtnebf162ibs %zmm0, %zmm0 # encoding: [0x62,0xf5,0x7f,0x48,0x69,0xc0]
+; CHECK-NEXT: vcvtbf162ibs %zmm0, %zmm0 # encoding: [0x62,0xf5,0x7f,0x48,0x69,0xc0]
; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
entry:
- %0 = tail call <32 x i16> @llvm.x86.avx10.vcvtnebf162ibs512(<32 x bfloat> %__A)
+ %0 = tail call <32 x i16> @llvm.x86.avx10.vcvtbf162ibs512(<32 x bfloat> %__A)
%1 = bitcast <32 x i16> %0 to <8 x i64>
ret <8 x i64> %1
}
-define dso_local <8 x i64> @test_mm512_mask_ipcvtnebf16_epi8(<8 x i64> noundef %__S, i32 noundef %__A, <32 x bfloat> noundef %__B) {
-; X64-LABEL: test_mm512_mask_ipcvtnebf16_epi8:
+define dso_local <8 x i64> @test_mm512_mask_ipcvtbf16_epi8(<8 x i64> noundef %__S, i32 noundef %__A, <32 x bfloat> noundef %__B) {
+; X64-LABEL: test_mm512_mask_ipcvtbf16_epi8:
; X64: # %bb.0: # %entry
; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
-; X64-NEXT: vcvtnebf162ibs %zmm1, %zmm0 {%k1} # encoding: [0x62,0xf5,0x7f,0x49,0x69,0xc1]
+; X64-NEXT: vcvtbf162ibs %zmm1, %zmm0 {%k1} # encoding: [0x62,0xf5,0x7f,0x49,0x69,0xc1]
; X64-NEXT: retq # encoding: [0xc3]
;
-; X86-LABEL: test_mm512_mask_ipcvtnebf16_epi8:
+; X86-LABEL: test_mm512_mask_ipcvtbf16_epi8:
; X86: # %bb.0: # %entry
; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1 # encoding: [0xc4,0xe1,0xf9,0x90,0x4c,0x24,0x04]
-; X86-NEXT: vcvtnebf162ibs %zmm1, %zmm0 {%k1} # encoding: [0x62,0xf5,0x7f,0x49,0x69,0xc1]
+; X86-NEXT: vcvtbf162ibs %zmm1, %zmm0 {%k1} # encoding: [0x62,0xf5,0x7f,0x49,0x69,0xc1]
; X86-NEXT: retl # encoding: [0xc3]
entry:
%0 = bitcast <8 x i64> %__S to <32 x i16>
- %1 = tail call <32 x i16> @llvm.x86.avx10.vcvtnebf162ibs512(<32 x bfloat> %__B)
+ %1 = tail call <32 x i16> @llvm.x86.avx10.vcvtbf162ibs512(<32 x bfloat> %__B)
%2 = bitcast i32 %__A to <32 x i1>
%3 = select <32 x i1> %2, <32 x i16> %1, <32 x i16> %0
%4 = bitcast <32 x i16> %3 to <8 x i64>
ret <8 x i64> %4
}
-declare <32 x i16> @llvm.x86.avx10.vcvtnebf162ibs512(<32 x bfloat>)
+declare <32 x i16> @llvm.x86.avx10.vcvtbf162ibs512(<32 x bfloat>)
-define dso_local <8 x i64> @test_mm512_maskz_ipcvtnebf16_epi8(i32 noundef %__A, <32 x bfloat> noundef %__B) {
-; X64-LABEL: test_mm512_maskz_ipcvtnebf16_epi8:
+define dso_local <8 x i64> @test_mm512_maskz_ipcvtbf16_epi8(i32 noundef %__A, <32 x bfloat> noundef %__B) {
+; X64-LABEL: test_mm512_maskz_ipcvtbf16_epi8:
; X64: # %bb.0: # %entry
; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
-; X64-NEXT: vcvtnebf162ibs %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0xc9,0x69,0xc0]
+; X64-NEXT: vcvtbf162ibs %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0xc9,0x69,0xc0]
; X64-NEXT: retq # encoding: [0xc3]
;
-; X86-LABEL: test_mm512_maskz_ipcvtnebf16_epi8:
+; X86-LABEL: test_mm512_maskz_ipcvtbf16_epi8:
; X86: # %bb.0: # %entry
; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1 # encoding: [0xc4,0xe1,0xf9,0x90,0x4c,0x24,0x04]
-; X86-NEXT: vcvtnebf162ibs %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0xc9,0x69,0xc0]
+; X86-NEXT: vcvtbf162ibs %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0xc9,0x69,0xc0]
; X86-NEXT: retl # encoding: [0xc3]
entry:
- %0 = tail call <32 x i16> @llvm.x86.avx10.vcvtnebf162ibs512(<32 x bfloat> %__B)
+ %0 = tail call <32 x i16> @llvm.x86.avx10.vcvtbf162ibs512(<32 x bfloat> %__B)
%1 = bitcast i32 %__A to <32 x i1>
%2 = select <32 x i1> %1, <32 x i16> %0, <32 x i16> zeroinitializer
%3 = bitcast <32 x i16> %2 to <8 x i64>
ret <8 x i64> %3
}
-define dso_local <8 x i64> @test_mm512_ipcvtnebf16_epu8(<32 x bfloat> noundef %__A) {
-; CHECK-LABEL: test_mm512_ipcvtnebf16_epu8:
+define dso_local <8 x i64> @test_mm512_ipcvtbf16_epu8(<32 x bfloat> noundef %__A) {
+; CHECK-LABEL: test_mm512_ipcvtbf16_epu8:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: vcvtnebf162iubs %zmm0, %zmm0 # encoding: [0x62,0xf5,0x7f,0x48,0x6b,0xc0]
+; CHECK-NEXT: vcvtbf162iubs %zmm0, %zmm0 # encoding: [0x62,0xf5,0x7f,0x48,0x6b,0xc0]
; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
entry:
- %0 = tail call <32 x i16> @llvm.x86.avx10.vcvtnebf162iubs512(<32 x bfloat> %__A)
+ %0 = tail call <32 x i16> @llvm.x86.avx10.vcvtbf162iubs512(<32 x bfloat> %__A)
%1 = bitcast <32 x i16> %0 to <8 x i64>
ret <8 x i64> %1
}
-define dso_local <8 x i64> @test_mm512_mask_ipcvtnebf16_epu8(<8 x i64> noundef %__S, i32 noundef %__A, <32 x bfloat> noundef %__B) {
-; X64-LABEL: test_mm512_mask_ipcvtnebf16_epu8:
+define dso_local <8 x i64> @test_mm512_mask_ipcvtbf16_epu8(<8 x i64> noundef %__S, i32 noundef %__A, <32 x bfloat> noundef %__B) {
+; X64-LABEL: test_mm512_mask_ipcvtbf16_epu8:
; X64: # %bb.0: # %entry
; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
-; X64-NEXT: vcvtnebf162iubs %zmm1, %zmm0 {%k1} # encoding: [0x62,0xf5,0x7f,0x49,0x6b,0xc1]
+; X64-NEXT: vcvtbf162iubs %zmm1, %zmm0 {%k1} # encoding: [0x62,0xf5,0x7f,0x49,0x6b,0xc1]
; X64-NEXT: retq # encoding: [0xc3]
;
-; X86-LABEL: test_mm512_mask_ipcvtnebf16_epu8:
+; X86-LABEL: test_mm512_mask_ipcvtbf16_epu8:
; X86: # %bb.0: # %entry
; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1 # encoding: [0xc4,0xe1,0xf9,0x90,0x4c,0x24,0x04]
-; X86-NEXT: vcvtnebf162iubs %zmm1, %zmm0 {%k1} # encoding: [0x62,0xf5,0x7f,0x49,0x6b,0xc1]
+; X86-NEXT: vcvtbf162iubs %zmm1, %zmm0 {%k1} # encoding: [0x62,0xf5,0x7f,0x49,0x6b,0xc1]
; X86-NEXT: retl # encoding: [0xc3]
entry:
%0 = bitcast <8 x i64> %__S to <32 x i16>
- %1 = tail call <32 x i16> @llvm.x86.avx10.vcvtnebf162iubs512(<32 x bfloat> %__B)
+ %1 = tail call <32 x i16> @llvm.x86.avx10.vcvtbf162iubs512(<32 x bfloat> %__B)
%2 = bitcast i32 %__A to <32 x i1>
%3 = select <32 x i1> %2, <32 x i16> %1, <32 x i16> %0
%4 = bitcast <32 x i16> %3 to <8 x i64>
ret <8 x i64> %4
}
-declare <32 x i16> @llvm.x86.avx10.vcvtnebf162iubs512(<32 x bfloat>)
+declare <32 x i16> @llvm.x86.avx10.vcvtbf162iubs512(<32 x bfloat>)
-define dso_local <8 x i64> @test_mm512_maskz_ipcvtnebf16_epu8(i32 noundef %__A, <32 x bfloat> noundef %__B) {
-; X64-LABEL: test_mm512_maskz_ipcvtnebf16_epu8:
+define dso_local <8 x i64> @test_mm512_maskz_ipcvtbf16_epu8(i32 noundef %__A, <32 x bfloat> noundef %__B) {
+; X64-LABEL: test_mm512_maskz_ipcvtbf16_epu8:
; X64: # %bb.0: # %entry
; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
-; X64-NEXT: vcvtnebf162iubs %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0xc9,0x6b,0xc0]
+; X64-NEXT: vcvtbf162iubs %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0xc9,0x6b,0xc0]
; X64-NEXT: retq # encoding: [0xc3]
;
-; X86-LABEL: test_mm512_maskz_ipcvtnebf16_epu8:
+; X86-LABEL: test_mm512_maskz_ipcvtbf16_epu8:
; X86: # %bb.0: # %entry
; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1 # encoding: [0xc4,0xe1,0xf9,0x90,0x4c,0x24,0x04]
-; X86-NEXT: vcvtnebf162iubs %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0xc9,0x6b,0xc0]
+; X86-NEXT: vcvtbf162iubs %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0xc9,0x6b,0xc0]
; X86-NEXT: retl # encoding: [0xc3]
entry:
- %0 = tail call <32 x i16> @llvm.x86.avx10.vcvtnebf162iubs512(<32 x bfloat> %__B)
+ %0 = tail call <32 x i16> @llvm.x86.avx10.vcvtbf162iubs512(<32 x bfloat> %__B)
%1 = bitcast i32 %__A to <32 x i1>
%2 = select <32 x i1> %1, <32 x i16> %0, <32 x i16> zeroinitializer
%3 = bitcast <32 x i16> %2 to <8 x i64>
@@ -502,108 +502,108 @@ entry:
ret <8 x i64> %1
}
-define dso_local <8 x i64> @test_mm512_ipcvttnebf16_epi8(<32 x bfloat> noundef %__A) {
-; CHECK-LABEL: test_mm512_ipcvttnebf16_epi8:
+define dso_local <8 x i64> @test_mm512_ipcvttbf16_epi8(<32 x bfloat> noundef %__A) {
+; CHECK-LABEL: test_mm512_ipcvttbf16_epi8:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: vcvttnebf162ibs %zmm0, %zmm0 # encoding: [0x62,0xf5,0x7f,0x48,0x68,0xc0]
+; CHECK-NEXT: vcvttbf162ibs %zmm0, %zmm0 # encoding: [0x62,0xf5,0x7f,0x48,0x68,0xc0]
; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
entry:
- %0 = tail call <32 x i16> @llvm.x86.avx10.vcvttnebf162ibs512(<32 x bfloat> %__A)
+ %0 = tail call <32 x i16> @llvm.x86.avx10.vcvttbf162ibs512(<32 x bfloat> %__A)
%1 = bitcast <32 x i16> %0 to <8 x i64>
ret <8 x i64> %1
}
-define dso_local <8 x i64> @test_mm512_mask_ipcvttnebf16_epi8(<8 x i64> noundef %__S, i32 noundef %__A, <32 x bfloat> noundef %__B) {
-; X64-LABEL: test_mm512_mask_ipcvttnebf16_epi8:
+define dso_local <8 x i64> @test_mm512_mask_ipcvttbf16_epi8(<8 x i64> noundef %__S, i32 noundef %__A, <32 x bfloat> noundef %__B) {
+; X64-LABEL: test_mm512_mask_ipcvttbf16_epi8:
; X64: # %bb.0: # %entry
; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
-; X64-NEXT: vcvttnebf162ibs %zmm1, %zmm0 {%k1} # encoding: [0x62,0xf5,0x7f,0x49,0x68,0xc1]
+; X64-NEXT: vcvttbf162ibs %zmm1, %zmm0 {%k1} # encoding: [0x62,0xf5,0x7f,0x49,0x68,0xc1]
; X64-NEXT: retq # encoding: [0xc3]
;
-; X86-LABEL: test_mm512_mask_ipcvttnebf16_epi8:
+; X86-LABEL: test_mm512_mask_ipcvttbf16_epi8:
; X86: # %bb.0: # %entry
; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1 # encoding: [0xc4,0xe1,0xf9,0x90,0x4c,0x24,0x04]
-; X86-NEXT: vcvttnebf162ibs %zmm1, %zmm0 {%k1} # encoding: [0x62,0xf5,0x7f,0x49,0x68,0xc1]
+; X86-NEXT: vcvttbf162ibs %zmm1, %zmm0 {%k1} # encoding: [0x62,0xf5,0x7f,0x49,0x68,0xc1]
; X86-NEXT: retl # encoding: [0xc3]
entry:
%0 = bitcast <8 x i64> %__S to <32 x i16>
- %1 = tail call <32 x i16> @llvm.x86.avx10.vcvttnebf162ibs512(<32 x bfloat> %__B)
+ %1 = tail call <32 x i16> @llvm.x86.avx10.vcvttbf162ibs512(<32 x bfloat> %__B)
%2 = bitcast i32 %__A to <32 x i1>
%3 = select <32 x i1> %2, <32 x i16> %1, <32 x i16> %0
%4 = bitcast <32 x i16> %3 to <8 x i64>
ret <8 x i64> %4
}
-declare <32 x i16> @llvm.x86.avx10.vcvttnebf162ibs512(<32 x bfloat>)
+declare <32 x i16> @llvm.x86.avx10.vcvttbf162ibs512(<32 x bfloat>)
-define dso_local <8 x i64> @test_mm512_maskz_ipcvttnebf16_epi8(i32 noundef %__A, <32 x bfloat> noundef %__B) {
-; X64-LABEL: test_mm512_maskz_ipcvttnebf16_epi8:
+define dso_local <8 x i64> @test_mm512_maskz_ipcvttbf16_epi8(i32 noundef %__A, <32 x bfloat> noundef %__B) {
+; X64-LABEL: test_mm512_maskz_ipcvttbf16_epi8:
; X64: # %bb.0: # %entry
; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
-; X64-NEXT: vcvttnebf162ibs %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0xc9,0x68,0xc0]
+; X64-NEXT: vcvttbf162ibs %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0xc9,0x68,0xc0]
; X64-NEXT: retq # encoding: [0xc3]
;
-; X86-LABEL: test_mm512_maskz_ipcvttnebf16_epi8:
+; X86-LABEL: test_mm512_maskz_ipcvttbf16_epi8:
; X86: # %bb.0: # %entry
; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1 # encoding: [0xc4,0xe1,0xf9,0x90,0x4c,0x24,0x04]
-; X86-NEXT: vcvttnebf162ibs %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0xc9,0x68,0xc0]
+; X86-NEXT: vcvttbf162ibs %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0xc9,0x68,0xc0]
; X86-NEXT: retl # encoding: [0xc3]
entry:
- %0 = tail call <32 x i16> @llvm.x86.avx10.vcvttnebf162ibs512(<32 x bfloat> %__B)
+ %0 = tail call <32 x i16> @llvm.x86.avx10.vcvttbf162ibs512(<32 x bfloat> %__B)
%1 = bitcast i32 %__A to <32 x i1>
%2 = select <32 x i1> %1, <32 x i16> %0, <32 x i16> zeroinitializer
%3 = bitcast <32 x i16> %2 to <8 x i64>
ret <8 x i64> %3
}
-define dso_local <8 x i64> @test_mm512_ipcvttnebf16_epu8(<32 x bfloat> noundef %__A) {
-; CHECK-LABEL: test_mm512_ipcvttnebf16_epu8:
+define dso_local <8 x i64> @test_mm512_ipcvttbf16_epu8(<32 x bfloat> noundef %__A) {
+; CHECK-LABEL: test_mm512_ipcvttbf16_epu8:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: vcvttnebf162iubs %zmm0, %zmm0 # encoding: [0x62,0xf5,0x7f,0x48,0x6a,0xc0]
+; CHECK-NEXT: vcvttbf162iubs %zmm0, %zmm0 # encoding: [0x62,0xf5,0x7f,0x48,0x6a,0xc0]
; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
entry:
- %0 = tail call <32 x i16> @llvm.x86.avx10.vcvttnebf162iubs512(<32 x bfloat> %__A)
+ %0 = tail call <32 x i16> @llvm.x86.avx10.vcvttbf162iubs512(<32 x bfloat> %__A)
%1 = bitcast <32 x i16> %0 to <8 x i64>
ret <8 x i64> %1
}
-define dso_local <8 x i64> @test_mm512_mask_ipcvttnebf16_epu8(<8 x i64> noundef %__S, i32 noundef %__A, <32 x bfloat> noundef %__B) {
-; X64-LABEL: test_mm512_mask_ipcvttnebf16_epu8:
+define dso_local <8 x i64> @test_mm512_mask_ipcvttbf16_epu8(<8 x i64> noundef %__S, i32 noundef %__A, <32 x bfloat> noundef %__B) {
+; X64-LABEL: test_mm512_mask_ipcvttbf16_epu8:
; X64: # %bb.0: # %entry
; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
-; X64-NEXT: vcvttnebf162iubs %zmm1, %zmm0 {%k1} # encoding: [0x62,0xf5,0x7f,0x49,0x6a,0xc1]
+; X64-NEXT: vcvttbf162iubs %zmm1, %zmm0 {%k1} # encoding: [0x62,0xf5,0x7f,0x49,0x6a,0xc1]
; X64-NEXT: retq # encoding: [0xc3]
;
-; X86-LABEL: test_mm512_mask_ipcvttnebf16_epu8:
+; X86-LABEL: test_mm512_mask_ipcvttbf16_epu8:
; X86: # %bb.0: # %entry
; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1 # encoding: [0xc4,0xe1,0xf9,0x90,0x4c,0x24,0x04]
-; X86-NEXT: vcvttnebf162iubs %zmm1, %zmm0 {%k1} # encoding: [0x62,0xf5,0x7f,0x49,0x6a,0xc1]
+; X86-NEXT: vcvttbf162iubs %zmm1, %zmm0 {%k1} # encoding: [0x62,0xf5,0x7f,0x49,0x6a,0xc1]
; X86-NEXT: retl # encoding: [0xc3]
entry:
%0 = bitcast <8 x i64> %__S to <32 x i16>
- %1 = tail call <32 x i16> @llvm.x86.avx10.vcvttnebf162iubs512(<32 x bfloat> %__B)
+ %1 = tail call <32 x i16> @llvm.x86.avx10.vcvttbf162iubs512(<32 x bfloat> %__B)
%2 = bitcast i32 %__A to <32 x i1>
%3 = select <32 x i1> %2, <32 x i16> %1, <32 x i16> %0
%4 = bitcast <32 x i16> %3 to <8 x i64>
ret <8 x i64> %4
}
-declare <32 x i16> @llvm.x86.avx10.vcvttnebf162iubs512(<32 x bfloat>)
+declare <32 x i16> @llvm.x86.avx10.vcvttbf162iubs512(<32 x bfloat>)
-define dso_local <8 x i64> @test_mm512_maskz_ipcvttnebf16_epu8(i32 noundef %__A, <32 x bfloat> noundef %__B) {
-; X64-LABEL: test_mm512_maskz_ipcvttnebf16_epu8:
+define dso_local <8 x i64> @test_mm512_maskz_ipcvttbf16_epu8(i32 noundef %__A, <32 x bfloat> noundef %__B) {
+; X64-LABEL: test_mm512_maskz_ipcvttbf16_epu8:
; X64: # %bb.0: # %entry
; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
-; X64-NEXT: vcvttnebf162iubs %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0xc9,0x6a,0xc0]
+; X64-NEXT: vcvttbf162iubs %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0xc9,0x6a,0xc0]
; X64-NEXT: retq # encoding: [0xc3]
;
-; X86-LABEL: test_mm512_maskz_ipcvttnebf16_epu8:
+; X86-LABEL: test_mm512_maskz_ipcvttbf16_epu8:
; X86: # %bb.0: # %entry
; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1 # encoding: [0xc4,0xe1,0xf9,0x90,0x4c,0x24,0x04]
-; X86-NEXT: vcvttnebf162iubs %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0xc9,0x6a,0xc0]
+; X86-NEXT: vcvttbf162iubs %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0xc9,0x6a,0xc0]
; X86-NEXT: retl # encoding: [0xc3]
entry:
- %0 = tail call <32 x i16> @llvm.x86.avx10.vcvttnebf162iubs512(<32 x bfloat> %__B)
+ %0 = tail call <32 x i16> @llvm.x86.avx10.vcvttbf162iubs512(<32 x bfloat> %__B)
%1 = bitcast i32 %__A to <32 x i1>
%2 = select <32 x i1> %1, <32 x i16> %0, <32 x i16> zeroinitializer
%3 = bitcast <32 x i16> %2 to <8 x i64>
diff --git a/llvm/test/CodeGen/X86/avx10_2satcvt-intrinsics.ll b/llvm/test/CodeGen/X86/avx10_2satcvt-intrinsics.ll
index e16aa9d2de3199..bbde50574a8e1a 100644
--- a/llvm/test/CodeGen/X86/avx10_2satcvt-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/avx10_2satcvt-intrinsics.ll
@@ -2,221 +2,221 @@
; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64 --show-mc-encoding -mattr=+avx10.2-256 | FileCheck %s --check-prefixes=CHECK,X64
; RUN: llc < %s -verify-machineinstrs -mtriple=i686 --show-mc-encoding -mattr=+avx10.2-256 | FileCheck %s --check-prefixes=CHECK,X86
-define dso_local <2 x i64> @test_mm_ipcvtnebf16_epi8(<8 x bfloat> noundef %__A) {
-; CHECK-LABEL: test_mm_ipcvtnebf16_epi8:
+define dso_local <2 x i64> @test_mm_ipcvtbf16_epi8(<8 x bfloat> noundef %__A) {
+; CHECK-LABEL: test_mm_ipcvtbf16_epi8:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: vcvtnebf162ibs %xmm0, %xmm0 # encoding: [0x62,0xf5,0x7f,0x08,0x69,0xc0]
+; CHECK-NEXT: vcvtbf162ibs %xmm0, %xmm0 # encoding: [0x62,0xf5,0x7f,0x08,0x69,0xc0]
; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
entry:
- %0 = tail call <8 x i16> @llvm.x86.avx10.vcvtnebf162ibs128(<8 x bfloat> %__A)
+ %0 = tail call <8 x i16> @llvm.x86.avx10.vcvtbf162ibs128(<8 x bfloat> %__A)
%1 = bitcast <8 x i16> %0 to <2 x i64>
ret <2 x i64> %1
}
-define dso_local <2 x i64> @test_mm_mask_ipcvtnebf16_epi8(<2 x i64> noundef %__S, i8 noundef zeroext %__A, <8 x bfloat> noundef %__B) {
-; X64-LABEL: test_mm_mask_ipcvtnebf16_epi8:
+define dso_local <2 x i64> @test_mm_mask_ipcvtbf16_epi8(<2 x i64> noundef %__S, i8 noundef zeroext %__A, <8 x bfloat> noundef %__B) {
+; X64-LABEL: test_mm_mask_ipcvtbf16_epi8:
; X64: # %bb.0: # %entry
; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
-; X64-NEXT: vcvtnebf162ibs %xmm1, %xmm0 {%k1} # encoding: [0x62,0xf5,0x7f,0x09,0x69,0xc1]
+; X64-NEXT: vcvtbf162ibs %xmm1, %xmm0 {%k1} # encoding: [0x62,0xf5,0x7f,0x09,0x69,0xc1]
; X64-NEXT: retq # encoding: [0xc3]
;
-; X86-LABEL: test_mm_mask_ipcvtnebf16_epi8:
+; X86-LABEL: test_mm_mask_ipcvtbf16_epi8:
; X86: # %bb.0: # %entry
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
-; X86-NEXT: vcvtnebf162ibs %xmm1, %xmm0 {%k1} # encoding: [0x62,0xf5,0x7f,0x09,0x69,0xc1]
+; X86-NEXT: vcvtbf162ibs %xmm1, %xmm0 {%k1} # encoding: [0x62,0xf5,0x7f,0x09,0x69,0xc1]
; X86-NEXT: retl # encoding: [0xc3]
entry:
%0 = bitcast <2 x i64> %__S to <8 x i16>
- %1 = tail call <8 x i16> @llvm.x86.avx10.vcvtnebf162ibs128(<8 x bfloat> %__B)
+ %1 = tail call <8 x i16> @llvm.x86.avx10.vcvtbf162ibs128(<8 x bfloat> %__B)
%2 = bitcast i8 %__A to <8 x i1>
%3 = select <8 x i1> %2, <8 x i16> %1, <8 x i16> %0
%4 = bitcast <8 x i16> %3 to <2 x i64>
ret <2 x i64> %4
}
-declare <8 x i16> @llvm.x86.avx10.vcvtnebf162ibs128(<8 x bfloat>)
+declare <8 x i16> @llvm.x86.avx10.vcvtbf162ibs128(<8 x bfloat>)
-define dso_local <2 x i64> @test_mm_maskz_ipcvtnebf16_epi8(i8 noundef zeroext %__A, <8 x bfloat> noundef %__B) {
-; X64-LABEL: test_mm_maskz_ipcvtnebf16_epi8:
+define dso_local <2 x i64> @test_mm_maskz_ipcvtbf16_epi8(i8 noundef zeroext %__A, <8 x bfloat> noundef %__B) {
+; X64-LABEL: test_mm_maskz_ipcvtbf16_epi8:
; X64: # %bb.0: # %entry
; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
-; X64-NEXT: vcvtnebf162ibs %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0x89,0x69,0xc0]
+; X64-NEXT: vcvtbf162ibs %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0x89,0x69,0xc0]
; X64-NEXT: retq # encoding: [0xc3]
;
-; X86-LABEL: test_mm_maskz_ipcvtnebf16_epi8:
+; X86-LABEL: test_mm_maskz_ipcvtbf16_epi8:
; X86: # %bb.0: # %entry
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
-; X86-NEXT: vcvtnebf162ibs %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0x89,0x69,0xc0]
+; X86-NEXT: vcvtbf162ibs %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0x89,0x69,0xc0]
; X86-NEXT: retl # encoding: [0xc3]
entry:
- %0 = tail call <8 x i16> @llvm.x86.avx10.vcvtnebf162ibs128(<8 x bfloat> %__B)
+ %0 = tail call <8 x i16> @llvm.x86.avx10.vcvtbf162ibs128(<8 x bfloat> %__B)
%1 = bitcast i8 %__A to <8 x i1>
%2 = select <8 x i1> %1, <8 x i16> %0, <8 x i16> zeroinitializer
%3 = bitcast <8 x i16> %2 to <2 x i64>
ret <2 x i64> %3
}
-define dso_local <4 x i64> @test_mm256_ipcvtnebf16_epi8(<16 x bfloat> noundef %__A) local_unnamed_addr #2 {
-; CHECK-LABEL: test_mm256_ipcvtnebf16_epi8:
+define dso_local <4 x i64> @test_mm256_ipcvtbf16_epi8(<16 x bfloat> noundef %__A) local_unnamed_addr #2 {
+; CHECK-LABEL: test_mm256_ipcvtbf16_epi8:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: vcvtnebf162ibs %ymm0, %ymm0 # encoding: [0x62,0xf5,0x7f,0x28,0x69,0xc0]
+; CHECK-NEXT: vcvtbf162ibs %ymm0, %ymm0 # encoding: [0x62,0xf5,0x7f,0x28,0x69,0xc0]
; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
entry:
- %0 = tail call <16 x i16> @llvm.x86.avx10.vcvtnebf162ibs256(<16 x bfloat> %__A)
+ %0 = tail call <16 x i16> @llvm.x86.avx10.vcvtbf162ibs256(<16 x bfloat> %__A)
%1 = bitcast <16 x i16> %0 to <4 x i64>
ret <4 x i64> %1
}
-define dso_local <4 x i64> @test_mm256_mask_ipcvtnebf16_epi8(<4 x i64> noundef %__S, i16 noundef zeroext %__A, <16 x bfloat> noundef %__B) local_unnamed_addr #2 {
-; X64-LABEL: test_mm256_mask_ipcvtnebf16_epi8:
+define dso_local <4 x i64> @test_mm256_mask_ipcvtbf16_epi8(<4 x i64> noundef %__S, i16 noundef zeroext %__A, <16 x bfloat> noundef %__B) local_unnamed_addr #2 {
+; X64-LABEL: test_mm256_mask_ipcvtbf16_epi8:
; X64: # %bb.0: # %entry
; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
-; X64-NEXT: vcvtnebf162ibs %ymm1, %ymm0 {%k1} # encoding: [0x62,0xf5,0x7f,0x29,0x69,0xc1]
+; X64-NEXT: vcvtbf162ibs %ymm1, %ymm0 {%k1} # encoding: [0x62,0xf5,0x7f,0x29,0x69,0xc1]
; X64-NEXT: retq # encoding: [0xc3]
;
-; X86-LABEL: test_mm256_mask_ipcvtnebf16_epi8:
+; X86-LABEL: test_mm256_mask_ipcvtbf16_epi8:
; X86: # %bb.0: # %entry
; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
-; X86-NEXT: vcvtnebf162ibs %ymm1, %ymm0 {%k1} # encoding: [0x62,0xf5,0x7f,0x29,0x69,0xc1]
+; X86-NEXT: vcvtbf162ibs %ymm1, %ymm0 {%k1} # encoding: [0x62,0xf5,0x7f,0x29,0x69,0xc1]
; X86-NEXT: retl # encoding: [0xc3]
entry:
%0 = bitcast <4 x i64> %__S to <16 x i16>
- %1 = tail call <16 x i16> @llvm.x86.avx10.vcvtnebf162ibs256(<16 x bfloat> %__B)
+ %1 = tail call <16 x i16> @llvm.x86.avx10.vcvtbf162ibs256(<16 x bfloat> %__B)
%2 = bitcast i16 %__A to <16 x i1>
%3 = select <16 x i1> %2, <16 x i16> %1, <16 x i16> %0
%4 = bitcast <16 x i16> %3 to <4 x i64>
ret <4 x i64> %4
}
-declare <16 x i16> @llvm.x86.avx10.vcvtnebf162ibs256(<16 x bfloat>)
+declare <16 x i16> @llvm.x86.avx10.vcvtbf162ibs256(<16 x bfloat>)
-define dso_local <4 x i64> @test_mm256_maskz_ipcvtnebf16_epi8(i16 noundef zeroext %__A, <16 x bfloat> noundef %__B) local_unnamed_addr #2 {
-; X64-LABEL: test_mm256_maskz_ipcvtnebf16_epi8:
+define dso_local <4 x i64> @test_mm256_maskz_ipcvtbf16_epi8(i16 noundef zeroext %__A, <16 x bfloat> noundef %__B) local_unnamed_addr #2 {
+; X64-LABEL: test_mm256_maskz_ipcvtbf16_epi8:
; X64: # %bb.0: # %entry
; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
-; X64-NEXT: vcvtnebf162ibs %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0xa9,0x69,0xc0]
+; X64-NEXT: vcvtbf162ibs %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0xa9,0x69,0xc0]
; X64-NEXT: retq # encoding: [0xc3]
;
-; X86-LABEL: test_mm256_maskz_ipcvtnebf16_epi8:
+; X86-LABEL: test_mm256_maskz_ipcvtbf16_epi8:
; X86: # %bb.0: # %entry
; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
-; X86-NEXT: vcvtnebf162ibs %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0xa9,0x69,0xc0]
+; X86-NEXT: vcvtbf162ibs %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0xa9,0x69,0xc0]
; X86-NEXT: retl # encoding: [0xc3]
entry:
- %0 = tail call <16 x i16> @llvm.x86.avx10.vcvtnebf162ibs256(<16 x bfloat> %__B)
+ %0 = tail call <16 x i16> @llvm.x86.avx10.vcvtbf162ibs256(<16 x bfloat> %__B)
%1 = bitcast i16 %__A to <16 x i1>
%2 = select <16 x i1> %1, <16 x i16> %0, <16 x i16> zeroinitializer
%3 = bitcast <16 x i16> %2 to <4 x i64>
ret <4 x i64> %3
}
-define dso_local <2 x i64> @test_mm_ipcvtnebf16_epu8(<8 x bfloat> noundef %__A) {
-; CHECK-LABEL: test_mm_ipcvtnebf16_epu8:
+define dso_local <2 x i64> @test_mm_ipcvtbf16_epu8(<8 x bfloat> noundef %__A) {
+; CHECK-LABEL: test_mm_ipcvtbf16_epu8:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: vcvtnebf162iubs %xmm0, %xmm0 # encoding: [0x62,0xf5,0x7f,0x08,0x6b,0xc0]
+; CHECK-NEXT: vcvtbf162iubs %xmm0, %xmm0 # encoding: [0x62,0xf5,0x7f,0x08,0x6b,0xc0]
; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
entry:
- %0 = tail call <8 x i16> @llvm.x86.avx10.vcvtnebf162iubs128(<8 x bfloat> %__A)
+ %0 = tail call <8 x i16> @llvm.x86.avx10.vcvtbf162iubs128(<8 x bfloat> %__A)
%1 = bitcast <8 x i16> %0 to <2 x i64>
ret <2 x i64> %1
}
-define dso_local <2 x i64> @test_mm_mask_ipcvtnebf16_epu8(<2 x i64> noundef %__S, i8 noundef zeroext %__A, <8 x bfloat> noundef %__B) {
-; X64-LABEL: test_mm_mask_ipcvtnebf16_epu8:
+define dso_local <2 x i64> @test_mm_mask_ipcvtbf16_epu8(<2 x i64> noundef %__S, i8 noundef zeroext %__A, <8 x bfloat> noundef %__B) {
+; X64-LABEL: test_mm_mask_ipcvtbf16_epu8:
; X64: # %bb.0: # %entry
; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
-; X64-NEXT: vcvtnebf162iubs %xmm1, %xmm0 {%k1} # encoding: [0x62,0xf5,0x7f,0x09,0x6b,0xc1]
+; X64-NEXT: vcvtbf162iubs %xmm1, %xmm0 {%k1} # encoding: [0x62,0xf5,0x7f,0x09,0x6b,0xc1]
; X64-NEXT: retq # encoding: [0xc3]
;
-; X86-LABEL: test_mm_mask_ipcvtnebf16_epu8:
+; X86-LABEL: test_mm_mask_ipcvtbf16_epu8:
; X86: # %bb.0: # %entry
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
-; X86-NEXT: vcvtnebf162iubs %xmm1, %xmm0 {%k1} # encoding: [0x62,0xf5,0x7f,0x09,0x6b,0xc1]
+; X86-NEXT: vcvtbf162iubs %xmm1, %xmm0 {%k1} # encoding: [0x62,0xf5,0x7f,0x09,0x6b,0xc1]
; X86-NEXT: retl # encoding: [0xc3]
entry:
%0 = bitcast <2 x i64> %__S to <8 x i16>
- %1 = tail call <8 x i16> @llvm.x86.avx10.vcvtnebf162iubs128(<8 x bfloat> %__B)
+ %1 = tail call <8 x i16> @llvm.x86.avx10.vcvtbf162iubs128(<8 x bfloat> %__B)
%2 = bitcast i8 %__A to <8 x i1>
%3 = select <8 x i1> %2, <8 x i16> %1, <8 x i16> %0
%4 = bitcast <8 x i16> %3 to <2 x i64>
ret <2 x i64> %4
}
-declare <8 x i16> @llvm.x86.avx10.vcvtnebf162iubs128(<8 x bfloat>)
+declare <8 x i16> @llvm.x86.avx10.vcvtbf162iubs128(<8 x bfloat>)
-define dso_local <2 x i64> @test_mm_maskz_ipcvtnebf16_epu8(i8 noundef zeroext %__A, <8 x bfloat> noundef %__B) {
-; X64-LABEL: test_mm_maskz_ipcvtnebf16_epu8:
+define dso_local <2 x i64> @test_mm_maskz_ipcvtbf16_epu8(i8 noundef zeroext %__A, <8 x bfloat> noundef %__B) {
+; X64-LABEL: test_mm_maskz_ipcvtbf16_epu8:
; X64: # %bb.0: # %entry
; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
-; X64-NEXT: vcvtnebf162iubs %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0x89,0x6b,0xc0]
+; X64-NEXT: vcvtbf162iubs %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0x89,0x6b,0xc0]
; X64-NEXT: retq # encoding: [0xc3]
;
-; X86-LABEL: test_mm_maskz_ipcvtnebf16_epu8:
+; X86-LABEL: test_mm_maskz_ipcvtbf16_epu8:
; X86: # %bb.0: # %entry
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
-; X86-NEXT: vcvtnebf162iubs %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0x89,0x6b,0xc0]
+; X86-NEXT: vcvtbf162iubs %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0x89,0x6b,0xc0]
; X86-NEXT: retl # encoding: [0xc3]
entry:
- %0 = tail call <8 x i16> @llvm.x86.avx10.vcvtnebf162iubs128(<8 x bfloat> %__B)
+ %0 = tail call <8 x i16> @llvm.x86.avx10.vcvtbf162iubs128(<8 x bfloat> %__B)
%1 = bitcast i8 %__A to <8 x i1>
%2 = select <8 x i1> %1, <8 x i16> %0, <8 x i16> zeroinitializer
%3 = bitcast <8 x i16> %2 to <2 x i64>
ret <2 x i64> %3
}
-define dso_local <4 x i64> @test_mm256_ipcvtnebf16_epu8(<16 x bfloat> noundef %__A) local_unnamed_addr #2 {
-; CHECK-LABEL: test_mm256_ipcvtnebf16_epu8:
+define dso_local <4 x i64> @test_mm256_ipcvtbf16_epu8(<16 x bfloat> noundef %__A) local_unnamed_addr #2 {
+; CHECK-LABEL: test_mm256_ipcvtbf16_epu8:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: vcvtnebf162iubs %ymm0, %ymm0 # encoding: [0x62,0xf5,0x7f,0x28,0x6b,0xc0]
+; CHECK-NEXT: vcvtbf162iubs %ymm0, %ymm0 # encoding: [0x62,0xf5,0x7f,0x28,0x6b,0xc0]
; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
entry:
- %0 = tail call <16 x i16> @llvm.x86.avx10.vcvtnebf162iubs256(<16 x bfloat> %__A)
+ %0 = tail call <16 x i16> @llvm.x86.avx10.vcvtbf162iubs256(<16 x bfloat> %__A)
%1 = bitcast <16 x i16> %0 to <4 x i64>
ret <4 x i64> %1
}
-define dso_local <4 x i64> @test_mm256_mask_ipcvtnebf16_epu8(<4 x i64> noundef %__S, i16 noundef zeroext %__A, <16 x bfloat> noundef %__B) local_unnamed_addr #2 {
-; X64-LABEL: test_mm256_mask_ipcvtnebf16_epu8:
+define dso_local <4 x i64> @test_mm256_mask_ipcvtbf16_epu8(<4 x i64> noundef %__S, i16 noundef zeroext %__A, <16 x bfloat> noundef %__B) local_unnamed_addr #2 {
+; X64-LABEL: test_mm256_mask_ipcvtbf16_epu8:
; X64: # %bb.0: # %entry
; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
-; X64-NEXT: vcvtnebf162iubs %ymm1, %ymm0 {%k1} # encoding: [0x62,0xf5,0x7f,0x29,0x6b,0xc1]
+; X64-NEXT: vcvtbf162iubs %ymm1, %ymm0 {%k1} # encoding: [0x62,0xf5,0x7f,0x29,0x6b,0xc1]
; X64-NEXT: retq # encoding: [0xc3]
;
-; X86-LABEL: test_mm256_mask_ipcvtnebf16_epu8:
+; X86-LABEL: test_mm256_mask_ipcvtbf16_epu8:
; X86: # %bb.0: # %entry
; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
-; X86-NEXT: vcvtnebf162iubs %ymm1, %ymm0 {%k1} # encoding: [0x62,0xf5,0x7f,0x29,0x6b,0xc1]
+; X86-NEXT: vcvtbf162iubs %ymm1, %ymm0 {%k1} # encoding: [0x62,0xf5,0x7f,0x29,0x6b,0xc1]
; X86-NEXT: retl # encoding: [0xc3]
entry:
%0 = bitcast <4 x i64> %__S to <16 x i16>
- %1 = tail call <16 x i16> @llvm.x86.avx10.vcvtnebf162iubs256(<16 x bfloat> %__B)
+ %1 = tail call <16 x i16> @llvm.x86.avx10.vcvtbf162iubs256(<16 x bfloat> %__B)
%2 = bitcast i16 %__A to <16 x i1>
%3 = select <16 x i1> %2, <16 x i16> %1, <16 x i16> %0
%4 = bitcast <16 x i16> %3 to <4 x i64>
ret <4 x i64> %4
}
-define dso_local <4 x i64> @test_mm256_maskz_ipcvtnebf16_epu8(i16 noundef zeroext %__A, <16 x bfloat> noundef %__B) local_unnamed_addr #2 {
-; X64-LABEL: test_mm256_maskz_ipcvtnebf16_epu8:
+define dso_local <4 x i64> @test_mm256_maskz_ipcvtbf16_epu8(i16 noundef zeroext %__A, <16 x bfloat> noundef %__B) local_unnamed_addr #2 {
+; X64-LABEL: test_mm256_maskz_ipcvtbf16_epu8:
; X64: # %bb.0: # %entry
; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
-; X64-NEXT: vcvtnebf162iubs %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0xa9,0x6b,0xc0]
+; X64-NEXT: vcvtbf162iubs %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0xa9,0x6b,0xc0]
; X64-NEXT: retq # encoding: [0xc3]
;
-; X86-LABEL: test_mm256_maskz_ipcvtnebf16_epu8:
+; X86-LABEL: test_mm256_maskz_ipcvtbf16_epu8:
; X86: # %bb.0: # %entry
; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
-; X86-NEXT: vcvtnebf162iubs %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0xa9,0x6b,0xc0]
+; X86-NEXT: vcvtbf162iubs %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0xa9,0x6b,0xc0]
; X86-NEXT: retl # encoding: [0xc3]
entry:
- %0 = tail call <16 x i16> @llvm.x86.avx10.vcvtnebf162iubs256(<16 x bfloat> %__B)
+ %0 = tail call <16 x i16> @llvm.x86.avx10.vcvtbf162iubs256(<16 x bfloat> %__B)
%1 = bitcast i16 %__A to <16 x i1>
%2 = select <16 x i1> %1, <16 x i16> %0, <16 x i16> zeroinitializer
%3 = bitcast <16 x i16> %2 to <4 x i64>
ret <4 x i64> %3
}
-declare <16 x i16> @llvm.x86.avx10.vcvtnebf162iubs256(<16 x bfloat>)
+declare <16 x i16> @llvm.x86.avx10.vcvtbf162iubs256(<16 x bfloat>)
define dso_local <2 x i64> @test_mm_ipcvtph_epi8(<8 x half> noundef %__A) {
; CHECK-LABEL: test_mm_ipcvtph_epi8:
@@ -810,221 +810,221 @@ entry:
declare <8 x i32> @llvm.x86.avx10.mask.vcvtps2iubs256(<8 x float>, <8 x i32>, i8, i32)
-define dso_local <2 x i64> @test_mm_ipcvttnebf16_epi8(<8 x bfloat> noundef %__A) {
-; CHECK-LABEL: test_mm_ipcvttnebf16_epi8:
+define dso_local <2 x i64> @test_mm_ipcvttbf16_epi8(<8 x bfloat> noundef %__A) {
+; CHECK-LABEL: test_mm_ipcvttbf16_epi8:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: vcvttnebf162ibs %xmm0, %xmm0 # encoding: [0x62,0xf5,0x7f,0x08,0x68,0xc0]
+; CHECK-NEXT: vcvttbf162ibs %xmm0, %xmm0 # encoding: [0x62,0xf5,0x7f,0x08,0x68,0xc0]
; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
entry:
- %0 = tail call <8 x i16> @llvm.x86.avx10.vcvttnebf162ibs128(<8 x bfloat> %__A)
+ %0 = tail call <8 x i16> @llvm.x86.avx10.vcvttbf162ibs128(<8 x bfloat> %__A)
%1 = bitcast <8 x i16> %0 to <2 x i64>
ret <2 x i64> %1
}
-define dso_local <2 x i64> @test_mm_mask_ipcvttnebf16_epi8(<2 x i64> noundef %__S, i8 noundef zeroext %__A, <8 x bfloat> noundef %__B) {
-; X64-LABEL: test_mm_mask_ipcvttnebf16_epi8:
+define dso_local <2 x i64> @test_mm_mask_ipcvttbf16_epi8(<2 x i64> noundef %__S, i8 noundef zeroext %__A, <8 x bfloat> noundef %__B) {
+; X64-LABEL: test_mm_mask_ipcvttbf16_epi8:
; X64: # %bb.0: # %entry
; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
-; X64-NEXT: vcvttnebf162ibs %xmm1, %xmm0 {%k1} # encoding: [0x62,0xf5,0x7f,0x09,0x68,0xc1]
+; X64-NEXT: vcvttbf162ibs %xmm1, %xmm0 {%k1} # encoding: [0x62,0xf5,0x7f,0x09,0x68,0xc1]
; X64-NEXT: retq # encoding: [0xc3]
;
-; X86-LABEL: test_mm_mask_ipcvttnebf16_epi8:
+; X86-LABEL: test_mm_mask_ipcvttbf16_epi8:
; X86: # %bb.0: # %entry
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
-; X86-NEXT: vcvttnebf162ibs %xmm1, %xmm0 {%k1} # encoding: [0x62,0xf5,0x7f,0x09,0x68,0xc1]
+; X86-NEXT: vcvttbf162ibs %xmm1, %xmm0 {%k1} # encoding: [0x62,0xf5,0x7f,0x09,0x68,0xc1]
; X86-NEXT: retl # encoding: [0xc3]
entry:
%0 = bitcast <2 x i64> %__S to <8 x i16>
- %1 = tail call <8 x i16> @llvm.x86.avx10.vcvttnebf162ibs128(<8 x bfloat> %__B)
+ %1 = tail call <8 x i16> @llvm.x86.avx10.vcvttbf162ibs128(<8 x bfloat> %__B)
%2 = bitcast i8 %__A to <8 x i1>
%3 = select <8 x i1> %2, <8 x i16> %1, <8 x i16> %0
%4 = bitcast <8 x i16> %3 to <2 x i64>
ret <2 x i64> %4
}
-declare <8 x i16> @llvm.x86.avx10.vcvttnebf162ibs128(<8 x bfloat>)
+declare <8 x i16> @llvm.x86.avx10.vcvttbf162ibs128(<8 x bfloat>)
-define dso_local <2 x i64> @test_mm_maskz_ipcvttnebf16_epi8(i8 noundef zeroext %__A, <8 x bfloat> noundef %__B) {
-; X64-LABEL: test_mm_maskz_ipcvttnebf16_epi8:
+define dso_local <2 x i64> @test_mm_maskz_ipcvttbf16_epi8(i8 noundef zeroext %__A, <8 x bfloat> noundef %__B) {
+; X64-LABEL: test_mm_maskz_ipcvttbf16_epi8:
; X64: # %bb.0: # %entry
; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
-; X64-NEXT: vcvttnebf162ibs %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0x89,0x68,0xc0]
+; X64-NEXT: vcvttbf162ibs %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0x89,0x68,0xc0]
; X64-NEXT: retq # encoding: [0xc3]
;
-; X86-LABEL: test_mm_maskz_ipcvttnebf16_epi8:
+; X86-LABEL: test_mm_maskz_ipcvttbf16_epi8:
; X86: # %bb.0: # %entry
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
-; X86-NEXT: vcvttnebf162ibs %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0x89,0x68,0xc0]
+; X86-NEXT: vcvttbf162ibs %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0x89,0x68,0xc0]
; X86-NEXT: retl # encoding: [0xc3]
entry:
- %0 = tail call <8 x i16> @llvm.x86.avx10.vcvttnebf162ibs128(<8 x bfloat> %__B)
+ %0 = tail call <8 x i16> @llvm.x86.avx10.vcvttbf162ibs128(<8 x bfloat> %__B)
%1 = bitcast i8 %__A to <8 x i1>
%2 = select <8 x i1> %1, <8 x i16> %0, <8 x i16> zeroinitializer
%3 = bitcast <8 x i16> %2 to <2 x i64>
ret <2 x i64> %3
}
-define dso_local <4 x i64> @test_mm256_ipcvttnebf16_epi8(<16 x bfloat> noundef %__A) local_unnamed_addr #2 {
-; CHECK-LABEL: test_mm256_ipcvttnebf16_epi8:
+define dso_local <4 x i64> @test_mm256_ipcvttbf16_epi8(<16 x bfloat> noundef %__A) local_unnamed_addr #2 {
+; CHECK-LABEL: test_mm256_ipcvttbf16_epi8:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: vcvttnebf162ibs %ymm0, %ymm0 # encoding: [0x62,0xf5,0x7f,0x28,0x68,0xc0]
+; CHECK-NEXT: vcvttbf162ibs %ymm0, %ymm0 # encoding: [0x62,0xf5,0x7f,0x28,0x68,0xc0]
; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
entry:
- %0 = tail call <16 x i16> @llvm.x86.avx10.vcvttnebf162ibs256(<16 x bfloat> %__A)
+ %0 = tail call <16 x i16> @llvm.x86.avx10.vcvttbf162ibs256(<16 x bfloat> %__A)
%1 = bitcast <16 x i16> %0 to <4 x i64>
ret <4 x i64> %1
}
-define dso_local <4 x i64> @test_mm256_mask_ipcvttnebf16_epi8(<4 x i64> noundef %__S, i16 noundef zeroext %__A, <16 x bfloat> noundef %__B) local_unnamed_addr #2 {
-; X64-LABEL: test_mm256_mask_ipcvttnebf16_epi8:
+define dso_local <4 x i64> @test_mm256_mask_ipcvttbf16_epi8(<4 x i64> noundef %__S, i16 noundef zeroext %__A, <16 x bfloat> noundef %__B) local_unnamed_addr #2 {
+; X64-LABEL: test_mm256_mask_ipcvttbf16_epi8:
; X64: # %bb.0: # %entry
; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
-; X64-NEXT: vcvttnebf162ibs %ymm1, %ymm0 {%k1} # encoding: [0x62,0xf5,0x7f,0x29,0x68,0xc1]
+; X64-NEXT: vcvttbf162ibs %ymm1, %ymm0 {%k1} # encoding: [0x62,0xf5,0x7f,0x29,0x68,0xc1]
; X64-NEXT: retq # encoding: [0xc3]
;
-; X86-LABEL: test_mm256_mask_ipcvttnebf16_epi8:
+; X86-LABEL: test_mm256_mask_ipcvttbf16_epi8:
; X86: # %bb.0: # %entry
; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
-; X86-NEXT: vcvttnebf162ibs %ymm1, %ymm0 {%k1} # encoding: [0x62,0xf5,0x7f,0x29,0x68,0xc1]
+; X86-NEXT: vcvttbf162ibs %ymm1, %ymm0 {%k1} # encoding: [0x62,0xf5,0x7f,0x29,0x68,0xc1]
; X86-NEXT: retl # encoding: [0xc3]
entry:
%0 = bitcast <4 x i64> %__S to <16 x i16>
- %1 = tail call <16 x i16> @llvm.x86.avx10.vcvttnebf162ibs256(<16 x bfloat> %__B)
+ %1 = tail call <16 x i16> @llvm.x86.avx10.vcvttbf162ibs256(<16 x bfloat> %__B)
%2 = bitcast i16 %__A to <16 x i1>
%3 = select <16 x i1> %2, <16 x i16> %1, <16 x i16> %0
%4 = bitcast <16 x i16> %3 to <4 x i64>
ret <4 x i64> %4
}
-define dso_local <4 x i64> @test_mm256_maskz_ipcvttnebf16_epi8(i16 noundef zeroext %__A, <16 x bfloat> noundef %__B) local_unnamed_addr #2 {
-; X64-LABEL: test_mm256_maskz_ipcvttnebf16_epi8:
+define dso_local <4 x i64> @test_mm256_maskz_ipcvttbf16_epi8(i16 noundef zeroext %__A, <16 x bfloat> noundef %__B) local_unnamed_addr #2 {
+; X64-LABEL: test_mm256_maskz_ipcvttbf16_epi8:
; X64: # %bb.0: # %entry
; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
-; X64-NEXT: vcvttnebf162ibs %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0xa9,0x68,0xc0]
+; X64-NEXT: vcvttbf162ibs %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0xa9,0x68,0xc0]
; X64-NEXT: retq # encoding: [0xc3]
;
-; X86-LABEL: test_mm256_maskz_ipcvttnebf16_epi8:
+; X86-LABEL: test_mm256_maskz_ipcvttbf16_epi8:
; X86: # %bb.0: # %entry
; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
-; X86-NEXT: vcvttnebf162ibs %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0xa9,0x68,0xc0]
+; X86-NEXT: vcvttbf162ibs %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0xa9,0x68,0xc0]
; X86-NEXT: retl # encoding: [0xc3]
entry:
- %0 = tail call <16 x i16> @llvm.x86.avx10.vcvttnebf162ibs256(<16 x bfloat> %__B)
+ %0 = tail call <16 x i16> @llvm.x86.avx10.vcvttbf162ibs256(<16 x bfloat> %__B)
%1 = bitcast i16 %__A to <16 x i1>
%2 = select <16 x i1> %1, <16 x i16> %0, <16 x i16> zeroinitializer
%3 = bitcast <16 x i16> %2 to <4 x i64>
ret <4 x i64> %3
}
-declare <16 x i16> @llvm.x86.avx10.vcvttnebf162ibs256(<16 x bfloat>)
+declare <16 x i16> @llvm.x86.avx10.vcvttbf162ibs256(<16 x bfloat>)
-define dso_local <2 x i64> @test_mm_ipcvttnebf16_epu8(<8 x bfloat> noundef %__A) {
-; CHECK-LABEL: test_mm_ipcvttnebf16_epu8:
+define dso_local <2 x i64> @test_mm_ipcvttbf16_epu8(<8 x bfloat> noundef %__A) {
+; CHECK-LABEL: test_mm_ipcvttbf16_epu8:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: vcvttnebf162iubs %xmm0, %xmm0 # encoding: [0x62,0xf5,0x7f,0x08,0x6a,0xc0]
+; CHECK-NEXT: vcvttbf162iubs %xmm0, %xmm0 # encoding: [0x62,0xf5,0x7f,0x08,0x6a,0xc0]
; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
entry:
- %0 = tail call <8 x i16> @llvm.x86.avx10.vcvttnebf162iubs128(<8 x bfloat> %__A)
+ %0 = tail call <8 x i16> @llvm.x86.avx10.vcvttbf162iubs128(<8 x bfloat> %__A)
%1 = bitcast <8 x i16> %0 to <2 x i64>
ret <2 x i64> %1
}
-define dso_local <2 x i64> @test_mm_mask_ipcvttnebf16_epu8(<2 x i64> noundef %__S, i8 noundef zeroext %__A, <8 x bfloat> noundef %__B) {
-; X64-LABEL: test_mm_mask_ipcvttnebf16_epu8:
+define dso_local <2 x i64> @test_mm_mask_ipcvttbf16_epu8(<2 x i64> noundef %__S, i8 noundef zeroext %__A, <8 x bfloat> noundef %__B) {
+; X64-LABEL: test_mm_mask_ipcvttbf16_epu8:
; X64: # %bb.0: # %entry
; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
-; X64-NEXT: vcvttnebf162iubs %xmm1, %xmm0 {%k1} # encoding: [0x62,0xf5,0x7f,0x09,0x6a,0xc1]
+; X64-NEXT: vcvttbf162iubs %xmm1, %xmm0 {%k1} # encoding: [0x62,0xf5,0x7f,0x09,0x6a,0xc1]
; X64-NEXT: retq # encoding: [0xc3]
;
-; X86-LABEL: test_mm_mask_ipcvttnebf16_epu8:
+; X86-LABEL: test_mm_mask_ipcvttbf16_epu8:
; X86: # %bb.0: # %entry
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
-; X86-NEXT: vcvttnebf162iubs %xmm1, %xmm0 {%k1} # encoding: [0x62,0xf5,0x7f,0x09,0x6a,0xc1]
+; X86-NEXT: vcvttbf162iubs %xmm1, %xmm0 {%k1} # encoding: [0x62,0xf5,0x7f,0x09,0x6a,0xc1]
; X86-NEXT: retl # encoding: [0xc3]
entry:
%0 = bitcast <2 x i64> %__S to <8 x i16>
- %1 = tail call <8 x i16> @llvm.x86.avx10.vcvttnebf162iubs128(<8 x bfloat> %__B)
+ %1 = tail call <8 x i16> @llvm.x86.avx10.vcvttbf162iubs128(<8 x bfloat> %__B)
%2 = bitcast i8 %__A to <8 x i1>
%3 = select <8 x i1> %2, <8 x i16> %1, <8 x i16> %0
%4 = bitcast <8 x i16> %3 to <2 x i64>
ret <2 x i64> %4
}
-declare <8 x i16> @llvm.x86.avx10.vcvttnebf162iubs128(<8 x bfloat>)
+declare <8 x i16> @llvm.x86.avx10.vcvttbf162iubs128(<8 x bfloat>)
-define dso_local <2 x i64> @test_mm_maskz_ipcvttnebf16_epu8(i8 noundef zeroext %__A, <8 x bfloat> noundef %__B) {
-; X64-LABEL: test_mm_maskz_ipcvttnebf16_epu8:
+define dso_local <2 x i64> @test_mm_maskz_ipcvttbf16_epu8(i8 noundef zeroext %__A, <8 x bfloat> noundef %__B) {
+; X64-LABEL: test_mm_maskz_ipcvttbf16_epu8:
; X64: # %bb.0: # %entry
; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
-; X64-NEXT: vcvttnebf162iubs %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0x89,0x6a,0xc0]
+; X64-NEXT: vcvttbf162iubs %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0x89,0x6a,0xc0]
; X64-NEXT: retq # encoding: [0xc3]
;
-; X86-LABEL: test_mm_maskz_ipcvttnebf16_epu8:
+; X86-LABEL: test_mm_maskz_ipcvttbf16_epu8:
; X86: # %bb.0: # %entry
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
-; X86-NEXT: vcvttnebf162iubs %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0x89,0x6a,0xc0]
+; X86-NEXT: vcvttbf162iubs %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0x89,0x6a,0xc0]
; X86-NEXT: retl # encoding: [0xc3]
entry:
- %0 = tail call <8 x i16> @llvm.x86.avx10.vcvttnebf162iubs128(<8 x bfloat> %__B)
+ %0 = tail call <8 x i16> @llvm.x86.avx10.vcvttbf162iubs128(<8 x bfloat> %__B)
%1 = bitcast i8 %__A to <8 x i1>
%2 = select <8 x i1> %1, <8 x i16> %0, <8 x i16> zeroinitializer
%3 = bitcast <8 x i16> %2 to <2 x i64>
ret <2 x i64> %3
}
-define dso_local <4 x i64> @test_mm256_ipcvttnebf16_epu8(<16 x bfloat> noundef %__A) local_unnamed_addr #2 {
-; CHECK-LABEL: test_mm256_ipcvttnebf16_epu8:
+define dso_local <4 x i64> @test_mm256_ipcvttbf16_epu8(<16 x bfloat> noundef %__A) local_unnamed_addr #2 {
+; CHECK-LABEL: test_mm256_ipcvttbf16_epu8:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: vcvttnebf162iubs %ymm0, %ymm0 # encoding: [0x62,0xf5,0x7f,0x28,0x6a,0xc0]
+; CHECK-NEXT: vcvttbf162iubs %ymm0, %ymm0 # encoding: [0x62,0xf5,0x7f,0x28,0x6a,0xc0]
; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
entry:
- %0 = tail call <16 x i16> @llvm.x86.avx10.vcvttnebf162iubs256(<16 x bfloat> %__A)
+ %0 = tail call <16 x i16> @llvm.x86.avx10.vcvttbf162iubs256(<16 x bfloat> %__A)
%1 = bitcast <16 x i16> %0 to <4 x i64>
ret <4 x i64> %1
}
-define dso_local <4 x i64> @test_mm256_mask_ipcvttnebf16_epu8(<4 x i64> noundef %__S, i16 noundef zeroext %__A, <16 x bfloat> noundef %__B) local_unnamed_addr #2 {
-; X64-LABEL: test_mm256_mask_ipcvttnebf16_epu8:
+define dso_local <4 x i64> @test_mm256_mask_ipcvttbf16_epu8(<4 x i64> noundef %__S, i16 noundef zeroext %__A, <16 x bfloat> noundef %__B) local_unnamed_addr #2 {
+; X64-LABEL: test_mm256_mask_ipcvttbf16_epu8:
; X64: # %bb.0: # %entry
; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
-; X64-NEXT: vcvttnebf162iubs %ymm1, %ymm0 {%k1} # encoding: [0x62,0xf5,0x7f,0x29,0x6a,0xc1]
+; X64-NEXT: vcvttbf162iubs %ymm1, %ymm0 {%k1} # encoding: [0x62,0xf5,0x7f,0x29,0x6a,0xc1]
; X64-NEXT: retq # encoding: [0xc3]
;
-; X86-LABEL: test_mm256_mask_ipcvttnebf16_epu8:
+; X86-LABEL: test_mm256_mask_ipcvttbf16_epu8:
; X86: # %bb.0: # %entry
; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
-; X86-NEXT: vcvttnebf162iubs %ymm1, %ymm0 {%k1} # encoding: [0x62,0xf5,0x7f,0x29,0x6a,0xc1]
+; X86-NEXT: vcvttbf162iubs %ymm1, %ymm0 {%k1} # encoding: [0x62,0xf5,0x7f,0x29,0x6a,0xc1]
; X86-NEXT: retl # encoding: [0xc3]
entry:
%0 = bitcast <4 x i64> %__S to <16 x i16>
- %1 = tail call <16 x i16> @llvm.x86.avx10.vcvttnebf162iubs256(<16 x bfloat> %__B)
+ %1 = tail call <16 x i16> @llvm.x86.avx10.vcvttbf162iubs256(<16 x bfloat> %__B)
%2 = bitcast i16 %__A to <16 x i1>
%3 = select <16 x i1> %2, <16 x i16> %1, <16 x i16> %0
%4 = bitcast <16 x i16> %3 to <4 x i64>
ret <4 x i64> %4
}
-define dso_local <4 x i64> @test_mm256_maskz_ipcvttnebf16_epu8(i16 noundef zeroext %__A, <16 x bfloat> noundef %__B) local_unnamed_addr #2 {
-; X64-LABEL: test_mm256_maskz_ipcvttnebf16_epu8:
+define dso_local <4 x i64> @test_mm256_maskz_ipcvttbf16_epu8(i16 noundef zeroext %__A, <16 x bfloat> noundef %__B) local_unnamed_addr #2 {
+; X64-LABEL: test_mm256_maskz_ipcvttbf16_epu8:
; X64: # %bb.0: # %entry
; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
-; X64-NEXT: vcvttnebf162iubs %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0xa9,0x6a,0xc0]
+; X64-NEXT: vcvttbf162iubs %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0xa9,0x6a,0xc0]
; X64-NEXT: retq # encoding: [0xc3]
;
-; X86-LABEL: test_mm256_maskz_ipcvttnebf16_epu8:
+; X86-LABEL: test_mm256_maskz_ipcvttbf16_epu8:
; X86: # %bb.0: # %entry
; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
-; X86-NEXT: vcvttnebf162iubs %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0xa9,0x6a,0xc0]
+; X86-NEXT: vcvttbf162iubs %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0xa9,0x6a,0xc0]
; X86-NEXT: retl # encoding: [0xc3]
entry:
- %0 = tail call <16 x i16> @llvm.x86.avx10.vcvttnebf162iubs256(<16 x bfloat> %__B)
+ %0 = tail call <16 x i16> @llvm.x86.avx10.vcvttbf162iubs256(<16 x bfloat> %__B)
%1 = bitcast i16 %__A to <16 x i1>
%2 = select <16 x i1> %1, <16 x i16> %0, <16 x i16> zeroinitializer
%3 = bitcast <16 x i16> %2 to <4 x i64>
ret <4 x i64> %3
}
-declare <16 x i16> @llvm.x86.avx10.vcvttnebf162iubs256(<16 x bfloat>)
+declare <16 x i16> @llvm.x86.avx10.vcvttbf162iubs256(<16 x bfloat>)
define dso_local <2 x i64> @test_mm_ipcvttph_epi8(<8 x half> noundef %__A) {
; CHECK-LABEL: test_mm_ipcvttph_epi8:
diff --git a/llvm/test/MC/Disassembler/X86/avx10.2-satcvt-32.txt b/llvm/test/MC/Disassembler/X86/avx10.2-satcvt-32.txt
index 67e8f36fa12417..9e8477aa7f387c 100644
--- a/llvm/test/MC/Disassembler/X86/avx10.2-satcvt-32.txt
+++ b/llvm/test/MC/Disassembler/X86/avx10.2-satcvt-32.txt
@@ -1,220 +1,220 @@
# RUN: llvm-mc --disassemble %s -triple=i386 | FileCheck %s --check-prefixes=ATT
# RUN: llvm-mc --disassemble %s -triple=i386 --output-asm-variant=1 | FileCheck %s --check-prefixes=INTEL
-# ATT: vcvtnebf162ibs %xmm3, %xmm2
-# INTEL: vcvtnebf162ibs xmm2, xmm3
+# ATT: vcvtbf162ibs %xmm3, %xmm2
+# INTEL: vcvtbf162ibs xmm2, xmm3
0x62,0xf5,0x7f,0x08,0x69,0xd3
-# ATT: vcvtnebf162ibs %xmm3, %xmm2 {%k7}
-# INTEL: vcvtnebf162ibs xmm2 {k7}, xmm3
+# ATT: vcvtbf162ibs %xmm3, %xmm2 {%k7}
+# INTEL: vcvtbf162ibs xmm2 {k7}, xmm3
0x62,0xf5,0x7f,0x0f,0x69,0xd3
-# ATT: vcvtnebf162ibs %xmm3, %xmm2 {%k7} {z}
-# INTEL: vcvtnebf162ibs xmm2 {k7} {z}, xmm3
+# ATT: vcvtbf162ibs %xmm3, %xmm2 {%k7} {z}
+# INTEL: vcvtbf162ibs xmm2 {k7} {z}, xmm3
0x62,0xf5,0x7f,0x8f,0x69,0xd3
-# ATT: vcvtnebf162ibs %zmm3, %zmm2
-# INTEL: vcvtnebf162ibs zmm2, zmm3
+# ATT: vcvtbf162ibs %zmm3, %zmm2
+# INTEL: vcvtbf162ibs zmm2, zmm3
0x62,0xf5,0x7f,0x48,0x69,0xd3
-# ATT: vcvtnebf162ibs %zmm3, %zmm2 {%k7}
-# INTEL: vcvtnebf162ibs zmm2 {k7}, zmm3
+# ATT: vcvtbf162ibs %zmm3, %zmm2 {%k7}
+# INTEL: vcvtbf162ibs zmm2 {k7}, zmm3
0x62,0xf5,0x7f,0x4f,0x69,0xd3
-# ATT: vcvtnebf162ibs %zmm3, %zmm2 {%k7} {z}
-# INTEL: vcvtnebf162ibs zmm2 {k7} {z}, zmm3
+# ATT: vcvtbf162ibs %zmm3, %zmm2 {%k7} {z}
+# INTEL: vcvtbf162ibs zmm2 {k7} {z}, zmm3
0x62,0xf5,0x7f,0xcf,0x69,0xd3
-# ATT: vcvtnebf162ibs %ymm3, %ymm2
-# INTEL: vcvtnebf162ibs ymm2, ymm3
+# ATT: vcvtbf162ibs %ymm3, %ymm2
+# INTEL: vcvtbf162ibs ymm2, ymm3
0x62,0xf5,0x7f,0x28,0x69,0xd3
-# ATT: vcvtnebf162ibs %ymm3, %ymm2 {%k7}
-# INTEL: vcvtnebf162ibs ymm2 {k7}, ymm3
+# ATT: vcvtbf162ibs %ymm3, %ymm2 {%k7}
+# INTEL: vcvtbf162ibs ymm2 {k7}, ymm3
0x62,0xf5,0x7f,0x2f,0x69,0xd3
-# ATT: vcvtnebf162ibs %ymm3, %ymm2 {%k7} {z}
-# INTEL: vcvtnebf162ibs ymm2 {k7} {z}, ymm3
+# ATT: vcvtbf162ibs %ymm3, %ymm2 {%k7} {z}
+# INTEL: vcvtbf162ibs ymm2 {k7} {z}, ymm3
0x62,0xf5,0x7f,0xaf,0x69,0xd3
-# ATT: vcvtnebf162ibs 268435456(%esp,%esi,8), %xmm2
-# INTEL: vcvtnebf162ibs xmm2, xmmword ptr [esp + 8*esi + 268435456]
+# ATT: vcvtbf162ibs 268435456(%esp,%esi,8), %xmm2
+# INTEL: vcvtbf162ibs xmm2, xmmword ptr [esp + 8*esi + 268435456]
0x62,0xf5,0x7f,0x08,0x69,0x94,0xf4,0x00,0x00,0x00,0x10
-# ATT: vcvtnebf162ibs 291(%edi,%eax,4), %xmm2 {%k7}
-# INTEL: vcvtnebf162ibs xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
+# ATT: vcvtbf162ibs 291(%edi,%eax,4), %xmm2 {%k7}
+# INTEL: vcvtbf162ibs xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
0x62,0xf5,0x7f,0x0f,0x69,0x94,0x87,0x23,0x01,0x00,0x00
-# ATT: vcvtnebf162ibs (%eax){1to8}, %xmm2
-# INTEL: vcvtnebf162ibs xmm2, word ptr [eax]{1to8}
+# ATT: vcvtbf162ibs (%eax){1to8}, %xmm2
+# INTEL: vcvtbf162ibs xmm2, word ptr [eax]{1to8}
0x62,0xf5,0x7f,0x18,0x69,0x10
-# ATT: vcvtnebf162ibs -512(,%ebp,2), %xmm2
-# INTEL: vcvtnebf162ibs xmm2, xmmword ptr [2*ebp - 512]
+# ATT: vcvtbf162ibs -512(,%ebp,2), %xmm2
+# INTEL: vcvtbf162ibs xmm2, xmmword ptr [2*ebp - 512]
0x62,0xf5,0x7f,0x08,0x69,0x14,0x6d,0x00,0xfe,0xff,0xff
-# ATT: vcvtnebf162ibs 2032(%ecx), %xmm2 {%k7} {z}
-# INTEL: vcvtnebf162ibs xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
+# ATT: vcvtbf162ibs 2032(%ecx), %xmm2 {%k7} {z}
+# INTEL: vcvtbf162ibs xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
0x62,0xf5,0x7f,0x8f,0x69,0x51,0x7f
-# ATT: vcvtnebf162ibs -256(%edx){1to8}, %xmm2 {%k7} {z}
-# INTEL: vcvtnebf162ibs xmm2 {k7} {z}, word ptr [edx - 256]{1to8}
+# ATT: vcvtbf162ibs -256(%edx){1to8}, %xmm2 {%k7} {z}
+# INTEL: vcvtbf162ibs xmm2 {k7} {z}, word ptr [edx - 256]{1to8}
0x62,0xf5,0x7f,0x9f,0x69,0x52,0x80
-# ATT: vcvtnebf162ibs 268435456(%esp,%esi,8), %ymm2
-# INTEL: vcvtnebf162ibs ymm2, ymmword ptr [esp + 8*esi + 268435456]
+# ATT: vcvtbf162ibs 268435456(%esp,%esi,8), %ymm2
+# INTEL: vcvtbf162ibs ymm2, ymmword ptr [esp + 8*esi + 268435456]
0x62,0xf5,0x7f,0x28,0x69,0x94,0xf4,0x00,0x00,0x00,0x10
-# ATT: vcvtnebf162ibs 291(%edi,%eax,4), %ymm2 {%k7}
-# INTEL: vcvtnebf162ibs ymm2 {k7}, ymmword ptr [edi + 4*eax + 291]
+# ATT: vcvtbf162ibs 291(%edi,%eax,4), %ymm2 {%k7}
+# INTEL: vcvtbf162ibs ymm2 {k7}, ymmword ptr [edi + 4*eax + 291]
0x62,0xf5,0x7f,0x2f,0x69,0x94,0x87,0x23,0x01,0x00,0x00
-# ATT: vcvtnebf162ibs (%eax){1to16}, %ymm2
-# INTEL: vcvtnebf162ibs ymm2, word ptr [eax]{1to16}
+# ATT: vcvtbf162ibs (%eax){1to16}, %ymm2
+# INTEL: vcvtbf162ibs ymm2, word ptr [eax]{1to16}
0x62,0xf5,0x7f,0x38,0x69,0x10
-# ATT: vcvtnebf162ibs -1024(,%ebp,2), %ymm2
-# INTEL: vcvtnebf162ibs ymm2, ymmword ptr [2*ebp - 1024]
+# ATT: vcvtbf162ibs -1024(,%ebp,2), %ymm2
+# INTEL: vcvtbf162ibs ymm2, ymmword ptr [2*ebp - 1024]
0x62,0xf5,0x7f,0x28,0x69,0x14,0x6d,0x00,0xfc,0xff,0xff
-# ATT: vcvtnebf162ibs 4064(%ecx), %ymm2 {%k7} {z}
-# INTEL: vcvtnebf162ibs ymm2 {k7} {z}, ymmword ptr [ecx + 4064]
+# ATT: vcvtbf162ibs 4064(%ecx), %ymm2 {%k7} {z}
+# INTEL: vcvtbf162ibs ymm2 {k7} {z}, ymmword ptr [ecx + 4064]
0x62,0xf5,0x7f,0xaf,0x69,0x51,0x7f
-# ATT: vcvtnebf162ibs -256(%edx){1to16}, %ymm2 {%k7} {z}
-# INTEL: vcvtnebf162ibs ymm2 {k7} {z}, word ptr [edx - 256]{1to16}
+# ATT: vcvtbf162ibs -256(%edx){1to16}, %ymm2 {%k7} {z}
+# INTEL: vcvtbf162ibs ymm2 {k7} {z}, word ptr [edx - 256]{1to16}
0x62,0xf5,0x7f,0xbf,0x69,0x52,0x80
-# ATT: vcvtnebf162ibs 268435456(%esp,%esi,8), %zmm2
-# INTEL: vcvtnebf162ibs zmm2, zmmword ptr [esp + 8*esi + 268435456]
+# ATT: vcvtbf162ibs 268435456(%esp,%esi,8), %zmm2
+# INTEL: vcvtbf162ibs zmm2, zmmword ptr [esp + 8*esi + 268435456]
0x62,0xf5,0x7f,0x48,0x69,0x94,0xf4,0x00,0x00,0x00,0x10
-# ATT: vcvtnebf162ibs 291(%edi,%eax,4), %zmm2 {%k7}
-# INTEL: vcvtnebf162ibs zmm2 {k7}, zmmword ptr [edi + 4*eax + 291]
+# ATT: vcvtbf162ibs 291(%edi,%eax,4), %zmm2 {%k7}
+# INTEL: vcvtbf162ibs zmm2 {k7}, zmmword ptr [edi + 4*eax + 291]
0x62,0xf5,0x7f,0x4f,0x69,0x94,0x87,0x23,0x01,0x00,0x00
-# ATT: vcvtnebf162ibs (%eax){1to32}, %zmm2
-# INTEL: vcvtnebf162ibs zmm2, word ptr [eax]{1to32}
+# ATT: vcvtbf162ibs (%eax){1to32}, %zmm2
+# INTEL: vcvtbf162ibs zmm2, word ptr [eax]{1to32}
0x62,0xf5,0x7f,0x58,0x69,0x10
-# ATT: vcvtnebf162ibs -2048(,%ebp,2), %zmm2
-# INTEL: vcvtnebf162ibs zmm2, zmmword ptr [2*ebp - 2048]
+# ATT: vcvtbf162ibs -2048(,%ebp,2), %zmm2
+# INTEL: vcvtbf162ibs zmm2, zmmword ptr [2*ebp - 2048]
0x62,0xf5,0x7f,0x48,0x69,0x14,0x6d,0x00,0xf8,0xff,0xff
-# ATT: vcvtnebf162ibs 8128(%ecx), %zmm2 {%k7} {z}
-# INTEL: vcvtnebf162ibs zmm2 {k7} {z}, zmmword ptr [ecx + 8128]
+# ATT: vcvtbf162ibs 8128(%ecx), %zmm2 {%k7} {z}
+# INTEL: vcvtbf162ibs zmm2 {k7} {z}, zmmword ptr [ecx + 8128]
0x62,0xf5,0x7f,0xcf,0x69,0x51,0x7f
-# ATT: vcvtnebf162ibs -256(%edx){1to32}, %zmm2 {%k7} {z}
-# INTEL: vcvtnebf162ibs zmm2 {k7} {z}, word ptr [edx - 256]{1to32}
+# ATT: vcvtbf162ibs -256(%edx){1to32}, %zmm2 {%k7} {z}
+# INTEL: vcvtbf162ibs zmm2 {k7} {z}, word ptr [edx - 256]{1to32}
0x62,0xf5,0x7f,0xdf,0x69,0x52,0x80
-# ATT: vcvtnebf162iubs %xmm3, %xmm2
-# INTEL: vcvtnebf162iubs xmm2, xmm3
+# ATT: vcvtbf162iubs %xmm3, %xmm2
+# INTEL: vcvtbf162iubs xmm2, xmm3
0x62,0xf5,0x7f,0x08,0x6b,0xd3
-# ATT: vcvtnebf162iubs %xmm3, %xmm2 {%k7}
-# INTEL: vcvtnebf162iubs xmm2 {k7}, xmm3
+# ATT: vcvtbf162iubs %xmm3, %xmm2 {%k7}
+# INTEL: vcvtbf162iubs xmm2 {k7}, xmm3
0x62,0xf5,0x7f,0x0f,0x6b,0xd3
-# ATT: vcvtnebf162iubs %xmm3, %xmm2 {%k7} {z}
-# INTEL: vcvtnebf162iubs xmm2 {k7} {z}, xmm3
+# ATT: vcvtbf162iubs %xmm3, %xmm2 {%k7} {z}
+# INTEL: vcvtbf162iubs xmm2 {k7} {z}, xmm3
0x62,0xf5,0x7f,0x8f,0x6b,0xd3
-# ATT: vcvtnebf162iubs %zmm3, %zmm2
-# INTEL: vcvtnebf162iubs zmm2, zmm3
+# ATT: vcvtbf162iubs %zmm3, %zmm2
+# INTEL: vcvtbf162iubs zmm2, zmm3
0x62,0xf5,0x7f,0x48,0x6b,0xd3
-# ATT: vcvtnebf162iubs %zmm3, %zmm2 {%k7}
-# INTEL: vcvtnebf162iubs zmm2 {k7}, zmm3
+# ATT: vcvtbf162iubs %zmm3, %zmm2 {%k7}
+# INTEL: vcvtbf162iubs zmm2 {k7}, zmm3
0x62,0xf5,0x7f,0x4f,0x6b,0xd3
-# ATT: vcvtnebf162iubs %zmm3, %zmm2 {%k7} {z}
-# INTEL: vcvtnebf162iubs zmm2 {k7} {z}, zmm3
+# ATT: vcvtbf162iubs %zmm3, %zmm2 {%k7} {z}
+# INTEL: vcvtbf162iubs zmm2 {k7} {z}, zmm3
0x62,0xf5,0x7f,0xcf,0x6b,0xd3
-# ATT: vcvtnebf162iubs %ymm3, %ymm2
-# INTEL: vcvtnebf162iubs ymm2, ymm3
+# ATT: vcvtbf162iubs %ymm3, %ymm2
+# INTEL: vcvtbf162iubs ymm2, ymm3
0x62,0xf5,0x7f,0x28,0x6b,0xd3
-# ATT: vcvtnebf162iubs %ymm3, %ymm2 {%k7}
-# INTEL: vcvtnebf162iubs ymm2 {k7}, ymm3
+# ATT: vcvtbf162iubs %ymm3, %ymm2 {%k7}
+# INTEL: vcvtbf162iubs ymm2 {k7}, ymm3
0x62,0xf5,0x7f,0x2f,0x6b,0xd3
-# ATT: vcvtnebf162iubs %ymm3, %ymm2 {%k7} {z}
-# INTEL: vcvtnebf162iubs ymm2 {k7} {z}, ymm3
+# ATT: vcvtbf162iubs %ymm3, %ymm2 {%k7} {z}
+# INTEL: vcvtbf162iubs ymm2 {k7} {z}, ymm3
0x62,0xf5,0x7f,0xaf,0x6b,0xd3
-# ATT: vcvtnebf162iubs 268435456(%esp,%esi,8), %xmm2
-# INTEL: vcvtnebf162iubs xmm2, xmmword ptr [esp + 8*esi + 268435456]
+# ATT: vcvtbf162iubs 268435456(%esp,%esi,8), %xmm2
+# INTEL: vcvtbf162iubs xmm2, xmmword ptr [esp + 8*esi + 268435456]
0x62,0xf5,0x7f,0x08,0x6b,0x94,0xf4,0x00,0x00,0x00,0x10
-# ATT: vcvtnebf162iubs 291(%edi,%eax,4), %xmm2 {%k7}
-# INTEL: vcvtnebf162iubs xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
+# ATT: vcvtbf162iubs 291(%edi,%eax,4), %xmm2 {%k7}
+# INTEL: vcvtbf162iubs xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
0x62,0xf5,0x7f,0x0f,0x6b,0x94,0x87,0x23,0x01,0x00,0x00
-# ATT: vcvtnebf162iubs (%eax){1to8}, %xmm2
-# INTEL: vcvtnebf162iubs xmm2, word ptr [eax]{1to8}
+# ATT: vcvtbf162iubs (%eax){1to8}, %xmm2
+# INTEL: vcvtbf162iubs xmm2, word ptr [eax]{1to8}
0x62,0xf5,0x7f,0x18,0x6b,0x10
-# ATT: vcvtnebf162iubs -512(,%ebp,2), %xmm2
-# INTEL: vcvtnebf162iubs xmm2, xmmword ptr [2*ebp - 512]
+# ATT: vcvtbf162iubs -512(,%ebp,2), %xmm2
+# INTEL: vcvtbf162iubs xmm2, xmmword ptr [2*ebp - 512]
0x62,0xf5,0x7f,0x08,0x6b,0x14,0x6d,0x00,0xfe,0xff,0xff
-# ATT: vcvtnebf162iubs 2032(%ecx), %xmm2 {%k7} {z}
-# INTEL: vcvtnebf162iubs xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
+# ATT: vcvtbf162iubs 2032(%ecx), %xmm2 {%k7} {z}
+# INTEL: vcvtbf162iubs xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
0x62,0xf5,0x7f,0x8f,0x6b,0x51,0x7f
-# ATT: vcvtnebf162iubs -256(%edx){1to8}, %xmm2 {%k7} {z}
-# INTEL: vcvtnebf162iubs xmm2 {k7} {z}, word ptr [edx - 256]{1to8}
+# ATT: vcvtbf162iubs -256(%edx){1to8}, %xmm2 {%k7} {z}
+# INTEL: vcvtbf162iubs xmm2 {k7} {z}, word ptr [edx - 256]{1to8}
0x62,0xf5,0x7f,0x9f,0x6b,0x52,0x80
-# ATT: vcvtnebf162iubs 268435456(%esp,%esi,8), %ymm2
-# INTEL: vcvtnebf162iubs ymm2, ymmword ptr [esp + 8*esi + 268435456]
+# ATT: vcvtbf162iubs 268435456(%esp,%esi,8), %ymm2
+# INTEL: vcvtbf162iubs ymm2, ymmword ptr [esp + 8*esi + 268435456]
0x62,0xf5,0x7f,0x28,0x6b,0x94,0xf4,0x00,0x00,0x00,0x10
-# ATT: vcvtnebf162iubs 291(%edi,%eax,4), %ymm2 {%k7}
-# INTEL: vcvtnebf162iubs ymm2 {k7}, ymmword ptr [edi + 4*eax + 291]
+# ATT: vcvtbf162iubs 291(%edi,%eax,4), %ymm2 {%k7}
+# INTEL: vcvtbf162iubs ymm2 {k7}, ymmword ptr [edi + 4*eax + 291]
0x62,0xf5,0x7f,0x2f,0x6b,0x94,0x87,0x23,0x01,0x00,0x00
-# ATT: vcvtnebf162iubs (%eax){1to16}, %ymm2
-# INTEL: vcvtnebf162iubs ymm2, word ptr [eax]{1to16}
+# ATT: vcvtbf162iubs (%eax){1to16}, %ymm2
+# INTEL: vcvtbf162iubs ymm2, word ptr [eax]{1to16}
0x62,0xf5,0x7f,0x38,0x6b,0x10
-# ATT: vcvtnebf162iubs -1024(,%ebp,2), %ymm2
-# INTEL: vcvtnebf162iubs ymm2, ymmword ptr [2*ebp - 1024]
+# ATT: vcvtbf162iubs -1024(,%ebp,2), %ymm2
+# INTEL: vcvtbf162iubs ymm2, ymmword ptr [2*ebp - 1024]
0x62,0xf5,0x7f,0x28,0x6b,0x14,0x6d,0x00,0xfc,0xff,0xff
-# ATT: vcvtnebf162iubs 4064(%ecx), %ymm2 {%k7} {z}
-# INTEL: vcvtnebf162iubs ymm2 {k7} {z}, ymmword ptr [ecx + 4064]
+# ATT: vcvtbf162iubs 4064(%ecx), %ymm2 {%k7} {z}
+# INTEL: vcvtbf162iubs ymm2 {k7} {z}, ymmword ptr [ecx + 4064]
0x62,0xf5,0x7f,0xaf,0x6b,0x51,0x7f
-# ATT: vcvtnebf162iubs -256(%edx){1to16}, %ymm2 {%k7} {z}
-# INTEL: vcvtnebf162iubs ymm2 {k7} {z}, word ptr [edx - 256]{1to16}
+# ATT: vcvtbf162iubs -256(%edx){1to16}, %ymm2 {%k7} {z}
+# INTEL: vcvtbf162iubs ymm2 {k7} {z}, word ptr [edx - 256]{1to16}
0x62,0xf5,0x7f,0xbf,0x6b,0x52,0x80
-# ATT: vcvtnebf162iubs 268435456(%esp,%esi,8), %zmm2
-# INTEL: vcvtnebf162iubs zmm2, zmmword ptr [esp + 8*esi + 268435456]
+# ATT: vcvtbf162iubs 268435456(%esp,%esi,8), %zmm2
+# INTEL: vcvtbf162iubs zmm2, zmmword ptr [esp + 8*esi + 268435456]
0x62,0xf5,0x7f,0x48,0x6b,0x94,0xf4,0x00,0x00,0x00,0x10
-# ATT: vcvtnebf162iubs 291(%edi,%eax,4), %zmm2 {%k7}
-# INTEL: vcvtnebf162iubs zmm2 {k7}, zmmword ptr [edi + 4*eax + 291]
+# ATT: vcvtbf162iubs 291(%edi,%eax,4), %zmm2 {%k7}
+# INTEL: vcvtbf162iubs zmm2 {k7}, zmmword ptr [edi + 4*eax + 291]
0x62,0xf5,0x7f,0x4f,0x6b,0x94,0x87,0x23,0x01,0x00,0x00
-# ATT: vcvtnebf162iubs (%eax){1to32}, %zmm2
-# INTEL: vcvtnebf162iubs zmm2, word ptr [eax]{1to32}
+# ATT: vcvtbf162iubs (%eax){1to32}, %zmm2
+# INTEL: vcvtbf162iubs zmm2, word ptr [eax]{1to32}
0x62,0xf5,0x7f,0x58,0x6b,0x10
-# ATT: vcvtnebf162iubs -2048(,%ebp,2), %zmm2
-# INTEL: vcvtnebf162iubs zmm2, zmmword ptr [2*ebp - 2048]
+# ATT: vcvtbf162iubs -2048(,%ebp,2), %zmm2
+# INTEL: vcvtbf162iubs zmm2, zmmword ptr [2*ebp - 2048]
0x62,0xf5,0x7f,0x48,0x6b,0x14,0x6d,0x00,0xf8,0xff,0xff
-# ATT: vcvtnebf162iubs 8128(%ecx), %zmm2 {%k7} {z}
-# INTEL: vcvtnebf162iubs zmm2 {k7} {z}, zmmword ptr [ecx + 8128]
+# ATT: vcvtbf162iubs 8128(%ecx), %zmm2 {%k7} {z}
+# INTEL: vcvtbf162iubs zmm2 {k7} {z}, zmmword ptr [ecx + 8128]
0x62,0xf5,0x7f,0xcf,0x6b,0x51,0x7f
-# ATT: vcvtnebf162iubs -256(%edx){1to32}, %zmm2 {%k7} {z}
-# INTEL: vcvtnebf162iubs zmm2 {k7} {z}, word ptr [edx - 256]{1to32}
+# ATT: vcvtbf162iubs -256(%edx){1to32}, %zmm2 {%k7} {z}
+# INTEL: vcvtbf162iubs zmm2 {k7} {z}, word ptr [edx - 256]{1to32}
0x62,0xf5,0x7f,0xdf,0x6b,0x52,0x80
# ATT: vcvtph2ibs %xmm3, %xmm2
@@ -681,220 +681,220 @@
# INTEL: vcvtps2iubs zmm2 {k7} {z}, dword ptr [edx - 512]{1to16}
0x62,0xf5,0x7d,0xdf,0x6b,0x52,0x80
-# ATT: vcvttnebf162ibs %xmm3, %xmm2
-# INTEL: vcvttnebf162ibs xmm2, xmm3
+# ATT: vcvttbf162ibs %xmm3, %xmm2
+# INTEL: vcvttbf162ibs xmm2, xmm3
0x62,0xf5,0x7f,0x08,0x68,0xd3
-# ATT: vcvttnebf162ibs %xmm3, %xmm2 {%k7}
-# INTEL: vcvttnebf162ibs xmm2 {k7}, xmm3
+# ATT: vcvttbf162ibs %xmm3, %xmm2 {%k7}
+# INTEL: vcvttbf162ibs xmm2 {k7}, xmm3
0x62,0xf5,0x7f,0x0f,0x68,0xd3
-# ATT: vcvttnebf162ibs %xmm3, %xmm2 {%k7} {z}
-# INTEL: vcvttnebf162ibs xmm2 {k7} {z}, xmm3
+# ATT: vcvttbf162ibs %xmm3, %xmm2 {%k7} {z}
+# INTEL: vcvttbf162ibs xmm2 {k7} {z}, xmm3
0x62,0xf5,0x7f,0x8f,0x68,0xd3
-# ATT: vcvttnebf162ibs %zmm3, %zmm2
-# INTEL: vcvttnebf162ibs zmm2, zmm3
+# ATT: vcvttbf162ibs %zmm3, %zmm2
+# INTEL: vcvttbf162ibs zmm2, zmm3
0x62,0xf5,0x7f,0x48,0x68,0xd3
-# ATT: vcvttnebf162ibs %zmm3, %zmm2 {%k7}
-# INTEL: vcvttnebf162ibs zmm2 {k7}, zmm3
+# ATT: vcvttbf162ibs %zmm3, %zmm2 {%k7}
+# INTEL: vcvttbf162ibs zmm2 {k7}, zmm3
0x62,0xf5,0x7f,0x4f,0x68,0xd3
-# ATT: vcvttnebf162ibs %zmm3, %zmm2 {%k7} {z}
-# INTEL: vcvttnebf162ibs zmm2 {k7} {z}, zmm3
+# ATT: vcvttbf162ibs %zmm3, %zmm2 {%k7} {z}
+# INTEL: vcvttbf162ibs zmm2 {k7} {z}, zmm3
0x62,0xf5,0x7f,0xcf,0x68,0xd3
-# ATT: vcvttnebf162ibs %ymm3, %ymm2
-# INTEL: vcvttnebf162ibs ymm2, ymm3
+# ATT: vcvttbf162ibs %ymm3, %ymm2
+# INTEL: vcvttbf162ibs ymm2, ymm3
0x62,0xf5,0x7f,0x28,0x68,0xd3
-# ATT: vcvttnebf162ibs %ymm3, %ymm2 {%k7}
-# INTEL: vcvttnebf162ibs ymm2 {k7}, ymm3
+# ATT: vcvttbf162ibs %ymm3, %ymm2 {%k7}
+# INTEL: vcvttbf162ibs ymm2 {k7}, ymm3
0x62,0xf5,0x7f,0x2f,0x68,0xd3
-# ATT: vcvttnebf162ibs %ymm3, %ymm2 {%k7} {z}
-# INTEL: vcvttnebf162ibs ymm2 {k7} {z}, ymm3
+# ATT: vcvttbf162ibs %ymm3, %ymm2 {%k7} {z}
+# INTEL: vcvttbf162ibs ymm2 {k7} {z}, ymm3
0x62,0xf5,0x7f,0xaf,0x68,0xd3
-# ATT: vcvttnebf162ibs 268435456(%esp,%esi,8), %xmm2
-# INTEL: vcvttnebf162ibs xmm2, xmmword ptr [esp + 8*esi + 268435456]
+# ATT: vcvttbf162ibs 268435456(%esp,%esi,8), %xmm2
+# INTEL: vcvttbf162ibs xmm2, xmmword ptr [esp + 8*esi + 268435456]
0x62,0xf5,0x7f,0x08,0x68,0x94,0xf4,0x00,0x00,0x00,0x10
-# ATT: vcvttnebf162ibs 291(%edi,%eax,4), %xmm2 {%k7}
-# INTEL: vcvttnebf162ibs xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
+# ATT: vcvttbf162ibs 291(%edi,%eax,4), %xmm2 {%k7}
+# INTEL: vcvttbf162ibs xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
0x62,0xf5,0x7f,0x0f,0x68,0x94,0x87,0x23,0x01,0x00,0x00
-# ATT: vcvttnebf162ibs (%eax){1to8}, %xmm2
-# INTEL: vcvttnebf162ibs xmm2, word ptr [eax]{1to8}
+# ATT: vcvttbf162ibs (%eax){1to8}, %xmm2
+# INTEL: vcvttbf162ibs xmm2, word ptr [eax]{1to8}
0x62,0xf5,0x7f,0x18,0x68,0x10
-# ATT: vcvttnebf162ibs -512(,%ebp,2), %xmm2
-# INTEL: vcvttnebf162ibs xmm2, xmmword ptr [2*ebp - 512]
+# ATT: vcvttbf162ibs -512(,%ebp,2), %xmm2
+# INTEL: vcvttbf162ibs xmm2, xmmword ptr [2*ebp - 512]
0x62,0xf5,0x7f,0x08,0x68,0x14,0x6d,0x00,0xfe,0xff,0xff
-# ATT: vcvttnebf162ibs 2032(%ecx), %xmm2 {%k7} {z}
-# INTEL: vcvttnebf162ibs xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
+# ATT: vcvttbf162ibs 2032(%ecx), %xmm2 {%k7} {z}
+# INTEL: vcvttbf162ibs xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
0x62,0xf5,0x7f,0x8f,0x68,0x51,0x7f
-# ATT: vcvttnebf162ibs -256(%edx){1to8}, %xmm2 {%k7} {z}
-# INTEL: vcvttnebf162ibs xmm2 {k7} {z}, word ptr [edx - 256]{1to8}
+# ATT: vcvttbf162ibs -256(%edx){1to8}, %xmm2 {%k7} {z}
+# INTEL: vcvttbf162ibs xmm2 {k7} {z}, word ptr [edx - 256]{1to8}
0x62,0xf5,0x7f,0x9f,0x68,0x52,0x80
-# ATT: vcvttnebf162ibs 268435456(%esp,%esi,8), %ymm2
-# INTEL: vcvttnebf162ibs ymm2, ymmword ptr [esp + 8*esi + 268435456]
+# ATT: vcvttbf162ibs 268435456(%esp,%esi,8), %ymm2
+# INTEL: vcvttbf162ibs ymm2, ymmword ptr [esp + 8*esi + 268435456]
0x62,0xf5,0x7f,0x28,0x68,0x94,0xf4,0x00,0x00,0x00,0x10
-# ATT: vcvttnebf162ibs 291(%edi,%eax,4), %ymm2 {%k7}
-# INTEL: vcvttnebf162ibs ymm2 {k7}, ymmword ptr [edi + 4*eax + 291]
+# ATT: vcvttbf162ibs 291(%edi,%eax,4), %ymm2 {%k7}
+# INTEL: vcvttbf162ibs ymm2 {k7}, ymmword ptr [edi + 4*eax + 291]
0x62,0xf5,0x7f,0x2f,0x68,0x94,0x87,0x23,0x01,0x00,0x00
-# ATT: vcvttnebf162ibs (%eax){1to16}, %ymm2
-# INTEL: vcvttnebf162ibs ymm2, word ptr [eax]{1to16}
+# ATT: vcvttbf162ibs (%eax){1to16}, %ymm2
+# INTEL: vcvttbf162ibs ymm2, word ptr [eax]{1to16}
0x62,0xf5,0x7f,0x38,0x68,0x10
-# ATT: vcvttnebf162ibs -1024(,%ebp,2), %ymm2
-# INTEL: vcvttnebf162ibs ymm2, ymmword ptr [2*ebp - 1024]
+# ATT: vcvttbf162ibs -1024(,%ebp,2), %ymm2
+# INTEL: vcvttbf162ibs ymm2, ymmword ptr [2*ebp - 1024]
0x62,0xf5,0x7f,0x28,0x68,0x14,0x6d,0x00,0xfc,0xff,0xff
-# ATT: vcvttnebf162ibs 4064(%ecx), %ymm2 {%k7} {z}
-# INTEL: vcvttnebf162ibs ymm2 {k7} {z}, ymmword ptr [ecx + 4064]
+# ATT: vcvttbf162ibs 4064(%ecx), %ymm2 {%k7} {z}
+# INTEL: vcvttbf162ibs ymm2 {k7} {z}, ymmword ptr [ecx + 4064]
0x62,0xf5,0x7f,0xaf,0x68,0x51,0x7f
-# ATT: vcvttnebf162ibs -256(%edx){1to16}, %ymm2 {%k7} {z}
-# INTEL: vcvttnebf162ibs ymm2 {k7} {z}, word ptr [edx - 256]{1to16}
+# ATT: vcvttbf162ibs -256(%edx){1to16}, %ymm2 {%k7} {z}
+# INTEL: vcvttbf162ibs ymm2 {k7} {z}, word ptr [edx - 256]{1to16}
0x62,0xf5,0x7f,0xbf,0x68,0x52,0x80
-# ATT: vcvttnebf162ibs 268435456(%esp,%esi,8), %zmm2
-# INTEL: vcvttnebf162ibs zmm2, zmmword ptr [esp + 8*esi + 268435456]
+# ATT: vcvttbf162ibs 268435456(%esp,%esi,8), %zmm2
+# INTEL: vcvttbf162ibs zmm2, zmmword ptr [esp + 8*esi + 268435456]
0x62,0xf5,0x7f,0x48,0x68,0x94,0xf4,0x00,0x00,0x00,0x10
-# ATT: vcvttnebf162ibs 291(%edi,%eax,4), %zmm2 {%k7}
-# INTEL: vcvttnebf162ibs zmm2 {k7}, zmmword ptr [edi + 4*eax + 291]
+# ATT: vcvttbf162ibs 291(%edi,%eax,4), %zmm2 {%k7}
+# INTEL: vcvttbf162ibs zmm2 {k7}, zmmword ptr [edi + 4*eax + 291]
0x62,0xf5,0x7f,0x4f,0x68,0x94,0x87,0x23,0x01,0x00,0x00
-# ATT: vcvttnebf162ibs (%eax){1to32}, %zmm2
-# INTEL: vcvttnebf162ibs zmm2, word ptr [eax]{1to32}
+# ATT: vcvttbf162ibs (%eax){1to32}, %zmm2
+# INTEL: vcvttbf162ibs zmm2, word ptr [eax]{1to32}
0x62,0xf5,0x7f,0x58,0x68,0x10
-# ATT: vcvttnebf162ibs -2048(,%ebp,2), %zmm2
-# INTEL: vcvttnebf162ibs zmm2, zmmword ptr [2*ebp - 2048]
+# ATT: vcvttbf162ibs -2048(,%ebp,2), %zmm2
+# INTEL: vcvttbf162ibs zmm2, zmmword ptr [2*ebp - 2048]
0x62,0xf5,0x7f,0x48,0x68,0x14,0x6d,0x00,0xf8,0xff,0xff
-# ATT: vcvttnebf162ibs 8128(%ecx), %zmm2 {%k7} {z}
-# INTEL: vcvttnebf162ibs zmm2 {k7} {z}, zmmword ptr [ecx + 8128]
+# ATT: vcvttbf162ibs 8128(%ecx), %zmm2 {%k7} {z}
+# INTEL: vcvttbf162ibs zmm2 {k7} {z}, zmmword ptr [ecx + 8128]
0x62,0xf5,0x7f,0xcf,0x68,0x51,0x7f
-# ATT: vcvttnebf162ibs -256(%edx){1to32}, %zmm2 {%k7} {z}
-# INTEL: vcvttnebf162ibs zmm2 {k7} {z}, word ptr [edx - 256]{1to32}
+# ATT: vcvttbf162ibs -256(%edx){1to32}, %zmm2 {%k7} {z}
+# INTEL: vcvttbf162ibs zmm2 {k7} {z}, word ptr [edx - 256]{1to32}
0x62,0xf5,0x7f,0xdf,0x68,0x52,0x80
-# ATT: vcvttnebf162iubs %xmm3, %xmm2
-# INTEL: vcvttnebf162iubs xmm2, xmm3
+# ATT: vcvttbf162iubs %xmm3, %xmm2
+# INTEL: vcvttbf162iubs xmm2, xmm3
0x62,0xf5,0x7f,0x08,0x6a,0xd3
-# ATT: vcvttnebf162iubs %xmm3, %xmm2 {%k7}
-# INTEL: vcvttnebf162iubs xmm2 {k7}, xmm3
+# ATT: vcvttbf162iubs %xmm3, %xmm2 {%k7}
+# INTEL: vcvttbf162iubs xmm2 {k7}, xmm3
0x62,0xf5,0x7f,0x0f,0x6a,0xd3
-# ATT: vcvttnebf162iubs %xmm3, %xmm2 {%k7} {z}
-# INTEL: vcvttnebf162iubs xmm2 {k7} {z}, xmm3
+# ATT: vcvttbf162iubs %xmm3, %xmm2 {%k7} {z}
+# INTEL: vcvttbf162iubs xmm2 {k7} {z}, xmm3
0x62,0xf5,0x7f,0x8f,0x6a,0xd3
-# ATT: vcvttnebf162iubs %zmm3, %zmm2
-# INTEL: vcvttnebf162iubs zmm2, zmm3
+# ATT: vcvttbf162iubs %zmm3, %zmm2
+# INTEL: vcvttbf162iubs zmm2, zmm3
0x62,0xf5,0x7f,0x48,0x6a,0xd3
-# ATT: vcvttnebf162iubs %zmm3, %zmm2 {%k7}
-# INTEL: vcvttnebf162iubs zmm2 {k7}, zmm3
+# ATT: vcvttbf162iubs %zmm3, %zmm2 {%k7}
+# INTEL: vcvttbf162iubs zmm2 {k7}, zmm3
0x62,0xf5,0x7f,0x4f,0x6a,0xd3
-# ATT: vcvttnebf162iubs %zmm3, %zmm2 {%k7} {z}
-# INTEL: vcvttnebf162iubs zmm2 {k7} {z}, zmm3
+# ATT: vcvttbf162iubs %zmm3, %zmm2 {%k7} {z}
+# INTEL: vcvttbf162iubs zmm2 {k7} {z}, zmm3
0x62,0xf5,0x7f,0xcf,0x6a,0xd3
-# ATT: vcvttnebf162iubs %ymm3, %ymm2
-# INTEL: vcvttnebf162iubs ymm2, ymm3
+# ATT: vcvttbf162iubs %ymm3, %ymm2
+# INTEL: vcvttbf162iubs ymm2, ymm3
0x62,0xf5,0x7f,0x28,0x6a,0xd3
-# ATT: vcvttnebf162iubs %ymm3, %ymm2 {%k7}
-# INTEL: vcvttnebf162iubs ymm2 {k7}, ymm3
+# ATT: vcvttbf162iubs %ymm3, %ymm2 {%k7}
+# INTEL: vcvttbf162iubs ymm2 {k7}, ymm3
0x62,0xf5,0x7f,0x2f,0x6a,0xd3
-# ATT: vcvttnebf162iubs %ymm3, %ymm2 {%k7} {z}
-# INTEL: vcvttnebf162iubs ymm2 {k7} {z}, ymm3
+# ATT: vcvttbf162iubs %ymm3, %ymm2 {%k7} {z}
+# INTEL: vcvttbf162iubs ymm2 {k7} {z}, ymm3
0x62,0xf5,0x7f,0xaf,0x6a,0xd3
-# ATT: vcvttnebf162iubs 268435456(%esp,%esi,8), %xmm2
-# INTEL: vcvttnebf162iubs xmm2, xmmword ptr [esp + 8*esi + 268435456]
+# ATT: vcvttbf162iubs 268435456(%esp,%esi,8), %xmm2
+# INTEL: vcvttbf162iubs xmm2, xmmword ptr [esp + 8*esi + 268435456]
0x62,0xf5,0x7f,0x08,0x6a,0x94,0xf4,0x00,0x00,0x00,0x10
-# ATT: vcvttnebf162iubs 291(%edi,%eax,4), %xmm2 {%k7}
-# INTEL: vcvttnebf162iubs xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
+# ATT: vcvttbf162iubs 291(%edi,%eax,4), %xmm2 {%k7}
+# INTEL: vcvttbf162iubs xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
0x62,0xf5,0x7f,0x0f,0x6a,0x94,0x87,0x23,0x01,0x00,0x00
-# ATT: vcvttnebf162iubs (%eax){1to8}, %xmm2
-# INTEL: vcvttnebf162iubs xmm2, word ptr [eax]{1to8}
+# ATT: vcvttbf162iubs (%eax){1to8}, %xmm2
+# INTEL: vcvttbf162iubs xmm2, word ptr [eax]{1to8}
0x62,0xf5,0x7f,0x18,0x6a,0x10
-# ATT: vcvttnebf162iubs -512(,%ebp,2), %xmm2
-# INTEL: vcvttnebf162iubs xmm2, xmmword ptr [2*ebp - 512]
+# ATT: vcvttbf162iubs -512(,%ebp,2), %xmm2
+# INTEL: vcvttbf162iubs xmm2, xmmword ptr [2*ebp - 512]
0x62,0xf5,0x7f,0x08,0x6a,0x14,0x6d,0x00,0xfe,0xff,0xff
-# ATT: vcvttnebf162iubs 2032(%ecx), %xmm2 {%k7} {z}
-# INTEL: vcvttnebf162iubs xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
+# ATT: vcvttbf162iubs 2032(%ecx), %xmm2 {%k7} {z}
+# INTEL: vcvttbf162iubs xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
0x62,0xf5,0x7f,0x8f,0x6a,0x51,0x7f
-# ATT: vcvttnebf162iubs -256(%edx){1to8}, %xmm2 {%k7} {z}
-# INTEL: vcvttnebf162iubs xmm2 {k7} {z}, word ptr [edx - 256]{1to8}
+# ATT: vcvttbf162iubs -256(%edx){1to8}, %xmm2 {%k7} {z}
+# INTEL: vcvttbf162iubs xmm2 {k7} {z}, word ptr [edx - 256]{1to8}
0x62,0xf5,0x7f,0x9f,0x6a,0x52,0x80
-# ATT: vcvttnebf162iubs 268435456(%esp,%esi,8), %ymm2
-# INTEL: vcvttnebf162iubs ymm2, ymmword ptr [esp + 8*esi + 268435456]
+# ATT: vcvttbf162iubs 268435456(%esp,%esi,8), %ymm2
+# INTEL: vcvttbf162iubs ymm2, ymmword ptr [esp + 8*esi + 268435456]
0x62,0xf5,0x7f,0x28,0x6a,0x94,0xf4,0x00,0x00,0x00,0x10
-# ATT: vcvttnebf162iubs 291(%edi,%eax,4), %ymm2 {%k7}
-# INTEL: vcvttnebf162iubs ymm2 {k7}, ymmword ptr [edi + 4*eax + 291]
+# ATT: vcvttbf162iubs 291(%edi,%eax,4), %ymm2 {%k7}
+# INTEL: vcvttbf162iubs ymm2 {k7}, ymmword ptr [edi + 4*eax + 291]
0x62,0xf5,0x7f,0x2f,0x6a,0x94,0x87,0x23,0x01,0x00,0x00
-# ATT: vcvttnebf162iubs (%eax){1to16}, %ymm2
-# INTEL: vcvttnebf162iubs ymm2, word ptr [eax]{1to16}
+# ATT: vcvttbf162iubs (%eax){1to16}, %ymm2
+# INTEL: vcvttbf162iubs ymm2, word ptr [eax]{1to16}
0x62,0xf5,0x7f,0x38,0x6a,0x10
-# ATT: vcvttnebf162iubs -1024(,%ebp,2), %ymm2
-# INTEL: vcvttnebf162iubs ymm2, ymmword ptr [2*ebp - 1024]
+# ATT: vcvttbf162iubs -1024(,%ebp,2), %ymm2
+# INTEL: vcvttbf162iubs ymm2, ymmword ptr [2*ebp - 1024]
0x62,0xf5,0x7f,0x28,0x6a,0x14,0x6d,0x00,0xfc,0xff,0xff
-# ATT: vcvttnebf162iubs 4064(%ecx), %ymm2 {%k7} {z}
-# INTEL: vcvttnebf162iubs ymm2 {k7} {z}, ymmword ptr [ecx + 4064]
+# ATT: vcvttbf162iubs 4064(%ecx), %ymm2 {%k7} {z}
+# INTEL: vcvttbf162iubs ymm2 {k7} {z}, ymmword ptr [ecx + 4064]
0x62,0xf5,0x7f,0xaf,0x6a,0x51,0x7f
-# ATT: vcvttnebf162iubs -256(%edx){1to16}, %ymm2 {%k7} {z}
-# INTEL: vcvttnebf162iubs ymm2 {k7} {z}, word ptr [edx - 256]{1to16}
+# ATT: vcvttbf162iubs -256(%edx){1to16}, %ymm2 {%k7} {z}
+# INTEL: vcvttbf162iubs ymm2 {k7} {z}, word ptr [edx - 256]{1to16}
0x62,0xf5,0x7f,0xbf,0x6a,0x52,0x80
-# ATT: vcvttnebf162iubs 268435456(%esp,%esi,8), %zmm2
-# INTEL: vcvttnebf162iubs zmm2, zmmword ptr [esp + 8*esi + 268435456]
+# ATT: vcvttbf162iubs 268435456(%esp,%esi,8), %zmm2
+# INTEL: vcvttbf162iubs zmm2, zmmword ptr [esp + 8*esi + 268435456]
0x62,0xf5,0x7f,0x48,0x6a,0x94,0xf4,0x00,0x00,0x00,0x10
-# ATT: vcvttnebf162iubs 291(%edi,%eax,4), %zmm2 {%k7}
-# INTEL: vcvttnebf162iubs zmm2 {k7}, zmmword ptr [edi + 4*eax + 291]
+# ATT: vcvttbf162iubs 291(%edi,%eax,4), %zmm2 {%k7}
+# INTEL: vcvttbf162iubs zmm2 {k7}, zmmword ptr [edi + 4*eax + 291]
0x62,0xf5,0x7f,0x4f,0x6a,0x94,0x87,0x23,0x01,0x00,0x00
-# ATT: vcvttnebf162iubs (%eax){1to32}, %zmm2
-# INTEL: vcvttnebf162iubs zmm2, word ptr [eax]{1to32}
+# ATT: vcvttbf162iubs (%eax){1to32}, %zmm2
+# INTEL: vcvttbf162iubs zmm2, word ptr [eax]{1to32}
0x62,0xf5,0x7f,0x58,0x6a,0x10
-# ATT: vcvttnebf162iubs -2048(,%ebp,2), %zmm2
-# INTEL: vcvttnebf162iubs zmm2, zmmword ptr [2*ebp - 2048]
+# ATT: vcvttbf162iubs -2048(,%ebp,2), %zmm2
+# INTEL: vcvttbf162iubs zmm2, zmmword ptr [2*ebp - 2048]
0x62,0xf5,0x7f,0x48,0x6a,0x14,0x6d,0x00,0xf8,0xff,0xff
-# ATT: vcvttnebf162iubs 8128(%ecx), %zmm2 {%k7} {z}
-# INTEL: vcvttnebf162iubs zmm2 {k7} {z}, zmmword ptr [ecx + 8128]
+# ATT: vcvttbf162iubs 8128(%ecx), %zmm2 {%k7} {z}
+# INTEL: vcvttbf162iubs zmm2 {k7} {z}, zmmword ptr [ecx + 8128]
0x62,0xf5,0x7f,0xcf,0x6a,0x51,0x7f
-# ATT: vcvttnebf162iubs -256(%edx){1to32}, %zmm2 {%k7} {z}
-# INTEL: vcvttnebf162iubs zmm2 {k7} {z}, word ptr [edx - 256]{1to32}
+# ATT: vcvttbf162iubs -256(%edx){1to32}, %zmm2 {%k7} {z}
+# INTEL: vcvttbf162iubs zmm2 {k7} {z}, word ptr [edx - 256]{1to32}
0x62,0xf5,0x7f,0xdf,0x6a,0x52,0x80
# ATT: vcvttph2ibs %xmm3, %xmm2
diff --git a/llvm/test/MC/Disassembler/X86/avx10.2-satcvt-64.txt b/llvm/test/MC/Disassembler/X86/avx10.2-satcvt-64.txt
index fc9ac1cbc53bd3..a7b811f9ae3ecc 100644
--- a/llvm/test/MC/Disassembler/X86/avx10.2-satcvt-64.txt
+++ b/llvm/test/MC/Disassembler/X86/avx10.2-satcvt-64.txt
@@ -1,220 +1,220 @@
# RUN: llvm-mc --disassemble %s -triple=x86_64 | FileCheck %s --check-prefixes=ATT
# RUN: llvm-mc --disassemble %s -triple=x86_64 --output-asm-variant=1 | FileCheck %s --check-prefixes=INTEL
-# ATT: vcvtnebf162ibs %xmm23, %xmm22
-# INTEL: vcvtnebf162ibs xmm22, xmm23
+# ATT: vcvtbf162ibs %xmm23, %xmm22
+# INTEL: vcvtbf162ibs xmm22, xmm23
0x62,0xa5,0x7f,0x08,0x69,0xf7
-# ATT: vcvtnebf162ibs %xmm23, %xmm22 {%k7}
-# INTEL: vcvtnebf162ibs xmm22 {k7}, xmm23
+# ATT: vcvtbf162ibs %xmm23, %xmm22 {%k7}
+# INTEL: vcvtbf162ibs xmm22 {k7}, xmm23
0x62,0xa5,0x7f,0x0f,0x69,0xf7
-# ATT: vcvtnebf162ibs %xmm23, %xmm22 {%k7} {z}
-# INTEL: vcvtnebf162ibs xmm22 {k7} {z}, xmm23
+# ATT: vcvtbf162ibs %xmm23, %xmm22 {%k7} {z}
+# INTEL: vcvtbf162ibs xmm22 {k7} {z}, xmm23
0x62,0xa5,0x7f,0x8f,0x69,0xf7
-# ATT: vcvtnebf162ibs %zmm23, %zmm22
-# INTEL: vcvtnebf162ibs zmm22, zmm23
+# ATT: vcvtbf162ibs %zmm23, %zmm22
+# INTEL: vcvtbf162ibs zmm22, zmm23
0x62,0xa5,0x7f,0x48,0x69,0xf7
-# ATT: vcvtnebf162ibs %zmm23, %zmm22 {%k7}
-# INTEL: vcvtnebf162ibs zmm22 {k7}, zmm23
+# ATT: vcvtbf162ibs %zmm23, %zmm22 {%k7}
+# INTEL: vcvtbf162ibs zmm22 {k7}, zmm23
0x62,0xa5,0x7f,0x4f,0x69,0xf7
-# ATT: vcvtnebf162ibs %zmm23, %zmm22 {%k7} {z}
-# INTEL: vcvtnebf162ibs zmm22 {k7} {z}, zmm23
+# ATT: vcvtbf162ibs %zmm23, %zmm22 {%k7} {z}
+# INTEL: vcvtbf162ibs zmm22 {k7} {z}, zmm23
0x62,0xa5,0x7f,0xcf,0x69,0xf7
-# ATT: vcvtnebf162ibs %ymm23, %ymm22
-# INTEL: vcvtnebf162ibs ymm22, ymm23
+# ATT: vcvtbf162ibs %ymm23, %ymm22
+# INTEL: vcvtbf162ibs ymm22, ymm23
0x62,0xa5,0x7f,0x28,0x69,0xf7
-# ATT: vcvtnebf162ibs %ymm23, %ymm22 {%k7}
-# INTEL: vcvtnebf162ibs ymm22 {k7}, ymm23
+# ATT: vcvtbf162ibs %ymm23, %ymm22 {%k7}
+# INTEL: vcvtbf162ibs ymm22 {k7}, ymm23
0x62,0xa5,0x7f,0x2f,0x69,0xf7
-# ATT: vcvtnebf162ibs %ymm23, %ymm22 {%k7} {z}
-# INTEL: vcvtnebf162ibs ymm22 {k7} {z}, ymm23
+# ATT: vcvtbf162ibs %ymm23, %ymm22 {%k7} {z}
+# INTEL: vcvtbf162ibs ymm22 {k7} {z}, ymm23
0x62,0xa5,0x7f,0xaf,0x69,0xf7
-# ATT: vcvtnebf162ibs 268435456(%rbp,%r14,8), %xmm22
-# INTEL: vcvtnebf162ibs xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
+# ATT: vcvtbf162ibs 268435456(%rbp,%r14,8), %xmm22
+# INTEL: vcvtbf162ibs xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x7f,0x08,0x69,0xb4,0xf5,0x00,0x00,0x00,0x10
-# ATT: vcvtnebf162ibs 291(%r8,%rax,4), %xmm22 {%k7}
-# INTEL: vcvtnebf162ibs xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
+# ATT: vcvtbf162ibs 291(%r8,%rax,4), %xmm22 {%k7}
+# INTEL: vcvtbf162ibs xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x7f,0x0f,0x69,0xb4,0x80,0x23,0x01,0x00,0x00
-# ATT: vcvtnebf162ibs (%rip){1to8}, %xmm22
-# INTEL: vcvtnebf162ibs xmm22, word ptr [rip]{1to8}
+# ATT: vcvtbf162ibs (%rip){1to8}, %xmm22
+# INTEL: vcvtbf162ibs xmm22, word ptr [rip]{1to8}
0x62,0xe5,0x7f,0x18,0x69,0x35,0x00,0x00,0x00,0x00
-# ATT: vcvtnebf162ibs -512(,%rbp,2), %xmm22
-# INTEL: vcvtnebf162ibs xmm22, xmmword ptr [2*rbp - 512]
+# ATT: vcvtbf162ibs -512(,%rbp,2), %xmm22
+# INTEL: vcvtbf162ibs xmm22, xmmword ptr [2*rbp - 512]
0x62,0xe5,0x7f,0x08,0x69,0x34,0x6d,0x00,0xfe,0xff,0xff
-# ATT: vcvtnebf162ibs 2032(%rcx), %xmm22 {%k7} {z}
-# INTEL: vcvtnebf162ibs xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
+# ATT: vcvtbf162ibs 2032(%rcx), %xmm22 {%k7} {z}
+# INTEL: vcvtbf162ibs xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
0x62,0xe5,0x7f,0x8f,0x69,0x71,0x7f
-# ATT: vcvtnebf162ibs -256(%rdx){1to8}, %xmm22 {%k7} {z}
-# INTEL: vcvtnebf162ibs xmm22 {k7} {z}, word ptr [rdx - 256]{1to8}
+# ATT: vcvtbf162ibs -256(%rdx){1to8}, %xmm22 {%k7} {z}
+# INTEL: vcvtbf162ibs xmm22 {k7} {z}, word ptr [rdx - 256]{1to8}
0x62,0xe5,0x7f,0x9f,0x69,0x72,0x80
-# ATT: vcvtnebf162ibs 268435456(%rbp,%r14,8), %ymm22
-# INTEL: vcvtnebf162ibs ymm22, ymmword ptr [rbp + 8*r14 + 268435456]
+# ATT: vcvtbf162ibs 268435456(%rbp,%r14,8), %ymm22
+# INTEL: vcvtbf162ibs ymm22, ymmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x7f,0x28,0x69,0xb4,0xf5,0x00,0x00,0x00,0x10
-# ATT: vcvtnebf162ibs 291(%r8,%rax,4), %ymm22 {%k7}
-# INTEL: vcvtnebf162ibs ymm22 {k7}, ymmword ptr [r8 + 4*rax + 291]
+# ATT: vcvtbf162ibs 291(%r8,%rax,4), %ymm22 {%k7}
+# INTEL: vcvtbf162ibs ymm22 {k7}, ymmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x7f,0x2f,0x69,0xb4,0x80,0x23,0x01,0x00,0x00
-# ATT: vcvtnebf162ibs (%rip){1to16}, %ymm22
-# INTEL: vcvtnebf162ibs ymm22, word ptr [rip]{1to16}
+# ATT: vcvtbf162ibs (%rip){1to16}, %ymm22
+# INTEL: vcvtbf162ibs ymm22, word ptr [rip]{1to16}
0x62,0xe5,0x7f,0x38,0x69,0x35,0x00,0x00,0x00,0x00
-# ATT: vcvtnebf162ibs -1024(,%rbp,2), %ymm22
-# INTEL: vcvtnebf162ibs ymm22, ymmword ptr [2*rbp - 1024]
+# ATT: vcvtbf162ibs -1024(,%rbp,2), %ymm22
+# INTEL: vcvtbf162ibs ymm22, ymmword ptr [2*rbp - 1024]
0x62,0xe5,0x7f,0x28,0x69,0x34,0x6d,0x00,0xfc,0xff,0xff
-# ATT: vcvtnebf162ibs 4064(%rcx), %ymm22 {%k7} {z}
-# INTEL: vcvtnebf162ibs ymm22 {k7} {z}, ymmword ptr [rcx + 4064]
+# ATT: vcvtbf162ibs 4064(%rcx), %ymm22 {%k7} {z}
+# INTEL: vcvtbf162ibs ymm22 {k7} {z}, ymmword ptr [rcx + 4064]
0x62,0xe5,0x7f,0xaf,0x69,0x71,0x7f
-# ATT: vcvtnebf162ibs -256(%rdx){1to16}, %ymm22 {%k7} {z}
-# INTEL: vcvtnebf162ibs ymm22 {k7} {z}, word ptr [rdx - 256]{1to16}
+# ATT: vcvtbf162ibs -256(%rdx){1to16}, %ymm22 {%k7} {z}
+# INTEL: vcvtbf162ibs ymm22 {k7} {z}, word ptr [rdx - 256]{1to16}
0x62,0xe5,0x7f,0xbf,0x69,0x72,0x80
-# ATT: vcvtnebf162ibs 268435456(%rbp,%r14,8), %zmm22
-# INTEL: vcvtnebf162ibs zmm22, zmmword ptr [rbp + 8*r14 + 268435456]
+# ATT: vcvtbf162ibs 268435456(%rbp,%r14,8), %zmm22
+# INTEL: vcvtbf162ibs zmm22, zmmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x7f,0x48,0x69,0xb4,0xf5,0x00,0x00,0x00,0x10
-# ATT: vcvtnebf162ibs 291(%r8,%rax,4), %zmm22 {%k7}
-# INTEL: vcvtnebf162ibs zmm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
+# ATT: vcvtbf162ibs 291(%r8,%rax,4), %zmm22 {%k7}
+# INTEL: vcvtbf162ibs zmm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x7f,0x4f,0x69,0xb4,0x80,0x23,0x01,0x00,0x00
-# ATT: vcvtnebf162ibs (%rip){1to32}, %zmm22
-# INTEL: vcvtnebf162ibs zmm22, word ptr [rip]{1to32}
+# ATT: vcvtbf162ibs (%rip){1to32}, %zmm22
+# INTEL: vcvtbf162ibs zmm22, word ptr [rip]{1to32}
0x62,0xe5,0x7f,0x58,0x69,0x35,0x00,0x00,0x00,0x00
-# ATT: vcvtnebf162ibs -2048(,%rbp,2), %zmm22
-# INTEL: vcvtnebf162ibs zmm22, zmmword ptr [2*rbp - 2048]
+# ATT: vcvtbf162ibs -2048(,%rbp,2), %zmm22
+# INTEL: vcvtbf162ibs zmm22, zmmword ptr [2*rbp - 2048]
0x62,0xe5,0x7f,0x48,0x69,0x34,0x6d,0x00,0xf8,0xff,0xff
-# ATT: vcvtnebf162ibs 8128(%rcx), %zmm22 {%k7} {z}
-# INTEL: vcvtnebf162ibs zmm22 {k7} {z}, zmmword ptr [rcx + 8128]
+# ATT: vcvtbf162ibs 8128(%rcx), %zmm22 {%k7} {z}
+# INTEL: vcvtbf162ibs zmm22 {k7} {z}, zmmword ptr [rcx + 8128]
0x62,0xe5,0x7f,0xcf,0x69,0x71,0x7f
-# ATT: vcvtnebf162ibs -256(%rdx){1to32}, %zmm22 {%k7} {z}
-# INTEL: vcvtnebf162ibs zmm22 {k7} {z}, word ptr [rdx - 256]{1to32}
+# ATT: vcvtbf162ibs -256(%rdx){1to32}, %zmm22 {%k7} {z}
+# INTEL: vcvtbf162ibs zmm22 {k7} {z}, word ptr [rdx - 256]{1to32}
0x62,0xe5,0x7f,0xdf,0x69,0x72,0x80
-# ATT: vcvtnebf162iubs %xmm23, %xmm22
-# INTEL: vcvtnebf162iubs xmm22, xmm23
+# ATT: vcvtbf162iubs %xmm23, %xmm22
+# INTEL: vcvtbf162iubs xmm22, xmm23
0x62,0xa5,0x7f,0x08,0x6b,0xf7
-# ATT: vcvtnebf162iubs %xmm23, %xmm22 {%k7}
-# INTEL: vcvtnebf162iubs xmm22 {k7}, xmm23
+# ATT: vcvtbf162iubs %xmm23, %xmm22 {%k7}
+# INTEL: vcvtbf162iubs xmm22 {k7}, xmm23
0x62,0xa5,0x7f,0x0f,0x6b,0xf7
-# ATT: vcvtnebf162iubs %xmm23, %xmm22 {%k7} {z}
-# INTEL: vcvtnebf162iubs xmm22 {k7} {z}, xmm23
+# ATT: vcvtbf162iubs %xmm23, %xmm22 {%k7} {z}
+# INTEL: vcvtbf162iubs xmm22 {k7} {z}, xmm23
0x62,0xa5,0x7f,0x8f,0x6b,0xf7
-# ATT: vcvtnebf162iubs %zmm23, %zmm22
-# INTEL: vcvtnebf162iubs zmm22, zmm23
+# ATT: vcvtbf162iubs %zmm23, %zmm22
+# INTEL: vcvtbf162iubs zmm22, zmm23
0x62,0xa5,0x7f,0x48,0x6b,0xf7
-# ATT: vcvtnebf162iubs %zmm23, %zmm22 {%k7}
-# INTEL: vcvtnebf162iubs zmm22 {k7}, zmm23
+# ATT: vcvtbf162iubs %zmm23, %zmm22 {%k7}
+# INTEL: vcvtbf162iubs zmm22 {k7}, zmm23
0x62,0xa5,0x7f,0x4f,0x6b,0xf7
-# ATT: vcvtnebf162iubs %zmm23, %zmm22 {%k7} {z}
-# INTEL: vcvtnebf162iubs zmm22 {k7} {z}, zmm23
+# ATT: vcvtbf162iubs %zmm23, %zmm22 {%k7} {z}
+# INTEL: vcvtbf162iubs zmm22 {k7} {z}, zmm23
0x62,0xa5,0x7f,0xcf,0x6b,0xf7
-# ATT: vcvtnebf162iubs %ymm23, %ymm22
-# INTEL: vcvtnebf162iubs ymm22, ymm23
+# ATT: vcvtbf162iubs %ymm23, %ymm22
+# INTEL: vcvtbf162iubs ymm22, ymm23
0x62,0xa5,0x7f,0x28,0x6b,0xf7
-# ATT: vcvtnebf162iubs %ymm23, %ymm22 {%k7}
-# INTEL: vcvtnebf162iubs ymm22 {k7}, ymm23
+# ATT: vcvtbf162iubs %ymm23, %ymm22 {%k7}
+# INTEL: vcvtbf162iubs ymm22 {k7}, ymm23
0x62,0xa5,0x7f,0x2f,0x6b,0xf7
-# ATT: vcvtnebf162iubs %ymm23, %ymm22 {%k7} {z}
-# INTEL: vcvtnebf162iubs ymm22 {k7} {z}, ymm23
+# ATT: vcvtbf162iubs %ymm23, %ymm22 {%k7} {z}
+# INTEL: vcvtbf162iubs ymm22 {k7} {z}, ymm23
0x62,0xa5,0x7f,0xaf,0x6b,0xf7
-# ATT: vcvtnebf162iubs 268435456(%rbp,%r14,8), %xmm22
-# INTEL: vcvtnebf162iubs xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
+# ATT: vcvtbf162iubs 268435456(%rbp,%r14,8), %xmm22
+# INTEL: vcvtbf162iubs xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x7f,0x08,0x6b,0xb4,0xf5,0x00,0x00,0x00,0x10
-# ATT: vcvtnebf162iubs 291(%r8,%rax,4), %xmm22 {%k7}
-# INTEL: vcvtnebf162iubs xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
+# ATT: vcvtbf162iubs 291(%r8,%rax,4), %xmm22 {%k7}
+# INTEL: vcvtbf162iubs xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x7f,0x0f,0x6b,0xb4,0x80,0x23,0x01,0x00,0x00
-# ATT: vcvtnebf162iubs (%rip){1to8}, %xmm22
-# INTEL: vcvtnebf162iubs xmm22, word ptr [rip]{1to8}
+# ATT: vcvtbf162iubs (%rip){1to8}, %xmm22
+# INTEL: vcvtbf162iubs xmm22, word ptr [rip]{1to8}
0x62,0xe5,0x7f,0x18,0x6b,0x35,0x00,0x00,0x00,0x00
-# ATT: vcvtnebf162iubs -512(,%rbp,2), %xmm22
-# INTEL: vcvtnebf162iubs xmm22, xmmword ptr [2*rbp - 512]
+# ATT: vcvtbf162iubs -512(,%rbp,2), %xmm22
+# INTEL: vcvtbf162iubs xmm22, xmmword ptr [2*rbp - 512]
0x62,0xe5,0x7f,0x08,0x6b,0x34,0x6d,0x00,0xfe,0xff,0xff
-# ATT: vcvtnebf162iubs 2032(%rcx), %xmm22 {%k7} {z}
-# INTEL: vcvtnebf162iubs xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
+# ATT: vcvtbf162iubs 2032(%rcx), %xmm22 {%k7} {z}
+# INTEL: vcvtbf162iubs xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
0x62,0xe5,0x7f,0x8f,0x6b,0x71,0x7f
-# ATT: vcvtnebf162iubs -256(%rdx){1to8}, %xmm22 {%k7} {z}
-# INTEL: vcvtnebf162iubs xmm22 {k7} {z}, word ptr [rdx - 256]{1to8}
+# ATT: vcvtbf162iubs -256(%rdx){1to8}, %xmm22 {%k7} {z}
+# INTEL: vcvtbf162iubs xmm22 {k7} {z}, word ptr [rdx - 256]{1to8}
0x62,0xe5,0x7f,0x9f,0x6b,0x72,0x80
-# ATT: vcvtnebf162iubs 268435456(%rbp,%r14,8), %ymm22
-# INTEL: vcvtnebf162iubs ymm22, ymmword ptr [rbp + 8*r14 + 268435456]
+# ATT: vcvtbf162iubs 268435456(%rbp,%r14,8), %ymm22
+# INTEL: vcvtbf162iubs ymm22, ymmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x7f,0x28,0x6b,0xb4,0xf5,0x00,0x00,0x00,0x10
-# ATT: vcvtnebf162iubs 291(%r8,%rax,4), %ymm22 {%k7}
-# INTEL: vcvtnebf162iubs ymm22 {k7}, ymmword ptr [r8 + 4*rax + 291]
+# ATT: vcvtbf162iubs 291(%r8,%rax,4), %ymm22 {%k7}
+# INTEL: vcvtbf162iubs ymm22 {k7}, ymmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x7f,0x2f,0x6b,0xb4,0x80,0x23,0x01,0x00,0x00
-# ATT: vcvtnebf162iubs (%rip){1to16}, %ymm22
-# INTEL: vcvtnebf162iubs ymm22, word ptr [rip]{1to16}
+# ATT: vcvtbf162iubs (%rip){1to16}, %ymm22
+# INTEL: vcvtbf162iubs ymm22, word ptr [rip]{1to16}
0x62,0xe5,0x7f,0x38,0x6b,0x35,0x00,0x00,0x00,0x00
-# ATT: vcvtnebf162iubs -1024(,%rbp,2), %ymm22
-# INTEL: vcvtnebf162iubs ymm22, ymmword ptr [2*rbp - 1024]
+# ATT: vcvtbf162iubs -1024(,%rbp,2), %ymm22
+# INTEL: vcvtbf162iubs ymm22, ymmword ptr [2*rbp - 1024]
0x62,0xe5,0x7f,0x28,0x6b,0x34,0x6d,0x00,0xfc,0xff,0xff
-# ATT: vcvtnebf162iubs 4064(%rcx), %ymm22 {%k7} {z}
-# INTEL: vcvtnebf162iubs ymm22 {k7} {z}, ymmword ptr [rcx + 4064]
+# ATT: vcvtbf162iubs 4064(%rcx), %ymm22 {%k7} {z}
+# INTEL: vcvtbf162iubs ymm22 {k7} {z}, ymmword ptr [rcx + 4064]
0x62,0xe5,0x7f,0xaf,0x6b,0x71,0x7f
-# ATT: vcvtnebf162iubs -256(%rdx){1to16}, %ymm22 {%k7} {z}
-# INTEL: vcvtnebf162iubs ymm22 {k7} {z}, word ptr [rdx - 256]{1to16}
+# ATT: vcvtbf162iubs -256(%rdx){1to16}, %ymm22 {%k7} {z}
+# INTEL: vcvtbf162iubs ymm22 {k7} {z}, word ptr [rdx - 256]{1to16}
0x62,0xe5,0x7f,0xbf,0x6b,0x72,0x80
-# ATT: vcvtnebf162iubs 268435456(%rbp,%r14,8), %zmm22
-# INTEL: vcvtnebf162iubs zmm22, zmmword ptr [rbp + 8*r14 + 268435456]
+# ATT: vcvtbf162iubs 268435456(%rbp,%r14,8), %zmm22
+# INTEL: vcvtbf162iubs zmm22, zmmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x7f,0x48,0x6b,0xb4,0xf5,0x00,0x00,0x00,0x10
-# ATT: vcvtnebf162iubs 291(%r8,%rax,4), %zmm22 {%k7}
-# INTEL: vcvtnebf162iubs zmm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
+# ATT: vcvtbf162iubs 291(%r8,%rax,4), %zmm22 {%k7}
+# INTEL: vcvtbf162iubs zmm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x7f,0x4f,0x6b,0xb4,0x80,0x23,0x01,0x00,0x00
-# ATT: vcvtnebf162iubs (%rip){1to32}, %zmm22
-# INTEL: vcvtnebf162iubs zmm22, word ptr [rip]{1to32}
+# ATT: vcvtbf162iubs (%rip){1to32}, %zmm22
+# INTEL: vcvtbf162iubs zmm22, word ptr [rip]{1to32}
0x62,0xe5,0x7f,0x58,0x6b,0x35,0x00,0x00,0x00,0x00
-# ATT: vcvtnebf162iubs -2048(,%rbp,2), %zmm22
-# INTEL: vcvtnebf162iubs zmm22, zmmword ptr [2*rbp - 2048]
+# ATT: vcvtbf162iubs -2048(,%rbp,2), %zmm22
+# INTEL: vcvtbf162iubs zmm22, zmmword ptr [2*rbp - 2048]
0x62,0xe5,0x7f,0x48,0x6b,0x34,0x6d,0x00,0xf8,0xff,0xff
-# ATT: vcvtnebf162iubs 8128(%rcx), %zmm22 {%k7} {z}
-# INTEL: vcvtnebf162iubs zmm22 {k7} {z}, zmmword ptr [rcx + 8128]
+# ATT: vcvtbf162iubs 8128(%rcx), %zmm22 {%k7} {z}
+# INTEL: vcvtbf162iubs zmm22 {k7} {z}, zmmword ptr [rcx + 8128]
0x62,0xe5,0x7f,0xcf,0x6b,0x71,0x7f
-# ATT: vcvtnebf162iubs -256(%rdx){1to32}, %zmm22 {%k7} {z}
-# INTEL: vcvtnebf162iubs zmm22 {k7} {z}, word ptr [rdx - 256]{1to32}
+# ATT: vcvtbf162iubs -256(%rdx){1to32}, %zmm22 {%k7} {z}
+# INTEL: vcvtbf162iubs zmm22 {k7} {z}, word ptr [rdx - 256]{1to32}
0x62,0xe5,0x7f,0xdf,0x6b,0x72,0x80
# ATT: vcvtph2ibs %xmm23, %xmm22
@@ -681,220 +681,220 @@
# INTEL: vcvtps2iubs zmm22 {k7} {z}, dword ptr [rdx - 512]{1to16}
0x62,0xe5,0x7d,0xdf,0x6b,0x72,0x80
-# ATT: vcvttnebf162ibs %xmm23, %xmm22
-# INTEL: vcvttnebf162ibs xmm22, xmm23
+# ATT: vcvttbf162ibs %xmm23, %xmm22
+# INTEL: vcvttbf162ibs xmm22, xmm23
0x62,0xa5,0x7f,0x08,0x68,0xf7
-# ATT: vcvttnebf162ibs %xmm23, %xmm22 {%k7}
-# INTEL: vcvttnebf162ibs xmm22 {k7}, xmm23
+# ATT: vcvttbf162ibs %xmm23, %xmm22 {%k7}
+# INTEL: vcvttbf162ibs xmm22 {k7}, xmm23
0x62,0xa5,0x7f,0x0f,0x68,0xf7
-# ATT: vcvttnebf162ibs %xmm23, %xmm22 {%k7} {z}
-# INTEL: vcvttnebf162ibs xmm22 {k7} {z}, xmm23
+# ATT: vcvttbf162ibs %xmm23, %xmm22 {%k7} {z}
+# INTEL: vcvttbf162ibs xmm22 {k7} {z}, xmm23
0x62,0xa5,0x7f,0x8f,0x68,0xf7
-# ATT: vcvttnebf162ibs %zmm23, %zmm22
-# INTEL: vcvttnebf162ibs zmm22, zmm23
+# ATT: vcvttbf162ibs %zmm23, %zmm22
+# INTEL: vcvttbf162ibs zmm22, zmm23
0x62,0xa5,0x7f,0x48,0x68,0xf7
-# ATT: vcvttnebf162ibs %zmm23, %zmm22 {%k7}
-# INTEL: vcvttnebf162ibs zmm22 {k7}, zmm23
+# ATT: vcvttbf162ibs %zmm23, %zmm22 {%k7}
+# INTEL: vcvttbf162ibs zmm22 {k7}, zmm23
0x62,0xa5,0x7f,0x4f,0x68,0xf7
-# ATT: vcvttnebf162ibs %zmm23, %zmm22 {%k7} {z}
-# INTEL: vcvttnebf162ibs zmm22 {k7} {z}, zmm23
+# ATT: vcvttbf162ibs %zmm23, %zmm22 {%k7} {z}
+# INTEL: vcvttbf162ibs zmm22 {k7} {z}, zmm23
0x62,0xa5,0x7f,0xcf,0x68,0xf7
-# ATT: vcvttnebf162ibs %ymm23, %ymm22
-# INTEL: vcvttnebf162ibs ymm22, ymm23
+# ATT: vcvttbf162ibs %ymm23, %ymm22
+# INTEL: vcvttbf162ibs ymm22, ymm23
0x62,0xa5,0x7f,0x28,0x68,0xf7
-# ATT: vcvttnebf162ibs %ymm23, %ymm22 {%k7}
-# INTEL: vcvttnebf162ibs ymm22 {k7}, ymm23
+# ATT: vcvttbf162ibs %ymm23, %ymm22 {%k7}
+# INTEL: vcvttbf162ibs ymm22 {k7}, ymm23
0x62,0xa5,0x7f,0x2f,0x68,0xf7
-# ATT: vcvttnebf162ibs %ymm23, %ymm22 {%k7} {z}
-# INTEL: vcvttnebf162ibs ymm22 {k7} {z}, ymm23
+# ATT: vcvttbf162ibs %ymm23, %ymm22 {%k7} {z}
+# INTEL: vcvttbf162ibs ymm22 {k7} {z}, ymm23
0x62,0xa5,0x7f,0xaf,0x68,0xf7
-# ATT: vcvttnebf162ibs 268435456(%rbp,%r14,8), %xmm22
-# INTEL: vcvttnebf162ibs xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
+# ATT: vcvttbf162ibs 268435456(%rbp,%r14,8), %xmm22
+# INTEL: vcvttbf162ibs xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x7f,0x08,0x68,0xb4,0xf5,0x00,0x00,0x00,0x10
-# ATT: vcvttnebf162ibs 291(%r8,%rax,4), %xmm22 {%k7}
-# INTEL: vcvttnebf162ibs xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
+# ATT: vcvttbf162ibs 291(%r8,%rax,4), %xmm22 {%k7}
+# INTEL: vcvttbf162ibs xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x7f,0x0f,0x68,0xb4,0x80,0x23,0x01,0x00,0x00
-# ATT: vcvttnebf162ibs (%rip){1to8}, %xmm22
-# INTEL: vcvttnebf162ibs xmm22, word ptr [rip]{1to8}
+# ATT: vcvttbf162ibs (%rip){1to8}, %xmm22
+# INTEL: vcvttbf162ibs xmm22, word ptr [rip]{1to8}
0x62,0xe5,0x7f,0x18,0x68,0x35,0x00,0x00,0x00,0x00
-# ATT: vcvttnebf162ibs -512(,%rbp,2), %xmm22
-# INTEL: vcvttnebf162ibs xmm22, xmmword ptr [2*rbp - 512]
+# ATT: vcvttbf162ibs -512(,%rbp,2), %xmm22
+# INTEL: vcvttbf162ibs xmm22, xmmword ptr [2*rbp - 512]
0x62,0xe5,0x7f,0x08,0x68,0x34,0x6d,0x00,0xfe,0xff,0xff
-# ATT: vcvttnebf162ibs 2032(%rcx), %xmm22 {%k7} {z}
-# INTEL: vcvttnebf162ibs xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
+# ATT: vcvttbf162ibs 2032(%rcx), %xmm22 {%k7} {z}
+# INTEL: vcvttbf162ibs xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
0x62,0xe5,0x7f,0x8f,0x68,0x71,0x7f
-# ATT: vcvttnebf162ibs -256(%rdx){1to8}, %xmm22 {%k7} {z}
-# INTEL: vcvttnebf162ibs xmm22 {k7} {z}, word ptr [rdx - 256]{1to8}
+# ATT: vcvttbf162ibs -256(%rdx){1to8}, %xmm22 {%k7} {z}
+# INTEL: vcvttbf162ibs xmm22 {k7} {z}, word ptr [rdx - 256]{1to8}
0x62,0xe5,0x7f,0x9f,0x68,0x72,0x80
-# ATT: vcvttnebf162ibs 268435456(%rbp,%r14,8), %ymm22
-# INTEL: vcvttnebf162ibs ymm22, ymmword ptr [rbp + 8*r14 + 268435456]
+# ATT: vcvttbf162ibs 268435456(%rbp,%r14,8), %ymm22
+# INTEL: vcvttbf162ibs ymm22, ymmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x7f,0x28,0x68,0xb4,0xf5,0x00,0x00,0x00,0x10
-# ATT: vcvttnebf162ibs 291(%r8,%rax,4), %ymm22 {%k7}
-# INTEL: vcvttnebf162ibs ymm22 {k7}, ymmword ptr [r8 + 4*rax + 291]
+# ATT: vcvttbf162ibs 291(%r8,%rax,4), %ymm22 {%k7}
+# INTEL: vcvttbf162ibs ymm22 {k7}, ymmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x7f,0x2f,0x68,0xb4,0x80,0x23,0x01,0x00,0x00
-# ATT: vcvttnebf162ibs (%rip){1to16}, %ymm22
-# INTEL: vcvttnebf162ibs ymm22, word ptr [rip]{1to16}
+# ATT: vcvttbf162ibs (%rip){1to16}, %ymm22
+# INTEL: vcvttbf162ibs ymm22, word ptr [rip]{1to16}
0x62,0xe5,0x7f,0x38,0x68,0x35,0x00,0x00,0x00,0x00
-# ATT: vcvttnebf162ibs -1024(,%rbp,2), %ymm22
-# INTEL: vcvttnebf162ibs ymm22, ymmword ptr [2*rbp - 1024]
+# ATT: vcvttbf162ibs -1024(,%rbp,2), %ymm22
+# INTEL: vcvttbf162ibs ymm22, ymmword ptr [2*rbp - 1024]
0x62,0xe5,0x7f,0x28,0x68,0x34,0x6d,0x00,0xfc,0xff,0xff
-# ATT: vcvttnebf162ibs 4064(%rcx), %ymm22 {%k7} {z}
-# INTEL: vcvttnebf162ibs ymm22 {k7} {z}, ymmword ptr [rcx + 4064]
+# ATT: vcvttbf162ibs 4064(%rcx), %ymm22 {%k7} {z}
+# INTEL: vcvttbf162ibs ymm22 {k7} {z}, ymmword ptr [rcx + 4064]
0x62,0xe5,0x7f,0xaf,0x68,0x71,0x7f
-# ATT: vcvttnebf162ibs -256(%rdx){1to16}, %ymm22 {%k7} {z}
-# INTEL: vcvttnebf162ibs ymm22 {k7} {z}, word ptr [rdx - 256]{1to16}
+# ATT: vcvttbf162ibs -256(%rdx){1to16}, %ymm22 {%k7} {z}
+# INTEL: vcvttbf162ibs ymm22 {k7} {z}, word ptr [rdx - 256]{1to16}
0x62,0xe5,0x7f,0xbf,0x68,0x72,0x80
-# ATT: vcvttnebf162ibs 268435456(%rbp,%r14,8), %zmm22
-# INTEL: vcvttnebf162ibs zmm22, zmmword ptr [rbp + 8*r14 + 268435456]
+# ATT: vcvttbf162ibs 268435456(%rbp,%r14,8), %zmm22
+# INTEL: vcvttbf162ibs zmm22, zmmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x7f,0x48,0x68,0xb4,0xf5,0x00,0x00,0x00,0x10
-# ATT: vcvttnebf162ibs 291(%r8,%rax,4), %zmm22 {%k7}
-# INTEL: vcvttnebf162ibs zmm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
+# ATT: vcvttbf162ibs 291(%r8,%rax,4), %zmm22 {%k7}
+# INTEL: vcvttbf162ibs zmm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x7f,0x4f,0x68,0xb4,0x80,0x23,0x01,0x00,0x00
-# ATT: vcvttnebf162ibs (%rip){1to32}, %zmm22
-# INTEL: vcvttnebf162ibs zmm22, word ptr [rip]{1to32}
+# ATT: vcvttbf162ibs (%rip){1to32}, %zmm22
+# INTEL: vcvttbf162ibs zmm22, word ptr [rip]{1to32}
0x62,0xe5,0x7f,0x58,0x68,0x35,0x00,0x00,0x00,0x00
-# ATT: vcvttnebf162ibs -2048(,%rbp,2), %zmm22
-# INTEL: vcvttnebf162ibs zmm22, zmmword ptr [2*rbp - 2048]
+# ATT: vcvttbf162ibs -2048(,%rbp,2), %zmm22
+# INTEL: vcvttbf162ibs zmm22, zmmword ptr [2*rbp - 2048]
0x62,0xe5,0x7f,0x48,0x68,0x34,0x6d,0x00,0xf8,0xff,0xff
-# ATT: vcvttnebf162ibs 8128(%rcx), %zmm22 {%k7} {z}
-# INTEL: vcvttnebf162ibs zmm22 {k7} {z}, zmmword ptr [rcx + 8128]
+# ATT: vcvttbf162ibs 8128(%rcx), %zmm22 {%k7} {z}
+# INTEL: vcvttbf162ibs zmm22 {k7} {z}, zmmword ptr [rcx + 8128]
0x62,0xe5,0x7f,0xcf,0x68,0x71,0x7f
-# ATT: vcvttnebf162ibs -256(%rdx){1to32}, %zmm22 {%k7} {z}
-# INTEL: vcvttnebf162ibs zmm22 {k7} {z}, word ptr [rdx - 256]{1to32}
+# ATT: vcvttbf162ibs -256(%rdx){1to32}, %zmm22 {%k7} {z}
+# INTEL: vcvttbf162ibs zmm22 {k7} {z}, word ptr [rdx - 256]{1to32}
0x62,0xe5,0x7f,0xdf,0x68,0x72,0x80
-# ATT: vcvttnebf162iubs %xmm23, %xmm22
-# INTEL: vcvttnebf162iubs xmm22, xmm23
+# ATT: vcvttbf162iubs %xmm23, %xmm22
+# INTEL: vcvttbf162iubs xmm22, xmm23
0x62,0xa5,0x7f,0x08,0x6a,0xf7
-# ATT: vcvttnebf162iubs %xmm23, %xmm22 {%k7}
-# INTEL: vcvttnebf162iubs xmm22 {k7}, xmm23
+# ATT: vcvttbf162iubs %xmm23, %xmm22 {%k7}
+# INTEL: vcvttbf162iubs xmm22 {k7}, xmm23
0x62,0xa5,0x7f,0x0f,0x6a,0xf7
-# ATT: vcvttnebf162iubs %xmm23, %xmm22 {%k7} {z}
-# INTEL: vcvttnebf162iubs xmm22 {k7} {z}, xmm23
+# ATT: vcvttbf162iubs %xmm23, %xmm22 {%k7} {z}
+# INTEL: vcvttbf162iubs xmm22 {k7} {z}, xmm23
0x62,0xa5,0x7f,0x8f,0x6a,0xf7
-# ATT: vcvttnebf162iubs %zmm23, %zmm22
-# INTEL: vcvttnebf162iubs zmm22, zmm23
+# ATT: vcvttbf162iubs %zmm23, %zmm22
+# INTEL: vcvttbf162iubs zmm22, zmm23
0x62,0xa5,0x7f,0x48,0x6a,0xf7
-# ATT: vcvttnebf162iubs %zmm23, %zmm22 {%k7}
-# INTEL: vcvttnebf162iubs zmm22 {k7}, zmm23
+# ATT: vcvttbf162iubs %zmm23, %zmm22 {%k7}
+# INTEL: vcvttbf162iubs zmm22 {k7}, zmm23
0x62,0xa5,0x7f,0x4f,0x6a,0xf7
-# ATT: vcvttnebf162iubs %zmm23, %zmm22 {%k7} {z}
-# INTEL: vcvttnebf162iubs zmm22 {k7} {z}, zmm23
+# ATT: vcvttbf162iubs %zmm23, %zmm22 {%k7} {z}
+# INTEL: vcvttbf162iubs zmm22 {k7} {z}, zmm23
0x62,0xa5,0x7f,0xcf,0x6a,0xf7
-# ATT: vcvttnebf162iubs %ymm23, %ymm22
-# INTEL: vcvttnebf162iubs ymm22, ymm23
+# ATT: vcvttbf162iubs %ymm23, %ymm22
+# INTEL: vcvttbf162iubs ymm22, ymm23
0x62,0xa5,0x7f,0x28,0x6a,0xf7
-# ATT: vcvttnebf162iubs %ymm23, %ymm22 {%k7}
-# INTEL: vcvttnebf162iubs ymm22 {k7}, ymm23
+# ATT: vcvttbf162iubs %ymm23, %ymm22 {%k7}
+# INTEL: vcvttbf162iubs ymm22 {k7}, ymm23
0x62,0xa5,0x7f,0x2f,0x6a,0xf7
-# ATT: vcvttnebf162iubs %ymm23, %ymm22 {%k7} {z}
-# INTEL: vcvttnebf162iubs ymm22 {k7} {z}, ymm23
+# ATT: vcvttbf162iubs %ymm23, %ymm22 {%k7} {z}
+# INTEL: vcvttbf162iubs ymm22 {k7} {z}, ymm23
0x62,0xa5,0x7f,0xaf,0x6a,0xf7
-# ATT: vcvttnebf162iubs 268435456(%rbp,%r14,8), %xmm22
-# INTEL: vcvttnebf162iubs xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
+# ATT: vcvttbf162iubs 268435456(%rbp,%r14,8), %xmm22
+# INTEL: vcvttbf162iubs xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x7f,0x08,0x6a,0xb4,0xf5,0x00,0x00,0x00,0x10
-# ATT: vcvttnebf162iubs 291(%r8,%rax,4), %xmm22 {%k7}
-# INTEL: vcvttnebf162iubs xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
+# ATT: vcvttbf162iubs 291(%r8,%rax,4), %xmm22 {%k7}
+# INTEL: vcvttbf162iubs xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x7f,0x0f,0x6a,0xb4,0x80,0x23,0x01,0x00,0x00
-# ATT: vcvttnebf162iubs (%rip){1to8}, %xmm22
-# INTEL: vcvttnebf162iubs xmm22, word ptr [rip]{1to8}
+# ATT: vcvttbf162iubs (%rip){1to8}, %xmm22
+# INTEL: vcvttbf162iubs xmm22, word ptr [rip]{1to8}
0x62,0xe5,0x7f,0x18,0x6a,0x35,0x00,0x00,0x00,0x00
-# ATT: vcvttnebf162iubs -512(,%rbp,2), %xmm22
-# INTEL: vcvttnebf162iubs xmm22, xmmword ptr [2*rbp - 512]
+# ATT: vcvttbf162iubs -512(,%rbp,2), %xmm22
+# INTEL: vcvttbf162iubs xmm22, xmmword ptr [2*rbp - 512]
0x62,0xe5,0x7f,0x08,0x6a,0x34,0x6d,0x00,0xfe,0xff,0xff
-# ATT: vcvttnebf162iubs 2032(%rcx), %xmm22 {%k7} {z}
-# INTEL: vcvttnebf162iubs xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
+# ATT: vcvttbf162iubs 2032(%rcx), %xmm22 {%k7} {z}
+# INTEL: vcvttbf162iubs xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
0x62,0xe5,0x7f,0x8f,0x6a,0x71,0x7f
-# ATT: vcvttnebf162iubs -256(%rdx){1to8}, %xmm22 {%k7} {z}
-# INTEL: vcvttnebf162iubs xmm22 {k7} {z}, word ptr [rdx - 256]{1to8}
+# ATT: vcvttbf162iubs -256(%rdx){1to8}, %xmm22 {%k7} {z}
+# INTEL: vcvttbf162iubs xmm22 {k7} {z}, word ptr [rdx - 256]{1to8}
0x62,0xe5,0x7f,0x9f,0x6a,0x72,0x80
-# ATT: vcvttnebf162iubs 268435456(%rbp,%r14,8), %ymm22
-# INTEL: vcvttnebf162iubs ymm22, ymmword ptr [rbp + 8*r14 + 268435456]
+# ATT: vcvttbf162iubs 268435456(%rbp,%r14,8), %ymm22
+# INTEL: vcvttbf162iubs ymm22, ymmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x7f,0x28,0x6a,0xb4,0xf5,0x00,0x00,0x00,0x10
-# ATT: vcvttnebf162iubs 291(%r8,%rax,4), %ymm22 {%k7}
-# INTEL: vcvttnebf162iubs ymm22 {k7}, ymmword ptr [r8 + 4*rax + 291]
+# ATT: vcvttbf162iubs 291(%r8,%rax,4), %ymm22 {%k7}
+# INTEL: vcvttbf162iubs ymm22 {k7}, ymmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x7f,0x2f,0x6a,0xb4,0x80,0x23,0x01,0x00,0x00
-# ATT: vcvttnebf162iubs (%rip){1to16}, %ymm22
-# INTEL: vcvttnebf162iubs ymm22, word ptr [rip]{1to16}
+# ATT: vcvttbf162iubs (%rip){1to16}, %ymm22
+# INTEL: vcvttbf162iubs ymm22, word ptr [rip]{1to16}
0x62,0xe5,0x7f,0x38,0x6a,0x35,0x00,0x00,0x00,0x00
-# ATT: vcvttnebf162iubs -1024(,%rbp,2), %ymm22
-# INTEL: vcvttnebf162iubs ymm22, ymmword ptr [2*rbp - 1024]
+# ATT: vcvttbf162iubs -1024(,%rbp,2), %ymm22
+# INTEL: vcvttbf162iubs ymm22, ymmword ptr [2*rbp - 1024]
0x62,0xe5,0x7f,0x28,0x6a,0x34,0x6d,0x00,0xfc,0xff,0xff
-# ATT: vcvttnebf162iubs 4064(%rcx), %ymm22 {%k7} {z}
-# INTEL: vcvttnebf162iubs ymm22 {k7} {z}, ymmword ptr [rcx + 4064]
+# ATT: vcvttbf162iubs 4064(%rcx), %ymm22 {%k7} {z}
+# INTEL: vcvttbf162iubs ymm22 {k7} {z}, ymmword ptr [rcx + 4064]
0x62,0xe5,0x7f,0xaf,0x6a,0x71,0x7f
-# ATT: vcvttnebf162iubs -256(%rdx){1to16}, %ymm22 {%k7} {z}
-# INTEL: vcvttnebf162iubs ymm22 {k7} {z}, word ptr [rdx - 256]{1to16}
+# ATT: vcvttbf162iubs -256(%rdx){1to16}, %ymm22 {%k7} {z}
+# INTEL: vcvttbf162iubs ymm22 {k7} {z}, word ptr [rdx - 256]{1to16}
0x62,0xe5,0x7f,0xbf,0x6a,0x72,0x80
-# ATT: vcvttnebf162iubs 268435456(%rbp,%r14,8), %zmm22
-# INTEL: vcvttnebf162iubs zmm22, zmmword ptr [rbp + 8*r14 + 268435456]
+# ATT: vcvttbf162iubs 268435456(%rbp,%r14,8), %zmm22
+# INTEL: vcvttbf162iubs zmm22, zmmword ptr [rbp + 8*r14 + 268435456]
0x62,0xa5,0x7f,0x48,0x6a,0xb4,0xf5,0x00,0x00,0x00,0x10
-# ATT: vcvttnebf162iubs 291(%r8,%rax,4), %zmm22 {%k7}
-# INTEL: vcvttnebf162iubs zmm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
+# ATT: vcvttbf162iubs 291(%r8,%rax,4), %zmm22 {%k7}
+# INTEL: vcvttbf162iubs zmm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
0x62,0xc5,0x7f,0x4f,0x6a,0xb4,0x80,0x23,0x01,0x00,0x00
-# ATT: vcvttnebf162iubs (%rip){1to32}, %zmm22
-# INTEL: vcvttnebf162iubs zmm22, word ptr [rip]{1to32}
+# ATT: vcvttbf162iubs (%rip){1to32}, %zmm22
+# INTEL: vcvttbf162iubs zmm22, word ptr [rip]{1to32}
0x62,0xe5,0x7f,0x58,0x6a,0x35,0x00,0x00,0x00,0x00
-# ATT: vcvttnebf162iubs -2048(,%rbp,2), %zmm22
-# INTEL: vcvttnebf162iubs zmm22, zmmword ptr [2*rbp - 2048]
+# ATT: vcvttbf162iubs -2048(,%rbp,2), %zmm22
+# INTEL: vcvttbf162iubs zmm22, zmmword ptr [2*rbp - 2048]
0x62,0xe5,0x7f,0x48,0x6a,0x34,0x6d,0x00,0xf8,0xff,0xff
-# ATT: vcvttnebf162iubs 8128(%rcx), %zmm22 {%k7} {z}
-# INTEL: vcvttnebf162iubs zmm22 {k7} {z}, zmmword ptr [rcx + 8128]
+# ATT: vcvttbf162iubs 8128(%rcx), %zmm22 {%k7} {z}
+# INTEL: vcvttbf162iubs zmm22 {k7} {z}, zmmword ptr [rcx + 8128]
0x62,0xe5,0x7f,0xcf,0x6a,0x71,0x7f
-# ATT: vcvttnebf162iubs -256(%rdx){1to32}, %zmm22 {%k7} {z}
-# INTEL: vcvttnebf162iubs zmm22 {k7} {z}, word ptr [rdx - 256]{1to32}
+# ATT: vcvttbf162iubs -256(%rdx){1to32}, %zmm22 {%k7} {z}
+# INTEL: vcvttbf162iubs zmm22 {k7} {z}, word ptr [rdx - 256]{1to32}
0x62,0xe5,0x7f,0xdf,0x6a,0x72,0x80
# ATT: vcvttph2ibs %xmm23, %xmm22
diff --git a/llvm/test/MC/X86/avx10.2satcvt-32-att.s b/llvm/test/MC/X86/avx10.2satcvt-32-att.s
index b69b850e876872..aa5519c14e59a7 100644
--- a/llvm/test/MC/X86/avx10.2satcvt-32-att.s
+++ b/llvm/test/MC/X86/avx10.2satcvt-32-att.s
@@ -1,220 +1,220 @@
// RUN: llvm-mc -triple i386 --show-encoding %s | FileCheck %s
-// CHECK: vcvtnebf162ibs %xmm3, %xmm2
+// CHECK: vcvtbf162ibs %xmm3, %xmm2
// CHECK: encoding: [0x62,0xf5,0x7f,0x08,0x69,0xd3]
- vcvtnebf162ibs %xmm3, %xmm2
+ vcvtbf162ibs %xmm3, %xmm2
-// CHECK: vcvtnebf162ibs %xmm3, %xmm2 {%k7}
+// CHECK: vcvtbf162ibs %xmm3, %xmm2 {%k7}
// CHECK: encoding: [0x62,0xf5,0x7f,0x0f,0x69,0xd3]
- vcvtnebf162ibs %xmm3, %xmm2 {%k7}
+ vcvtbf162ibs %xmm3, %xmm2 {%k7}
-// CHECK: vcvtnebf162ibs %xmm3, %xmm2 {%k7} {z}
+// CHECK: vcvtbf162ibs %xmm3, %xmm2 {%k7} {z}
// CHECK: encoding: [0x62,0xf5,0x7f,0x8f,0x69,0xd3]
- vcvtnebf162ibs %xmm3, %xmm2 {%k7} {z}
+ vcvtbf162ibs %xmm3, %xmm2 {%k7} {z}
-// CHECK: vcvtnebf162ibs %zmm3, %zmm2
+// CHECK: vcvtbf162ibs %zmm3, %zmm2
// CHECK: encoding: [0x62,0xf5,0x7f,0x48,0x69,0xd3]
- vcvtnebf162ibs %zmm3, %zmm2
+ vcvtbf162ibs %zmm3, %zmm2
-// CHECK: vcvtnebf162ibs %zmm3, %zmm2 {%k7}
+// CHECK: vcvtbf162ibs %zmm3, %zmm2 {%k7}
// CHECK: encoding: [0x62,0xf5,0x7f,0x4f,0x69,0xd3]
- vcvtnebf162ibs %zmm3, %zmm2 {%k7}
+ vcvtbf162ibs %zmm3, %zmm2 {%k7}
-// CHECK: vcvtnebf162ibs %zmm3, %zmm2 {%k7} {z}
+// CHECK: vcvtbf162ibs %zmm3, %zmm2 {%k7} {z}
// CHECK: encoding: [0x62,0xf5,0x7f,0xcf,0x69,0xd3]
- vcvtnebf162ibs %zmm3, %zmm2 {%k7} {z}
+ vcvtbf162ibs %zmm3, %zmm2 {%k7} {z}
-// CHECK: vcvtnebf162ibs %ymm3, %ymm2
+// CHECK: vcvtbf162ibs %ymm3, %ymm2
// CHECK: encoding: [0x62,0xf5,0x7f,0x28,0x69,0xd3]
- vcvtnebf162ibs %ymm3, %ymm2
+ vcvtbf162ibs %ymm3, %ymm2
-// CHECK: vcvtnebf162ibs %ymm3, %ymm2 {%k7}
+// CHECK: vcvtbf162ibs %ymm3, %ymm2 {%k7}
// CHECK: encoding: [0x62,0xf5,0x7f,0x2f,0x69,0xd3]
- vcvtnebf162ibs %ymm3, %ymm2 {%k7}
+ vcvtbf162ibs %ymm3, %ymm2 {%k7}
-// CHECK: vcvtnebf162ibs %ymm3, %ymm2 {%k7} {z}
+// CHECK: vcvtbf162ibs %ymm3, %ymm2 {%k7} {z}
// CHECK: encoding: [0x62,0xf5,0x7f,0xaf,0x69,0xd3]
- vcvtnebf162ibs %ymm3, %ymm2 {%k7} {z}
+ vcvtbf162ibs %ymm3, %ymm2 {%k7} {z}
-// CHECK: vcvtnebf162ibs 268435456(%esp,%esi,8), %xmm2
+// CHECK: vcvtbf162ibs 268435456(%esp,%esi,8), %xmm2
// CHECK: encoding: [0x62,0xf5,0x7f,0x08,0x69,0x94,0xf4,0x00,0x00,0x00,0x10]
- vcvtnebf162ibs 268435456(%esp,%esi,8), %xmm2
+ vcvtbf162ibs 268435456(%esp,%esi,8), %xmm2
-// CHECK: vcvtnebf162ibs 291(%edi,%eax,4), %xmm2 {%k7}
+// CHECK: vcvtbf162ibs 291(%edi,%eax,4), %xmm2 {%k7}
// CHECK: encoding: [0x62,0xf5,0x7f,0x0f,0x69,0x94,0x87,0x23,0x01,0x00,0x00]
- vcvtnebf162ibs 291(%edi,%eax,4), %xmm2 {%k7}
+ vcvtbf162ibs 291(%edi,%eax,4), %xmm2 {%k7}
-// CHECK: vcvtnebf162ibs (%eax){1to8}, %xmm2
+// CHECK: vcvtbf162ibs (%eax){1to8}, %xmm2
// CHECK: encoding: [0x62,0xf5,0x7f,0x18,0x69,0x10]
- vcvtnebf162ibs (%eax){1to8}, %xmm2
+ vcvtbf162ibs (%eax){1to8}, %xmm2
-// CHECK: vcvtnebf162ibs -512(,%ebp,2), %xmm2
+// CHECK: vcvtbf162ibs -512(,%ebp,2), %xmm2
// CHECK: encoding: [0x62,0xf5,0x7f,0x08,0x69,0x14,0x6d,0x00,0xfe,0xff,0xff]
- vcvtnebf162ibs -512(,%ebp,2), %xmm2
+ vcvtbf162ibs -512(,%ebp,2), %xmm2
-// CHECK: vcvtnebf162ibs 2032(%ecx), %xmm2 {%k7} {z}
+// CHECK: vcvtbf162ibs 2032(%ecx), %xmm2 {%k7} {z}
// CHECK: encoding: [0x62,0xf5,0x7f,0x8f,0x69,0x51,0x7f]
- vcvtnebf162ibs 2032(%ecx), %xmm2 {%k7} {z}
+ vcvtbf162ibs 2032(%ecx), %xmm2 {%k7} {z}
-// CHECK: vcvtnebf162ibs -256(%edx){1to8}, %xmm2 {%k7} {z}
+// CHECK: vcvtbf162ibs -256(%edx){1to8}, %xmm2 {%k7} {z}
// CHECK: encoding: [0x62,0xf5,0x7f,0x9f,0x69,0x52,0x80]
- vcvtnebf162ibs -256(%edx){1to8}, %xmm2 {%k7} {z}
+ vcvtbf162ibs -256(%edx){1to8}, %xmm2 {%k7} {z}
-// CHECK: vcvtnebf162ibs 268435456(%esp,%esi,8), %ymm2
+// CHECK: vcvtbf162ibs 268435456(%esp,%esi,8), %ymm2
// CHECK: encoding: [0x62,0xf5,0x7f,0x28,0x69,0x94,0xf4,0x00,0x00,0x00,0x10]
- vcvtnebf162ibs 268435456(%esp,%esi,8), %ymm2
+ vcvtbf162ibs 268435456(%esp,%esi,8), %ymm2
-// CHECK: vcvtnebf162ibs 291(%edi,%eax,4), %ymm2 {%k7}
+// CHECK: vcvtbf162ibs 291(%edi,%eax,4), %ymm2 {%k7}
// CHECK: encoding: [0x62,0xf5,0x7f,0x2f,0x69,0x94,0x87,0x23,0x01,0x00,0x00]
- vcvtnebf162ibs 291(%edi,%eax,4), %ymm2 {%k7}
+ vcvtbf162ibs 291(%edi,%eax,4), %ymm2 {%k7}
-// CHECK: vcvtnebf162ibs (%eax){1to16}, %ymm2
+// CHECK: vcvtbf162ibs (%eax){1to16}, %ymm2
// CHECK: encoding: [0x62,0xf5,0x7f,0x38,0x69,0x10]
- vcvtnebf162ibs (%eax){1to16}, %ymm2
+ vcvtbf162ibs (%eax){1to16}, %ymm2
-// CHECK: vcvtnebf162ibs -1024(,%ebp,2), %ymm2
+// CHECK: vcvtbf162ibs -1024(,%ebp,2), %ymm2
// CHECK: encoding: [0x62,0xf5,0x7f,0x28,0x69,0x14,0x6d,0x00,0xfc,0xff,0xff]
- vcvtnebf162ibs -1024(,%ebp,2), %ymm2
+ vcvtbf162ibs -1024(,%ebp,2), %ymm2
-// CHECK: vcvtnebf162ibs 4064(%ecx), %ymm2 {%k7} {z}
+// CHECK: vcvtbf162ibs 4064(%ecx), %ymm2 {%k7} {z}
// CHECK: encoding: [0x62,0xf5,0x7f,0xaf,0x69,0x51,0x7f]
- vcvtnebf162ibs 4064(%ecx), %ymm2 {%k7} {z}
+ vcvtbf162ibs 4064(%ecx), %ymm2 {%k7} {z}
-// CHECK: vcvtnebf162ibs -256(%edx){1to16}, %ymm2 {%k7} {z}
+// CHECK: vcvtbf162ibs -256(%edx){1to16}, %ymm2 {%k7} {z}
// CHECK: encoding: [0x62,0xf5,0x7f,0xbf,0x69,0x52,0x80]
- vcvtnebf162ibs -256(%edx){1to16}, %ymm2 {%k7} {z}
+ vcvtbf162ibs -256(%edx){1to16}, %ymm2 {%k7} {z}
-// CHECK: vcvtnebf162ibs 268435456(%esp,%esi,8), %zmm2
+// CHECK: vcvtbf162ibs 268435456(%esp,%esi,8), %zmm2
// CHECK: encoding: [0x62,0xf5,0x7f,0x48,0x69,0x94,0xf4,0x00,0x00,0x00,0x10]
- vcvtnebf162ibs 268435456(%esp,%esi,8), %zmm2
+ vcvtbf162ibs 268435456(%esp,%esi,8), %zmm2
-// CHECK: vcvtnebf162ibs 291(%edi,%eax,4), %zmm2 {%k7}
+// CHECK: vcvtbf162ibs 291(%edi,%eax,4), %zmm2 {%k7}
// CHECK: encoding: [0x62,0xf5,0x7f,0x4f,0x69,0x94,0x87,0x23,0x01,0x00,0x00]
- vcvtnebf162ibs 291(%edi,%eax,4), %zmm2 {%k7}
+ vcvtbf162ibs 291(%edi,%eax,4), %zmm2 {%k7}
-// CHECK: vcvtnebf162ibs (%eax){1to32}, %zmm2
+// CHECK: vcvtbf162ibs (%eax){1to32}, %zmm2
// CHECK: encoding: [0x62,0xf5,0x7f,0x58,0x69,0x10]
- vcvtnebf162ibs (%eax){1to32}, %zmm2
+ vcvtbf162ibs (%eax){1to32}, %zmm2
-// CHECK: vcvtnebf162ibs -2048(,%ebp,2), %zmm2
+// CHECK: vcvtbf162ibs -2048(,%ebp,2), %zmm2
// CHECK: encoding: [0x62,0xf5,0x7f,0x48,0x69,0x14,0x6d,0x00,0xf8,0xff,0xff]
- vcvtnebf162ibs -2048(,%ebp,2), %zmm2
+ vcvtbf162ibs -2048(,%ebp,2), %zmm2
-// CHECK: vcvtnebf162ibs 8128(%ecx), %zmm2 {%k7} {z}
+// CHECK: vcvtbf162ibs 8128(%ecx), %zmm2 {%k7} {z}
// CHECK: encoding: [0x62,0xf5,0x7f,0xcf,0x69,0x51,0x7f]
- vcvtnebf162ibs 8128(%ecx), %zmm2 {%k7} {z}
+ vcvtbf162ibs 8128(%ecx), %zmm2 {%k7} {z}
-// CHECK: vcvtnebf162ibs -256(%edx){1to32}, %zmm2 {%k7} {z}
+// CHECK: vcvtbf162ibs -256(%edx){1to32}, %zmm2 {%k7} {z}
// CHECK: encoding: [0x62,0xf5,0x7f,0xdf,0x69,0x52,0x80]
- vcvtnebf162ibs -256(%edx){1to32}, %zmm2 {%k7} {z}
+ vcvtbf162ibs -256(%edx){1to32}, %zmm2 {%k7} {z}
-// CHECK: vcvtnebf162iubs %xmm3, %xmm2
+// CHECK: vcvtbf162iubs %xmm3, %xmm2
// CHECK: encoding: [0x62,0xf5,0x7f,0x08,0x6b,0xd3]
- vcvtnebf162iubs %xmm3, %xmm2
+ vcvtbf162iubs %xmm3, %xmm2
-// CHECK: vcvtnebf162iubs %xmm3, %xmm2 {%k7}
+// CHECK: vcvtbf162iubs %xmm3, %xmm2 {%k7}
// CHECK: encoding: [0x62,0xf5,0x7f,0x0f,0x6b,0xd3]
- vcvtnebf162iubs %xmm3, %xmm2 {%k7}
+ vcvtbf162iubs %xmm3, %xmm2 {%k7}
-// CHECK: vcvtnebf162iubs %xmm3, %xmm2 {%k7} {z}
+// CHECK: vcvtbf162iubs %xmm3, %xmm2 {%k7} {z}
// CHECK: encoding: [0x62,0xf5,0x7f,0x8f,0x6b,0xd3]
- vcvtnebf162iubs %xmm3, %xmm2 {%k7} {z}
+ vcvtbf162iubs %xmm3, %xmm2 {%k7} {z}
-// CHECK: vcvtnebf162iubs %zmm3, %zmm2
+// CHECK: vcvtbf162iubs %zmm3, %zmm2
// CHECK: encoding: [0x62,0xf5,0x7f,0x48,0x6b,0xd3]
- vcvtnebf162iubs %zmm3, %zmm2
+ vcvtbf162iubs %zmm3, %zmm2
-// CHECK: vcvtnebf162iubs %zmm3, %zmm2 {%k7}
+// CHECK: vcvtbf162iubs %zmm3, %zmm2 {%k7}
// CHECK: encoding: [0x62,0xf5,0x7f,0x4f,0x6b,0xd3]
- vcvtnebf162iubs %zmm3, %zmm2 {%k7}
+ vcvtbf162iubs %zmm3, %zmm2 {%k7}
-// CHECK: vcvtnebf162iubs %zmm3, %zmm2 {%k7} {z}
+// CHECK: vcvtbf162iubs %zmm3, %zmm2 {%k7} {z}
// CHECK: encoding: [0x62,0xf5,0x7f,0xcf,0x6b,0xd3]
- vcvtnebf162iubs %zmm3, %zmm2 {%k7} {z}
+ vcvtbf162iubs %zmm3, %zmm2 {%k7} {z}
-// CHECK: vcvtnebf162iubs %ymm3, %ymm2
+// CHECK: vcvtbf162iubs %ymm3, %ymm2
// CHECK: encoding: [0x62,0xf5,0x7f,0x28,0x6b,0xd3]
- vcvtnebf162iubs %ymm3, %ymm2
+ vcvtbf162iubs %ymm3, %ymm2
-// CHECK: vcvtnebf162iubs %ymm3, %ymm2 {%k7}
+// CHECK: vcvtbf162iubs %ymm3, %ymm2 {%k7}
// CHECK: encoding: [0x62,0xf5,0x7f,0x2f,0x6b,0xd3]
- vcvtnebf162iubs %ymm3, %ymm2 {%k7}
+ vcvtbf162iubs %ymm3, %ymm2 {%k7}
-// CHECK: vcvtnebf162iubs %ymm3, %ymm2 {%k7} {z}
+// CHECK: vcvtbf162iubs %ymm3, %ymm2 {%k7} {z}
// CHECK: encoding: [0x62,0xf5,0x7f,0xaf,0x6b,0xd3]
- vcvtnebf162iubs %ymm3, %ymm2 {%k7} {z}
+ vcvtbf162iubs %ymm3, %ymm2 {%k7} {z}
-// CHECK: vcvtnebf162iubs 268435456(%esp,%esi,8), %xmm2
+// CHECK: vcvtbf162iubs 268435456(%esp,%esi,8), %xmm2
// CHECK: encoding: [0x62,0xf5,0x7f,0x08,0x6b,0x94,0xf4,0x00,0x00,0x00,0x10]
- vcvtnebf162iubs 268435456(%esp,%esi,8), %xmm2
+ vcvtbf162iubs 268435456(%esp,%esi,8), %xmm2
-// CHECK: vcvtnebf162iubs 291(%edi,%eax,4), %xmm2 {%k7}
+// CHECK: vcvtbf162iubs 291(%edi,%eax,4), %xmm2 {%k7}
// CHECK: encoding: [0x62,0xf5,0x7f,0x0f,0x6b,0x94,0x87,0x23,0x01,0x00,0x00]
- vcvtnebf162iubs 291(%edi,%eax,4), %xmm2 {%k7}
+ vcvtbf162iubs 291(%edi,%eax,4), %xmm2 {%k7}
-// CHECK: vcvtnebf162iubs (%eax){1to8}, %xmm2
+// CHECK: vcvtbf162iubs (%eax){1to8}, %xmm2
// CHECK: encoding: [0x62,0xf5,0x7f,0x18,0x6b,0x10]
- vcvtnebf162iubs (%eax){1to8}, %xmm2
+ vcvtbf162iubs (%eax){1to8}, %xmm2
-// CHECK: vcvtnebf162iubs -512(,%ebp,2), %xmm2
+// CHECK: vcvtbf162iubs -512(,%ebp,2), %xmm2
// CHECK: encoding: [0x62,0xf5,0x7f,0x08,0x6b,0x14,0x6d,0x00,0xfe,0xff,0xff]
- vcvtnebf162iubs -512(,%ebp,2), %xmm2
+ vcvtbf162iubs -512(,%ebp,2), %xmm2
-// CHECK: vcvtnebf162iubs 2032(%ecx), %xmm2 {%k7} {z}
+// CHECK: vcvtbf162iubs 2032(%ecx), %xmm2 {%k7} {z}
// CHECK: encoding: [0x62,0xf5,0x7f,0x8f,0x6b,0x51,0x7f]
- vcvtnebf162iubs 2032(%ecx), %xmm2 {%k7} {z}
+ vcvtbf162iubs 2032(%ecx), %xmm2 {%k7} {z}
-// CHECK: vcvtnebf162iubs -256(%edx){1to8}, %xmm2 {%k7} {z}
+// CHECK: vcvtbf162iubs -256(%edx){1to8}, %xmm2 {%k7} {z}
// CHECK: encoding: [0x62,0xf5,0x7f,0x9f,0x6b,0x52,0x80]
- vcvtnebf162iubs -256(%edx){1to8}, %xmm2 {%k7} {z}
+ vcvtbf162iubs -256(%edx){1to8}, %xmm2 {%k7} {z}
-// CHECK: vcvtnebf162iubs 268435456(%esp,%esi,8), %ymm2
+// CHECK: vcvtbf162iubs 268435456(%esp,%esi,8), %ymm2
// CHECK: encoding: [0x62,0xf5,0x7f,0x28,0x6b,0x94,0xf4,0x00,0x00,0x00,0x10]
- vcvtnebf162iubs 268435456(%esp,%esi,8), %ymm2
+ vcvtbf162iubs 268435456(%esp,%esi,8), %ymm2
-// CHECK: vcvtnebf162iubs 291(%edi,%eax,4), %ymm2 {%k7}
+// CHECK: vcvtbf162iubs 291(%edi,%eax,4), %ymm2 {%k7}
// CHECK: encoding: [0x62,0xf5,0x7f,0x2f,0x6b,0x94,0x87,0x23,0x01,0x00,0x00]
- vcvtnebf162iubs 291(%edi,%eax,4), %ymm2 {%k7}
+ vcvtbf162iubs 291(%edi,%eax,4), %ymm2 {%k7}
-// CHECK: vcvtnebf162iubs (%eax){1to16}, %ymm2
+// CHECK: vcvtbf162iubs (%eax){1to16}, %ymm2
// CHECK: encoding: [0x62,0xf5,0x7f,0x38,0x6b,0x10]
- vcvtnebf162iubs (%eax){1to16}, %ymm2
+ vcvtbf162iubs (%eax){1to16}, %ymm2
-// CHECK: vcvtnebf162iubs -1024(,%ebp,2), %ymm2
+// CHECK: vcvtbf162iubs -1024(,%ebp,2), %ymm2
// CHECK: encoding: [0x62,0xf5,0x7f,0x28,0x6b,0x14,0x6d,0x00,0xfc,0xff,0xff]
- vcvtnebf162iubs -1024(,%ebp,2), %ymm2
+ vcvtbf162iubs -1024(,%ebp,2), %ymm2
-// CHECK: vcvtnebf162iubs 4064(%ecx), %ymm2 {%k7} {z}
+// CHECK: vcvtbf162iubs 4064(%ecx), %ymm2 {%k7} {z}
// CHECK: encoding: [0x62,0xf5,0x7f,0xaf,0x6b,0x51,0x7f]
- vcvtnebf162iubs 4064(%ecx), %ymm2 {%k7} {z}
+ vcvtbf162iubs 4064(%ecx), %ymm2 {%k7} {z}
-// CHECK: vcvtnebf162iubs -256(%edx){1to16}, %ymm2 {%k7} {z}
+// CHECK: vcvtbf162iubs -256(%edx){1to16}, %ymm2 {%k7} {z}
// CHECK: encoding: [0x62,0xf5,0x7f,0xbf,0x6b,0x52,0x80]
- vcvtnebf162iubs -256(%edx){1to16}, %ymm2 {%k7} {z}
+ vcvtbf162iubs -256(%edx){1to16}, %ymm2 {%k7} {z}
-// CHECK: vcvtnebf162iubs 268435456(%esp,%esi,8), %zmm2
+// CHECK: vcvtbf162iubs 268435456(%esp,%esi,8), %zmm2
// CHECK: encoding: [0x62,0xf5,0x7f,0x48,0x6b,0x94,0xf4,0x00,0x00,0x00,0x10]
- vcvtnebf162iubs 268435456(%esp,%esi,8), %zmm2
+ vcvtbf162iubs 268435456(%esp,%esi,8), %zmm2
-// CHECK: vcvtnebf162iubs 291(%edi,%eax,4), %zmm2 {%k7}
+// CHECK: vcvtbf162iubs 291(%edi,%eax,4), %zmm2 {%k7}
// CHECK: encoding: [0x62,0xf5,0x7f,0x4f,0x6b,0x94,0x87,0x23,0x01,0x00,0x00]
- vcvtnebf162iubs 291(%edi,%eax,4), %zmm2 {%k7}
+ vcvtbf162iubs 291(%edi,%eax,4), %zmm2 {%k7}
-// CHECK: vcvtnebf162iubs (%eax){1to32}, %zmm2
+// CHECK: vcvtbf162iubs (%eax){1to32}, %zmm2
// CHECK: encoding: [0x62,0xf5,0x7f,0x58,0x6b,0x10]
- vcvtnebf162iubs (%eax){1to32}, %zmm2
+ vcvtbf162iubs (%eax){1to32}, %zmm2
-// CHECK: vcvtnebf162iubs -2048(,%ebp,2), %zmm2
+// CHECK: vcvtbf162iubs -2048(,%ebp,2), %zmm2
// CHECK: encoding: [0x62,0xf5,0x7f,0x48,0x6b,0x14,0x6d,0x00,0xf8,0xff,0xff]
- vcvtnebf162iubs -2048(,%ebp,2), %zmm2
+ vcvtbf162iubs -2048(,%ebp,2), %zmm2
-// CHECK: vcvtnebf162iubs 8128(%ecx), %zmm2 {%k7} {z}
+// CHECK: vcvtbf162iubs 8128(%ecx), %zmm2 {%k7} {z}
// CHECK: encoding: [0x62,0xf5,0x7f,0xcf,0x6b,0x51,0x7f]
- vcvtnebf162iubs 8128(%ecx), %zmm2 {%k7} {z}
+ vcvtbf162iubs 8128(%ecx), %zmm2 {%k7} {z}
-// CHECK: vcvtnebf162iubs -256(%edx){1to32}, %zmm2 {%k7} {z}
+// CHECK: vcvtbf162iubs -256(%edx){1to32}, %zmm2 {%k7} {z}
// CHECK: encoding: [0x62,0xf5,0x7f,0xdf,0x6b,0x52,0x80]
- vcvtnebf162iubs -256(%edx){1to32}, %zmm2 {%k7} {z}
+ vcvtbf162iubs -256(%edx){1to32}, %zmm2 {%k7} {z}
// CHECK: vcvtph2ibs %xmm3, %xmm2
// CHECK: encoding: [0x62,0xf5,0x7c,0x08,0x69,0xd3]
@@ -680,221 +680,221 @@
// CHECK: encoding: [0x62,0xf5,0x7d,0xdf,0x6b,0x52,0x80]
vcvtps2iubs -512(%edx){1to16}, %zmm2 {%k7} {z}
-// CHECK: vcvttnebf162ibs %xmm3, %xmm2
+// CHECK: vcvttbf162ibs %xmm3, %xmm2
// CHECK: encoding: [0x62,0xf5,0x7f,0x08,0x68,0xd3]
- vcvttnebf162ibs %xmm3, %xmm2
+ vcvttbf162ibs %xmm3, %xmm2
-// CHECK: vcvttnebf162ibs %xmm3, %xmm2 {%k7}
+// CHECK: vcvttbf162ibs %xmm3, %xmm2 {%k7}
// CHECK: encoding: [0x62,0xf5,0x7f,0x0f,0x68,0xd3]
- vcvttnebf162ibs %xmm3, %xmm2 {%k7}
+ vcvttbf162ibs %xmm3, %xmm2 {%k7}
-// CHECK: vcvttnebf162ibs %xmm3, %xmm2 {%k7} {z}
+// CHECK: vcvttbf162ibs %xmm3, %xmm2 {%k7} {z}
// CHECK: encoding: [0x62,0xf5,0x7f,0x8f,0x68,0xd3]
- vcvttnebf162ibs %xmm3, %xmm2 {%k7} {z}
+ vcvttbf162ibs %xmm3, %xmm2 {%k7} {z}
-// CHECK: vcvttnebf162ibs %zmm3, %zmm2
+// CHECK: vcvttbf162ibs %zmm3, %zmm2
// CHECK: encoding: [0x62,0xf5,0x7f,0x48,0x68,0xd3]
- vcvttnebf162ibs %zmm3, %zmm2
+ vcvttbf162ibs %zmm3, %zmm2
-// CHECK: vcvttnebf162ibs %zmm3, %zmm2 {%k7}
+// CHECK: vcvttbf162ibs %zmm3, %zmm2 {%k7}
// CHECK: encoding: [0x62,0xf5,0x7f,0x4f,0x68,0xd3]
- vcvttnebf162ibs %zmm3, %zmm2 {%k7}
+ vcvttbf162ibs %zmm3, %zmm2 {%k7}
-// CHECK: vcvttnebf162ibs %zmm3, %zmm2 {%k7} {z}
+// CHECK: vcvttbf162ibs %zmm3, %zmm2 {%k7} {z}
// CHECK: encoding: [0x62,0xf5,0x7f,0xcf,0x68,0xd3]
- vcvttnebf162ibs %zmm3, %zmm2 {%k7} {z}
+ vcvttbf162ibs %zmm3, %zmm2 {%k7} {z}
-// CHECK: vcvttnebf162ibs %ymm3, %ymm2
+// CHECK: vcvttbf162ibs %ymm3, %ymm2
// CHECK: encoding: [0x62,0xf5,0x7f,0x28,0x68,0xd3]
- vcvttnebf162ibs %ymm3, %ymm2
+ vcvttbf162ibs %ymm3, %ymm2
-// CHECK: vcvttnebf162ibs %ymm3, %ymm2 {%k7}
+// CHECK: vcvttbf162ibs %ymm3, %ymm2 {%k7}
// CHECK: encoding: [0x62,0xf5,0x7f,0x2f,0x68,0xd3]
- vcvttnebf162ibs %ymm3, %ymm2 {%k7}
+ vcvttbf162ibs %ymm3, %ymm2 {%k7}
-// CHECK: vcvttnebf162ibs %ymm3, %ymm2 {%k7} {z}
+// CHECK: vcvttbf162ibs %ymm3, %ymm2 {%k7} {z}
// CHECK: encoding: [0x62,0xf5,0x7f,0xaf,0x68,0xd3]
- vcvttnebf162ibs %ymm3, %ymm2 {%k7} {z}
+ vcvttbf162ibs %ymm3, %ymm2 {%k7} {z}
-// CHECK: vcvttnebf162ibs 268435456(%esp,%esi,8), %xmm2
+// CHECK: vcvttbf162ibs 268435456(%esp,%esi,8), %xmm2
// CHECK: encoding: [0x62,0xf5,0x7f,0x08,0x68,0x94,0xf4,0x00,0x00,0x00,0x10]
- vcvttnebf162ibs 268435456(%esp,%esi,8), %xmm2
+ vcvttbf162ibs 268435456(%esp,%esi,8), %xmm2
-// CHECK: vcvttnebf162ibs 291(%edi,%eax,4), %xmm2 {%k7}
+// CHECK: vcvttbf162ibs 291(%edi,%eax,4), %xmm2 {%k7}
// CHECK: encoding: [0x62,0xf5,0x7f,0x0f,0x68,0x94,0x87,0x23,0x01,0x00,0x00]
- vcvttnebf162ibs 291(%edi,%eax,4), %xmm2 {%k7}
+ vcvttbf162ibs 291(%edi,%eax,4), %xmm2 {%k7}
-// CHECK: vcvttnebf162ibs (%eax){1to8}, %xmm2
+// CHECK: vcvttbf162ibs (%eax){1to8}, %xmm2
// CHECK: encoding: [0x62,0xf5,0x7f,0x18,0x68,0x10]
- vcvttnebf162ibs (%eax){1to8}, %xmm2
+ vcvttbf162ibs (%eax){1to8}, %xmm2
-// CHECK: vcvttnebf162ibs -512(,%ebp,2), %xmm2
+// CHECK: vcvttbf162ibs -512(,%ebp,2), %xmm2
// CHECK: encoding: [0x62,0xf5,0x7f,0x08,0x68,0x14,0x6d,0x00,0xfe,0xff,0xff]
- vcvttnebf162ibs -512(,%ebp,2), %xmm2
+ vcvttbf162ibs -512(,%ebp,2), %xmm2
-// CHECK: vcvttnebf162ibs 2032(%ecx), %xmm2 {%k7} {z}
+// CHECK: vcvttbf162ibs 2032(%ecx), %xmm2 {%k7} {z}
// CHECK: encoding: [0x62,0xf5,0x7f,0x8f,0x68,0x51,0x7f]
- vcvttnebf162ibs 2032(%ecx), %xmm2 {%k7} {z}
+ vcvttbf162ibs 2032(%ecx), %xmm2 {%k7} {z}
-// CHECK: vcvttnebf162ibs -256(%edx){1to8}, %xmm2 {%k7} {z}
+// CHECK: vcvttbf162ibs -256(%edx){1to8}, %xmm2 {%k7} {z}
// CHECK: encoding: [0x62,0xf5,0x7f,0x9f,0x68,0x52,0x80]
- vcvttnebf162ibs -256(%edx){1to8}, %xmm2 {%k7} {z}
+ vcvttbf162ibs -256(%edx){1to8}, %xmm2 {%k7} {z}
-// CHECK: vcvttnebf162ibs 268435456(%esp,%esi,8), %ymm2
+// CHECK: vcvttbf162ibs 268435456(%esp,%esi,8), %ymm2
// CHECK: encoding: [0x62,0xf5,0x7f,0x28,0x68,0x94,0xf4,0x00,0x00,0x00,0x10]
- vcvttnebf162ibs 268435456(%esp,%esi,8), %ymm2
+ vcvttbf162ibs 268435456(%esp,%esi,8), %ymm2
-// CHECK: vcvttnebf162ibs 291(%edi,%eax,4), %ymm2 {%k7}
+// CHECK: vcvttbf162ibs 291(%edi,%eax,4), %ymm2 {%k7}
// CHECK: encoding: [0x62,0xf5,0x7f,0x2f,0x68,0x94,0x87,0x23,0x01,0x00,0x00]
- vcvttnebf162ibs 291(%edi,%eax,4), %ymm2 {%k7}
+ vcvttbf162ibs 291(%edi,%eax,4), %ymm2 {%k7}
-// CHECK: vcvttnebf162ibs (%eax){1to16}, %ymm2
+// CHECK: vcvttbf162ibs (%eax){1to16}, %ymm2
// CHECK: encoding: [0x62,0xf5,0x7f,0x38,0x68,0x10]
- vcvttnebf162ibs (%eax){1to16}, %ymm2
+ vcvttbf162ibs (%eax){1to16}, %ymm2
-// CHECK: vcvttnebf162ibs -1024(,%ebp,2), %ymm2
+// CHECK: vcvttbf162ibs -1024(,%ebp,2), %ymm2
// CHECK: encoding: [0x62,0xf5,0x7f,0x28,0x68,0x14,0x6d,0x00,0xfc,0xff,0xff]
- vcvttnebf162ibs -1024(,%ebp,2), %ymm2
+ vcvttbf162ibs -1024(,%ebp,2), %ymm2
-// CHECK: vcvttnebf162ibs 4064(%ecx), %ymm2 {%k7} {z}
+// CHECK: vcvttbf162ibs 4064(%ecx), %ymm2 {%k7} {z}
// CHECK: encoding: [0x62,0xf5,0x7f,0xaf,0x68,0x51,0x7f]
- vcvttnebf162ibs 4064(%ecx), %ymm2 {%k7} {z}
+ vcvttbf162ibs 4064(%ecx), %ymm2 {%k7} {z}
-// CHECK: vcvttnebf162ibs -256(%edx){1to16}, %ymm2 {%k7} {z}
+// CHECK: vcvttbf162ibs -256(%edx){1to16}, %ymm2 {%k7} {z}
// CHECK: encoding: [0x62,0xf5,0x7f,0xbf,0x68,0x52,0x80]
- vcvttnebf162ibs -256(%edx){1to16}, %ymm2 {%k7} {z}
+ vcvttbf162ibs -256(%edx){1to16}, %ymm2 {%k7} {z}
-// CHECK: vcvttnebf162ibs 268435456(%esp,%esi,8), %zmm2
+// CHECK: vcvttbf162ibs 268435456(%esp,%esi,8), %zmm2
// CHECK: encoding: [0x62,0xf5,0x7f,0x48,0x68,0x94,0xf4,0x00,0x00,0x00,0x10]
- vcvttnebf162ibs 268435456(%esp,%esi,8), %zmm2
+ vcvttbf162ibs 268435456(%esp,%esi,8), %zmm2
-// CHECK: vcvttnebf162ibs 291(%edi,%eax,4), %zmm2 {%k7}
+// CHECK: vcvttbf162ibs 291(%edi,%eax,4), %zmm2 {%k7}
// CHECK: encoding: [0x62,0xf5,0x7f,0x4f,0x68,0x94,0x87,0x23,0x01,0x00,0x00]
- vcvttnebf162ibs 291(%edi,%eax,4), %zmm2 {%k7}
+ vcvttbf162ibs 291(%edi,%eax,4), %zmm2 {%k7}
-// CHECK: vcvttnebf162ibs (%eax){1to32}, %zmm2
+// CHECK: vcvttbf162ibs (%eax){1to32}, %zmm2
// CHECK: encoding: [0x62,0xf5,0x7f,0x58,0x68,0x10]
- vcvttnebf162ibs (%eax){1to32}, %zmm2
+ vcvttbf162ibs (%eax){1to32}, %zmm2
-// CHECK: vcvttnebf162ibs -2048(,%ebp,2), %zmm2
+// CHECK: vcvttbf162ibs -2048(,%ebp,2), %zmm2
// CHECK: encoding: [0x62,0xf5,0x7f,0x48,0x68,0x14,0x6d,0x00,0xf8,0xff,0xff]
- vcvttnebf162ibs -2048(,%ebp,2), %zmm2
+ vcvttbf162ibs -2048(,%ebp,2), %zmm2
-// CHECK: vcvttnebf162ibs 8128(%ecx), %zmm2 {%k7} {z}
+// CHECK: vcvttbf162ibs 8128(%ecx), %zmm2 {%k7} {z}
// CHECK: encoding: [0x62,0xf5,0x7f,0xcf,0x68,0x51,0x7f]
- vcvttnebf162ibs 8128(%ecx), %zmm2 {%k7} {z}
+ vcvttbf162ibs 8128(%ecx), %zmm2 {%k7} {z}
-// CHECK: vcvttnebf162ibs -256(%edx){1to32}, %zmm2 {%k7} {z}
+// CHECK: vcvttbf162ibs -256(%edx){1to32}, %zmm2 {%k7} {z}
// CHECK: encoding: [0x62,0xf5,0x7f,0xdf,0x68,0x52,0x80]
- vcvttnebf162ibs -256(%edx){1to32}, %zmm2 {%k7} {z}
+ vcvttbf162ibs -256(%edx){1to32}, %zmm2 {%k7} {z}
-// CHECK: vcvttnebf162iubs %xmm3, %xmm2
+// CHECK: vcvttbf162iubs %xmm3, %xmm2
// CHECK: encoding: [0x62,0xf5,0x7f,0x08,0x6a,0xd3]
- vcvttnebf162iubs %xmm3, %xmm2
+ vcvttbf162iubs %xmm3, %xmm2
-// CHECK: vcvttnebf162iubs %xmm3, %xmm2 {%k7}
+// CHECK: vcvttbf162iubs %xmm3, %xmm2 {%k7}
// CHECK: encoding: [0x62,0xf5,0x7f,0x0f,0x6a,0xd3]
- vcvttnebf162iubs %xmm3, %xmm2 {%k7}
+ vcvttbf162iubs %xmm3, %xmm2 {%k7}
-// CHECK: vcvttnebf162iubs %xmm3, %xmm2 {%k7} {z}
+// CHECK: vcvttbf162iubs %xmm3, %xmm2 {%k7} {z}
// CHECK: encoding: [0x62,0xf5,0x7f,0x8f,0x6a,0xd3]
- vcvttnebf162iubs %xmm3, %xmm2 {%k7} {z}
+ vcvttbf162iubs %xmm3, %xmm2 {%k7} {z}
-// CHECK: vcvttnebf162iubs %zmm3, %zmm2
+// CHECK: vcvttbf162iubs %zmm3, %zmm2
// CHECK: encoding: [0x62,0xf5,0x7f,0x48,0x6a,0xd3]
- vcvttnebf162iubs %zmm3, %zmm2
+ vcvttbf162iubs %zmm3, %zmm2
-// CHECK: vcvttnebf162iubs %zmm3, %zmm2 {%k7}
+// CHECK: vcvttbf162iubs %zmm3, %zmm2 {%k7}
// CHECK: encoding: [0x62,0xf5,0x7f,0x4f,0x6a,0xd3]
- vcvttnebf162iubs %zmm3, %zmm2 {%k7}
+ vcvttbf162iubs %zmm3, %zmm2 {%k7}
-// CHECK: vcvttnebf162iubs %zmm3, %zmm2 {%k7} {z}
+// CHECK: vcvttbf162iubs %zmm3, %zmm2 {%k7} {z}
// CHECK: encoding: [0x62,0xf5,0x7f,0xcf,0x6a,0xd3]
- vcvttnebf162iubs %zmm3, %zmm2 {%k7} {z}
+ vcvttbf162iubs %zmm3, %zmm2 {%k7} {z}
-// CHECK: vcvttnebf162iubs %ymm3, %ymm2
+// CHECK: vcvttbf162iubs %ymm3, %ymm2
// CHECK: encoding: [0x62,0xf5,0x7f,0x28,0x6a,0xd3]
- vcvttnebf162iubs %ymm3, %ymm2
+ vcvttbf162iubs %ymm3, %ymm2
-// CHECK: vcvttnebf162iubs %ymm3, %ymm2 {%k7}
+// CHECK: vcvttbf162iubs %ymm3, %ymm2 {%k7}
// CHECK: encoding: [0x62,0xf5,0x7f,0x2f,0x6a,0xd3]
- vcvttnebf162iubs %ymm3, %ymm2 {%k7}
+ vcvttbf162iubs %ymm3, %ymm2 {%k7}
-// CHECK: vcvttnebf162iubs %ymm3, %ymm2 {%k7} {z}
+// CHECK: vcvttbf162iubs %ymm3, %ymm2 {%k7} {z}
// CHECK: encoding: [0x62,0xf5,0x7f,0xaf,0x6a,0xd3]
- vcvttnebf162iubs %ymm3, %ymm2 {%k7} {z}
+ vcvttbf162iubs %ymm3, %ymm2 {%k7} {z}
-// CHECK: vcvttnebf162iubs 268435456(%esp,%esi,8), %xmm2
+// CHECK: vcvttbf162iubs 268435456(%esp,%esi,8), %xmm2
// CHECK: encoding: [0x62,0xf5,0x7f,0x08,0x6a,0x94,0xf4,0x00,0x00,0x00,0x10]
- vcvttnebf162iubs 268435456(%esp,%esi,8), %xmm2
+ vcvttbf162iubs 268435456(%esp,%esi,8), %xmm2
-// CHECK: vcvttnebf162iubs 291(%edi,%eax,4), %xmm2 {%k7}
+// CHECK: vcvttbf162iubs 291(%edi,%eax,4), %xmm2 {%k7}
// CHECK: encoding: [0x62,0xf5,0x7f,0x0f,0x6a,0x94,0x87,0x23,0x01,0x00,0x00]
- vcvttnebf162iubs 291(%edi,%eax,4), %xmm2 {%k7}
+ vcvttbf162iubs 291(%edi,%eax,4), %xmm2 {%k7}
-// CHECK: vcvttnebf162iubs (%eax){1to8}, %xmm2
+// CHECK: vcvttbf162iubs (%eax){1to8}, %xmm2
// CHECK: encoding: [0x62,0xf5,0x7f,0x18,0x6a,0x10]
- vcvttnebf162iubs (%eax){1to8}, %xmm2
+ vcvttbf162iubs (%eax){1to8}, %xmm2
-// CHECK: vcvttnebf162iubs -512(,%ebp,2), %xmm2
+// CHECK: vcvttbf162iubs -512(,%ebp,2), %xmm2
// CHECK: encoding: [0x62,0xf5,0x7f,0x08,0x6a,0x14,0x6d,0x00,0xfe,0xff,0xff]
- vcvttnebf162iubs -512(,%ebp,2), %xmm2
+ vcvttbf162iubs -512(,%ebp,2), %xmm2
-// CHECK: vcvttnebf162iubs 2032(%ecx), %xmm2 {%k7} {z}
+// CHECK: vcvttbf162iubs 2032(%ecx), %xmm2 {%k7} {z}
// CHECK: encoding: [0x62,0xf5,0x7f,0x8f,0x6a,0x51,0x7f]
- vcvttnebf162iubs 2032(%ecx), %xmm2 {%k7} {z}
+ vcvttbf162iubs 2032(%ecx), %xmm2 {%k7} {z}
-// CHECK: vcvttnebf162iubs -256(%edx){1to8}, %xmm2 {%k7} {z}
+// CHECK: vcvttbf162iubs -256(%edx){1to8}, %xmm2 {%k7} {z}
// CHECK: encoding: [0x62,0xf5,0x7f,0x9f,0x6a,0x52,0x80]
- vcvttnebf162iubs -256(%edx){1to8}, %xmm2 {%k7} {z}
+ vcvttbf162iubs -256(%edx){1to8}, %xmm2 {%k7} {z}
-// CHECK: vcvttnebf162iubs 268435456(%esp,%esi,8), %ymm2
+// CHECK: vcvttbf162iubs 268435456(%esp,%esi,8), %ymm2
// CHECK: encoding: [0x62,0xf5,0x7f,0x28,0x6a,0x94,0xf4,0x00,0x00,0x00,0x10]
- vcvttnebf162iubs 268435456(%esp,%esi,8), %ymm2
+ vcvttbf162iubs 268435456(%esp,%esi,8), %ymm2
-// CHECK: vcvttnebf162iubs 291(%edi,%eax,4), %ymm2 {%k7}
+// CHECK: vcvttbf162iubs 291(%edi,%eax,4), %ymm2 {%k7}
// CHECK: encoding: [0x62,0xf5,0x7f,0x2f,0x6a,0x94,0x87,0x23,0x01,0x00,0x00]
- vcvttnebf162iubs 291(%edi,%eax,4), %ymm2 {%k7}
+ vcvttbf162iubs 291(%edi,%eax,4), %ymm2 {%k7}
-// CHECK: vcvttnebf162iubs (%eax){1to16}, %ymm2
+// CHECK: vcvttbf162iubs (%eax){1to16}, %ymm2
// CHECK: encoding: [0x62,0xf5,0x7f,0x38,0x6a,0x10]
- vcvttnebf162iubs (%eax){1to16}, %ymm2
+ vcvttbf162iubs (%eax){1to16}, %ymm2
-// CHECK: vcvttnebf162iubs -1024(,%ebp,2), %ymm2
+// CHECK: vcvttbf162iubs -1024(,%ebp,2), %ymm2
// CHECK: encoding: [0x62,0xf5,0x7f,0x28,0x6a,0x14,0x6d,0x00,0xfc,0xff,0xff]
- vcvttnebf162iubs -1024(,%ebp,2), %ymm2
+ vcvttbf162iubs -1024(,%ebp,2), %ymm2
-// CHECK: vcvttnebf162iubs 4064(%ecx), %ymm2 {%k7} {z}
+// CHECK: vcvttbf162iubs 4064(%ecx), %ymm2 {%k7} {z}
// CHECK: encoding: [0x62,0xf5,0x7f,0xaf,0x6a,0x51,0x7f]
- vcvttnebf162iubs 4064(%ecx), %ymm2 {%k7} {z}
+ vcvttbf162iubs 4064(%ecx), %ymm2 {%k7} {z}
-// CHECK: vcvttnebf162iubs -256(%edx){1to16}, %ymm2 {%k7} {z}
+// CHECK: vcvttbf162iubs -256(%edx){1to16}, %ymm2 {%k7} {z}
// CHECK: encoding: [0x62,0xf5,0x7f,0xbf,0x6a,0x52,0x80]
- vcvttnebf162iubs -256(%edx){1to16}, %ymm2 {%k7} {z}
+ vcvttbf162iubs -256(%edx){1to16}, %ymm2 {%k7} {z}
-// CHECK: vcvttnebf162iubs 268435456(%esp,%esi,8), %zmm2
+// CHECK: vcvttbf162iubs 268435456(%esp,%esi,8), %zmm2
// CHECK: encoding: [0x62,0xf5,0x7f,0x48,0x6a,0x94,0xf4,0x00,0x00,0x00,0x10]
- vcvttnebf162iubs 268435456(%esp,%esi,8), %zmm2
+ vcvttbf162iubs 268435456(%esp,%esi,8), %zmm2
-// CHECK: vcvttnebf162iubs 291(%edi,%eax,4), %zmm2 {%k7}
+// CHECK: vcvttbf162iubs 291(%edi,%eax,4), %zmm2 {%k7}
// CHECK: encoding: [0x62,0xf5,0x7f,0x4f,0x6a,0x94,0x87,0x23,0x01,0x00,0x00]
- vcvttnebf162iubs 291(%edi,%eax,4), %zmm2 {%k7}
+ vcvttbf162iubs 291(%edi,%eax,4), %zmm2 {%k7}
-// CHECK: vcvttnebf162iubs (%eax){1to32}, %zmm2
+// CHECK: vcvttbf162iubs (%eax){1to32}, %zmm2
// CHECK: encoding: [0x62,0xf5,0x7f,0x58,0x6a,0x10]
- vcvttnebf162iubs (%eax){1to32}, %zmm2
+ vcvttbf162iubs (%eax){1to32}, %zmm2
-// CHECK: vcvttnebf162iubs -2048(,%ebp,2), %zmm2
+// CHECK: vcvttbf162iubs -2048(,%ebp,2), %zmm2
// CHECK: encoding: [0x62,0xf5,0x7f,0x48,0x6a,0x14,0x6d,0x00,0xf8,0xff,0xff]
- vcvttnebf162iubs -2048(,%ebp,2), %zmm2
+ vcvttbf162iubs -2048(,%ebp,2), %zmm2
-// CHECK: vcvttnebf162iubs 8128(%ecx), %zmm2 {%k7} {z}
+// CHECK: vcvttbf162iubs 8128(%ecx), %zmm2 {%k7} {z}
// CHECK: encoding: [0x62,0xf5,0x7f,0xcf,0x6a,0x51,0x7f]
- vcvttnebf162iubs 8128(%ecx), %zmm2 {%k7} {z}
+ vcvttbf162iubs 8128(%ecx), %zmm2 {%k7} {z}
-// CHECK: vcvttnebf162iubs -256(%edx){1to32}, %zmm2 {%k7} {z}
+// CHECK: vcvttbf162iubs -256(%edx){1to32}, %zmm2 {%k7} {z}
// CHECK: encoding: [0x62,0xf5,0x7f,0xdf,0x6a,0x52,0x80]
- vcvttnebf162iubs -256(%edx){1to32}, %zmm2 {%k7} {z}
+ vcvttbf162iubs -256(%edx){1to32}, %zmm2 {%k7} {z}
// CHECK: vcvttph2ibs %xmm3, %xmm2
// CHECK: encoding: [0x62,0xf5,0x7c,0x08,0x68,0xd3]
diff --git a/llvm/test/MC/X86/avx10.2satcvt-32-intel.s b/llvm/test/MC/X86/avx10.2satcvt-32-intel.s
index 4c22544f27b7e9..d0b87054a2a86f 100644
--- a/llvm/test/MC/X86/avx10.2satcvt-32-intel.s
+++ b/llvm/test/MC/X86/avx10.2satcvt-32-intel.s
@@ -1,220 +1,220 @@
// RUN: llvm-mc -triple i386 -x86-asm-syntax=intel -output-asm-variant=1 --show-encoding %s | FileCheck %s
-// CHECK: vcvtnebf162ibs xmm2, xmm3
+// CHECK: vcvtbf162ibs xmm2, xmm3
// CHECK: encoding: [0x62,0xf5,0x7f,0x08,0x69,0xd3]
- vcvtnebf162ibs xmm2, xmm3
+ vcvtbf162ibs xmm2, xmm3
-// CHECK: vcvtnebf162ibs xmm2 {k7}, xmm3
+// CHECK: vcvtbf162ibs xmm2 {k7}, xmm3
// CHECK: encoding: [0x62,0xf5,0x7f,0x0f,0x69,0xd3]
- vcvtnebf162ibs xmm2 {k7}, xmm3
+ vcvtbf162ibs xmm2 {k7}, xmm3
-// CHECK: vcvtnebf162ibs xmm2 {k7} {z}, xmm3
+// CHECK: vcvtbf162ibs xmm2 {k7} {z}, xmm3
// CHECK: encoding: [0x62,0xf5,0x7f,0x8f,0x69,0xd3]
- vcvtnebf162ibs xmm2 {k7} {z}, xmm3
+ vcvtbf162ibs xmm2 {k7} {z}, xmm3
-// CHECK: vcvtnebf162ibs zmm2, zmm3
+// CHECK: vcvtbf162ibs zmm2, zmm3
// CHECK: encoding: [0x62,0xf5,0x7f,0x48,0x69,0xd3]
- vcvtnebf162ibs zmm2, zmm3
+ vcvtbf162ibs zmm2, zmm3
-// CHECK: vcvtnebf162ibs zmm2 {k7}, zmm3
+// CHECK: vcvtbf162ibs zmm2 {k7}, zmm3
// CHECK: encoding: [0x62,0xf5,0x7f,0x4f,0x69,0xd3]
- vcvtnebf162ibs zmm2 {k7}, zmm3
+ vcvtbf162ibs zmm2 {k7}, zmm3
-// CHECK: vcvtnebf162ibs zmm2 {k7} {z}, zmm3
+// CHECK: vcvtbf162ibs zmm2 {k7} {z}, zmm3
// CHECK: encoding: [0x62,0xf5,0x7f,0xcf,0x69,0xd3]
- vcvtnebf162ibs zmm2 {k7} {z}, zmm3
+ vcvtbf162ibs zmm2 {k7} {z}, zmm3
-// CHECK: vcvtnebf162ibs ymm2, ymm3
+// CHECK: vcvtbf162ibs ymm2, ymm3
// CHECK: encoding: [0x62,0xf5,0x7f,0x28,0x69,0xd3]
- vcvtnebf162ibs ymm2, ymm3
+ vcvtbf162ibs ymm2, ymm3
-// CHECK: vcvtnebf162ibs ymm2 {k7}, ymm3
+// CHECK: vcvtbf162ibs ymm2 {k7}, ymm3
// CHECK: encoding: [0x62,0xf5,0x7f,0x2f,0x69,0xd3]
- vcvtnebf162ibs ymm2 {k7}, ymm3
+ vcvtbf162ibs ymm2 {k7}, ymm3
-// CHECK: vcvtnebf162ibs ymm2 {k7} {z}, ymm3
+// CHECK: vcvtbf162ibs ymm2 {k7} {z}, ymm3
// CHECK: encoding: [0x62,0xf5,0x7f,0xaf,0x69,0xd3]
- vcvtnebf162ibs ymm2 {k7} {z}, ymm3
+ vcvtbf162ibs ymm2 {k7} {z}, ymm3
-// CHECK: vcvtnebf162ibs xmm2, xmmword ptr [esp + 8*esi + 268435456]
+// CHECK: vcvtbf162ibs xmm2, xmmword ptr [esp + 8*esi + 268435456]
// CHECK: encoding: [0x62,0xf5,0x7f,0x08,0x69,0x94,0xf4,0x00,0x00,0x00,0x10]
- vcvtnebf162ibs xmm2, xmmword ptr [esp + 8*esi + 268435456]
+ vcvtbf162ibs xmm2, xmmword ptr [esp + 8*esi + 268435456]
-// CHECK: vcvtnebf162ibs xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
+// CHECK: vcvtbf162ibs xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
// CHECK: encoding: [0x62,0xf5,0x7f,0x0f,0x69,0x94,0x87,0x23,0x01,0x00,0x00]
- vcvtnebf162ibs xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
+ vcvtbf162ibs xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
-// CHECK: vcvtnebf162ibs xmm2, word ptr [eax]{1to8}
+// CHECK: vcvtbf162ibs xmm2, word ptr [eax]{1to8}
// CHECK: encoding: [0x62,0xf5,0x7f,0x18,0x69,0x10]
- vcvtnebf162ibs xmm2, word ptr [eax]{1to8}
+ vcvtbf162ibs xmm2, word ptr [eax]{1to8}
-// CHECK: vcvtnebf162ibs xmm2, xmmword ptr [2*ebp - 512]
+// CHECK: vcvtbf162ibs xmm2, xmmword ptr [2*ebp - 512]
// CHECK: encoding: [0x62,0xf5,0x7f,0x08,0x69,0x14,0x6d,0x00,0xfe,0xff,0xff]
- vcvtnebf162ibs xmm2, xmmword ptr [2*ebp - 512]
+ vcvtbf162ibs xmm2, xmmword ptr [2*ebp - 512]
-// CHECK: vcvtnebf162ibs xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
+// CHECK: vcvtbf162ibs xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
// CHECK: encoding: [0x62,0xf5,0x7f,0x8f,0x69,0x51,0x7f]
- vcvtnebf162ibs xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
+ vcvtbf162ibs xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
-// CHECK: vcvtnebf162ibs xmm2 {k7} {z}, word ptr [edx - 256]{1to8}
+// CHECK: vcvtbf162ibs xmm2 {k7} {z}, word ptr [edx - 256]{1to8}
// CHECK: encoding: [0x62,0xf5,0x7f,0x9f,0x69,0x52,0x80]
- vcvtnebf162ibs xmm2 {k7} {z}, word ptr [edx - 256]{1to8}
+ vcvtbf162ibs xmm2 {k7} {z}, word ptr [edx - 256]{1to8}
-// CHECK: vcvtnebf162ibs ymm2, ymmword ptr [esp + 8*esi + 268435456]
+// CHECK: vcvtbf162ibs ymm2, ymmword ptr [esp + 8*esi + 268435456]
// CHECK: encoding: [0x62,0xf5,0x7f,0x28,0x69,0x94,0xf4,0x00,0x00,0x00,0x10]
- vcvtnebf162ibs ymm2, ymmword ptr [esp + 8*esi + 268435456]
+ vcvtbf162ibs ymm2, ymmword ptr [esp + 8*esi + 268435456]
-// CHECK: vcvtnebf162ibs ymm2 {k7}, ymmword ptr [edi + 4*eax + 291]
+// CHECK: vcvtbf162ibs ymm2 {k7}, ymmword ptr [edi + 4*eax + 291]
// CHECK: encoding: [0x62,0xf5,0x7f,0x2f,0x69,0x94,0x87,0x23,0x01,0x00,0x00]
- vcvtnebf162ibs ymm2 {k7}, ymmword ptr [edi + 4*eax + 291]
+ vcvtbf162ibs ymm2 {k7}, ymmword ptr [edi + 4*eax + 291]
-// CHECK: vcvtnebf162ibs ymm2, word ptr [eax]{1to16}
+// CHECK: vcvtbf162ibs ymm2, word ptr [eax]{1to16}
// CHECK: encoding: [0x62,0xf5,0x7f,0x38,0x69,0x10]
- vcvtnebf162ibs ymm2, word ptr [eax]{1to16}
+ vcvtbf162ibs ymm2, word ptr [eax]{1to16}
-// CHECK: vcvtnebf162ibs ymm2, ymmword ptr [2*ebp - 1024]
+// CHECK: vcvtbf162ibs ymm2, ymmword ptr [2*ebp - 1024]
// CHECK: encoding: [0x62,0xf5,0x7f,0x28,0x69,0x14,0x6d,0x00,0xfc,0xff,0xff]
- vcvtnebf162ibs ymm2, ymmword ptr [2*ebp - 1024]
+ vcvtbf162ibs ymm2, ymmword ptr [2*ebp - 1024]
-// CHECK: vcvtnebf162ibs ymm2 {k7} {z}, ymmword ptr [ecx + 4064]
+// CHECK: vcvtbf162ibs ymm2 {k7} {z}, ymmword ptr [ecx + 4064]
// CHECK: encoding: [0x62,0xf5,0x7f,0xaf,0x69,0x51,0x7f]
- vcvtnebf162ibs ymm2 {k7} {z}, ymmword ptr [ecx + 4064]
+ vcvtbf162ibs ymm2 {k7} {z}, ymmword ptr [ecx + 4064]
-// CHECK: vcvtnebf162ibs ymm2 {k7} {z}, word ptr [edx - 256]{1to16}
+// CHECK: vcvtbf162ibs ymm2 {k7} {z}, word ptr [edx - 256]{1to16}
// CHECK: encoding: [0x62,0xf5,0x7f,0xbf,0x69,0x52,0x80]
- vcvtnebf162ibs ymm2 {k7} {z}, word ptr [edx - 256]{1to16}
+ vcvtbf162ibs ymm2 {k7} {z}, word ptr [edx - 256]{1to16}
-// CHECK: vcvtnebf162ibs zmm2, zmmword ptr [esp + 8*esi + 268435456]
+// CHECK: vcvtbf162ibs zmm2, zmmword ptr [esp + 8*esi + 268435456]
// CHECK: encoding: [0x62,0xf5,0x7f,0x48,0x69,0x94,0xf4,0x00,0x00,0x00,0x10]
- vcvtnebf162ibs zmm2, zmmword ptr [esp + 8*esi + 268435456]
+ vcvtbf162ibs zmm2, zmmword ptr [esp + 8*esi + 268435456]
-// CHECK: vcvtnebf162ibs zmm2 {k7}, zmmword ptr [edi + 4*eax + 291]
+// CHECK: vcvtbf162ibs zmm2 {k7}, zmmword ptr [edi + 4*eax + 291]
// CHECK: encoding: [0x62,0xf5,0x7f,0x4f,0x69,0x94,0x87,0x23,0x01,0x00,0x00]
- vcvtnebf162ibs zmm2 {k7}, zmmword ptr [edi + 4*eax + 291]
+ vcvtbf162ibs zmm2 {k7}, zmmword ptr [edi + 4*eax + 291]
-// CHECK: vcvtnebf162ibs zmm2, word ptr [eax]{1to32}
+// CHECK: vcvtbf162ibs zmm2, word ptr [eax]{1to32}
// CHECK: encoding: [0x62,0xf5,0x7f,0x58,0x69,0x10]
- vcvtnebf162ibs zmm2, word ptr [eax]{1to32}
+ vcvtbf162ibs zmm2, word ptr [eax]{1to32}
-// CHECK: vcvtnebf162ibs zmm2, zmmword ptr [2*ebp - 2048]
+// CHECK: vcvtbf162ibs zmm2, zmmword ptr [2*ebp - 2048]
// CHECK: encoding: [0x62,0xf5,0x7f,0x48,0x69,0x14,0x6d,0x00,0xf8,0xff,0xff]
- vcvtnebf162ibs zmm2, zmmword ptr [2*ebp - 2048]
+ vcvtbf162ibs zmm2, zmmword ptr [2*ebp - 2048]
-// CHECK: vcvtnebf162ibs zmm2 {k7} {z}, zmmword ptr [ecx + 8128]
+// CHECK: vcvtbf162ibs zmm2 {k7} {z}, zmmword ptr [ecx + 8128]
// CHECK: encoding: [0x62,0xf5,0x7f,0xcf,0x69,0x51,0x7f]
- vcvtnebf162ibs zmm2 {k7} {z}, zmmword ptr [ecx + 8128]
+ vcvtbf162ibs zmm2 {k7} {z}, zmmword ptr [ecx + 8128]
-// CHECK: vcvtnebf162ibs zmm2 {k7} {z}, word ptr [edx - 256]{1to32}
+// CHECK: vcvtbf162ibs zmm2 {k7} {z}, word ptr [edx - 256]{1to32}
// CHECK: encoding: [0x62,0xf5,0x7f,0xdf,0x69,0x52,0x80]
- vcvtnebf162ibs zmm2 {k7} {z}, word ptr [edx - 256]{1to32}
+ vcvtbf162ibs zmm2 {k7} {z}, word ptr [edx - 256]{1to32}
-// CHECK: vcvtnebf162iubs xmm2, xmm3
+// CHECK: vcvtbf162iubs xmm2, xmm3
// CHECK: encoding: [0x62,0xf5,0x7f,0x08,0x6b,0xd3]
- vcvtnebf162iubs xmm2, xmm3
+ vcvtbf162iubs xmm2, xmm3
-// CHECK: vcvtnebf162iubs xmm2 {k7}, xmm3
+// CHECK: vcvtbf162iubs xmm2 {k7}, xmm3
// CHECK: encoding: [0x62,0xf5,0x7f,0x0f,0x6b,0xd3]
- vcvtnebf162iubs xmm2 {k7}, xmm3
+ vcvtbf162iubs xmm2 {k7}, xmm3
-// CHECK: vcvtnebf162iubs xmm2 {k7} {z}, xmm3
+// CHECK: vcvtbf162iubs xmm2 {k7} {z}, xmm3
// CHECK: encoding: [0x62,0xf5,0x7f,0x8f,0x6b,0xd3]
- vcvtnebf162iubs xmm2 {k7} {z}, xmm3
+ vcvtbf162iubs xmm2 {k7} {z}, xmm3
-// CHECK: vcvtnebf162iubs zmm2, zmm3
+// CHECK: vcvtbf162iubs zmm2, zmm3
// CHECK: encoding: [0x62,0xf5,0x7f,0x48,0x6b,0xd3]
- vcvtnebf162iubs zmm2, zmm3
+ vcvtbf162iubs zmm2, zmm3
-// CHECK: vcvtnebf162iubs zmm2 {k7}, zmm3
+// CHECK: vcvtbf162iubs zmm2 {k7}, zmm3
// CHECK: encoding: [0x62,0xf5,0x7f,0x4f,0x6b,0xd3]
- vcvtnebf162iubs zmm2 {k7}, zmm3
+ vcvtbf162iubs zmm2 {k7}, zmm3
-// CHECK: vcvtnebf162iubs zmm2 {k7} {z}, zmm3
+// CHECK: vcvtbf162iubs zmm2 {k7} {z}, zmm3
// CHECK: encoding: [0x62,0xf5,0x7f,0xcf,0x6b,0xd3]
- vcvtnebf162iubs zmm2 {k7} {z}, zmm3
+ vcvtbf162iubs zmm2 {k7} {z}, zmm3
-// CHECK: vcvtnebf162iubs ymm2, ymm3
+// CHECK: vcvtbf162iubs ymm2, ymm3
// CHECK: encoding: [0x62,0xf5,0x7f,0x28,0x6b,0xd3]
- vcvtnebf162iubs ymm2, ymm3
+ vcvtbf162iubs ymm2, ymm3
-// CHECK: vcvtnebf162iubs ymm2 {k7}, ymm3
+// CHECK: vcvtbf162iubs ymm2 {k7}, ymm3
// CHECK: encoding: [0x62,0xf5,0x7f,0x2f,0x6b,0xd3]
- vcvtnebf162iubs ymm2 {k7}, ymm3
+ vcvtbf162iubs ymm2 {k7}, ymm3
-// CHECK: vcvtnebf162iubs ymm2 {k7} {z}, ymm3
+// CHECK: vcvtbf162iubs ymm2 {k7} {z}, ymm3
// CHECK: encoding: [0x62,0xf5,0x7f,0xaf,0x6b,0xd3]
- vcvtnebf162iubs ymm2 {k7} {z}, ymm3
+ vcvtbf162iubs ymm2 {k7} {z}, ymm3
-// CHECK: vcvtnebf162iubs xmm2, xmmword ptr [esp + 8*esi + 268435456]
+// CHECK: vcvtbf162iubs xmm2, xmmword ptr [esp + 8*esi + 268435456]
// CHECK: encoding: [0x62,0xf5,0x7f,0x08,0x6b,0x94,0xf4,0x00,0x00,0x00,0x10]
- vcvtnebf162iubs xmm2, xmmword ptr [esp + 8*esi + 268435456]
+ vcvtbf162iubs xmm2, xmmword ptr [esp + 8*esi + 268435456]
-// CHECK: vcvtnebf162iubs xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
+// CHECK: vcvtbf162iubs xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
// CHECK: encoding: [0x62,0xf5,0x7f,0x0f,0x6b,0x94,0x87,0x23,0x01,0x00,0x00]
- vcvtnebf162iubs xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
+ vcvtbf162iubs xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
-// CHECK: vcvtnebf162iubs xmm2, word ptr [eax]{1to8}
+// CHECK: vcvtbf162iubs xmm2, word ptr [eax]{1to8}
// CHECK: encoding: [0x62,0xf5,0x7f,0x18,0x6b,0x10]
- vcvtnebf162iubs xmm2, word ptr [eax]{1to8}
+ vcvtbf162iubs xmm2, word ptr [eax]{1to8}
-// CHECK: vcvtnebf162iubs xmm2, xmmword ptr [2*ebp - 512]
+// CHECK: vcvtbf162iubs xmm2, xmmword ptr [2*ebp - 512]
// CHECK: encoding: [0x62,0xf5,0x7f,0x08,0x6b,0x14,0x6d,0x00,0xfe,0xff,0xff]
- vcvtnebf162iubs xmm2, xmmword ptr [2*ebp - 512]
+ vcvtbf162iubs xmm2, xmmword ptr [2*ebp - 512]
-// CHECK: vcvtnebf162iubs xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
+// CHECK: vcvtbf162iubs xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
// CHECK: encoding: [0x62,0xf5,0x7f,0x8f,0x6b,0x51,0x7f]
- vcvtnebf162iubs xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
+ vcvtbf162iubs xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
-// CHECK: vcvtnebf162iubs xmm2 {k7} {z}, word ptr [edx - 256]{1to8}
+// CHECK: vcvtbf162iubs xmm2 {k7} {z}, word ptr [edx - 256]{1to8}
// CHECK: encoding: [0x62,0xf5,0x7f,0x9f,0x6b,0x52,0x80]
- vcvtnebf162iubs xmm2 {k7} {z}, word ptr [edx - 256]{1to8}
+ vcvtbf162iubs xmm2 {k7} {z}, word ptr [edx - 256]{1to8}
-// CHECK: vcvtnebf162iubs ymm2, ymmword ptr [esp + 8*esi + 268435456]
+// CHECK: vcvtbf162iubs ymm2, ymmword ptr [esp + 8*esi + 268435456]
// CHECK: encoding: [0x62,0xf5,0x7f,0x28,0x6b,0x94,0xf4,0x00,0x00,0x00,0x10]
- vcvtnebf162iubs ymm2, ymmword ptr [esp + 8*esi + 268435456]
+ vcvtbf162iubs ymm2, ymmword ptr [esp + 8*esi + 268435456]
-// CHECK: vcvtnebf162iubs ymm2 {k7}, ymmword ptr [edi + 4*eax + 291]
+// CHECK: vcvtbf162iubs ymm2 {k7}, ymmword ptr [edi + 4*eax + 291]
// CHECK: encoding: [0x62,0xf5,0x7f,0x2f,0x6b,0x94,0x87,0x23,0x01,0x00,0x00]
- vcvtnebf162iubs ymm2 {k7}, ymmword ptr [edi + 4*eax + 291]
+ vcvtbf162iubs ymm2 {k7}, ymmword ptr [edi + 4*eax + 291]
-// CHECK: vcvtnebf162iubs ymm2, word ptr [eax]{1to16}
+// CHECK: vcvtbf162iubs ymm2, word ptr [eax]{1to16}
// CHECK: encoding: [0x62,0xf5,0x7f,0x38,0x6b,0x10]
- vcvtnebf162iubs ymm2, word ptr [eax]{1to16}
+ vcvtbf162iubs ymm2, word ptr [eax]{1to16}
-// CHECK: vcvtnebf162iubs ymm2, ymmword ptr [2*ebp - 1024]
+// CHECK: vcvtbf162iubs ymm2, ymmword ptr [2*ebp - 1024]
// CHECK: encoding: [0x62,0xf5,0x7f,0x28,0x6b,0x14,0x6d,0x00,0xfc,0xff,0xff]
- vcvtnebf162iubs ymm2, ymmword ptr [2*ebp - 1024]
+ vcvtbf162iubs ymm2, ymmword ptr [2*ebp - 1024]
-// CHECK: vcvtnebf162iubs ymm2 {k7} {z}, ymmword ptr [ecx + 4064]
+// CHECK: vcvtbf162iubs ymm2 {k7} {z}, ymmword ptr [ecx + 4064]
// CHECK: encoding: [0x62,0xf5,0x7f,0xaf,0x6b,0x51,0x7f]
- vcvtnebf162iubs ymm2 {k7} {z}, ymmword ptr [ecx + 4064]
+ vcvtbf162iubs ymm2 {k7} {z}, ymmword ptr [ecx + 4064]
-// CHECK: vcvtnebf162iubs ymm2 {k7} {z}, word ptr [edx - 256]{1to16}
+// CHECK: vcvtbf162iubs ymm2 {k7} {z}, word ptr [edx - 256]{1to16}
// CHECK: encoding: [0x62,0xf5,0x7f,0xbf,0x6b,0x52,0x80]
- vcvtnebf162iubs ymm2 {k7} {z}, word ptr [edx - 256]{1to16}
+ vcvtbf162iubs ymm2 {k7} {z}, word ptr [edx - 256]{1to16}
-// CHECK: vcvtnebf162iubs zmm2, zmmword ptr [esp + 8*esi + 268435456]
+// CHECK: vcvtbf162iubs zmm2, zmmword ptr [esp + 8*esi + 268435456]
// CHECK: encoding: [0x62,0xf5,0x7f,0x48,0x6b,0x94,0xf4,0x00,0x00,0x00,0x10]
- vcvtnebf162iubs zmm2, zmmword ptr [esp + 8*esi + 268435456]
+ vcvtbf162iubs zmm2, zmmword ptr [esp + 8*esi + 268435456]
-// CHECK: vcvtnebf162iubs zmm2 {k7}, zmmword ptr [edi + 4*eax + 291]
+// CHECK: vcvtbf162iubs zmm2 {k7}, zmmword ptr [edi + 4*eax + 291]
// CHECK: encoding: [0x62,0xf5,0x7f,0x4f,0x6b,0x94,0x87,0x23,0x01,0x00,0x00]
- vcvtnebf162iubs zmm2 {k7}, zmmword ptr [edi + 4*eax + 291]
+ vcvtbf162iubs zmm2 {k7}, zmmword ptr [edi + 4*eax + 291]
-// CHECK: vcvtnebf162iubs zmm2, word ptr [eax]{1to32}
+// CHECK: vcvtbf162iubs zmm2, word ptr [eax]{1to32}
// CHECK: encoding: [0x62,0xf5,0x7f,0x58,0x6b,0x10]
- vcvtnebf162iubs zmm2, word ptr [eax]{1to32}
+ vcvtbf162iubs zmm2, word ptr [eax]{1to32}
-// CHECK: vcvtnebf162iubs zmm2, zmmword ptr [2*ebp - 2048]
+// CHECK: vcvtbf162iubs zmm2, zmmword ptr [2*ebp - 2048]
// CHECK: encoding: [0x62,0xf5,0x7f,0x48,0x6b,0x14,0x6d,0x00,0xf8,0xff,0xff]
- vcvtnebf162iubs zmm2, zmmword ptr [2*ebp - 2048]
+ vcvtbf162iubs zmm2, zmmword ptr [2*ebp - 2048]
-// CHECK: vcvtnebf162iubs zmm2 {k7} {z}, zmmword ptr [ecx + 8128]
+// CHECK: vcvtbf162iubs zmm2 {k7} {z}, zmmword ptr [ecx + 8128]
// CHECK: encoding: [0x62,0xf5,0x7f,0xcf,0x6b,0x51,0x7f]
- vcvtnebf162iubs zmm2 {k7} {z}, zmmword ptr [ecx + 8128]
+ vcvtbf162iubs zmm2 {k7} {z}, zmmword ptr [ecx + 8128]
-// CHECK: vcvtnebf162iubs zmm2 {k7} {z}, word ptr [edx - 256]{1to32}
+// CHECK: vcvtbf162iubs zmm2 {k7} {z}, word ptr [edx - 256]{1to32}
// CHECK: encoding: [0x62,0xf5,0x7f,0xdf,0x6b,0x52,0x80]
- vcvtnebf162iubs zmm2 {k7} {z}, word ptr [edx - 256]{1to32}
+ vcvtbf162iubs zmm2 {k7} {z}, word ptr [edx - 256]{1to32}
// CHECK: vcvtph2ibs xmm2, xmm3
// CHECK: encoding: [0x62,0xf5,0x7c,0x08,0x69,0xd3]
@@ -680,221 +680,221 @@
// CHECK: encoding: [0x62,0xf5,0x7d,0xdf,0x6b,0x52,0x80]
vcvtps2iubs zmm2 {k7} {z}, dword ptr [edx - 512]{1to16}
-// CHECK: vcvttnebf162ibs xmm2, xmm3
+// CHECK: vcvttbf162ibs xmm2, xmm3
// CHECK: encoding: [0x62,0xf5,0x7f,0x08,0x68,0xd3]
- vcvttnebf162ibs xmm2, xmm3
+ vcvttbf162ibs xmm2, xmm3
-// CHECK: vcvttnebf162ibs xmm2 {k7}, xmm3
+// CHECK: vcvttbf162ibs xmm2 {k7}, xmm3
// CHECK: encoding: [0x62,0xf5,0x7f,0x0f,0x68,0xd3]
- vcvttnebf162ibs xmm2 {k7}, xmm3
+ vcvttbf162ibs xmm2 {k7}, xmm3
-// CHECK: vcvttnebf162ibs xmm2 {k7} {z}, xmm3
+// CHECK: vcvttbf162ibs xmm2 {k7} {z}, xmm3
// CHECK: encoding: [0x62,0xf5,0x7f,0x8f,0x68,0xd3]
- vcvttnebf162ibs xmm2 {k7} {z}, xmm3
+ vcvttbf162ibs xmm2 {k7} {z}, xmm3
-// CHECK: vcvttnebf162ibs zmm2, zmm3
+// CHECK: vcvttbf162ibs zmm2, zmm3
// CHECK: encoding: [0x62,0xf5,0x7f,0x48,0x68,0xd3]
- vcvttnebf162ibs zmm2, zmm3
+ vcvttbf162ibs zmm2, zmm3
-// CHECK: vcvttnebf162ibs zmm2 {k7}, zmm3
+// CHECK: vcvttbf162ibs zmm2 {k7}, zmm3
// CHECK: encoding: [0x62,0xf5,0x7f,0x4f,0x68,0xd3]
- vcvttnebf162ibs zmm2 {k7}, zmm3
+ vcvttbf162ibs zmm2 {k7}, zmm3
-// CHECK: vcvttnebf162ibs zmm2 {k7} {z}, zmm3
+// CHECK: vcvttbf162ibs zmm2 {k7} {z}, zmm3
// CHECK: encoding: [0x62,0xf5,0x7f,0xcf,0x68,0xd3]
- vcvttnebf162ibs zmm2 {k7} {z}, zmm3
+ vcvttbf162ibs zmm2 {k7} {z}, zmm3
-// CHECK: vcvttnebf162ibs ymm2, ymm3
+// CHECK: vcvttbf162ibs ymm2, ymm3
// CHECK: encoding: [0x62,0xf5,0x7f,0x28,0x68,0xd3]
- vcvttnebf162ibs ymm2, ymm3
+ vcvttbf162ibs ymm2, ymm3
-// CHECK: vcvttnebf162ibs ymm2 {k7}, ymm3
+// CHECK: vcvttbf162ibs ymm2 {k7}, ymm3
// CHECK: encoding: [0x62,0xf5,0x7f,0x2f,0x68,0xd3]
- vcvttnebf162ibs ymm2 {k7}, ymm3
+ vcvttbf162ibs ymm2 {k7}, ymm3
-// CHECK: vcvttnebf162ibs ymm2 {k7} {z}, ymm3
+// CHECK: vcvttbf162ibs ymm2 {k7} {z}, ymm3
// CHECK: encoding: [0x62,0xf5,0x7f,0xaf,0x68,0xd3]
- vcvttnebf162ibs ymm2 {k7} {z}, ymm3
+ vcvttbf162ibs ymm2 {k7} {z}, ymm3
-// CHECK: vcvttnebf162ibs xmm2, xmmword ptr [esp + 8*esi + 268435456]
+// CHECK: vcvttbf162ibs xmm2, xmmword ptr [esp + 8*esi + 268435456]
// CHECK: encoding: [0x62,0xf5,0x7f,0x08,0x68,0x94,0xf4,0x00,0x00,0x00,0x10]
- vcvttnebf162ibs xmm2, xmmword ptr [esp + 8*esi + 268435456]
+ vcvttbf162ibs xmm2, xmmword ptr [esp + 8*esi + 268435456]
-// CHECK: vcvttnebf162ibs xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
+// CHECK: vcvttbf162ibs xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
// CHECK: encoding: [0x62,0xf5,0x7f,0x0f,0x68,0x94,0x87,0x23,0x01,0x00,0x00]
- vcvttnebf162ibs xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
+ vcvttbf162ibs xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
-// CHECK: vcvttnebf162ibs xmm2, word ptr [eax]{1to8}
+// CHECK: vcvttbf162ibs xmm2, word ptr [eax]{1to8}
// CHECK: encoding: [0x62,0xf5,0x7f,0x18,0x68,0x10]
- vcvttnebf162ibs xmm2, word ptr [eax]{1to8}
+ vcvttbf162ibs xmm2, word ptr [eax]{1to8}
-// CHECK: vcvttnebf162ibs xmm2, xmmword ptr [2*ebp - 512]
+// CHECK: vcvttbf162ibs xmm2, xmmword ptr [2*ebp - 512]
// CHECK: encoding: [0x62,0xf5,0x7f,0x08,0x68,0x14,0x6d,0x00,0xfe,0xff,0xff]
- vcvttnebf162ibs xmm2, xmmword ptr [2*ebp - 512]
+ vcvttbf162ibs xmm2, xmmword ptr [2*ebp - 512]
-// CHECK: vcvttnebf162ibs xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
+// CHECK: vcvttbf162ibs xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
// CHECK: encoding: [0x62,0xf5,0x7f,0x8f,0x68,0x51,0x7f]
- vcvttnebf162ibs xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
+ vcvttbf162ibs xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
-// CHECK: vcvttnebf162ibs xmm2 {k7} {z}, word ptr [edx - 256]{1to8}
+// CHECK: vcvttbf162ibs xmm2 {k7} {z}, word ptr [edx - 256]{1to8}
// CHECK: encoding: [0x62,0xf5,0x7f,0x9f,0x68,0x52,0x80]
- vcvttnebf162ibs xmm2 {k7} {z}, word ptr [edx - 256]{1to8}
+ vcvttbf162ibs xmm2 {k7} {z}, word ptr [edx - 256]{1to8}
-// CHECK: vcvttnebf162ibs ymm2, ymmword ptr [esp + 8*esi + 268435456]
+// CHECK: vcvttbf162ibs ymm2, ymmword ptr [esp + 8*esi + 268435456]
// CHECK: encoding: [0x62,0xf5,0x7f,0x28,0x68,0x94,0xf4,0x00,0x00,0x00,0x10]
- vcvttnebf162ibs ymm2, ymmword ptr [esp + 8*esi + 268435456]
+ vcvttbf162ibs ymm2, ymmword ptr [esp + 8*esi + 268435456]
-// CHECK: vcvttnebf162ibs ymm2 {k7}, ymmword ptr [edi + 4*eax + 291]
+// CHECK: vcvttbf162ibs ymm2 {k7}, ymmword ptr [edi + 4*eax + 291]
// CHECK: encoding: [0x62,0xf5,0x7f,0x2f,0x68,0x94,0x87,0x23,0x01,0x00,0x00]
- vcvttnebf162ibs ymm2 {k7}, ymmword ptr [edi + 4*eax + 291]
+ vcvttbf162ibs ymm2 {k7}, ymmword ptr [edi + 4*eax + 291]
-// CHECK: vcvttnebf162ibs ymm2, word ptr [eax]{1to16}
+// CHECK: vcvttbf162ibs ymm2, word ptr [eax]{1to16}
// CHECK: encoding: [0x62,0xf5,0x7f,0x38,0x68,0x10]
- vcvttnebf162ibs ymm2, word ptr [eax]{1to16}
+ vcvttbf162ibs ymm2, word ptr [eax]{1to16}
-// CHECK: vcvttnebf162ibs ymm2, ymmword ptr [2*ebp - 1024]
+// CHECK: vcvttbf162ibs ymm2, ymmword ptr [2*ebp - 1024]
// CHECK: encoding: [0x62,0xf5,0x7f,0x28,0x68,0x14,0x6d,0x00,0xfc,0xff,0xff]
- vcvttnebf162ibs ymm2, ymmword ptr [2*ebp - 1024]
+ vcvttbf162ibs ymm2, ymmword ptr [2*ebp - 1024]
-// CHECK: vcvttnebf162ibs ymm2 {k7} {z}, ymmword ptr [ecx + 4064]
+// CHECK: vcvttbf162ibs ymm2 {k7} {z}, ymmword ptr [ecx + 4064]
// CHECK: encoding: [0x62,0xf5,0x7f,0xaf,0x68,0x51,0x7f]
- vcvttnebf162ibs ymm2 {k7} {z}, ymmword ptr [ecx + 4064]
+ vcvttbf162ibs ymm2 {k7} {z}, ymmword ptr [ecx + 4064]
-// CHECK: vcvttnebf162ibs ymm2 {k7} {z}, word ptr [edx - 256]{1to16}
+// CHECK: vcvttbf162ibs ymm2 {k7} {z}, word ptr [edx - 256]{1to16}
// CHECK: encoding: [0x62,0xf5,0x7f,0xbf,0x68,0x52,0x80]
- vcvttnebf162ibs ymm2 {k7} {z}, word ptr [edx - 256]{1to16}
+ vcvttbf162ibs ymm2 {k7} {z}, word ptr [edx - 256]{1to16}
-// CHECK: vcvttnebf162ibs zmm2, zmmword ptr [esp + 8*esi + 268435456]
+// CHECK: vcvttbf162ibs zmm2, zmmword ptr [esp + 8*esi + 268435456]
// CHECK: encoding: [0x62,0xf5,0x7f,0x48,0x68,0x94,0xf4,0x00,0x00,0x00,0x10]
- vcvttnebf162ibs zmm2, zmmword ptr [esp + 8*esi + 268435456]
+ vcvttbf162ibs zmm2, zmmword ptr [esp + 8*esi + 268435456]
-// CHECK: vcvttnebf162ibs zmm2 {k7}, zmmword ptr [edi + 4*eax + 291]
+// CHECK: vcvttbf162ibs zmm2 {k7}, zmmword ptr [edi + 4*eax + 291]
// CHECK: encoding: [0x62,0xf5,0x7f,0x4f,0x68,0x94,0x87,0x23,0x01,0x00,0x00]
- vcvttnebf162ibs zmm2 {k7}, zmmword ptr [edi + 4*eax + 291]
+ vcvttbf162ibs zmm2 {k7}, zmmword ptr [edi + 4*eax + 291]
-// CHECK: vcvttnebf162ibs zmm2, word ptr [eax]{1to32}
+// CHECK: vcvttbf162ibs zmm2, word ptr [eax]{1to32}
// CHECK: encoding: [0x62,0xf5,0x7f,0x58,0x68,0x10]
- vcvttnebf162ibs zmm2, word ptr [eax]{1to32}
+ vcvttbf162ibs zmm2, word ptr [eax]{1to32}
-// CHECK: vcvttnebf162ibs zmm2, zmmword ptr [2*ebp - 2048]
+// CHECK: vcvttbf162ibs zmm2, zmmword ptr [2*ebp - 2048]
// CHECK: encoding: [0x62,0xf5,0x7f,0x48,0x68,0x14,0x6d,0x00,0xf8,0xff,0xff]
- vcvttnebf162ibs zmm2, zmmword ptr [2*ebp - 2048]
+ vcvttbf162ibs zmm2, zmmword ptr [2*ebp - 2048]
-// CHECK: vcvttnebf162ibs zmm2 {k7} {z}, zmmword ptr [ecx + 8128]
+// CHECK: vcvttbf162ibs zmm2 {k7} {z}, zmmword ptr [ecx + 8128]
// CHECK: encoding: [0x62,0xf5,0x7f,0xcf,0x68,0x51,0x7f]
- vcvttnebf162ibs zmm2 {k7} {z}, zmmword ptr [ecx + 8128]
+ vcvttbf162ibs zmm2 {k7} {z}, zmmword ptr [ecx + 8128]
-// CHECK: vcvttnebf162ibs zmm2 {k7} {z}, word ptr [edx - 256]{1to32}
+// CHECK: vcvttbf162ibs zmm2 {k7} {z}, word ptr [edx - 256]{1to32}
// CHECK: encoding: [0x62,0xf5,0x7f,0xdf,0x68,0x52,0x80]
- vcvttnebf162ibs zmm2 {k7} {z}, word ptr [edx - 256]{1to32}
+ vcvttbf162ibs zmm2 {k7} {z}, word ptr [edx - 256]{1to32}
-// CHECK: vcvttnebf162iubs xmm2, xmm3
+// CHECK: vcvttbf162iubs xmm2, xmm3
// CHECK: encoding: [0x62,0xf5,0x7f,0x08,0x6a,0xd3]
- vcvttnebf162iubs xmm2, xmm3
+ vcvttbf162iubs xmm2, xmm3
-// CHECK: vcvttnebf162iubs xmm2 {k7}, xmm3
+// CHECK: vcvttbf162iubs xmm2 {k7}, xmm3
// CHECK: encoding: [0x62,0xf5,0x7f,0x0f,0x6a,0xd3]
- vcvttnebf162iubs xmm2 {k7}, xmm3
+ vcvttbf162iubs xmm2 {k7}, xmm3
-// CHECK: vcvttnebf162iubs xmm2 {k7} {z}, xmm3
+// CHECK: vcvttbf162iubs xmm2 {k7} {z}, xmm3
// CHECK: encoding: [0x62,0xf5,0x7f,0x8f,0x6a,0xd3]
- vcvttnebf162iubs xmm2 {k7} {z}, xmm3
+ vcvttbf162iubs xmm2 {k7} {z}, xmm3
-// CHECK: vcvttnebf162iubs zmm2, zmm3
+// CHECK: vcvttbf162iubs zmm2, zmm3
// CHECK: encoding: [0x62,0xf5,0x7f,0x48,0x6a,0xd3]
- vcvttnebf162iubs zmm2, zmm3
+ vcvttbf162iubs zmm2, zmm3
-// CHECK: vcvttnebf162iubs zmm2 {k7}, zmm3
+// CHECK: vcvttbf162iubs zmm2 {k7}, zmm3
// CHECK: encoding: [0x62,0xf5,0x7f,0x4f,0x6a,0xd3]
- vcvttnebf162iubs zmm2 {k7}, zmm3
+ vcvttbf162iubs zmm2 {k7}, zmm3
-// CHECK: vcvttnebf162iubs zmm2 {k7} {z}, zmm3
+// CHECK: vcvttbf162iubs zmm2 {k7} {z}, zmm3
// CHECK: encoding: [0x62,0xf5,0x7f,0xcf,0x6a,0xd3]
- vcvttnebf162iubs zmm2 {k7} {z}, zmm3
+ vcvttbf162iubs zmm2 {k7} {z}, zmm3
-// CHECK: vcvttnebf162iubs ymm2, ymm3
+// CHECK: vcvttbf162iubs ymm2, ymm3
// CHECK: encoding: [0x62,0xf5,0x7f,0x28,0x6a,0xd3]
- vcvttnebf162iubs ymm2, ymm3
+ vcvttbf162iubs ymm2, ymm3
-// CHECK: vcvttnebf162iubs ymm2 {k7}, ymm3
+// CHECK: vcvttbf162iubs ymm2 {k7}, ymm3
// CHECK: encoding: [0x62,0xf5,0x7f,0x2f,0x6a,0xd3]
- vcvttnebf162iubs ymm2 {k7}, ymm3
+ vcvttbf162iubs ymm2 {k7}, ymm3
-// CHECK: vcvttnebf162iubs ymm2 {k7} {z}, ymm3
+// CHECK: vcvttbf162iubs ymm2 {k7} {z}, ymm3
// CHECK: encoding: [0x62,0xf5,0x7f,0xaf,0x6a,0xd3]
- vcvttnebf162iubs ymm2 {k7} {z}, ymm3
+ vcvttbf162iubs ymm2 {k7} {z}, ymm3
-// CHECK: vcvttnebf162iubs xmm2, xmmword ptr [esp + 8*esi + 268435456]
+// CHECK: vcvttbf162iubs xmm2, xmmword ptr [esp + 8*esi + 268435456]
// CHECK: encoding: [0x62,0xf5,0x7f,0x08,0x6a,0x94,0xf4,0x00,0x00,0x00,0x10]
- vcvttnebf162iubs xmm2, xmmword ptr [esp + 8*esi + 268435456]
+ vcvttbf162iubs xmm2, xmmword ptr [esp + 8*esi + 268435456]
-// CHECK: vcvttnebf162iubs xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
+// CHECK: vcvttbf162iubs xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
// CHECK: encoding: [0x62,0xf5,0x7f,0x0f,0x6a,0x94,0x87,0x23,0x01,0x00,0x00]
- vcvttnebf162iubs xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
+ vcvttbf162iubs xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
-// CHECK: vcvttnebf162iubs xmm2, word ptr [eax]{1to8}
+// CHECK: vcvttbf162iubs xmm2, word ptr [eax]{1to8}
// CHECK: encoding: [0x62,0xf5,0x7f,0x18,0x6a,0x10]
- vcvttnebf162iubs xmm2, word ptr [eax]{1to8}
+ vcvttbf162iubs xmm2, word ptr [eax]{1to8}
-// CHECK: vcvttnebf162iubs xmm2, xmmword ptr [2*ebp - 512]
+// CHECK: vcvttbf162iubs xmm2, xmmword ptr [2*ebp - 512]
// CHECK: encoding: [0x62,0xf5,0x7f,0x08,0x6a,0x14,0x6d,0x00,0xfe,0xff,0xff]
- vcvttnebf162iubs xmm2, xmmword ptr [2*ebp - 512]
+ vcvttbf162iubs xmm2, xmmword ptr [2*ebp - 512]
-// CHECK: vcvttnebf162iubs xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
+// CHECK: vcvttbf162iubs xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
// CHECK: encoding: [0x62,0xf5,0x7f,0x8f,0x6a,0x51,0x7f]
- vcvttnebf162iubs xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
+ vcvttbf162iubs xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
-// CHECK: vcvttnebf162iubs xmm2 {k7} {z}, word ptr [edx - 256]{1to8}
+// CHECK: vcvttbf162iubs xmm2 {k7} {z}, word ptr [edx - 256]{1to8}
// CHECK: encoding: [0x62,0xf5,0x7f,0x9f,0x6a,0x52,0x80]
- vcvttnebf162iubs xmm2 {k7} {z}, word ptr [edx - 256]{1to8}
+ vcvttbf162iubs xmm2 {k7} {z}, word ptr [edx - 256]{1to8}
-// CHECK: vcvttnebf162iubs ymm2, ymmword ptr [esp + 8*esi + 268435456]
+// CHECK: vcvttbf162iubs ymm2, ymmword ptr [esp + 8*esi + 268435456]
// CHECK: encoding: [0x62,0xf5,0x7f,0x28,0x6a,0x94,0xf4,0x00,0x00,0x00,0x10]
- vcvttnebf162iubs ymm2, ymmword ptr [esp + 8*esi + 268435456]
+ vcvttbf162iubs ymm2, ymmword ptr [esp + 8*esi + 268435456]
-// CHECK: vcvttnebf162iubs ymm2 {k7}, ymmword ptr [edi + 4*eax + 291]
+// CHECK: vcvttbf162iubs ymm2 {k7}, ymmword ptr [edi + 4*eax + 291]
// CHECK: encoding: [0x62,0xf5,0x7f,0x2f,0x6a,0x94,0x87,0x23,0x01,0x00,0x00]
- vcvttnebf162iubs ymm2 {k7}, ymmword ptr [edi + 4*eax + 291]
+ vcvttbf162iubs ymm2 {k7}, ymmword ptr [edi + 4*eax + 291]
-// CHECK: vcvttnebf162iubs ymm2, word ptr [eax]{1to16}
+// CHECK: vcvttbf162iubs ymm2, word ptr [eax]{1to16}
// CHECK: encoding: [0x62,0xf5,0x7f,0x38,0x6a,0x10]
- vcvttnebf162iubs ymm2, word ptr [eax]{1to16}
+ vcvttbf162iubs ymm2, word ptr [eax]{1to16}
-// CHECK: vcvttnebf162iubs ymm2, ymmword ptr [2*ebp - 1024]
+// CHECK: vcvttbf162iubs ymm2, ymmword ptr [2*ebp - 1024]
// CHECK: encoding: [0x62,0xf5,0x7f,0x28,0x6a,0x14,0x6d,0x00,0xfc,0xff,0xff]
- vcvttnebf162iubs ymm2, ymmword ptr [2*ebp - 1024]
+ vcvttbf162iubs ymm2, ymmword ptr [2*ebp - 1024]
-// CHECK: vcvttnebf162iubs ymm2 {k7} {z}, ymmword ptr [ecx + 4064]
+// CHECK: vcvttbf162iubs ymm2 {k7} {z}, ymmword ptr [ecx + 4064]
// CHECK: encoding: [0x62,0xf5,0x7f,0xaf,0x6a,0x51,0x7f]
- vcvttnebf162iubs ymm2 {k7} {z}, ymmword ptr [ecx + 4064]
+ vcvttbf162iubs ymm2 {k7} {z}, ymmword ptr [ecx + 4064]
-// CHECK: vcvttnebf162iubs ymm2 {k7} {z}, word ptr [edx - 256]{1to16}
+// CHECK: vcvttbf162iubs ymm2 {k7} {z}, word ptr [edx - 256]{1to16}
// CHECK: encoding: [0x62,0xf5,0x7f,0xbf,0x6a,0x52,0x80]
- vcvttnebf162iubs ymm2 {k7} {z}, word ptr [edx - 256]{1to16}
+ vcvttbf162iubs ymm2 {k7} {z}, word ptr [edx - 256]{1to16}
-// CHECK: vcvttnebf162iubs zmm2, zmmword ptr [esp + 8*esi + 268435456]
+// CHECK: vcvttbf162iubs zmm2, zmmword ptr [esp + 8*esi + 268435456]
// CHECK: encoding: [0x62,0xf5,0x7f,0x48,0x6a,0x94,0xf4,0x00,0x00,0x00,0x10]
- vcvttnebf162iubs zmm2, zmmword ptr [esp + 8*esi + 268435456]
+ vcvttbf162iubs zmm2, zmmword ptr [esp + 8*esi + 268435456]
-// CHECK: vcvttnebf162iubs zmm2 {k7}, zmmword ptr [edi + 4*eax + 291]
+// CHECK: vcvttbf162iubs zmm2 {k7}, zmmword ptr [edi + 4*eax + 291]
// CHECK: encoding: [0x62,0xf5,0x7f,0x4f,0x6a,0x94,0x87,0x23,0x01,0x00,0x00]
- vcvttnebf162iubs zmm2 {k7}, zmmword ptr [edi + 4*eax + 291]
+ vcvttbf162iubs zmm2 {k7}, zmmword ptr [edi + 4*eax + 291]
-// CHECK: vcvttnebf162iubs zmm2, word ptr [eax]{1to32}
+// CHECK: vcvttbf162iubs zmm2, word ptr [eax]{1to32}
// CHECK: encoding: [0x62,0xf5,0x7f,0x58,0x6a,0x10]
- vcvttnebf162iubs zmm2, word ptr [eax]{1to32}
+ vcvttbf162iubs zmm2, word ptr [eax]{1to32}
-// CHECK: vcvttnebf162iubs zmm2, zmmword ptr [2*ebp - 2048]
+// CHECK: vcvttbf162iubs zmm2, zmmword ptr [2*ebp - 2048]
// CHECK: encoding: [0x62,0xf5,0x7f,0x48,0x6a,0x14,0x6d,0x00,0xf8,0xff,0xff]
- vcvttnebf162iubs zmm2, zmmword ptr [2*ebp - 2048]
+ vcvttbf162iubs zmm2, zmmword ptr [2*ebp - 2048]
-// CHECK: vcvttnebf162iubs zmm2 {k7} {z}, zmmword ptr [ecx + 8128]
+// CHECK: vcvttbf162iubs zmm2 {k7} {z}, zmmword ptr [ecx + 8128]
// CHECK: encoding: [0x62,0xf5,0x7f,0xcf,0x6a,0x51,0x7f]
- vcvttnebf162iubs zmm2 {k7} {z}, zmmword ptr [ecx + 8128]
+ vcvttbf162iubs zmm2 {k7} {z}, zmmword ptr [ecx + 8128]
-// CHECK: vcvttnebf162iubs zmm2 {k7} {z}, word ptr [edx - 256]{1to32}
+// CHECK: vcvttbf162iubs zmm2 {k7} {z}, word ptr [edx - 256]{1to32}
// CHECK: encoding: [0x62,0xf5,0x7f,0xdf,0x6a,0x52,0x80]
- vcvttnebf162iubs zmm2 {k7} {z}, word ptr [edx - 256]{1to32}
+ vcvttbf162iubs zmm2 {k7} {z}, word ptr [edx - 256]{1to32}
// CHECK: vcvttph2ibs xmm2, xmm3
// CHECK: encoding: [0x62,0xf5,0x7c,0x08,0x68,0xd3]
diff --git a/llvm/test/MC/X86/avx10.2satcvt-64-att.s b/llvm/test/MC/X86/avx10.2satcvt-64-att.s
index b6767b905b51d1..a5f9a62a1f8353 100644
--- a/llvm/test/MC/X86/avx10.2satcvt-64-att.s
+++ b/llvm/test/MC/X86/avx10.2satcvt-64-att.s
@@ -1,220 +1,220 @@
// RUN: llvm-mc -triple x86_64 --show-encoding %s | FileCheck %s
-// CHECK: vcvtnebf162ibs %xmm23, %xmm22
+// CHECK: vcvtbf162ibs %xmm23, %xmm22
// CHECK: encoding: [0x62,0xa5,0x7f,0x08,0x69,0xf7]
- vcvtnebf162ibs %xmm23, %xmm22
+ vcvtbf162ibs %xmm23, %xmm22
-// CHECK: vcvtnebf162ibs %xmm23, %xmm22 {%k7}
+// CHECK: vcvtbf162ibs %xmm23, %xmm22 {%k7}
// CHECK: encoding: [0x62,0xa5,0x7f,0x0f,0x69,0xf7]
- vcvtnebf162ibs %xmm23, %xmm22 {%k7}
+ vcvtbf162ibs %xmm23, %xmm22 {%k7}
-// CHECK: vcvtnebf162ibs %xmm23, %xmm22 {%k7} {z}
+// CHECK: vcvtbf162ibs %xmm23, %xmm22 {%k7} {z}
// CHECK: encoding: [0x62,0xa5,0x7f,0x8f,0x69,0xf7]
- vcvtnebf162ibs %xmm23, %xmm22 {%k7} {z}
+ vcvtbf162ibs %xmm23, %xmm22 {%k7} {z}
-// CHECK: vcvtnebf162ibs %zmm23, %zmm22
+// CHECK: vcvtbf162ibs %zmm23, %zmm22
// CHECK: encoding: [0x62,0xa5,0x7f,0x48,0x69,0xf7]
- vcvtnebf162ibs %zmm23, %zmm22
+ vcvtbf162ibs %zmm23, %zmm22
-// CHECK: vcvtnebf162ibs %zmm23, %zmm22 {%k7}
+// CHECK: vcvtbf162ibs %zmm23, %zmm22 {%k7}
// CHECK: encoding: [0x62,0xa5,0x7f,0x4f,0x69,0xf7]
- vcvtnebf162ibs %zmm23, %zmm22 {%k7}
+ vcvtbf162ibs %zmm23, %zmm22 {%k7}
-// CHECK: vcvtnebf162ibs %zmm23, %zmm22 {%k7} {z}
+// CHECK: vcvtbf162ibs %zmm23, %zmm22 {%k7} {z}
// CHECK: encoding: [0x62,0xa5,0x7f,0xcf,0x69,0xf7]
- vcvtnebf162ibs %zmm23, %zmm22 {%k7} {z}
+ vcvtbf162ibs %zmm23, %zmm22 {%k7} {z}
-// CHECK: vcvtnebf162ibs %ymm23, %ymm22
+// CHECK: vcvtbf162ibs %ymm23, %ymm22
// CHECK: encoding: [0x62,0xa5,0x7f,0x28,0x69,0xf7]
- vcvtnebf162ibs %ymm23, %ymm22
+ vcvtbf162ibs %ymm23, %ymm22
-// CHECK: vcvtnebf162ibs %ymm23, %ymm22 {%k7}
+// CHECK: vcvtbf162ibs %ymm23, %ymm22 {%k7}
// CHECK: encoding: [0x62,0xa5,0x7f,0x2f,0x69,0xf7]
- vcvtnebf162ibs %ymm23, %ymm22 {%k7}
+ vcvtbf162ibs %ymm23, %ymm22 {%k7}
-// CHECK: vcvtnebf162ibs %ymm23, %ymm22 {%k7} {z}
+// CHECK: vcvtbf162ibs %ymm23, %ymm22 {%k7} {z}
// CHECK: encoding: [0x62,0xa5,0x7f,0xaf,0x69,0xf7]
- vcvtnebf162ibs %ymm23, %ymm22 {%k7} {z}
+ vcvtbf162ibs %ymm23, %ymm22 {%k7} {z}
-// CHECK: vcvtnebf162ibs 268435456(%rbp,%r14,8), %xmm22
+// CHECK: vcvtbf162ibs 268435456(%rbp,%r14,8), %xmm22
// CHECK: encoding: [0x62,0xa5,0x7f,0x08,0x69,0xb4,0xf5,0x00,0x00,0x00,0x10]
- vcvtnebf162ibs 268435456(%rbp,%r14,8), %xmm22
+ vcvtbf162ibs 268435456(%rbp,%r14,8), %xmm22
-// CHECK: vcvtnebf162ibs 291(%r8,%rax,4), %xmm22 {%k7}
+// CHECK: vcvtbf162ibs 291(%r8,%rax,4), %xmm22 {%k7}
// CHECK: encoding: [0x62,0xc5,0x7f,0x0f,0x69,0xb4,0x80,0x23,0x01,0x00,0x00]
- vcvtnebf162ibs 291(%r8,%rax,4), %xmm22 {%k7}
+ vcvtbf162ibs 291(%r8,%rax,4), %xmm22 {%k7}
-// CHECK: vcvtnebf162ibs (%rip){1to8}, %xmm22
+// CHECK: vcvtbf162ibs (%rip){1to8}, %xmm22
// CHECK: encoding: [0x62,0xe5,0x7f,0x18,0x69,0x35,0x00,0x00,0x00,0x00]
- vcvtnebf162ibs (%rip){1to8}, %xmm22
+ vcvtbf162ibs (%rip){1to8}, %xmm22
-// CHECK: vcvtnebf162ibs -512(,%rbp,2), %xmm22
+// CHECK: vcvtbf162ibs -512(,%rbp,2), %xmm22
// CHECK: encoding: [0x62,0xe5,0x7f,0x08,0x69,0x34,0x6d,0x00,0xfe,0xff,0xff]
- vcvtnebf162ibs -512(,%rbp,2), %xmm22
+ vcvtbf162ibs -512(,%rbp,2), %xmm22
-// CHECK: vcvtnebf162ibs 2032(%rcx), %xmm22 {%k7} {z}
+// CHECK: vcvtbf162ibs 2032(%rcx), %xmm22 {%k7} {z}
// CHECK: encoding: [0x62,0xe5,0x7f,0x8f,0x69,0x71,0x7f]
- vcvtnebf162ibs 2032(%rcx), %xmm22 {%k7} {z}
+ vcvtbf162ibs 2032(%rcx), %xmm22 {%k7} {z}
-// CHECK: vcvtnebf162ibs -256(%rdx){1to8}, %xmm22 {%k7} {z}
+// CHECK: vcvtbf162ibs -256(%rdx){1to8}, %xmm22 {%k7} {z}
// CHECK: encoding: [0x62,0xe5,0x7f,0x9f,0x69,0x72,0x80]
- vcvtnebf162ibs -256(%rdx){1to8}, %xmm22 {%k7} {z}
+ vcvtbf162ibs -256(%rdx){1to8}, %xmm22 {%k7} {z}
-// CHECK: vcvtnebf162ibs 268435456(%rbp,%r14,8), %ymm22
+// CHECK: vcvtbf162ibs 268435456(%rbp,%r14,8), %ymm22
// CHECK: encoding: [0x62,0xa5,0x7f,0x28,0x69,0xb4,0xf5,0x00,0x00,0x00,0x10]
- vcvtnebf162ibs 268435456(%rbp,%r14,8), %ymm22
+ vcvtbf162ibs 268435456(%rbp,%r14,8), %ymm22
-// CHECK: vcvtnebf162ibs 291(%r8,%rax,4), %ymm22 {%k7}
+// CHECK: vcvtbf162ibs 291(%r8,%rax,4), %ymm22 {%k7}
// CHECK: encoding: [0x62,0xc5,0x7f,0x2f,0x69,0xb4,0x80,0x23,0x01,0x00,0x00]
- vcvtnebf162ibs 291(%r8,%rax,4), %ymm22 {%k7}
+ vcvtbf162ibs 291(%r8,%rax,4), %ymm22 {%k7}
-// CHECK: vcvtnebf162ibs (%rip){1to16}, %ymm22
+// CHECK: vcvtbf162ibs (%rip){1to16}, %ymm22
// CHECK: encoding: [0x62,0xe5,0x7f,0x38,0x69,0x35,0x00,0x00,0x00,0x00]
- vcvtnebf162ibs (%rip){1to16}, %ymm22
+ vcvtbf162ibs (%rip){1to16}, %ymm22
-// CHECK: vcvtnebf162ibs -1024(,%rbp,2), %ymm22
+// CHECK: vcvtbf162ibs -1024(,%rbp,2), %ymm22
// CHECK: encoding: [0x62,0xe5,0x7f,0x28,0x69,0x34,0x6d,0x00,0xfc,0xff,0xff]
- vcvtnebf162ibs -1024(,%rbp,2), %ymm22
+ vcvtbf162ibs -1024(,%rbp,2), %ymm22
-// CHECK: vcvtnebf162ibs 4064(%rcx), %ymm22 {%k7} {z}
+// CHECK: vcvtbf162ibs 4064(%rcx), %ymm22 {%k7} {z}
// CHECK: encoding: [0x62,0xe5,0x7f,0xaf,0x69,0x71,0x7f]
- vcvtnebf162ibs 4064(%rcx), %ymm22 {%k7} {z}
+ vcvtbf162ibs 4064(%rcx), %ymm22 {%k7} {z}
-// CHECK: vcvtnebf162ibs -256(%rdx){1to16}, %ymm22 {%k7} {z}
+// CHECK: vcvtbf162ibs -256(%rdx){1to16}, %ymm22 {%k7} {z}
// CHECK: encoding: [0x62,0xe5,0x7f,0xbf,0x69,0x72,0x80]
- vcvtnebf162ibs -256(%rdx){1to16}, %ymm22 {%k7} {z}
+ vcvtbf162ibs -256(%rdx){1to16}, %ymm22 {%k7} {z}
-// CHECK: vcvtnebf162ibs 268435456(%rbp,%r14,8), %zmm22
+// CHECK: vcvtbf162ibs 268435456(%rbp,%r14,8), %zmm22
// CHECK: encoding: [0x62,0xa5,0x7f,0x48,0x69,0xb4,0xf5,0x00,0x00,0x00,0x10]
- vcvtnebf162ibs 268435456(%rbp,%r14,8), %zmm22
+ vcvtbf162ibs 268435456(%rbp,%r14,8), %zmm22
-// CHECK: vcvtnebf162ibs 291(%r8,%rax,4), %zmm22 {%k7}
+// CHECK: vcvtbf162ibs 291(%r8,%rax,4), %zmm22 {%k7}
// CHECK: encoding: [0x62,0xc5,0x7f,0x4f,0x69,0xb4,0x80,0x23,0x01,0x00,0x00]
- vcvtnebf162ibs 291(%r8,%rax,4), %zmm22 {%k7}
+ vcvtbf162ibs 291(%r8,%rax,4), %zmm22 {%k7}
-// CHECK: vcvtnebf162ibs (%rip){1to32}, %zmm22
+// CHECK: vcvtbf162ibs (%rip){1to32}, %zmm22
// CHECK: encoding: [0x62,0xe5,0x7f,0x58,0x69,0x35,0x00,0x00,0x00,0x00]
- vcvtnebf162ibs (%rip){1to32}, %zmm22
+ vcvtbf162ibs (%rip){1to32}, %zmm22
-// CHECK: vcvtnebf162ibs -2048(,%rbp,2), %zmm22
+// CHECK: vcvtbf162ibs -2048(,%rbp,2), %zmm22
// CHECK: encoding: [0x62,0xe5,0x7f,0x48,0x69,0x34,0x6d,0x00,0xf8,0xff,0xff]
- vcvtnebf162ibs -2048(,%rbp,2), %zmm22
+ vcvtbf162ibs -2048(,%rbp,2), %zmm22
-// CHECK: vcvtnebf162ibs 8128(%rcx), %zmm22 {%k7} {z}
+// CHECK: vcvtbf162ibs 8128(%rcx), %zmm22 {%k7} {z}
// CHECK: encoding: [0x62,0xe5,0x7f,0xcf,0x69,0x71,0x7f]
- vcvtnebf162ibs 8128(%rcx), %zmm22 {%k7} {z}
+ vcvtbf162ibs 8128(%rcx), %zmm22 {%k7} {z}
-// CHECK: vcvtnebf162ibs -256(%rdx){1to32}, %zmm22 {%k7} {z}
+// CHECK: vcvtbf162ibs -256(%rdx){1to32}, %zmm22 {%k7} {z}
// CHECK: encoding: [0x62,0xe5,0x7f,0xdf,0x69,0x72,0x80]
- vcvtnebf162ibs -256(%rdx){1to32}, %zmm22 {%k7} {z}
+ vcvtbf162ibs -256(%rdx){1to32}, %zmm22 {%k7} {z}
-// CHECK: vcvtnebf162iubs %xmm23, %xmm22
+// CHECK: vcvtbf162iubs %xmm23, %xmm22
// CHECK: encoding: [0x62,0xa5,0x7f,0x08,0x6b,0xf7]
- vcvtnebf162iubs %xmm23, %xmm22
+ vcvtbf162iubs %xmm23, %xmm22
-// CHECK: vcvtnebf162iubs %xmm23, %xmm22 {%k7}
+// CHECK: vcvtbf162iubs %xmm23, %xmm22 {%k7}
// CHECK: encoding: [0x62,0xa5,0x7f,0x0f,0x6b,0xf7]
- vcvtnebf162iubs %xmm23, %xmm22 {%k7}
+ vcvtbf162iubs %xmm23, %xmm22 {%k7}
-// CHECK: vcvtnebf162iubs %xmm23, %xmm22 {%k7} {z}
+// CHECK: vcvtbf162iubs %xmm23, %xmm22 {%k7} {z}
// CHECK: encoding: [0x62,0xa5,0x7f,0x8f,0x6b,0xf7]
- vcvtnebf162iubs %xmm23, %xmm22 {%k7} {z}
+ vcvtbf162iubs %xmm23, %xmm22 {%k7} {z}
-// CHECK: vcvtnebf162iubs %zmm23, %zmm22
+// CHECK: vcvtbf162iubs %zmm23, %zmm22
// CHECK: encoding: [0x62,0xa5,0x7f,0x48,0x6b,0xf7]
- vcvtnebf162iubs %zmm23, %zmm22
+ vcvtbf162iubs %zmm23, %zmm22
-// CHECK: vcvtnebf162iubs %zmm23, %zmm22 {%k7}
+// CHECK: vcvtbf162iubs %zmm23, %zmm22 {%k7}
// CHECK: encoding: [0x62,0xa5,0x7f,0x4f,0x6b,0xf7]
- vcvtnebf162iubs %zmm23, %zmm22 {%k7}
+ vcvtbf162iubs %zmm23, %zmm22 {%k7}
-// CHECK: vcvtnebf162iubs %zmm23, %zmm22 {%k7} {z}
+// CHECK: vcvtbf162iubs %zmm23, %zmm22 {%k7} {z}
// CHECK: encoding: [0x62,0xa5,0x7f,0xcf,0x6b,0xf7]
- vcvtnebf162iubs %zmm23, %zmm22 {%k7} {z}
+ vcvtbf162iubs %zmm23, %zmm22 {%k7} {z}
-// CHECK: vcvtnebf162iubs %ymm23, %ymm22
+// CHECK: vcvtbf162iubs %ymm23, %ymm22
// CHECK: encoding: [0x62,0xa5,0x7f,0x28,0x6b,0xf7]
- vcvtnebf162iubs %ymm23, %ymm22
+ vcvtbf162iubs %ymm23, %ymm22
-// CHECK: vcvtnebf162iubs %ymm23, %ymm22 {%k7}
+// CHECK: vcvtbf162iubs %ymm23, %ymm22 {%k7}
// CHECK: encoding: [0x62,0xa5,0x7f,0x2f,0x6b,0xf7]
- vcvtnebf162iubs %ymm23, %ymm22 {%k7}
+ vcvtbf162iubs %ymm23, %ymm22 {%k7}
-// CHECK: vcvtnebf162iubs %ymm23, %ymm22 {%k7} {z}
+// CHECK: vcvtbf162iubs %ymm23, %ymm22 {%k7} {z}
// CHECK: encoding: [0x62,0xa5,0x7f,0xaf,0x6b,0xf7]
- vcvtnebf162iubs %ymm23, %ymm22 {%k7} {z}
+ vcvtbf162iubs %ymm23, %ymm22 {%k7} {z}
-// CHECK: vcvtnebf162iubs 268435456(%rbp,%r14,8), %xmm22
+// CHECK: vcvtbf162iubs 268435456(%rbp,%r14,8), %xmm22
// CHECK: encoding: [0x62,0xa5,0x7f,0x08,0x6b,0xb4,0xf5,0x00,0x00,0x00,0x10]
- vcvtnebf162iubs 268435456(%rbp,%r14,8), %xmm22
+ vcvtbf162iubs 268435456(%rbp,%r14,8), %xmm22
-// CHECK: vcvtnebf162iubs 291(%r8,%rax,4), %xmm22 {%k7}
+// CHECK: vcvtbf162iubs 291(%r8,%rax,4), %xmm22 {%k7}
// CHECK: encoding: [0x62,0xc5,0x7f,0x0f,0x6b,0xb4,0x80,0x23,0x01,0x00,0x00]
- vcvtnebf162iubs 291(%r8,%rax,4), %xmm22 {%k7}
+ vcvtbf162iubs 291(%r8,%rax,4), %xmm22 {%k7}
-// CHECK: vcvtnebf162iubs (%rip){1to8}, %xmm22
+// CHECK: vcvtbf162iubs (%rip){1to8}, %xmm22
// CHECK: encoding: [0x62,0xe5,0x7f,0x18,0x6b,0x35,0x00,0x00,0x00,0x00]
- vcvtnebf162iubs (%rip){1to8}, %xmm22
+ vcvtbf162iubs (%rip){1to8}, %xmm22
-// CHECK: vcvtnebf162iubs -512(,%rbp,2), %xmm22
+// CHECK: vcvtbf162iubs -512(,%rbp,2), %xmm22
// CHECK: encoding: [0x62,0xe5,0x7f,0x08,0x6b,0x34,0x6d,0x00,0xfe,0xff,0xff]
- vcvtnebf162iubs -512(,%rbp,2), %xmm22
+ vcvtbf162iubs -512(,%rbp,2), %xmm22
-// CHECK: vcvtnebf162iubs 2032(%rcx), %xmm22 {%k7} {z}
+// CHECK: vcvtbf162iubs 2032(%rcx), %xmm22 {%k7} {z}
// CHECK: encoding: [0x62,0xe5,0x7f,0x8f,0x6b,0x71,0x7f]
- vcvtnebf162iubs 2032(%rcx), %xmm22 {%k7} {z}
+ vcvtbf162iubs 2032(%rcx), %xmm22 {%k7} {z}
-// CHECK: vcvtnebf162iubs -256(%rdx){1to8}, %xmm22 {%k7} {z}
+// CHECK: vcvtbf162iubs -256(%rdx){1to8}, %xmm22 {%k7} {z}
// CHECK: encoding: [0x62,0xe5,0x7f,0x9f,0x6b,0x72,0x80]
- vcvtnebf162iubs -256(%rdx){1to8}, %xmm22 {%k7} {z}
+ vcvtbf162iubs -256(%rdx){1to8}, %xmm22 {%k7} {z}
-// CHECK: vcvtnebf162iubs 268435456(%rbp,%r14,8), %ymm22
+// CHECK: vcvtbf162iubs 268435456(%rbp,%r14,8), %ymm22
// CHECK: encoding: [0x62,0xa5,0x7f,0x28,0x6b,0xb4,0xf5,0x00,0x00,0x00,0x10]
- vcvtnebf162iubs 268435456(%rbp,%r14,8), %ymm22
+ vcvtbf162iubs 268435456(%rbp,%r14,8), %ymm22
-// CHECK: vcvtnebf162iubs 291(%r8,%rax,4), %ymm22 {%k7}
+// CHECK: vcvtbf162iubs 291(%r8,%rax,4), %ymm22 {%k7}
// CHECK: encoding: [0x62,0xc5,0x7f,0x2f,0x6b,0xb4,0x80,0x23,0x01,0x00,0x00]
- vcvtnebf162iubs 291(%r8,%rax,4), %ymm22 {%k7}
+ vcvtbf162iubs 291(%r8,%rax,4), %ymm22 {%k7}
-// CHECK: vcvtnebf162iubs (%rip){1to16}, %ymm22
+// CHECK: vcvtbf162iubs (%rip){1to16}, %ymm22
// CHECK: encoding: [0x62,0xe5,0x7f,0x38,0x6b,0x35,0x00,0x00,0x00,0x00]
- vcvtnebf162iubs (%rip){1to16}, %ymm22
+ vcvtbf162iubs (%rip){1to16}, %ymm22
-// CHECK: vcvtnebf162iubs -1024(,%rbp,2), %ymm22
+// CHECK: vcvtbf162iubs -1024(,%rbp,2), %ymm22
// CHECK: encoding: [0x62,0xe5,0x7f,0x28,0x6b,0x34,0x6d,0x00,0xfc,0xff,0xff]
- vcvtnebf162iubs -1024(,%rbp,2), %ymm22
+ vcvtbf162iubs -1024(,%rbp,2), %ymm22
-// CHECK: vcvtnebf162iubs 4064(%rcx), %ymm22 {%k7} {z}
+// CHECK: vcvtbf162iubs 4064(%rcx), %ymm22 {%k7} {z}
// CHECK: encoding: [0x62,0xe5,0x7f,0xaf,0x6b,0x71,0x7f]
- vcvtnebf162iubs 4064(%rcx), %ymm22 {%k7} {z}
+ vcvtbf162iubs 4064(%rcx), %ymm22 {%k7} {z}
-// CHECK: vcvtnebf162iubs -256(%rdx){1to16}, %ymm22 {%k7} {z}
+// CHECK: vcvtbf162iubs -256(%rdx){1to16}, %ymm22 {%k7} {z}
// CHECK: encoding: [0x62,0xe5,0x7f,0xbf,0x6b,0x72,0x80]
- vcvtnebf162iubs -256(%rdx){1to16}, %ymm22 {%k7} {z}
+ vcvtbf162iubs -256(%rdx){1to16}, %ymm22 {%k7} {z}
-// CHECK: vcvtnebf162iubs 268435456(%rbp,%r14,8), %zmm22
+// CHECK: vcvtbf162iubs 268435456(%rbp,%r14,8), %zmm22
// CHECK: encoding: [0x62,0xa5,0x7f,0x48,0x6b,0xb4,0xf5,0x00,0x00,0x00,0x10]
- vcvtnebf162iubs 268435456(%rbp,%r14,8), %zmm22
+ vcvtbf162iubs 268435456(%rbp,%r14,8), %zmm22
-// CHECK: vcvtnebf162iubs 291(%r8,%rax,4), %zmm22 {%k7}
+// CHECK: vcvtbf162iubs 291(%r8,%rax,4), %zmm22 {%k7}
// CHECK: encoding: [0x62,0xc5,0x7f,0x4f,0x6b,0xb4,0x80,0x23,0x01,0x00,0x00]
- vcvtnebf162iubs 291(%r8,%rax,4), %zmm22 {%k7}
+ vcvtbf162iubs 291(%r8,%rax,4), %zmm22 {%k7}
-// CHECK: vcvtnebf162iubs (%rip){1to32}, %zmm22
+// CHECK: vcvtbf162iubs (%rip){1to32}, %zmm22
// CHECK: encoding: [0x62,0xe5,0x7f,0x58,0x6b,0x35,0x00,0x00,0x00,0x00]
- vcvtnebf162iubs (%rip){1to32}, %zmm22
+ vcvtbf162iubs (%rip){1to32}, %zmm22
-// CHECK: vcvtnebf162iubs -2048(,%rbp,2), %zmm22
+// CHECK: vcvtbf162iubs -2048(,%rbp,2), %zmm22
// CHECK: encoding: [0x62,0xe5,0x7f,0x48,0x6b,0x34,0x6d,0x00,0xf8,0xff,0xff]
- vcvtnebf162iubs -2048(,%rbp,2), %zmm22
+ vcvtbf162iubs -2048(,%rbp,2), %zmm22
-// CHECK: vcvtnebf162iubs 8128(%rcx), %zmm22 {%k7} {z}
+// CHECK: vcvtbf162iubs 8128(%rcx), %zmm22 {%k7} {z}
// CHECK: encoding: [0x62,0xe5,0x7f,0xcf,0x6b,0x71,0x7f]
- vcvtnebf162iubs 8128(%rcx), %zmm22 {%k7} {z}
+ vcvtbf162iubs 8128(%rcx), %zmm22 {%k7} {z}
-// CHECK: vcvtnebf162iubs -256(%rdx){1to32}, %zmm22 {%k7} {z}
+// CHECK: vcvtbf162iubs -256(%rdx){1to32}, %zmm22 {%k7} {z}
// CHECK: encoding: [0x62,0xe5,0x7f,0xdf,0x6b,0x72,0x80]
- vcvtnebf162iubs -256(%rdx){1to32}, %zmm22 {%k7} {z}
+ vcvtbf162iubs -256(%rdx){1to32}, %zmm22 {%k7} {z}
// CHECK: vcvtph2ibs %xmm23, %xmm22
// CHECK: encoding: [0x62,0xa5,0x7c,0x08,0x69,0xf7]
@@ -680,221 +680,221 @@
// CHECK: encoding: [0x62,0xe5,0x7d,0xdf,0x6b,0x72,0x80]
vcvtps2iubs -512(%rdx){1to16}, %zmm22 {%k7} {z}
-// CHECK: vcvttnebf162ibs %xmm23, %xmm22
+// CHECK: vcvttbf162ibs %xmm23, %xmm22
// CHECK: encoding: [0x62,0xa5,0x7f,0x08,0x68,0xf7]
- vcvttnebf162ibs %xmm23, %xmm22
+ vcvttbf162ibs %xmm23, %xmm22
-// CHECK: vcvttnebf162ibs %xmm23, %xmm22 {%k7}
+// CHECK: vcvttbf162ibs %xmm23, %xmm22 {%k7}
// CHECK: encoding: [0x62,0xa5,0x7f,0x0f,0x68,0xf7]
- vcvttnebf162ibs %xmm23, %xmm22 {%k7}
+ vcvttbf162ibs %xmm23, %xmm22 {%k7}
-// CHECK: vcvttnebf162ibs %xmm23, %xmm22 {%k7} {z}
+// CHECK: vcvttbf162ibs %xmm23, %xmm22 {%k7} {z}
// CHECK: encoding: [0x62,0xa5,0x7f,0x8f,0x68,0xf7]
- vcvttnebf162ibs %xmm23, %xmm22 {%k7} {z}
+ vcvttbf162ibs %xmm23, %xmm22 {%k7} {z}
-// CHECK: vcvttnebf162ibs %zmm23, %zmm22
+// CHECK: vcvttbf162ibs %zmm23, %zmm22
// CHECK: encoding: [0x62,0xa5,0x7f,0x48,0x68,0xf7]
- vcvttnebf162ibs %zmm23, %zmm22
+ vcvttbf162ibs %zmm23, %zmm22
-// CHECK: vcvttnebf162ibs %zmm23, %zmm22 {%k7}
+// CHECK: vcvttbf162ibs %zmm23, %zmm22 {%k7}
// CHECK: encoding: [0x62,0xa5,0x7f,0x4f,0x68,0xf7]
- vcvttnebf162ibs %zmm23, %zmm22 {%k7}
+ vcvttbf162ibs %zmm23, %zmm22 {%k7}
-// CHECK: vcvttnebf162ibs %zmm23, %zmm22 {%k7} {z}
+// CHECK: vcvttbf162ibs %zmm23, %zmm22 {%k7} {z}
// CHECK: encoding: [0x62,0xa5,0x7f,0xcf,0x68,0xf7]
- vcvttnebf162ibs %zmm23, %zmm22 {%k7} {z}
+ vcvttbf162ibs %zmm23, %zmm22 {%k7} {z}
-// CHECK: vcvttnebf162ibs %ymm23, %ymm22
+// CHECK: vcvttbf162ibs %ymm23, %ymm22
// CHECK: encoding: [0x62,0xa5,0x7f,0x28,0x68,0xf7]
- vcvttnebf162ibs %ymm23, %ymm22
+ vcvttbf162ibs %ymm23, %ymm22
-// CHECK: vcvttnebf162ibs %ymm23, %ymm22 {%k7}
+// CHECK: vcvttbf162ibs %ymm23, %ymm22 {%k7}
// CHECK: encoding: [0x62,0xa5,0x7f,0x2f,0x68,0xf7]
- vcvttnebf162ibs %ymm23, %ymm22 {%k7}
+ vcvttbf162ibs %ymm23, %ymm22 {%k7}
-// CHECK: vcvttnebf162ibs %ymm23, %ymm22 {%k7} {z}
+// CHECK: vcvttbf162ibs %ymm23, %ymm22 {%k7} {z}
// CHECK: encoding: [0x62,0xa5,0x7f,0xaf,0x68,0xf7]
- vcvttnebf162ibs %ymm23, %ymm22 {%k7} {z}
+ vcvttbf162ibs %ymm23, %ymm22 {%k7} {z}
-// CHECK: vcvttnebf162ibs 268435456(%rbp,%r14,8), %xmm22
+// CHECK: vcvttbf162ibs 268435456(%rbp,%r14,8), %xmm22
// CHECK: encoding: [0x62,0xa5,0x7f,0x08,0x68,0xb4,0xf5,0x00,0x00,0x00,0x10]
- vcvttnebf162ibs 268435456(%rbp,%r14,8), %xmm22
+ vcvttbf162ibs 268435456(%rbp,%r14,8), %xmm22
-// CHECK: vcvttnebf162ibs 291(%r8,%rax,4), %xmm22 {%k7}
+// CHECK: vcvttbf162ibs 291(%r8,%rax,4), %xmm22 {%k7}
// CHECK: encoding: [0x62,0xc5,0x7f,0x0f,0x68,0xb4,0x80,0x23,0x01,0x00,0x00]
- vcvttnebf162ibs 291(%r8,%rax,4), %xmm22 {%k7}
+ vcvttbf162ibs 291(%r8,%rax,4), %xmm22 {%k7}
-// CHECK: vcvttnebf162ibs (%rip){1to8}, %xmm22
+// CHECK: vcvttbf162ibs (%rip){1to8}, %xmm22
// CHECK: encoding: [0x62,0xe5,0x7f,0x18,0x68,0x35,0x00,0x00,0x00,0x00]
- vcvttnebf162ibs (%rip){1to8}, %xmm22
+ vcvttbf162ibs (%rip){1to8}, %xmm22
-// CHECK: vcvttnebf162ibs -512(,%rbp,2), %xmm22
+// CHECK: vcvttbf162ibs -512(,%rbp,2), %xmm22
// CHECK: encoding: [0x62,0xe5,0x7f,0x08,0x68,0x34,0x6d,0x00,0xfe,0xff,0xff]
- vcvttnebf162ibs -512(,%rbp,2), %xmm22
+ vcvttbf162ibs -512(,%rbp,2), %xmm22
-// CHECK: vcvttnebf162ibs 2032(%rcx), %xmm22 {%k7} {z}
+// CHECK: vcvttbf162ibs 2032(%rcx), %xmm22 {%k7} {z}
// CHECK: encoding: [0x62,0xe5,0x7f,0x8f,0x68,0x71,0x7f]
- vcvttnebf162ibs 2032(%rcx), %xmm22 {%k7} {z}
+ vcvttbf162ibs 2032(%rcx), %xmm22 {%k7} {z}
-// CHECK: vcvttnebf162ibs -256(%rdx){1to8}, %xmm22 {%k7} {z}
+// CHECK: vcvttbf162ibs -256(%rdx){1to8}, %xmm22 {%k7} {z}
// CHECK: encoding: [0x62,0xe5,0x7f,0x9f,0x68,0x72,0x80]
- vcvttnebf162ibs -256(%rdx){1to8}, %xmm22 {%k7} {z}
+ vcvttbf162ibs -256(%rdx){1to8}, %xmm22 {%k7} {z}
-// CHECK: vcvttnebf162ibs 268435456(%rbp,%r14,8), %ymm22
+// CHECK: vcvttbf162ibs 268435456(%rbp,%r14,8), %ymm22
// CHECK: encoding: [0x62,0xa5,0x7f,0x28,0x68,0xb4,0xf5,0x00,0x00,0x00,0x10]
- vcvttnebf162ibs 268435456(%rbp,%r14,8), %ymm22
+ vcvttbf162ibs 268435456(%rbp,%r14,8), %ymm22
-// CHECK: vcvttnebf162ibs 291(%r8,%rax,4), %ymm22 {%k7}
+// CHECK: vcvttbf162ibs 291(%r8,%rax,4), %ymm22 {%k7}
// CHECK: encoding: [0x62,0xc5,0x7f,0x2f,0x68,0xb4,0x80,0x23,0x01,0x00,0x00]
- vcvttnebf162ibs 291(%r8,%rax,4), %ymm22 {%k7}
+ vcvttbf162ibs 291(%r8,%rax,4), %ymm22 {%k7}
-// CHECK: vcvttnebf162ibs (%rip){1to16}, %ymm22
+// CHECK: vcvttbf162ibs (%rip){1to16}, %ymm22
// CHECK: encoding: [0x62,0xe5,0x7f,0x38,0x68,0x35,0x00,0x00,0x00,0x00]
- vcvttnebf162ibs (%rip){1to16}, %ymm22
+ vcvttbf162ibs (%rip){1to16}, %ymm22
-// CHECK: vcvttnebf162ibs -1024(,%rbp,2), %ymm22
+// CHECK: vcvttbf162ibs -1024(,%rbp,2), %ymm22
// CHECK: encoding: [0x62,0xe5,0x7f,0x28,0x68,0x34,0x6d,0x00,0xfc,0xff,0xff]
- vcvttnebf162ibs -1024(,%rbp,2), %ymm22
+ vcvttbf162ibs -1024(,%rbp,2), %ymm22
-// CHECK: vcvttnebf162ibs 4064(%rcx), %ymm22 {%k7} {z}
+// CHECK: vcvttbf162ibs 4064(%rcx), %ymm22 {%k7} {z}
// CHECK: encoding: [0x62,0xe5,0x7f,0xaf,0x68,0x71,0x7f]
- vcvttnebf162ibs 4064(%rcx), %ymm22 {%k7} {z}
+ vcvttbf162ibs 4064(%rcx), %ymm22 {%k7} {z}
-// CHECK: vcvttnebf162ibs -256(%rdx){1to16}, %ymm22 {%k7} {z}
+// CHECK: vcvttbf162ibs -256(%rdx){1to16}, %ymm22 {%k7} {z}
// CHECK: encoding: [0x62,0xe5,0x7f,0xbf,0x68,0x72,0x80]
- vcvttnebf162ibs -256(%rdx){1to16}, %ymm22 {%k7} {z}
+ vcvttbf162ibs -256(%rdx){1to16}, %ymm22 {%k7} {z}
-// CHECK: vcvttnebf162ibs 268435456(%rbp,%r14,8), %zmm22
+// CHECK: vcvttbf162ibs 268435456(%rbp,%r14,8), %zmm22
// CHECK: encoding: [0x62,0xa5,0x7f,0x48,0x68,0xb4,0xf5,0x00,0x00,0x00,0x10]
- vcvttnebf162ibs 268435456(%rbp,%r14,8), %zmm22
+ vcvttbf162ibs 268435456(%rbp,%r14,8), %zmm22
-// CHECK: vcvttnebf162ibs 291(%r8,%rax,4), %zmm22 {%k7}
+// CHECK: vcvttbf162ibs 291(%r8,%rax,4), %zmm22 {%k7}
// CHECK: encoding: [0x62,0xc5,0x7f,0x4f,0x68,0xb4,0x80,0x23,0x01,0x00,0x00]
- vcvttnebf162ibs 291(%r8,%rax,4), %zmm22 {%k7}
+ vcvttbf162ibs 291(%r8,%rax,4), %zmm22 {%k7}
-// CHECK: vcvttnebf162ibs (%rip){1to32}, %zmm22
+// CHECK: vcvttbf162ibs (%rip){1to32}, %zmm22
// CHECK: encoding: [0x62,0xe5,0x7f,0x58,0x68,0x35,0x00,0x00,0x00,0x00]
- vcvttnebf162ibs (%rip){1to32}, %zmm22
+ vcvttbf162ibs (%rip){1to32}, %zmm22
-// CHECK: vcvttnebf162ibs -2048(,%rbp,2), %zmm22
+// CHECK: vcvttbf162ibs -2048(,%rbp,2), %zmm22
// CHECK: encoding: [0x62,0xe5,0x7f,0x48,0x68,0x34,0x6d,0x00,0xf8,0xff,0xff]
- vcvttnebf162ibs -2048(,%rbp,2), %zmm22
+ vcvttbf162ibs -2048(,%rbp,2), %zmm22
-// CHECK: vcvttnebf162ibs 8128(%rcx), %zmm22 {%k7} {z}
+// CHECK: vcvttbf162ibs 8128(%rcx), %zmm22 {%k7} {z}
// CHECK: encoding: [0x62,0xe5,0x7f,0xcf,0x68,0x71,0x7f]
- vcvttnebf162ibs 8128(%rcx), %zmm22 {%k7} {z}
+ vcvttbf162ibs 8128(%rcx), %zmm22 {%k7} {z}
-// CHECK: vcvttnebf162ibs -256(%rdx){1to32}, %zmm22 {%k7} {z}
+// CHECK: vcvttbf162ibs -256(%rdx){1to32}, %zmm22 {%k7} {z}
// CHECK: encoding: [0x62,0xe5,0x7f,0xdf,0x68,0x72,0x80]
- vcvttnebf162ibs -256(%rdx){1to32}, %zmm22 {%k7} {z}
+ vcvttbf162ibs -256(%rdx){1to32}, %zmm22 {%k7} {z}
-// CHECK: vcvttnebf162iubs %xmm23, %xmm22
+// CHECK: vcvttbf162iubs %xmm23, %xmm22
// CHECK: encoding: [0x62,0xa5,0x7f,0x08,0x6a,0xf7]
- vcvttnebf162iubs %xmm23, %xmm22
+ vcvttbf162iubs %xmm23, %xmm22
-// CHECK: vcvttnebf162iubs %xmm23, %xmm22 {%k7}
+// CHECK: vcvttbf162iubs %xmm23, %xmm22 {%k7}
// CHECK: encoding: [0x62,0xa5,0x7f,0x0f,0x6a,0xf7]
- vcvttnebf162iubs %xmm23, %xmm22 {%k7}
+ vcvttbf162iubs %xmm23, %xmm22 {%k7}
-// CHECK: vcvttnebf162iubs %xmm23, %xmm22 {%k7} {z}
+// CHECK: vcvttbf162iubs %xmm23, %xmm22 {%k7} {z}
// CHECK: encoding: [0x62,0xa5,0x7f,0x8f,0x6a,0xf7]
- vcvttnebf162iubs %xmm23, %xmm22 {%k7} {z}
+ vcvttbf162iubs %xmm23, %xmm22 {%k7} {z}
-// CHECK: vcvttnebf162iubs %zmm23, %zmm22
+// CHECK: vcvttbf162iubs %zmm23, %zmm22
// CHECK: encoding: [0x62,0xa5,0x7f,0x48,0x6a,0xf7]
- vcvttnebf162iubs %zmm23, %zmm22
+ vcvttbf162iubs %zmm23, %zmm22
-// CHECK: vcvttnebf162iubs %zmm23, %zmm22 {%k7}
+// CHECK: vcvttbf162iubs %zmm23, %zmm22 {%k7}
// CHECK: encoding: [0x62,0xa5,0x7f,0x4f,0x6a,0xf7]
- vcvttnebf162iubs %zmm23, %zmm22 {%k7}
+ vcvttbf162iubs %zmm23, %zmm22 {%k7}
-// CHECK: vcvttnebf162iubs %zmm23, %zmm22 {%k7} {z}
+// CHECK: vcvttbf162iubs %zmm23, %zmm22 {%k7} {z}
// CHECK: encoding: [0x62,0xa5,0x7f,0xcf,0x6a,0xf7]
- vcvttnebf162iubs %zmm23, %zmm22 {%k7} {z}
+ vcvttbf162iubs %zmm23, %zmm22 {%k7} {z}
-// CHECK: vcvttnebf162iubs %ymm23, %ymm22
+// CHECK: vcvttbf162iubs %ymm23, %ymm22
// CHECK: encoding: [0x62,0xa5,0x7f,0x28,0x6a,0xf7]
- vcvttnebf162iubs %ymm23, %ymm22
+ vcvttbf162iubs %ymm23, %ymm22
-// CHECK: vcvttnebf162iubs %ymm23, %ymm22 {%k7}
+// CHECK: vcvttbf162iubs %ymm23, %ymm22 {%k7}
// CHECK: encoding: [0x62,0xa5,0x7f,0x2f,0x6a,0xf7]
- vcvttnebf162iubs %ymm23, %ymm22 {%k7}
+ vcvttbf162iubs %ymm23, %ymm22 {%k7}
-// CHECK: vcvttnebf162iubs %ymm23, %ymm22 {%k7} {z}
+// CHECK: vcvttbf162iubs %ymm23, %ymm22 {%k7} {z}
// CHECK: encoding: [0x62,0xa5,0x7f,0xaf,0x6a,0xf7]
- vcvttnebf162iubs %ymm23, %ymm22 {%k7} {z}
+ vcvttbf162iubs %ymm23, %ymm22 {%k7} {z}
-// CHECK: vcvttnebf162iubs 268435456(%rbp,%r14,8), %xmm22
+// CHECK: vcvttbf162iubs 268435456(%rbp,%r14,8), %xmm22
// CHECK: encoding: [0x62,0xa5,0x7f,0x08,0x6a,0xb4,0xf5,0x00,0x00,0x00,0x10]
- vcvttnebf162iubs 268435456(%rbp,%r14,8), %xmm22
+ vcvttbf162iubs 268435456(%rbp,%r14,8), %xmm22
-// CHECK: vcvttnebf162iubs 291(%r8,%rax,4), %xmm22 {%k7}
+// CHECK: vcvttbf162iubs 291(%r8,%rax,4), %xmm22 {%k7}
// CHECK: encoding: [0x62,0xc5,0x7f,0x0f,0x6a,0xb4,0x80,0x23,0x01,0x00,0x00]
- vcvttnebf162iubs 291(%r8,%rax,4), %xmm22 {%k7}
+ vcvttbf162iubs 291(%r8,%rax,4), %xmm22 {%k7}
-// CHECK: vcvttnebf162iubs (%rip){1to8}, %xmm22
+// CHECK: vcvttbf162iubs (%rip){1to8}, %xmm22
// CHECK: encoding: [0x62,0xe5,0x7f,0x18,0x6a,0x35,0x00,0x00,0x00,0x00]
- vcvttnebf162iubs (%rip){1to8}, %xmm22
+ vcvttbf162iubs (%rip){1to8}, %xmm22
-// CHECK: vcvttnebf162iubs -512(,%rbp,2), %xmm22
+// CHECK: vcvttbf162iubs -512(,%rbp,2), %xmm22
// CHECK: encoding: [0x62,0xe5,0x7f,0x08,0x6a,0x34,0x6d,0x00,0xfe,0xff,0xff]
- vcvttnebf162iubs -512(,%rbp,2), %xmm22
+ vcvttbf162iubs -512(,%rbp,2), %xmm22
-// CHECK: vcvttnebf162iubs 2032(%rcx), %xmm22 {%k7} {z}
+// CHECK: vcvttbf162iubs 2032(%rcx), %xmm22 {%k7} {z}
// CHECK: encoding: [0x62,0xe5,0x7f,0x8f,0x6a,0x71,0x7f]
- vcvttnebf162iubs 2032(%rcx), %xmm22 {%k7} {z}
+ vcvttbf162iubs 2032(%rcx), %xmm22 {%k7} {z}
-// CHECK: vcvttnebf162iubs -256(%rdx){1to8}, %xmm22 {%k7} {z}
+// CHECK: vcvttbf162iubs -256(%rdx){1to8}, %xmm22 {%k7} {z}
// CHECK: encoding: [0x62,0xe5,0x7f,0x9f,0x6a,0x72,0x80]
- vcvttnebf162iubs -256(%rdx){1to8}, %xmm22 {%k7} {z}
+ vcvttbf162iubs -256(%rdx){1to8}, %xmm22 {%k7} {z}
-// CHECK: vcvttnebf162iubs 268435456(%rbp,%r14,8), %ymm22
+// CHECK: vcvttbf162iubs 268435456(%rbp,%r14,8), %ymm22
// CHECK: encoding: [0x62,0xa5,0x7f,0x28,0x6a,0xb4,0xf5,0x00,0x00,0x00,0x10]
- vcvttnebf162iubs 268435456(%rbp,%r14,8), %ymm22
+ vcvttbf162iubs 268435456(%rbp,%r14,8), %ymm22
-// CHECK: vcvttnebf162iubs 291(%r8,%rax,4), %ymm22 {%k7}
+// CHECK: vcvttbf162iubs 291(%r8,%rax,4), %ymm22 {%k7}
// CHECK: encoding: [0x62,0xc5,0x7f,0x2f,0x6a,0xb4,0x80,0x23,0x01,0x00,0x00]
- vcvttnebf162iubs 291(%r8,%rax,4), %ymm22 {%k7}
+ vcvttbf162iubs 291(%r8,%rax,4), %ymm22 {%k7}
-// CHECK: vcvttnebf162iubs (%rip){1to16}, %ymm22
+// CHECK: vcvttbf162iubs (%rip){1to16}, %ymm22
// CHECK: encoding: [0x62,0xe5,0x7f,0x38,0x6a,0x35,0x00,0x00,0x00,0x00]
- vcvttnebf162iubs (%rip){1to16}, %ymm22
+ vcvttbf162iubs (%rip){1to16}, %ymm22
-// CHECK: vcvttnebf162iubs -1024(,%rbp,2), %ymm22
+// CHECK: vcvttbf162iubs -1024(,%rbp,2), %ymm22
// CHECK: encoding: [0x62,0xe5,0x7f,0x28,0x6a,0x34,0x6d,0x00,0xfc,0xff,0xff]
- vcvttnebf162iubs -1024(,%rbp,2), %ymm22
+ vcvttbf162iubs -1024(,%rbp,2), %ymm22
-// CHECK: vcvttnebf162iubs 4064(%rcx), %ymm22 {%k7} {z}
+// CHECK: vcvttbf162iubs 4064(%rcx), %ymm22 {%k7} {z}
// CHECK: encoding: [0x62,0xe5,0x7f,0xaf,0x6a,0x71,0x7f]
- vcvttnebf162iubs 4064(%rcx), %ymm22 {%k7} {z}
+ vcvttbf162iubs 4064(%rcx), %ymm22 {%k7} {z}
-// CHECK: vcvttnebf162iubs -256(%rdx){1to16}, %ymm22 {%k7} {z}
+// CHECK: vcvttbf162iubs -256(%rdx){1to16}, %ymm22 {%k7} {z}
// CHECK: encoding: [0x62,0xe5,0x7f,0xbf,0x6a,0x72,0x80]
- vcvttnebf162iubs -256(%rdx){1to16}, %ymm22 {%k7} {z}
+ vcvttbf162iubs -256(%rdx){1to16}, %ymm22 {%k7} {z}
-// CHECK: vcvttnebf162iubs 268435456(%rbp,%r14,8), %zmm22
+// CHECK: vcvttbf162iubs 268435456(%rbp,%r14,8), %zmm22
// CHECK: encoding: [0x62,0xa5,0x7f,0x48,0x6a,0xb4,0xf5,0x00,0x00,0x00,0x10]
- vcvttnebf162iubs 268435456(%rbp,%r14,8), %zmm22
+ vcvttbf162iubs 268435456(%rbp,%r14,8), %zmm22
-// CHECK: vcvttnebf162iubs 291(%r8,%rax,4), %zmm22 {%k7}
+// CHECK: vcvttbf162iubs 291(%r8,%rax,4), %zmm22 {%k7}
// CHECK: encoding: [0x62,0xc5,0x7f,0x4f,0x6a,0xb4,0x80,0x23,0x01,0x00,0x00]
- vcvttnebf162iubs 291(%r8,%rax,4), %zmm22 {%k7}
+ vcvttbf162iubs 291(%r8,%rax,4), %zmm22 {%k7}
-// CHECK: vcvttnebf162iubs (%rip){1to32}, %zmm22
+// CHECK: vcvttbf162iubs (%rip){1to32}, %zmm22
// CHECK: encoding: [0x62,0xe5,0x7f,0x58,0x6a,0x35,0x00,0x00,0x00,0x00]
- vcvttnebf162iubs (%rip){1to32}, %zmm22
+ vcvttbf162iubs (%rip){1to32}, %zmm22
-// CHECK: vcvttnebf162iubs -2048(,%rbp,2), %zmm22
+// CHECK: vcvttbf162iubs -2048(,%rbp,2), %zmm22
// CHECK: encoding: [0x62,0xe5,0x7f,0x48,0x6a,0x34,0x6d,0x00,0xf8,0xff,0xff]
- vcvttnebf162iubs -2048(,%rbp,2), %zmm22
+ vcvttbf162iubs -2048(,%rbp,2), %zmm22
-// CHECK: vcvttnebf162iubs 8128(%rcx), %zmm22 {%k7} {z}
+// CHECK: vcvttbf162iubs 8128(%rcx), %zmm22 {%k7} {z}
// CHECK: encoding: [0x62,0xe5,0x7f,0xcf,0x6a,0x71,0x7f]
- vcvttnebf162iubs 8128(%rcx), %zmm22 {%k7} {z}
+ vcvttbf162iubs 8128(%rcx), %zmm22 {%k7} {z}
-// CHECK: vcvttnebf162iubs -256(%rdx){1to32}, %zmm22 {%k7} {z}
+// CHECK: vcvttbf162iubs -256(%rdx){1to32}, %zmm22 {%k7} {z}
// CHECK: encoding: [0x62,0xe5,0x7f,0xdf,0x6a,0x72,0x80]
- vcvttnebf162iubs -256(%rdx){1to32}, %zmm22 {%k7} {z}
+ vcvttbf162iubs -256(%rdx){1to32}, %zmm22 {%k7} {z}
// CHECK: vcvttph2ibs %xmm23, %xmm22
// CHECK: encoding: [0x62,0xa5,0x7c,0x08,0x68,0xf7]
diff --git a/llvm/test/MC/X86/avx10.2satcvt-64-intel.s b/llvm/test/MC/X86/avx10.2satcvt-64-intel.s
index e1df9dcc51a485..e633842abf43d3 100644
--- a/llvm/test/MC/X86/avx10.2satcvt-64-intel.s
+++ b/llvm/test/MC/X86/avx10.2satcvt-64-intel.s
@@ -1,220 +1,220 @@
// RUN: llvm-mc -triple x86_64 -x86-asm-syntax=intel -output-asm-variant=1 --show-encoding %s | FileCheck %s
-// CHECK: vcvtnebf162ibs xmm22, xmm23
+// CHECK: vcvtbf162ibs xmm22, xmm23
// CHECK: encoding: [0x62,0xa5,0x7f,0x08,0x69,0xf7]
- vcvtnebf162ibs xmm22, xmm23
+ vcvtbf162ibs xmm22, xmm23
-// CHECK: vcvtnebf162ibs xmm22 {k7}, xmm23
+// CHECK: vcvtbf162ibs xmm22 {k7}, xmm23
// CHECK: encoding: [0x62,0xa5,0x7f,0x0f,0x69,0xf7]
- vcvtnebf162ibs xmm22 {k7}, xmm23
+ vcvtbf162ibs xmm22 {k7}, xmm23
-// CHECK: vcvtnebf162ibs xmm22 {k7} {z}, xmm23
+// CHECK: vcvtbf162ibs xmm22 {k7} {z}, xmm23
// CHECK: encoding: [0x62,0xa5,0x7f,0x8f,0x69,0xf7]
- vcvtnebf162ibs xmm22 {k7} {z}, xmm23
+ vcvtbf162ibs xmm22 {k7} {z}, xmm23
-// CHECK: vcvtnebf162ibs zmm22, zmm23
+// CHECK: vcvtbf162ibs zmm22, zmm23
// CHECK: encoding: [0x62,0xa5,0x7f,0x48,0x69,0xf7]
- vcvtnebf162ibs zmm22, zmm23
+ vcvtbf162ibs zmm22, zmm23
-// CHECK: vcvtnebf162ibs zmm22 {k7}, zmm23
+// CHECK: vcvtbf162ibs zmm22 {k7}, zmm23
// CHECK: encoding: [0x62,0xa5,0x7f,0x4f,0x69,0xf7]
- vcvtnebf162ibs zmm22 {k7}, zmm23
+ vcvtbf162ibs zmm22 {k7}, zmm23
-// CHECK: vcvtnebf162ibs zmm22 {k7} {z}, zmm23
+// CHECK: vcvtbf162ibs zmm22 {k7} {z}, zmm23
// CHECK: encoding: [0x62,0xa5,0x7f,0xcf,0x69,0xf7]
- vcvtnebf162ibs zmm22 {k7} {z}, zmm23
+ vcvtbf162ibs zmm22 {k7} {z}, zmm23
-// CHECK: vcvtnebf162ibs ymm22, ymm23
+// CHECK: vcvtbf162ibs ymm22, ymm23
// CHECK: encoding: [0x62,0xa5,0x7f,0x28,0x69,0xf7]
- vcvtnebf162ibs ymm22, ymm23
+ vcvtbf162ibs ymm22, ymm23
-// CHECK: vcvtnebf162ibs ymm22 {k7}, ymm23
+// CHECK: vcvtbf162ibs ymm22 {k7}, ymm23
// CHECK: encoding: [0x62,0xa5,0x7f,0x2f,0x69,0xf7]
- vcvtnebf162ibs ymm22 {k7}, ymm23
+ vcvtbf162ibs ymm22 {k7}, ymm23
-// CHECK: vcvtnebf162ibs ymm22 {k7} {z}, ymm23
+// CHECK: vcvtbf162ibs ymm22 {k7} {z}, ymm23
// CHECK: encoding: [0x62,0xa5,0x7f,0xaf,0x69,0xf7]
- vcvtnebf162ibs ymm22 {k7} {z}, ymm23
+ vcvtbf162ibs ymm22 {k7} {z}, ymm23
-// CHECK: vcvtnebf162ibs xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: vcvtbf162ibs xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
// CHECK: encoding: [0x62,0xa5,0x7f,0x08,0x69,0xb4,0xf5,0x00,0x00,0x00,0x10]
- vcvtnebf162ibs xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
+ vcvtbf162ibs xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
-// CHECK: vcvtnebf162ibs xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
+// CHECK: vcvtbf162ibs xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
// CHECK: encoding: [0x62,0xc5,0x7f,0x0f,0x69,0xb4,0x80,0x23,0x01,0x00,0x00]
- vcvtnebf162ibs xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
+ vcvtbf162ibs xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
-// CHECK: vcvtnebf162ibs xmm22, word ptr [rip]{1to8}
+// CHECK: vcvtbf162ibs xmm22, word ptr [rip]{1to8}
// CHECK: encoding: [0x62,0xe5,0x7f,0x18,0x69,0x35,0x00,0x00,0x00,0x00]
- vcvtnebf162ibs xmm22, word ptr [rip]{1to8}
+ vcvtbf162ibs xmm22, word ptr [rip]{1to8}
-// CHECK: vcvtnebf162ibs xmm22, xmmword ptr [2*rbp - 512]
+// CHECK: vcvtbf162ibs xmm22, xmmword ptr [2*rbp - 512]
// CHECK: encoding: [0x62,0xe5,0x7f,0x08,0x69,0x34,0x6d,0x00,0xfe,0xff,0xff]
- vcvtnebf162ibs xmm22, xmmword ptr [2*rbp - 512]
+ vcvtbf162ibs xmm22, xmmword ptr [2*rbp - 512]
-// CHECK: vcvtnebf162ibs xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
+// CHECK: vcvtbf162ibs xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
// CHECK: encoding: [0x62,0xe5,0x7f,0x8f,0x69,0x71,0x7f]
- vcvtnebf162ibs xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
+ vcvtbf162ibs xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
-// CHECK: vcvtnebf162ibs xmm22 {k7} {z}, word ptr [rdx - 256]{1to8}
+// CHECK: vcvtbf162ibs xmm22 {k7} {z}, word ptr [rdx - 256]{1to8}
// CHECK: encoding: [0x62,0xe5,0x7f,0x9f,0x69,0x72,0x80]
- vcvtnebf162ibs xmm22 {k7} {z}, word ptr [rdx - 256]{1to8}
+ vcvtbf162ibs xmm22 {k7} {z}, word ptr [rdx - 256]{1to8}
-// CHECK: vcvtnebf162ibs ymm22, ymmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: vcvtbf162ibs ymm22, ymmword ptr [rbp + 8*r14 + 268435456]
// CHECK: encoding: [0x62,0xa5,0x7f,0x28,0x69,0xb4,0xf5,0x00,0x00,0x00,0x10]
- vcvtnebf162ibs ymm22, ymmword ptr [rbp + 8*r14 + 268435456]
+ vcvtbf162ibs ymm22, ymmword ptr [rbp + 8*r14 + 268435456]
-// CHECK: vcvtnebf162ibs ymm22 {k7}, ymmword ptr [r8 + 4*rax + 291]
+// CHECK: vcvtbf162ibs ymm22 {k7}, ymmword ptr [r8 + 4*rax + 291]
// CHECK: encoding: [0x62,0xc5,0x7f,0x2f,0x69,0xb4,0x80,0x23,0x01,0x00,0x00]
- vcvtnebf162ibs ymm22 {k7}, ymmword ptr [r8 + 4*rax + 291]
+ vcvtbf162ibs ymm22 {k7}, ymmword ptr [r8 + 4*rax + 291]
-// CHECK: vcvtnebf162ibs ymm22, word ptr [rip]{1to16}
+// CHECK: vcvtbf162ibs ymm22, word ptr [rip]{1to16}
// CHECK: encoding: [0x62,0xe5,0x7f,0x38,0x69,0x35,0x00,0x00,0x00,0x00]
- vcvtnebf162ibs ymm22, word ptr [rip]{1to16}
+ vcvtbf162ibs ymm22, word ptr [rip]{1to16}
-// CHECK: vcvtnebf162ibs ymm22, ymmword ptr [2*rbp - 1024]
+// CHECK: vcvtbf162ibs ymm22, ymmword ptr [2*rbp - 1024]
// CHECK: encoding: [0x62,0xe5,0x7f,0x28,0x69,0x34,0x6d,0x00,0xfc,0xff,0xff]
- vcvtnebf162ibs ymm22, ymmword ptr [2*rbp - 1024]
+ vcvtbf162ibs ymm22, ymmword ptr [2*rbp - 1024]
-// CHECK: vcvtnebf162ibs ymm22 {k7} {z}, ymmword ptr [rcx + 4064]
+// CHECK: vcvtbf162ibs ymm22 {k7} {z}, ymmword ptr [rcx + 4064]
// CHECK: encoding: [0x62,0xe5,0x7f,0xaf,0x69,0x71,0x7f]
- vcvtnebf162ibs ymm22 {k7} {z}, ymmword ptr [rcx + 4064]
+ vcvtbf162ibs ymm22 {k7} {z}, ymmword ptr [rcx + 4064]
-// CHECK: vcvtnebf162ibs ymm22 {k7} {z}, word ptr [rdx - 256]{1to16}
+// CHECK: vcvtbf162ibs ymm22 {k7} {z}, word ptr [rdx - 256]{1to16}
// CHECK: encoding: [0x62,0xe5,0x7f,0xbf,0x69,0x72,0x80]
- vcvtnebf162ibs ymm22 {k7} {z}, word ptr [rdx - 256]{1to16}
+ vcvtbf162ibs ymm22 {k7} {z}, word ptr [rdx - 256]{1to16}
-// CHECK: vcvtnebf162ibs zmm22, zmmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: vcvtbf162ibs zmm22, zmmword ptr [rbp + 8*r14 + 268435456]
// CHECK: encoding: [0x62,0xa5,0x7f,0x48,0x69,0xb4,0xf5,0x00,0x00,0x00,0x10]
- vcvtnebf162ibs zmm22, zmmword ptr [rbp + 8*r14 + 268435456]
+ vcvtbf162ibs zmm22, zmmword ptr [rbp + 8*r14 + 268435456]
-// CHECK: vcvtnebf162ibs zmm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
+// CHECK: vcvtbf162ibs zmm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
// CHECK: encoding: [0x62,0xc5,0x7f,0x4f,0x69,0xb4,0x80,0x23,0x01,0x00,0x00]
- vcvtnebf162ibs zmm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
+ vcvtbf162ibs zmm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
-// CHECK: vcvtnebf162ibs zmm22, word ptr [rip]{1to32}
+// CHECK: vcvtbf162ibs zmm22, word ptr [rip]{1to32}
// CHECK: encoding: [0x62,0xe5,0x7f,0x58,0x69,0x35,0x00,0x00,0x00,0x00]
- vcvtnebf162ibs zmm22, word ptr [rip]{1to32}
+ vcvtbf162ibs zmm22, word ptr [rip]{1to32}
-// CHECK: vcvtnebf162ibs zmm22, zmmword ptr [2*rbp - 2048]
+// CHECK: vcvtbf162ibs zmm22, zmmword ptr [2*rbp - 2048]
// CHECK: encoding: [0x62,0xe5,0x7f,0x48,0x69,0x34,0x6d,0x00,0xf8,0xff,0xff]
- vcvtnebf162ibs zmm22, zmmword ptr [2*rbp - 2048]
+ vcvtbf162ibs zmm22, zmmword ptr [2*rbp - 2048]
-// CHECK: vcvtnebf162ibs zmm22 {k7} {z}, zmmword ptr [rcx + 8128]
+// CHECK: vcvtbf162ibs zmm22 {k7} {z}, zmmword ptr [rcx + 8128]
// CHECK: encoding: [0x62,0xe5,0x7f,0xcf,0x69,0x71,0x7f]
- vcvtnebf162ibs zmm22 {k7} {z}, zmmword ptr [rcx + 8128]
+ vcvtbf162ibs zmm22 {k7} {z}, zmmword ptr [rcx + 8128]
-// CHECK: vcvtnebf162ibs zmm22 {k7} {z}, word ptr [rdx - 256]{1to32}
+// CHECK: vcvtbf162ibs zmm22 {k7} {z}, word ptr [rdx - 256]{1to32}
// CHECK: encoding: [0x62,0xe5,0x7f,0xdf,0x69,0x72,0x80]
- vcvtnebf162ibs zmm22 {k7} {z}, word ptr [rdx - 256]{1to32}
+ vcvtbf162ibs zmm22 {k7} {z}, word ptr [rdx - 256]{1to32}
-// CHECK: vcvtnebf162iubs xmm22, xmm23
+// CHECK: vcvtbf162iubs xmm22, xmm23
// CHECK: encoding: [0x62,0xa5,0x7f,0x08,0x6b,0xf7]
- vcvtnebf162iubs xmm22, xmm23
+ vcvtbf162iubs xmm22, xmm23
-// CHECK: vcvtnebf162iubs xmm22 {k7}, xmm23
+// CHECK: vcvtbf162iubs xmm22 {k7}, xmm23
// CHECK: encoding: [0x62,0xa5,0x7f,0x0f,0x6b,0xf7]
- vcvtnebf162iubs xmm22 {k7}, xmm23
+ vcvtbf162iubs xmm22 {k7}, xmm23
-// CHECK: vcvtnebf162iubs xmm22 {k7} {z}, xmm23
+// CHECK: vcvtbf162iubs xmm22 {k7} {z}, xmm23
// CHECK: encoding: [0x62,0xa5,0x7f,0x8f,0x6b,0xf7]
- vcvtnebf162iubs xmm22 {k7} {z}, xmm23
+ vcvtbf162iubs xmm22 {k7} {z}, xmm23
-// CHECK: vcvtnebf162iubs zmm22, zmm23
+// CHECK: vcvtbf162iubs zmm22, zmm23
// CHECK: encoding: [0x62,0xa5,0x7f,0x48,0x6b,0xf7]
- vcvtnebf162iubs zmm22, zmm23
+ vcvtbf162iubs zmm22, zmm23
-// CHECK: vcvtnebf162iubs zmm22 {k7}, zmm23
+// CHECK: vcvtbf162iubs zmm22 {k7}, zmm23
// CHECK: encoding: [0x62,0xa5,0x7f,0x4f,0x6b,0xf7]
- vcvtnebf162iubs zmm22 {k7}, zmm23
+ vcvtbf162iubs zmm22 {k7}, zmm23
-// CHECK: vcvtnebf162iubs zmm22 {k7} {z}, zmm23
+// CHECK: vcvtbf162iubs zmm22 {k7} {z}, zmm23
// CHECK: encoding: [0x62,0xa5,0x7f,0xcf,0x6b,0xf7]
- vcvtnebf162iubs zmm22 {k7} {z}, zmm23
+ vcvtbf162iubs zmm22 {k7} {z}, zmm23
-// CHECK: vcvtnebf162iubs ymm22, ymm23
+// CHECK: vcvtbf162iubs ymm22, ymm23
// CHECK: encoding: [0x62,0xa5,0x7f,0x28,0x6b,0xf7]
- vcvtnebf162iubs ymm22, ymm23
+ vcvtbf162iubs ymm22, ymm23
-// CHECK: vcvtnebf162iubs ymm22 {k7}, ymm23
+// CHECK: vcvtbf162iubs ymm22 {k7}, ymm23
// CHECK: encoding: [0x62,0xa5,0x7f,0x2f,0x6b,0xf7]
- vcvtnebf162iubs ymm22 {k7}, ymm23
+ vcvtbf162iubs ymm22 {k7}, ymm23
-// CHECK: vcvtnebf162iubs ymm22 {k7} {z}, ymm23
+// CHECK: vcvtbf162iubs ymm22 {k7} {z}, ymm23
// CHECK: encoding: [0x62,0xa5,0x7f,0xaf,0x6b,0xf7]
- vcvtnebf162iubs ymm22 {k7} {z}, ymm23
+ vcvtbf162iubs ymm22 {k7} {z}, ymm23
-// CHECK: vcvtnebf162iubs xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: vcvtbf162iubs xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
// CHECK: encoding: [0x62,0xa5,0x7f,0x08,0x6b,0xb4,0xf5,0x00,0x00,0x00,0x10]
- vcvtnebf162iubs xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
+ vcvtbf162iubs xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
-// CHECK: vcvtnebf162iubs xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
+// CHECK: vcvtbf162iubs xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
// CHECK: encoding: [0x62,0xc5,0x7f,0x0f,0x6b,0xb4,0x80,0x23,0x01,0x00,0x00]
- vcvtnebf162iubs xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
+ vcvtbf162iubs xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
-// CHECK: vcvtnebf162iubs xmm22, word ptr [rip]{1to8}
+// CHECK: vcvtbf162iubs xmm22, word ptr [rip]{1to8}
// CHECK: encoding: [0x62,0xe5,0x7f,0x18,0x6b,0x35,0x00,0x00,0x00,0x00]
- vcvtnebf162iubs xmm22, word ptr [rip]{1to8}
+ vcvtbf162iubs xmm22, word ptr [rip]{1to8}
-// CHECK: vcvtnebf162iubs xmm22, xmmword ptr [2*rbp - 512]
+// CHECK: vcvtbf162iubs xmm22, xmmword ptr [2*rbp - 512]
// CHECK: encoding: [0x62,0xe5,0x7f,0x08,0x6b,0x34,0x6d,0x00,0xfe,0xff,0xff]
- vcvtnebf162iubs xmm22, xmmword ptr [2*rbp - 512]
+ vcvtbf162iubs xmm22, xmmword ptr [2*rbp - 512]
-// CHECK: vcvtnebf162iubs xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
+// CHECK: vcvtbf162iubs xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
// CHECK: encoding: [0x62,0xe5,0x7f,0x8f,0x6b,0x71,0x7f]
- vcvtnebf162iubs xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
+ vcvtbf162iubs xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
-// CHECK: vcvtnebf162iubs xmm22 {k7} {z}, word ptr [rdx - 256]{1to8}
+// CHECK: vcvtbf162iubs xmm22 {k7} {z}, word ptr [rdx - 256]{1to8}
// CHECK: encoding: [0x62,0xe5,0x7f,0x9f,0x6b,0x72,0x80]
- vcvtnebf162iubs xmm22 {k7} {z}, word ptr [rdx - 256]{1to8}
+ vcvtbf162iubs xmm22 {k7} {z}, word ptr [rdx - 256]{1to8}
-// CHECK: vcvtnebf162iubs ymm22, ymmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: vcvtbf162iubs ymm22, ymmword ptr [rbp + 8*r14 + 268435456]
// CHECK: encoding: [0x62,0xa5,0x7f,0x28,0x6b,0xb4,0xf5,0x00,0x00,0x00,0x10]
- vcvtnebf162iubs ymm22, ymmword ptr [rbp + 8*r14 + 268435456]
+ vcvtbf162iubs ymm22, ymmword ptr [rbp + 8*r14 + 268435456]
-// CHECK: vcvtnebf162iubs ymm22 {k7}, ymmword ptr [r8 + 4*rax + 291]
+// CHECK: vcvtbf162iubs ymm22 {k7}, ymmword ptr [r8 + 4*rax + 291]
// CHECK: encoding: [0x62,0xc5,0x7f,0x2f,0x6b,0xb4,0x80,0x23,0x01,0x00,0x00]
- vcvtnebf162iubs ymm22 {k7}, ymmword ptr [r8 + 4*rax + 291]
+ vcvtbf162iubs ymm22 {k7}, ymmword ptr [r8 + 4*rax + 291]
-// CHECK: vcvtnebf162iubs ymm22, word ptr [rip]{1to16}
+// CHECK: vcvtbf162iubs ymm22, word ptr [rip]{1to16}
// CHECK: encoding: [0x62,0xe5,0x7f,0x38,0x6b,0x35,0x00,0x00,0x00,0x00]
- vcvtnebf162iubs ymm22, word ptr [rip]{1to16}
+ vcvtbf162iubs ymm22, word ptr [rip]{1to16}
-// CHECK: vcvtnebf162iubs ymm22, ymmword ptr [2*rbp - 1024]
+// CHECK: vcvtbf162iubs ymm22, ymmword ptr [2*rbp - 1024]
// CHECK: encoding: [0x62,0xe5,0x7f,0x28,0x6b,0x34,0x6d,0x00,0xfc,0xff,0xff]
- vcvtnebf162iubs ymm22, ymmword ptr [2*rbp - 1024]
+ vcvtbf162iubs ymm22, ymmword ptr [2*rbp - 1024]
-// CHECK: vcvtnebf162iubs ymm22 {k7} {z}, ymmword ptr [rcx + 4064]
+// CHECK: vcvtbf162iubs ymm22 {k7} {z}, ymmword ptr [rcx + 4064]
// CHECK: encoding: [0x62,0xe5,0x7f,0xaf,0x6b,0x71,0x7f]
- vcvtnebf162iubs ymm22 {k7} {z}, ymmword ptr [rcx + 4064]
+ vcvtbf162iubs ymm22 {k7} {z}, ymmword ptr [rcx + 4064]
-// CHECK: vcvtnebf162iubs ymm22 {k7} {z}, word ptr [rdx - 256]{1to16}
+// CHECK: vcvtbf162iubs ymm22 {k7} {z}, word ptr [rdx - 256]{1to16}
// CHECK: encoding: [0x62,0xe5,0x7f,0xbf,0x6b,0x72,0x80]
- vcvtnebf162iubs ymm22 {k7} {z}, word ptr [rdx - 256]{1to16}
+ vcvtbf162iubs ymm22 {k7} {z}, word ptr [rdx - 256]{1to16}
-// CHECK: vcvtnebf162iubs zmm22, zmmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: vcvtbf162iubs zmm22, zmmword ptr [rbp + 8*r14 + 268435456]
// CHECK: encoding: [0x62,0xa5,0x7f,0x48,0x6b,0xb4,0xf5,0x00,0x00,0x00,0x10]
- vcvtnebf162iubs zmm22, zmmword ptr [rbp + 8*r14 + 268435456]
+ vcvtbf162iubs zmm22, zmmword ptr [rbp + 8*r14 + 268435456]
-// CHECK: vcvtnebf162iubs zmm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
+// CHECK: vcvtbf162iubs zmm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
// CHECK: encoding: [0x62,0xc5,0x7f,0x4f,0x6b,0xb4,0x80,0x23,0x01,0x00,0x00]
- vcvtnebf162iubs zmm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
+ vcvtbf162iubs zmm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
-// CHECK: vcvtnebf162iubs zmm22, word ptr [rip]{1to32}
+// CHECK: vcvtbf162iubs zmm22, word ptr [rip]{1to32}
// CHECK: encoding: [0x62,0xe5,0x7f,0x58,0x6b,0x35,0x00,0x00,0x00,0x00]
- vcvtnebf162iubs zmm22, word ptr [rip]{1to32}
+ vcvtbf162iubs zmm22, word ptr [rip]{1to32}
-// CHECK: vcvtnebf162iubs zmm22, zmmword ptr [2*rbp - 2048]
+// CHECK: vcvtbf162iubs zmm22, zmmword ptr [2*rbp - 2048]
// CHECK: encoding: [0x62,0xe5,0x7f,0x48,0x6b,0x34,0x6d,0x00,0xf8,0xff,0xff]
- vcvtnebf162iubs zmm22, zmmword ptr [2*rbp - 2048]
+ vcvtbf162iubs zmm22, zmmword ptr [2*rbp - 2048]
-// CHECK: vcvtnebf162iubs zmm22 {k7} {z}, zmmword ptr [rcx + 8128]
+// CHECK: vcvtbf162iubs zmm22 {k7} {z}, zmmword ptr [rcx + 8128]
// CHECK: encoding: [0x62,0xe5,0x7f,0xcf,0x6b,0x71,0x7f]
- vcvtnebf162iubs zmm22 {k7} {z}, zmmword ptr [rcx + 8128]
+ vcvtbf162iubs zmm22 {k7} {z}, zmmword ptr [rcx + 8128]
-// CHECK: vcvtnebf162iubs zmm22 {k7} {z}, word ptr [rdx - 256]{1to32}
+// CHECK: vcvtbf162iubs zmm22 {k7} {z}, word ptr [rdx - 256]{1to32}
// CHECK: encoding: [0x62,0xe5,0x7f,0xdf,0x6b,0x72,0x80]
- vcvtnebf162iubs zmm22 {k7} {z}, word ptr [rdx - 256]{1to32}
+ vcvtbf162iubs zmm22 {k7} {z}, word ptr [rdx - 256]{1to32}
// CHECK: vcvtph2ibs xmm22, xmm23
// CHECK: encoding: [0x62,0xa5,0x7c,0x08,0x69,0xf7]
@@ -680,221 +680,221 @@
// CHECK: encoding: [0x62,0xe5,0x7d,0xdf,0x6b,0x72,0x80]
vcvtps2iubs zmm22 {k7} {z}, dword ptr [rdx - 512]{1to16}
-// CHECK: vcvttnebf162ibs xmm22, xmm23
+// CHECK: vcvttbf162ibs xmm22, xmm23
// CHECK: encoding: [0x62,0xa5,0x7f,0x08,0x68,0xf7]
- vcvttnebf162ibs xmm22, xmm23
+ vcvttbf162ibs xmm22, xmm23
-// CHECK: vcvttnebf162ibs xmm22 {k7}, xmm23
+// CHECK: vcvttbf162ibs xmm22 {k7}, xmm23
// CHECK: encoding: [0x62,0xa5,0x7f,0x0f,0x68,0xf7]
- vcvttnebf162ibs xmm22 {k7}, xmm23
+ vcvttbf162ibs xmm22 {k7}, xmm23
-// CHECK: vcvttnebf162ibs xmm22 {k7} {z}, xmm23
+// CHECK: vcvttbf162ibs xmm22 {k7} {z}, xmm23
// CHECK: encoding: [0x62,0xa5,0x7f,0x8f,0x68,0xf7]
- vcvttnebf162ibs xmm22 {k7} {z}, xmm23
+ vcvttbf162ibs xmm22 {k7} {z}, xmm23
-// CHECK: vcvttnebf162ibs zmm22, zmm23
+// CHECK: vcvttbf162ibs zmm22, zmm23
// CHECK: encoding: [0x62,0xa5,0x7f,0x48,0x68,0xf7]
- vcvttnebf162ibs zmm22, zmm23
+ vcvttbf162ibs zmm22, zmm23
-// CHECK: vcvttnebf162ibs zmm22 {k7}, zmm23
+// CHECK: vcvttbf162ibs zmm22 {k7}, zmm23
// CHECK: encoding: [0x62,0xa5,0x7f,0x4f,0x68,0xf7]
- vcvttnebf162ibs zmm22 {k7}, zmm23
+ vcvttbf162ibs zmm22 {k7}, zmm23
-// CHECK: vcvttnebf162ibs zmm22 {k7} {z}, zmm23
+// CHECK: vcvttbf162ibs zmm22 {k7} {z}, zmm23
// CHECK: encoding: [0x62,0xa5,0x7f,0xcf,0x68,0xf7]
- vcvttnebf162ibs zmm22 {k7} {z}, zmm23
+ vcvttbf162ibs zmm22 {k7} {z}, zmm23
-// CHECK: vcvttnebf162ibs ymm22, ymm23
+// CHECK: vcvttbf162ibs ymm22, ymm23
// CHECK: encoding: [0x62,0xa5,0x7f,0x28,0x68,0xf7]
- vcvttnebf162ibs ymm22, ymm23
+ vcvttbf162ibs ymm22, ymm23
-// CHECK: vcvttnebf162ibs ymm22 {k7}, ymm23
+// CHECK: vcvttbf162ibs ymm22 {k7}, ymm23
// CHECK: encoding: [0x62,0xa5,0x7f,0x2f,0x68,0xf7]
- vcvttnebf162ibs ymm22 {k7}, ymm23
+ vcvttbf162ibs ymm22 {k7}, ymm23
-// CHECK: vcvttnebf162ibs ymm22 {k7} {z}, ymm23
+// CHECK: vcvttbf162ibs ymm22 {k7} {z}, ymm23
// CHECK: encoding: [0x62,0xa5,0x7f,0xaf,0x68,0xf7]
- vcvttnebf162ibs ymm22 {k7} {z}, ymm23
+ vcvttbf162ibs ymm22 {k7} {z}, ymm23
-// CHECK: vcvttnebf162ibs xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: vcvttbf162ibs xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
// CHECK: encoding: [0x62,0xa5,0x7f,0x08,0x68,0xb4,0xf5,0x00,0x00,0x00,0x10]
- vcvttnebf162ibs xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
+ vcvttbf162ibs xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
-// CHECK: vcvttnebf162ibs xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
+// CHECK: vcvttbf162ibs xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
// CHECK: encoding: [0x62,0xc5,0x7f,0x0f,0x68,0xb4,0x80,0x23,0x01,0x00,0x00]
- vcvttnebf162ibs xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
+ vcvttbf162ibs xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
-// CHECK: vcvttnebf162ibs xmm22, word ptr [rip]{1to8}
+// CHECK: vcvttbf162ibs xmm22, word ptr [rip]{1to8}
// CHECK: encoding: [0x62,0xe5,0x7f,0x18,0x68,0x35,0x00,0x00,0x00,0x00]
- vcvttnebf162ibs xmm22, word ptr [rip]{1to8}
+ vcvttbf162ibs xmm22, word ptr [rip]{1to8}
-// CHECK: vcvttnebf162ibs xmm22, xmmword ptr [2*rbp - 512]
+// CHECK: vcvttbf162ibs xmm22, xmmword ptr [2*rbp - 512]
// CHECK: encoding: [0x62,0xe5,0x7f,0x08,0x68,0x34,0x6d,0x00,0xfe,0xff,0xff]
- vcvttnebf162ibs xmm22, xmmword ptr [2*rbp - 512]
+ vcvttbf162ibs xmm22, xmmword ptr [2*rbp - 512]
-// CHECK: vcvttnebf162ibs xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
+// CHECK: vcvttbf162ibs xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
// CHECK: encoding: [0x62,0xe5,0x7f,0x8f,0x68,0x71,0x7f]
- vcvttnebf162ibs xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
+ vcvttbf162ibs xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
-// CHECK: vcvttnebf162ibs xmm22 {k7} {z}, word ptr [rdx - 256]{1to8}
+// CHECK: vcvttbf162ibs xmm22 {k7} {z}, word ptr [rdx - 256]{1to8}
// CHECK: encoding: [0x62,0xe5,0x7f,0x9f,0x68,0x72,0x80]
- vcvttnebf162ibs xmm22 {k7} {z}, word ptr [rdx - 256]{1to8}
+ vcvttbf162ibs xmm22 {k7} {z}, word ptr [rdx - 256]{1to8}
-// CHECK: vcvttnebf162ibs ymm22, ymmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: vcvttbf162ibs ymm22, ymmword ptr [rbp + 8*r14 + 268435456]
// CHECK: encoding: [0x62,0xa5,0x7f,0x28,0x68,0xb4,0xf5,0x00,0x00,0x00,0x10]
- vcvttnebf162ibs ymm22, ymmword ptr [rbp + 8*r14 + 268435456]
+ vcvttbf162ibs ymm22, ymmword ptr [rbp + 8*r14 + 268435456]
-// CHECK: vcvttnebf162ibs ymm22 {k7}, ymmword ptr [r8 + 4*rax + 291]
+// CHECK: vcvttbf162ibs ymm22 {k7}, ymmword ptr [r8 + 4*rax + 291]
// CHECK: encoding: [0x62,0xc5,0x7f,0x2f,0x68,0xb4,0x80,0x23,0x01,0x00,0x00]
- vcvttnebf162ibs ymm22 {k7}, ymmword ptr [r8 + 4*rax + 291]
+ vcvttbf162ibs ymm22 {k7}, ymmword ptr [r8 + 4*rax + 291]
-// CHECK: vcvttnebf162ibs ymm22, word ptr [rip]{1to16}
+// CHECK: vcvttbf162ibs ymm22, word ptr [rip]{1to16}
// CHECK: encoding: [0x62,0xe5,0x7f,0x38,0x68,0x35,0x00,0x00,0x00,0x00]
- vcvttnebf162ibs ymm22, word ptr [rip]{1to16}
+ vcvttbf162ibs ymm22, word ptr [rip]{1to16}
-// CHECK: vcvttnebf162ibs ymm22, ymmword ptr [2*rbp - 1024]
+// CHECK: vcvttbf162ibs ymm22, ymmword ptr [2*rbp - 1024]
// CHECK: encoding: [0x62,0xe5,0x7f,0x28,0x68,0x34,0x6d,0x00,0xfc,0xff,0xff]
- vcvttnebf162ibs ymm22, ymmword ptr [2*rbp - 1024]
+ vcvttbf162ibs ymm22, ymmword ptr [2*rbp - 1024]
-// CHECK: vcvttnebf162ibs ymm22 {k7} {z}, ymmword ptr [rcx + 4064]
+// CHECK: vcvttbf162ibs ymm22 {k7} {z}, ymmword ptr [rcx + 4064]
// CHECK: encoding: [0x62,0xe5,0x7f,0xaf,0x68,0x71,0x7f]
- vcvttnebf162ibs ymm22 {k7} {z}, ymmword ptr [rcx + 4064]
+ vcvttbf162ibs ymm22 {k7} {z}, ymmword ptr [rcx + 4064]
-// CHECK: vcvttnebf162ibs ymm22 {k7} {z}, word ptr [rdx - 256]{1to16}
+// CHECK: vcvttbf162ibs ymm22 {k7} {z}, word ptr [rdx - 256]{1to16}
// CHECK: encoding: [0x62,0xe5,0x7f,0xbf,0x68,0x72,0x80]
- vcvttnebf162ibs ymm22 {k7} {z}, word ptr [rdx - 256]{1to16}
+ vcvttbf162ibs ymm22 {k7} {z}, word ptr [rdx - 256]{1to16}
-// CHECK: vcvttnebf162ibs zmm22, zmmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: vcvttbf162ibs zmm22, zmmword ptr [rbp + 8*r14 + 268435456]
// CHECK: encoding: [0x62,0xa5,0x7f,0x48,0x68,0xb4,0xf5,0x00,0x00,0x00,0x10]
- vcvttnebf162ibs zmm22, zmmword ptr [rbp + 8*r14 + 268435456]
+ vcvttbf162ibs zmm22, zmmword ptr [rbp + 8*r14 + 268435456]
-// CHECK: vcvttnebf162ibs zmm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
+// CHECK: vcvttbf162ibs zmm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
// CHECK: encoding: [0x62,0xc5,0x7f,0x4f,0x68,0xb4,0x80,0x23,0x01,0x00,0x00]
- vcvttnebf162ibs zmm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
+ vcvttbf162ibs zmm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
-// CHECK: vcvttnebf162ibs zmm22, word ptr [rip]{1to32}
+// CHECK: vcvttbf162ibs zmm22, word ptr [rip]{1to32}
// CHECK: encoding: [0x62,0xe5,0x7f,0x58,0x68,0x35,0x00,0x00,0x00,0x00]
- vcvttnebf162ibs zmm22, word ptr [rip]{1to32}
+ vcvttbf162ibs zmm22, word ptr [rip]{1to32}
-// CHECK: vcvttnebf162ibs zmm22, zmmword ptr [2*rbp - 2048]
+// CHECK: vcvttbf162ibs zmm22, zmmword ptr [2*rbp - 2048]
// CHECK: encoding: [0x62,0xe5,0x7f,0x48,0x68,0x34,0x6d,0x00,0xf8,0xff,0xff]
- vcvttnebf162ibs zmm22, zmmword ptr [2*rbp - 2048]
+ vcvttbf162ibs zmm22, zmmword ptr [2*rbp - 2048]
-// CHECK: vcvttnebf162ibs zmm22 {k7} {z}, zmmword ptr [rcx + 8128]
+// CHECK: vcvttbf162ibs zmm22 {k7} {z}, zmmword ptr [rcx + 8128]
// CHECK: encoding: [0x62,0xe5,0x7f,0xcf,0x68,0x71,0x7f]
- vcvttnebf162ibs zmm22 {k7} {z}, zmmword ptr [rcx + 8128]
+ vcvttbf162ibs zmm22 {k7} {z}, zmmword ptr [rcx + 8128]
-// CHECK: vcvttnebf162ibs zmm22 {k7} {z}, word ptr [rdx - 256]{1to32}
+// CHECK: vcvttbf162ibs zmm22 {k7} {z}, word ptr [rdx - 256]{1to32}
// CHECK: encoding: [0x62,0xe5,0x7f,0xdf,0x68,0x72,0x80]
- vcvttnebf162ibs zmm22 {k7} {z}, word ptr [rdx - 256]{1to32}
+ vcvttbf162ibs zmm22 {k7} {z}, word ptr [rdx - 256]{1to32}
-// CHECK: vcvttnebf162iubs xmm22, xmm23
+// CHECK: vcvttbf162iubs xmm22, xmm23
// CHECK: encoding: [0x62,0xa5,0x7f,0x08,0x6a,0xf7]
- vcvttnebf162iubs xmm22, xmm23
+ vcvttbf162iubs xmm22, xmm23
-// CHECK: vcvttnebf162iubs xmm22 {k7}, xmm23
+// CHECK: vcvttbf162iubs xmm22 {k7}, xmm23
// CHECK: encoding: [0x62,0xa5,0x7f,0x0f,0x6a,0xf7]
- vcvttnebf162iubs xmm22 {k7}, xmm23
+ vcvttbf162iubs xmm22 {k7}, xmm23
-// CHECK: vcvttnebf162iubs xmm22 {k7} {z}, xmm23
+// CHECK: vcvttbf162iubs xmm22 {k7} {z}, xmm23
// CHECK: encoding: [0x62,0xa5,0x7f,0x8f,0x6a,0xf7]
- vcvttnebf162iubs xmm22 {k7} {z}, xmm23
+ vcvttbf162iubs xmm22 {k7} {z}, xmm23
-// CHECK: vcvttnebf162iubs zmm22, zmm23
+// CHECK: vcvttbf162iubs zmm22, zmm23
// CHECK: encoding: [0x62,0xa5,0x7f,0x48,0x6a,0xf7]
- vcvttnebf162iubs zmm22, zmm23
+ vcvttbf162iubs zmm22, zmm23
-// CHECK: vcvttnebf162iubs zmm22 {k7}, zmm23
+// CHECK: vcvttbf162iubs zmm22 {k7}, zmm23
// CHECK: encoding: [0x62,0xa5,0x7f,0x4f,0x6a,0xf7]
- vcvttnebf162iubs zmm22 {k7}, zmm23
+ vcvttbf162iubs zmm22 {k7}, zmm23
-// CHECK: vcvttnebf162iubs zmm22 {k7} {z}, zmm23
+// CHECK: vcvttbf162iubs zmm22 {k7} {z}, zmm23
// CHECK: encoding: [0x62,0xa5,0x7f,0xcf,0x6a,0xf7]
- vcvttnebf162iubs zmm22 {k7} {z}, zmm23
+ vcvttbf162iubs zmm22 {k7} {z}, zmm23
-// CHECK: vcvttnebf162iubs ymm22, ymm23
+// CHECK: vcvttbf162iubs ymm22, ymm23
// CHECK: encoding: [0x62,0xa5,0x7f,0x28,0x6a,0xf7]
- vcvttnebf162iubs ymm22, ymm23
+ vcvttbf162iubs ymm22, ymm23
-// CHECK: vcvttnebf162iubs ymm22 {k7}, ymm23
+// CHECK: vcvttbf162iubs ymm22 {k7}, ymm23
// CHECK: encoding: [0x62,0xa5,0x7f,0x2f,0x6a,0xf7]
- vcvttnebf162iubs ymm22 {k7}, ymm23
+ vcvttbf162iubs ymm22 {k7}, ymm23
-// CHECK: vcvttnebf162iubs ymm22 {k7} {z}, ymm23
+// CHECK: vcvttbf162iubs ymm22 {k7} {z}, ymm23
// CHECK: encoding: [0x62,0xa5,0x7f,0xaf,0x6a,0xf7]
- vcvttnebf162iubs ymm22 {k7} {z}, ymm23
+ vcvttbf162iubs ymm22 {k7} {z}, ymm23
-// CHECK: vcvttnebf162iubs xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: vcvttbf162iubs xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
// CHECK: encoding: [0x62,0xa5,0x7f,0x08,0x6a,0xb4,0xf5,0x00,0x00,0x00,0x10]
- vcvttnebf162iubs xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
+ vcvttbf162iubs xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
-// CHECK: vcvttnebf162iubs xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
+// CHECK: vcvttbf162iubs xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
// CHECK: encoding: [0x62,0xc5,0x7f,0x0f,0x6a,0xb4,0x80,0x23,0x01,0x00,0x00]
- vcvttnebf162iubs xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
+ vcvttbf162iubs xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
-// CHECK: vcvttnebf162iubs xmm22, word ptr [rip]{1to8}
+// CHECK: vcvttbf162iubs xmm22, word ptr [rip]{1to8}
// CHECK: encoding: [0x62,0xe5,0x7f,0x18,0x6a,0x35,0x00,0x00,0x00,0x00]
- vcvttnebf162iubs xmm22, word ptr [rip]{1to8}
+ vcvttbf162iubs xmm22, word ptr [rip]{1to8}
-// CHECK: vcvttnebf162iubs xmm22, xmmword ptr [2*rbp - 512]
+// CHECK: vcvttbf162iubs xmm22, xmmword ptr [2*rbp - 512]
// CHECK: encoding: [0x62,0xe5,0x7f,0x08,0x6a,0x34,0x6d,0x00,0xfe,0xff,0xff]
- vcvttnebf162iubs xmm22, xmmword ptr [2*rbp - 512]
+ vcvttbf162iubs xmm22, xmmword ptr [2*rbp - 512]
-// CHECK: vcvttnebf162iubs xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
+// CHECK: vcvttbf162iubs xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
// CHECK: encoding: [0x62,0xe5,0x7f,0x8f,0x6a,0x71,0x7f]
- vcvttnebf162iubs xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
+ vcvttbf162iubs xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
-// CHECK: vcvttnebf162iubs xmm22 {k7} {z}, word ptr [rdx - 256]{1to8}
+// CHECK: vcvttbf162iubs xmm22 {k7} {z}, word ptr [rdx - 256]{1to8}
// CHECK: encoding: [0x62,0xe5,0x7f,0x9f,0x6a,0x72,0x80]
- vcvttnebf162iubs xmm22 {k7} {z}, word ptr [rdx - 256]{1to8}
+ vcvttbf162iubs xmm22 {k7} {z}, word ptr [rdx - 256]{1to8}
-// CHECK: vcvttnebf162iubs ymm22, ymmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: vcvttbf162iubs ymm22, ymmword ptr [rbp + 8*r14 + 268435456]
// CHECK: encoding: [0x62,0xa5,0x7f,0x28,0x6a,0xb4,0xf5,0x00,0x00,0x00,0x10]
- vcvttnebf162iubs ymm22, ymmword ptr [rbp + 8*r14 + 268435456]
+ vcvttbf162iubs ymm22, ymmword ptr [rbp + 8*r14 + 268435456]
-// CHECK: vcvttnebf162iubs ymm22 {k7}, ymmword ptr [r8 + 4*rax + 291]
+// CHECK: vcvttbf162iubs ymm22 {k7}, ymmword ptr [r8 + 4*rax + 291]
// CHECK: encoding: [0x62,0xc5,0x7f,0x2f,0x6a,0xb4,0x80,0x23,0x01,0x00,0x00]
- vcvttnebf162iubs ymm22 {k7}, ymmword ptr [r8 + 4*rax + 291]
+ vcvttbf162iubs ymm22 {k7}, ymmword ptr [r8 + 4*rax + 291]
-// CHECK: vcvttnebf162iubs ymm22, word ptr [rip]{1to16}
+// CHECK: vcvttbf162iubs ymm22, word ptr [rip]{1to16}
// CHECK: encoding: [0x62,0xe5,0x7f,0x38,0x6a,0x35,0x00,0x00,0x00,0x00]
- vcvttnebf162iubs ymm22, word ptr [rip]{1to16}
+ vcvttbf162iubs ymm22, word ptr [rip]{1to16}
-// CHECK: vcvttnebf162iubs ymm22, ymmword ptr [2*rbp - 1024]
+// CHECK: vcvttbf162iubs ymm22, ymmword ptr [2*rbp - 1024]
// CHECK: encoding: [0x62,0xe5,0x7f,0x28,0x6a,0x34,0x6d,0x00,0xfc,0xff,0xff]
- vcvttnebf162iubs ymm22, ymmword ptr [2*rbp - 1024]
+ vcvttbf162iubs ymm22, ymmword ptr [2*rbp - 1024]
-// CHECK: vcvttnebf162iubs ymm22 {k7} {z}, ymmword ptr [rcx + 4064]
+// CHECK: vcvttbf162iubs ymm22 {k7} {z}, ymmword ptr [rcx + 4064]
// CHECK: encoding: [0x62,0xe5,0x7f,0xaf,0x6a,0x71,0x7f]
- vcvttnebf162iubs ymm22 {k7} {z}, ymmword ptr [rcx + 4064]
+ vcvttbf162iubs ymm22 {k7} {z}, ymmword ptr [rcx + 4064]
-// CHECK: vcvttnebf162iubs ymm22 {k7} {z}, word ptr [rdx - 256]{1to16}
+// CHECK: vcvttbf162iubs ymm22 {k7} {z}, word ptr [rdx - 256]{1to16}
// CHECK: encoding: [0x62,0xe5,0x7f,0xbf,0x6a,0x72,0x80]
- vcvttnebf162iubs ymm22 {k7} {z}, word ptr [rdx - 256]{1to16}
+ vcvttbf162iubs ymm22 {k7} {z}, word ptr [rdx - 256]{1to16}
-// CHECK: vcvttnebf162iubs zmm22, zmmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: vcvttbf162iubs zmm22, zmmword ptr [rbp + 8*r14 + 268435456]
// CHECK: encoding: [0x62,0xa5,0x7f,0x48,0x6a,0xb4,0xf5,0x00,0x00,0x00,0x10]
- vcvttnebf162iubs zmm22, zmmword ptr [rbp + 8*r14 + 268435456]
+ vcvttbf162iubs zmm22, zmmword ptr [rbp + 8*r14 + 268435456]
-// CHECK: vcvttnebf162iubs zmm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
+// CHECK: vcvttbf162iubs zmm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
// CHECK: encoding: [0x62,0xc5,0x7f,0x4f,0x6a,0xb4,0x80,0x23,0x01,0x00,0x00]
- vcvttnebf162iubs zmm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
+ vcvttbf162iubs zmm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
-// CHECK: vcvttnebf162iubs zmm22, word ptr [rip]{1to32}
+// CHECK: vcvttbf162iubs zmm22, word ptr [rip]{1to32}
// CHECK: encoding: [0x62,0xe5,0x7f,0x58,0x6a,0x35,0x00,0x00,0x00,0x00]
- vcvttnebf162iubs zmm22, word ptr [rip]{1to32}
+ vcvttbf162iubs zmm22, word ptr [rip]{1to32}
-// CHECK: vcvttnebf162iubs zmm22, zmmword ptr [2*rbp - 2048]
+// CHECK: vcvttbf162iubs zmm22, zmmword ptr [2*rbp - 2048]
// CHECK: encoding: [0x62,0xe5,0x7f,0x48,0x6a,0x34,0x6d,0x00,0xf8,0xff,0xff]
- vcvttnebf162iubs zmm22, zmmword ptr [2*rbp - 2048]
+ vcvttbf162iubs zmm22, zmmword ptr [2*rbp - 2048]
-// CHECK: vcvttnebf162iubs zmm22 {k7} {z}, zmmword ptr [rcx + 8128]
+// CHECK: vcvttbf162iubs zmm22 {k7} {z}, zmmword ptr [rcx + 8128]
// CHECK: encoding: [0x62,0xe5,0x7f,0xcf,0x6a,0x71,0x7f]
- vcvttnebf162iubs zmm22 {k7} {z}, zmmword ptr [rcx + 8128]
+ vcvttbf162iubs zmm22 {k7} {z}, zmmword ptr [rcx + 8128]
-// CHECK: vcvttnebf162iubs zmm22 {k7} {z}, word ptr [rdx - 256]{1to32}
+// CHECK: vcvttbf162iubs zmm22 {k7} {z}, word ptr [rdx - 256]{1to32}
// CHECK: encoding: [0x62,0xe5,0x7f,0xdf,0x6a,0x72,0x80]
- vcvttnebf162iubs zmm22 {k7} {z}, word ptr [rdx - 256]{1to32}
+ vcvttbf162iubs zmm22 {k7} {z}, word ptr [rdx - 256]{1to32}
// CHECK: vcvttph2ibs xmm22, xmm23
// CHECK: encoding: [0x62,0xa5,0x7c,0x08,0x68,0xf7]
diff --git a/llvm/test/TableGen/x86-fold-tables.inc b/llvm/test/TableGen/x86-fold-tables.inc
index 954c05bdb20767..e426b400b92704 100644
--- a/llvm/test/TableGen/x86-fold-tables.inc
+++ b/llvm/test/TableGen/x86-fold-tables.inc
@@ -1181,6 +1181,12 @@ static const X86FoldTableEntry Table1[] = {
{X86::VCOMXSDZrr_Int, X86::VCOMXSDZrm_Int, TB_NO_REVERSE},
{X86::VCOMXSHZrr_Int, X86::VCOMXSHZrm_Int, TB_NO_REVERSE},
{X86::VCOMXSSZrr_Int, X86::VCOMXSSZrm_Int, TB_NO_REVERSE},
+ {X86::VCVTBF162IBSZ128rr, X86::VCVTBF162IBSZ128rm, 0},
+ {X86::VCVTBF162IBSZ256rr, X86::VCVTBF162IBSZ256rm, 0},
+ {X86::VCVTBF162IBSZrr, X86::VCVTBF162IBSZrm, 0},
+ {X86::VCVTBF162IUBSZ128rr, X86::VCVTBF162IUBSZ128rm, 0},
+ {X86::VCVTBF162IUBSZ256rr, X86::VCVTBF162IUBSZ256rm, 0},
+ {X86::VCVTBF162IUBSZrr, X86::VCVTBF162IUBSZrm, 0},
{X86::VCVTDQ2PDYrr, X86::VCVTDQ2PDYrm, 0},
{X86::VCVTDQ2PDZ128rr, X86::VCVTDQ2PDZ128rm, TB_NO_REVERSE},
{X86::VCVTDQ2PDZ256rr, X86::VCVTDQ2PDZ256rm, 0},
@@ -1197,12 +1203,6 @@ static const X86FoldTableEntry Table1[] = {
{X86::VCVTHF82PHZ128rr, X86::VCVTHF82PHZ128rm, TB_NO_REVERSE},
{X86::VCVTHF82PHZ256rr, X86::VCVTHF82PHZ256rm, 0},
{X86::VCVTHF82PHZrr, X86::VCVTHF82PHZrm, 0},
- {X86::VCVTNEBF162IBSZ128rr, X86::VCVTNEBF162IBSZ128rm, 0},
- {X86::VCVTNEBF162IBSZ256rr, X86::VCVTNEBF162IBSZ256rm, 0},
- {X86::VCVTNEBF162IBSZrr, X86::VCVTNEBF162IBSZrm, 0},
- {X86::VCVTNEBF162IUBSZ128rr, X86::VCVTNEBF162IUBSZ128rm, 0},
- {X86::VCVTNEBF162IUBSZ256rr, X86::VCVTNEBF162IUBSZ256rm, 0},
- {X86::VCVTNEBF162IUBSZrr, X86::VCVTNEBF162IUBSZrm, 0},
{X86::VCVTNEPH2BF8SZ128rr, X86::VCVTNEPH2BF8SZ128rm, 0},
{X86::VCVTNEPH2BF8SZ256rr, X86::VCVTNEPH2BF8SZ256rm, 0},
{X86::VCVTNEPH2BF8SZrr, X86::VCVTNEPH2BF8SZrm, 0},
@@ -1338,12 +1338,12 @@ static const X86FoldTableEntry Table1[] = {
{X86::VCVTSS2SIrr_Int, X86::VCVTSS2SIrm_Int, TB_NO_REVERSE},
{X86::VCVTSS2USI64Zrr_Int, X86::VCVTSS2USI64Zrm_Int, TB_NO_REVERSE},
{X86::VCVTSS2USIZrr_Int, X86::VCVTSS2USIZrm_Int, TB_NO_REVERSE},
- {X86::VCVTTNEBF162IBSZ128rr, X86::VCVTTNEBF162IBSZ128rm, 0},
- {X86::VCVTTNEBF162IBSZ256rr, X86::VCVTTNEBF162IBSZ256rm, 0},
- {X86::VCVTTNEBF162IBSZrr, X86::VCVTTNEBF162IBSZrm, 0},
- {X86::VCVTTNEBF162IUBSZ128rr, X86::VCVTTNEBF162IUBSZ128rm, 0},
- {X86::VCVTTNEBF162IUBSZ256rr, X86::VCVTTNEBF162IUBSZ256rm, 0},
- {X86::VCVTTNEBF162IUBSZrr, X86::VCVTTNEBF162IUBSZrm, 0},
+ {X86::VCVTTBF162IBSZ128rr, X86::VCVTTBF162IBSZ128rm, 0},
+ {X86::VCVTTBF162IBSZ256rr, X86::VCVTTBF162IBSZ256rm, 0},
+ {X86::VCVTTBF162IBSZrr, X86::VCVTTBF162IBSZrm, 0},
+ {X86::VCVTTBF162IUBSZ128rr, X86::VCVTTBF162IUBSZ128rm, 0},
+ {X86::VCVTTBF162IUBSZ256rr, X86::VCVTTBF162IUBSZ256rm, 0},
+ {X86::VCVTTBF162IUBSZrr, X86::VCVTTBF162IUBSZrm, 0},
{X86::VCVTTPD2DQSZ128rr, X86::VCVTTPD2DQSZ128rm, 0},
{X86::VCVTTPD2DQSZ256rr, X86::VCVTTPD2DQSZ256rm, 0},
{X86::VCVTTPD2DQSZrr, X86::VCVTTPD2DQSZrm, 0},
@@ -2541,6 +2541,12 @@ static const X86FoldTableEntry Table2[] = {
{X86::VCVT2PS2PHXZ128rr, X86::VCVT2PS2PHXZ128rm, 0},
{X86::VCVT2PS2PHXZ256rr, X86::VCVT2PS2PHXZ256rm, 0},
{X86::VCVT2PS2PHXZrr, X86::VCVT2PS2PHXZrm, 0},
+ {X86::VCVTBF162IBSZ128rrkz, X86::VCVTBF162IBSZ128rmkz, 0},
+ {X86::VCVTBF162IBSZ256rrkz, X86::VCVTBF162IBSZ256rmkz, 0},
+ {X86::VCVTBF162IBSZrrkz, X86::VCVTBF162IBSZrmkz, 0},
+ {X86::VCVTBF162IUBSZ128rrkz, X86::VCVTBF162IUBSZ128rmkz, 0},
+ {X86::VCVTBF162IUBSZ256rrkz, X86::VCVTBF162IUBSZ256rmkz, 0},
+ {X86::VCVTBF162IUBSZrrkz, X86::VCVTBF162IUBSZrmkz, 0},
{X86::VCVTBIASPH2BF8SZ128rr, X86::VCVTBIASPH2BF8SZ128rm, 0},
{X86::VCVTBIASPH2BF8SZ256rr, X86::VCVTBIASPH2BF8SZ256rm, 0},
{X86::VCVTBIASPH2BF8SZrr, X86::VCVTBIASPH2BF8SZrm, 0},
@@ -2580,12 +2586,6 @@ static const X86FoldTableEntry Table2[] = {
{X86::VCVTNE2PS2BF16Z128rr, X86::VCVTNE2PS2BF16Z128rm, 0},
{X86::VCVTNE2PS2BF16Z256rr, X86::VCVTNE2PS2BF16Z256rm, 0},
{X86::VCVTNE2PS2BF16Zrr, X86::VCVTNE2PS2BF16Zrm, 0},
- {X86::VCVTNEBF162IBSZ128rrkz, X86::VCVTNEBF162IBSZ128rmkz, 0},
- {X86::VCVTNEBF162IBSZ256rrkz, X86::VCVTNEBF162IBSZ256rmkz, 0},
- {X86::VCVTNEBF162IBSZrrkz, X86::VCVTNEBF162IBSZrmkz, 0},
- {X86::VCVTNEBF162IUBSZ128rrkz, X86::VCVTNEBF162IUBSZ128rmkz, 0},
- {X86::VCVTNEBF162IUBSZ256rrkz, X86::VCVTNEBF162IUBSZ256rmkz, 0},
- {X86::VCVTNEBF162IUBSZrrkz, X86::VCVTNEBF162IUBSZrmkz, 0},
{X86::VCVTNEPH2BF8SZ128rrkz, X86::VCVTNEPH2BF8SZ128rmkz, 0},
{X86::VCVTNEPH2BF8SZ256rrkz, X86::VCVTNEPH2BF8SZ256rmkz, 0},
{X86::VCVTNEPH2BF8SZrrkz, X86::VCVTNEPH2BF8SZrmkz, 0},
@@ -2721,12 +2721,12 @@ static const X86FoldTableEntry Table2[] = {
{X86::VCVTSS2SDrr_Int, X86::VCVTSS2SDrm_Int, TB_NO_REVERSE},
{X86::VCVTSS2SHZrr, X86::VCVTSS2SHZrm, 0},
{X86::VCVTSS2SHZrr_Int, X86::VCVTSS2SHZrm_Int, TB_NO_REVERSE},
- {X86::VCVTTNEBF162IBSZ128rrkz, X86::VCVTTNEBF162IBSZ128rmkz, 0},
- {X86::VCVTTNEBF162IBSZ256rrkz, X86::VCVTTNEBF162IBSZ256rmkz, 0},
- {X86::VCVTTNEBF162IBSZrrkz, X86::VCVTTNEBF162IBSZrmkz, 0},
- {X86::VCVTTNEBF162IUBSZ128rrkz, X86::VCVTTNEBF162IUBSZ128rmkz, 0},
- {X86::VCVTTNEBF162IUBSZ256rrkz, X86::VCVTTNEBF162IUBSZ256rmkz, 0},
- {X86::VCVTTNEBF162IUBSZrrkz, X86::VCVTTNEBF162IUBSZrmkz, 0},
+ {X86::VCVTTBF162IBSZ128rrkz, X86::VCVTTBF162IBSZ128rmkz, 0},
+ {X86::VCVTTBF162IBSZ256rrkz, X86::VCVTTBF162IBSZ256rmkz, 0},
+ {X86::VCVTTBF162IBSZrrkz, X86::VCVTTBF162IBSZrmkz, 0},
+ {X86::VCVTTBF162IUBSZ128rrkz, X86::VCVTTBF162IUBSZ128rmkz, 0},
+ {X86::VCVTTBF162IUBSZ256rrkz, X86::VCVTTBF162IUBSZ256rmkz, 0},
+ {X86::VCVTTBF162IUBSZrrkz, X86::VCVTTBF162IUBSZrmkz, 0},
{X86::VCVTTPD2DQSZ128rrkz, X86::VCVTTPD2DQSZ128rmkz, 0},
{X86::VCVTTPD2DQSZ256rrkz, X86::VCVTTPD2DQSZ256rmkz, 0},
{X86::VCVTTPD2DQSZrrkz, X86::VCVTTPD2DQSZrmkz, 0},
@@ -4294,6 +4294,12 @@ static const X86FoldTableEntry Table3[] = {
{X86::VCVT2PS2PHXZ128rrkz, X86::VCVT2PS2PHXZ128rmkz, 0},
{X86::VCVT2PS2PHXZ256rrkz, X86::VCVT2PS2PHXZ256rmkz, 0},
{X86::VCVT2PS2PHXZrrkz, X86::VCVT2PS2PHXZrmkz, 0},
+ {X86::VCVTBF162IBSZ128rrk, X86::VCVTBF162IBSZ128rmk, 0},
+ {X86::VCVTBF162IBSZ256rrk, X86::VCVTBF162IBSZ256rmk, 0},
+ {X86::VCVTBF162IBSZrrk, X86::VCVTBF162IBSZrmk, 0},
+ {X86::VCVTBF162IUBSZ128rrk, X86::VCVTBF162IUBSZ128rmk, 0},
+ {X86::VCVTBF162IUBSZ256rrk, X86::VCVTBF162IUBSZ256rmk, 0},
+ {X86::VCVTBF162IUBSZrrk, X86::VCVTBF162IUBSZrmk, 0},
{X86::VCVTBIASPH2BF8SZ128rrkz, X86::VCVTBIASPH2BF8SZ128rmkz, 0},
{X86::VCVTBIASPH2BF8SZ256rrkz, X86::VCVTBIASPH2BF8SZ256rmkz, 0},
{X86::VCVTBIASPH2BF8SZrrkz, X86::VCVTBIASPH2BF8SZrmkz, 0},
@@ -4333,12 +4339,6 @@ static const X86FoldTableEntry Table3[] = {
{X86::VCVTNE2PS2BF16Z128rrkz, X86::VCVTNE2PS2BF16Z128rmkz, 0},
{X86::VCVTNE2PS2BF16Z256rrkz, X86::VCVTNE2PS2BF16Z256rmkz, 0},
{X86::VCVTNE2PS2BF16Zrrkz, X86::VCVTNE2PS2BF16Zrmkz, 0},
- {X86::VCVTNEBF162IBSZ128rrk, X86::VCVTNEBF162IBSZ128rmk, 0},
- {X86::VCVTNEBF162IBSZ256rrk, X86::VCVTNEBF162IBSZ256rmk, 0},
- {X86::VCVTNEBF162IBSZrrk, X86::VCVTNEBF162IBSZrmk, 0},
- {X86::VCVTNEBF162IUBSZ128rrk, X86::VCVTNEBF162IUBSZ128rmk, 0},
- {X86::VCVTNEBF162IUBSZ256rrk, X86::VCVTNEBF162IUBSZ256rmk, 0},
- {X86::VCVTNEBF162IUBSZrrk, X86::VCVTNEBF162IUBSZrmk, 0},
{X86::VCVTNEPH2BF8SZ128rrk, X86::VCVTNEPH2BF8SZ128rmk, 0},
{X86::VCVTNEPH2BF8SZ256rrk, X86::VCVTNEPH2BF8SZ256rmk, 0},
{X86::VCVTNEPH2BF8SZrrk, X86::VCVTNEPH2BF8SZrmk, 0},
@@ -4444,12 +4444,12 @@ static const X86FoldTableEntry Table3[] = {
{X86::VCVTSH2SSZrrkz_Int, X86::VCVTSH2SSZrmkz_Int, TB_NO_REVERSE},
{X86::VCVTSS2SDZrrkz_Int, X86::VCVTSS2SDZrmkz_Int, TB_NO_REVERSE},
{X86::VCVTSS2SHZrrkz_Int, X86::VCVTSS2SHZrmkz_Int, TB_NO_REVERSE},
- {X86::VCVTTNEBF162IBSZ128rrk, X86::VCVTTNEBF162IBSZ128rmk, 0},
- {X86::VCVTTNEBF162IBSZ256rrk, X86::VCVTTNEBF162IBSZ256rmk, 0},
- {X86::VCVTTNEBF162IBSZrrk, X86::VCVTTNEBF162IBSZrmk, 0},
- {X86::VCVTTNEBF162IUBSZ128rrk, X86::VCVTTNEBF162IUBSZ128rmk, 0},
- {X86::VCVTTNEBF162IUBSZ256rrk, X86::VCVTTNEBF162IUBSZ256rmk, 0},
- {X86::VCVTTNEBF162IUBSZrrk, X86::VCVTTNEBF162IUBSZrmk, 0},
+ {X86::VCVTTBF162IBSZ128rrk, X86::VCVTTBF162IBSZ128rmk, 0},
+ {X86::VCVTTBF162IBSZ256rrk, X86::VCVTTBF162IBSZ256rmk, 0},
+ {X86::VCVTTBF162IBSZrrk, X86::VCVTTBF162IBSZrmk, 0},
+ {X86::VCVTTBF162IUBSZ128rrk, X86::VCVTTBF162IUBSZ128rmk, 0},
+ {X86::VCVTTBF162IUBSZ256rrk, X86::VCVTTBF162IUBSZ256rmk, 0},
+ {X86::VCVTTBF162IUBSZrrk, X86::VCVTTBF162IUBSZrmk, 0},
{X86::VCVTTPD2DQSZ128rrk, X86::VCVTTPD2DQSZ128rmk, 0},
{X86::VCVTTPD2DQSZ256rrk, X86::VCVTTPD2DQSZ256rmk, 0},
{X86::VCVTTPD2DQSZrrk, X86::VCVTTPD2DQSZrmk, 0},
@@ -7423,6 +7423,12 @@ static const X86FoldTableEntry Table4[] = {
};
static const X86FoldTableEntry BroadcastTable1[] = {
+ {X86::VCVTBF162IBSZ128rr, X86::VCVTBF162IBSZ128rmb, TB_BCAST_SH},
+ {X86::VCVTBF162IBSZ256rr, X86::VCVTBF162IBSZ256rmb, TB_BCAST_SH},
+ {X86::VCVTBF162IBSZrr, X86::VCVTBF162IBSZrmb, TB_BCAST_SH},
+ {X86::VCVTBF162IUBSZ128rr, X86::VCVTBF162IUBSZ128rmb, TB_BCAST_SH},
+ {X86::VCVTBF162IUBSZ256rr, X86::VCVTBF162IUBSZ256rmb, TB_BCAST_SH},
+ {X86::VCVTBF162IUBSZrr, X86::VCVTBF162IUBSZrmb, TB_BCAST_SH},
{X86::VCVTDQ2PDZ128rr, X86::VCVTDQ2PDZ128rmb, TB_BCAST_D},
{X86::VCVTDQ2PDZ256rr, X86::VCVTDQ2PDZ256rmb, TB_BCAST_D},
{X86::VCVTDQ2PDZrr, X86::VCVTDQ2PDZrmb, TB_BCAST_D},
@@ -7432,12 +7438,6 @@ static const X86FoldTableEntry BroadcastTable1[] = {
{X86::VCVTDQ2PSZ128rr, X86::VCVTDQ2PSZ128rmb, TB_BCAST_D},
{X86::VCVTDQ2PSZ256rr, X86::VCVTDQ2PSZ256rmb, TB_BCAST_D},
{X86::VCVTDQ2PSZrr, X86::VCVTDQ2PSZrmb, TB_BCAST_D},
- {X86::VCVTNEBF162IBSZ128rr, X86::VCVTNEBF162IBSZ128rmb, TB_BCAST_SH},
- {X86::VCVTNEBF162IBSZ256rr, X86::VCVTNEBF162IBSZ256rmb, TB_BCAST_SH},
- {X86::VCVTNEBF162IBSZrr, X86::VCVTNEBF162IBSZrmb, TB_BCAST_SH},
- {X86::VCVTNEBF162IUBSZ128rr, X86::VCVTNEBF162IUBSZ128rmb, TB_BCAST_SH},
- {X86::VCVTNEBF162IUBSZ256rr, X86::VCVTNEBF162IUBSZ256rmb, TB_BCAST_SH},
- {X86::VCVTNEBF162IUBSZrr, X86::VCVTNEBF162IUBSZrmb, TB_BCAST_SH},
{X86::VCVTNEPH2BF8SZ128rr, X86::VCVTNEPH2BF8SZ128rmb, TB_BCAST_SH},
{X86::VCVTNEPH2BF8SZ256rr, X86::VCVTNEPH2BF8SZ256rmb, TB_BCAST_SH},
{X86::VCVTNEPH2BF8SZrr, X86::VCVTNEPH2BF8SZrmb, TB_BCAST_SH},
@@ -7534,12 +7534,12 @@ static const X86FoldTableEntry BroadcastTable1[] = {
{X86::VCVTQQ2PSZ128rr, X86::VCVTQQ2PSZ128rmb, TB_BCAST_Q},
{X86::VCVTQQ2PSZ256rr, X86::VCVTQQ2PSZ256rmb, TB_BCAST_Q},
{X86::VCVTQQ2PSZrr, X86::VCVTQQ2PSZrmb, TB_BCAST_Q},
- {X86::VCVTTNEBF162IBSZ128rr, X86::VCVTTNEBF162IBSZ128rmb, TB_BCAST_SH},
- {X86::VCVTTNEBF162IBSZ256rr, X86::VCVTTNEBF162IBSZ256rmb, TB_BCAST_SH},
- {X86::VCVTTNEBF162IBSZrr, X86::VCVTTNEBF162IBSZrmb, TB_BCAST_SH},
- {X86::VCVTTNEBF162IUBSZ128rr, X86::VCVTTNEBF162IUBSZ128rmb, TB_BCAST_SH},
- {X86::VCVTTNEBF162IUBSZ256rr, X86::VCVTTNEBF162IUBSZ256rmb, TB_BCAST_SH},
- {X86::VCVTTNEBF162IUBSZrr, X86::VCVTTNEBF162IUBSZrmb, TB_BCAST_SH},
+ {X86::VCVTTBF162IBSZ128rr, X86::VCVTTBF162IBSZ128rmb, TB_BCAST_SH},
+ {X86::VCVTTBF162IBSZ256rr, X86::VCVTTBF162IBSZ256rmb, TB_BCAST_SH},
+ {X86::VCVTTBF162IBSZrr, X86::VCVTTBF162IBSZrmb, TB_BCAST_SH},
+ {X86::VCVTTBF162IUBSZ128rr, X86::VCVTTBF162IUBSZ128rmb, TB_BCAST_SH},
+ {X86::VCVTTBF162IUBSZ256rr, X86::VCVTTBF162IUBSZ256rmb, TB_BCAST_SH},
+ {X86::VCVTTBF162IUBSZrr, X86::VCVTTBF162IUBSZrmb, TB_BCAST_SH},
{X86::VCVTTPD2DQSZ128rr, X86::VCVTTPD2DQSZ128rmb, TB_BCAST_SD},
{X86::VCVTTPD2DQSZ256rr, X86::VCVTTPD2DQSZ256rmb, TB_BCAST_SD},
{X86::VCVTTPD2DQSZrr, X86::VCVTTPD2DQSZrmb, TB_BCAST_SD},
@@ -7865,6 +7865,12 @@ static const X86FoldTableEntry BroadcastTable2[] = {
{X86::VCVT2PS2PHXZ128rr, X86::VCVT2PS2PHXZ128rmb, TB_BCAST_SS},
{X86::VCVT2PS2PHXZ256rr, X86::VCVT2PS2PHXZ256rmb, TB_BCAST_SS},
{X86::VCVT2PS2PHXZrr, X86::VCVT2PS2PHXZrmb, TB_BCAST_SS},
+ {X86::VCVTBF162IBSZ128rrkz, X86::VCVTBF162IBSZ128rmbkz, TB_BCAST_SH},
+ {X86::VCVTBF162IBSZ256rrkz, X86::VCVTBF162IBSZ256rmbkz, TB_BCAST_SH},
+ {X86::VCVTBF162IBSZrrkz, X86::VCVTBF162IBSZrmbkz, TB_BCAST_SH},
+ {X86::VCVTBF162IUBSZ128rrkz, X86::VCVTBF162IUBSZ128rmbkz, TB_BCAST_SH},
+ {X86::VCVTBF162IUBSZ256rrkz, X86::VCVTBF162IUBSZ256rmbkz, TB_BCAST_SH},
+ {X86::VCVTBF162IUBSZrrkz, X86::VCVTBF162IUBSZrmbkz, TB_BCAST_SH},
{X86::VCVTBIASPH2BF8SZ128rr, X86::VCVTBIASPH2BF8SZ128rmb, TB_BCAST_SH},
{X86::VCVTBIASPH2BF8SZ256rr, X86::VCVTBIASPH2BF8SZ256rmb, TB_BCAST_SH},
{X86::VCVTBIASPH2BF8SZrr, X86::VCVTBIASPH2BF8SZrmb, TB_BCAST_SH},
@@ -7901,12 +7907,6 @@ static const X86FoldTableEntry BroadcastTable2[] = {
{X86::VCVTNE2PS2BF16Z128rr, X86::VCVTNE2PS2BF16Z128rmb, TB_BCAST_SS},
{X86::VCVTNE2PS2BF16Z256rr, X86::VCVTNE2PS2BF16Z256rmb, TB_BCAST_SS},
{X86::VCVTNE2PS2BF16Zrr, X86::VCVTNE2PS2BF16Zrmb, TB_BCAST_SS},
- {X86::VCVTNEBF162IBSZ128rrkz, X86::VCVTNEBF162IBSZ128rmbkz, TB_BCAST_SH},
- {X86::VCVTNEBF162IBSZ256rrkz, X86::VCVTNEBF162IBSZ256rmbkz, TB_BCAST_SH},
- {X86::VCVTNEBF162IBSZrrkz, X86::VCVTNEBF162IBSZrmbkz, TB_BCAST_SH},
- {X86::VCVTNEBF162IUBSZ128rrkz, X86::VCVTNEBF162IUBSZ128rmbkz, TB_BCAST_SH},
- {X86::VCVTNEBF162IUBSZ256rrkz, X86::VCVTNEBF162IUBSZ256rmbkz, TB_BCAST_SH},
- {X86::VCVTNEBF162IUBSZrrkz, X86::VCVTNEBF162IUBSZrmbkz, TB_BCAST_SH},
{X86::VCVTNEPH2BF8SZ128rrkz, X86::VCVTNEPH2BF8SZ128rmbkz, TB_BCAST_SH},
{X86::VCVTNEPH2BF8SZ256rrkz, X86::VCVTNEPH2BF8SZ256rmbkz, TB_BCAST_SH},
{X86::VCVTNEPH2BF8SZrrkz, X86::VCVTNEPH2BF8SZrmbkz, TB_BCAST_SH},
@@ -8003,12 +8003,12 @@ static const X86FoldTableEntry BroadcastTable2[] = {
{X86::VCVTQQ2PSZ128rrkz, X86::VCVTQQ2PSZ128rmbkz, TB_BCAST_Q},
{X86::VCVTQQ2PSZ256rrkz, X86::VCVTQQ2PSZ256rmbkz, TB_BCAST_Q},
{X86::VCVTQQ2PSZrrkz, X86::VCVTQQ2PSZrmbkz, TB_BCAST_Q},
- {X86::VCVTTNEBF162IBSZ128rrkz, X86::VCVTTNEBF162IBSZ128rmbkz, TB_BCAST_SH},
- {X86::VCVTTNEBF162IBSZ256rrkz, X86::VCVTTNEBF162IBSZ256rmbkz, TB_BCAST_SH},
- {X86::VCVTTNEBF162IBSZrrkz, X86::VCVTTNEBF162IBSZrmbkz, TB_BCAST_SH},
- {X86::VCVTTNEBF162IUBSZ128rrkz, X86::VCVTTNEBF162IUBSZ128rmbkz, TB_BCAST_SH},
- {X86::VCVTTNEBF162IUBSZ256rrkz, X86::VCVTTNEBF162IUBSZ256rmbkz, TB_BCAST_SH},
- {X86::VCVTTNEBF162IUBSZrrkz, X86::VCVTTNEBF162IUBSZrmbkz, TB_BCAST_SH},
+ {X86::VCVTTBF162IBSZ128rrkz, X86::VCVTTBF162IBSZ128rmbkz, TB_BCAST_SH},
+ {X86::VCVTTBF162IBSZ256rrkz, X86::VCVTTBF162IBSZ256rmbkz, TB_BCAST_SH},
+ {X86::VCVTTBF162IBSZrrkz, X86::VCVTTBF162IBSZrmbkz, TB_BCAST_SH},
+ {X86::VCVTTBF162IUBSZ128rrkz, X86::VCVTTBF162IUBSZ128rmbkz, TB_BCAST_SH},
+ {X86::VCVTTBF162IUBSZ256rrkz, X86::VCVTTBF162IUBSZ256rmbkz, TB_BCAST_SH},
+ {X86::VCVTTBF162IUBSZrrkz, X86::VCVTTBF162IUBSZrmbkz, TB_BCAST_SH},
{X86::VCVTTPD2DQSZ128rrkz, X86::VCVTTPD2DQSZ128rmbkz, TB_BCAST_SD},
{X86::VCVTTPD2DQSZ256rrkz, X86::VCVTTPD2DQSZ256rmbkz, TB_BCAST_SD},
{X86::VCVTTPD2DQSZrrkz, X86::VCVTTPD2DQSZrmbkz, TB_BCAST_SD},
@@ -8689,6 +8689,12 @@ static const X86FoldTableEntry BroadcastTable3[] = {
{X86::VCVT2PS2PHXZ128rrkz, X86::VCVT2PS2PHXZ128rmbkz, TB_BCAST_SS},
{X86::VCVT2PS2PHXZ256rrkz, X86::VCVT2PS2PHXZ256rmbkz, TB_BCAST_SS},
{X86::VCVT2PS2PHXZrrkz, X86::VCVT2PS2PHXZrmbkz, TB_BCAST_SS},
+ {X86::VCVTBF162IBSZ128rrk, X86::VCVTBF162IBSZ128rmbk, TB_BCAST_SH},
+ {X86::VCVTBF162IBSZ256rrk, X86::VCVTBF162IBSZ256rmbk, TB_BCAST_SH},
+ {X86::VCVTBF162IBSZrrk, X86::VCVTBF162IBSZrmbk, TB_BCAST_SH},
+ {X86::VCVTBF162IUBSZ128rrk, X86::VCVTBF162IUBSZ128rmbk, TB_BCAST_SH},
+ {X86::VCVTBF162IUBSZ256rrk, X86::VCVTBF162IUBSZ256rmbk, TB_BCAST_SH},
+ {X86::VCVTBF162IUBSZrrk, X86::VCVTBF162IUBSZrmbk, TB_BCAST_SH},
{X86::VCVTBIASPH2BF8SZ128rrkz, X86::VCVTBIASPH2BF8SZ128rmbkz, TB_BCAST_SH},
{X86::VCVTBIASPH2BF8SZ256rrkz, X86::VCVTBIASPH2BF8SZ256rmbkz, TB_BCAST_SH},
{X86::VCVTBIASPH2BF8SZrrkz, X86::VCVTBIASPH2BF8SZrmbkz, TB_BCAST_SH},
@@ -8725,12 +8731,6 @@ static const X86FoldTableEntry BroadcastTable3[] = {
{X86::VCVTNE2PS2BF16Z128rrkz, X86::VCVTNE2PS2BF16Z128rmbkz, TB_BCAST_SS},
{X86::VCVTNE2PS2BF16Z256rrkz, X86::VCVTNE2PS2BF16Z256rmbkz, TB_BCAST_SS},
{X86::VCVTNE2PS2BF16Zrrkz, X86::VCVTNE2PS2BF16Zrmbkz, TB_BCAST_SS},
- {X86::VCVTNEBF162IBSZ128rrk, X86::VCVTNEBF162IBSZ128rmbk, TB_BCAST_SH},
- {X86::VCVTNEBF162IBSZ256rrk, X86::VCVTNEBF162IBSZ256rmbk, TB_BCAST_SH},
- {X86::VCVTNEBF162IBSZrrk, X86::VCVTNEBF162IBSZrmbk, TB_BCAST_SH},
- {X86::VCVTNEBF162IUBSZ128rrk, X86::VCVTNEBF162IUBSZ128rmbk, TB_BCAST_SH},
- {X86::VCVTNEBF162IUBSZ256rrk, X86::VCVTNEBF162IUBSZ256rmbk, TB_BCAST_SH},
- {X86::VCVTNEBF162IUBSZrrk, X86::VCVTNEBF162IUBSZrmbk, TB_BCAST_SH},
{X86::VCVTNEPH2BF8SZ128rrk, X86::VCVTNEPH2BF8SZ128rmbk, TB_BCAST_SH},
{X86::VCVTNEPH2BF8SZ256rrk, X86::VCVTNEPH2BF8SZ256rmbk, TB_BCAST_SH},
{X86::VCVTNEPH2BF8SZrrk, X86::VCVTNEPH2BF8SZrmbk, TB_BCAST_SH},
@@ -8827,12 +8827,12 @@ static const X86FoldTableEntry BroadcastTable3[] = {
{X86::VCVTQQ2PSZ128rrk, X86::VCVTQQ2PSZ128rmbk, TB_BCAST_Q},
{X86::VCVTQQ2PSZ256rrk, X86::VCVTQQ2PSZ256rmbk, TB_BCAST_Q},
{X86::VCVTQQ2PSZrrk, X86::VCVTQQ2PSZrmbk, TB_BCAST_Q},
- {X86::VCVTTNEBF162IBSZ128rrk, X86::VCVTTNEBF162IBSZ128rmbk, TB_BCAST_SH},
- {X86::VCVTTNEBF162IBSZ256rrk, X86::VCVTTNEBF162IBSZ256rmbk, TB_BCAST_SH},
- {X86::VCVTTNEBF162IBSZrrk, X86::VCVTTNEBF162IBSZrmbk, TB_BCAST_SH},
- {X86::VCVTTNEBF162IUBSZ128rrk, X86::VCVTTNEBF162IUBSZ128rmbk, TB_BCAST_SH},
- {X86::VCVTTNEBF162IUBSZ256rrk, X86::VCVTTNEBF162IUBSZ256rmbk, TB_BCAST_SH},
- {X86::VCVTTNEBF162IUBSZrrk, X86::VCVTTNEBF162IUBSZrmbk, TB_BCAST_SH},
+ {X86::VCVTTBF162IBSZ128rrk, X86::VCVTTBF162IBSZ128rmbk, TB_BCAST_SH},
+ {X86::VCVTTBF162IBSZ256rrk, X86::VCVTTBF162IBSZ256rmbk, TB_BCAST_SH},
+ {X86::VCVTTBF162IBSZrrk, X86::VCVTTBF162IBSZrmbk, TB_BCAST_SH},
+ {X86::VCVTTBF162IUBSZ128rrk, X86::VCVTTBF162IUBSZ128rmbk, TB_BCAST_SH},
+ {X86::VCVTTBF162IUBSZ256rrk, X86::VCVTTBF162IUBSZ256rmbk, TB_BCAST_SH},
+ {X86::VCVTTBF162IUBSZrrk, X86::VCVTTBF162IUBSZrmbk, TB_BCAST_SH},
{X86::VCVTTPD2DQSZ128rrk, X86::VCVTTPD2DQSZ128rmbk, TB_BCAST_SD},
{X86::VCVTTPD2DQSZ256rrk, X86::VCVTTPD2DQSZ256rmbk, TB_BCAST_SD},
{X86::VCVTTPD2DQSZrrk, X86::VCVTTPD2DQSZrmbk, TB_BCAST_SD},
More information about the llvm-commits
mailing list