[llvm] cc61929 - [SandboxVec][Scheduler][NFC] Add comments

Vasileios Porpodas via llvm-commits llvm-commits at lists.llvm.org
Thu Jan 16 12:32:35 PST 2025


Author: Vasileios Porpodas
Date: 2025-01-16T12:31:54-08:00
New Revision: cc61929dc8e1010191451fca74a8e6b13b2b77eb

URL: https://github.com/llvm/llvm-project/commit/cc61929dc8e1010191451fca74a8e6b13b2b77eb
DIFF: https://github.com/llvm/llvm-project/commit/cc61929dc8e1010191451fca74a8e6b13b2b77eb.diff

LOG: [SandboxVec][Scheduler][NFC] Add comments

Added: 
    

Modified: 
    llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Scheduler.h

Removed: 
    


################################################################################
diff  --git a/llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Scheduler.h b/llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Scheduler.h
index 3ec0ac0f78a741..52891c3f7535c9 100644
--- a/llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Scheduler.h
+++ b/llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Scheduler.h
@@ -109,8 +109,16 @@ class SchedBundle {
 
 /// The list scheduler.
 class Scheduler {
+  /// This is a list-scheduler and this is the list containing the instructions
+  /// that are ready, meaning that all their dependency successors have already
+  /// been scheduled.
   ReadyListContainer ReadyList;
+  /// The dependency graph is used by the scheduler to determine the legal
+  /// ordering of instructions.
   DependencyGraph DAG;
+  /// This is the top of the schedule, i.e. the location where the scheduler
+  /// is about to place the scheduled instructions. It gets updated as we
+  /// schedule.
   std::optional<BasicBlock::iterator> ScheduleTopItOpt;
   // TODO: This is wasting memory in exchange for fast removal using a raw ptr.
   DenseMap<SchedBundle *, std::unique_ptr<SchedBundle>> Bndls;
@@ -145,7 +153,11 @@ class Scheduler {
 public:
   Scheduler(AAResults &AA, Context &Ctx) : DAG(AA, Ctx) {}
   ~Scheduler() {}
-
+  /// Tries to build a schedule that includes all of \p Instrs scheduled at the
+  /// same scheduling cycle. This essentially checks that there are no
+  /// dependencies among \p Instrs. This function may involve scheduling
+  /// intermediate instructions or canceling and re-scheduling if needed.
+  /// \Returns true on success, false otherwise.
   bool trySchedule(ArrayRef<Instruction *> Instrs);
   /// Clear the scheduler's state, including the DAG.
   void clear() {


        


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