[llvm] [AArch64] Return early rather than asserting when Size of value passed to targetShrinkDemandedConstant is not 32 or 64 (PR #123084)

[Will Froom via llvm-commits]

https://github.com/WillFroom updated https://github.com/llvm/llvm-project/pull/123084

>From 2a29570333a25b4d94f3f39384c0e8b533935e94 Mon Sep 17 00:00:00 2001
From: Will Froom <willfroom at google.com>
Date: Wed, 15 Jan 2025 16:32:31 +0000
Subject: [PATCH] [AArch64] Return early rather than asserting when Size of
 value passed to targetShrinkDemandedConstant is not 32 or 64

---
 .../Target/AArch64/AArch64ISelLowering.cpp    |  5 +++--
 .../half-presision-signof-no-assert.ll        | 22 +++++++++++++++++++
 2 files changed, 25 insertions(+), 2 deletions(-)
 create mode 100644 llvm/test/CodeGen/AArch64/half-presision-signof-no-assert.ll

diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
index d4a114c275fb76..fe639bc13c784d 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -2373,8 +2373,9 @@ bool AArch64TargetLowering::targetShrinkDemandedConstant(
     return false;
 
   unsigned Size = VT.getSizeInBits();
-  assert((Size == 32 || Size == 64) &&
-         "i32 or i64 is expected after legalization.");
+
+  if (Size != 32 || Size != 64)
+    return false;
 
   // Exit early if we demand all bits.
   if (DemandedBits.popcount() == Size)
diff --git a/llvm/test/CodeGen/AArch64/half-presision-signof-no-assert.ll b/llvm/test/CodeGen/AArch64/half-presision-signof-no-assert.ll
new file mode 100644
index 00000000000000..d4d0933f5f2e60
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/half-presision-signof-no-assert.ll
@@ -0,0 +1,22 @@
+; RUN: llc -o - %s
+
+; Simply check that the following does not crash (see https://github.com/llvm/llvm-project/issues/123029)
+
+target triple = "aarch64-unknown-linux-gnu"
+
+define noalias noundef ptr @fn(ptr nocapture readonly %in, ptr nocapture readonly %out) local_unnamed_addr {
+fn:
+  %1 = load <4 x half>, ptr %in, align 16
+  %2 = fcmp one <4 x half> %1, zeroinitializer
+  %3 = uitofp <4 x i1> %2 to <4 x half>
+  store <4 x half> %3, ptr %out, align 16
+
+  %23 = getelementptr inbounds nuw i8, ptr %in, i64 8
+  %24 = load half, ptr %23, align 4
+  %25 = fcmp one half %24, 0xH0000
+  %26 = uitofp i1 %25 to half
+  %27 = call half @llvm.copysign.f16(half %26, half %24)
+  %30 = getelementptr inbounds nuw i8, ptr %out, i64 8
+  store half %27, ptr %30, align 8
+  ret ptr null
+}