[clang] [llvm] [RISCV] Add MIPS extensions (PR #121394)

Djordje Todorovic via llvm-commits llvm-commits at lists.llvm.org
Wed Jan 15 03:40:56 PST 2025


djtodoro wrote:

@topperc Thanks for the comments!

> This still isn't broken down enough. We usually like to see assembler support in separate patches from code generation.

I have removed `RISCVLoadStoreOptimizer` Pass, and will add it in a separate PR/commit.

> Missing tests in test/MC/RISCV for the assembler and disassembler

Added.



https://github.com/llvm/llvm-project/pull/121394


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