[llvm] [SelectionDAG] Fix an incorrect DebugLoc on a COPY (PR #122963)

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Tue Jan 14 19:04:16 PST 2025


================
@@ -0,0 +1,72 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+; RUN: llc -mtriple=amdgcn -mcpu=gfx1030 -o - < %s | FileCheck -check-prefix=GCN %s
+
+define void @_Z12lane_pc_testj() #0 !dbg !9 {
+; GCN-LABEL: _Z12lane_pc_testj:
+; GCN:       .Lfunc_begin0:
+; GCN-NEXT:    .file 0 "/" "t.cpp"
+; GCN-NEXT:    .loc 0 3 0 ; t.cpp:3:0
+; GCN-NEXT:    .cfi_sections .debug_frame
+; GCN-NEXT:    .cfi_startproc
+; GCN-NEXT:  ; %bb.0:
+; GCN-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GCN-NEXT:    s_mov_b32 s9, s33
+; GCN-NEXT:    s_mov_b32 s33, s32
+; GCN-NEXT:    s_add_i32 s32, s32, 0x100
+; GCN-NEXT:  ; %bb.1: ; %lab
+; GCN-NEXT:  .Ltmp0:
+; GCN-NEXT:    .loc 0 12 1 prologue_end ; t.cpp:12:1
+; GCN-NEXT:    s_mov_b64 s[4:5], src_private_base
+; GCN-NEXT:    s_mov_b32 s6, 32
+; GCN-NEXT:    s_lshr_b64 s[4:5], s[4:5], s6
+; GCN-NEXT:    s_mov_b64 s[6:7], 0
+; GCN-NEXT:    s_mov_b32 s5, -1
+; GCN-NEXT:    s_lshr_b32 s8, s33, 5
+; GCN-NEXT:    s_cmp_lg_u32 s8, s5
+; GCN-NEXT:    s_cselect_b32 s5, s4, s7
+; GCN-NEXT:    s_cselect_b32 s4, s8, s6
+; GCN-NEXT:    v_mov_b32_e32 v2, 0
+; GCN-NEXT:    .loc 0 13 1 ; t.cpp:13:1
+; GCN-NEXT:    v_mov_b32_e32 v0, s4
+; GCN-NEXT:    v_mov_b32_e32 v1, s5
+; GCN-NEXT:    flat_store_dword v[0:1], v2
+; GCN-NEXT:    v_mov_b32_e32 v2, 1
+; GCN-NEXT:    .loc 0 14 1 ; t.cpp:14:1
+; GCN-NEXT:    v_mov_b32_e32 v0, s4
+; GCN-NEXT:    v_mov_b32_e32 v1, s5
+; GCN-NEXT:    flat_store_dword v[0:1], v2
+; GCN-NEXT:    s_add_i32 s32, s32, 0xffffff00
+; GCN-NEXT:    s_mov_b32 s33, s9
+; GCN-NEXT:    s_waitcnt lgkmcnt(0)
+; GCN-NEXT:    s_setpc_b64 s[30:31]
+; GCN-NEXT:  .Ltmp1:
+  %1 = alloca i32, align 4, addrspace(5)
+  %2 = addrspacecast ptr addrspace(5) %1 to ptr, !dbg !12
+  br label %lab
+
+lab:
+  store i32 0, ptr %2, align 4, !dbg !13
+  store i32 1, ptr %2, align 4, !dbg !14
+  ret void
+}
+
+attributes #0 = { convergent mustprogress noinline nounwind optnone "amdgpu-stack-objects" "frame-pointer"="all" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="gfx1030" "target-features"="+16-bit-insts,+ci-insts,+dl-insts,+dot1-insts,+dot10-insts,+dot2-insts,+dot5-insts,+dot6-insts,+dot7-insts,+dpp,+gfx10-3-insts,+gfx10-insts,+gfx8-insts,+gfx9-insts,+s-memrealtime,+s-memtime-inst,+wavefrontsize32" }
----------------
arsenm wrote:

Can drop most of these attributes 

https://github.com/llvm/llvm-project/pull/122963


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