[llvm] [AMDGPU][True16][MC] true16 for v_cmp_xx_i/u16 (PR #122968)

[Brox Chen via llvm-commits]

https://github.com/broxigarchen created https://github.com/llvm/llvm-project/pull/122968

A bulk commit of true16 support for v_cmp_xx_i/u16 instructions including:

v_cmp_lt_i16
v_cmp_eq_i16
v_cmp_le_i16
v_cmp_gt_i16
v_cmp_ne_i16
v_cmp_ge_i16
v_cmp_lt_u16
v_cmp_eq_u16
v_cmp_le_u16
v_cmp_gt_u16
v_cmp_ne_u16
v_cmp_ge_u16

>From 30e8be40533b524f318eedb8de1813bf28073338 Mon Sep 17 00:00:00 2001
From: guochen2 <guochen2 at amd.com>
Date: Tue, 14 Jan 2025 15:47:58 -0500
Subject: [PATCH] true16 for v_cmp_xx_i/u16

---
 llvm/lib/Target/AMDGPU/VOPCInstructions.td    |   24 +-
 .../AMDGPU/gfx11_asm_vop3_dpp16_from_vopc.s   | 1476 +++++----
 .../MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vopc.s |  612 ++--
 .../test/MC/AMDGPU/gfx11_asm_vop3_from_vopc.s |  480 ++-
 llvm/test/MC/AMDGPU/gfx11_asm_vopc.s          | 2016 ++++++++-----
 llvm/test/MC/AMDGPU/gfx11_asm_vopc_dpp16.s    | 2668 ++++++++++++-----
 llvm/test/MC/AMDGPU/gfx11_asm_vopc_dpp8.s     |  576 +++-
 llvm/test/MC/AMDGPU/gfx11_asm_vopc_t16_err.s  | 1927 ++++++++----
 .../MC/AMDGPU/gfx11_asm_vopc_t16_promote.s    | 1849 ++++++++----
 llvm/test/MC/AMDGPU/gfx12_asm_vop3c.s         |  528 +++-
 llvm/test/MC/AMDGPU/gfx12_asm_vop3c_dpp16.s   | 1668 ++++++-----
 llvm/test/MC/AMDGPU/gfx12_asm_vop3c_dpp8.s    |  804 ++---
 llvm/test/MC/AMDGPU/gfx12_asm_vopc.s          | 1920 +++++++-----
 llvm/test/MC/AMDGPU/gfx12_asm_vopc_dpp16.s    | 2510 +++++++++++-----
 llvm/test/MC/AMDGPU/gfx12_asm_vopc_dpp8.s     |  480 ++-
 llvm/test/MC/AMDGPU/gfx12_asm_vopc_t16_err.s  | 1927 ++++++++----
 .../MC/AMDGPU/gfx12_asm_vopc_t16_promote.s    | 2353 +++++++++++----
 .../gfx11_dasm_vop3_dpp16_from_vopc.txt       | 1140 +++++--
 .../AMDGPU/gfx11_dasm_vop3_dpp8_from_vopc.txt |  492 ++-
 .../AMDGPU/gfx11_dasm_vop3_from_vopc.txt      |  288 +-
 .../Disassembler/AMDGPU/gfx11_dasm_vopc.txt   | 1440 ++++++---
 .../AMDGPU/gfx11_dasm_vopc_dpp16.txt          | 1224 +++++---
 .../AMDGPU/gfx11_dasm_vopc_dpp8.txt           |  360 ++-
 .../Disassembler/AMDGPU/gfx12_dasm_vop3c.txt  |  300 +-
 .../AMDGPU/gfx12_dasm_vop3c_dpp16.txt         | 1217 +++++---
 .../AMDGPU/gfx12_dasm_vop3c_dpp8.txt          |  564 +++-
 .../Disassembler/AMDGPU/gfx12_dasm_vopc.txt   | 1368 ++++++---
 .../AMDGPU/gfx12_dasm_vopc_dpp16.txt          | 1152 ++++---
 .../AMDGPU/gfx12_dasm_vopc_dpp8.txt           |  300 +-
 29 files changed, 23543 insertions(+), 10120 deletions(-)

diff --git a/llvm/lib/Target/AMDGPU/VOPCInstructions.td b/llvm/lib/Target/AMDGPU/VOPCInstructions.td
index 14e34c9e00ec6f..28aa5a5b35d35e 100644
--- a/llvm/lib/Target/AMDGPU/VOPCInstructions.td
+++ b/llvm/lib/Target/AMDGPU/VOPCInstructions.td
@@ -1796,18 +1796,18 @@ defm V_CMP_NLT_F32    : VOPC_Real_gfx11_gfx12<0x01e>;
 defm V_CMP_T_F32      : VOPC_Real_with_name_gfx11<0x01f, "V_CMP_TRU_F32", "v_cmp_t_f32">;
 defm V_CMP_T_F64      : VOPC_Real_with_name_gfx11<0x02f, "V_CMP_TRU_F64", "v_cmp_t_f64">;
 
-defm V_CMP_LT_I16_fake16     : VOPC_Real_t16_gfx11_gfx12<0x031, "v_cmp_lt_i16">;
-defm V_CMP_EQ_I16_fake16     : VOPC_Real_t16_gfx11_gfx12<0x032, "v_cmp_eq_i16">;
-defm V_CMP_LE_I16_fake16     : VOPC_Real_t16_gfx11_gfx12<0x033, "v_cmp_le_i16">;
-defm V_CMP_GT_I16_fake16     : VOPC_Real_t16_gfx11_gfx12<0x034, "v_cmp_gt_i16">;
-defm V_CMP_NE_I16_fake16     : VOPC_Real_t16_gfx11_gfx12<0x035, "v_cmp_ne_i16">;
-defm V_CMP_GE_I16_fake16     : VOPC_Real_t16_gfx11_gfx12<0x036, "v_cmp_ge_i16">;
-defm V_CMP_LT_U16_fake16     : VOPC_Real_t16_gfx11_gfx12<0x039, "v_cmp_lt_u16">;
-defm V_CMP_EQ_U16_fake16     : VOPC_Real_t16_gfx11_gfx12<0x03a, "v_cmp_eq_u16">;
-defm V_CMP_LE_U16_fake16     : VOPC_Real_t16_gfx11_gfx12<0x03b, "v_cmp_le_u16">;
-defm V_CMP_GT_U16_fake16     : VOPC_Real_t16_gfx11_gfx12<0x03c, "v_cmp_gt_u16">;
-defm V_CMP_NE_U16_fake16     : VOPC_Real_t16_gfx11_gfx12<0x03d, "v_cmp_ne_u16">;
-defm V_CMP_GE_U16_fake16     : VOPC_Real_t16_gfx11_gfx12<0x03e, "v_cmp_ge_u16">;
+defm V_CMP_LT_I16     : VOPC_Real_t16_and_fake16_gfx11_gfx12<0x031, "v_cmp_lt_i16">;
+defm V_CMP_EQ_I16     : VOPC_Real_t16_and_fake16_gfx11_gfx12<0x032, "v_cmp_eq_i16">;
+defm V_CMP_LE_I16     : VOPC_Real_t16_and_fake16_gfx11_gfx12<0x033, "v_cmp_le_i16">;
+defm V_CMP_GT_I16     : VOPC_Real_t16_and_fake16_gfx11_gfx12<0x034, "v_cmp_gt_i16">;
+defm V_CMP_NE_I16     : VOPC_Real_t16_and_fake16_gfx11_gfx12<0x035, "v_cmp_ne_i16">;
+defm V_CMP_GE_I16     : VOPC_Real_t16_and_fake16_gfx11_gfx12<0x036, "v_cmp_ge_i16">;
+defm V_CMP_LT_U16     : VOPC_Real_t16_and_fake16_gfx11_gfx12<0x039, "v_cmp_lt_u16">;
+defm V_CMP_EQ_U16     : VOPC_Real_t16_and_fake16_gfx11_gfx12<0x03a, "v_cmp_eq_u16">;
+defm V_CMP_LE_U16     : VOPC_Real_t16_and_fake16_gfx11_gfx12<0x03b, "v_cmp_le_u16">;
+defm V_CMP_GT_U16     : VOPC_Real_t16_and_fake16_gfx11_gfx12<0x03c, "v_cmp_gt_u16">;
+defm V_CMP_NE_U16     : VOPC_Real_t16_and_fake16_gfx11_gfx12<0x03d, "v_cmp_ne_u16">;
+defm V_CMP_GE_U16     : VOPC_Real_t16_and_fake16_gfx11_gfx12<0x03e, "v_cmp_ge_u16">;
 
 defm V_CMP_F_I32      : VOPC_Real_gfx11<0x040>;
 defm V_CMP_LT_I32     : VOPC_Real_gfx11_gfx12<0x041>;
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vopc.s b/llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vopc.s
index 798616cef66398..8745e81707b0e3 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vopc.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vopc.s
@@ -432,112 +432,127 @@ v_cmp_eq_f32_e64_dpp ttmp[14:15], -v1, |v2| row_xmask:0 row_mask:0x1 bank_mask:0
 v_cmp_eq_f32_e64_dpp null, -|v255|, -|v255| clamp row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
 // GFX11: v_cmp_eq_f32_e64_dpp null, -|v255|, -|v255| clamp row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x83,0x12,0xd4,0xfa,0xfe,0x03,0x60,0xff,0x6f,0x05,0x30]
 
-v_cmp_eq_i16_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0]
-// W32: v_cmp_eq_i16_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_eq_i16_e64_dpp s5, v1.l, v2.l quad_perm:[3,2,1,0]
+// W32: v_cmp_eq_i16_e64_dpp s5, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_i16_e64_dpp s5, v1, v2 quad_perm:[0,1,2,3]
-// W32: v_cmp_eq_i16_e64_dpp s5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+v_cmp_eq_i16_e64_dpp s5, v1.l, v2.l quad_perm:[0,1,2,3]
+// W32: v_cmp_eq_i16_e64_dpp s5, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_i16_e64_dpp s5, v1, v2 row_mirror
-// W32: v_cmp_eq_i16_e64_dpp s5, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+v_cmp_eq_i16_e64_dpp s5, v1.l, v2.l row_mirror
+// W32: v_cmp_eq_i16_e64_dpp s5, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_i16_e64_dpp s5, v1, v2 row_half_mirror
-// W32: v_cmp_eq_i16_e64_dpp s5, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+v_cmp_eq_i16_e64_dpp s5, v1.l, v2.l row_half_mirror
+// W32: v_cmp_eq_i16_e64_dpp s5, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_i16_e64_dpp s5, v1, v2 row_shl:1
-// W32: v_cmp_eq_i16_e64_dpp s5, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+v_cmp_eq_i16_e64_dpp s5, v1.l, v2.l row_shl:1
+// W32: v_cmp_eq_i16_e64_dpp s5, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_i16_e64_dpp s5, v1, v2 row_shl:15
-// W32: v_cmp_eq_i16_e64_dpp s5, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+v_cmp_eq_i16_e64_dpp s5, v1.l, v2.l row_shl:15
+// W32: v_cmp_eq_i16_e64_dpp s5, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_i16_e64_dpp s5, v1, v2 row_shr:1
-// W32: v_cmp_eq_i16_e64_dpp s5, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+v_cmp_eq_i16_e64_dpp s5, v1.l, v2.l row_shr:1
+// W32: v_cmp_eq_i16_e64_dpp s5, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_i16_e64_dpp s5, v1, v2 row_shr:15
-// W32: v_cmp_eq_i16_e64_dpp s5, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+v_cmp_eq_i16_e64_dpp s5, v1.l, v2.l row_shr:15
+// W32: v_cmp_eq_i16_e64_dpp s5, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_i16_e64_dpp s5, v1, v2 row_ror:1
-// W32: v_cmp_eq_i16_e64_dpp s5, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+v_cmp_eq_i16_e64_dpp s5, v1.l, v2.l row_ror:1
+// W32: v_cmp_eq_i16_e64_dpp s5, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_i16_e64_dpp s105, v1, v2 row_ror:15
-// W32: v_cmp_eq_i16_e64_dpp s105, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x69,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+v_cmp_eq_i16_e64_dpp s105, v1.l, v2.l row_ror:15
+// W32: v_cmp_eq_i16_e64_dpp s105, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x69,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_i16_e64_dpp vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W32: v_cmp_eq_i16_e64_dpp vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+v_cmp_eq_i16_e64_dpp vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_eq_i16_e64_dpp vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_i16_e64_dpp vcc_hi, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W32: v_cmp_eq_i16_e64_dpp vcc_hi, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6b,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+v_cmp_eq_i16_e64_dpp vcc_hi, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_eq_i16_e64_dpp vcc_hi, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6b,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_i16_e64_dpp ttmp15, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W32: v_cmp_eq_i16_e64_dpp ttmp15, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7b,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+v_cmp_eq_i16_e64_dpp ttmp15, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W32: v_cmp_eq_i16_e64_dpp ttmp15, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7b,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0]
-// W64: v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_eq_i16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[3,2,1,0]
+// W64: v_cmp_eq_i16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3]
-// W64: v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+v_cmp_eq_i16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[0,1,2,3]
+// W64: v_cmp_eq_i16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 row_mirror
-// W64: v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+v_cmp_eq_i16_e64_dpp s[10:11], v1.l, v2.l row_mirror
+// W64: v_cmp_eq_i16_e64_dpp s[10:11], v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 row_half_mirror
-// W64: v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+v_cmp_eq_i16_e64_dpp s[10:11], v1.l, v2.l row_half_mirror
+// W64: v_cmp_eq_i16_e64_dpp s[10:11], v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 row_shl:1
-// W64: v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+v_cmp_eq_i16_e64_dpp s[10:11], v1.l, v2.l row_shl:1
+// W64: v_cmp_eq_i16_e64_dpp s[10:11], v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 row_shl:15
-// W64: v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+v_cmp_eq_i16_e64_dpp s[10:11], v1.l, v2.l row_shl:15
+// W64: v_cmp_eq_i16_e64_dpp s[10:11], v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 row_shr:1
-// W64: v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+v_cmp_eq_i16_e64_dpp s[10:11], v1.l, v2.l row_shr:1
+// W64: v_cmp_eq_i16_e64_dpp s[10:11], v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 row_shr:15
-// W64: v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+v_cmp_eq_i16_e64_dpp s[10:11], v1.l, v2.l row_shr:15
+// W64: v_cmp_eq_i16_e64_dpp s[10:11], v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 row_ror:1
-// W64: v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+v_cmp_eq_i16_e64_dpp s[10:11], v1.l, v2.l row_ror:1
+// W64: v_cmp_eq_i16_e64_dpp s[10:11], v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 row_ror:15
-// W64: v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+v_cmp_eq_i16_e64_dpp s[10:11], v1.l, v2.l row_ror:15
+// W64: v_cmp_eq_i16_e64_dpp s[10:11], v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_i16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W64: v_cmp_eq_i16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+v_cmp_eq_i16_e64_dpp s[104:105], v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_eq_i16_e64_dpp s[104:105], v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_i16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W64: v_cmp_eq_i16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+v_cmp_eq_i16_e64_dpp vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W64: v_cmp_eq_i16_e64_dpp vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_i16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W64: v_cmp_eq_i16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+v_cmp_eq_i16_e64_dpp ttmp[14:15], v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W64: v_cmp_eq_i16_e64_dpp ttmp[14:15], v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_i16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
-// GFX11: v_cmp_eq_i16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x00,0x32,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
+v_cmp_eq_i16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// GFX11: v_cmp_eq_i16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x00,0x32,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
+
+v_cmp_eq_i16_e64_dpp vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_eq_i16_e64_dpp vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_eq_i16_e64_dpp ttmp15, v1.h, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W32: v_cmp_eq_i16_e64_dpp ttmp15, v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7b,0x08,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_eq_i16_e64_dpp ttmp[14:15], v1.h, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W64: v_cmp_eq_i16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7a,0x08,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+// W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_eq_i16_e64_dpp null, v255.l, v255.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// GFX11: v_cmp_eq_i16_e64_dpp null, v255.l, v255.h op_sel:[0,1] row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x10,0x32,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
 
 v_cmp_eq_i32_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0]
 // W32: v_cmp_eq_i32_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x42,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
@@ -646,112 +661,127 @@ v_cmp_eq_i32_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3
 v_cmp_eq_i32_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
 // GFX11: v_cmp_eq_i32_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x00,0x42,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
 
-v_cmp_eq_u16_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0]
-// W32: v_cmp_eq_u16_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_eq_u16_e64_dpp s5, v1.l, v2.l quad_perm:[3,2,1,0]
+// W32: v_cmp_eq_u16_e64_dpp s5, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_u16_e64_dpp s5, v1, v2 quad_perm:[0,1,2,3]
-// W32: v_cmp_eq_u16_e64_dpp s5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+v_cmp_eq_u16_e64_dpp s5, v1.l, v2.l quad_perm:[0,1,2,3]
+// W32: v_cmp_eq_u16_e64_dpp s5, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_u16_e64_dpp s5, v1, v2 row_mirror
-// W32: v_cmp_eq_u16_e64_dpp s5, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+v_cmp_eq_u16_e64_dpp s5, v1.l, v2.l row_mirror
+// W32: v_cmp_eq_u16_e64_dpp s5, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_u16_e64_dpp s5, v1, v2 row_half_mirror
-// W32: v_cmp_eq_u16_e64_dpp s5, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+v_cmp_eq_u16_e64_dpp s5, v1.l, v2.l row_half_mirror
+// W32: v_cmp_eq_u16_e64_dpp s5, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_u16_e64_dpp s5, v1, v2 row_shl:1
-// W32: v_cmp_eq_u16_e64_dpp s5, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+v_cmp_eq_u16_e64_dpp s5, v1.l, v2.l row_shl:1
+// W32: v_cmp_eq_u16_e64_dpp s5, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_u16_e64_dpp s5, v1, v2 row_shl:15
-// W32: v_cmp_eq_u16_e64_dpp s5, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+v_cmp_eq_u16_e64_dpp s5, v1.l, v2.l row_shl:15
+// W32: v_cmp_eq_u16_e64_dpp s5, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_u16_e64_dpp s5, v1, v2 row_shr:1
-// W32: v_cmp_eq_u16_e64_dpp s5, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+v_cmp_eq_u16_e64_dpp s5, v1.l, v2.l row_shr:1
+// W32: v_cmp_eq_u16_e64_dpp s5, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_u16_e64_dpp s5, v1, v2 row_shr:15
-// W32: v_cmp_eq_u16_e64_dpp s5, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+v_cmp_eq_u16_e64_dpp s5, v1.l, v2.l row_shr:15
+// W32: v_cmp_eq_u16_e64_dpp s5, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_u16_e64_dpp s5, v1, v2 row_ror:1
-// W32: v_cmp_eq_u16_e64_dpp s5, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+v_cmp_eq_u16_e64_dpp s5, v1.l, v2.l row_ror:1
+// W32: v_cmp_eq_u16_e64_dpp s5, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_u16_e64_dpp s105, v1, v2 row_ror:15
-// W32: v_cmp_eq_u16_e64_dpp s105, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x69,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+v_cmp_eq_u16_e64_dpp s105, v1.l, v2.l row_ror:15
+// W32: v_cmp_eq_u16_e64_dpp s105, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x69,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_u16_e64_dpp vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W32: v_cmp_eq_u16_e64_dpp vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+v_cmp_eq_u16_e64_dpp vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_eq_u16_e64_dpp vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_u16_e64_dpp vcc_hi, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W32: v_cmp_eq_u16_e64_dpp vcc_hi, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6b,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+v_cmp_eq_u16_e64_dpp vcc_hi, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_eq_u16_e64_dpp vcc_hi, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6b,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_u16_e64_dpp ttmp15, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W32: v_cmp_eq_u16_e64_dpp ttmp15, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7b,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+v_cmp_eq_u16_e64_dpp ttmp15, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W32: v_cmp_eq_u16_e64_dpp ttmp15, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7b,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0]
-// W64: v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_eq_u16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[3,2,1,0]
+// W64: v_cmp_eq_u16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3]
-// W64: v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+v_cmp_eq_u16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[0,1,2,3]
+// W64: v_cmp_eq_u16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 row_mirror
-// W64: v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+v_cmp_eq_u16_e64_dpp s[10:11], v1.l, v2.l row_mirror
+// W64: v_cmp_eq_u16_e64_dpp s[10:11], v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 row_half_mirror
-// W64: v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+v_cmp_eq_u16_e64_dpp s[10:11], v1.l, v2.l row_half_mirror
+// W64: v_cmp_eq_u16_e64_dpp s[10:11], v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 row_shl:1
-// W64: v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+v_cmp_eq_u16_e64_dpp s[10:11], v1.l, v2.l row_shl:1
+// W64: v_cmp_eq_u16_e64_dpp s[10:11], v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 row_shl:15
-// W64: v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+v_cmp_eq_u16_e64_dpp s[10:11], v1.l, v2.l row_shl:15
+// W64: v_cmp_eq_u16_e64_dpp s[10:11], v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 row_shr:1
-// W64: v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+v_cmp_eq_u16_e64_dpp s[10:11], v1.l, v2.l row_shr:1
+// W64: v_cmp_eq_u16_e64_dpp s[10:11], v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 row_shr:15
-// W64: v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+v_cmp_eq_u16_e64_dpp s[10:11], v1.l, v2.l row_shr:15
+// W64: v_cmp_eq_u16_e64_dpp s[10:11], v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 row_ror:1
-// W64: v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+v_cmp_eq_u16_e64_dpp s[10:11], v1.l, v2.l row_ror:1
+// W64: v_cmp_eq_u16_e64_dpp s[10:11], v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 row_ror:15
-// W64: v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+v_cmp_eq_u16_e64_dpp s[10:11], v1.l, v2.l row_ror:15
+// W64: v_cmp_eq_u16_e64_dpp s[10:11], v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_u16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W64: v_cmp_eq_u16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+v_cmp_eq_u16_e64_dpp s[104:105], v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_eq_u16_e64_dpp s[104:105], v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_u16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W64: v_cmp_eq_u16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+v_cmp_eq_u16_e64_dpp vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W64: v_cmp_eq_u16_e64_dpp vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_u16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W64: v_cmp_eq_u16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+v_cmp_eq_u16_e64_dpp ttmp[14:15], v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W64: v_cmp_eq_u16_e64_dpp ttmp[14:15], v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_u16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
-// GFX11: v_cmp_eq_u16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x00,0x3a,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
+v_cmp_eq_u16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// GFX11: v_cmp_eq_u16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x00,0x3a,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
+
+v_cmp_eq_u16_e64_dpp vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_eq_u16_e64_dpp vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_eq_u16_e64_dpp ttmp15, v1.h, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W32: v_cmp_eq_u16_e64_dpp ttmp15, v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7b,0x08,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_eq_u16_e64_dpp ttmp[14:15], v1.h, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W64: v_cmp_eq_u16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7a,0x08,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+// W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_eq_u16_e64_dpp null, v255.l, v255.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// GFX11: v_cmp_eq_u16_e64_dpp null, v255.l, v255.h op_sel:[0,1] row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x10,0x3a,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
 
 v_cmp_eq_u32_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0]
 // W32: v_cmp_eq_u32_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x4a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
@@ -1502,112 +1532,127 @@ v_cmp_ge_f32_e64_dpp ttmp[14:15], -v1, |v2| row_xmask:0 row_mask:0x1 bank_mask:0
 v_cmp_ge_f32_e64_dpp null, -|v255|, -|v255| clamp row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
 // GFX11: v_cmp_ge_f32_e64_dpp null, -|v255|, -|v255| clamp row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x83,0x16,0xd4,0xfa,0xfe,0x03,0x60,0xff,0x6f,0x05,0x30]
 
-v_cmp_ge_i16_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0]
-// W32: v_cmp_ge_i16_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_ge_i16_e64_dpp s5, v1.l, v2.l quad_perm:[3,2,1,0]
+// W32: v_cmp_ge_i16_e64_dpp s5, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_i16_e64_dpp s5, v1, v2 quad_perm:[0,1,2,3]
-// W32: v_cmp_ge_i16_e64_dpp s5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+v_cmp_ge_i16_e64_dpp s5, v1.l, v2.l quad_perm:[0,1,2,3]
+// W32: v_cmp_ge_i16_e64_dpp s5, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_i16_e64_dpp s5, v1, v2 row_mirror
-// W32: v_cmp_ge_i16_e64_dpp s5, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+v_cmp_ge_i16_e64_dpp s5, v1.l, v2.l row_mirror
+// W32: v_cmp_ge_i16_e64_dpp s5, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_i16_e64_dpp s5, v1, v2 row_half_mirror
-// W32: v_cmp_ge_i16_e64_dpp s5, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+v_cmp_ge_i16_e64_dpp s5, v1.l, v2.l row_half_mirror
+// W32: v_cmp_ge_i16_e64_dpp s5, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_i16_e64_dpp s5, v1, v2 row_shl:1
-// W32: v_cmp_ge_i16_e64_dpp s5, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+v_cmp_ge_i16_e64_dpp s5, v1.l, v2.l row_shl:1
+// W32: v_cmp_ge_i16_e64_dpp s5, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_i16_e64_dpp s5, v1, v2 row_shl:15
-// W32: v_cmp_ge_i16_e64_dpp s5, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+v_cmp_ge_i16_e64_dpp s5, v1.l, v2.l row_shl:15
+// W32: v_cmp_ge_i16_e64_dpp s5, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_i16_e64_dpp s5, v1, v2 row_shr:1
-// W32: v_cmp_ge_i16_e64_dpp s5, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+v_cmp_ge_i16_e64_dpp s5, v1.l, v2.l row_shr:1
+// W32: v_cmp_ge_i16_e64_dpp s5, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_i16_e64_dpp s5, v1, v2 row_shr:15
-// W32: v_cmp_ge_i16_e64_dpp s5, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+v_cmp_ge_i16_e64_dpp s5, v1.l, v2.l row_shr:15
+// W32: v_cmp_ge_i16_e64_dpp s5, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_i16_e64_dpp s5, v1, v2 row_ror:1
-// W32: v_cmp_ge_i16_e64_dpp s5, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+v_cmp_ge_i16_e64_dpp s5, v1.l, v2.l row_ror:1
+// W32: v_cmp_ge_i16_e64_dpp s5, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_i16_e64_dpp s105, v1, v2 row_ror:15
-// W32: v_cmp_ge_i16_e64_dpp s105, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x69,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+v_cmp_ge_i16_e64_dpp s105, v1.l, v2.l row_ror:15
+// W32: v_cmp_ge_i16_e64_dpp s105, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x69,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_i16_e64_dpp vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W32: v_cmp_ge_i16_e64_dpp vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+v_cmp_ge_i16_e64_dpp vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ge_i16_e64_dpp vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_i16_e64_dpp vcc_hi, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W32: v_cmp_ge_i16_e64_dpp vcc_hi, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6b,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+v_cmp_ge_i16_e64_dpp vcc_hi, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_ge_i16_e64_dpp vcc_hi, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6b,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_i16_e64_dpp ttmp15, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W32: v_cmp_ge_i16_e64_dpp ttmp15, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7b,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+v_cmp_ge_i16_e64_dpp ttmp15, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W32: v_cmp_ge_i16_e64_dpp ttmp15, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7b,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0]
-// W64: v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_ge_i16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[3,2,1,0]
+// W64: v_cmp_ge_i16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_ge_i16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[0,1,2,3]
+// W64: v_cmp_ge_i16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3]
-// W64: v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+v_cmp_ge_i16_e64_dpp s[10:11], v1.l, v2.l row_mirror
+// W64: v_cmp_ge_i16_e64_dpp s[10:11], v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 row_mirror
-// W64: v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+v_cmp_ge_i16_e64_dpp s[10:11], v1.l, v2.l row_half_mirror
+// W64: v_cmp_ge_i16_e64_dpp s[10:11], v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 row_half_mirror
-// W64: v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+v_cmp_ge_i16_e64_dpp s[10:11], v1.l, v2.l row_shl:1
+// W64: v_cmp_ge_i16_e64_dpp s[10:11], v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 row_shl:1
-// W64: v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+v_cmp_ge_i16_e64_dpp s[10:11], v1.l, v2.l row_shl:15
+// W64: v_cmp_ge_i16_e64_dpp s[10:11], v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 row_shl:15
-// W64: v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+v_cmp_ge_i16_e64_dpp s[10:11], v1.l, v2.l row_shr:1
+// W64: v_cmp_ge_i16_e64_dpp s[10:11], v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 row_shr:1
-// W64: v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+v_cmp_ge_i16_e64_dpp s[10:11], v1.l, v2.l row_shr:15
+// W64: v_cmp_ge_i16_e64_dpp s[10:11], v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 row_shr:15
-// W64: v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+v_cmp_ge_i16_e64_dpp s[10:11], v1.l, v2.l row_ror:1
+// W64: v_cmp_ge_i16_e64_dpp s[10:11], v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 row_ror:1
-// W64: v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+v_cmp_ge_i16_e64_dpp s[10:11], v1.l, v2.l row_ror:15
+// W64: v_cmp_ge_i16_e64_dpp s[10:11], v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 row_ror:15
-// W64: v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+v_cmp_ge_i16_e64_dpp s[104:105], v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ge_i16_e64_dpp s[104:105], v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_i16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W64: v_cmp_ge_i16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+v_cmp_ge_i16_e64_dpp vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W64: v_cmp_ge_i16_e64_dpp vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_i16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W64: v_cmp_ge_i16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+v_cmp_ge_i16_e64_dpp ttmp[14:15], v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W64: v_cmp_ge_i16_e64_dpp ttmp[14:15], v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_i16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W64: v_cmp_ge_i16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+v_cmp_ge_i16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// GFX11: v_cmp_ge_i16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x00,0x36,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
+
+v_cmp_ge_i16_e64_dpp vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_ge_i16_e64_dpp vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_ge_i16_e64_dpp ttmp15, v1.h, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W32: v_cmp_ge_i16_e64_dpp ttmp15, v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7b,0x08,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_ge_i16_e64_dpp ttmp[14:15], v1.h, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W64: v_cmp_ge_i16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7a,0x08,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_i16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
-// GFX11: v_cmp_ge_i16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x00,0x36,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
+v_cmp_ge_i16_e64_dpp null, v255.l, v255.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// GFX11: v_cmp_ge_i16_e64_dpp null, v255.l, v255.h op_sel:[0,1] row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x10,0x36,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
 
 v_cmp_ge_i32_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0]
 // W32: v_cmp_ge_i32_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x46,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
@@ -1716,112 +1761,127 @@ v_cmp_ge_i32_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3
 v_cmp_ge_i32_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
 // GFX11: v_cmp_ge_i32_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x00,0x46,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
 
-v_cmp_ge_u16_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0]
-// W32: v_cmp_ge_u16_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_ge_u16_e64_dpp s5, v1.l, v2.l quad_perm:[3,2,1,0]
+// W32: v_cmp_ge_u16_e64_dpp s5, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_u16_e64_dpp s5, v1, v2 quad_perm:[0,1,2,3]
-// W32: v_cmp_ge_u16_e64_dpp s5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+v_cmp_ge_u16_e64_dpp s5, v1.l, v2.l quad_perm:[0,1,2,3]
+// W32: v_cmp_ge_u16_e64_dpp s5, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_u16_e64_dpp s5, v1, v2 row_mirror
-// W32: v_cmp_ge_u16_e64_dpp s5, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+v_cmp_ge_u16_e64_dpp s5, v1.l, v2.l row_mirror
+// W32: v_cmp_ge_u16_e64_dpp s5, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_u16_e64_dpp s5, v1, v2 row_half_mirror
-// W32: v_cmp_ge_u16_e64_dpp s5, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+v_cmp_ge_u16_e64_dpp s5, v1.l, v2.l row_half_mirror
+// W32: v_cmp_ge_u16_e64_dpp s5, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_u16_e64_dpp s5, v1, v2 row_shl:1
-// W32: v_cmp_ge_u16_e64_dpp s5, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+v_cmp_ge_u16_e64_dpp s5, v1.l, v2.l row_shl:1
+// W32: v_cmp_ge_u16_e64_dpp s5, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_u16_e64_dpp s5, v1, v2 row_shl:15
-// W32: v_cmp_ge_u16_e64_dpp s5, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+v_cmp_ge_u16_e64_dpp s5, v1.l, v2.l row_shl:15
+// W32: v_cmp_ge_u16_e64_dpp s5, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_u16_e64_dpp s5, v1, v2 row_shr:1
-// W32: v_cmp_ge_u16_e64_dpp s5, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+v_cmp_ge_u16_e64_dpp s5, v1.l, v2.l row_shr:1
+// W32: v_cmp_ge_u16_e64_dpp s5, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_u16_e64_dpp s5, v1, v2 row_shr:15
-// W32: v_cmp_ge_u16_e64_dpp s5, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+v_cmp_ge_u16_e64_dpp s5, v1.l, v2.l row_shr:15
+// W32: v_cmp_ge_u16_e64_dpp s5, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_u16_e64_dpp s5, v1, v2 row_ror:1
-// W32: v_cmp_ge_u16_e64_dpp s5, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+v_cmp_ge_u16_e64_dpp s5, v1.l, v2.l row_ror:1
+// W32: v_cmp_ge_u16_e64_dpp s5, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_u16_e64_dpp s105, v1, v2 row_ror:15
-// W32: v_cmp_ge_u16_e64_dpp s105, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x69,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+v_cmp_ge_u16_e64_dpp s105, v1.l, v2.l row_ror:15
+// W32: v_cmp_ge_u16_e64_dpp s105, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x69,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_u16_e64_dpp vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W32: v_cmp_ge_u16_e64_dpp vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+v_cmp_ge_u16_e64_dpp vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ge_u16_e64_dpp vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_u16_e64_dpp vcc_hi, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W32: v_cmp_ge_u16_e64_dpp vcc_hi, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6b,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+v_cmp_ge_u16_e64_dpp vcc_hi, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_ge_u16_e64_dpp vcc_hi, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6b,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_u16_e64_dpp ttmp15, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W32: v_cmp_ge_u16_e64_dpp ttmp15, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7b,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+v_cmp_ge_u16_e64_dpp ttmp15, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W32: v_cmp_ge_u16_e64_dpp ttmp15, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7b,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0]
-// W64: v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_ge_u16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[3,2,1,0]
+// W64: v_cmp_ge_u16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3]
-// W64: v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+v_cmp_ge_u16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[0,1,2,3]
+// W64: v_cmp_ge_u16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 row_mirror
-// W64: v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+v_cmp_ge_u16_e64_dpp s[10:11], v1.l, v2.l row_mirror
+// W64: v_cmp_ge_u16_e64_dpp s[10:11], v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 row_half_mirror
-// W64: v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+v_cmp_ge_u16_e64_dpp s[10:11], v1.l, v2.l row_half_mirror
+// W64: v_cmp_ge_u16_e64_dpp s[10:11], v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 row_shl:1
-// W64: v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+v_cmp_ge_u16_e64_dpp s[10:11], v1.l, v2.l row_shl:1
+// W64: v_cmp_ge_u16_e64_dpp s[10:11], v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 row_shl:15
-// W64: v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+v_cmp_ge_u16_e64_dpp s[10:11], v1.l, v2.l row_shl:15
+// W64: v_cmp_ge_u16_e64_dpp s[10:11], v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 row_shr:1
-// W64: v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+v_cmp_ge_u16_e64_dpp s[10:11], v1.l, v2.l row_shr:1
+// W64: v_cmp_ge_u16_e64_dpp s[10:11], v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 row_shr:15
-// W64: v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+v_cmp_ge_u16_e64_dpp s[10:11], v1.l, v2.l row_shr:15
+// W64: v_cmp_ge_u16_e64_dpp s[10:11], v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 row_ror:1
-// W64: v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+v_cmp_ge_u16_e64_dpp s[10:11], v1.l, v2.l row_ror:1
+// W64: v_cmp_ge_u16_e64_dpp s[10:11], v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 row_ror:15
-// W64: v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+v_cmp_ge_u16_e64_dpp s[10:11], v1.l, v2.l row_ror:15
+// W64: v_cmp_ge_u16_e64_dpp s[10:11], v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_u16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W64: v_cmp_ge_u16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+v_cmp_ge_u16_e64_dpp s[104:105], v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ge_u16_e64_dpp s[104:105], v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_u16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W64: v_cmp_ge_u16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+v_cmp_ge_u16_e64_dpp vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W64: v_cmp_ge_u16_e64_dpp vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_u16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W64: v_cmp_ge_u16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+v_cmp_ge_u16_e64_dpp ttmp[14:15], v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W64: v_cmp_ge_u16_e64_dpp ttmp[14:15], v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_u16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
-// GFX11: v_cmp_ge_u16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x00,0x3e,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
+v_cmp_ge_u16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// GFX11: v_cmp_ge_u16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x00,0x3e,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
+
+v_cmp_ge_u16_e64_dpp vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_ge_u16_e64_dpp vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_ge_u16_e64_dpp ttmp15, v1.h, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W32: v_cmp_ge_u16_e64_dpp ttmp15, v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7b,0x08,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_ge_u16_e64_dpp ttmp[14:15], v1.h, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W64: v_cmp_ge_u16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7a,0x08,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+// W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_ge_u16_e64_dpp null, v255.l, v255.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// GFX11: v_cmp_ge_u16_e64_dpp null, v255.l, v255.h op_sel:[0,1] row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x10,0x3e,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
 
 v_cmp_ge_u32_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0]
 // W32: v_cmp_ge_u32_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x4e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
@@ -2144,112 +2204,127 @@ v_cmp_gt_f32_e64_dpp ttmp[14:15], -v1, |v2| row_xmask:0 row_mask:0x1 bank_mask:0
 v_cmp_gt_f32_e64_dpp null, -|v255|, -|v255| clamp row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
 // GFX11: v_cmp_gt_f32_e64_dpp null, -|v255|, -|v255| clamp row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x83,0x14,0xd4,0xfa,0xfe,0x03,0x60,0xff,0x6f,0x05,0x30]
 
-v_cmp_gt_i16_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0]
-// W32: v_cmp_gt_i16_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_gt_i16_e64_dpp s5, v1.l, v2.l quad_perm:[3,2,1,0]
+// W32: v_cmp_gt_i16_e64_dpp s5, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_i16_e64_dpp s5, v1, v2 quad_perm:[0,1,2,3]
-// W32: v_cmp_gt_i16_e64_dpp s5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+v_cmp_gt_i16_e64_dpp s5, v1.l, v2.l quad_perm:[0,1,2,3]
+// W32: v_cmp_gt_i16_e64_dpp s5, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_i16_e64_dpp s5, v1, v2 row_mirror
-// W32: v_cmp_gt_i16_e64_dpp s5, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+v_cmp_gt_i16_e64_dpp s5, v1.l, v2.l row_mirror
+// W32: v_cmp_gt_i16_e64_dpp s5, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_i16_e64_dpp s5, v1, v2 row_half_mirror
-// W32: v_cmp_gt_i16_e64_dpp s5, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+v_cmp_gt_i16_e64_dpp s5, v1.l, v2.l row_half_mirror
+// W32: v_cmp_gt_i16_e64_dpp s5, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_i16_e64_dpp s5, v1, v2 row_shl:1
-// W32: v_cmp_gt_i16_e64_dpp s5, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+v_cmp_gt_i16_e64_dpp s5, v1.l, v2.l row_shl:1
+// W32: v_cmp_gt_i16_e64_dpp s5, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_i16_e64_dpp s5, v1, v2 row_shl:15
-// W32: v_cmp_gt_i16_e64_dpp s5, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+v_cmp_gt_i16_e64_dpp s5, v1.l, v2.l row_shl:15
+// W32: v_cmp_gt_i16_e64_dpp s5, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_i16_e64_dpp s5, v1, v2 row_shr:1
-// W32: v_cmp_gt_i16_e64_dpp s5, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+v_cmp_gt_i16_e64_dpp s5, v1.l, v2.l row_shr:1
+// W32: v_cmp_gt_i16_e64_dpp s5, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_i16_e64_dpp s5, v1, v2 row_shr:15
-// W32: v_cmp_gt_i16_e64_dpp s5, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+v_cmp_gt_i16_e64_dpp s5, v1.l, v2.l row_shr:15
+// W32: v_cmp_gt_i16_e64_dpp s5, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_i16_e64_dpp s5, v1, v2 row_ror:1
-// W32: v_cmp_gt_i16_e64_dpp s5, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+v_cmp_gt_i16_e64_dpp s5, v1.l, v2.l row_ror:1
+// W32: v_cmp_gt_i16_e64_dpp s5, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_i16_e64_dpp s105, v1, v2 row_ror:15
-// W32: v_cmp_gt_i16_e64_dpp s105, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x69,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+v_cmp_gt_i16_e64_dpp s105, v1.l, v2.l row_ror:15
+// W32: v_cmp_gt_i16_e64_dpp s105, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x69,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_i16_e64_dpp vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W32: v_cmp_gt_i16_e64_dpp vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+v_cmp_gt_i16_e64_dpp vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_gt_i16_e64_dpp vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_i16_e64_dpp vcc_hi, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W32: v_cmp_gt_i16_e64_dpp vcc_hi, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6b,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+v_cmp_gt_i16_e64_dpp vcc_hi, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_gt_i16_e64_dpp vcc_hi, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6b,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_i16_e64_dpp ttmp15, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W32: v_cmp_gt_i16_e64_dpp ttmp15, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7b,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+v_cmp_gt_i16_e64_dpp ttmp15, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W32: v_cmp_gt_i16_e64_dpp ttmp15, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7b,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0]
-// W64: v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_gt_i16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[3,2,1,0]
+// W64: v_cmp_gt_i16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3]
-// W64: v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+v_cmp_gt_i16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[0,1,2,3]
+// W64: v_cmp_gt_i16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 row_mirror
-// W64: v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+v_cmp_gt_i16_e64_dpp s[10:11], v1.l, v2.l row_mirror
+// W64: v_cmp_gt_i16_e64_dpp s[10:11], v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 row_half_mirror
-// W64: v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+v_cmp_gt_i16_e64_dpp s[10:11], v1.l, v2.l row_half_mirror
+// W64: v_cmp_gt_i16_e64_dpp s[10:11], v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 row_shl:1
-// W64: v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+v_cmp_gt_i16_e64_dpp s[10:11], v1.l, v2.l row_shl:1
+// W64: v_cmp_gt_i16_e64_dpp s[10:11], v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 row_shl:15
-// W64: v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+v_cmp_gt_i16_e64_dpp s[10:11], v1.l, v2.l row_shl:15
+// W64: v_cmp_gt_i16_e64_dpp s[10:11], v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 row_shr:1
-// W64: v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+v_cmp_gt_i16_e64_dpp s[10:11], v1.l, v2.l row_shr:1
+// W64: v_cmp_gt_i16_e64_dpp s[10:11], v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 row_shr:15
-// W64: v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+v_cmp_gt_i16_e64_dpp s[10:11], v1.l, v2.l row_shr:15
+// W64: v_cmp_gt_i16_e64_dpp s[10:11], v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 row_ror:1
-// W64: v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+v_cmp_gt_i16_e64_dpp s[10:11], v1.l, v2.l row_ror:1
+// W64: v_cmp_gt_i16_e64_dpp s[10:11], v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 row_ror:15
-// W64: v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+v_cmp_gt_i16_e64_dpp s[10:11], v1.l, v2.l row_ror:15
+// W64: v_cmp_gt_i16_e64_dpp s[10:11], v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_i16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W64: v_cmp_gt_i16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+v_cmp_gt_i16_e64_dpp s[104:105], v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_gt_i16_e64_dpp s[104:105], v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_i16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W64: v_cmp_gt_i16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+v_cmp_gt_i16_e64_dpp vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W64: v_cmp_gt_i16_e64_dpp vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_i16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W64: v_cmp_gt_i16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+v_cmp_gt_i16_e64_dpp ttmp[14:15], v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W64: v_cmp_gt_i16_e64_dpp ttmp[14:15], v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_i16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
-// GFX11: v_cmp_gt_i16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x00,0x34,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
+v_cmp_gt_i16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// GFX11: v_cmp_gt_i16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x00,0x34,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
+
+v_cmp_gt_i16_e64_dpp vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_gt_i16_e64_dpp vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_gt_i16_e64_dpp ttmp15, v1.h, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W32: v_cmp_gt_i16_e64_dpp ttmp15, v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7b,0x08,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_gt_i16_e64_dpp ttmp[14:15], v1.h, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W64: v_cmp_gt_i16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7a,0x08,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+// W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_gt_i16_e64_dpp null, v255.l, v255.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// GFX11: v_cmp_gt_i16_e64_dpp null, v255.l, v255.h op_sel:[0,1] row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x10,0x34,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
 
 v_cmp_gt_i32_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0]
 // W32: v_cmp_gt_i32_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x44,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
@@ -2358,112 +2433,127 @@ v_cmp_gt_i32_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3
 v_cmp_gt_i32_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
 // GFX11: v_cmp_gt_i32_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x00,0x44,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
 
-v_cmp_gt_u16_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0]
-// W32: v_cmp_gt_u16_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_gt_u16_e64_dpp s5, v1.l, v2.l quad_perm:[3,2,1,0]
+// W32: v_cmp_gt_u16_e64_dpp s5, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_u16_e64_dpp s5, v1, v2 quad_perm:[0,1,2,3]
-// W32: v_cmp_gt_u16_e64_dpp s5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+v_cmp_gt_u16_e64_dpp s5, v1.l, v2.l quad_perm:[0,1,2,3]
+// W32: v_cmp_gt_u16_e64_dpp s5, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_u16_e64_dpp s5, v1, v2 row_mirror
-// W32: v_cmp_gt_u16_e64_dpp s5, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+v_cmp_gt_u16_e64_dpp s5, v1.l, v2.l row_mirror
+// W32: v_cmp_gt_u16_e64_dpp s5, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_u16_e64_dpp s5, v1, v2 row_half_mirror
-// W32: v_cmp_gt_u16_e64_dpp s5, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+v_cmp_gt_u16_e64_dpp s5, v1.l, v2.l row_half_mirror
+// W32: v_cmp_gt_u16_e64_dpp s5, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_u16_e64_dpp s5, v1, v2 row_shl:1
-// W32: v_cmp_gt_u16_e64_dpp s5, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+v_cmp_gt_u16_e64_dpp s5, v1.l, v2.l row_shl:1
+// W32: v_cmp_gt_u16_e64_dpp s5, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_u16_e64_dpp s5, v1, v2 row_shl:15
-// W32: v_cmp_gt_u16_e64_dpp s5, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+v_cmp_gt_u16_e64_dpp s5, v1.l, v2.l row_shl:15
+// W32: v_cmp_gt_u16_e64_dpp s5, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_u16_e64_dpp s5, v1, v2 row_shr:1
-// W32: v_cmp_gt_u16_e64_dpp s5, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+v_cmp_gt_u16_e64_dpp s5, v1.l, v2.l row_shr:1
+// W32: v_cmp_gt_u16_e64_dpp s5, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_u16_e64_dpp s5, v1, v2 row_shr:15
-// W32: v_cmp_gt_u16_e64_dpp s5, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+v_cmp_gt_u16_e64_dpp s5, v1.l, v2.l row_shr:15
+// W32: v_cmp_gt_u16_e64_dpp s5, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_u16_e64_dpp s5, v1, v2 row_ror:1
-// W32: v_cmp_gt_u16_e64_dpp s5, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+v_cmp_gt_u16_e64_dpp s5, v1.l, v2.l row_ror:1
+// W32: v_cmp_gt_u16_e64_dpp s5, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_u16_e64_dpp s105, v1, v2 row_ror:15
-// W32: v_cmp_gt_u16_e64_dpp s105, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x69,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+v_cmp_gt_u16_e64_dpp s105, v1.l, v2.l row_ror:15
+// W32: v_cmp_gt_u16_e64_dpp s105, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x69,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_u16_e64_dpp vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W32: v_cmp_gt_u16_e64_dpp vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+v_cmp_gt_u16_e64_dpp vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_gt_u16_e64_dpp vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_u16_e64_dpp vcc_hi, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W32: v_cmp_gt_u16_e64_dpp vcc_hi, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6b,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+v_cmp_gt_u16_e64_dpp vcc_hi, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_gt_u16_e64_dpp vcc_hi, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6b,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_u16_e64_dpp ttmp15, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W32: v_cmp_gt_u16_e64_dpp ttmp15, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7b,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+v_cmp_gt_u16_e64_dpp ttmp15, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W32: v_cmp_gt_u16_e64_dpp ttmp15, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7b,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0]
-// W64: v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_gt_u16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[3,2,1,0]
+// W64: v_cmp_gt_u16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_gt_u16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[0,1,2,3]
+// W64: v_cmp_gt_u16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3]
-// W64: v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+v_cmp_gt_u16_e64_dpp s[10:11], v1.l, v2.l row_mirror
+// W64: v_cmp_gt_u16_e64_dpp s[10:11], v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 row_mirror
-// W64: v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+v_cmp_gt_u16_e64_dpp s[10:11], v1.l, v2.l row_half_mirror
+// W64: v_cmp_gt_u16_e64_dpp s[10:11], v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 row_half_mirror
-// W64: v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+v_cmp_gt_u16_e64_dpp s[10:11], v1.l, v2.l row_shl:1
+// W64: v_cmp_gt_u16_e64_dpp s[10:11], v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 row_shl:1
-// W64: v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+v_cmp_gt_u16_e64_dpp s[10:11], v1.l, v2.l row_shl:15
+// W64: v_cmp_gt_u16_e64_dpp s[10:11], v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 row_shl:15
-// W64: v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+v_cmp_gt_u16_e64_dpp s[10:11], v1.l, v2.l row_shr:1
+// W64: v_cmp_gt_u16_e64_dpp s[10:11], v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 row_shr:1
-// W64: v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+v_cmp_gt_u16_e64_dpp s[10:11], v1.l, v2.l row_shr:15
+// W64: v_cmp_gt_u16_e64_dpp s[10:11], v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 row_shr:15
-// W64: v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+v_cmp_gt_u16_e64_dpp s[10:11], v1.l, v2.l row_ror:1
+// W64: v_cmp_gt_u16_e64_dpp s[10:11], v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 row_ror:1
-// W64: v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+v_cmp_gt_u16_e64_dpp s[10:11], v1.l, v2.l row_ror:15
+// W64: v_cmp_gt_u16_e64_dpp s[10:11], v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 row_ror:15
-// W64: v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+v_cmp_gt_u16_e64_dpp s[104:105], v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_gt_u16_e64_dpp s[104:105], v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_u16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W64: v_cmp_gt_u16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+v_cmp_gt_u16_e64_dpp vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W64: v_cmp_gt_u16_e64_dpp vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_u16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W64: v_cmp_gt_u16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+v_cmp_gt_u16_e64_dpp ttmp[14:15], v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W64: v_cmp_gt_u16_e64_dpp ttmp[14:15], v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_u16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W64: v_cmp_gt_u16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+v_cmp_gt_u16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// GFX11: v_cmp_gt_u16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x00,0x3c,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
+
+v_cmp_gt_u16_e64_dpp vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_gt_u16_e64_dpp vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_gt_u16_e64_dpp ttmp15, v1.h, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W32: v_cmp_gt_u16_e64_dpp ttmp15, v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7b,0x08,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_gt_u16_e64_dpp ttmp[14:15], v1.h, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W64: v_cmp_gt_u16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7a,0x08,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_u16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
-// GFX11: v_cmp_gt_u16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x00,0x3c,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
+v_cmp_gt_u16_e64_dpp null, v255.l, v255.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// GFX11: v_cmp_gt_u16_e64_dpp null, v255.l, v255.h op_sel:[0,1] row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x10,0x3c,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
 
 v_cmp_gt_u32_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0]
 // W32: v_cmp_gt_u32_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x4c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
@@ -2786,112 +2876,127 @@ v_cmp_le_f32_e64_dpp ttmp[14:15], -v1, |v2| row_xmask:0 row_mask:0x1 bank_mask:0
 v_cmp_le_f32_e64_dpp null, -|v255|, -|v255| clamp row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
 // GFX11: v_cmp_le_f32_e64_dpp null, -|v255|, -|v255| clamp row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x83,0x13,0xd4,0xfa,0xfe,0x03,0x60,0xff,0x6f,0x05,0x30]
 
-v_cmp_le_i16_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0]
-// W32: v_cmp_le_i16_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_le_i16_e64_dpp s5, v1.l, v2.l quad_perm:[3,2,1,0]
+// W32: v_cmp_le_i16_e64_dpp s5, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_i16_e64_dpp s5, v1, v2 quad_perm:[0,1,2,3]
-// W32: v_cmp_le_i16_e64_dpp s5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+v_cmp_le_i16_e64_dpp s5, v1.l, v2.l quad_perm:[0,1,2,3]
+// W32: v_cmp_le_i16_e64_dpp s5, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_i16_e64_dpp s5, v1, v2 row_mirror
-// W32: v_cmp_le_i16_e64_dpp s5, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+v_cmp_le_i16_e64_dpp s5, v1.l, v2.l row_mirror
+// W32: v_cmp_le_i16_e64_dpp s5, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_i16_e64_dpp s5, v1, v2 row_half_mirror
-// W32: v_cmp_le_i16_e64_dpp s5, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+v_cmp_le_i16_e64_dpp s5, v1.l, v2.l row_half_mirror
+// W32: v_cmp_le_i16_e64_dpp s5, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_i16_e64_dpp s5, v1, v2 row_shl:1
-// W32: v_cmp_le_i16_e64_dpp s5, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+v_cmp_le_i16_e64_dpp s5, v1.l, v2.l row_shl:1
+// W32: v_cmp_le_i16_e64_dpp s5, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_i16_e64_dpp s5, v1, v2 row_shl:15
-// W32: v_cmp_le_i16_e64_dpp s5, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+v_cmp_le_i16_e64_dpp s5, v1.l, v2.l row_shl:15
+// W32: v_cmp_le_i16_e64_dpp s5, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_i16_e64_dpp s5, v1, v2 row_shr:1
-// W32: v_cmp_le_i16_e64_dpp s5, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+v_cmp_le_i16_e64_dpp s5, v1.l, v2.l row_shr:1
+// W32: v_cmp_le_i16_e64_dpp s5, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_i16_e64_dpp s5, v1, v2 row_shr:15
-// W32: v_cmp_le_i16_e64_dpp s5, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+v_cmp_le_i16_e64_dpp s5, v1.l, v2.l row_shr:15
+// W32: v_cmp_le_i16_e64_dpp s5, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_i16_e64_dpp s5, v1, v2 row_ror:1
-// W32: v_cmp_le_i16_e64_dpp s5, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+v_cmp_le_i16_e64_dpp s5, v1.l, v2.l row_ror:1
+// W32: v_cmp_le_i16_e64_dpp s5, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_i16_e64_dpp s105, v1, v2 row_ror:15
-// W32: v_cmp_le_i16_e64_dpp s105, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x69,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+v_cmp_le_i16_e64_dpp s105, v1.l, v2.l row_ror:15
+// W32: v_cmp_le_i16_e64_dpp s105, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x69,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_i16_e64_dpp vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W32: v_cmp_le_i16_e64_dpp vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+v_cmp_le_i16_e64_dpp vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_le_i16_e64_dpp vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_i16_e64_dpp vcc_hi, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W32: v_cmp_le_i16_e64_dpp vcc_hi, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6b,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+v_cmp_le_i16_e64_dpp vcc_hi, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_le_i16_e64_dpp vcc_hi, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6b,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_i16_e64_dpp ttmp15, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W32: v_cmp_le_i16_e64_dpp ttmp15, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7b,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+v_cmp_le_i16_e64_dpp ttmp15, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W32: v_cmp_le_i16_e64_dpp ttmp15, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7b,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_i16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0]
-// W64: v_cmp_le_i16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_le_i16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[3,2,1,0]
+// W64: v_cmp_le_i16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_i16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3]
-// W64: v_cmp_le_i16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+v_cmp_le_i16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[0,1,2,3]
+// W64: v_cmp_le_i16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_i16_e64_dpp s[10:11], v1, v2 row_mirror
-// W64: v_cmp_le_i16_e64_dpp s[10:11], v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+v_cmp_le_i16_e64_dpp s[10:11], v1.l, v2.l row_mirror
+// W64: v_cmp_le_i16_e64_dpp s[10:11], v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_i16_e64_dpp s[10:11], v1, v2 row_half_mirror
-// W64: v_cmp_le_i16_e64_dpp s[10:11], v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+v_cmp_le_i16_e64_dpp s[10:11], v1.l, v2.l row_half_mirror
+// W64: v_cmp_le_i16_e64_dpp s[10:11], v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_i16_e64_dpp s[10:11], v1, v2 row_shl:1
-// W64: v_cmp_le_i16_e64_dpp s[10:11], v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+v_cmp_le_i16_e64_dpp s[10:11], v1.l, v2.l row_shl:1
+// W64: v_cmp_le_i16_e64_dpp s[10:11], v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_i16_e64_dpp s[10:11], v1, v2 row_shl:15
-// W64: v_cmp_le_i16_e64_dpp s[10:11], v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+v_cmp_le_i16_e64_dpp s[10:11], v1.l, v2.l row_shl:15
+// W64: v_cmp_le_i16_e64_dpp s[10:11], v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_i16_e64_dpp s[10:11], v1, v2 row_shr:1
-// W64: v_cmp_le_i16_e64_dpp s[10:11], v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+v_cmp_le_i16_e64_dpp s[10:11], v1.l, v2.l row_shr:1
+// W64: v_cmp_le_i16_e64_dpp s[10:11], v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_i16_e64_dpp s[10:11], v1, v2 row_shr:15
-// W64: v_cmp_le_i16_e64_dpp s[10:11], v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+v_cmp_le_i16_e64_dpp s[10:11], v1.l, v2.l row_shr:15
+// W64: v_cmp_le_i16_e64_dpp s[10:11], v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_i16_e64_dpp s[10:11], v1, v2 row_ror:1
-// W64: v_cmp_le_i16_e64_dpp s[10:11], v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+v_cmp_le_i16_e64_dpp s[10:11], v1.l, v2.l row_ror:1
+// W64: v_cmp_le_i16_e64_dpp s[10:11], v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_i16_e64_dpp s[10:11], v1, v2 row_ror:15
-// W64: v_cmp_le_i16_e64_dpp s[10:11], v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+v_cmp_le_i16_e64_dpp s[10:11], v1.l, v2.l row_ror:15
+// W64: v_cmp_le_i16_e64_dpp s[10:11], v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_i16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W64: v_cmp_le_i16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+v_cmp_le_i16_e64_dpp s[104:105], v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_le_i16_e64_dpp s[104:105], v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_i16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W64: v_cmp_le_i16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+v_cmp_le_i16_e64_dpp vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W64: v_cmp_le_i16_e64_dpp vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_i16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W64: v_cmp_le_i16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+v_cmp_le_i16_e64_dpp ttmp[14:15], v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W64: v_cmp_le_i16_e64_dpp ttmp[14:15], v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_i16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
-// GFX11: v_cmp_le_i16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x00,0x33,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
+v_cmp_le_i16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// GFX11: v_cmp_le_i16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x00,0x33,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
+
+v_cmp_le_i16_e64_dpp vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_le_i16_e64_dpp vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_le_i16_e64_dpp ttmp15, v1.h, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W32: v_cmp_le_i16_e64_dpp ttmp15, v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7b,0x08,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_le_i16_e64_dpp ttmp[14:15], v1.h, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W64: v_cmp_le_i16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7a,0x08,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+// W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_le_i16_e64_dpp null, v255.l, v255.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// GFX11: v_cmp_le_i16_e64_dpp null, v255.l, v255.h op_sel:[0,1] row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x10,0x33,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
 
 v_cmp_le_i32_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0]
 // W32: v_cmp_le_i32_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x43,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
@@ -3000,112 +3105,127 @@ v_cmp_le_i32_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3
 v_cmp_le_i32_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
 // GFX11: v_cmp_le_i32_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x00,0x43,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
 
-v_cmp_le_u16_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0]
-// W32: v_cmp_le_u16_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_le_u16_e64_dpp s5, v1.l, v2.l quad_perm:[3,2,1,0]
+// W32: v_cmp_le_u16_e64_dpp s5, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_u16_e64_dpp s5, v1, v2 quad_perm:[0,1,2,3]
-// W32: v_cmp_le_u16_e64_dpp s5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+v_cmp_le_u16_e64_dpp s5, v1.l, v2.l quad_perm:[0,1,2,3]
+// W32: v_cmp_le_u16_e64_dpp s5, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_u16_e64_dpp s5, v1, v2 row_mirror
-// W32: v_cmp_le_u16_e64_dpp s5, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+v_cmp_le_u16_e64_dpp s5, v1.l, v2.l row_mirror
+// W32: v_cmp_le_u16_e64_dpp s5, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_u16_e64_dpp s5, v1, v2 row_half_mirror
-// W32: v_cmp_le_u16_e64_dpp s5, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+v_cmp_le_u16_e64_dpp s5, v1.l, v2.l row_half_mirror
+// W32: v_cmp_le_u16_e64_dpp s5, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_u16_e64_dpp s5, v1, v2 row_shl:1
-// W32: v_cmp_le_u16_e64_dpp s5, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+v_cmp_le_u16_e64_dpp s5, v1.l, v2.l row_shl:1
+// W32: v_cmp_le_u16_e64_dpp s5, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_u16_e64_dpp s5, v1, v2 row_shl:15
-// W32: v_cmp_le_u16_e64_dpp s5, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+v_cmp_le_u16_e64_dpp s5, v1.l, v2.l row_shl:15
+// W32: v_cmp_le_u16_e64_dpp s5, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_u16_e64_dpp s5, v1, v2 row_shr:1
-// W32: v_cmp_le_u16_e64_dpp s5, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+v_cmp_le_u16_e64_dpp s5, v1.l, v2.l row_shr:1
+// W32: v_cmp_le_u16_e64_dpp s5, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_u16_e64_dpp s5, v1, v2 row_shr:15
-// W32: v_cmp_le_u16_e64_dpp s5, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+v_cmp_le_u16_e64_dpp s5, v1.l, v2.l row_shr:15
+// W32: v_cmp_le_u16_e64_dpp s5, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_u16_e64_dpp s5, v1, v2 row_ror:1
-// W32: v_cmp_le_u16_e64_dpp s5, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+v_cmp_le_u16_e64_dpp s5, v1.l, v2.l row_ror:1
+// W32: v_cmp_le_u16_e64_dpp s5, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_u16_e64_dpp s105, v1, v2 row_ror:15
-// W32: v_cmp_le_u16_e64_dpp s105, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x69,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+v_cmp_le_u16_e64_dpp s105, v1.l, v2.l row_ror:15
+// W32: v_cmp_le_u16_e64_dpp s105, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x69,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_u16_e64_dpp vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W32: v_cmp_le_u16_e64_dpp vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+v_cmp_le_u16_e64_dpp vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_le_u16_e64_dpp vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_u16_e64_dpp vcc_hi, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W32: v_cmp_le_u16_e64_dpp vcc_hi, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6b,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+v_cmp_le_u16_e64_dpp vcc_hi, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_le_u16_e64_dpp vcc_hi, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6b,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_u16_e64_dpp ttmp15, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W32: v_cmp_le_u16_e64_dpp ttmp15, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7b,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+v_cmp_le_u16_e64_dpp ttmp15, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W32: v_cmp_le_u16_e64_dpp ttmp15, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7b,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_u16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0]
-// W64: v_cmp_le_u16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_le_u16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[3,2,1,0]
+// W64: v_cmp_le_u16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_u16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3]
-// W64: v_cmp_le_u16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+v_cmp_le_u16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[0,1,2,3]
+// W64: v_cmp_le_u16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_u16_e64_dpp s[10:11], v1, v2 row_mirror
-// W64: v_cmp_le_u16_e64_dpp s[10:11], v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+v_cmp_le_u16_e64_dpp s[10:11], v1.l, v2.l row_mirror
+// W64: v_cmp_le_u16_e64_dpp s[10:11], v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_u16_e64_dpp s[10:11], v1, v2 row_half_mirror
-// W64: v_cmp_le_u16_e64_dpp s[10:11], v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+v_cmp_le_u16_e64_dpp s[10:11], v1.l, v2.l row_half_mirror
+// W64: v_cmp_le_u16_e64_dpp s[10:11], v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_u16_e64_dpp s[10:11], v1, v2 row_shl:1
-// W64: v_cmp_le_u16_e64_dpp s[10:11], v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+v_cmp_le_u16_e64_dpp s[10:11], v1.l, v2.l row_shl:1
+// W64: v_cmp_le_u16_e64_dpp s[10:11], v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_u16_e64_dpp s[10:11], v1, v2 row_shl:15
-// W64: v_cmp_le_u16_e64_dpp s[10:11], v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+v_cmp_le_u16_e64_dpp s[10:11], v1.l, v2.l row_shl:15
+// W64: v_cmp_le_u16_e64_dpp s[10:11], v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_u16_e64_dpp s[10:11], v1, v2 row_shr:1
-// W64: v_cmp_le_u16_e64_dpp s[10:11], v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+v_cmp_le_u16_e64_dpp s[10:11], v1.l, v2.l row_shr:1
+// W64: v_cmp_le_u16_e64_dpp s[10:11], v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_u16_e64_dpp s[10:11], v1, v2 row_shr:15
-// W64: v_cmp_le_u16_e64_dpp s[10:11], v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+v_cmp_le_u16_e64_dpp s[10:11], v1.l, v2.l row_shr:15
+// W64: v_cmp_le_u16_e64_dpp s[10:11], v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_u16_e64_dpp s[10:11], v1, v2 row_ror:1
-// W64: v_cmp_le_u16_e64_dpp s[10:11], v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+v_cmp_le_u16_e64_dpp s[10:11], v1.l, v2.l row_ror:1
+// W64: v_cmp_le_u16_e64_dpp s[10:11], v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_u16_e64_dpp s[10:11], v1, v2 row_ror:15
-// W64: v_cmp_le_u16_e64_dpp s[10:11], v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+v_cmp_le_u16_e64_dpp s[10:11], v1.l, v2.l row_ror:15
+// W64: v_cmp_le_u16_e64_dpp s[10:11], v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_u16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W64: v_cmp_le_u16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+v_cmp_le_u16_e64_dpp s[104:105], v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_le_u16_e64_dpp s[104:105], v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_u16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W64: v_cmp_le_u16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+v_cmp_le_u16_e64_dpp vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W64: v_cmp_le_u16_e64_dpp vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_u16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W64: v_cmp_le_u16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+v_cmp_le_u16_e64_dpp ttmp[14:15], v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W64: v_cmp_le_u16_e64_dpp ttmp[14:15], v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_u16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
-// GFX11: v_cmp_le_u16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x00,0x3b,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
+v_cmp_le_u16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// GFX11: v_cmp_le_u16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x00,0x3b,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
+
+v_cmp_le_u16_e64_dpp vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_le_u16_e64_dpp vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_le_u16_e64_dpp ttmp15, v1.h, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W32: v_cmp_le_u16_e64_dpp ttmp15, v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7b,0x08,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_le_u16_e64_dpp ttmp[14:15], v1.h, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W64: v_cmp_le_u16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7a,0x08,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+// W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_le_u16_e64_dpp null, v255.l, v255.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// GFX11: v_cmp_le_u16_e64_dpp null, v255.l, v255.h op_sel:[0,1] row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x10,0x3b,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
 
 v_cmp_le_u32_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0]
 // W32: v_cmp_le_u32_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x4b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
@@ -3657,112 +3777,127 @@ v_cmp_lt_f32_e64_dpp ttmp[14:15], -v1, |v2| row_xmask:0 row_mask:0x1 bank_mask:0
 v_cmp_lt_f32_e64_dpp null, -|v255|, -|v255| clamp row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
 // GFX11: v_cmp_lt_f32_e64_dpp null, -|v255|, -|v255| clamp row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x83,0x11,0xd4,0xfa,0xfe,0x03,0x60,0xff,0x6f,0x05,0x30]
 
-v_cmp_lt_i16_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0]
-// W32: v_cmp_lt_i16_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_lt_i16_e64_dpp s5, v1.l, v2.l quad_perm:[3,2,1,0]
+// W32: v_cmp_lt_i16_e64_dpp s5, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_i16_e64_dpp s5, v1, v2 quad_perm:[0,1,2,3]
-// W32: v_cmp_lt_i16_e64_dpp s5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+v_cmp_lt_i16_e64_dpp s5, v1.l, v2.l quad_perm:[0,1,2,3]
+// W32: v_cmp_lt_i16_e64_dpp s5, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_i16_e64_dpp s5, v1, v2 row_mirror
-// W32: v_cmp_lt_i16_e64_dpp s5, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+v_cmp_lt_i16_e64_dpp s5, v1.l, v2.l row_mirror
+// W32: v_cmp_lt_i16_e64_dpp s5, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_i16_e64_dpp s5, v1, v2 row_half_mirror
-// W32: v_cmp_lt_i16_e64_dpp s5, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+v_cmp_lt_i16_e64_dpp s5, v1.l, v2.l row_half_mirror
+// W32: v_cmp_lt_i16_e64_dpp s5, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_i16_e64_dpp s5, v1, v2 row_shl:1
-// W32: v_cmp_lt_i16_e64_dpp s5, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+v_cmp_lt_i16_e64_dpp s5, v1.l, v2.l row_shl:1
+// W32: v_cmp_lt_i16_e64_dpp s5, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_i16_e64_dpp s5, v1, v2 row_shl:15
-// W32: v_cmp_lt_i16_e64_dpp s5, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+v_cmp_lt_i16_e64_dpp s5, v1.l, v2.l row_shl:15
+// W32: v_cmp_lt_i16_e64_dpp s5, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_i16_e64_dpp s5, v1, v2 row_shr:1
-// W32: v_cmp_lt_i16_e64_dpp s5, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+v_cmp_lt_i16_e64_dpp s5, v1.l, v2.l row_shr:1
+// W32: v_cmp_lt_i16_e64_dpp s5, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_i16_e64_dpp s5, v1, v2 row_shr:15
-// W32: v_cmp_lt_i16_e64_dpp s5, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+v_cmp_lt_i16_e64_dpp s5, v1.l, v2.l row_shr:15
+// W32: v_cmp_lt_i16_e64_dpp s5, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_i16_e64_dpp s5, v1, v2 row_ror:1
-// W32: v_cmp_lt_i16_e64_dpp s5, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+v_cmp_lt_i16_e64_dpp s5, v1.l, v2.l row_ror:1
+// W32: v_cmp_lt_i16_e64_dpp s5, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_i16_e64_dpp s105, v1, v2 row_ror:15
-// W32: v_cmp_lt_i16_e64_dpp s105, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x69,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+v_cmp_lt_i16_e64_dpp s105, v1.l, v2.l row_ror:15
+// W32: v_cmp_lt_i16_e64_dpp s105, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x69,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_i16_e64_dpp vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W32: v_cmp_lt_i16_e64_dpp vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+v_cmp_lt_i16_e64_dpp vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_lt_i16_e64_dpp vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_i16_e64_dpp vcc_hi, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W32: v_cmp_lt_i16_e64_dpp vcc_hi, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6b,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+v_cmp_lt_i16_e64_dpp vcc_hi, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_lt_i16_e64_dpp vcc_hi, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6b,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_i16_e64_dpp ttmp15, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W32: v_cmp_lt_i16_e64_dpp ttmp15, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7b,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+v_cmp_lt_i16_e64_dpp ttmp15, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W32: v_cmp_lt_i16_e64_dpp ttmp15, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7b,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0]
-// W64: v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_lt_i16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[3,2,1,0]
+// W64: v_cmp_lt_i16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_lt_i16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[0,1,2,3]
+// W64: v_cmp_lt_i16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3]
-// W64: v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+v_cmp_lt_i16_e64_dpp s[10:11], v1.l, v2.l row_mirror
+// W64: v_cmp_lt_i16_e64_dpp s[10:11], v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 row_mirror
-// W64: v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+v_cmp_lt_i16_e64_dpp s[10:11], v1.l, v2.l row_half_mirror
+// W64: v_cmp_lt_i16_e64_dpp s[10:11], v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 row_half_mirror
-// W64: v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+v_cmp_lt_i16_e64_dpp s[10:11], v1.l, v2.l row_shl:1
+// W64: v_cmp_lt_i16_e64_dpp s[10:11], v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 row_shl:1
-// W64: v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+v_cmp_lt_i16_e64_dpp s[10:11], v1.l, v2.l row_shl:15
+// W64: v_cmp_lt_i16_e64_dpp s[10:11], v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 row_shl:15
-// W64: v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+v_cmp_lt_i16_e64_dpp s[10:11], v1.l, v2.l row_shr:1
+// W64: v_cmp_lt_i16_e64_dpp s[10:11], v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 row_shr:1
-// W64: v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+v_cmp_lt_i16_e64_dpp s[10:11], v1.l, v2.l row_shr:15
+// W64: v_cmp_lt_i16_e64_dpp s[10:11], v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 row_shr:15
-// W64: v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+v_cmp_lt_i16_e64_dpp s[10:11], v1.l, v2.l row_ror:1
+// W64: v_cmp_lt_i16_e64_dpp s[10:11], v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 row_ror:1
-// W64: v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+v_cmp_lt_i16_e64_dpp s[10:11], v1.l, v2.l row_ror:15
+// W64: v_cmp_lt_i16_e64_dpp s[10:11], v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 row_ror:15
-// W64: v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+v_cmp_lt_i16_e64_dpp s[104:105], v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_lt_i16_e64_dpp s[104:105], v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_i16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W64: v_cmp_lt_i16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+v_cmp_lt_i16_e64_dpp vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W64: v_cmp_lt_i16_e64_dpp vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_i16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W64: v_cmp_lt_i16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+v_cmp_lt_i16_e64_dpp ttmp[14:15], v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W64: v_cmp_lt_i16_e64_dpp ttmp[14:15], v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_i16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W64: v_cmp_lt_i16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+v_cmp_lt_i16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// GFX11: v_cmp_lt_i16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x00,0x31,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
+
+v_cmp_lt_i16_e64_dpp vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_lt_i16_e64_dpp vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_lt_i16_e64_dpp ttmp15, v1.h, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W32: v_cmp_lt_i16_e64_dpp ttmp15, v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7b,0x08,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_lt_i16_e64_dpp ttmp[14:15], v1.h, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W64: v_cmp_lt_i16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7a,0x08,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_i16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
-// GFX11: v_cmp_lt_i16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x00,0x31,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
+v_cmp_lt_i16_e64_dpp null, v255.l, v255.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// GFX11: v_cmp_lt_i16_e64_dpp null, v255.l, v255.h op_sel:[0,1] row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x10,0x31,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
 
 v_cmp_lt_i32_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0]
 // W32: v_cmp_lt_i32_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x41,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
@@ -3871,112 +4006,127 @@ v_cmp_lt_i32_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3
 v_cmp_lt_i32_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
 // GFX11: v_cmp_lt_i32_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x00,0x41,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
 
-v_cmp_lt_u16_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0]
-// W32: v_cmp_lt_u16_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_lt_u16_e64_dpp s5, v1.l, v2.l quad_perm:[3,2,1,0]
+// W32: v_cmp_lt_u16_e64_dpp s5, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_u16_e64_dpp s5, v1, v2 quad_perm:[0,1,2,3]
-// W32: v_cmp_lt_u16_e64_dpp s5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+v_cmp_lt_u16_e64_dpp s5, v1.l, v2.l quad_perm:[0,1,2,3]
+// W32: v_cmp_lt_u16_e64_dpp s5, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_u16_e64_dpp s5, v1, v2 row_mirror
-// W32: v_cmp_lt_u16_e64_dpp s5, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+v_cmp_lt_u16_e64_dpp s5, v1.l, v2.l row_mirror
+// W32: v_cmp_lt_u16_e64_dpp s5, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_u16_e64_dpp s5, v1, v2 row_half_mirror
-// W32: v_cmp_lt_u16_e64_dpp s5, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+v_cmp_lt_u16_e64_dpp s5, v1.l, v2.l row_half_mirror
+// W32: v_cmp_lt_u16_e64_dpp s5, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_u16_e64_dpp s5, v1, v2 row_shl:1
-// W32: v_cmp_lt_u16_e64_dpp s5, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+v_cmp_lt_u16_e64_dpp s5, v1.l, v2.l row_shl:1
+// W32: v_cmp_lt_u16_e64_dpp s5, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_u16_e64_dpp s5, v1, v2 row_shl:15
-// W32: v_cmp_lt_u16_e64_dpp s5, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+v_cmp_lt_u16_e64_dpp s5, v1.l, v2.l row_shl:15
+// W32: v_cmp_lt_u16_e64_dpp s5, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_u16_e64_dpp s5, v1, v2 row_shr:1
-// W32: v_cmp_lt_u16_e64_dpp s5, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+v_cmp_lt_u16_e64_dpp s5, v1.l, v2.l row_shr:1
+// W32: v_cmp_lt_u16_e64_dpp s5, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_u16_e64_dpp s5, v1, v2 row_shr:15
-// W32: v_cmp_lt_u16_e64_dpp s5, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+v_cmp_lt_u16_e64_dpp s5, v1.l, v2.l row_shr:15
+// W32: v_cmp_lt_u16_e64_dpp s5, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_u16_e64_dpp s5, v1, v2 row_ror:1
-// W32: v_cmp_lt_u16_e64_dpp s5, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+v_cmp_lt_u16_e64_dpp s5, v1.l, v2.l row_ror:1
+// W32: v_cmp_lt_u16_e64_dpp s5, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_u16_e64_dpp s105, v1, v2 row_ror:15
-// W32: v_cmp_lt_u16_e64_dpp s105, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x69,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+v_cmp_lt_u16_e64_dpp s105, v1.l, v2.l row_ror:15
+// W32: v_cmp_lt_u16_e64_dpp s105, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x69,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_u16_e64_dpp vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W32: v_cmp_lt_u16_e64_dpp vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+v_cmp_lt_u16_e64_dpp vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_lt_u16_e64_dpp vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_u16_e64_dpp vcc_hi, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W32: v_cmp_lt_u16_e64_dpp vcc_hi, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6b,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+v_cmp_lt_u16_e64_dpp vcc_hi, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_lt_u16_e64_dpp vcc_hi, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6b,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_u16_e64_dpp ttmp15, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W32: v_cmp_lt_u16_e64_dpp ttmp15, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7b,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+v_cmp_lt_u16_e64_dpp ttmp15, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W32: v_cmp_lt_u16_e64_dpp ttmp15, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7b,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0]
-// W64: v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_lt_u16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[3,2,1,0]
+// W64: v_cmp_lt_u16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3]
-// W64: v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+v_cmp_lt_u16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[0,1,2,3]
+// W64: v_cmp_lt_u16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 row_mirror
-// W64: v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+v_cmp_lt_u16_e64_dpp s[10:11], v1.l, v2.l row_mirror
+// W64: v_cmp_lt_u16_e64_dpp s[10:11], v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 row_half_mirror
-// W64: v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+v_cmp_lt_u16_e64_dpp s[10:11], v1.l, v2.l row_half_mirror
+// W64: v_cmp_lt_u16_e64_dpp s[10:11], v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 row_shl:1
-// W64: v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+v_cmp_lt_u16_e64_dpp s[10:11], v1.l, v2.l row_shl:1
+// W64: v_cmp_lt_u16_e64_dpp s[10:11], v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 row_shl:15
-// W64: v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+v_cmp_lt_u16_e64_dpp s[10:11], v1.l, v2.l row_shl:15
+// W64: v_cmp_lt_u16_e64_dpp s[10:11], v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 row_shr:1
-// W64: v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+v_cmp_lt_u16_e64_dpp s[10:11], v1.l, v2.l row_shr:1
+// W64: v_cmp_lt_u16_e64_dpp s[10:11], v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 row_shr:15
-// W64: v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+v_cmp_lt_u16_e64_dpp s[10:11], v1.l, v2.l row_shr:15
+// W64: v_cmp_lt_u16_e64_dpp s[10:11], v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 row_ror:1
-// W64: v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+v_cmp_lt_u16_e64_dpp s[10:11], v1.l, v2.l row_ror:1
+// W64: v_cmp_lt_u16_e64_dpp s[10:11], v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 row_ror:15
-// W64: v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+v_cmp_lt_u16_e64_dpp s[10:11], v1.l, v2.l row_ror:15
+// W64: v_cmp_lt_u16_e64_dpp s[10:11], v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_u16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W64: v_cmp_lt_u16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+v_cmp_lt_u16_e64_dpp s[104:105], v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_lt_u16_e64_dpp s[104:105], v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_u16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W64: v_cmp_lt_u16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+v_cmp_lt_u16_e64_dpp vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W64: v_cmp_lt_u16_e64_dpp vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_u16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W64: v_cmp_lt_u16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+v_cmp_lt_u16_e64_dpp ttmp[14:15], v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W64: v_cmp_lt_u16_e64_dpp ttmp[14:15], v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_u16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
-// GFX11: v_cmp_lt_u16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x00,0x39,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
+v_cmp_lt_u16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// GFX11: v_cmp_lt_u16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x00,0x39,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
+
+v_cmp_lt_u16_e64_dpp vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_lt_u16_e64_dpp vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_lt_u16_e64_dpp ttmp15, v1.h, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W32: v_cmp_lt_u16_e64_dpp ttmp15, v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7b,0x08,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_lt_u16_e64_dpp ttmp[14:15], v1.h, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W64: v_cmp_lt_u16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7a,0x08,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+// W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_lt_u16_e64_dpp null, v255.l, v255.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// GFX11: v_cmp_lt_u16_e64_dpp null, v255.l, v255.h op_sel:[0,1] row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x10,0x39,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
 
 v_cmp_lt_u32_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0]
 // W32: v_cmp_lt_u32_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x49,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
@@ -4085,112 +4235,127 @@ v_cmp_lt_u32_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3
 v_cmp_lt_u32_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
 // GFX11: v_cmp_lt_u32_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x00,0x49,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
 
-v_cmp_ne_i16_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0]
-// W32: v_cmp_ne_i16_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_ne_i16_e64_dpp s5, v1.l, v2.l quad_perm:[3,2,1,0]
+// W32: v_cmp_ne_i16_e64_dpp s5, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_i16_e64_dpp s5, v1, v2 quad_perm:[0,1,2,3]
-// W32: v_cmp_ne_i16_e64_dpp s5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+v_cmp_ne_i16_e64_dpp s5, v1.l, v2.l quad_perm:[0,1,2,3]
+// W32: v_cmp_ne_i16_e64_dpp s5, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_i16_e64_dpp s5, v1, v2 row_mirror
-// W32: v_cmp_ne_i16_e64_dpp s5, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+v_cmp_ne_i16_e64_dpp s5, v1.l, v2.l row_mirror
+// W32: v_cmp_ne_i16_e64_dpp s5, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_i16_e64_dpp s5, v1, v2 row_half_mirror
-// W32: v_cmp_ne_i16_e64_dpp s5, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+v_cmp_ne_i16_e64_dpp s5, v1.l, v2.l row_half_mirror
+// W32: v_cmp_ne_i16_e64_dpp s5, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_i16_e64_dpp s5, v1, v2 row_shl:1
-// W32: v_cmp_ne_i16_e64_dpp s5, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+v_cmp_ne_i16_e64_dpp s5, v1.l, v2.l row_shl:1
+// W32: v_cmp_ne_i16_e64_dpp s5, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_i16_e64_dpp s5, v1, v2 row_shl:15
-// W32: v_cmp_ne_i16_e64_dpp s5, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+v_cmp_ne_i16_e64_dpp s5, v1.l, v2.l row_shl:15
+// W32: v_cmp_ne_i16_e64_dpp s5, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_i16_e64_dpp s5, v1, v2 row_shr:1
-// W32: v_cmp_ne_i16_e64_dpp s5, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+v_cmp_ne_i16_e64_dpp s5, v1.l, v2.l row_shr:1
+// W32: v_cmp_ne_i16_e64_dpp s5, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_i16_e64_dpp s5, v1, v2 row_shr:15
-// W32: v_cmp_ne_i16_e64_dpp s5, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+v_cmp_ne_i16_e64_dpp s5, v1.l, v2.l row_shr:15
+// W32: v_cmp_ne_i16_e64_dpp s5, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_i16_e64_dpp s5, v1, v2 row_ror:1
-// W32: v_cmp_ne_i16_e64_dpp s5, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+v_cmp_ne_i16_e64_dpp s5, v1.l, v2.l row_ror:1
+// W32: v_cmp_ne_i16_e64_dpp s5, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_i16_e64_dpp s105, v1, v2 row_ror:15
-// W32: v_cmp_ne_i16_e64_dpp s105, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x69,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+v_cmp_ne_i16_e64_dpp s105, v1.l, v2.l row_ror:15
+// W32: v_cmp_ne_i16_e64_dpp s105, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x69,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_i16_e64_dpp vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W32: v_cmp_ne_i16_e64_dpp vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+v_cmp_ne_i16_e64_dpp vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ne_i16_e64_dpp vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_i16_e64_dpp vcc_hi, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W32: v_cmp_ne_i16_e64_dpp vcc_hi, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6b,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+v_cmp_ne_i16_e64_dpp vcc_hi, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_ne_i16_e64_dpp vcc_hi, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6b,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_i16_e64_dpp ttmp15, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W32: v_cmp_ne_i16_e64_dpp ttmp15, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7b,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+v_cmp_ne_i16_e64_dpp ttmp15, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W32: v_cmp_ne_i16_e64_dpp ttmp15, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7b,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0]
-// W64: v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_ne_i16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[3,2,1,0]
+// W64: v_cmp_ne_i16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3]
-// W64: v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+v_cmp_ne_i16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[0,1,2,3]
+// W64: v_cmp_ne_i16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 row_mirror
-// W64: v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+v_cmp_ne_i16_e64_dpp s[10:11], v1.l, v2.l row_mirror
+// W64: v_cmp_ne_i16_e64_dpp s[10:11], v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 row_half_mirror
-// W64: v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+v_cmp_ne_i16_e64_dpp s[10:11], v1.l, v2.l row_half_mirror
+// W64: v_cmp_ne_i16_e64_dpp s[10:11], v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 row_shl:1
-// W64: v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+v_cmp_ne_i16_e64_dpp s[10:11], v1.l, v2.l row_shl:1
+// W64: v_cmp_ne_i16_e64_dpp s[10:11], v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 row_shl:15
-// W64: v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+v_cmp_ne_i16_e64_dpp s[10:11], v1.l, v2.l row_shl:15
+// W64: v_cmp_ne_i16_e64_dpp s[10:11], v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 row_shr:1
-// W64: v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+v_cmp_ne_i16_e64_dpp s[10:11], v1.l, v2.l row_shr:1
+// W64: v_cmp_ne_i16_e64_dpp s[10:11], v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 row_shr:15
-// W64: v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+v_cmp_ne_i16_e64_dpp s[10:11], v1.l, v2.l row_shr:15
+// W64: v_cmp_ne_i16_e64_dpp s[10:11], v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 row_ror:1
-// W64: v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+v_cmp_ne_i16_e64_dpp s[10:11], v1.l, v2.l row_ror:1
+// W64: v_cmp_ne_i16_e64_dpp s[10:11], v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 row_ror:15
-// W64: v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+v_cmp_ne_i16_e64_dpp s[10:11], v1.l, v2.l row_ror:15
+// W64: v_cmp_ne_i16_e64_dpp s[10:11], v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_i16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W64: v_cmp_ne_i16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+v_cmp_ne_i16_e64_dpp s[104:105], v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ne_i16_e64_dpp s[104:105], v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_i16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W64: v_cmp_ne_i16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+v_cmp_ne_i16_e64_dpp vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W64: v_cmp_ne_i16_e64_dpp vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_i16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W64: v_cmp_ne_i16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+v_cmp_ne_i16_e64_dpp ttmp[14:15], v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W64: v_cmp_ne_i16_e64_dpp ttmp[14:15], v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_i16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
-// GFX11: v_cmp_ne_i16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x00,0x35,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
+v_cmp_ne_i16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// GFX11: v_cmp_ne_i16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x00,0x35,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
+
+v_cmp_ne_i16_e64_dpp vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_ne_i16_e64_dpp vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_ne_i16_e64_dpp ttmp15, v1.h, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W32: v_cmp_ne_i16_e64_dpp ttmp15, v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7b,0x08,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_ne_i16_e64_dpp ttmp[14:15], v1.h, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W64: v_cmp_ne_i16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7a,0x08,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+// W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_ne_i16_e64_dpp null, v255.l, v255.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// GFX11: v_cmp_ne_i16_e64_dpp null, v255.l, v255.h op_sel:[0,1] row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x10,0x35,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
 
 v_cmp_ne_i32_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0]
 // W32: v_cmp_ne_i32_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x45,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
@@ -4299,112 +4464,127 @@ v_cmp_ne_i32_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3
 v_cmp_ne_i32_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
 // GFX11: v_cmp_ne_i32_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x00,0x45,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
 
-v_cmp_ne_u16_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0]
-// W32: v_cmp_ne_u16_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_ne_u16_e64_dpp s5, v1.l, v2.l quad_perm:[3,2,1,0]
+// W32: v_cmp_ne_u16_e64_dpp s5, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_u16_e64_dpp s5, v1, v2 quad_perm:[0,1,2,3]
-// W32: v_cmp_ne_u16_e64_dpp s5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+v_cmp_ne_u16_e64_dpp s5, v1.l, v2.l quad_perm:[0,1,2,3]
+// W32: v_cmp_ne_u16_e64_dpp s5, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_u16_e64_dpp s5, v1, v2 row_mirror
-// W32: v_cmp_ne_u16_e64_dpp s5, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+v_cmp_ne_u16_e64_dpp s5, v1.l, v2.l row_mirror
+// W32: v_cmp_ne_u16_e64_dpp s5, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_u16_e64_dpp s5, v1, v2 row_half_mirror
-// W32: v_cmp_ne_u16_e64_dpp s5, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+v_cmp_ne_u16_e64_dpp s5, v1.l, v2.l row_half_mirror
+// W32: v_cmp_ne_u16_e64_dpp s5, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_u16_e64_dpp s5, v1, v2 row_shl:1
-// W32: v_cmp_ne_u16_e64_dpp s5, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+v_cmp_ne_u16_e64_dpp s5, v1.l, v2.l row_shl:1
+// W32: v_cmp_ne_u16_e64_dpp s5, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_u16_e64_dpp s5, v1, v2 row_shl:15
-// W32: v_cmp_ne_u16_e64_dpp s5, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+v_cmp_ne_u16_e64_dpp s5, v1.l, v2.l row_shl:15
+// W32: v_cmp_ne_u16_e64_dpp s5, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_u16_e64_dpp s5, v1, v2 row_shr:1
-// W32: v_cmp_ne_u16_e64_dpp s5, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+v_cmp_ne_u16_e64_dpp s5, v1.l, v2.l row_shr:1
+// W32: v_cmp_ne_u16_e64_dpp s5, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_u16_e64_dpp s5, v1, v2 row_shr:15
-// W32: v_cmp_ne_u16_e64_dpp s5, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+v_cmp_ne_u16_e64_dpp s5, v1.l, v2.l row_shr:15
+// W32: v_cmp_ne_u16_e64_dpp s5, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_u16_e64_dpp s5, v1, v2 row_ror:1
-// W32: v_cmp_ne_u16_e64_dpp s5, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+v_cmp_ne_u16_e64_dpp s5, v1.l, v2.l row_ror:1
+// W32: v_cmp_ne_u16_e64_dpp s5, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_u16_e64_dpp s105, v1, v2 row_ror:15
-// W32: v_cmp_ne_u16_e64_dpp s105, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x69,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+v_cmp_ne_u16_e64_dpp s105, v1.l, v2.l row_ror:15
+// W32: v_cmp_ne_u16_e64_dpp s105, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x69,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_u16_e64_dpp vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W32: v_cmp_ne_u16_e64_dpp vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+v_cmp_ne_u16_e64_dpp vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ne_u16_e64_dpp vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_u16_e64_dpp vcc_hi, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W32: v_cmp_ne_u16_e64_dpp vcc_hi, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6b,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+v_cmp_ne_u16_e64_dpp vcc_hi, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_ne_u16_e64_dpp vcc_hi, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6b,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_u16_e64_dpp ttmp15, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W32: v_cmp_ne_u16_e64_dpp ttmp15, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7b,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+v_cmp_ne_u16_e64_dpp ttmp15, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W32: v_cmp_ne_u16_e64_dpp ttmp15, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7b,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0]
-// W64: v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_ne_u16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[3,2,1,0]
+// W64: v_cmp_ne_u16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_ne_u16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[0,1,2,3]
+// W64: v_cmp_ne_u16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3]
-// W64: v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+v_cmp_ne_u16_e64_dpp s[10:11], v1.l, v2.l row_mirror
+// W64: v_cmp_ne_u16_e64_dpp s[10:11], v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 row_mirror
-// W64: v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+v_cmp_ne_u16_e64_dpp s[10:11], v1.l, v2.l row_half_mirror
+// W64: v_cmp_ne_u16_e64_dpp s[10:11], v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 row_half_mirror
-// W64: v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+v_cmp_ne_u16_e64_dpp s[10:11], v1.l, v2.l row_shl:1
+// W64: v_cmp_ne_u16_e64_dpp s[10:11], v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 row_shl:1
-// W64: v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+v_cmp_ne_u16_e64_dpp s[10:11], v1.l, v2.l row_shl:15
+// W64: v_cmp_ne_u16_e64_dpp s[10:11], v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 row_shl:15
-// W64: v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+v_cmp_ne_u16_e64_dpp s[10:11], v1.l, v2.l row_shr:1
+// W64: v_cmp_ne_u16_e64_dpp s[10:11], v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 row_shr:1
-// W64: v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+v_cmp_ne_u16_e64_dpp s[10:11], v1.l, v2.l row_shr:15
+// W64: v_cmp_ne_u16_e64_dpp s[10:11], v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 row_shr:15
-// W64: v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+v_cmp_ne_u16_e64_dpp s[10:11], v1.l, v2.l row_ror:1
+// W64: v_cmp_ne_u16_e64_dpp s[10:11], v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 row_ror:1
-// W64: v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+v_cmp_ne_u16_e64_dpp s[10:11], v1.l, v2.l row_ror:15
+// W64: v_cmp_ne_u16_e64_dpp s[10:11], v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 row_ror:15
-// W64: v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+v_cmp_ne_u16_e64_dpp s[104:105], v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ne_u16_e64_dpp s[104:105], v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_u16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W64: v_cmp_ne_u16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+v_cmp_ne_u16_e64_dpp vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W64: v_cmp_ne_u16_e64_dpp vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_u16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W64: v_cmp_ne_u16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+v_cmp_ne_u16_e64_dpp ttmp[14:15], v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W64: v_cmp_ne_u16_e64_dpp ttmp[14:15], v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_u16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W64: v_cmp_ne_u16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+v_cmp_ne_u16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// GFX11: v_cmp_ne_u16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x00,0x3d,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
+
+v_cmp_ne_u16_e64_dpp vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_ne_u16_e64_dpp vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_ne_u16_e64_dpp ttmp15, v1.h, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W32: v_cmp_ne_u16_e64_dpp ttmp15, v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7b,0x08,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_ne_u16_e64_dpp ttmp[14:15], v1.h, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W64: v_cmp_ne_u16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7a,0x08,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_u16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
-// GFX11: v_cmp_ne_u16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x00,0x3d,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
+v_cmp_ne_u16_e64_dpp null, v255.l, v255.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// GFX11: v_cmp_ne_u16_e64_dpp null, v255.l, v255.h op_sel:[0,1] row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x10,0x3d,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
 
 v_cmp_ne_u32_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0]
 // W32: v_cmp_ne_u32_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x4d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vopc.s b/llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vopc.s
index 0aa37303d62487..8b512123b354a1 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vopc.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vopc.s
@@ -160,44 +160,55 @@ v_cmp_eq_f32_e64_dpp ttmp[14:15], -v1, |v2| dpp8:[7,6,5,4,3,2,1,0] fi:1
 v_cmp_eq_f32_e64_dpp null, -|v255|, -|v255| clamp dpp8:[0,0,0,0,0,0,0,0] fi:0
 // GFX11: v_cmp_eq_f32_e64_dpp null, -|v255|, -|v255| clamp dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x83,0x12,0xd4,0xe9,0xfe,0x03,0x60,0xff,0x00,0x00,0x00]
 
-v_cmp_eq_i16_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_eq_i16_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_eq_i16_e64_dpp s5, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_eq_i16_e64_dpp s5, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_i16_e64_dpp s105, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_eq_i16_e64_dpp s105, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x69,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_eq_i16_e64_dpp s105, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_eq_i16_e64_dpp s105, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x69,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_i16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_eq_i16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_eq_i16_e64_dpp vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_eq_i16_e64_dpp vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_i16_e64_dpp vcc_hi, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_eq_i16_e64_dpp vcc_hi, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6b,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_eq_i16_e64_dpp vcc_hi, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_eq_i16_e64_dpp vcc_hi, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6b,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_i16_e64_dpp ttmp15, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W32: v_cmp_eq_i16_e64_dpp ttmp15, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7b,0x00,0x32,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_eq_i16_e64_dpp ttmp15, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_eq_i16_e64_dpp ttmp15, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7b,0x00,0x32,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_eq_i16_e64_dpp s[10:11], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_eq_i16_e64_dpp s[10:11], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_i16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_eq_i16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_eq_i16_e64_dpp s[104:105], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_eq_i16_e64_dpp s[104:105], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_i16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_eq_i16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_eq_i16_e64_dpp vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_eq_i16_e64_dpp vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_i16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W64: v_cmp_eq_i16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7a,0x00,0x32,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_eq_i16_e64_dpp ttmp[14:15], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W64: v_cmp_eq_i16_e64_dpp ttmp[14:15], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7a,0x00,0x32,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_i16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:0
-// GFX11: v_cmp_eq_i16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x00,0x32,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+v_cmp_eq_i16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] fi:0
+// GFX11: v_cmp_eq_i16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x00,0x32,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+
+v_cmp_eq_i16_e64_dpp ttmp15, v1.h, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_eq_i16_e64_dpp ttmp15, v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7b,0x08,0x32,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_eq_i16_e64_dpp ttmp[14:15], v1.h, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W64: v_cmp_eq_i16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7a,0x08,0x32,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_eq_i16_e64_dpp null, v255.l, v255.h dpp8:[0,0,0,0,0,0,0,0] fi:0
+// GFX11: v_cmp_eq_i16_e64_dpp null, v255.l, v255.h op_sel:[0,1] dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x10,0x32,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
 
 v_cmp_eq_i32_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
 // W32: v_cmp_eq_i32_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x42,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
@@ -238,44 +249,55 @@ v_cmp_eq_i32_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
 v_cmp_eq_i32_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:0
 // GFX11: v_cmp_eq_i32_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x00,0x42,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
 
-v_cmp_eq_u16_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_eq_u16_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_eq_u16_e64_dpp s5, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_eq_u16_e64_dpp s5, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_u16_e64_dpp s105, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_eq_u16_e64_dpp s105, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x69,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_eq_u16_e64_dpp s105, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_eq_u16_e64_dpp s105, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x69,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_u16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_eq_u16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_eq_u16_e64_dpp vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_eq_u16_e64_dpp vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_u16_e64_dpp vcc_hi, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_eq_u16_e64_dpp vcc_hi, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6b,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_eq_u16_e64_dpp vcc_hi, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_eq_u16_e64_dpp vcc_hi, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6b,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_u16_e64_dpp ttmp15, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W32: v_cmp_eq_u16_e64_dpp ttmp15, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7b,0x00,0x3a,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_eq_u16_e64_dpp ttmp15, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_eq_u16_e64_dpp ttmp15, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7b,0x00,0x3a,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_eq_u16_e64_dpp s[10:11], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_eq_u16_e64_dpp s[10:11], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_u16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_eq_u16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_eq_u16_e64_dpp s[104:105], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_eq_u16_e64_dpp s[104:105], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_u16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_eq_u16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_eq_u16_e64_dpp vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_eq_u16_e64_dpp vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_u16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W64: v_cmp_eq_u16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7a,0x00,0x3a,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_eq_u16_e64_dpp ttmp[14:15], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W64: v_cmp_eq_u16_e64_dpp ttmp[14:15], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7a,0x00,0x3a,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_u16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:0
-// GFX11: v_cmp_eq_u16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x00,0x3a,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+v_cmp_eq_u16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] fi:0
+// GFX11: v_cmp_eq_u16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x00,0x3a,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+
+v_cmp_eq_u16_e64_dpp ttmp15, v1.h, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_eq_u16_e64_dpp ttmp15, v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7b,0x08,0x3a,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_eq_u16_e64_dpp ttmp[14:15], v1.h, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W64: v_cmp_eq_u16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7a,0x08,0x3a,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_eq_u16_e64_dpp null, v255.l, v255.h dpp8:[0,0,0,0,0,0,0,0] fi:0
+// GFX11: v_cmp_eq_u16_e64_dpp null, v255.l, v255.h op_sel:[0,1] dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x10,0x3a,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
 
 v_cmp_eq_u32_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
 // W32: v_cmp_eq_u32_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x4a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
@@ -550,44 +572,55 @@ v_cmp_ge_f32_e64_dpp ttmp[14:15], -v1, |v2| dpp8:[7,6,5,4,3,2,1,0] fi:1
 v_cmp_ge_f32_e64_dpp null, -|v255|, -|v255| clamp dpp8:[0,0,0,0,0,0,0,0] fi:0
 // GFX11: v_cmp_ge_f32_e64_dpp null, -|v255|, -|v255| clamp dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x83,0x16,0xd4,0xe9,0xfe,0x03,0x60,0xff,0x00,0x00,0x00]
 
-v_cmp_ge_i16_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_ge_i16_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ge_i16_e64_dpp s5, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_ge_i16_e64_dpp s5, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_i16_e64_dpp s105, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_ge_i16_e64_dpp s105, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x69,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ge_i16_e64_dpp s105, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_ge_i16_e64_dpp s105, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x69,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_i16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_ge_i16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ge_i16_e64_dpp vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_ge_i16_e64_dpp vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_i16_e64_dpp vcc_hi, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_ge_i16_e64_dpp vcc_hi, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6b,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ge_i16_e64_dpp vcc_hi, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_ge_i16_e64_dpp vcc_hi, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6b,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_i16_e64_dpp ttmp15, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W32: v_cmp_ge_i16_e64_dpp ttmp15, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7b,0x00,0x36,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ge_i16_e64_dpp ttmp15, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_ge_i16_e64_dpp ttmp15, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7b,0x00,0x36,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ge_i16_e64_dpp s[10:11], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_ge_i16_e64_dpp s[10:11], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_ge_i16_e64_dpp s[104:105], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_ge_i16_e64_dpp s[104:105], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_i16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_ge_i16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ge_i16_e64_dpp vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_ge_i16_e64_dpp vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_i16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_ge_i16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ge_i16_e64_dpp ttmp[14:15], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W64: v_cmp_ge_i16_e64_dpp ttmp[14:15], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7a,0x00,0x36,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_i16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W64: v_cmp_ge_i16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7a,0x00,0x36,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ge_i16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] fi:0
+// GFX11: v_cmp_ge_i16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x00,0x36,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+
+v_cmp_ge_i16_e64_dpp ttmp15, v1.h, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_ge_i16_e64_dpp ttmp15, v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7b,0x08,0x36,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_ge_i16_e64_dpp ttmp[14:15], v1.h, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W64: v_cmp_ge_i16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7a,0x08,0x36,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_i16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:0
-// GFX11: v_cmp_ge_i16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x00,0x36,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+v_cmp_ge_i16_e64_dpp null, v255.l, v255.h dpp8:[0,0,0,0,0,0,0,0] fi:0
+// GFX11: v_cmp_ge_i16_e64_dpp null, v255.l, v255.h op_sel:[0,1] dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x10,0x36,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
 
 v_cmp_ge_i32_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
 // W32: v_cmp_ge_i32_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x46,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
@@ -628,44 +661,55 @@ v_cmp_ge_i32_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
 v_cmp_ge_i32_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:0
 // GFX11: v_cmp_ge_i32_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x00,0x46,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
 
-v_cmp_ge_u16_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_ge_u16_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ge_u16_e64_dpp s5, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_ge_u16_e64_dpp s5, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_u16_e64_dpp s105, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_ge_u16_e64_dpp s105, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x69,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ge_u16_e64_dpp s105, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_ge_u16_e64_dpp s105, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x69,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_u16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_ge_u16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ge_u16_e64_dpp vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_ge_u16_e64_dpp vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_u16_e64_dpp vcc_hi, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_ge_u16_e64_dpp vcc_hi, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6b,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ge_u16_e64_dpp vcc_hi, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_ge_u16_e64_dpp vcc_hi, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6b,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_u16_e64_dpp ttmp15, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W32: v_cmp_ge_u16_e64_dpp ttmp15, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7b,0x00,0x3e,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ge_u16_e64_dpp ttmp15, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_ge_u16_e64_dpp ttmp15, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7b,0x00,0x3e,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ge_u16_e64_dpp s[10:11], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_ge_u16_e64_dpp s[10:11], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_u16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_ge_u16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ge_u16_e64_dpp s[104:105], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_ge_u16_e64_dpp s[104:105], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_u16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_ge_u16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ge_u16_e64_dpp vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_ge_u16_e64_dpp vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_u16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W64: v_cmp_ge_u16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7a,0x00,0x3e,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ge_u16_e64_dpp ttmp[14:15], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W64: v_cmp_ge_u16_e64_dpp ttmp[14:15], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7a,0x00,0x3e,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_u16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:0
-// GFX11: v_cmp_ge_u16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x00,0x3e,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+v_cmp_ge_u16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] fi:0
+// GFX11: v_cmp_ge_u16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x00,0x3e,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+
+v_cmp_ge_u16_e64_dpp ttmp15, v1.h, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_ge_u16_e64_dpp ttmp15, v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7b,0x08,0x3e,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_ge_u16_e64_dpp ttmp[14:15], v1.h, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W64: v_cmp_ge_u16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7a,0x08,0x3e,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_ge_u16_e64_dpp null, v255.l, v255.h dpp8:[0,0,0,0,0,0,0,0] fi:0
+// GFX11: v_cmp_ge_u16_e64_dpp null, v255.l, v255.h op_sel:[0,1] dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x10,0x3e,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
 
 v_cmp_ge_u32_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
 // W32: v_cmp_ge_u32_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x4e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
@@ -784,44 +828,55 @@ v_cmp_gt_f32_e64_dpp ttmp[14:15], -v1, |v2| dpp8:[7,6,5,4,3,2,1,0] fi:1
 v_cmp_gt_f32_e64_dpp null, -|v255|, -|v255| clamp dpp8:[0,0,0,0,0,0,0,0] fi:0
 // GFX11: v_cmp_gt_f32_e64_dpp null, -|v255|, -|v255| clamp dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x83,0x14,0xd4,0xe9,0xfe,0x03,0x60,0xff,0x00,0x00,0x00]
 
-v_cmp_gt_i16_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_gt_i16_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_gt_i16_e64_dpp s5, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_gt_i16_e64_dpp s5, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_i16_e64_dpp s105, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_gt_i16_e64_dpp s105, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x69,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_gt_i16_e64_dpp s105, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_gt_i16_e64_dpp s105, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x69,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_i16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_gt_i16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_gt_i16_e64_dpp vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_gt_i16_e64_dpp vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_i16_e64_dpp vcc_hi, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_gt_i16_e64_dpp vcc_hi, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6b,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_gt_i16_e64_dpp vcc_hi, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_gt_i16_e64_dpp vcc_hi, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6b,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_i16_e64_dpp ttmp15, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W32: v_cmp_gt_i16_e64_dpp ttmp15, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7b,0x00,0x34,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_gt_i16_e64_dpp ttmp15, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_gt_i16_e64_dpp ttmp15, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7b,0x00,0x34,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_gt_i16_e64_dpp s[10:11], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_gt_i16_e64_dpp s[10:11], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_i16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_gt_i16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_gt_i16_e64_dpp s[104:105], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_gt_i16_e64_dpp s[104:105], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_i16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_gt_i16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_gt_i16_e64_dpp vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_gt_i16_e64_dpp vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_i16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W64: v_cmp_gt_i16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7a,0x00,0x34,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_gt_i16_e64_dpp ttmp[14:15], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W64: v_cmp_gt_i16_e64_dpp ttmp[14:15], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7a,0x00,0x34,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_i16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:0
-// GFX11: v_cmp_gt_i16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x00,0x34,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+v_cmp_gt_i16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] fi:0
+// GFX11: v_cmp_gt_i16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x00,0x34,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+
+v_cmp_gt_i16_e64_dpp ttmp15, v1.h, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_gt_i16_e64_dpp ttmp15, v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7b,0x08,0x34,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_gt_i16_e64_dpp ttmp[14:15], v1.h, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W64: v_cmp_gt_i16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7a,0x08,0x34,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_gt_i16_e64_dpp null, v255.l, v255.h dpp8:[0,0,0,0,0,0,0,0] fi:0
+// GFX11: v_cmp_gt_i16_e64_dpp null, v255.l, v255.h op_sel:[0,1] dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x10,0x34,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
 
 v_cmp_gt_i32_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
 // W32: v_cmp_gt_i32_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x44,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
@@ -862,44 +917,55 @@ v_cmp_gt_i32_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
 v_cmp_gt_i32_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:0
 // GFX11: v_cmp_gt_i32_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x00,0x44,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
 
-v_cmp_gt_u16_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_gt_u16_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_gt_u16_e64_dpp s5, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_gt_u16_e64_dpp s5, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_u16_e64_dpp s105, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_gt_u16_e64_dpp s105, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x69,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_gt_u16_e64_dpp s105, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_gt_u16_e64_dpp s105, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x69,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_u16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_gt_u16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_gt_u16_e64_dpp vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_gt_u16_e64_dpp vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_u16_e64_dpp vcc_hi, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_gt_u16_e64_dpp vcc_hi, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6b,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_gt_u16_e64_dpp vcc_hi, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_gt_u16_e64_dpp vcc_hi, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6b,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_u16_e64_dpp ttmp15, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W32: v_cmp_gt_u16_e64_dpp ttmp15, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7b,0x00,0x3c,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_gt_u16_e64_dpp ttmp15, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_gt_u16_e64_dpp ttmp15, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7b,0x00,0x3c,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_gt_u16_e64_dpp s[10:11], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_gt_u16_e64_dpp s[10:11], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_gt_u16_e64_dpp s[104:105], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_gt_u16_e64_dpp s[104:105], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_u16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_gt_u16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_gt_u16_e64_dpp vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_gt_u16_e64_dpp vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_u16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_gt_u16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_gt_u16_e64_dpp ttmp[14:15], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W64: v_cmp_gt_u16_e64_dpp ttmp[14:15], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7a,0x00,0x3c,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_u16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W64: v_cmp_gt_u16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7a,0x00,0x3c,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_gt_u16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] fi:0
+// GFX11: v_cmp_gt_u16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x00,0x3c,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+
+v_cmp_gt_u16_e64_dpp ttmp15, v1.h, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_gt_u16_e64_dpp ttmp15, v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7b,0x08,0x3c,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_gt_u16_e64_dpp ttmp[14:15], v1.h, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W64: v_cmp_gt_u16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7a,0x08,0x3c,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_u16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:0
-// GFX11: v_cmp_gt_u16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x00,0x3c,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+v_cmp_gt_u16_e64_dpp null, v255.l, v255.h dpp8:[0,0,0,0,0,0,0,0] fi:0
+// GFX11: v_cmp_gt_u16_e64_dpp null, v255.l, v255.h op_sel:[0,1] dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x10,0x3c,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
 
 v_cmp_gt_u32_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
 // W32: v_cmp_gt_u32_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x4c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
@@ -1018,44 +1084,55 @@ v_cmp_le_f32_e64_dpp ttmp[14:15], -v1, |v2| dpp8:[7,6,5,4,3,2,1,0] fi:1
 v_cmp_le_f32_e64_dpp null, -|v255|, -|v255| clamp dpp8:[0,0,0,0,0,0,0,0] fi:0
 // GFX11: v_cmp_le_f32_e64_dpp null, -|v255|, -|v255| clamp dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x83,0x13,0xd4,0xe9,0xfe,0x03,0x60,0xff,0x00,0x00,0x00]
 
-v_cmp_le_i16_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_le_i16_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_le_i16_e64_dpp s5, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_le_i16_e64_dpp s5, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_i16_e64_dpp s105, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_le_i16_e64_dpp s105, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x69,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_le_i16_e64_dpp s105, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_le_i16_e64_dpp s105, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x69,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_i16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_le_i16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_le_i16_e64_dpp vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_le_i16_e64_dpp vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_i16_e64_dpp vcc_hi, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_le_i16_e64_dpp vcc_hi, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6b,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_le_i16_e64_dpp vcc_hi, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_le_i16_e64_dpp vcc_hi, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6b,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_i16_e64_dpp ttmp15, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W32: v_cmp_le_i16_e64_dpp ttmp15, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7b,0x00,0x33,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_le_i16_e64_dpp ttmp15, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_le_i16_e64_dpp ttmp15, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7b,0x00,0x33,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_i16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_le_i16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_le_i16_e64_dpp s[10:11], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_le_i16_e64_dpp s[10:11], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_i16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_le_i16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_le_i16_e64_dpp s[104:105], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_le_i16_e64_dpp s[104:105], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_i16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_le_i16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_le_i16_e64_dpp vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_le_i16_e64_dpp vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_i16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W64: v_cmp_le_i16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7a,0x00,0x33,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_le_i16_e64_dpp ttmp[14:15], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W64: v_cmp_le_i16_e64_dpp ttmp[14:15], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7a,0x00,0x33,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_i16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:0
-// GFX11: v_cmp_le_i16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x00,0x33,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+v_cmp_le_i16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] fi:0
+// GFX11: v_cmp_le_i16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x00,0x33,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+
+v_cmp_le_i16_e64_dpp ttmp15, v1.h, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_le_i16_e64_dpp ttmp15, v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7b,0x08,0x33,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_le_i16_e64_dpp ttmp[14:15], v1.h, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W64: v_cmp_le_i16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7a,0x08,0x33,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_le_i16_e64_dpp null, v255.l, v255.h dpp8:[0,0,0,0,0,0,0,0] fi:0
+// GFX11: v_cmp_le_i16_e64_dpp null, v255.l, v255.h op_sel:[0,1] dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x10,0x33,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
 
 v_cmp_le_i32_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
 // W32: v_cmp_le_i32_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x43,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
@@ -1096,44 +1173,55 @@ v_cmp_le_i32_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
 v_cmp_le_i32_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:0
 // GFX11: v_cmp_le_i32_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x00,0x43,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
 
-v_cmp_le_u16_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_le_u16_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_le_u16_e64_dpp s5, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_le_u16_e64_dpp s5, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_u16_e64_dpp s105, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_le_u16_e64_dpp s105, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x69,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_le_u16_e64_dpp s105, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_le_u16_e64_dpp s105, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x69,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_u16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_le_u16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_le_u16_e64_dpp vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_le_u16_e64_dpp vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_u16_e64_dpp vcc_hi, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_le_u16_e64_dpp vcc_hi, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6b,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_le_u16_e64_dpp vcc_hi, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_le_u16_e64_dpp vcc_hi, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6b,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_u16_e64_dpp ttmp15, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W32: v_cmp_le_u16_e64_dpp ttmp15, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7b,0x00,0x3b,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_le_u16_e64_dpp ttmp15, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_le_u16_e64_dpp ttmp15, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7b,0x00,0x3b,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_u16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_le_u16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_le_u16_e64_dpp s[10:11], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_le_u16_e64_dpp s[10:11], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_u16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_le_u16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_le_u16_e64_dpp s[104:105], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_le_u16_e64_dpp s[104:105], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_u16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_le_u16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_le_u16_e64_dpp vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_le_u16_e64_dpp vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_u16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W64: v_cmp_le_u16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7a,0x00,0x3b,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_le_u16_e64_dpp ttmp[14:15], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W64: v_cmp_le_u16_e64_dpp ttmp[14:15], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7a,0x00,0x3b,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_u16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:0
-// GFX11: v_cmp_le_u16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x00,0x3b,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+v_cmp_le_u16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] fi:0
+// GFX11: v_cmp_le_u16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x00,0x3b,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+
+v_cmp_le_u16_e64_dpp ttmp15, v1.h, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_le_u16_e64_dpp ttmp15, v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7b,0x08,0x3b,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_le_u16_e64_dpp ttmp[14:15], v1.h, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W64: v_cmp_le_u16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7a,0x08,0x3b,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_le_u16_e64_dpp null, v255.l, v255.h dpp8:[0,0,0,0,0,0,0,0] fi:0
+// GFX11: v_cmp_le_u16_e64_dpp null, v255.l, v255.h op_sel:[0,1] dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x10,0x3b,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
 
 v_cmp_le_u32_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
 // W32: v_cmp_le_u32_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x4b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
@@ -1345,44 +1433,55 @@ v_cmp_lt_f32_e64_dpp ttmp[14:15], -v1, |v2| dpp8:[7,6,5,4,3,2,1,0] fi:1
 v_cmp_lt_f32_e64_dpp null, -|v255|, -|v255| clamp dpp8:[0,0,0,0,0,0,0,0] fi:0
 // GFX11: v_cmp_lt_f32_e64_dpp null, -|v255|, -|v255| clamp dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x83,0x11,0xd4,0xe9,0xfe,0x03,0x60,0xff,0x00,0x00,0x00]
 
-v_cmp_lt_i16_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_lt_i16_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_lt_i16_e64_dpp s5, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_lt_i16_e64_dpp s5, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_i16_e64_dpp s105, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_lt_i16_e64_dpp s105, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x69,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_lt_i16_e64_dpp s105, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_lt_i16_e64_dpp s105, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x69,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_i16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_lt_i16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_lt_i16_e64_dpp vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_lt_i16_e64_dpp vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_i16_e64_dpp vcc_hi, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_lt_i16_e64_dpp vcc_hi, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6b,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_lt_i16_e64_dpp vcc_hi, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_lt_i16_e64_dpp vcc_hi, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6b,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_i16_e64_dpp ttmp15, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W32: v_cmp_lt_i16_e64_dpp ttmp15, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7b,0x00,0x31,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_lt_i16_e64_dpp ttmp15, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_lt_i16_e64_dpp ttmp15, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7b,0x00,0x31,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_lt_i16_e64_dpp s[10:11], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_lt_i16_e64_dpp s[10:11], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_lt_i16_e64_dpp s[104:105], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_lt_i16_e64_dpp s[104:105], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_i16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_lt_i16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_lt_i16_e64_dpp vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_lt_i16_e64_dpp vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_i16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_lt_i16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_lt_i16_e64_dpp ttmp[14:15], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W64: v_cmp_lt_i16_e64_dpp ttmp[14:15], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7a,0x00,0x31,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_i16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W64: v_cmp_lt_i16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7a,0x00,0x31,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_lt_i16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] fi:0
+// GFX11: v_cmp_lt_i16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x00,0x31,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+
+v_cmp_lt_i16_e64_dpp ttmp15, v1.h, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_lt_i16_e64_dpp ttmp15, v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7b,0x08,0x31,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_lt_i16_e64_dpp ttmp[14:15], v1.h, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W64: v_cmp_lt_i16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7a,0x08,0x31,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_i16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:0
-// GFX11: v_cmp_lt_i16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x00,0x31,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+v_cmp_lt_i16_e64_dpp null, v255.l, v255.h dpp8:[0,0,0,0,0,0,0,0] fi:0
+// GFX11: v_cmp_lt_i16_e64_dpp null, v255.l, v255.h op_sel:[0,1] dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x10,0x31,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
 
 v_cmp_lt_i32_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
 // W32: v_cmp_lt_i32_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x41,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
@@ -1423,44 +1522,55 @@ v_cmp_lt_i32_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
 v_cmp_lt_i32_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:0
 // GFX11: v_cmp_lt_i32_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x00,0x41,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
 
-v_cmp_lt_u16_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_lt_u16_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_lt_u16_e64_dpp s5, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_lt_u16_e64_dpp s5, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_u16_e64_dpp s105, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_lt_u16_e64_dpp s105, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x69,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_lt_u16_e64_dpp s105, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_lt_u16_e64_dpp s105, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x69,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_u16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_lt_u16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_lt_u16_e64_dpp vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_lt_u16_e64_dpp vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_u16_e64_dpp vcc_hi, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_lt_u16_e64_dpp vcc_hi, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6b,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_lt_u16_e64_dpp vcc_hi, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_lt_u16_e64_dpp vcc_hi, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6b,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_u16_e64_dpp ttmp15, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W32: v_cmp_lt_u16_e64_dpp ttmp15, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7b,0x00,0x39,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_lt_u16_e64_dpp ttmp15, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_lt_u16_e64_dpp ttmp15, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7b,0x00,0x39,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_lt_u16_e64_dpp s[10:11], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_lt_u16_e64_dpp s[10:11], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_u16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_lt_u16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_lt_u16_e64_dpp s[104:105], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_lt_u16_e64_dpp s[104:105], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_u16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_lt_u16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_lt_u16_e64_dpp vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_lt_u16_e64_dpp vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_u16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W64: v_cmp_lt_u16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7a,0x00,0x39,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_lt_u16_e64_dpp ttmp[14:15], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W64: v_cmp_lt_u16_e64_dpp ttmp[14:15], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7a,0x00,0x39,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_u16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:0
-// GFX11: v_cmp_lt_u16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x00,0x39,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+v_cmp_lt_u16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] fi:0
+// GFX11: v_cmp_lt_u16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x00,0x39,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+
+v_cmp_lt_u16_e64_dpp ttmp15, v1.h, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_lt_u16_e64_dpp ttmp15, v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7b,0x08,0x39,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_lt_u16_e64_dpp ttmp[14:15], v1.h, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W64: v_cmp_lt_u16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7a,0x08,0x39,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_lt_u16_e64_dpp null, v255.l, v255.h dpp8:[0,0,0,0,0,0,0,0] fi:0
+// GFX11: v_cmp_lt_u16_e64_dpp null, v255.l, v255.h op_sel:[0,1] dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x10,0x39,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
 
 v_cmp_lt_u32_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
 // W32: v_cmp_lt_u32_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x49,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
@@ -1501,44 +1611,55 @@ v_cmp_lt_u32_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
 v_cmp_lt_u32_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:0
 // GFX11: v_cmp_lt_u32_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x00,0x49,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
 
-v_cmp_ne_i16_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_ne_i16_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ne_i16_e64_dpp s5, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_ne_i16_e64_dpp s5, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_i16_e64_dpp s105, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_ne_i16_e64_dpp s105, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x69,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ne_i16_e64_dpp s105, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_ne_i16_e64_dpp s105, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x69,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_i16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_ne_i16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ne_i16_e64_dpp vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_ne_i16_e64_dpp vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_i16_e64_dpp vcc_hi, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_ne_i16_e64_dpp vcc_hi, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6b,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ne_i16_e64_dpp vcc_hi, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_ne_i16_e64_dpp vcc_hi, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6b,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_i16_e64_dpp ttmp15, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W32: v_cmp_ne_i16_e64_dpp ttmp15, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7b,0x00,0x35,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ne_i16_e64_dpp ttmp15, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_ne_i16_e64_dpp ttmp15, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7b,0x00,0x35,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ne_i16_e64_dpp s[10:11], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_ne_i16_e64_dpp s[10:11], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_i16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_ne_i16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ne_i16_e64_dpp s[104:105], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_ne_i16_e64_dpp s[104:105], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_i16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_ne_i16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ne_i16_e64_dpp vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_ne_i16_e64_dpp vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_i16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W64: v_cmp_ne_i16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7a,0x00,0x35,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ne_i16_e64_dpp ttmp[14:15], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W64: v_cmp_ne_i16_e64_dpp ttmp[14:15], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7a,0x00,0x35,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_i16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:0
-// GFX11: v_cmp_ne_i16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x00,0x35,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+v_cmp_ne_i16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] fi:0
+// GFX11: v_cmp_ne_i16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x00,0x35,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+
+v_cmp_ne_i16_e64_dpp ttmp15, v1.h, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_ne_i16_e64_dpp ttmp15, v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7b,0x08,0x35,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_ne_i16_e64_dpp ttmp[14:15], v1.h, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W64: v_cmp_ne_i16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7a,0x08,0x35,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_ne_i16_e64_dpp null, v255.l, v255.h dpp8:[0,0,0,0,0,0,0,0] fi:0
+// GFX11: v_cmp_ne_i16_e64_dpp null, v255.l, v255.h op_sel:[0,1] dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x10,0x35,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
 
 v_cmp_ne_i32_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
 // W32: v_cmp_ne_i32_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x45,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
@@ -1579,44 +1700,55 @@ v_cmp_ne_i32_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
 v_cmp_ne_i32_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:0
 // GFX11: v_cmp_ne_i32_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x00,0x45,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
 
-v_cmp_ne_u16_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_ne_u16_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ne_u16_e64_dpp s5, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_ne_u16_e64_dpp s5, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_u16_e64_dpp s105, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_ne_u16_e64_dpp s105, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x69,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ne_u16_e64_dpp s105, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_ne_u16_e64_dpp s105, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x69,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_u16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_ne_u16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ne_u16_e64_dpp vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_ne_u16_e64_dpp vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_u16_e64_dpp vcc_hi, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_ne_u16_e64_dpp vcc_hi, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6b,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ne_u16_e64_dpp vcc_hi, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_ne_u16_e64_dpp vcc_hi, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6b,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_u16_e64_dpp ttmp15, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W32: v_cmp_ne_u16_e64_dpp ttmp15, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7b,0x00,0x3d,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ne_u16_e64_dpp ttmp15, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_ne_u16_e64_dpp ttmp15, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7b,0x00,0x3d,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ne_u16_e64_dpp s[10:11], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_ne_u16_e64_dpp s[10:11], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_ne_u16_e64_dpp s[104:105], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_ne_u16_e64_dpp s[104:105], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_u16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_ne_u16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ne_u16_e64_dpp vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_ne_u16_e64_dpp vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_u16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_ne_u16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ne_u16_e64_dpp ttmp[14:15], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W64: v_cmp_ne_u16_e64_dpp ttmp[14:15], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7a,0x00,0x3d,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_u16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W64: v_cmp_ne_u16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7a,0x00,0x3d,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ne_u16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] fi:0
+// GFX11: v_cmp_ne_u16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x00,0x3d,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+
+v_cmp_ne_u16_e64_dpp ttmp15, v1.h, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_ne_u16_e64_dpp ttmp15, v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7b,0x08,0x3d,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_ne_u16_e64_dpp ttmp[14:15], v1.h, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W64: v_cmp_ne_u16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7a,0x08,0x3d,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_u16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:0
-// GFX11: v_cmp_ne_u16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x00,0x3d,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+v_cmp_ne_u16_e64_dpp null, v255.l, v255.h dpp8:[0,0,0,0,0,0,0,0] fi:0
+// GFX11: v_cmp_ne_u16_e64_dpp null, v255.l, v255.h op_sel:[0,1] dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x10,0x3d,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
 
 v_cmp_ne_u32_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
 // W32: v_cmp_ne_u32_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x4d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vopc.s b/llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vopc.s
index 573e3be073b345..665a52fd4c278c 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vopc.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vopc.s
@@ -674,12 +674,12 @@ v_cmp_eq_f64_e64 ttmp[14:15], -|src_scc|, -|exec|
 v_cmp_eq_f64_e64 null, 0xaf123456, -|vcc| clamp
 // GFX11: v_cmp_eq_f64_e64 null, 0xaf123456, -|vcc| clamp ; encoding: [0x7c,0x82,0x22,0xd4,0xff,0xd4,0x00,0x40,0x56,0x34,0x12,0xaf]
 
-v_cmp_eq_i16_e64 s5, v1, v2
-// W32: v_cmp_eq_i16_e64 s5, v1, v2             ; encoding: [0x05,0x00,0x32,0xd4,0x01,0x05,0x02,0x00]
+v_cmp_eq_i16_e64 s5, v1.l, v2.l
+// W32: v_cmp_eq_i16_e64 s5, v1.l, v2.l         ; encoding: [0x05,0x00,0x32,0xd4,0x01,0x05,0x02,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
-v_cmp_eq_i16_e64 s5, v255, v255
-// W32: v_cmp_eq_i16_e64 s5, v255, v255         ; encoding: [0x05,0x00,0x32,0xd4,0xff,0xff,0x03,0x00]
+v_cmp_eq_i16_e64 s5, v255.l, v255.l
+// W32: v_cmp_eq_i16_e64 s5, v255.l, v255.l     ; encoding: [0x05,0x00,0x32,0xd4,0xff,0xff,0x03,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
 v_cmp_eq_i16_e64 s5, s1, s2
@@ -730,12 +730,12 @@ v_cmp_eq_i16_e64 ttmp15, src_scc, vcc_lo
 // W32: v_cmp_eq_i16_e64 ttmp15, src_scc, vcc_lo ; encoding: [0x7b,0x00,0x32,0xd4,0xfd,0xd4,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
-v_cmp_eq_i16_e64 s[10:11], v1, v2
-// W64: v_cmp_eq_i16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x32,0xd4,0x01,0x05,0x02,0x00]
+v_cmp_eq_i16_e64 s[10:11], v1.l, v2.l
+// W64: v_cmp_eq_i16_e64 s[10:11], v1.l, v2.l   ; encoding: [0x0a,0x00,0x32,0xd4,0x01,0x05,0x02,0x00]
 // W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
-v_cmp_eq_i16_e64 s[10:11], v255, v255
-// W64: v_cmp_eq_i16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x32,0xd4,0xff,0xff,0x03,0x00]
+v_cmp_eq_i16_e64 s[10:11], v255.l, v255.l
+// W64: v_cmp_eq_i16_e64 s[10:11], v255.l, v255.l ; encoding: [0x0a,0x00,0x32,0xd4,0xff,0xff,0x03,0x00]
 // W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
 v_cmp_eq_i16_e64 s[10:11], s1, s2
@@ -789,6 +789,30 @@ v_cmp_eq_i16_e64 ttmp[14:15], src_scc, vcc_lo
 v_cmp_eq_i16_e64 null, 0xfe0b, vcc_hi
 // GFX11: v_cmp_eq_i16_e64 null, 0xfe0b, vcc_hi   ; encoding: [0x7c,0x00,0x32,0xd4,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00]
 
+v_cmp_eq_i16_e64 vcc_lo, 0x3800, m0
+// W32: v_cmp_eq_i16_e64 vcc_lo, 0x3800, m0     ; encoding: [0x6a,0x00,0x32,0xd4,0xff,0xfa,0x00,0x00,0x00,0x38,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_eq_i16_e64 vcc, 0x3800, m0
+// W64: v_cmp_eq_i16_e64 vcc, 0x3800, m0        ; encoding: [0x6a,0x00,0x32,0xd4,0xff,0xfa,0x00,0x00,0x00,0x38,0x00,0x00]
+// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_eq_i16_e64 s5, v1.h, v2.l
+// W32: v_cmp_eq_i16_e64 s5, v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x05,0x08,0x32,0xd4,0x01,0x05,0x02,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_eq_i16_e64 s5, v255.l, v255.h
+// W32: v_cmp_eq_i16_e64 s5, v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x05,0x10,0x32,0xd4,0xff,0xff,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_eq_i16_e64 s[10:11], v1.h, v2.l
+// W64: v_cmp_eq_i16_e64 s[10:11], v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x0a,0x08,0x32,0xd4,0x01,0x05,0x02,0x00]
+// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_eq_i16_e64 s[10:11], v255.l, v255.h
+// W64: v_cmp_eq_i16_e64 s[10:11], v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x0a,0x10,0x32,0xd4,0xff,0xff,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
 v_cmp_eq_i32_e64 s5, v1, v2
 // W32: v_cmp_eq_i32_e64 s5, v1, v2             ; encoding: [0x05,0x00,0x42,0xd4,0x01,0x05,0x02,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
@@ -995,12 +1019,12 @@ v_cmp_eq_i64_e64 ttmp[14:15], src_scc, exec
 v_cmp_eq_i64_e64 null, 0xaf123456, vcc
 // GFX11: v_cmp_eq_i64_e64 null, 0xaf123456, vcc  ; encoding: [0x7c,0x00,0x52,0xd4,0xff,0xd4,0x00,0x00,0x56,0x34,0x12,0xaf]
 
-v_cmp_eq_u16_e64 s5, v1, v2
-// W32: v_cmp_eq_u16_e64 s5, v1, v2             ; encoding: [0x05,0x00,0x3a,0xd4,0x01,0x05,0x02,0x00]
+v_cmp_eq_u16_e64 s5, v1.l, v2.l
+// W32: v_cmp_eq_u16_e64 s5, v1.l, v2.l         ; encoding: [0x05,0x00,0x3a,0xd4,0x01,0x05,0x02,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
-v_cmp_eq_u16_e64 s5, v255, v255
-// W32: v_cmp_eq_u16_e64 s5, v255, v255         ; encoding: [0x05,0x00,0x3a,0xd4,0xff,0xff,0x03,0x00]
+v_cmp_eq_u16_e64 s5, v255.l, v255.l
+// W32: v_cmp_eq_u16_e64 s5, v255.l, v255.l     ; encoding: [0x05,0x00,0x3a,0xd4,0xff,0xff,0x03,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
 v_cmp_eq_u16_e64 s5, s1, s2
@@ -1051,12 +1075,12 @@ v_cmp_eq_u16_e64 ttmp15, src_scc, vcc_lo
 // W32: v_cmp_eq_u16_e64 ttmp15, src_scc, vcc_lo ; encoding: [0x7b,0x00,0x3a,0xd4,0xfd,0xd4,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
-v_cmp_eq_u16_e64 s[10:11], v1, v2
-// W64: v_cmp_eq_u16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x3a,0xd4,0x01,0x05,0x02,0x00]
+v_cmp_eq_u16_e64 s[10:11], v1.l, v2.l
+// W64: v_cmp_eq_u16_e64 s[10:11], v1.l, v2.l   ; encoding: [0x0a,0x00,0x3a,0xd4,0x01,0x05,0x02,0x00]
 // W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
-v_cmp_eq_u16_e64 s[10:11], v255, v255
-// W64: v_cmp_eq_u16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x3a,0xd4,0xff,0xff,0x03,0x00]
+v_cmp_eq_u16_e64 s[10:11], v255.l, v255.l
+// W64: v_cmp_eq_u16_e64 s[10:11], v255.l, v255.l ; encoding: [0x0a,0x00,0x3a,0xd4,0xff,0xff,0x03,0x00]
 // W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
 v_cmp_eq_u16_e64 s[10:11], s1, s2
@@ -1110,6 +1134,30 @@ v_cmp_eq_u16_e64 ttmp[14:15], src_scc, vcc_lo
 v_cmp_eq_u16_e64 null, 0xfe0b, vcc_hi
 // GFX11: v_cmp_eq_u16_e64 null, 0xfe0b, vcc_hi   ; encoding: [0x7c,0x00,0x3a,0xd4,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00]
 
+v_cmp_eq_u16_e64 vcc_lo, 0x3800, m0
+// W32: v_cmp_eq_u16_e64 vcc_lo, 0x3800, m0     ; encoding: [0x6a,0x00,0x3a,0xd4,0xff,0xfa,0x00,0x00,0x00,0x38,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_eq_u16_e64 vcc, 0x3800, m0
+// W64: v_cmp_eq_u16_e64 vcc, 0x3800, m0        ; encoding: [0x6a,0x00,0x3a,0xd4,0xff,0xfa,0x00,0x00,0x00,0x38,0x00,0x00]
+// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_eq_u16_e64 s5, v1.h, v2.l
+// W32: v_cmp_eq_u16_e64 s5, v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x05,0x08,0x3a,0xd4,0x01,0x05,0x02,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_eq_u16_e64 s5, v255.l, v255.h
+// W32: v_cmp_eq_u16_e64 s5, v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x05,0x10,0x3a,0xd4,0xff,0xff,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_eq_u16_e64 s[10:11], v1.h, v2.l
+// W64: v_cmp_eq_u16_e64 s[10:11], v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x0a,0x08,0x3a,0xd4,0x01,0x05,0x02,0x00]
+// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_eq_u16_e64 s[10:11], v255.l, v255.h
+// W64: v_cmp_eq_u16_e64 s[10:11], v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x0a,0x10,0x3a,0xd4,0xff,0xff,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
 v_cmp_eq_u32_e64 s5, v1, v2
 // W32: v_cmp_eq_u32_e64 s5, v1, v2             ; encoding: [0x05,0x00,0x4a,0xd4,0x01,0x05,0x02,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
@@ -2370,12 +2418,12 @@ v_cmp_ge_f64_e64 ttmp[14:15], -|src_scc|, -|exec|
 v_cmp_ge_f64_e64 null, 0xaf123456, -|vcc| clamp
 // GFX11: v_cmp_ge_f64_e64 null, 0xaf123456, -|vcc| clamp ; encoding: [0x7c,0x82,0x26,0xd4,0xff,0xd4,0x00,0x40,0x56,0x34,0x12,0xaf]
 
-v_cmp_ge_i16_e64 s5, v1, v2
-// W32: v_cmp_ge_i16_e64 s5, v1, v2             ; encoding: [0x05,0x00,0x36,0xd4,0x01,0x05,0x02,0x00]
+v_cmp_ge_i16_e64 s5, v1.l, v2.l
+// W32: v_cmp_ge_i16_e64 s5, v1.l, v2.l         ; encoding: [0x05,0x00,0x36,0xd4,0x01,0x05,0x02,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
-v_cmp_ge_i16_e64 s5, v255, v255
-// W32: v_cmp_ge_i16_e64 s5, v255, v255         ; encoding: [0x05,0x00,0x36,0xd4,0xff,0xff,0x03,0x00]
+v_cmp_ge_i16_e64 s5, v255.l, v255.l
+// W32: v_cmp_ge_i16_e64 s5, v255.l, v255.l     ; encoding: [0x05,0x00,0x36,0xd4,0xff,0xff,0x03,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
 v_cmp_ge_i16_e64 s5, s1, s2
@@ -2426,12 +2474,12 @@ v_cmp_ge_i16_e64 ttmp15, src_scc, vcc_lo
 // W32: v_cmp_ge_i16_e64 ttmp15, src_scc, vcc_lo ; encoding: [0x7b,0x00,0x36,0xd4,0xfd,0xd4,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
-v_cmp_ge_i16_e64 s[10:11], v1, v2
-// W64: v_cmp_ge_i16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x36,0xd4,0x01,0x05,0x02,0x00]
+v_cmp_ge_i16_e64 s[10:11], v1.l, v2.l
+// W64: v_cmp_ge_i16_e64 s[10:11], v1.l, v2.l   ; encoding: [0x0a,0x00,0x36,0xd4,0x01,0x05,0x02,0x00]
 // W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
-v_cmp_ge_i16_e64 s[10:11], v255, v255
-// W64: v_cmp_ge_i16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x36,0xd4,0xff,0xff,0x03,0x00]
+v_cmp_ge_i16_e64 s[10:11], v255.l, v255.l
+// W64: v_cmp_ge_i16_e64 s[10:11], v255.l, v255.l ; encoding: [0x0a,0x00,0x36,0xd4,0xff,0xff,0x03,0x00]
 // W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
 v_cmp_ge_i16_e64 s[10:11], s1, s2
@@ -2485,6 +2533,30 @@ v_cmp_ge_i16_e64 ttmp[14:15], src_scc, vcc_lo
 v_cmp_ge_i16_e64 null, 0xfe0b, vcc_hi
 // GFX11: v_cmp_ge_i16_e64 null, 0xfe0b, vcc_hi   ; encoding: [0x7c,0x00,0x36,0xd4,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00]
 
+v_cmp_ge_i16_e64 vcc_lo, 0x3800, m0
+// W32: v_cmp_ge_i16_e64 vcc_lo, 0x3800, m0     ; encoding: [0x6a,0x00,0x36,0xd4,0xff,0xfa,0x00,0x00,0x00,0x38,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_ge_i16_e64 vcc, 0x3800, m0
+// W64: v_cmp_ge_i16_e64 vcc, 0x3800, m0        ; encoding: [0x6a,0x00,0x36,0xd4,0xff,0xfa,0x00,0x00,0x00,0x38,0x00,0x00]
+// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_ge_i16_e64 s5, v1.h, v2.l
+// W32: v_cmp_ge_i16_e64 s5, v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x05,0x08,0x36,0xd4,0x01,0x05,0x02,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_ge_i16_e64 s5, v255.l, v255.h
+// W32: v_cmp_ge_i16_e64 s5, v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x05,0x10,0x36,0xd4,0xff,0xff,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_ge_i16_e64 s[10:11], v1.h, v2.l
+// W64: v_cmp_ge_i16_e64 s[10:11], v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x0a,0x08,0x36,0xd4,0x01,0x05,0x02,0x00]
+// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_ge_i16_e64 s[10:11], v255.l, v255.h
+// W64: v_cmp_ge_i16_e64 s[10:11], v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x0a,0x10,0x36,0xd4,0xff,0xff,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
 v_cmp_ge_i32_e64 s5, v1, v2
 // W32: v_cmp_ge_i32_e64 s5, v1, v2             ; encoding: [0x05,0x00,0x46,0xd4,0x01,0x05,0x02,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
@@ -2691,12 +2763,12 @@ v_cmp_ge_i64_e64 ttmp[14:15], src_scc, exec
 v_cmp_ge_i64_e64 null, 0xaf123456, vcc
 // GFX11: v_cmp_ge_i64_e64 null, 0xaf123456, vcc  ; encoding: [0x7c,0x00,0x56,0xd4,0xff,0xd4,0x00,0x00,0x56,0x34,0x12,0xaf]
 
-v_cmp_ge_u16_e64 s5, v1, v2
-// W32: v_cmp_ge_u16_e64 s5, v1, v2             ; encoding: [0x05,0x00,0x3e,0xd4,0x01,0x05,0x02,0x00]
+v_cmp_ge_u16_e64 s5, v1.l, v2.l
+// W32: v_cmp_ge_u16_e64 s5, v1.l, v2.l         ; encoding: [0x05,0x00,0x3e,0xd4,0x01,0x05,0x02,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
-v_cmp_ge_u16_e64 s5, v255, v255
-// W32: v_cmp_ge_u16_e64 s5, v255, v255         ; encoding: [0x05,0x00,0x3e,0xd4,0xff,0xff,0x03,0x00]
+v_cmp_ge_u16_e64 s5, v255.l, v255.l
+// W32: v_cmp_ge_u16_e64 s5, v255.l, v255.l     ; encoding: [0x05,0x00,0x3e,0xd4,0xff,0xff,0x03,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
 v_cmp_ge_u16_e64 s5, s1, s2
@@ -2747,12 +2819,12 @@ v_cmp_ge_u16_e64 ttmp15, src_scc, vcc_lo
 // W32: v_cmp_ge_u16_e64 ttmp15, src_scc, vcc_lo ; encoding: [0x7b,0x00,0x3e,0xd4,0xfd,0xd4,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
-v_cmp_ge_u16_e64 s[10:11], v1, v2
-// W64: v_cmp_ge_u16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x3e,0xd4,0x01,0x05,0x02,0x00]
+v_cmp_ge_u16_e64 s[10:11], v1.l, v2.l
+// W64: v_cmp_ge_u16_e64 s[10:11], v1.l, v2.l   ; encoding: [0x0a,0x00,0x3e,0xd4,0x01,0x05,0x02,0x00]
 // W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
-v_cmp_ge_u16_e64 s[10:11], v255, v255
-// W64: v_cmp_ge_u16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x3e,0xd4,0xff,0xff,0x03,0x00]
+v_cmp_ge_u16_e64 s[10:11], v255.l, v255.l
+// W64: v_cmp_ge_u16_e64 s[10:11], v255.l, v255.l ; encoding: [0x0a,0x00,0x3e,0xd4,0xff,0xff,0x03,0x00]
 // W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
 v_cmp_ge_u16_e64 s[10:11], s1, s2
@@ -2806,6 +2878,30 @@ v_cmp_ge_u16_e64 ttmp[14:15], src_scc, vcc_lo
 v_cmp_ge_u16_e64 null, 0xfe0b, vcc_hi
 // GFX11: v_cmp_ge_u16_e64 null, 0xfe0b, vcc_hi   ; encoding: [0x7c,0x00,0x3e,0xd4,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00]
 
+v_cmp_ge_u16_e64 vcc_lo, 0x3800, m0
+// W32: v_cmp_ge_u16_e64 vcc_lo, 0x3800, m0     ; encoding: [0x6a,0x00,0x3e,0xd4,0xff,0xfa,0x00,0x00,0x00,0x38,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_ge_u16_e64 vcc, 0x3800, m0
+// W64: v_cmp_ge_u16_e64 vcc, 0x3800, m0        ; encoding: [0x6a,0x00,0x3e,0xd4,0xff,0xfa,0x00,0x00,0x00,0x38,0x00,0x00]
+// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_ge_u16_e64 s5, v1.h, v2.l
+// W32: v_cmp_ge_u16_e64 s5, v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x05,0x08,0x3e,0xd4,0x01,0x05,0x02,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_ge_u16_e64 s5, v255.l, v255.h
+// W32: v_cmp_ge_u16_e64 s5, v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x05,0x10,0x3e,0xd4,0xff,0xff,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_ge_u16_e64 s[10:11], v1.h, v2.l
+// W64: v_cmp_ge_u16_e64 s[10:11], v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x0a,0x08,0x3e,0xd4,0x01,0x05,0x02,0x00]
+// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_ge_u16_e64 s[10:11], v255.l, v255.h
+// W64: v_cmp_ge_u16_e64 s[10:11], v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x0a,0x10,0x3e,0xd4,0xff,0xff,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
 v_cmp_ge_u32_e64 s5, v1, v2
 // W32: v_cmp_ge_u32_e64 s5, v1, v2             ; encoding: [0x05,0x00,0x4e,0xd4,0x01,0x05,0x02,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
@@ -3333,12 +3429,12 @@ v_cmp_gt_f64_e64 ttmp[14:15], -|src_scc|, -|exec|
 v_cmp_gt_f64_e64 null, 0xaf123456, -|vcc| clamp
 // GFX11: v_cmp_gt_f64_e64 null, 0xaf123456, -|vcc| clamp ; encoding: [0x7c,0x82,0x24,0xd4,0xff,0xd4,0x00,0x40,0x56,0x34,0x12,0xaf]
 
-v_cmp_gt_i16_e64 s5, v1, v2
-// W32: v_cmp_gt_i16_e64 s5, v1, v2             ; encoding: [0x05,0x00,0x34,0xd4,0x01,0x05,0x02,0x00]
+v_cmp_gt_i16_e64 s5, v1.l, v2.l
+// W32: v_cmp_gt_i16_e64 s5, v1.l, v2.l         ; encoding: [0x05,0x00,0x34,0xd4,0x01,0x05,0x02,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
-v_cmp_gt_i16_e64 s5, v255, v255
-// W32: v_cmp_gt_i16_e64 s5, v255, v255         ; encoding: [0x05,0x00,0x34,0xd4,0xff,0xff,0x03,0x00]
+v_cmp_gt_i16_e64 s5, v255.l, v255.l
+// W32: v_cmp_gt_i16_e64 s5, v255.l, v255.l     ; encoding: [0x05,0x00,0x34,0xd4,0xff,0xff,0x03,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
 v_cmp_gt_i16_e64 s5, s1, s2
@@ -3389,12 +3485,12 @@ v_cmp_gt_i16_e64 ttmp15, src_scc, vcc_lo
 // W32: v_cmp_gt_i16_e64 ttmp15, src_scc, vcc_lo ; encoding: [0x7b,0x00,0x34,0xd4,0xfd,0xd4,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
-v_cmp_gt_i16_e64 s[10:11], v1, v2
-// W64: v_cmp_gt_i16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x34,0xd4,0x01,0x05,0x02,0x00]
+v_cmp_gt_i16_e64 s[10:11], v1.l, v2.l
+// W64: v_cmp_gt_i16_e64 s[10:11], v1.l, v2.l   ; encoding: [0x0a,0x00,0x34,0xd4,0x01,0x05,0x02,0x00]
 // W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
-v_cmp_gt_i16_e64 s[10:11], v255, v255
-// W64: v_cmp_gt_i16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x34,0xd4,0xff,0xff,0x03,0x00]
+v_cmp_gt_i16_e64 s[10:11], v255.l, v255.l
+// W64: v_cmp_gt_i16_e64 s[10:11], v255.l, v255.l ; encoding: [0x0a,0x00,0x34,0xd4,0xff,0xff,0x03,0x00]
 // W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
 v_cmp_gt_i16_e64 s[10:11], s1, s2
@@ -3448,6 +3544,30 @@ v_cmp_gt_i16_e64 ttmp[14:15], src_scc, vcc_lo
 v_cmp_gt_i16_e64 null, 0xfe0b, vcc_hi
 // GFX11: v_cmp_gt_i16_e64 null, 0xfe0b, vcc_hi   ; encoding: [0x7c,0x00,0x34,0xd4,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00]
 
+v_cmp_gt_i16_e64 vcc_lo, 0x3800, m0
+// W32: v_cmp_gt_i16_e64 vcc_lo, 0x3800, m0     ; encoding: [0x6a,0x00,0x34,0xd4,0xff,0xfa,0x00,0x00,0x00,0x38,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_gt_i16_e64 vcc, 0x3800, m0
+// W64: v_cmp_gt_i16_e64 vcc, 0x3800, m0        ; encoding: [0x6a,0x00,0x34,0xd4,0xff,0xfa,0x00,0x00,0x00,0x38,0x00,0x00]
+// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_gt_i16_e64 s5, v1.h, v2.l
+// W32: v_cmp_gt_i16_e64 s5, v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x05,0x08,0x34,0xd4,0x01,0x05,0x02,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_gt_i16_e64 s5, v255.l, v255.h
+// W32: v_cmp_gt_i16_e64 s5, v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x05,0x10,0x34,0xd4,0xff,0xff,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_gt_i16_e64 s[10:11], v1.h, v2.l
+// W64: v_cmp_gt_i16_e64 s[10:11], v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x0a,0x08,0x34,0xd4,0x01,0x05,0x02,0x00]
+// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_gt_i16_e64 s[10:11], v255.l, v255.h
+// W64: v_cmp_gt_i16_e64 s[10:11], v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x0a,0x10,0x34,0xd4,0xff,0xff,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
 v_cmp_gt_i32_e64 s5, v1, v2
 // W32: v_cmp_gt_i32_e64 s5, v1, v2             ; encoding: [0x05,0x00,0x44,0xd4,0x01,0x05,0x02,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
@@ -3654,12 +3774,12 @@ v_cmp_gt_i64_e64 ttmp[14:15], src_scc, exec
 v_cmp_gt_i64_e64 null, 0xaf123456, vcc
 // GFX11: v_cmp_gt_i64_e64 null, 0xaf123456, vcc  ; encoding: [0x7c,0x00,0x54,0xd4,0xff,0xd4,0x00,0x00,0x56,0x34,0x12,0xaf]
 
-v_cmp_gt_u16_e64 s5, v1, v2
-// W32: v_cmp_gt_u16_e64 s5, v1, v2             ; encoding: [0x05,0x00,0x3c,0xd4,0x01,0x05,0x02,0x00]
+v_cmp_gt_u16_e64 s5, v1.l, v2.l
+// W32: v_cmp_gt_u16_e64 s5, v1.l, v2.l         ; encoding: [0x05,0x00,0x3c,0xd4,0x01,0x05,0x02,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
-v_cmp_gt_u16_e64 s5, v255, v255
-// W32: v_cmp_gt_u16_e64 s5, v255, v255         ; encoding: [0x05,0x00,0x3c,0xd4,0xff,0xff,0x03,0x00]
+v_cmp_gt_u16_e64 s5, v255.l, v255.l
+// W32: v_cmp_gt_u16_e64 s5, v255.l, v255.l     ; encoding: [0x05,0x00,0x3c,0xd4,0xff,0xff,0x03,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
 v_cmp_gt_u16_e64 s5, s1, s2
@@ -3710,12 +3830,12 @@ v_cmp_gt_u16_e64 ttmp15, src_scc, vcc_lo
 // W32: v_cmp_gt_u16_e64 ttmp15, src_scc, vcc_lo ; encoding: [0x7b,0x00,0x3c,0xd4,0xfd,0xd4,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
-v_cmp_gt_u16_e64 s[10:11], v1, v2
-// W64: v_cmp_gt_u16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x3c,0xd4,0x01,0x05,0x02,0x00]
+v_cmp_gt_u16_e64 s[10:11], v1.l, v2.l
+// W64: v_cmp_gt_u16_e64 s[10:11], v1.l, v2.l   ; encoding: [0x0a,0x00,0x3c,0xd4,0x01,0x05,0x02,0x00]
 // W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
-v_cmp_gt_u16_e64 s[10:11], v255, v255
-// W64: v_cmp_gt_u16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x3c,0xd4,0xff,0xff,0x03,0x00]
+v_cmp_gt_u16_e64 s[10:11], v255.l, v255.l
+// W64: v_cmp_gt_u16_e64 s[10:11], v255.l, v255.l ; encoding: [0x0a,0x00,0x3c,0xd4,0xff,0xff,0x03,0x00]
 // W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
 v_cmp_gt_u16_e64 s[10:11], s1, s2
@@ -3769,6 +3889,30 @@ v_cmp_gt_u16_e64 ttmp[14:15], src_scc, vcc_lo
 v_cmp_gt_u16_e64 null, 0xfe0b, vcc_hi
 // GFX11: v_cmp_gt_u16_e64 null, 0xfe0b, vcc_hi   ; encoding: [0x7c,0x00,0x3c,0xd4,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00]
 
+v_cmp_gt_u16_e64 vcc_lo, 0x3800, m0
+// W32: v_cmp_gt_u16_e64 vcc_lo, 0x3800, m0     ; encoding: [0x6a,0x00,0x3c,0xd4,0xff,0xfa,0x00,0x00,0x00,0x38,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_gt_u16_e64 vcc, 0x3800, m0
+// W64: v_cmp_gt_u16_e64 vcc, 0x3800, m0        ; encoding: [0x6a,0x00,0x3c,0xd4,0xff,0xfa,0x00,0x00,0x00,0x38,0x00,0x00]
+// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_gt_u16_e64 s5, v1.h, v2.l
+// W32: v_cmp_gt_u16_e64 s5, v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x05,0x08,0x3c,0xd4,0x01,0x05,0x02,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_gt_u16_e64 s5, v255.l, v255.h
+// W32: v_cmp_gt_u16_e64 s5, v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x05,0x10,0x3c,0xd4,0xff,0xff,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_gt_u16_e64 s[10:11], v1.h, v2.l
+// W64: v_cmp_gt_u16_e64 s[10:11], v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x0a,0x08,0x3c,0xd4,0x01,0x05,0x02,0x00]
+// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_gt_u16_e64 s[10:11], v255.l, v255.h
+// W64: v_cmp_gt_u16_e64 s[10:11], v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x0a,0x10,0x3c,0xd4,0xff,0xff,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
 v_cmp_gt_u32_e64 s5, v1, v2
 // W32: v_cmp_gt_u32_e64 s5, v1, v2             ; encoding: [0x05,0x00,0x4c,0xd4,0x01,0x05,0x02,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
@@ -4296,12 +4440,12 @@ v_cmp_le_f64_e64 ttmp[14:15], -|src_scc|, -|exec|
 v_cmp_le_f64_e64 null, 0xaf123456, -|vcc| clamp
 // GFX11: v_cmp_le_f64_e64 null, 0xaf123456, -|vcc| clamp ; encoding: [0x7c,0x82,0x23,0xd4,0xff,0xd4,0x00,0x40,0x56,0x34,0x12,0xaf]
 
-v_cmp_le_i16_e64 s5, v1, v2
-// W32: v_cmp_le_i16_e64 s5, v1, v2             ; encoding: [0x05,0x00,0x33,0xd4,0x01,0x05,0x02,0x00]
+v_cmp_le_i16_e64 s5, v1.l, v2.l
+// W32: v_cmp_le_i16_e64 s5, v1.l, v2.l         ; encoding: [0x05,0x00,0x33,0xd4,0x01,0x05,0x02,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
-v_cmp_le_i16_e64 s5, v255, v255
-// W32: v_cmp_le_i16_e64 s5, v255, v255         ; encoding: [0x05,0x00,0x33,0xd4,0xff,0xff,0x03,0x00]
+v_cmp_le_i16_e64 s5, v255.l, v255.l
+// W32: v_cmp_le_i16_e64 s5, v255.l, v255.l     ; encoding: [0x05,0x00,0x33,0xd4,0xff,0xff,0x03,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
 v_cmp_le_i16_e64 s5, s1, s2
@@ -4352,12 +4496,12 @@ v_cmp_le_i16_e64 ttmp15, src_scc, vcc_lo
 // W32: v_cmp_le_i16_e64 ttmp15, src_scc, vcc_lo ; encoding: [0x7b,0x00,0x33,0xd4,0xfd,0xd4,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
-v_cmp_le_i16_e64 s[10:11], v1, v2
-// W64: v_cmp_le_i16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x33,0xd4,0x01,0x05,0x02,0x00]
+v_cmp_le_i16_e64 s[10:11], v1.l, v2.l
+// W64: v_cmp_le_i16_e64 s[10:11], v1.l, v2.l   ; encoding: [0x0a,0x00,0x33,0xd4,0x01,0x05,0x02,0x00]
 // W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
-v_cmp_le_i16_e64 s[10:11], v255, v255
-// W64: v_cmp_le_i16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x33,0xd4,0xff,0xff,0x03,0x00]
+v_cmp_le_i16_e64 s[10:11], v255.l, v255.l
+// W64: v_cmp_le_i16_e64 s[10:11], v255.l, v255.l ; encoding: [0x0a,0x00,0x33,0xd4,0xff,0xff,0x03,0x00]
 // W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
 v_cmp_le_i16_e64 s[10:11], s1, s2
@@ -4411,6 +4555,30 @@ v_cmp_le_i16_e64 ttmp[14:15], src_scc, vcc_lo
 v_cmp_le_i16_e64 null, 0xfe0b, vcc_hi
 // GFX11: v_cmp_le_i16_e64 null, 0xfe0b, vcc_hi   ; encoding: [0x7c,0x00,0x33,0xd4,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00]
 
+v_cmp_le_i16_e64 vcc_lo, 0x3800, m0
+// W32: v_cmp_le_i16_e64 vcc_lo, 0x3800, m0     ; encoding: [0x6a,0x00,0x33,0xd4,0xff,0xfa,0x00,0x00,0x00,0x38,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_le_i16_e64 vcc, 0x3800, m0
+// W64: v_cmp_le_i16_e64 vcc, 0x3800, m0        ; encoding: [0x6a,0x00,0x33,0xd4,0xff,0xfa,0x00,0x00,0x00,0x38,0x00,0x00]
+// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_le_i16_e64 s5, v1.h, v2.l
+// W32: v_cmp_le_i16_e64 s5, v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x05,0x08,0x33,0xd4,0x01,0x05,0x02,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_le_i16_e64 s5, v255.l, v255.h
+// W32: v_cmp_le_i16_e64 s5, v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x05,0x10,0x33,0xd4,0xff,0xff,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_le_i16_e64 s[10:11], v1.h, v2.l
+// W64: v_cmp_le_i16_e64 s[10:11], v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x0a,0x08,0x33,0xd4,0x01,0x05,0x02,0x00]
+// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_le_i16_e64 s[10:11], v255.l, v255.h
+// W64: v_cmp_le_i16_e64 s[10:11], v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x0a,0x10,0x33,0xd4,0xff,0xff,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
 v_cmp_le_i32_e64 s5, v1, v2
 // W32: v_cmp_le_i32_e64 s5, v1, v2             ; encoding: [0x05,0x00,0x43,0xd4,0x01,0x05,0x02,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
@@ -4617,12 +4785,12 @@ v_cmp_le_i64_e64 ttmp[14:15], src_scc, exec
 v_cmp_le_i64_e64 null, 0xaf123456, vcc
 // GFX11: v_cmp_le_i64_e64 null, 0xaf123456, vcc  ; encoding: [0x7c,0x00,0x53,0xd4,0xff,0xd4,0x00,0x00,0x56,0x34,0x12,0xaf]
 
-v_cmp_le_u16_e64 s5, v1, v2
-// W32: v_cmp_le_u16_e64 s5, v1, v2             ; encoding: [0x05,0x00,0x3b,0xd4,0x01,0x05,0x02,0x00]
+v_cmp_le_u16_e64 s5, v1.l, v2.l
+// W32: v_cmp_le_u16_e64 s5, v1.l, v2.l         ; encoding: [0x05,0x00,0x3b,0xd4,0x01,0x05,0x02,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
-v_cmp_le_u16_e64 s5, v255, v255
-// W32: v_cmp_le_u16_e64 s5, v255, v255         ; encoding: [0x05,0x00,0x3b,0xd4,0xff,0xff,0x03,0x00]
+v_cmp_le_u16_e64 s5, v255.l, v255.l
+// W32: v_cmp_le_u16_e64 s5, v255.l, v255.l     ; encoding: [0x05,0x00,0x3b,0xd4,0xff,0xff,0x03,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
 v_cmp_le_u16_e64 s5, s1, s2
@@ -4673,12 +4841,12 @@ v_cmp_le_u16_e64 ttmp15, src_scc, vcc_lo
 // W32: v_cmp_le_u16_e64 ttmp15, src_scc, vcc_lo ; encoding: [0x7b,0x00,0x3b,0xd4,0xfd,0xd4,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
-v_cmp_le_u16_e64 s[10:11], v1, v2
-// W64: v_cmp_le_u16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x3b,0xd4,0x01,0x05,0x02,0x00]
+v_cmp_le_u16_e64 s[10:11], v1.l, v2.l
+// W64: v_cmp_le_u16_e64 s[10:11], v1.l, v2.l   ; encoding: [0x0a,0x00,0x3b,0xd4,0x01,0x05,0x02,0x00]
 // W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
-v_cmp_le_u16_e64 s[10:11], v255, v255
-// W64: v_cmp_le_u16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x3b,0xd4,0xff,0xff,0x03,0x00]
+v_cmp_le_u16_e64 s[10:11], v255.l, v255.l
+// W64: v_cmp_le_u16_e64 s[10:11], v255.l, v255.l ; encoding: [0x0a,0x00,0x3b,0xd4,0xff,0xff,0x03,0x00]
 // W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
 v_cmp_le_u16_e64 s[10:11], s1, s2
@@ -4732,6 +4900,30 @@ v_cmp_le_u16_e64 ttmp[14:15], src_scc, vcc_lo
 v_cmp_le_u16_e64 null, 0xfe0b, vcc_hi
 // GFX11: v_cmp_le_u16_e64 null, 0xfe0b, vcc_hi   ; encoding: [0x7c,0x00,0x3b,0xd4,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00]
 
+v_cmp_le_u16_e64 vcc_lo, 0x3800, m0
+// W32: v_cmp_le_u16_e64 vcc_lo, 0x3800, m0     ; encoding: [0x6a,0x00,0x3b,0xd4,0xff,0xfa,0x00,0x00,0x00,0x38,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_le_u16_e64 vcc, 0x3800, m0
+// W64: v_cmp_le_u16_e64 vcc, 0x3800, m0        ; encoding: [0x6a,0x00,0x3b,0xd4,0xff,0xfa,0x00,0x00,0x00,0x38,0x00,0x00]
+// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_le_u16_e64 s5, v1.h, v2.l
+// W32: v_cmp_le_u16_e64 s5, v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x05,0x08,0x3b,0xd4,0x01,0x05,0x02,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_le_u16_e64 s5, v255.l, v255.h
+// W32: v_cmp_le_u16_e64 s5, v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x05,0x10,0x3b,0xd4,0xff,0xff,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_le_u16_e64 s[10:11], v1.h, v2.l
+// W64: v_cmp_le_u16_e64 s[10:11], v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x0a,0x08,0x3b,0xd4,0x01,0x05,0x02,0x00]
+// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_le_u16_e64 s[10:11], v255.l, v255.h
+// W64: v_cmp_le_u16_e64 s[10:11], v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x0a,0x10,0x3b,0xd4,0xff,0xff,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
 v_cmp_le_u32_e64 s5, v1, v2
 // W32: v_cmp_le_u32_e64 s5, v1, v2             ; encoding: [0x05,0x00,0x4b,0xd4,0x01,0x05,0x02,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
@@ -5600,12 +5792,12 @@ v_cmp_lt_f64_e64 ttmp[14:15], -|src_scc|, -|exec|
 v_cmp_lt_f64_e64 null, 0xaf123456, -|vcc| clamp
 // GFX11: v_cmp_lt_f64_e64 null, 0xaf123456, -|vcc| clamp ; encoding: [0x7c,0x82,0x21,0xd4,0xff,0xd4,0x00,0x40,0x56,0x34,0x12,0xaf]
 
-v_cmp_lt_i16_e64 s5, v1, v2
-// W32: v_cmp_lt_i16_e64 s5, v1, v2             ; encoding: [0x05,0x00,0x31,0xd4,0x01,0x05,0x02,0x00]
+v_cmp_lt_i16_e64 s5, v1.l, v2.l
+// W32: v_cmp_lt_i16_e64 s5, v1.l, v2.l         ; encoding: [0x05,0x00,0x31,0xd4,0x01,0x05,0x02,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
-v_cmp_lt_i16_e64 s5, v255, v255
-// W32: v_cmp_lt_i16_e64 s5, v255, v255         ; encoding: [0x05,0x00,0x31,0xd4,0xff,0xff,0x03,0x00]
+v_cmp_lt_i16_e64 s5, v255.l, v255.l
+// W32: v_cmp_lt_i16_e64 s5, v255.l, v255.l     ; encoding: [0x05,0x00,0x31,0xd4,0xff,0xff,0x03,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
 v_cmp_lt_i16_e64 s5, s1, s2
@@ -5656,12 +5848,12 @@ v_cmp_lt_i16_e64 ttmp15, src_scc, vcc_lo
 // W32: v_cmp_lt_i16_e64 ttmp15, src_scc, vcc_lo ; encoding: [0x7b,0x00,0x31,0xd4,0xfd,0xd4,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
-v_cmp_lt_i16_e64 s[10:11], v1, v2
-// W64: v_cmp_lt_i16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x31,0xd4,0x01,0x05,0x02,0x00]
+v_cmp_lt_i16_e64 s[10:11], v1.l, v2.l
+// W64: v_cmp_lt_i16_e64 s[10:11], v1.l, v2.l   ; encoding: [0x0a,0x00,0x31,0xd4,0x01,0x05,0x02,0x00]
 // W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
-v_cmp_lt_i16_e64 s[10:11], v255, v255
-// W64: v_cmp_lt_i16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x31,0xd4,0xff,0xff,0x03,0x00]
+v_cmp_lt_i16_e64 s[10:11], v255.l, v255.l
+// W64: v_cmp_lt_i16_e64 s[10:11], v255.l, v255.l ; encoding: [0x0a,0x00,0x31,0xd4,0xff,0xff,0x03,0x00]
 // W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
 v_cmp_lt_i16_e64 s[10:11], s1, s2
@@ -5715,6 +5907,30 @@ v_cmp_lt_i16_e64 ttmp[14:15], src_scc, vcc_lo
 v_cmp_lt_i16_e64 null, 0xfe0b, vcc_hi
 // GFX11: v_cmp_lt_i16_e64 null, 0xfe0b, vcc_hi   ; encoding: [0x7c,0x00,0x31,0xd4,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00]
 
+v_cmp_lt_i16_e64 vcc_lo, 0x3800, m0
+// W32: v_cmp_lt_i16_e64 vcc_lo, 0x3800, m0     ; encoding: [0x6a,0x00,0x31,0xd4,0xff,0xfa,0x00,0x00,0x00,0x38,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_lt_i16_e64 vcc, 0x3800, m0
+// W64: v_cmp_lt_i16_e64 vcc, 0x3800, m0        ; encoding: [0x6a,0x00,0x31,0xd4,0xff,0xfa,0x00,0x00,0x00,0x38,0x00,0x00]
+// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_lt_i16_e64 s5, v1.h, v2.l
+// W32: v_cmp_lt_i16_e64 s5, v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x05,0x08,0x31,0xd4,0x01,0x05,0x02,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_lt_i16_e64 s5, v255.l, v255.h
+// W32: v_cmp_lt_i16_e64 s5, v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x05,0x10,0x31,0xd4,0xff,0xff,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_lt_i16_e64 s[10:11], v1.h, v2.l
+// W64: v_cmp_lt_i16_e64 s[10:11], v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x0a,0x08,0x31,0xd4,0x01,0x05,0x02,0x00]
+// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_lt_i16_e64 s[10:11], v255.l, v255.h
+// W64: v_cmp_lt_i16_e64 s[10:11], v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x0a,0x10,0x31,0xd4,0xff,0xff,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
 v_cmp_lt_i32_e64 s5, v1, v2
 // W32: v_cmp_lt_i32_e64 s5, v1, v2             ; encoding: [0x05,0x00,0x41,0xd4,0x01,0x05,0x02,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
@@ -5921,12 +6137,12 @@ v_cmp_lt_i64_e64 ttmp[14:15], src_scc, exec
 v_cmp_lt_i64_e64 null, 0xaf123456, vcc
 // GFX11: v_cmp_lt_i64_e64 null, 0xaf123456, vcc  ; encoding: [0x7c,0x00,0x51,0xd4,0xff,0xd4,0x00,0x00,0x56,0x34,0x12,0xaf]
 
-v_cmp_lt_u16_e64 s5, v1, v2
-// W32: v_cmp_lt_u16_e64 s5, v1, v2             ; encoding: [0x05,0x00,0x39,0xd4,0x01,0x05,0x02,0x00]
+v_cmp_lt_u16_e64 s5, v1.l, v2.l
+// W32: v_cmp_lt_u16_e64 s5, v1.l, v2.l         ; encoding: [0x05,0x00,0x39,0xd4,0x01,0x05,0x02,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
-v_cmp_lt_u16_e64 s5, v255, v255
-// W32: v_cmp_lt_u16_e64 s5, v255, v255         ; encoding: [0x05,0x00,0x39,0xd4,0xff,0xff,0x03,0x00]
+v_cmp_lt_u16_e64 s5, v255.l, v255.l
+// W32: v_cmp_lt_u16_e64 s5, v255.l, v255.l     ; encoding: [0x05,0x00,0x39,0xd4,0xff,0xff,0x03,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
 v_cmp_lt_u16_e64 s5, s1, s2
@@ -5977,12 +6193,12 @@ v_cmp_lt_u16_e64 ttmp15, src_scc, vcc_lo
 // W32: v_cmp_lt_u16_e64 ttmp15, src_scc, vcc_lo ; encoding: [0x7b,0x00,0x39,0xd4,0xfd,0xd4,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
-v_cmp_lt_u16_e64 s[10:11], v1, v2
-// W64: v_cmp_lt_u16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x39,0xd4,0x01,0x05,0x02,0x00]
+v_cmp_lt_u16_e64 s[10:11], v1.l, v2.l
+// W64: v_cmp_lt_u16_e64 s[10:11], v1.l, v2.l   ; encoding: [0x0a,0x00,0x39,0xd4,0x01,0x05,0x02,0x00]
 // W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
-v_cmp_lt_u16_e64 s[10:11], v255, v255
-// W64: v_cmp_lt_u16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x39,0xd4,0xff,0xff,0x03,0x00]
+v_cmp_lt_u16_e64 s[10:11], v255.l, v255.l
+// W64: v_cmp_lt_u16_e64 s[10:11], v255.l, v255.l ; encoding: [0x0a,0x00,0x39,0xd4,0xff,0xff,0x03,0x00]
 // W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
 v_cmp_lt_u16_e64 s[10:11], s1, s2
@@ -6036,6 +6252,30 @@ v_cmp_lt_u16_e64 ttmp[14:15], src_scc, vcc_lo
 v_cmp_lt_u16_e64 null, 0xfe0b, vcc_hi
 // GFX11: v_cmp_lt_u16_e64 null, 0xfe0b, vcc_hi   ; encoding: [0x7c,0x00,0x39,0xd4,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00]
 
+v_cmp_lt_u16_e64 vcc_lo, 0x3800, m0
+// W32: v_cmp_lt_u16_e64 vcc_lo, 0x3800, m0     ; encoding: [0x6a,0x00,0x39,0xd4,0xff,0xfa,0x00,0x00,0x00,0x38,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_lt_u16_e64 vcc, 0x3800, m0
+// W64: v_cmp_lt_u16_e64 vcc, 0x3800, m0        ; encoding: [0x6a,0x00,0x39,0xd4,0xff,0xfa,0x00,0x00,0x00,0x38,0x00,0x00]
+// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_lt_u16_e64 s5, v1.h, v2.l
+// W32: v_cmp_lt_u16_e64 s5, v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x05,0x08,0x39,0xd4,0x01,0x05,0x02,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_lt_u16_e64 s5, v255.l, v255.h
+// W32: v_cmp_lt_u16_e64 s5, v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x05,0x10,0x39,0xd4,0xff,0xff,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_lt_u16_e64 s[10:11], v1.h, v2.l
+// W64: v_cmp_lt_u16_e64 s[10:11], v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x0a,0x08,0x39,0xd4,0x01,0x05,0x02,0x00]
+// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_lt_u16_e64 s[10:11], v255.l, v255.h
+// W64: v_cmp_lt_u16_e64 s[10:11], v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x0a,0x10,0x39,0xd4,0xff,0xff,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
 v_cmp_lt_u32_e64 s5, v1, v2
 // W32: v_cmp_lt_u32_e64 s5, v1, v2             ; encoding: [0x05,0x00,0x49,0xd4,0x01,0x05,0x02,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
@@ -6242,12 +6482,12 @@ v_cmp_lt_u64_e64 ttmp[14:15], src_scc, exec
 v_cmp_lt_u64_e64 null, 0xaf123456, vcc
 // GFX11: v_cmp_lt_u64_e64 null, 0xaf123456, vcc  ; encoding: [0x7c,0x00,0x59,0xd4,0xff,0xd4,0x00,0x00,0x56,0x34,0x12,0xaf]
 
-v_cmp_ne_i16_e64 s5, v1, v2
-// W32: v_cmp_ne_i16_e64 s5, v1, v2             ; encoding: [0x05,0x00,0x35,0xd4,0x01,0x05,0x02,0x00]
+v_cmp_ne_i16_e64 s5, v1.l, v2.l
+// W32: v_cmp_ne_i16_e64 s5, v1.l, v2.l         ; encoding: [0x05,0x00,0x35,0xd4,0x01,0x05,0x02,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
-v_cmp_ne_i16_e64 s5, v255, v255
-// W32: v_cmp_ne_i16_e64 s5, v255, v255         ; encoding: [0x05,0x00,0x35,0xd4,0xff,0xff,0x03,0x00]
+v_cmp_ne_i16_e64 s5, v255.l, v255.l
+// W32: v_cmp_ne_i16_e64 s5, v255.l, v255.l     ; encoding: [0x05,0x00,0x35,0xd4,0xff,0xff,0x03,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
 v_cmp_ne_i16_e64 s5, s1, s2
@@ -6298,12 +6538,12 @@ v_cmp_ne_i16_e64 ttmp15, src_scc, vcc_lo
 // W32: v_cmp_ne_i16_e64 ttmp15, src_scc, vcc_lo ; encoding: [0x7b,0x00,0x35,0xd4,0xfd,0xd4,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
-v_cmp_ne_i16_e64 s[10:11], v1, v2
-// W64: v_cmp_ne_i16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x35,0xd4,0x01,0x05,0x02,0x00]
+v_cmp_ne_i16_e64 s[10:11], v1.l, v2.l
+// W64: v_cmp_ne_i16_e64 s[10:11], v1.l, v2.l   ; encoding: [0x0a,0x00,0x35,0xd4,0x01,0x05,0x02,0x00]
 // W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
-v_cmp_ne_i16_e64 s[10:11], v255, v255
-// W64: v_cmp_ne_i16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x35,0xd4,0xff,0xff,0x03,0x00]
+v_cmp_ne_i16_e64 s[10:11], v255.l, v255.l
+// W64: v_cmp_ne_i16_e64 s[10:11], v255.l, v255.l ; encoding: [0x0a,0x00,0x35,0xd4,0xff,0xff,0x03,0x00]
 // W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
 v_cmp_ne_i16_e64 s[10:11], s1, s2
@@ -6357,6 +6597,30 @@ v_cmp_ne_i16_e64 ttmp[14:15], src_scc, vcc_lo
 v_cmp_ne_i16_e64 null, 0xfe0b, vcc_hi
 // GFX11: v_cmp_ne_i16_e64 null, 0xfe0b, vcc_hi   ; encoding: [0x7c,0x00,0x35,0xd4,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00]
 
+v_cmp_ne_i16_e64 vcc_lo, 0x3800, m0
+// W32: v_cmp_ne_i16_e64 vcc_lo, 0x3800, m0     ; encoding: [0x6a,0x00,0x35,0xd4,0xff,0xfa,0x00,0x00,0x00,0x38,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_ne_i16_e64 vcc, 0x3800, m0
+// W64: v_cmp_ne_i16_e64 vcc, 0x3800, m0        ; encoding: [0x6a,0x00,0x35,0xd4,0xff,0xfa,0x00,0x00,0x00,0x38,0x00,0x00]
+// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_ne_i16_e64 s5, v1.h, v2.l
+// W32: v_cmp_ne_i16_e64 s5, v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x05,0x08,0x35,0xd4,0x01,0x05,0x02,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_ne_i16_e64 s5, v255.l, v255.h
+// W32: v_cmp_ne_i16_e64 s5, v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x05,0x10,0x35,0xd4,0xff,0xff,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_ne_i16_e64 s[10:11], v1.h, v2.l
+// W64: v_cmp_ne_i16_e64 s[10:11], v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x0a,0x08,0x35,0xd4,0x01,0x05,0x02,0x00]
+// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_ne_i16_e64 s[10:11], v255.l, v255.h
+// W64: v_cmp_ne_i16_e64 s[10:11], v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x0a,0x10,0x35,0xd4,0xff,0xff,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
 v_cmp_ne_i32_e64 s5, v1, v2
 // W32: v_cmp_ne_i32_e64 s5, v1, v2             ; encoding: [0x05,0x00,0x45,0xd4,0x01,0x05,0x02,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
@@ -6563,12 +6827,12 @@ v_cmp_ne_i64_e64 ttmp[14:15], src_scc, exec
 v_cmp_ne_i64_e64 null, 0xaf123456, vcc
 // GFX11: v_cmp_ne_i64_e64 null, 0xaf123456, vcc  ; encoding: [0x7c,0x00,0x55,0xd4,0xff,0xd4,0x00,0x00,0x56,0x34,0x12,0xaf]
 
-v_cmp_ne_u16_e64 s5, v1, v2
-// W32: v_cmp_ne_u16_e64 s5, v1, v2             ; encoding: [0x05,0x00,0x3d,0xd4,0x01,0x05,0x02,0x00]
+v_cmp_ne_u16_e64 s5, v1.l, v2.l
+// W32: v_cmp_ne_u16_e64 s5, v1.l, v2.l         ; encoding: [0x05,0x00,0x3d,0xd4,0x01,0x05,0x02,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
-v_cmp_ne_u16_e64 s5, v255, v255
-// W32: v_cmp_ne_u16_e64 s5, v255, v255         ; encoding: [0x05,0x00,0x3d,0xd4,0xff,0xff,0x03,0x00]
+v_cmp_ne_u16_e64 s5, v255.l, v255.l
+// W32: v_cmp_ne_u16_e64 s5, v255.l, v255.l     ; encoding: [0x05,0x00,0x3d,0xd4,0xff,0xff,0x03,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
 v_cmp_ne_u16_e64 s5, s1, s2
@@ -6619,12 +6883,12 @@ v_cmp_ne_u16_e64 ttmp15, src_scc, vcc_lo
 // W32: v_cmp_ne_u16_e64 ttmp15, src_scc, vcc_lo ; encoding: [0x7b,0x00,0x3d,0xd4,0xfd,0xd4,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
-v_cmp_ne_u16_e64 s[10:11], v1, v2
-// W64: v_cmp_ne_u16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x3d,0xd4,0x01,0x05,0x02,0x00]
+v_cmp_ne_u16_e64 s[10:11], v1.l, v2.l
+// W64: v_cmp_ne_u16_e64 s[10:11], v1.l, v2.l   ; encoding: [0x0a,0x00,0x3d,0xd4,0x01,0x05,0x02,0x00]
 // W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
-v_cmp_ne_u16_e64 s[10:11], v255, v255
-// W64: v_cmp_ne_u16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x3d,0xd4,0xff,0xff,0x03,0x00]
+v_cmp_ne_u16_e64 s[10:11], v255.l, v255.l
+// W64: v_cmp_ne_u16_e64 s[10:11], v255.l, v255.l ; encoding: [0x0a,0x00,0x3d,0xd4,0xff,0xff,0x03,0x00]
 // W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
 v_cmp_ne_u16_e64 s[10:11], s1, s2
@@ -6678,6 +6942,30 @@ v_cmp_ne_u16_e64 ttmp[14:15], src_scc, vcc_lo
 v_cmp_ne_u16_e64 null, 0xfe0b, vcc_hi
 // GFX11: v_cmp_ne_u16_e64 null, 0xfe0b, vcc_hi   ; encoding: [0x7c,0x00,0x3d,0xd4,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00]
 
+v_cmp_ne_u16_e64 vcc_lo, 0x3800, m0
+// W32: v_cmp_ne_u16_e64 vcc_lo, 0x3800, m0     ; encoding: [0x6a,0x00,0x3d,0xd4,0xff,0xfa,0x00,0x00,0x00,0x38,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_ne_u16_e64 vcc, 0x3800, m0
+// W64: v_cmp_ne_u16_e64 vcc, 0x3800, m0        ; encoding: [0x6a,0x00,0x3d,0xd4,0xff,0xfa,0x00,0x00,0x00,0x38,0x00,0x00]
+// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_ne_u16_e64 s5, v1.h, v2.l
+// W32: v_cmp_ne_u16_e64 s5, v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x05,0x08,0x3d,0xd4,0x01,0x05,0x02,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_ne_u16_e64 s5, v255.l, v255.h
+// W32: v_cmp_ne_u16_e64 s5, v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x05,0x10,0x3d,0xd4,0xff,0xff,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_ne_u16_e64 s[10:11], v1.h, v2.l
+// W64: v_cmp_ne_u16_e64 s[10:11], v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x0a,0x08,0x3d,0xd4,0x01,0x05,0x02,0x00]
+// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_ne_u16_e64 s[10:11], v255.l, v255.h
+// W64: v_cmp_ne_u16_e64 s[10:11], v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x0a,0x10,0x3d,0xd4,0xff,0xff,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
 v_cmp_ne_u32_e64 s5, v1, v2
 // W32: v_cmp_ne_u32_e64 s5, v1, v2             ; encoding: [0x05,0x00,0x4d,0xd4,0x01,0x05,0x02,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_vopc.s b/llvm/test/MC/AMDGPU/gfx11_asm_vopc.s
index a39c2070e32628..61fa7cad3fea2d 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_vopc.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_vopc.s
@@ -676,124 +676,172 @@ v_cmp_eq_f64 vcc, 0xaf123456, v[254:255]
 // W64: v_cmp_eq_f64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x45,0x7c,0x56,0x34,0x12,0xaf]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc_lo, v1, v2
-// W32: v_cmp_eq_i16_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x64,0x7c]
+v_cmp_eq_i16 vcc_lo, v1.l, v2.l
+// W32: v_cmp_eq_i16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x64,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc_lo, v127, v2
-// W32: v_cmp_eq_i16_e32 vcc_lo, v127, v2       ; encoding: [0x7f,0x05,0x64,0x7c]
+v_cmp_eq_i16 vcc_lo, v127.l, v2.l
+// W32: v_cmp_eq_i16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x64,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc_lo, s1, v2
-// W32: v_cmp_eq_i16_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x64,0x7c]
+v_cmp_eq_i16 vcc_lo, s1, v2.l
+// W32: v_cmp_eq_i16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x64,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc_lo, s105, v2
-// W32: v_cmp_eq_i16_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x64,0x7c]
+v_cmp_eq_i16 vcc_lo, s105, v2.l
+// W32: v_cmp_eq_i16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x64,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc_lo, vcc_lo, v2
-// W32: v_cmp_eq_i16_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x64,0x7c]
+v_cmp_eq_i16 vcc_lo, vcc_lo, v2.l
+// W32: v_cmp_eq_i16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x64,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc_lo, vcc_hi, v2
-// W32: v_cmp_eq_i16_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x64,0x7c]
+v_cmp_eq_i16 vcc_lo, vcc_hi, v2.l
+// W32: v_cmp_eq_i16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x64,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc_lo, ttmp15, v2
-// W32: v_cmp_eq_i16_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x64,0x7c]
+v_cmp_eq_i16 vcc_lo, ttmp15, v2.l
+// W32: v_cmp_eq_i16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x64,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc_lo, m0, v2
-// W32: v_cmp_eq_i16_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x64,0x7c]
+v_cmp_eq_i16 vcc_lo, m0, v2.l
+// W32: v_cmp_eq_i16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x64,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc_lo, exec_lo, v2
-// W32: v_cmp_eq_i16_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x64,0x7c]
+v_cmp_eq_i16 vcc_lo, exec_lo, v2.l
+// W32: v_cmp_eq_i16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x64,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc_lo, exec_hi, v2
-// W32: v_cmp_eq_i16_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x64,0x7c]
+v_cmp_eq_i16 vcc_lo, exec_hi, v2.l
+// W32: v_cmp_eq_i16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x64,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc_lo, null, v2
-// W32: v_cmp_eq_i16_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x64,0x7c]
+v_cmp_eq_i16 vcc_lo, null, v2.l
+// W32: v_cmp_eq_i16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x64,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc_lo, -1, v2
-// W32: v_cmp_eq_i16_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x64,0x7c]
+v_cmp_eq_i16 vcc_lo, -1, v2.l
+// W32: v_cmp_eq_i16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x64,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc_lo, 0.5, v2
-// W32: v_cmp_eq_i16_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x64,0x7c]
+v_cmp_eq_i16 vcc_lo, 0.5, v2.l
+// W32: v_cmp_eq_i16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x64,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc_lo, src_scc, v2
-// W32: v_cmp_eq_i16_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x64,0x7c]
+v_cmp_eq_i16 vcc_lo, src_scc, v2.l
+// W32: v_cmp_eq_i16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x64,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc_lo, 0xfe0b, v127
-// W32: v_cmp_eq_i16_e32 vcc_lo, 0xfe0b, v127   ; encoding: [0xff,0xfe,0x64,0x7c,0x0b,0xfe,0x00,0x00]
+v_cmp_eq_i16 vcc_lo, 0xfe0b, v127.l
+// W32: v_cmp_eq_i16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x64,0x7c,0x0b,0xfe,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc, v1, v2
-// W64: v_cmp_eq_i16_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x64,0x7c]
+v_cmp_eq_i16 vcc, v1.l, v2.l
+// W64: v_cmp_eq_i16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x64,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc, v127, v2
-// W64: v_cmp_eq_i16_e32 vcc, v127, v2          ; encoding: [0x7f,0x05,0x64,0x7c]
+v_cmp_eq_i16 vcc, v127.l, v2.l
+// W64: v_cmp_eq_i16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x64,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc, s1, v2
-// W64: v_cmp_eq_i16_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x64,0x7c]
+v_cmp_eq_i16 vcc, s1, v2.l
+// W64: v_cmp_eq_i16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x64,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc, s105, v2
-// W64: v_cmp_eq_i16_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x64,0x7c]
+v_cmp_eq_i16 vcc, s105, v2.l
+// W64: v_cmp_eq_i16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x64,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc, vcc_lo, v2
-// W64: v_cmp_eq_i16_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x64,0x7c]
+v_cmp_eq_i16 vcc, vcc_lo, v2.l
+// W64: v_cmp_eq_i16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x64,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc, vcc_hi, v2
-// W64: v_cmp_eq_i16_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x64,0x7c]
+v_cmp_eq_i16 vcc, vcc_hi, v2.l
+// W64: v_cmp_eq_i16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x64,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc, ttmp15, v2
-// W64: v_cmp_eq_i16_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x64,0x7c]
+v_cmp_eq_i16 vcc, ttmp15, v2.l
+// W64: v_cmp_eq_i16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x64,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc, m0, v2
-// W64: v_cmp_eq_i16_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x64,0x7c]
+v_cmp_eq_i16 vcc, m0, v2.l
+// W64: v_cmp_eq_i16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x64,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc, exec_lo, v2
-// W64: v_cmp_eq_i16_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x64,0x7c]
+v_cmp_eq_i16 vcc, exec_lo, v2.l
+// W64: v_cmp_eq_i16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x64,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc, exec_hi, v2
-// W64: v_cmp_eq_i16_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x64,0x7c]
+v_cmp_eq_i16 vcc, exec_hi, v2.l
+// W64: v_cmp_eq_i16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x64,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc, null, v2
-// W64: v_cmp_eq_i16_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x64,0x7c]
+v_cmp_eq_i16 vcc, null, v2.l
+// W64: v_cmp_eq_i16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x64,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc, -1, v2
-// W64: v_cmp_eq_i16_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x64,0x7c]
+v_cmp_eq_i16 vcc, -1, v2.l
+// W64: v_cmp_eq_i16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x64,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc, 0.5, v2
-// W64: v_cmp_eq_i16_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x64,0x7c]
+v_cmp_eq_i16 vcc, 0.5, v2.l
+// W64: v_cmp_eq_i16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x64,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc, src_scc, v2
-// W64: v_cmp_eq_i16_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x64,0x7c]
+v_cmp_eq_i16 vcc, src_scc, v2.l
+// W64: v_cmp_eq_i16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x64,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc, 0xfe0b, v127
-// W64: v_cmp_eq_i16_e32 vcc, 0xfe0b, v127      ; encoding: [0xff,0xfe,0x64,0x7c,0x0b,0xfe,0x00,0x00]
+v_cmp_eq_i16 vcc, 0xfe0b, v127.l
+// W64: v_cmp_eq_i16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x64,0x7c,0x0b,0xfe,0x00,0x00]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc_lo, v1.h, v2.l
+// W32: v_cmp_eq_i16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x64,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc, v1.h, v2.l
+// W64: v_cmp_eq_i16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x64,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc_lo, v127.h, v2.l
+// W32: v_cmp_eq_i16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x64,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc, v127.h, v2.l
+// W64: v_cmp_eq_i16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x64,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc_lo, 0.5, v127.l
+// W32: v_cmp_eq_i16_e32 vcc_lo, 0.5, v127.l    ; encoding: [0xf0,0xfe,0x64,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc, 0.5, v127.l
+// W64: v_cmp_eq_i16_e32 vcc, 0.5, v127.l       ; encoding: [0xf0,0xfe,0x64,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc_lo, 0x3800, v2.l
+// W32: v_cmp_eq_i16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x64,0x7c,0x00,0x38,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc, 0x3800, v2.l
+// W64: v_cmp_eq_i16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x64,0x7c,0x00,0x38,0x00,0x00]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc_lo, src_scc, v2.h
+// W32: v_cmp_eq_i16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x65,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc, src_scc, v2.h
+// W64: v_cmp_eq_i16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x65,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc_lo, 0xfe0b, v127.h
+// W32: v_cmp_eq_i16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x65,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc, 0xfe0b, v127.h
+// W64: v_cmp_eq_i16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x65,0x7c,0x0b,0xfe,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
 v_cmp_eq_i32 vcc_lo, v1, v2
@@ -1012,124 +1060,172 @@ v_cmp_eq_i64 vcc, 0xaf123456, v[254:255]
 // W64: v_cmp_eq_i64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xa5,0x7c,0x56,0x34,0x12,0xaf]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc_lo, v1, v2
-// W32: v_cmp_eq_u16_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x74,0x7c]
+v_cmp_eq_u16 vcc_lo, v1.l, v2.l
+// W32: v_cmp_eq_u16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x74,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc_lo, v127, v2
-// W32: v_cmp_eq_u16_e32 vcc_lo, v127, v2       ; encoding: [0x7f,0x05,0x74,0x7c]
+v_cmp_eq_u16 vcc_lo, v127.l, v2.l
+// W32: v_cmp_eq_u16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x74,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc_lo, s1, v2
-// W32: v_cmp_eq_u16_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x74,0x7c]
+v_cmp_eq_u16 vcc_lo, s1, v2.l
+// W32: v_cmp_eq_u16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x74,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc_lo, s105, v2
-// W32: v_cmp_eq_u16_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x74,0x7c]
+v_cmp_eq_u16 vcc_lo, s105, v2.l
+// W32: v_cmp_eq_u16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x74,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc_lo, vcc_lo, v2
-// W32: v_cmp_eq_u16_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x74,0x7c]
+v_cmp_eq_u16 vcc_lo, vcc_lo, v2.l
+// W32: v_cmp_eq_u16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x74,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc_lo, vcc_hi, v2
-// W32: v_cmp_eq_u16_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x74,0x7c]
+v_cmp_eq_u16 vcc_lo, vcc_hi, v2.l
+// W32: v_cmp_eq_u16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x74,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc_lo, ttmp15, v2
-// W32: v_cmp_eq_u16_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x74,0x7c]
+v_cmp_eq_u16 vcc_lo, ttmp15, v2.l
+// W32: v_cmp_eq_u16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x74,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc_lo, m0, v2
-// W32: v_cmp_eq_u16_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x74,0x7c]
+v_cmp_eq_u16 vcc_lo, m0, v2.l
+// W32: v_cmp_eq_u16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x74,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc_lo, exec_lo, v2
-// W32: v_cmp_eq_u16_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x74,0x7c]
+v_cmp_eq_u16 vcc_lo, exec_lo, v2.l
+// W32: v_cmp_eq_u16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x74,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc_lo, exec_hi, v2
-// W32: v_cmp_eq_u16_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x74,0x7c]
+v_cmp_eq_u16 vcc_lo, exec_hi, v2.l
+// W32: v_cmp_eq_u16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x74,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc_lo, null, v2
-// W32: v_cmp_eq_u16_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x74,0x7c]
+v_cmp_eq_u16 vcc_lo, null, v2.l
+// W32: v_cmp_eq_u16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x74,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc_lo, -1, v2
-// W32: v_cmp_eq_u16_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x74,0x7c]
+v_cmp_eq_u16 vcc_lo, -1, v2.l
+// W32: v_cmp_eq_u16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x74,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc_lo, 0.5, v2
-// W32: v_cmp_eq_u16_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x74,0x7c]
+v_cmp_eq_u16 vcc_lo, 0.5, v2.l
+// W32: v_cmp_eq_u16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x74,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc_lo, src_scc, v2
-// W32: v_cmp_eq_u16_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x74,0x7c]
+v_cmp_eq_u16 vcc_lo, src_scc, v2.l
+// W32: v_cmp_eq_u16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x74,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc_lo, 0xfe0b, v127
-// W32: v_cmp_eq_u16_e32 vcc_lo, 0xfe0b, v127   ; encoding: [0xff,0xfe,0x74,0x7c,0x0b,0xfe,0x00,0x00]
+v_cmp_eq_u16 vcc_lo, 0xfe0b, v127.l
+// W32: v_cmp_eq_u16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x74,0x7c,0x0b,0xfe,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc, v1, v2
-// W64: v_cmp_eq_u16_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x74,0x7c]
+v_cmp_eq_u16 vcc, v1.l, v2.l
+// W64: v_cmp_eq_u16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x74,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc, v127.l, v2.l
+// W64: v_cmp_eq_u16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x74,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc, s1, v2.l
+// W64: v_cmp_eq_u16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x74,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc, s105, v2.l
+// W64: v_cmp_eq_u16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x74,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc, vcc_lo, v2.l
+// W64: v_cmp_eq_u16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x74,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc, vcc_hi, v2.l
+// W64: v_cmp_eq_u16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x74,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc, ttmp15, v2.l
+// W64: v_cmp_eq_u16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x74,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc, v127, v2
-// W64: v_cmp_eq_u16_e32 vcc, v127, v2          ; encoding: [0x7f,0x05,0x74,0x7c]
+v_cmp_eq_u16 vcc, m0, v2.l
+// W64: v_cmp_eq_u16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x74,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc, s1, v2
-// W64: v_cmp_eq_u16_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x74,0x7c]
+v_cmp_eq_u16 vcc, exec_lo, v2.l
+// W64: v_cmp_eq_u16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x74,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc, s105, v2
-// W64: v_cmp_eq_u16_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x74,0x7c]
+v_cmp_eq_u16 vcc, exec_hi, v2.l
+// W64: v_cmp_eq_u16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x74,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc, vcc_lo, v2
-// W64: v_cmp_eq_u16_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x74,0x7c]
+v_cmp_eq_u16 vcc, null, v2.l
+// W64: v_cmp_eq_u16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x74,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc, vcc_hi, v2
-// W64: v_cmp_eq_u16_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x74,0x7c]
+v_cmp_eq_u16 vcc, -1, v2.l
+// W64: v_cmp_eq_u16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x74,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc, ttmp15, v2
-// W64: v_cmp_eq_u16_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x74,0x7c]
+v_cmp_eq_u16 vcc, 0.5, v2.l
+// W64: v_cmp_eq_u16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x74,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc, m0, v2
-// W64: v_cmp_eq_u16_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x74,0x7c]
+v_cmp_eq_u16 vcc, src_scc, v2.l
+// W64: v_cmp_eq_u16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x74,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc, exec_lo, v2
-// W64: v_cmp_eq_u16_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x74,0x7c]
+v_cmp_eq_u16 vcc, 0xfe0b, v127.l
+// W64: v_cmp_eq_u16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x74,0x7c,0x0b,0xfe,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc, exec_hi, v2
-// W64: v_cmp_eq_u16_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x74,0x7c]
+v_cmp_eq_u16 vcc_lo, v1.h, v2.l
+// W32: v_cmp_eq_u16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x74,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc, v1.h, v2.l
+// W64: v_cmp_eq_u16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x74,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc, null, v2
-// W64: v_cmp_eq_u16_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x74,0x7c]
+v_cmp_eq_u16 vcc_lo, v127.h, v2.l
+// W32: v_cmp_eq_u16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x74,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc, v127.h, v2.l
+// W64: v_cmp_eq_u16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x74,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc, -1, v2
-// W64: v_cmp_eq_u16_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x74,0x7c]
+v_cmp_eq_u16 vcc_lo, 0.5, v127.l
+// W32: v_cmp_eq_u16_e32 vcc_lo, 0.5, v127.l    ; encoding: [0xf0,0xfe,0x74,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc, 0.5, v127.l
+// W64: v_cmp_eq_u16_e32 vcc, 0.5, v127.l       ; encoding: [0xf0,0xfe,0x74,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc, 0.5, v2
-// W64: v_cmp_eq_u16_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x74,0x7c]
+v_cmp_eq_u16 vcc_lo, 0x3800, v2.l
+// W32: v_cmp_eq_u16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x74,0x7c,0x00,0x38,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc, 0x3800, v2.l
+// W64: v_cmp_eq_u16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x74,0x7c,0x00,0x38,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc, src_scc, v2
-// W64: v_cmp_eq_u16_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x74,0x7c]
+v_cmp_eq_u16 vcc_lo, src_scc, v2.h
+// W32: v_cmp_eq_u16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x75,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc, src_scc, v2.h
+// W64: v_cmp_eq_u16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x75,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc, 0xfe0b, v127
-// W64: v_cmp_eq_u16_e32 vcc, 0xfe0b, v127      ; encoding: [0xff,0xfe,0x74,0x7c,0x0b,0xfe,0x00,0x00]
+v_cmp_eq_u16 vcc_lo, 0xfe0b, v127.h
+// W32: v_cmp_eq_u16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x75,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc, 0xfe0b, v127.h
+// W64: v_cmp_eq_u16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x75,0x7c,0x0b,0xfe,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
 v_cmp_eq_u32 vcc_lo, v1, v2
@@ -2452,124 +2548,172 @@ v_cmp_ge_f64 vcc, 0xaf123456, v[254:255]
 // W64: v_cmp_ge_f64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x4d,0x7c,0x56,0x34,0x12,0xaf]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc_lo, v1, v2
-// W32: v_cmp_ge_i16_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x6c,0x7c]
+v_cmp_ge_i16 vcc_lo, v1.l, v2.l
+// W32: v_cmp_ge_i16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x6c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc_lo, v127, v2
-// W32: v_cmp_ge_i16_e32 vcc_lo, v127, v2       ; encoding: [0x7f,0x05,0x6c,0x7c]
+v_cmp_ge_i16 vcc_lo, v127.l, v2.l
+// W32: v_cmp_ge_i16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x6c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc_lo, s1, v2
-// W32: v_cmp_ge_i16_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x6c,0x7c]
+v_cmp_ge_i16 vcc_lo, s1, v2.l
+// W32: v_cmp_ge_i16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x6c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc_lo, s105, v2
-// W32: v_cmp_ge_i16_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x6c,0x7c]
+v_cmp_ge_i16 vcc_lo, s105, v2.l
+// W32: v_cmp_ge_i16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x6c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc_lo, vcc_lo, v2
-// W32: v_cmp_ge_i16_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x6c,0x7c]
+v_cmp_ge_i16 vcc_lo, vcc_lo, v2.l
+// W32: v_cmp_ge_i16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x6c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc_lo, vcc_hi, v2
-// W32: v_cmp_ge_i16_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x6c,0x7c]
+v_cmp_ge_i16 vcc_lo, vcc_hi, v2.l
+// W32: v_cmp_ge_i16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x6c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc_lo, ttmp15, v2
-// W32: v_cmp_ge_i16_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x6c,0x7c]
+v_cmp_ge_i16 vcc_lo, ttmp15, v2.l
+// W32: v_cmp_ge_i16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x6c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc_lo, m0, v2
-// W32: v_cmp_ge_i16_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x6c,0x7c]
+v_cmp_ge_i16 vcc_lo, m0, v2.l
+// W32: v_cmp_ge_i16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x6c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc_lo, exec_lo, v2
-// W32: v_cmp_ge_i16_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x6c,0x7c]
+v_cmp_ge_i16 vcc_lo, exec_lo, v2.l
+// W32: v_cmp_ge_i16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x6c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc_lo, exec_hi, v2
-// W32: v_cmp_ge_i16_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x6c,0x7c]
+v_cmp_ge_i16 vcc_lo, exec_hi, v2.l
+// W32: v_cmp_ge_i16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x6c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc_lo, null, v2
-// W32: v_cmp_ge_i16_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x6c,0x7c]
+v_cmp_ge_i16 vcc_lo, null, v2.l
+// W32: v_cmp_ge_i16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x6c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc_lo, -1, v2
-// W32: v_cmp_ge_i16_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x6c,0x7c]
+v_cmp_ge_i16 vcc_lo, -1, v2.l
+// W32: v_cmp_ge_i16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x6c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc_lo, 0.5, v2
-// W32: v_cmp_ge_i16_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x6c,0x7c]
+v_cmp_ge_i16 vcc_lo, 0.5, v2.l
+// W32: v_cmp_ge_i16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x6c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc_lo, src_scc, v2
-// W32: v_cmp_ge_i16_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x6c,0x7c]
+v_cmp_ge_i16 vcc_lo, src_scc, v2.l
+// W32: v_cmp_ge_i16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x6c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc_lo, 0xfe0b, v127
-// W32: v_cmp_ge_i16_e32 vcc_lo, 0xfe0b, v127   ; encoding: [0xff,0xfe,0x6c,0x7c,0x0b,0xfe,0x00,0x00]
+v_cmp_ge_i16 vcc_lo, 0xfe0b, v127.l
+// W32: v_cmp_ge_i16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x6c,0x7c,0x0b,0xfe,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc, v1, v2
-// W64: v_cmp_ge_i16_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x6c,0x7c]
+v_cmp_ge_i16 vcc, v1.l, v2.l
+// W64: v_cmp_ge_i16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x6c,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc, v127.l, v2.l
+// W64: v_cmp_ge_i16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x6c,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc, s1, v2.l
+// W64: v_cmp_ge_i16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x6c,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc, s105, v2.l
+// W64: v_cmp_ge_i16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x6c,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc, v127, v2
-// W64: v_cmp_ge_i16_e32 vcc, v127, v2          ; encoding: [0x7f,0x05,0x6c,0x7c]
+v_cmp_ge_i16 vcc, vcc_lo, v2.l
+// W64: v_cmp_ge_i16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x6c,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc, s1, v2
-// W64: v_cmp_ge_i16_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x6c,0x7c]
+v_cmp_ge_i16 vcc, vcc_hi, v2.l
+// W64: v_cmp_ge_i16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x6c,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc, s105, v2
-// W64: v_cmp_ge_i16_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x6c,0x7c]
+v_cmp_ge_i16 vcc, ttmp15, v2.l
+// W64: v_cmp_ge_i16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x6c,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc, vcc_lo, v2
-// W64: v_cmp_ge_i16_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x6c,0x7c]
+v_cmp_ge_i16 vcc, m0, v2.l
+// W64: v_cmp_ge_i16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x6c,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc, vcc_hi, v2
-// W64: v_cmp_ge_i16_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x6c,0x7c]
+v_cmp_ge_i16 vcc, exec_lo, v2.l
+// W64: v_cmp_ge_i16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x6c,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc, ttmp15, v2
-// W64: v_cmp_ge_i16_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x6c,0x7c]
+v_cmp_ge_i16 vcc, exec_hi, v2.l
+// W64: v_cmp_ge_i16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x6c,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc, m0, v2
-// W64: v_cmp_ge_i16_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x6c,0x7c]
+v_cmp_ge_i16 vcc, null, v2.l
+// W64: v_cmp_ge_i16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x6c,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc, exec_lo, v2
-// W64: v_cmp_ge_i16_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x6c,0x7c]
+v_cmp_ge_i16 vcc, -1, v2.l
+// W64: v_cmp_ge_i16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x6c,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc, exec_hi, v2
-// W64: v_cmp_ge_i16_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x6c,0x7c]
+v_cmp_ge_i16 vcc, 0.5, v2.l
+// W64: v_cmp_ge_i16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x6c,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc, null, v2
-// W64: v_cmp_ge_i16_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x6c,0x7c]
+v_cmp_ge_i16 vcc, src_scc, v2.l
+// W64: v_cmp_ge_i16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x6c,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc, -1, v2
-// W64: v_cmp_ge_i16_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x6c,0x7c]
+v_cmp_ge_i16 vcc, 0xfe0b, v127.l
+// W64: v_cmp_ge_i16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x6c,0x7c,0x0b,0xfe,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc, 0.5, v2
-// W64: v_cmp_ge_i16_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x6c,0x7c]
+v_cmp_ge_i16 vcc_lo, v1.h, v2.l
+// W32: v_cmp_ge_i16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x6c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc, v1.h, v2.l
+// W64: v_cmp_ge_i16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x6c,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc_lo, v127.h, v2.l
+// W32: v_cmp_ge_i16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x6c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc, v127.h, v2.l
+// W64: v_cmp_ge_i16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x6c,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc_lo, 0.5, v127.l
+// W32: v_cmp_ge_i16_e32 vcc_lo, 0.5, v127.l    ; encoding: [0xf0,0xfe,0x6c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc, 0.5, v127.l
+// W64: v_cmp_ge_i16_e32 vcc, 0.5, v127.l       ; encoding: [0xf0,0xfe,0x6c,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc, src_scc, v2
-// W64: v_cmp_ge_i16_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x6c,0x7c]
+v_cmp_ge_i16 vcc_lo, 0x3800, v2.l
+// W32: v_cmp_ge_i16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x6c,0x7c,0x00,0x38,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc, 0x3800, v2.l
+// W64: v_cmp_ge_i16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x6c,0x7c,0x00,0x38,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc, 0xfe0b, v127
-// W64: v_cmp_ge_i16_e32 vcc, 0xfe0b, v127      ; encoding: [0xff,0xfe,0x6c,0x7c,0x0b,0xfe,0x00,0x00]
+v_cmp_ge_i16 vcc_lo, src_scc, v2.h
+// W32: v_cmp_ge_i16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x6d,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc, src_scc, v2.h
+// W64: v_cmp_ge_i16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x6d,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc_lo, 0xfe0b, v127.h
+// W32: v_cmp_ge_i16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x6d,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc, 0xfe0b, v127.h
+// W64: v_cmp_ge_i16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x6d,0x7c,0x0b,0xfe,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
 v_cmp_ge_i32 vcc_lo, v1, v2
@@ -2788,124 +2932,172 @@ v_cmp_ge_i64 vcc, 0xaf123456, v[254:255]
 // W64: v_cmp_ge_i64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xad,0x7c,0x56,0x34,0x12,0xaf]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc_lo, v1, v2
-// W32: v_cmp_ge_u16_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x7c,0x7c]
+v_cmp_ge_u16 vcc_lo, v1.l, v2.l
+// W32: v_cmp_ge_u16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x7c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc_lo, v127, v2
-// W32: v_cmp_ge_u16_e32 vcc_lo, v127, v2       ; encoding: [0x7f,0x05,0x7c,0x7c]
+v_cmp_ge_u16 vcc_lo, v127.l, v2.l
+// W32: v_cmp_ge_u16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x7c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc_lo, s1, v2
-// W32: v_cmp_ge_u16_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x7c,0x7c]
+v_cmp_ge_u16 vcc_lo, s1, v2.l
+// W32: v_cmp_ge_u16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x7c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc_lo, s105, v2
-// W32: v_cmp_ge_u16_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x7c,0x7c]
+v_cmp_ge_u16 vcc_lo, s105, v2.l
+// W32: v_cmp_ge_u16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x7c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc_lo, vcc_lo, v2
-// W32: v_cmp_ge_u16_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x7c,0x7c]
+v_cmp_ge_u16 vcc_lo, vcc_lo, v2.l
+// W32: v_cmp_ge_u16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x7c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc_lo, vcc_hi, v2
-// W32: v_cmp_ge_u16_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x7c,0x7c]
+v_cmp_ge_u16 vcc_lo, vcc_hi, v2.l
+// W32: v_cmp_ge_u16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x7c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc_lo, ttmp15, v2
-// W32: v_cmp_ge_u16_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x7c,0x7c]
+v_cmp_ge_u16 vcc_lo, ttmp15, v2.l
+// W32: v_cmp_ge_u16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x7c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc_lo, m0, v2
-// W32: v_cmp_ge_u16_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x7c,0x7c]
+v_cmp_ge_u16 vcc_lo, m0, v2.l
+// W32: v_cmp_ge_u16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x7c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc_lo, exec_lo, v2
-// W32: v_cmp_ge_u16_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x7c,0x7c]
+v_cmp_ge_u16 vcc_lo, exec_lo, v2.l
+// W32: v_cmp_ge_u16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x7c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc_lo, exec_hi, v2
-// W32: v_cmp_ge_u16_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x7c,0x7c]
+v_cmp_ge_u16 vcc_lo, exec_hi, v2.l
+// W32: v_cmp_ge_u16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x7c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc_lo, null, v2
-// W32: v_cmp_ge_u16_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x7c,0x7c]
+v_cmp_ge_u16 vcc_lo, null, v2.l
+// W32: v_cmp_ge_u16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x7c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc_lo, -1, v2
-// W32: v_cmp_ge_u16_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x7c,0x7c]
+v_cmp_ge_u16 vcc_lo, -1, v2.l
+// W32: v_cmp_ge_u16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x7c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc_lo, 0.5, v2
-// W32: v_cmp_ge_u16_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x7c,0x7c]
+v_cmp_ge_u16 vcc_lo, 0.5, v2.l
+// W32: v_cmp_ge_u16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x7c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc_lo, src_scc, v2
-// W32: v_cmp_ge_u16_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x7c,0x7c]
+v_cmp_ge_u16 vcc_lo, src_scc, v2.l
+// W32: v_cmp_ge_u16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x7c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc_lo, 0xfe0b, v127
-// W32: v_cmp_ge_u16_e32 vcc_lo, 0xfe0b, v127   ; encoding: [0xff,0xfe,0x7c,0x7c,0x0b,0xfe,0x00,0x00]
+v_cmp_ge_u16 vcc_lo, 0xfe0b, v127.l
+// W32: v_cmp_ge_u16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x7c,0x7c,0x0b,0xfe,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc, v1, v2
-// W64: v_cmp_ge_u16_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x7c,0x7c]
+v_cmp_ge_u16 vcc, v1.l, v2.l
+// W64: v_cmp_ge_u16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x7c,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc, v127, v2
-// W64: v_cmp_ge_u16_e32 vcc, v127, v2          ; encoding: [0x7f,0x05,0x7c,0x7c]
+v_cmp_ge_u16 vcc, v127.l, v2.l
+// W64: v_cmp_ge_u16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x7c,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc, s1, v2
-// W64: v_cmp_ge_u16_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x7c,0x7c]
+v_cmp_ge_u16 vcc, s1, v2.l
+// W64: v_cmp_ge_u16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x7c,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc, s105, v2
-// W64: v_cmp_ge_u16_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x7c,0x7c]
+v_cmp_ge_u16 vcc, s105, v2.l
+// W64: v_cmp_ge_u16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x7c,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc, vcc_lo, v2
-// W64: v_cmp_ge_u16_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x7c,0x7c]
+v_cmp_ge_u16 vcc, vcc_lo, v2.l
+// W64: v_cmp_ge_u16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x7c,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc, vcc_hi, v2
-// W64: v_cmp_ge_u16_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x7c,0x7c]
+v_cmp_ge_u16 vcc, vcc_hi, v2.l
+// W64: v_cmp_ge_u16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x7c,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc, ttmp15, v2
-// W64: v_cmp_ge_u16_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x7c,0x7c]
+v_cmp_ge_u16 vcc, ttmp15, v2.l
+// W64: v_cmp_ge_u16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x7c,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc, m0, v2
-// W64: v_cmp_ge_u16_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x7c,0x7c]
+v_cmp_ge_u16 vcc, m0, v2.l
+// W64: v_cmp_ge_u16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x7c,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc, exec_lo, v2
-// W64: v_cmp_ge_u16_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x7c,0x7c]
+v_cmp_ge_u16 vcc, exec_lo, v2.l
+// W64: v_cmp_ge_u16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x7c,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc, exec_hi, v2
-// W64: v_cmp_ge_u16_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x7c,0x7c]
+v_cmp_ge_u16 vcc, exec_hi, v2.l
+// W64: v_cmp_ge_u16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x7c,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc, null, v2
-// W64: v_cmp_ge_u16_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x7c,0x7c]
+v_cmp_ge_u16 vcc, null, v2.l
+// W64: v_cmp_ge_u16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x7c,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc, -1, v2
-// W64: v_cmp_ge_u16_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x7c,0x7c]
+v_cmp_ge_u16 vcc, -1, v2.l
+// W64: v_cmp_ge_u16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x7c,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc, 0.5, v2
-// W64: v_cmp_ge_u16_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x7c,0x7c]
+v_cmp_ge_u16 vcc, 0.5, v2.l
+// W64: v_cmp_ge_u16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x7c,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc, src_scc, v2
-// W64: v_cmp_ge_u16_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x7c,0x7c]
+v_cmp_ge_u16 vcc, src_scc, v2.l
+// W64: v_cmp_ge_u16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x7c,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc, 0xfe0b, v127
-// W64: v_cmp_ge_u16_e32 vcc, 0xfe0b, v127      ; encoding: [0xff,0xfe,0x7c,0x7c,0x0b,0xfe,0x00,0x00]
+v_cmp_ge_u16 vcc, 0xfe0b, v127.l
+// W64: v_cmp_ge_u16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x7c,0x7c,0x0b,0xfe,0x00,0x00]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc_lo, v1.h, v2.l
+// W32: v_cmp_ge_u16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x7c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc, v1.h, v2.l
+// W64: v_cmp_ge_u16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x7c,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc_lo, v127.h, v2.l
+// W32: v_cmp_ge_u16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x7c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc, v127.h, v2.l
+// W64: v_cmp_ge_u16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x7c,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc_lo, 0.5, v127.l
+// W32: v_cmp_ge_u16_e32 vcc_lo, 0.5, v127.l    ; encoding: [0xf0,0xfe,0x7c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc, 0.5, v127.l
+// W64: v_cmp_ge_u16_e32 vcc, 0.5, v127.l       ; encoding: [0xf0,0xfe,0x7c,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc_lo, 0x3800, v2.l
+// W32: v_cmp_ge_u16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x7c,0x7c,0x00,0x38,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc, 0x3800, v2.l
+// W64: v_cmp_ge_u16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x7c,0x7c,0x00,0x38,0x00,0x00]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc_lo, src_scc, v2.h
+// W32: v_cmp_ge_u16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x7d,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc, src_scc, v2.h
+// W64: v_cmp_ge_u16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x7d,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc_lo, 0xfe0b, v127.h
+// W32: v_cmp_ge_u16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x7d,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc, 0xfe0b, v127.h
+// W64: v_cmp_ge_u16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x7d,0x7c,0x0b,0xfe,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
 v_cmp_ge_u32 vcc_lo, v1, v2
@@ -3460,124 +3652,172 @@ v_cmp_gt_f64 vcc, 0xaf123456, v[254:255]
 // W64: v_cmp_gt_f64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x49,0x7c,0x56,0x34,0x12,0xaf]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc_lo, v1, v2
-// W32: v_cmp_gt_i16_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x68,0x7c]
+v_cmp_gt_i16 vcc_lo, v1.l, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x68,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc_lo, v127, v2
-// W32: v_cmp_gt_i16_e32 vcc_lo, v127, v2       ; encoding: [0x7f,0x05,0x68,0x7c]
+v_cmp_gt_i16 vcc_lo, v127.l, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x68,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc_lo, s1, v2
-// W32: v_cmp_gt_i16_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x68,0x7c]
+v_cmp_gt_i16 vcc_lo, s1, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x68,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc_lo, s105, v2
-// W32: v_cmp_gt_i16_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x68,0x7c]
+v_cmp_gt_i16 vcc_lo, s105, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x68,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc_lo, vcc_lo, v2
-// W32: v_cmp_gt_i16_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x68,0x7c]
+v_cmp_gt_i16 vcc_lo, vcc_lo, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x68,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc_lo, vcc_hi, v2
-// W32: v_cmp_gt_i16_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x68,0x7c]
+v_cmp_gt_i16 vcc_lo, vcc_hi, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x68,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc_lo, ttmp15, v2
-// W32: v_cmp_gt_i16_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x68,0x7c]
+v_cmp_gt_i16 vcc_lo, ttmp15, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x68,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc_lo, m0, v2
-// W32: v_cmp_gt_i16_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x68,0x7c]
+v_cmp_gt_i16 vcc_lo, m0, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x68,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc_lo, exec_lo, v2
-// W32: v_cmp_gt_i16_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x68,0x7c]
+v_cmp_gt_i16 vcc_lo, exec_lo, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x68,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc_lo, exec_hi, v2
-// W32: v_cmp_gt_i16_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x68,0x7c]
+v_cmp_gt_i16 vcc_lo, exec_hi, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x68,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc_lo, null, v2
-// W32: v_cmp_gt_i16_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x68,0x7c]
+v_cmp_gt_i16 vcc_lo, null, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x68,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc_lo, -1, v2
-// W32: v_cmp_gt_i16_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x68,0x7c]
+v_cmp_gt_i16 vcc_lo, -1, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x68,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc_lo, 0.5, v2
-// W32: v_cmp_gt_i16_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x68,0x7c]
+v_cmp_gt_i16 vcc_lo, 0.5, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x68,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc_lo, src_scc, v2
-// W32: v_cmp_gt_i16_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x68,0x7c]
+v_cmp_gt_i16 vcc_lo, src_scc, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x68,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc_lo, 0xfe0b, v127
-// W32: v_cmp_gt_i16_e32 vcc_lo, 0xfe0b, v127   ; encoding: [0xff,0xfe,0x68,0x7c,0x0b,0xfe,0x00,0x00]
+v_cmp_gt_i16 vcc_lo, 0xfe0b, v127.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x68,0x7c,0x0b,0xfe,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc, v1, v2
-// W64: v_cmp_gt_i16_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x68,0x7c]
+v_cmp_gt_i16 vcc, v1.l, v2.l
+// W64: v_cmp_gt_i16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x68,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc, v127.l, v2.l
+// W64: v_cmp_gt_i16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x68,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc, s1, v2.l
+// W64: v_cmp_gt_i16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x68,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc, s105, v2.l
+// W64: v_cmp_gt_i16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x68,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc, vcc_lo, v2.l
+// W64: v_cmp_gt_i16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x68,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc, vcc_hi, v2.l
+// W64: v_cmp_gt_i16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x68,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc, ttmp15, v2.l
+// W64: v_cmp_gt_i16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x68,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc, v127, v2
-// W64: v_cmp_gt_i16_e32 vcc, v127, v2          ; encoding: [0x7f,0x05,0x68,0x7c]
+v_cmp_gt_i16 vcc, m0, v2.l
+// W64: v_cmp_gt_i16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x68,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc, s1, v2
-// W64: v_cmp_gt_i16_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x68,0x7c]
+v_cmp_gt_i16 vcc, exec_lo, v2.l
+// W64: v_cmp_gt_i16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x68,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc, s105, v2
-// W64: v_cmp_gt_i16_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x68,0x7c]
+v_cmp_gt_i16 vcc, exec_hi, v2.l
+// W64: v_cmp_gt_i16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x68,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc, vcc_lo, v2
-// W64: v_cmp_gt_i16_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x68,0x7c]
+v_cmp_gt_i16 vcc, null, v2.l
+// W64: v_cmp_gt_i16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x68,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc, vcc_hi, v2
-// W64: v_cmp_gt_i16_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x68,0x7c]
+v_cmp_gt_i16 vcc, -1, v2.l
+// W64: v_cmp_gt_i16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x68,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc, ttmp15, v2
-// W64: v_cmp_gt_i16_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x68,0x7c]
+v_cmp_gt_i16 vcc, 0.5, v2.l
+// W64: v_cmp_gt_i16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x68,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc, m0, v2
-// W64: v_cmp_gt_i16_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x68,0x7c]
+v_cmp_gt_i16 vcc, src_scc, v2.l
+// W64: v_cmp_gt_i16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x68,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc, exec_lo, v2
-// W64: v_cmp_gt_i16_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x68,0x7c]
+v_cmp_gt_i16 vcc, 0xfe0b, v127.l
+// W64: v_cmp_gt_i16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x68,0x7c,0x0b,0xfe,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc, exec_hi, v2
-// W64: v_cmp_gt_i16_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x68,0x7c]
+v_cmp_gt_i16 vcc_lo, v1.h, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x68,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc, v1.h, v2.l
+// W64: v_cmp_gt_i16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x68,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc, null, v2
-// W64: v_cmp_gt_i16_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x68,0x7c]
+v_cmp_gt_i16 vcc_lo, v127.h, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x68,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc, v127.h, v2.l
+// W64: v_cmp_gt_i16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x68,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc, -1, v2
-// W64: v_cmp_gt_i16_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x68,0x7c]
+v_cmp_gt_i16 vcc_lo, 0.5, v127.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, 0.5, v127.l    ; encoding: [0xf0,0xfe,0x68,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc, 0.5, v127.l
+// W64: v_cmp_gt_i16_e32 vcc, 0.5, v127.l       ; encoding: [0xf0,0xfe,0x68,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc, 0.5, v2
-// W64: v_cmp_gt_i16_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x68,0x7c]
+v_cmp_gt_i16 vcc_lo, 0x3800, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x68,0x7c,0x00,0x38,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc, 0x3800, v2.l
+// W64: v_cmp_gt_i16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x68,0x7c,0x00,0x38,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc, src_scc, v2
-// W64: v_cmp_gt_i16_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x68,0x7c]
+v_cmp_gt_i16 vcc_lo, src_scc, v2.h
+// W32: v_cmp_gt_i16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x69,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc, src_scc, v2.h
+// W64: v_cmp_gt_i16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x69,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc, 0xfe0b, v127
-// W64: v_cmp_gt_i16_e32 vcc, 0xfe0b, v127      ; encoding: [0xff,0xfe,0x68,0x7c,0x0b,0xfe,0x00,0x00]
+v_cmp_gt_i16 vcc_lo, 0xfe0b, v127.h
+// W32: v_cmp_gt_i16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x69,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc, 0xfe0b, v127.h
+// W64: v_cmp_gt_i16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x69,0x7c,0x0b,0xfe,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
 v_cmp_gt_i32 vcc_lo, v1, v2
@@ -3796,124 +4036,172 @@ v_cmp_gt_i64 vcc, 0xaf123456, v[254:255]
 // W64: v_cmp_gt_i64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xa9,0x7c,0x56,0x34,0x12,0xaf]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc_lo, v1, v2
-// W32: v_cmp_gt_u16_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x78,0x7c]
+v_cmp_gt_u16 vcc_lo, v1.l, v2.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x78,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc_lo, v127, v2
-// W32: v_cmp_gt_u16_e32 vcc_lo, v127, v2       ; encoding: [0x7f,0x05,0x78,0x7c]
+v_cmp_gt_u16 vcc_lo, v127.l, v2.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x78,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc_lo, s1, v2
-// W32: v_cmp_gt_u16_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x78,0x7c]
+v_cmp_gt_u16 vcc_lo, s1, v2.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x78,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc_lo, s105, v2
-// W32: v_cmp_gt_u16_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x78,0x7c]
+v_cmp_gt_u16 vcc_lo, s105, v2.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x78,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc_lo, vcc_lo, v2
-// W32: v_cmp_gt_u16_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x78,0x7c]
+v_cmp_gt_u16 vcc_lo, vcc_lo, v2.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x78,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc_lo, vcc_hi, v2
-// W32: v_cmp_gt_u16_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x78,0x7c]
+v_cmp_gt_u16 vcc_lo, vcc_hi, v2.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x78,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc_lo, ttmp15, v2
-// W32: v_cmp_gt_u16_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x78,0x7c]
+v_cmp_gt_u16 vcc_lo, ttmp15, v2.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x78,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc_lo, m0, v2
-// W32: v_cmp_gt_u16_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x78,0x7c]
+v_cmp_gt_u16 vcc_lo, m0, v2.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x78,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc_lo, exec_lo, v2
-// W32: v_cmp_gt_u16_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x78,0x7c]
+v_cmp_gt_u16 vcc_lo, exec_lo, v2.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x78,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc_lo, exec_hi, v2
-// W32: v_cmp_gt_u16_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x78,0x7c]
+v_cmp_gt_u16 vcc_lo, exec_hi, v2.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x78,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc_lo, null, v2
-// W32: v_cmp_gt_u16_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x78,0x7c]
+v_cmp_gt_u16 vcc_lo, null, v2.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x78,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc_lo, -1, v2
-// W32: v_cmp_gt_u16_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x78,0x7c]
+v_cmp_gt_u16 vcc_lo, -1, v2.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x78,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc_lo, 0.5, v2
-// W32: v_cmp_gt_u16_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x78,0x7c]
+v_cmp_gt_u16 vcc_lo, 0.5, v2.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x78,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc_lo, src_scc, v2
-// W32: v_cmp_gt_u16_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x78,0x7c]
+v_cmp_gt_u16 vcc_lo, src_scc, v2.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x78,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc_lo, 0xfe0b, v127
-// W32: v_cmp_gt_u16_e32 vcc_lo, 0xfe0b, v127   ; encoding: [0xff,0xfe,0x78,0x7c,0x0b,0xfe,0x00,0x00]
+v_cmp_gt_u16 vcc_lo, 0xfe0b, v127.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x78,0x7c,0x0b,0xfe,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc, v1, v2
-// W64: v_cmp_gt_u16_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x78,0x7c]
+v_cmp_gt_u16 vcc, v1.l, v2.l
+// W64: v_cmp_gt_u16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x78,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc, v127.l, v2.l
+// W64: v_cmp_gt_u16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x78,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc, s1, v2.l
+// W64: v_cmp_gt_u16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x78,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc, s105, v2.l
+// W64: v_cmp_gt_u16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x78,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc, v127, v2
-// W64: v_cmp_gt_u16_e32 vcc, v127, v2          ; encoding: [0x7f,0x05,0x78,0x7c]
+v_cmp_gt_u16 vcc, vcc_lo, v2.l
+// W64: v_cmp_gt_u16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x78,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc, s1, v2
-// W64: v_cmp_gt_u16_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x78,0x7c]
+v_cmp_gt_u16 vcc, vcc_hi, v2.l
+// W64: v_cmp_gt_u16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x78,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc, s105, v2
-// W64: v_cmp_gt_u16_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x78,0x7c]
+v_cmp_gt_u16 vcc, ttmp15, v2.l
+// W64: v_cmp_gt_u16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x78,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc, vcc_lo, v2
-// W64: v_cmp_gt_u16_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x78,0x7c]
+v_cmp_gt_u16 vcc, m0, v2.l
+// W64: v_cmp_gt_u16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x78,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc, vcc_hi, v2
-// W64: v_cmp_gt_u16_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x78,0x7c]
+v_cmp_gt_u16 vcc, exec_lo, v2.l
+// W64: v_cmp_gt_u16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x78,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc, ttmp15, v2
-// W64: v_cmp_gt_u16_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x78,0x7c]
+v_cmp_gt_u16 vcc, exec_hi, v2.l
+// W64: v_cmp_gt_u16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x78,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc, m0, v2
-// W64: v_cmp_gt_u16_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x78,0x7c]
+v_cmp_gt_u16 vcc, null, v2.l
+// W64: v_cmp_gt_u16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x78,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc, exec_lo, v2
-// W64: v_cmp_gt_u16_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x78,0x7c]
+v_cmp_gt_u16 vcc, -1, v2.l
+// W64: v_cmp_gt_u16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x78,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc, exec_hi, v2
-// W64: v_cmp_gt_u16_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x78,0x7c]
+v_cmp_gt_u16 vcc, 0.5, v2.l
+// W64: v_cmp_gt_u16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x78,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc, null, v2
-// W64: v_cmp_gt_u16_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x78,0x7c]
+v_cmp_gt_u16 vcc, src_scc, v2.l
+// W64: v_cmp_gt_u16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x78,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc, -1, v2
-// W64: v_cmp_gt_u16_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x78,0x7c]
+v_cmp_gt_u16 vcc, 0xfe0b, v127.l
+// W64: v_cmp_gt_u16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x78,0x7c,0x0b,0xfe,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc, 0.5, v2
-// W64: v_cmp_gt_u16_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x78,0x7c]
+v_cmp_gt_u16 vcc_lo, v1.h, v2.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x78,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc, v1.h, v2.l
+// W64: v_cmp_gt_u16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x78,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc_lo, v127.h, v2.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x78,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc, v127.h, v2.l
+// W64: v_cmp_gt_u16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x78,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc_lo, 0.5, v127.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, 0.5, v127.l    ; encoding: [0xf0,0xfe,0x78,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc, 0.5, v127.l
+// W64: v_cmp_gt_u16_e32 vcc, 0.5, v127.l       ; encoding: [0xf0,0xfe,0x78,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc, src_scc, v2
-// W64: v_cmp_gt_u16_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x78,0x7c]
+v_cmp_gt_u16 vcc_lo, 0x3800, v2.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x78,0x7c,0x00,0x38,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc, 0x3800, v2.l
+// W64: v_cmp_gt_u16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x78,0x7c,0x00,0x38,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc, 0xfe0b, v127
-// W64: v_cmp_gt_u16_e32 vcc, 0xfe0b, v127      ; encoding: [0xff,0xfe,0x78,0x7c,0x0b,0xfe,0x00,0x00]
+v_cmp_gt_u16 vcc_lo, src_scc, v2.h
+// W32: v_cmp_gt_u16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x79,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc, src_scc, v2.h
+// W64: v_cmp_gt_u16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x79,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc_lo, 0xfe0b, v127.h
+// W32: v_cmp_gt_u16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x79,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc, 0xfe0b, v127.h
+// W64: v_cmp_gt_u16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x79,0x7c,0x0b,0xfe,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
 v_cmp_gt_u32 vcc_lo, v1, v2
@@ -4468,124 +4756,172 @@ v_cmp_le_f64 vcc, 0xaf123456, v[254:255]
 // W64: v_cmp_le_f64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x47,0x7c,0x56,0x34,0x12,0xaf]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc_lo, v1, v2
-// W32: v_cmp_le_i16_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x66,0x7c]
+v_cmp_le_i16 vcc_lo, v1.l, v2.l
+// W32: v_cmp_le_i16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x66,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc_lo, v127, v2
-// W32: v_cmp_le_i16_e32 vcc_lo, v127, v2       ; encoding: [0x7f,0x05,0x66,0x7c]
+v_cmp_le_i16 vcc_lo, v127.l, v2.l
+// W32: v_cmp_le_i16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x66,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc_lo, s1, v2
-// W32: v_cmp_le_i16_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x66,0x7c]
+v_cmp_le_i16 vcc_lo, s1, v2.l
+// W32: v_cmp_le_i16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x66,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc_lo, s105, v2
-// W32: v_cmp_le_i16_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x66,0x7c]
+v_cmp_le_i16 vcc_lo, s105, v2.l
+// W32: v_cmp_le_i16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x66,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc_lo, vcc_lo, v2
-// W32: v_cmp_le_i16_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x66,0x7c]
+v_cmp_le_i16 vcc_lo, vcc_lo, v2.l
+// W32: v_cmp_le_i16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x66,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc_lo, vcc_hi, v2
-// W32: v_cmp_le_i16_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x66,0x7c]
+v_cmp_le_i16 vcc_lo, vcc_hi, v2.l
+// W32: v_cmp_le_i16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x66,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc_lo, ttmp15, v2
-// W32: v_cmp_le_i16_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x66,0x7c]
+v_cmp_le_i16 vcc_lo, ttmp15, v2.l
+// W32: v_cmp_le_i16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x66,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc_lo, m0, v2
-// W32: v_cmp_le_i16_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x66,0x7c]
+v_cmp_le_i16 vcc_lo, m0, v2.l
+// W32: v_cmp_le_i16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x66,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc_lo, exec_lo, v2
-// W32: v_cmp_le_i16_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x66,0x7c]
+v_cmp_le_i16 vcc_lo, exec_lo, v2.l
+// W32: v_cmp_le_i16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x66,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc_lo, exec_hi, v2
-// W32: v_cmp_le_i16_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x66,0x7c]
+v_cmp_le_i16 vcc_lo, exec_hi, v2.l
+// W32: v_cmp_le_i16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x66,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc_lo, null, v2
-// W32: v_cmp_le_i16_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x66,0x7c]
+v_cmp_le_i16 vcc_lo, null, v2.l
+// W32: v_cmp_le_i16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x66,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc_lo, -1, v2
-// W32: v_cmp_le_i16_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x66,0x7c]
+v_cmp_le_i16 vcc_lo, -1, v2.l
+// W32: v_cmp_le_i16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x66,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc_lo, 0.5, v2
-// W32: v_cmp_le_i16_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x66,0x7c]
+v_cmp_le_i16 vcc_lo, 0.5, v2.l
+// W32: v_cmp_le_i16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x66,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc_lo, src_scc, v2
-// W32: v_cmp_le_i16_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x66,0x7c]
+v_cmp_le_i16 vcc_lo, src_scc, v2.l
+// W32: v_cmp_le_i16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x66,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc_lo, 0xfe0b, v127
-// W32: v_cmp_le_i16_e32 vcc_lo, 0xfe0b, v127   ; encoding: [0xff,0xfe,0x66,0x7c,0x0b,0xfe,0x00,0x00]
+v_cmp_le_i16 vcc_lo, 0xfe0b, v127.l
+// W32: v_cmp_le_i16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x66,0x7c,0x0b,0xfe,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc, v1, v2
-// W64: v_cmp_le_i16_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x66,0x7c]
+v_cmp_le_i16 vcc, v1.l, v2.l
+// W64: v_cmp_le_i16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x66,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc, v127, v2
-// W64: v_cmp_le_i16_e32 vcc, v127, v2          ; encoding: [0x7f,0x05,0x66,0x7c]
+v_cmp_le_i16 vcc, v127.l, v2.l
+// W64: v_cmp_le_i16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x66,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc, s1, v2
-// W64: v_cmp_le_i16_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x66,0x7c]
+v_cmp_le_i16 vcc, s1, v2.l
+// W64: v_cmp_le_i16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x66,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc, s105, v2
-// W64: v_cmp_le_i16_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x66,0x7c]
+v_cmp_le_i16 vcc, s105, v2.l
+// W64: v_cmp_le_i16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x66,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc, vcc_lo, v2
-// W64: v_cmp_le_i16_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x66,0x7c]
+v_cmp_le_i16 vcc, vcc_lo, v2.l
+// W64: v_cmp_le_i16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x66,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc, vcc_hi, v2
-// W64: v_cmp_le_i16_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x66,0x7c]
+v_cmp_le_i16 vcc, vcc_hi, v2.l
+// W64: v_cmp_le_i16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x66,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc, ttmp15, v2
-// W64: v_cmp_le_i16_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x66,0x7c]
+v_cmp_le_i16 vcc, ttmp15, v2.l
+// W64: v_cmp_le_i16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x66,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc, m0, v2
-// W64: v_cmp_le_i16_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x66,0x7c]
+v_cmp_le_i16 vcc, m0, v2.l
+// W64: v_cmp_le_i16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x66,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc, exec_lo, v2
-// W64: v_cmp_le_i16_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x66,0x7c]
+v_cmp_le_i16 vcc, exec_lo, v2.l
+// W64: v_cmp_le_i16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x66,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc, exec_hi, v2
-// W64: v_cmp_le_i16_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x66,0x7c]
+v_cmp_le_i16 vcc, exec_hi, v2.l
+// W64: v_cmp_le_i16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x66,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc, null, v2
-// W64: v_cmp_le_i16_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x66,0x7c]
+v_cmp_le_i16 vcc, null, v2.l
+// W64: v_cmp_le_i16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x66,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc, -1, v2
-// W64: v_cmp_le_i16_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x66,0x7c]
+v_cmp_le_i16 vcc, -1, v2.l
+// W64: v_cmp_le_i16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x66,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc, 0.5, v2
-// W64: v_cmp_le_i16_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x66,0x7c]
+v_cmp_le_i16 vcc, 0.5, v2.l
+// W64: v_cmp_le_i16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x66,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc, src_scc, v2
-// W64: v_cmp_le_i16_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x66,0x7c]
+v_cmp_le_i16 vcc, src_scc, v2.l
+// W64: v_cmp_le_i16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x66,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc, 0xfe0b, v127
-// W64: v_cmp_le_i16_e32 vcc, 0xfe0b, v127      ; encoding: [0xff,0xfe,0x66,0x7c,0x0b,0xfe,0x00,0x00]
+v_cmp_le_i16 vcc, 0xfe0b, v127.l
+// W64: v_cmp_le_i16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x66,0x7c,0x0b,0xfe,0x00,0x00]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc_lo, v1.h, v2.l
+// W32: v_cmp_le_i16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x66,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc, v1.h, v2.l
+// W64: v_cmp_le_i16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x66,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc_lo, v127.h, v2.l
+// W32: v_cmp_le_i16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x66,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc, v127.h, v2.l
+// W64: v_cmp_le_i16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x66,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc_lo, 0.5, v127.l
+// W32: v_cmp_le_i16_e32 vcc_lo, 0.5, v127.l    ; encoding: [0xf0,0xfe,0x66,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc, 0.5, v127.l
+// W64: v_cmp_le_i16_e32 vcc, 0.5, v127.l       ; encoding: [0xf0,0xfe,0x66,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc_lo, 0x3800, v2.l
+// W32: v_cmp_le_i16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x66,0x7c,0x00,0x38,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc, 0x3800, v2.l
+// W64: v_cmp_le_i16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x66,0x7c,0x00,0x38,0x00,0x00]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc_lo, src_scc, v2.h
+// W32: v_cmp_le_i16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x67,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc, src_scc, v2.h
+// W64: v_cmp_le_i16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x67,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc_lo, 0xfe0b, v127.h
+// W32: v_cmp_le_i16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x67,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc, 0xfe0b, v127.h
+// W64: v_cmp_le_i16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x67,0x7c,0x0b,0xfe,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
 v_cmp_le_i32 vcc_lo, v1, v2
@@ -4804,124 +5140,172 @@ v_cmp_le_i64 vcc, 0xaf123456, v[254:255]
 // W64: v_cmp_le_i64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xa7,0x7c,0x56,0x34,0x12,0xaf]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc_lo, v1, v2
-// W32: v_cmp_le_u16_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x76,0x7c]
+v_cmp_le_u16 vcc_lo, v1.l, v2.l
+// W32: v_cmp_le_u16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x76,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc_lo, v127, v2
-// W32: v_cmp_le_u16_e32 vcc_lo, v127, v2       ; encoding: [0x7f,0x05,0x76,0x7c]
+v_cmp_le_u16 vcc_lo, v127.l, v2.l
+// W32: v_cmp_le_u16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x76,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc_lo, s1, v2
-// W32: v_cmp_le_u16_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x76,0x7c]
+v_cmp_le_u16 vcc_lo, s1, v2.l
+// W32: v_cmp_le_u16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x76,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc_lo, s105, v2
-// W32: v_cmp_le_u16_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x76,0x7c]
+v_cmp_le_u16 vcc_lo, s105, v2.l
+// W32: v_cmp_le_u16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x76,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc_lo, vcc_lo, v2
-// W32: v_cmp_le_u16_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x76,0x7c]
+v_cmp_le_u16 vcc_lo, vcc_lo, v2.l
+// W32: v_cmp_le_u16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x76,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc_lo, vcc_hi, v2
-// W32: v_cmp_le_u16_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x76,0x7c]
+v_cmp_le_u16 vcc_lo, vcc_hi, v2.l
+// W32: v_cmp_le_u16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x76,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc_lo, ttmp15, v2
-// W32: v_cmp_le_u16_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x76,0x7c]
+v_cmp_le_u16 vcc_lo, ttmp15, v2.l
+// W32: v_cmp_le_u16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x76,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc_lo, m0, v2
-// W32: v_cmp_le_u16_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x76,0x7c]
+v_cmp_le_u16 vcc_lo, m0, v2.l
+// W32: v_cmp_le_u16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x76,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc_lo, exec_lo, v2
-// W32: v_cmp_le_u16_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x76,0x7c]
+v_cmp_le_u16 vcc_lo, exec_lo, v2.l
+// W32: v_cmp_le_u16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x76,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc_lo, exec_hi, v2
-// W32: v_cmp_le_u16_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x76,0x7c]
+v_cmp_le_u16 vcc_lo, exec_hi, v2.l
+// W32: v_cmp_le_u16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x76,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc_lo, null, v2
-// W32: v_cmp_le_u16_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x76,0x7c]
+v_cmp_le_u16 vcc_lo, null, v2.l
+// W32: v_cmp_le_u16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x76,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc_lo, -1, v2
-// W32: v_cmp_le_u16_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x76,0x7c]
+v_cmp_le_u16 vcc_lo, -1, v2.l
+// W32: v_cmp_le_u16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x76,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc_lo, 0.5, v2
-// W32: v_cmp_le_u16_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x76,0x7c]
+v_cmp_le_u16 vcc_lo, 0.5, v2.l
+// W32: v_cmp_le_u16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x76,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc_lo, src_scc, v2
-// W32: v_cmp_le_u16_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x76,0x7c]
+v_cmp_le_u16 vcc_lo, src_scc, v2.l
+// W32: v_cmp_le_u16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x76,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc_lo, 0xfe0b, v127
-// W32: v_cmp_le_u16_e32 vcc_lo, 0xfe0b, v127   ; encoding: [0xff,0xfe,0x76,0x7c,0x0b,0xfe,0x00,0x00]
+v_cmp_le_u16 vcc_lo, 0xfe0b, v127.l
+// W32: v_cmp_le_u16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x76,0x7c,0x0b,0xfe,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc, v1, v2
-// W64: v_cmp_le_u16_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x76,0x7c]
+v_cmp_le_u16 vcc, v1.l, v2.l
+// W64: v_cmp_le_u16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x76,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc, v127.l, v2.l
+// W64: v_cmp_le_u16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x76,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc, s1, v2.l
+// W64: v_cmp_le_u16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x76,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc, s105, v2.l
+// W64: v_cmp_le_u16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x76,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc, vcc_lo, v2.l
+// W64: v_cmp_le_u16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x76,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc, vcc_hi, v2.l
+// W64: v_cmp_le_u16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x76,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc, ttmp15, v2.l
+// W64: v_cmp_le_u16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x76,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc, v127, v2
-// W64: v_cmp_le_u16_e32 vcc, v127, v2          ; encoding: [0x7f,0x05,0x76,0x7c]
+v_cmp_le_u16 vcc, m0, v2.l
+// W64: v_cmp_le_u16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x76,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc, s1, v2
-// W64: v_cmp_le_u16_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x76,0x7c]
+v_cmp_le_u16 vcc, exec_lo, v2.l
+// W64: v_cmp_le_u16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x76,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc, s105, v2
-// W64: v_cmp_le_u16_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x76,0x7c]
+v_cmp_le_u16 vcc, exec_hi, v2.l
+// W64: v_cmp_le_u16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x76,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc, vcc_lo, v2
-// W64: v_cmp_le_u16_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x76,0x7c]
+v_cmp_le_u16 vcc, null, v2.l
+// W64: v_cmp_le_u16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x76,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc, vcc_hi, v2
-// W64: v_cmp_le_u16_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x76,0x7c]
+v_cmp_le_u16 vcc, -1, v2.l
+// W64: v_cmp_le_u16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x76,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc, ttmp15, v2
-// W64: v_cmp_le_u16_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x76,0x7c]
+v_cmp_le_u16 vcc, 0.5, v2.l
+// W64: v_cmp_le_u16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x76,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc, m0, v2
-// W64: v_cmp_le_u16_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x76,0x7c]
+v_cmp_le_u16 vcc, src_scc, v2.l
+// W64: v_cmp_le_u16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x76,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc, exec_lo, v2
-// W64: v_cmp_le_u16_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x76,0x7c]
+v_cmp_le_u16 vcc, 0xfe0b, v127.l
+// W64: v_cmp_le_u16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x76,0x7c,0x0b,0xfe,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc, exec_hi, v2
-// W64: v_cmp_le_u16_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x76,0x7c]
+v_cmp_le_u16 vcc_lo, v1.h, v2.l
+// W32: v_cmp_le_u16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x76,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc, v1.h, v2.l
+// W64: v_cmp_le_u16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x76,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc, null, v2
-// W64: v_cmp_le_u16_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x76,0x7c]
+v_cmp_le_u16 vcc_lo, v127.h, v2.l
+// W32: v_cmp_le_u16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x76,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc, v127.h, v2.l
+// W64: v_cmp_le_u16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x76,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc, -1, v2
-// W64: v_cmp_le_u16_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x76,0x7c]
+v_cmp_le_u16 vcc_lo, 0.5, v127.l
+// W32: v_cmp_le_u16_e32 vcc_lo, 0.5, v127.l    ; encoding: [0xf0,0xfe,0x76,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc, 0.5, v127.l
+// W64: v_cmp_le_u16_e32 vcc, 0.5, v127.l       ; encoding: [0xf0,0xfe,0x76,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc, 0.5, v2
-// W64: v_cmp_le_u16_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x76,0x7c]
+v_cmp_le_u16 vcc_lo, 0x3800, v2.l
+// W32: v_cmp_le_u16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x76,0x7c,0x00,0x38,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc, 0x3800, v2.l
+// W64: v_cmp_le_u16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x76,0x7c,0x00,0x38,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc, src_scc, v2
-// W64: v_cmp_le_u16_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x76,0x7c]
+v_cmp_le_u16 vcc_lo, src_scc, v2.h
+// W32: v_cmp_le_u16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x77,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc, src_scc, v2.h
+// W64: v_cmp_le_u16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x77,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc, 0xfe0b, v127
-// W64: v_cmp_le_u16_e32 vcc, 0xfe0b, v127      ; encoding: [0xff,0xfe,0x76,0x7c,0x0b,0xfe,0x00,0x00]
+v_cmp_le_u16 vcc_lo, 0xfe0b, v127.h
+// W32: v_cmp_le_u16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x77,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc, 0xfe0b, v127.h
+// W64: v_cmp_le_u16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x77,0x7c,0x0b,0xfe,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
 v_cmp_le_u32 vcc_lo, v1, v2
@@ -5852,124 +6236,172 @@ v_cmp_lt_f64 vcc, 0xaf123456, v[254:255]
 // W64: v_cmp_lt_f64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x43,0x7c,0x56,0x34,0x12,0xaf]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc_lo, v1, v2
-// W32: v_cmp_lt_i16_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x62,0x7c]
+v_cmp_lt_i16 vcc_lo, v1.l, v2.l
+// W32: v_cmp_lt_i16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x62,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc_lo, v127, v2
-// W32: v_cmp_lt_i16_e32 vcc_lo, v127, v2       ; encoding: [0x7f,0x05,0x62,0x7c]
+v_cmp_lt_i16 vcc_lo, v127.l, v2.l
+// W32: v_cmp_lt_i16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x62,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc_lo, s1, v2
-// W32: v_cmp_lt_i16_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x62,0x7c]
+v_cmp_lt_i16 vcc_lo, s1, v2.l
+// W32: v_cmp_lt_i16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x62,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc_lo, s105, v2
-// W32: v_cmp_lt_i16_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x62,0x7c]
+v_cmp_lt_i16 vcc_lo, s105, v2.l
+// W32: v_cmp_lt_i16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x62,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc_lo, vcc_lo, v2
-// W32: v_cmp_lt_i16_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x62,0x7c]
+v_cmp_lt_i16 vcc_lo, vcc_lo, v2.l
+// W32: v_cmp_lt_i16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x62,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc_lo, vcc_hi, v2
-// W32: v_cmp_lt_i16_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x62,0x7c]
+v_cmp_lt_i16 vcc_lo, vcc_hi, v2.l
+// W32: v_cmp_lt_i16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x62,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc_lo, ttmp15, v2
-// W32: v_cmp_lt_i16_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x62,0x7c]
+v_cmp_lt_i16 vcc_lo, ttmp15, v2.l
+// W32: v_cmp_lt_i16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x62,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc_lo, m0, v2
-// W32: v_cmp_lt_i16_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x62,0x7c]
+v_cmp_lt_i16 vcc_lo, m0, v2.l
+// W32: v_cmp_lt_i16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x62,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc_lo, exec_lo, v2
-// W32: v_cmp_lt_i16_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x62,0x7c]
+v_cmp_lt_i16 vcc_lo, exec_lo, v2.l
+// W32: v_cmp_lt_i16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x62,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc_lo, exec_hi, v2
-// W32: v_cmp_lt_i16_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x62,0x7c]
+v_cmp_lt_i16 vcc_lo, exec_hi, v2.l
+// W32: v_cmp_lt_i16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x62,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc_lo, null, v2
-// W32: v_cmp_lt_i16_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x62,0x7c]
+v_cmp_lt_i16 vcc_lo, null, v2.l
+// W32: v_cmp_lt_i16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x62,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc_lo, -1, v2
-// W32: v_cmp_lt_i16_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x62,0x7c]
+v_cmp_lt_i16 vcc_lo, -1, v2.l
+// W32: v_cmp_lt_i16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x62,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc_lo, 0.5, v2
-// W32: v_cmp_lt_i16_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x62,0x7c]
+v_cmp_lt_i16 vcc_lo, 0.5, v2.l
+// W32: v_cmp_lt_i16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x62,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc_lo, src_scc, v2
-// W32: v_cmp_lt_i16_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x62,0x7c]
+v_cmp_lt_i16 vcc_lo, src_scc, v2.l
+// W32: v_cmp_lt_i16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x62,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc_lo, 0xfe0b, v127
-// W32: v_cmp_lt_i16_e32 vcc_lo, 0xfe0b, v127   ; encoding: [0xff,0xfe,0x62,0x7c,0x0b,0xfe,0x00,0x00]
+v_cmp_lt_i16 vcc_lo, 0xfe0b, v127.l
+// W32: v_cmp_lt_i16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x62,0x7c,0x0b,0xfe,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc, v1, v2
-// W64: v_cmp_lt_i16_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x62,0x7c]
+v_cmp_lt_i16 vcc, v1.l, v2.l
+// W64: v_cmp_lt_i16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x62,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc, v127.l, v2.l
+// W64: v_cmp_lt_i16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x62,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc, s1, v2.l
+// W64: v_cmp_lt_i16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x62,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc, s105, v2.l
+// W64: v_cmp_lt_i16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x62,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc, v127, v2
-// W64: v_cmp_lt_i16_e32 vcc, v127, v2          ; encoding: [0x7f,0x05,0x62,0x7c]
+v_cmp_lt_i16 vcc, vcc_lo, v2.l
+// W64: v_cmp_lt_i16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x62,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc, s1, v2
-// W64: v_cmp_lt_i16_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x62,0x7c]
+v_cmp_lt_i16 vcc, vcc_hi, v2.l
+// W64: v_cmp_lt_i16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x62,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc, s105, v2
-// W64: v_cmp_lt_i16_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x62,0x7c]
+v_cmp_lt_i16 vcc, ttmp15, v2.l
+// W64: v_cmp_lt_i16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x62,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc, vcc_lo, v2
-// W64: v_cmp_lt_i16_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x62,0x7c]
+v_cmp_lt_i16 vcc, m0, v2.l
+// W64: v_cmp_lt_i16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x62,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc, vcc_hi, v2
-// W64: v_cmp_lt_i16_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x62,0x7c]
+v_cmp_lt_i16 vcc, exec_lo, v2.l
+// W64: v_cmp_lt_i16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x62,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc, ttmp15, v2
-// W64: v_cmp_lt_i16_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x62,0x7c]
+v_cmp_lt_i16 vcc, exec_hi, v2.l
+// W64: v_cmp_lt_i16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x62,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc, m0, v2
-// W64: v_cmp_lt_i16_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x62,0x7c]
+v_cmp_lt_i16 vcc, null, v2.l
+// W64: v_cmp_lt_i16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x62,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc, exec_lo, v2
-// W64: v_cmp_lt_i16_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x62,0x7c]
+v_cmp_lt_i16 vcc, -1, v2.l
+// W64: v_cmp_lt_i16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x62,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc, exec_hi, v2
-// W64: v_cmp_lt_i16_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x62,0x7c]
+v_cmp_lt_i16 vcc, 0.5, v2.l
+// W64: v_cmp_lt_i16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x62,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc, null, v2
-// W64: v_cmp_lt_i16_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x62,0x7c]
+v_cmp_lt_i16 vcc, src_scc, v2.l
+// W64: v_cmp_lt_i16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x62,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc, -1, v2
-// W64: v_cmp_lt_i16_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x62,0x7c]
+v_cmp_lt_i16 vcc, 0xfe0b, v127.l
+// W64: v_cmp_lt_i16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x62,0x7c,0x0b,0xfe,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc, 0.5, v2
-// W64: v_cmp_lt_i16_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x62,0x7c]
+v_cmp_lt_i16 vcc_lo, v1.h, v2.l
+// W32: v_cmp_lt_i16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x62,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc, v1.h, v2.l
+// W64: v_cmp_lt_i16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x62,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc_lo, v127.h, v2.l
+// W32: v_cmp_lt_i16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x62,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc, v127.h, v2.l
+// W64: v_cmp_lt_i16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x62,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc_lo, 0.5, v127.l
+// W32: v_cmp_lt_i16_e32 vcc_lo, 0.5, v127.l    ; encoding: [0xf0,0xfe,0x62,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc, 0.5, v127.l
+// W64: v_cmp_lt_i16_e32 vcc, 0.5, v127.l       ; encoding: [0xf0,0xfe,0x62,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc, src_scc, v2
-// W64: v_cmp_lt_i16_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x62,0x7c]
+v_cmp_lt_i16 vcc_lo, 0x3800, v2.l
+// W32: v_cmp_lt_i16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x62,0x7c,0x00,0x38,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc, 0x3800, v2.l
+// W64: v_cmp_lt_i16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x62,0x7c,0x00,0x38,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc, 0xfe0b, v127
-// W64: v_cmp_lt_i16_e32 vcc, 0xfe0b, v127      ; encoding: [0xff,0xfe,0x62,0x7c,0x0b,0xfe,0x00,0x00]
+v_cmp_lt_i16 vcc_lo, src_scc, v2.h
+// W32: v_cmp_lt_i16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x63,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc, src_scc, v2.h
+// W64: v_cmp_lt_i16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x63,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc_lo, 0xfe0b, v127.h
+// W32: v_cmp_lt_i16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x63,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc, 0xfe0b, v127.h
+// W64: v_cmp_lt_i16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x63,0x7c,0x0b,0xfe,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
 v_cmp_lt_i32 vcc_lo, v1, v2
@@ -6188,124 +6620,172 @@ v_cmp_lt_i64 vcc, 0xaf123456, v[254:255]
 // W64: v_cmp_lt_i64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xa3,0x7c,0x56,0x34,0x12,0xaf]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc_lo, v1, v2
-// W32: v_cmp_lt_u16_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x72,0x7c]
+v_cmp_lt_u16 vcc_lo, v1.l, v2.l
+// W32: v_cmp_lt_u16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x72,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc_lo, v127, v2
-// W32: v_cmp_lt_u16_e32 vcc_lo, v127, v2       ; encoding: [0x7f,0x05,0x72,0x7c]
+v_cmp_lt_u16 vcc_lo, v127.l, v2.l
+// W32: v_cmp_lt_u16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x72,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc_lo, s1, v2
-// W32: v_cmp_lt_u16_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x72,0x7c]
+v_cmp_lt_u16 vcc_lo, s1, v2.l
+// W32: v_cmp_lt_u16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x72,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc_lo, s105, v2
-// W32: v_cmp_lt_u16_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x72,0x7c]
+v_cmp_lt_u16 vcc_lo, s105, v2.l
+// W32: v_cmp_lt_u16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x72,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc_lo, vcc_lo, v2
-// W32: v_cmp_lt_u16_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x72,0x7c]
+v_cmp_lt_u16 vcc_lo, vcc_lo, v2.l
+// W32: v_cmp_lt_u16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x72,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc_lo, vcc_hi, v2
-// W32: v_cmp_lt_u16_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x72,0x7c]
+v_cmp_lt_u16 vcc_lo, vcc_hi, v2.l
+// W32: v_cmp_lt_u16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x72,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc_lo, ttmp15, v2
-// W32: v_cmp_lt_u16_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x72,0x7c]
+v_cmp_lt_u16 vcc_lo, ttmp15, v2.l
+// W32: v_cmp_lt_u16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x72,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc_lo, m0, v2
-// W32: v_cmp_lt_u16_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x72,0x7c]
+v_cmp_lt_u16 vcc_lo, m0, v2.l
+// W32: v_cmp_lt_u16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x72,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc_lo, exec_lo, v2
-// W32: v_cmp_lt_u16_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x72,0x7c]
+v_cmp_lt_u16 vcc_lo, exec_lo, v2.l
+// W32: v_cmp_lt_u16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x72,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc_lo, exec_hi, v2
-// W32: v_cmp_lt_u16_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x72,0x7c]
+v_cmp_lt_u16 vcc_lo, exec_hi, v2.l
+// W32: v_cmp_lt_u16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x72,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc_lo, null, v2
-// W32: v_cmp_lt_u16_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x72,0x7c]
+v_cmp_lt_u16 vcc_lo, null, v2.l
+// W32: v_cmp_lt_u16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x72,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc_lo, -1, v2
-// W32: v_cmp_lt_u16_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x72,0x7c]
+v_cmp_lt_u16 vcc_lo, -1, v2.l
+// W32: v_cmp_lt_u16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x72,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc_lo, 0.5, v2
-// W32: v_cmp_lt_u16_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x72,0x7c]
+v_cmp_lt_u16 vcc_lo, 0.5, v2.l
+// W32: v_cmp_lt_u16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x72,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc_lo, src_scc, v2
-// W32: v_cmp_lt_u16_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x72,0x7c]
+v_cmp_lt_u16 vcc_lo, src_scc, v2.l
+// W32: v_cmp_lt_u16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x72,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc_lo, 0xfe0b, v127
-// W32: v_cmp_lt_u16_e32 vcc_lo, 0xfe0b, v127   ; encoding: [0xff,0xfe,0x72,0x7c,0x0b,0xfe,0x00,0x00]
+v_cmp_lt_u16 vcc_lo, 0xfe0b, v127.l
+// W32: v_cmp_lt_u16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x72,0x7c,0x0b,0xfe,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc, v1, v2
-// W64: v_cmp_lt_u16_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x72,0x7c]
+v_cmp_lt_u16 vcc, v1.l, v2.l
+// W64: v_cmp_lt_u16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x72,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc, v127, v2
-// W64: v_cmp_lt_u16_e32 vcc, v127, v2          ; encoding: [0x7f,0x05,0x72,0x7c]
+v_cmp_lt_u16 vcc, v127.l, v2.l
+// W64: v_cmp_lt_u16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x72,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc, s1, v2
-// W64: v_cmp_lt_u16_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x72,0x7c]
+v_cmp_lt_u16 vcc, s1, v2.l
+// W64: v_cmp_lt_u16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x72,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc, s105, v2
-// W64: v_cmp_lt_u16_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x72,0x7c]
+v_cmp_lt_u16 vcc, s105, v2.l
+// W64: v_cmp_lt_u16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x72,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc, vcc_lo, v2
-// W64: v_cmp_lt_u16_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x72,0x7c]
+v_cmp_lt_u16 vcc, vcc_lo, v2.l
+// W64: v_cmp_lt_u16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x72,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc, vcc_hi, v2
-// W64: v_cmp_lt_u16_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x72,0x7c]
+v_cmp_lt_u16 vcc, vcc_hi, v2.l
+// W64: v_cmp_lt_u16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x72,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc, ttmp15, v2
-// W64: v_cmp_lt_u16_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x72,0x7c]
+v_cmp_lt_u16 vcc, ttmp15, v2.l
+// W64: v_cmp_lt_u16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x72,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc, m0, v2
-// W64: v_cmp_lt_u16_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x72,0x7c]
+v_cmp_lt_u16 vcc, m0, v2.l
+// W64: v_cmp_lt_u16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x72,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc, exec_lo, v2
-// W64: v_cmp_lt_u16_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x72,0x7c]
+v_cmp_lt_u16 vcc, exec_lo, v2.l
+// W64: v_cmp_lt_u16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x72,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc, exec_hi, v2
-// W64: v_cmp_lt_u16_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x72,0x7c]
+v_cmp_lt_u16 vcc, exec_hi, v2.l
+// W64: v_cmp_lt_u16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x72,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc, null, v2
-// W64: v_cmp_lt_u16_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x72,0x7c]
+v_cmp_lt_u16 vcc, null, v2.l
+// W64: v_cmp_lt_u16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x72,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc, -1, v2
-// W64: v_cmp_lt_u16_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x72,0x7c]
+v_cmp_lt_u16 vcc, -1, v2.l
+// W64: v_cmp_lt_u16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x72,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc, 0.5, v2
-// W64: v_cmp_lt_u16_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x72,0x7c]
+v_cmp_lt_u16 vcc, 0.5, v2.l
+// W64: v_cmp_lt_u16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x72,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc, src_scc, v2
-// W64: v_cmp_lt_u16_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x72,0x7c]
+v_cmp_lt_u16 vcc, src_scc, v2.l
+// W64: v_cmp_lt_u16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x72,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc, 0xfe0b, v127
-// W64: v_cmp_lt_u16_e32 vcc, 0xfe0b, v127      ; encoding: [0xff,0xfe,0x72,0x7c,0x0b,0xfe,0x00,0x00]
+v_cmp_lt_u16 vcc, 0xfe0b, v127.l
+// W64: v_cmp_lt_u16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x72,0x7c,0x0b,0xfe,0x00,0x00]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc_lo, v1.h, v2.l
+// W32: v_cmp_lt_u16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x72,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc, v1.h, v2.l
+// W64: v_cmp_lt_u16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x72,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc_lo, v127.h, v2.l
+// W32: v_cmp_lt_u16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x72,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc, v127.h, v2.l
+// W64: v_cmp_lt_u16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x72,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc_lo, 0.5, v127.l
+// W32: v_cmp_lt_u16_e32 vcc_lo, 0.5, v127.l    ; encoding: [0xf0,0xfe,0x72,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc, 0.5, v127.l
+// W64: v_cmp_lt_u16_e32 vcc, 0.5, v127.l       ; encoding: [0xf0,0xfe,0x72,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc_lo, 0x3800, v2.l
+// W32: v_cmp_lt_u16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x72,0x7c,0x00,0x38,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc, 0x3800, v2.l
+// W64: v_cmp_lt_u16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x72,0x7c,0x00,0x38,0x00,0x00]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc_lo, src_scc, v2.h
+// W32: v_cmp_lt_u16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x73,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc, src_scc, v2.h
+// W64: v_cmp_lt_u16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x73,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc_lo, 0xfe0b, v127.h
+// W32: v_cmp_lt_u16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x73,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc, 0xfe0b, v127.h
+// W64: v_cmp_lt_u16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x73,0x7c,0x0b,0xfe,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
 v_cmp_lt_u32 vcc_lo, v1, v2
@@ -6524,124 +7004,172 @@ v_cmp_lt_u64 vcc, 0xaf123456, v[254:255]
 // W64: v_cmp_lt_u64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xb3,0x7c,0x56,0x34,0x12,0xaf]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc_lo, v1, v2
-// W32: v_cmp_ne_i16_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x6a,0x7c]
+v_cmp_ne_i16 vcc_lo, v1.l, v2.l
+// W32: v_cmp_ne_i16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x6a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc_lo, v127, v2
-// W32: v_cmp_ne_i16_e32 vcc_lo, v127, v2       ; encoding: [0x7f,0x05,0x6a,0x7c]
+v_cmp_ne_i16 vcc_lo, v127.l, v2.l
+// W32: v_cmp_ne_i16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x6a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc_lo, s1, v2
-// W32: v_cmp_ne_i16_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x6a,0x7c]
+v_cmp_ne_i16 vcc_lo, s1, v2.l
+// W32: v_cmp_ne_i16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x6a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc_lo, s105, v2
-// W32: v_cmp_ne_i16_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x6a,0x7c]
+v_cmp_ne_i16 vcc_lo, s105, v2.l
+// W32: v_cmp_ne_i16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x6a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc_lo, vcc_lo, v2
-// W32: v_cmp_ne_i16_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x6a,0x7c]
+v_cmp_ne_i16 vcc_lo, vcc_lo, v2.l
+// W32: v_cmp_ne_i16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x6a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc_lo, vcc_hi, v2
-// W32: v_cmp_ne_i16_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x6a,0x7c]
+v_cmp_ne_i16 vcc_lo, vcc_hi, v2.l
+// W32: v_cmp_ne_i16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x6a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc_lo, ttmp15, v2
-// W32: v_cmp_ne_i16_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x6a,0x7c]
+v_cmp_ne_i16 vcc_lo, ttmp15, v2.l
+// W32: v_cmp_ne_i16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x6a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc_lo, m0, v2
-// W32: v_cmp_ne_i16_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x6a,0x7c]
+v_cmp_ne_i16 vcc_lo, m0, v2.l
+// W32: v_cmp_ne_i16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x6a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc_lo, exec_lo, v2
-// W32: v_cmp_ne_i16_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x6a,0x7c]
+v_cmp_ne_i16 vcc_lo, exec_lo, v2.l
+// W32: v_cmp_ne_i16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x6a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc_lo, exec_hi, v2
-// W32: v_cmp_ne_i16_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x6a,0x7c]
+v_cmp_ne_i16 vcc_lo, exec_hi, v2.l
+// W32: v_cmp_ne_i16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x6a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc_lo, null, v2
-// W32: v_cmp_ne_i16_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x6a,0x7c]
+v_cmp_ne_i16 vcc_lo, null, v2.l
+// W32: v_cmp_ne_i16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x6a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc_lo, -1, v2
-// W32: v_cmp_ne_i16_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x6a,0x7c]
+v_cmp_ne_i16 vcc_lo, -1, v2.l
+// W32: v_cmp_ne_i16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x6a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc_lo, 0.5, v2
-// W32: v_cmp_ne_i16_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x6a,0x7c]
+v_cmp_ne_i16 vcc_lo, 0.5, v2.l
+// W32: v_cmp_ne_i16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x6a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc_lo, src_scc, v2
-// W32: v_cmp_ne_i16_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x6a,0x7c]
+v_cmp_ne_i16 vcc_lo, src_scc, v2.l
+// W32: v_cmp_ne_i16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x6a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc_lo, 0xfe0b, v127
-// W32: v_cmp_ne_i16_e32 vcc_lo, 0xfe0b, v127   ; encoding: [0xff,0xfe,0x6a,0x7c,0x0b,0xfe,0x00,0x00]
+v_cmp_ne_i16 vcc_lo, 0xfe0b, v127.l
+// W32: v_cmp_ne_i16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x6a,0x7c,0x0b,0xfe,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc, v1, v2
-// W64: v_cmp_ne_i16_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x6a,0x7c]
+v_cmp_ne_i16 vcc, v1.l, v2.l
+// W64: v_cmp_ne_i16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x6a,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, v127.l, v2.l
+// W64: v_cmp_ne_i16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x6a,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, s1, v2.l
+// W64: v_cmp_ne_i16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x6a,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, s105, v2.l
+// W64: v_cmp_ne_i16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x6a,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, vcc_lo, v2.l
+// W64: v_cmp_ne_i16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x6a,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, vcc_hi, v2.l
+// W64: v_cmp_ne_i16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x6a,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, ttmp15, v2.l
+// W64: v_cmp_ne_i16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x6a,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc, v127, v2
-// W64: v_cmp_ne_i16_e32 vcc, v127, v2          ; encoding: [0x7f,0x05,0x6a,0x7c]
+v_cmp_ne_i16 vcc, m0, v2.l
+// W64: v_cmp_ne_i16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x6a,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc, s1, v2
-// W64: v_cmp_ne_i16_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x6a,0x7c]
+v_cmp_ne_i16 vcc, exec_lo, v2.l
+// W64: v_cmp_ne_i16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x6a,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc, s105, v2
-// W64: v_cmp_ne_i16_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x6a,0x7c]
+v_cmp_ne_i16 vcc, exec_hi, v2.l
+// W64: v_cmp_ne_i16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x6a,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc, vcc_lo, v2
-// W64: v_cmp_ne_i16_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x6a,0x7c]
+v_cmp_ne_i16 vcc, null, v2.l
+// W64: v_cmp_ne_i16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x6a,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc, vcc_hi, v2
-// W64: v_cmp_ne_i16_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x6a,0x7c]
+v_cmp_ne_i16 vcc, -1, v2.l
+// W64: v_cmp_ne_i16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x6a,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc, ttmp15, v2
-// W64: v_cmp_ne_i16_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x6a,0x7c]
+v_cmp_ne_i16 vcc, 0.5, v2.l
+// W64: v_cmp_ne_i16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x6a,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc, m0, v2
-// W64: v_cmp_ne_i16_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x6a,0x7c]
+v_cmp_ne_i16 vcc, src_scc, v2.l
+// W64: v_cmp_ne_i16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x6a,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc, exec_lo, v2
-// W64: v_cmp_ne_i16_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x6a,0x7c]
+v_cmp_ne_i16 vcc, 0xfe0b, v127.l
+// W64: v_cmp_ne_i16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x6a,0x7c,0x0b,0xfe,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc, exec_hi, v2
-// W64: v_cmp_ne_i16_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x6a,0x7c]
+v_cmp_ne_i16 vcc_lo, v1.h, v2.l
+// W32: v_cmp_ne_i16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x6a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, v1.h, v2.l
+// W64: v_cmp_ne_i16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x6a,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc, null, v2
-// W64: v_cmp_ne_i16_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x6a,0x7c]
+v_cmp_ne_i16 vcc_lo, v127.h, v2.l
+// W32: v_cmp_ne_i16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x6a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, v127.h, v2.l
+// W64: v_cmp_ne_i16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x6a,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc, -1, v2
-// W64: v_cmp_ne_i16_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x6a,0x7c]
+v_cmp_ne_i16 vcc_lo, 0.5, v127.l
+// W32: v_cmp_ne_i16_e32 vcc_lo, 0.5, v127.l    ; encoding: [0xf0,0xfe,0x6a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, 0.5, v127.l
+// W64: v_cmp_ne_i16_e32 vcc, 0.5, v127.l       ; encoding: [0xf0,0xfe,0x6a,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc, 0.5, v2
-// W64: v_cmp_ne_i16_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x6a,0x7c]
+v_cmp_ne_i16 vcc_lo, 0x3800, v2.l
+// W32: v_cmp_ne_i16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x6a,0x7c,0x00,0x38,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, 0x3800, v2.l
+// W64: v_cmp_ne_i16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x6a,0x7c,0x00,0x38,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc, src_scc, v2
-// W64: v_cmp_ne_i16_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x6a,0x7c]
+v_cmp_ne_i16 vcc_lo, src_scc, v2.h
+// W32: v_cmp_ne_i16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x6b,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, src_scc, v2.h
+// W64: v_cmp_ne_i16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x6b,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc, 0xfe0b, v127
-// W64: v_cmp_ne_i16_e32 vcc, 0xfe0b, v127      ; encoding: [0xff,0xfe,0x6a,0x7c,0x0b,0xfe,0x00,0x00]
+v_cmp_ne_i16 vcc_lo, 0xfe0b, v127.h
+// W32: v_cmp_ne_i16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x6b,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, 0xfe0b, v127.h
+// W64: v_cmp_ne_i16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x6b,0x7c,0x0b,0xfe,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
 v_cmp_ne_i32 vcc_lo, v1, v2
@@ -6860,124 +7388,172 @@ v_cmp_ne_i64 vcc, 0xaf123456, v[254:255]
 // W64: v_cmp_ne_i64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xab,0x7c,0x56,0x34,0x12,0xaf]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc_lo, v1, v2
-// W32: v_cmp_ne_u16_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x7a,0x7c]
+v_cmp_ne_u16 vcc_lo, v1.l, v2.l
+// W32: v_cmp_ne_u16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x7a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc_lo, v127, v2
-// W32: v_cmp_ne_u16_e32 vcc_lo, v127, v2       ; encoding: [0x7f,0x05,0x7a,0x7c]
+v_cmp_ne_u16 vcc_lo, v127.l, v2.l
+// W32: v_cmp_ne_u16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x7a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc_lo, s1, v2
-// W32: v_cmp_ne_u16_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x7a,0x7c]
+v_cmp_ne_u16 vcc_lo, s1, v2.l
+// W32: v_cmp_ne_u16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x7a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc_lo, s105, v2
-// W32: v_cmp_ne_u16_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x7a,0x7c]
+v_cmp_ne_u16 vcc_lo, s105, v2.l
+// W32: v_cmp_ne_u16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x7a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc_lo, vcc_lo, v2
-// W32: v_cmp_ne_u16_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x7a,0x7c]
+v_cmp_ne_u16 vcc_lo, vcc_lo, v2.l
+// W32: v_cmp_ne_u16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x7a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc_lo, vcc_hi, v2
-// W32: v_cmp_ne_u16_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x7a,0x7c]
+v_cmp_ne_u16 vcc_lo, vcc_hi, v2.l
+// W32: v_cmp_ne_u16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x7a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc_lo, ttmp15, v2
-// W32: v_cmp_ne_u16_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x7a,0x7c]
+v_cmp_ne_u16 vcc_lo, ttmp15, v2.l
+// W32: v_cmp_ne_u16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x7a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc_lo, m0, v2
-// W32: v_cmp_ne_u16_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x7a,0x7c]
+v_cmp_ne_u16 vcc_lo, m0, v2.l
+// W32: v_cmp_ne_u16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x7a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc_lo, exec_lo, v2
-// W32: v_cmp_ne_u16_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x7a,0x7c]
+v_cmp_ne_u16 vcc_lo, exec_lo, v2.l
+// W32: v_cmp_ne_u16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x7a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc_lo, exec_hi, v2
-// W32: v_cmp_ne_u16_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x7a,0x7c]
+v_cmp_ne_u16 vcc_lo, exec_hi, v2.l
+// W32: v_cmp_ne_u16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x7a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc_lo, null, v2
-// W32: v_cmp_ne_u16_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x7a,0x7c]
+v_cmp_ne_u16 vcc_lo, null, v2.l
+// W32: v_cmp_ne_u16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x7a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc_lo, -1, v2
-// W32: v_cmp_ne_u16_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x7a,0x7c]
+v_cmp_ne_u16 vcc_lo, -1, v2.l
+// W32: v_cmp_ne_u16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x7a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc_lo, 0.5, v2
-// W32: v_cmp_ne_u16_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x7a,0x7c]
+v_cmp_ne_u16 vcc_lo, 0.5, v2.l
+// W32: v_cmp_ne_u16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x7a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc_lo, src_scc, v2
-// W32: v_cmp_ne_u16_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x7a,0x7c]
+v_cmp_ne_u16 vcc_lo, src_scc, v2.l
+// W32: v_cmp_ne_u16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x7a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc_lo, 0xfe0b, v127
-// W32: v_cmp_ne_u16_e32 vcc_lo, 0xfe0b, v127   ; encoding: [0xff,0xfe,0x7a,0x7c,0x0b,0xfe,0x00,0x00]
+v_cmp_ne_u16 vcc_lo, 0xfe0b, v127.l
+// W32: v_cmp_ne_u16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x7a,0x7c,0x0b,0xfe,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc, v1, v2
-// W64: v_cmp_ne_u16_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x7a,0x7c]
+v_cmp_ne_u16 vcc, v1.l, v2.l
+// W64: v_cmp_ne_u16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x7a,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc, v127.l, v2.l
+// W64: v_cmp_ne_u16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x7a,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc, s1, v2.l
+// W64: v_cmp_ne_u16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x7a,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc, s105, v2.l
+// W64: v_cmp_ne_u16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x7a,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc, v127, v2
-// W64: v_cmp_ne_u16_e32 vcc, v127, v2          ; encoding: [0x7f,0x05,0x7a,0x7c]
+v_cmp_ne_u16 vcc, vcc_lo, v2.l
+// W64: v_cmp_ne_u16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x7a,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc, s1, v2
-// W64: v_cmp_ne_u16_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x7a,0x7c]
+v_cmp_ne_u16 vcc, vcc_hi, v2.l
+// W64: v_cmp_ne_u16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x7a,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc, s105, v2
-// W64: v_cmp_ne_u16_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x7a,0x7c]
+v_cmp_ne_u16 vcc, ttmp15, v2.l
+// W64: v_cmp_ne_u16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x7a,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc, vcc_lo, v2
-// W64: v_cmp_ne_u16_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x7a,0x7c]
+v_cmp_ne_u16 vcc, m0, v2.l
+// W64: v_cmp_ne_u16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x7a,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc, vcc_hi, v2
-// W64: v_cmp_ne_u16_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x7a,0x7c]
+v_cmp_ne_u16 vcc, exec_lo, v2.l
+// W64: v_cmp_ne_u16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x7a,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc, ttmp15, v2
-// W64: v_cmp_ne_u16_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x7a,0x7c]
+v_cmp_ne_u16 vcc, exec_hi, v2.l
+// W64: v_cmp_ne_u16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x7a,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc, m0, v2
-// W64: v_cmp_ne_u16_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x7a,0x7c]
+v_cmp_ne_u16 vcc, null, v2.l
+// W64: v_cmp_ne_u16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x7a,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc, exec_lo, v2
-// W64: v_cmp_ne_u16_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x7a,0x7c]
+v_cmp_ne_u16 vcc, -1, v2.l
+// W64: v_cmp_ne_u16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x7a,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc, exec_hi, v2
-// W64: v_cmp_ne_u16_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x7a,0x7c]
+v_cmp_ne_u16 vcc, 0.5, v2.l
+// W64: v_cmp_ne_u16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x7a,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc, null, v2
-// W64: v_cmp_ne_u16_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x7a,0x7c]
+v_cmp_ne_u16 vcc, src_scc, v2.l
+// W64: v_cmp_ne_u16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x7a,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc, -1, v2
-// W64: v_cmp_ne_u16_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x7a,0x7c]
+v_cmp_ne_u16 vcc, 0xfe0b, v127.l
+// W64: v_cmp_ne_u16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x7a,0x7c,0x0b,0xfe,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc, 0.5, v2
-// W64: v_cmp_ne_u16_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x7a,0x7c]
+v_cmp_ne_u16 vcc_lo, v1.h, v2.l
+// W32: v_cmp_ne_u16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x7a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc, v1.h, v2.l
+// W64: v_cmp_ne_u16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x7a,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc_lo, v127.h, v2.l
+// W32: v_cmp_ne_u16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x7a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc, v127.h, v2.l
+// W64: v_cmp_ne_u16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x7a,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc_lo, 0.5, v127.l
+// W32: v_cmp_ne_u16_e32 vcc_lo, 0.5, v127.l    ; encoding: [0xf0,0xfe,0x7a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc, 0.5, v127.l
+// W64: v_cmp_ne_u16_e32 vcc, 0.5, v127.l       ; encoding: [0xf0,0xfe,0x7a,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc, src_scc, v2
-// W64: v_cmp_ne_u16_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x7a,0x7c]
+v_cmp_ne_u16 vcc_lo, 0x3800, v2.l
+// W32: v_cmp_ne_u16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x7a,0x7c,0x00,0x38,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc, 0x3800, v2.l
+// W64: v_cmp_ne_u16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x7a,0x7c,0x00,0x38,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc, 0xfe0b, v127
-// W64: v_cmp_ne_u16_e32 vcc, 0xfe0b, v127      ; encoding: [0xff,0xfe,0x7a,0x7c,0x0b,0xfe,0x00,0x00]
+v_cmp_ne_u16 vcc_lo, src_scc, v2.h
+// W32: v_cmp_ne_u16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x7b,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc, src_scc, v2.h
+// W64: v_cmp_ne_u16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x7b,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc_lo, 0xfe0b, v127.h
+// W32: v_cmp_ne_u16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x7b,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc, 0xfe0b, v127.h
+// W64: v_cmp_ne_u16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x7b,0x7c,0x0b,0xfe,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
 v_cmp_ne_u32 vcc_lo, v1, v2
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_vopc_dpp16.s b/llvm/test/MC/AMDGPU/gfx11_asm_vopc_dpp16.s
index fdaa9a990cb9b6..b0d20c4a42fe14 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_vopc_dpp16.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_vopc_dpp16.s
@@ -452,116 +452,220 @@ v_cmp_eq_f32 vcc, -|v255|, -|v255| row_xmask:15 row_mask:0x3 bank_mask:0x0 bound
 // W64: v_cmp_eq_f32 vcc, -|v255|, -|v255| row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x25,0x7c,0xff,0x6f,0xf5,0x30]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc_lo, v1, v2 quad_perm:[3,2,1,0]
-// W32: v_cmp_eq_i16 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x1b,0x00,0xff]
+v_cmp_eq_i16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0]
+// W32: v_cmp_eq_i16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x1b,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc_lo, v1, v2 quad_perm:[0,1,2,3]
-// W32: v_cmp_eq_i16 vcc_lo, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0xe4,0x00,0xff]
+v_cmp_eq_i16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3]
+// W32: v_cmp_eq_i16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0xe4,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc_lo, v1, v2 row_mirror
-// W32: v_cmp_eq_i16 vcc_lo, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x40,0x01,0xff]
+v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_mirror
+// W32: v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x40,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc_lo, v1, v2 row_half_mirror
-// W32: v_cmp_eq_i16 vcc_lo, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x41,0x01,0xff]
+v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_half_mirror
+// W32: v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x41,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc_lo, v1, v2 row_shl:1
-// W32: v_cmp_eq_i16 vcc_lo, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x01,0x01,0xff]
+v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_shl:1
+// W32: v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x01,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc_lo, v1, v2 row_shl:15
-// W32: v_cmp_eq_i16 vcc_lo, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x0f,0x01,0xff]
+v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_shl:15
+// W32: v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x0f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc_lo, v1, v2 row_shr:1
-// W32: v_cmp_eq_i16 vcc_lo, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x11,0x01,0xff]
+v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_shr:1
+// W32: v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x11,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc_lo, v1, v2 row_shr:15
-// W32: v_cmp_eq_i16 vcc_lo, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x1f,0x01,0xff]
+v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_shr:15
+// W32: v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x1f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc_lo, v1, v2 row_ror:1
-// W32: v_cmp_eq_i16 vcc_lo, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x21,0x01,0xff]
+v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_ror:1
+// W32: v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x21,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc_lo, v1, v2 row_ror:15
-// W32: v_cmp_eq_i16 vcc_lo, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x2f,0x01,0xff]
+v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_ror:15
+// W32: v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x2f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W32: v_cmp_eq_i16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x50,0x01,0xff]
+v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x50,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W32: v_cmp_eq_i16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x5f,0x01,0x01]
+v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x5f,0x01,0x01]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W32: v_cmp_eq_i16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x60,0x09,0x13]
+v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1
+// W32: v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x60,0x09,0x13]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
-// W32: v_cmp_eq_i16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x64,0x7c,0x7f,0x6f,0x05,0x30]
+v_cmp_eq_i16 vcc_lo, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1
+// W32: v_cmp_eq_i16 vcc_lo, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x64,0x7c,0x7f,0x6f,0x05,0x30]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc, v1, v2 quad_perm:[3,2,1,0]
-// W64: v_cmp_eq_i16 vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x1b,0x00,0xff]
+v_cmp_eq_i16 vcc, v1.l, v2.l quad_perm:[3,2,1,0]
+// W64: v_cmp_eq_i16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x1b,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc, v1, v2 quad_perm:[0,1,2,3]
-// W64: v_cmp_eq_i16 vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0xe4,0x00,0xff]
+v_cmp_eq_i16 vcc, v1.l, v2.l quad_perm:[0,1,2,3]
+// W64: v_cmp_eq_i16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0xe4,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc, v1, v2 row_mirror
-// W64: v_cmp_eq_i16 vcc, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x40,0x01,0xff]
+v_cmp_eq_i16 vcc, v1.l, v2.l row_mirror
+// W64: v_cmp_eq_i16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x40,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc, v1, v2 row_half_mirror
-// W64: v_cmp_eq_i16 vcc, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x41,0x01,0xff]
+v_cmp_eq_i16 vcc, v1.l, v2.l row_half_mirror
+// W64: v_cmp_eq_i16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x41,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc, v1, v2 row_shl:1
-// W64: v_cmp_eq_i16 vcc, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x01,0x01,0xff]
+v_cmp_eq_i16 vcc, v1.l, v2.l row_shl:1
+// W64: v_cmp_eq_i16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x01,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc, v1, v2 row_shl:15
-// W64: v_cmp_eq_i16 vcc, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x0f,0x01,0xff]
+v_cmp_eq_i16 vcc, v1.l, v2.l row_shl:15
+// W64: v_cmp_eq_i16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x0f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc, v1, v2 row_shr:1
-// W64: v_cmp_eq_i16 vcc, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x11,0x01,0xff]
+v_cmp_eq_i16 vcc, v1.l, v2.l row_shr:1
+// W64: v_cmp_eq_i16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x11,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc, v1, v2 row_shr:15
-// W64: v_cmp_eq_i16 vcc, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x1f,0x01,0xff]
+v_cmp_eq_i16 vcc, v1.l, v2.l row_shr:15
+// W64: v_cmp_eq_i16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x1f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc, v1, v2 row_ror:1
-// W64: v_cmp_eq_i16 vcc, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x21,0x01,0xff]
+v_cmp_eq_i16 vcc, v1.l, v2.l row_ror:1
+// W64: v_cmp_eq_i16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x21,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc, v1, v2 row_ror:15
-// W64: v_cmp_eq_i16 vcc, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x2f,0x01,0xff]
+v_cmp_eq_i16 vcc, v1.l, v2.l row_ror:15
+// W64: v_cmp_eq_i16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x2f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W64: v_cmp_eq_i16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x50,0x01,0xff]
+v_cmp_eq_i16 vcc, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_eq_i16 vcc, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x50,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W64: v_cmp_eq_i16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x5f,0x01,0x01]
+v_cmp_eq_i16 vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W64: v_cmp_eq_i16 vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x5f,0x01,0x01]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W64: v_cmp_eq_i16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x60,0x09,0x13]
+v_cmp_eq_i16 vcc, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1
+// W64: v_cmp_eq_i16 vcc, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x60,0x09,0x13]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
-// W64: v_cmp_eq_i16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x64,0x7c,0x7f,0x6f,0x05,0x30]
+v_cmp_eq_i16 vcc, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1
+// W64: v_cmp_eq_i16 vcc, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x64,0x7c,0x7f,0x6f,0x05,0x30]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf
+// W32: v_cmp_eq_i16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf
+// W64: v_cmp_eq_i16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf
+// W32: v_cmp_eq_i16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0xe4,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf
+// W64: v_cmp_eq_i16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0xe4,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf
+// W32: v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x40,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf
+// W64: v_cmp_eq_i16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x40,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf
+// W32: v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x41,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf
+// W64: v_cmp_eq_i16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x41,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x01,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_eq_i16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x01,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x0f,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_eq_i16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x0f,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x11,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_eq_i16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x11,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x1f,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_eq_i16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x1f,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x21,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_eq_i16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x21,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x2f,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_eq_i16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x2f,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc_lo, v127.l, v127.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_eq_i16 vcc_lo, v127.l, v127.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0xfe,0x64,0x7c,0x7f,0x5f,0x01,0x01]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc, v127.l, v127.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W64: v_cmp_eq_i16 vcc, v127.l, v127.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0xfe,0x64,0x7c,0x7f,0x5f,0x01,0x01]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc_lo, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W32: v_cmp_eq_i16 vcc_lo, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x65,0x7c,0x81,0x60,0x09,0x13]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W64: v_cmp_eq_i16 vcc, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x65,0x7c,0x81,0x60,0x09,0x13]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc_lo, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// W32: v_cmp_eq_i16 vcc_lo, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x65,0x7c,0xff,0x6f,0x05,0x30]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// W64: v_cmp_eq_i16 vcc, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x65,0x7c,0xff,0x6f,0x05,0x30]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
 v_cmp_eq_i32 vcc_lo, v1, v2 quad_perm:[3,2,1,0]
@@ -676,116 +780,220 @@ v_cmp_eq_i32 vcc, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:
 // W64: v_cmp_eq_i32 vcc, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x85,0x7c,0xff,0x6f,0x05,0x30]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc_lo, v1, v2 quad_perm:[3,2,1,0]
-// W32: v_cmp_eq_u16 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x1b,0x00,0xff]
+v_cmp_eq_u16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0]
+// W32: v_cmp_eq_u16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x1b,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc_lo, v1, v2 quad_perm:[0,1,2,3]
-// W32: v_cmp_eq_u16 vcc_lo, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0xe4,0x00,0xff]
+v_cmp_eq_u16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3]
+// W32: v_cmp_eq_u16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0xe4,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc_lo, v1, v2 row_mirror
-// W32: v_cmp_eq_u16 vcc_lo, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x40,0x01,0xff]
+v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_mirror
+// W32: v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x40,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc_lo, v1, v2 row_half_mirror
-// W32: v_cmp_eq_u16 vcc_lo, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x41,0x01,0xff]
+v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_half_mirror
+// W32: v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x41,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc_lo, v1, v2 row_shl:1
-// W32: v_cmp_eq_u16 vcc_lo, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x01,0x01,0xff]
+v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_shl:1
+// W32: v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x01,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc_lo, v1, v2 row_shl:15
-// W32: v_cmp_eq_u16 vcc_lo, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x0f,0x01,0xff]
+v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_shl:15
+// W32: v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x0f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc_lo, v1, v2 row_shr:1
-// W32: v_cmp_eq_u16 vcc_lo, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x11,0x01,0xff]
+v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_shr:1
+// W32: v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x11,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc_lo, v1, v2 row_shr:15
-// W32: v_cmp_eq_u16 vcc_lo, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x1f,0x01,0xff]
+v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_shr:15
+// W32: v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x1f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc_lo, v1, v2 row_ror:1
-// W32: v_cmp_eq_u16 vcc_lo, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x21,0x01,0xff]
+v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_ror:1
+// W32: v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x21,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc_lo, v1, v2 row_ror:15
-// W32: v_cmp_eq_u16 vcc_lo, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x2f,0x01,0xff]
+v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_ror:15
+// W32: v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x2f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W32: v_cmp_eq_u16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x50,0x01,0xff]
+v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x50,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W32: v_cmp_eq_u16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x5f,0x01,0x01]
+v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x5f,0x01,0x01]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W32: v_cmp_eq_u16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x60,0x09,0x13]
+v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1
+// W32: v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x60,0x09,0x13]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
-// W32: v_cmp_eq_u16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x74,0x7c,0x7f,0x6f,0x05,0x30]
+v_cmp_eq_u16 vcc_lo, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1
+// W32: v_cmp_eq_u16 vcc_lo, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x74,0x7c,0x7f,0x6f,0x05,0x30]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc, v1, v2 quad_perm:[3,2,1,0]
-// W64: v_cmp_eq_u16 vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x1b,0x00,0xff]
+v_cmp_eq_u16 vcc, v1.l, v2.l quad_perm:[3,2,1,0]
+// W64: v_cmp_eq_u16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc, v1.l, v2.l quad_perm:[0,1,2,3]
+// W64: v_cmp_eq_u16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0xe4,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc, v1.l, v2.l row_mirror
+// W64: v_cmp_eq_u16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x40,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc, v1.l, v2.l row_half_mirror
+// W64: v_cmp_eq_u16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x41,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc, v1.l, v2.l row_shl:1
+// W64: v_cmp_eq_u16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x01,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc, v1.l, v2.l row_shl:15
+// W64: v_cmp_eq_u16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x0f,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc, v1.l, v2.l row_shr:1
+// W64: v_cmp_eq_u16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x11,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc, v1, v2 quad_perm:[0,1,2,3]
-// W64: v_cmp_eq_u16 vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0xe4,0x00,0xff]
+v_cmp_eq_u16 vcc, v1.l, v2.l row_shr:15
+// W64: v_cmp_eq_u16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x1f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc, v1, v2 row_mirror
-// W64: v_cmp_eq_u16 vcc, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x40,0x01,0xff]
+v_cmp_eq_u16 vcc, v1.l, v2.l row_ror:1
+// W64: v_cmp_eq_u16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x21,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc, v1, v2 row_half_mirror
-// W64: v_cmp_eq_u16 vcc, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x41,0x01,0xff]
+v_cmp_eq_u16 vcc, v1.l, v2.l row_ror:15
+// W64: v_cmp_eq_u16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x2f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc, v1, v2 row_shl:1
-// W64: v_cmp_eq_u16 vcc, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x01,0x01,0xff]
+v_cmp_eq_u16 vcc, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_eq_u16 vcc, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x50,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc, v1, v2 row_shl:15
-// W64: v_cmp_eq_u16 vcc, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x0f,0x01,0xff]
+v_cmp_eq_u16 vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W64: v_cmp_eq_u16 vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x5f,0x01,0x01]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc, v1, v2 row_shr:1
-// W64: v_cmp_eq_u16 vcc, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x11,0x01,0xff]
+v_cmp_eq_u16 vcc, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1
+// W64: v_cmp_eq_u16 vcc, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x60,0x09,0x13]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc, v1, v2 row_shr:15
-// W64: v_cmp_eq_u16 vcc, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x1f,0x01,0xff]
+v_cmp_eq_u16 vcc, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1
+// W64: v_cmp_eq_u16 vcc, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x74,0x7c,0x7f,0x6f,0x05,0x30]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc, v1, v2 row_ror:1
-// W64: v_cmp_eq_u16 vcc, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x21,0x01,0xff]
+v_cmp_eq_u16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf
+// W32: v_cmp_eq_u16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf
+// W64: v_cmp_eq_u16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf
+// W32: v_cmp_eq_u16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0xe4,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf
+// W64: v_cmp_eq_u16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0xe4,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf
+// W32: v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x40,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf
+// W64: v_cmp_eq_u16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x40,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf
+// W32: v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x41,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf
+// W64: v_cmp_eq_u16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x41,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x01,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_eq_u16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x01,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x0f,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_eq_u16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x0f,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x11,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_eq_u16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x11,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x1f,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_eq_u16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x1f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc, v1, v2 row_ror:15
-// W64: v_cmp_eq_u16 vcc, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x2f,0x01,0xff]
+v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x21,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_eq_u16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x21,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W64: v_cmp_eq_u16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x50,0x01,0xff]
+v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x2f,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_eq_u16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x2f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W64: v_cmp_eq_u16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x5f,0x01,0x01]
+v_cmp_eq_u16 vcc_lo, v127.l, v127.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_eq_u16 vcc_lo, v127.l, v127.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0xfe,0x74,0x7c,0x7f,0x5f,0x01,0x01]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc, v127.l, v127.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W64: v_cmp_eq_u16 vcc, v127.l, v127.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0xfe,0x74,0x7c,0x7f,0x5f,0x01,0x01]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W64: v_cmp_eq_u16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x60,0x09,0x13]
+v_cmp_eq_u16 vcc_lo, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W32: v_cmp_eq_u16 vcc_lo, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x75,0x7c,0x81,0x60,0x09,0x13]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W64: v_cmp_eq_u16 vcc, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x75,0x7c,0x81,0x60,0x09,0x13]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
-// W64: v_cmp_eq_u16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x74,0x7c,0x7f,0x6f,0x05,0x30]
+v_cmp_eq_u16 vcc_lo, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// W32: v_cmp_eq_u16 vcc_lo, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x75,0x7c,0xff,0x6f,0x05,0x30]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// W64: v_cmp_eq_u16 vcc, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x75,0x7c,0xff,0x6f,0x05,0x30]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
 v_cmp_eq_u32 vcc_lo, v1, v2 quad_perm:[3,2,1,0]
@@ -1572,116 +1780,220 @@ v_cmp_ge_f32 vcc, -|v255|, -|v255| row_xmask:15 row_mask:0x3 bank_mask:0x0 bound
 // W64: v_cmp_ge_f32 vcc, -|v255|, -|v255| row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x2d,0x7c,0xff,0x6f,0xf5,0x30]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc_lo, v1, v2 quad_perm:[3,2,1,0]
-// W32: v_cmp_ge_i16 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x1b,0x00,0xff]
+v_cmp_ge_i16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0]
+// W32: v_cmp_ge_i16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x1b,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc_lo, v1, v2 quad_perm:[0,1,2,3]
-// W32: v_cmp_ge_i16 vcc_lo, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0xe4,0x00,0xff]
+v_cmp_ge_i16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3]
+// W32: v_cmp_ge_i16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0xe4,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc_lo, v1, v2 row_mirror
-// W32: v_cmp_ge_i16 vcc_lo, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x40,0x01,0xff]
+v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_mirror
+// W32: v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x40,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc_lo, v1, v2 row_half_mirror
-// W32: v_cmp_ge_i16 vcc_lo, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x41,0x01,0xff]
+v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_half_mirror
+// W32: v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x41,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc_lo, v1, v2 row_shl:1
-// W32: v_cmp_ge_i16 vcc_lo, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x01,0x01,0xff]
+v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_shl:1
+// W32: v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x01,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc_lo, v1, v2 row_shl:15
-// W32: v_cmp_ge_i16 vcc_lo, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x0f,0x01,0xff]
+v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_shl:15
+// W32: v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x0f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc_lo, v1, v2 row_shr:1
-// W32: v_cmp_ge_i16 vcc_lo, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x11,0x01,0xff]
+v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_shr:1
+// W32: v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x11,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc_lo, v1, v2 row_shr:15
-// W32: v_cmp_ge_i16 vcc_lo, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x1f,0x01,0xff]
+v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_shr:15
+// W32: v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x1f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc_lo, v1, v2 row_ror:1
-// W32: v_cmp_ge_i16 vcc_lo, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x21,0x01,0xff]
+v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_ror:1
+// W32: v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x21,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc_lo, v1, v2 row_ror:15
-// W32: v_cmp_ge_i16 vcc_lo, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x2f,0x01,0xff]
+v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_ror:15
+// W32: v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x2f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W32: v_cmp_ge_i16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x50,0x01,0xff]
+v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x50,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W32: v_cmp_ge_i16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x5f,0x01,0x01]
+v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x5f,0x01,0x01]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W32: v_cmp_ge_i16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x60,0x09,0x13]
+v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1
+// W32: v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x60,0x09,0x13]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
-// W32: v_cmp_ge_i16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x6c,0x7c,0x7f,0x6f,0x05,0x30]
+v_cmp_ge_i16 vcc_lo, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1
+// W32: v_cmp_ge_i16 vcc_lo, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x6c,0x7c,0x7f,0x6f,0x05,0x30]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc, v1, v2 quad_perm:[3,2,1,0]
-// W64: v_cmp_ge_i16 vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x1b,0x00,0xff]
+v_cmp_ge_i16 vcc, v1.l, v2.l quad_perm:[3,2,1,0]
+// W64: v_cmp_ge_i16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc, v1.l, v2.l quad_perm:[0,1,2,3]
+// W64: v_cmp_ge_i16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0xe4,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc, v1.l, v2.l row_mirror
+// W64: v_cmp_ge_i16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x40,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc, v1.l, v2.l row_half_mirror
+// W64: v_cmp_ge_i16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x41,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc, v1.l, v2.l row_shl:1
+// W64: v_cmp_ge_i16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x01,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc, v1.l, v2.l row_shl:15
+// W64: v_cmp_ge_i16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x0f,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc, v1.l, v2.l row_shr:1
+// W64: v_cmp_ge_i16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x11,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc, v1.l, v2.l row_shr:15
+// W64: v_cmp_ge_i16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x1f,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc, v1.l, v2.l row_ror:1
+// W64: v_cmp_ge_i16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x21,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc, v1.l, v2.l row_ror:15
+// W64: v_cmp_ge_i16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x2f,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ge_i16 vcc, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x50,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W64: v_cmp_ge_i16 vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x5f,0x01,0x01]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1
+// W64: v_cmp_ge_i16 vcc, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x60,0x09,0x13]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc, v1, v2 quad_perm:[0,1,2,3]
-// W64: v_cmp_ge_i16 vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0xe4,0x00,0xff]
+v_cmp_ge_i16 vcc, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1
+// W64: v_cmp_ge_i16 vcc, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x6c,0x7c,0x7f,0x6f,0x05,0x30]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc, v1, v2 row_mirror
-// W64: v_cmp_ge_i16 vcc, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x40,0x01,0xff]
+v_cmp_ge_i16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ge_i16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ge_i16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ge_i16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0xe4,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ge_i16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0xe4,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc, v1, v2 row_half_mirror
-// W64: v_cmp_ge_i16 vcc, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x41,0x01,0xff]
+v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x40,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ge_i16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x40,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc, v1, v2 row_shl:1
-// W64: v_cmp_ge_i16 vcc, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x01,0x01,0xff]
+v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x41,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ge_i16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x41,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc, v1, v2 row_shl:15
-// W64: v_cmp_ge_i16 vcc, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x0f,0x01,0xff]
+v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x01,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ge_i16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x01,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc, v1, v2 row_shr:1
-// W64: v_cmp_ge_i16 vcc, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x11,0x01,0xff]
+v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x0f,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ge_i16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x0f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc, v1, v2 row_shr:15
-// W64: v_cmp_ge_i16 vcc, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x1f,0x01,0xff]
+v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x11,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ge_i16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x11,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc, v1, v2 row_ror:1
-// W64: v_cmp_ge_i16 vcc, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x21,0x01,0xff]
+v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x1f,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ge_i16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x1f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc, v1, v2 row_ror:15
-// W64: v_cmp_ge_i16 vcc, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x2f,0x01,0xff]
+v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x21,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ge_i16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x21,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W64: v_cmp_ge_i16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x50,0x01,0xff]
+v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x2f,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ge_i16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x2f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W64: v_cmp_ge_i16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x5f,0x01,0x01]
+v_cmp_ge_i16 vcc_lo, v127.l, v127.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_ge_i16 vcc_lo, v127.l, v127.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0xfe,0x6c,0x7c,0x7f,0x5f,0x01,0x01]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc, v127.l, v127.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W64: v_cmp_ge_i16 vcc, v127.l, v127.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0xfe,0x6c,0x7c,0x7f,0x5f,0x01,0x01]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W64: v_cmp_ge_i16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x60,0x09,0x13]
+v_cmp_ge_i16 vcc_lo, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W32: v_cmp_ge_i16 vcc_lo, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x6d,0x7c,0x81,0x60,0x09,0x13]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W64: v_cmp_ge_i16 vcc, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x6d,0x7c,0x81,0x60,0x09,0x13]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
-// W64: v_cmp_ge_i16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x6c,0x7c,0x7f,0x6f,0x05,0x30]
+v_cmp_ge_i16 vcc_lo, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// W32: v_cmp_ge_i16 vcc_lo, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x6d,0x7c,0xff,0x6f,0x05,0x30]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// W64: v_cmp_ge_i16 vcc, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x6d,0x7c,0xff,0x6f,0x05,0x30]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
 v_cmp_ge_i32 vcc_lo, v1, v2 quad_perm:[3,2,1,0]
@@ -1796,116 +2108,220 @@ v_cmp_ge_i32 vcc, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:
 // W64: v_cmp_ge_i32 vcc, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x8d,0x7c,0xff,0x6f,0x05,0x30]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc_lo, v1, v2 quad_perm:[3,2,1,0]
-// W32: v_cmp_ge_u16 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x1b,0x00,0xff]
+v_cmp_ge_u16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0]
+// W32: v_cmp_ge_u16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x1b,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc_lo, v1, v2 quad_perm:[0,1,2,3]
-// W32: v_cmp_ge_u16 vcc_lo, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0xe4,0x00,0xff]
+v_cmp_ge_u16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3]
+// W32: v_cmp_ge_u16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0xe4,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc_lo, v1, v2 row_mirror
-// W32: v_cmp_ge_u16 vcc_lo, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x40,0x01,0xff]
+v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_mirror
+// W32: v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x40,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc_lo, v1, v2 row_half_mirror
-// W32: v_cmp_ge_u16 vcc_lo, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x41,0x01,0xff]
+v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_half_mirror
+// W32: v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x41,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc_lo, v1, v2 row_shl:1
-// W32: v_cmp_ge_u16 vcc_lo, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x01,0x01,0xff]
+v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_shl:1
+// W32: v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x01,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc_lo, v1, v2 row_shl:15
-// W32: v_cmp_ge_u16 vcc_lo, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x0f,0x01,0xff]
+v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_shl:15
+// W32: v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x0f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc_lo, v1, v2 row_shr:1
-// W32: v_cmp_ge_u16 vcc_lo, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x11,0x01,0xff]
+v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_shr:1
+// W32: v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x11,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc_lo, v1, v2 row_shr:15
-// W32: v_cmp_ge_u16 vcc_lo, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x1f,0x01,0xff]
+v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_shr:15
+// W32: v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x1f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc_lo, v1, v2 row_ror:1
-// W32: v_cmp_ge_u16 vcc_lo, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x21,0x01,0xff]
+v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_ror:1
+// W32: v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x21,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc_lo, v1, v2 row_ror:15
-// W32: v_cmp_ge_u16 vcc_lo, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x2f,0x01,0xff]
+v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_ror:15
+// W32: v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x2f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W32: v_cmp_ge_u16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x50,0x01,0xff]
+v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x50,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W32: v_cmp_ge_u16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x5f,0x01,0x01]
+v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x5f,0x01,0x01]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W32: v_cmp_ge_u16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x60,0x09,0x13]
+v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1
+// W32: v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x60,0x09,0x13]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
-// W32: v_cmp_ge_u16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x7c,0x7c,0x7f,0x6f,0x05,0x30]
+v_cmp_ge_u16 vcc_lo, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1
+// W32: v_cmp_ge_u16 vcc_lo, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x7c,0x7c,0x7f,0x6f,0x05,0x30]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc, v1, v2 quad_perm:[3,2,1,0]
-// W64: v_cmp_ge_u16 vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x1b,0x00,0xff]
+v_cmp_ge_u16 vcc, v1.l, v2.l quad_perm:[3,2,1,0]
+// W64: v_cmp_ge_u16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc, v1.l, v2.l quad_perm:[0,1,2,3]
+// W64: v_cmp_ge_u16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0xe4,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc, v1.l, v2.l row_mirror
+// W64: v_cmp_ge_u16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x40,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc, v1, v2 quad_perm:[0,1,2,3]
-// W64: v_cmp_ge_u16 vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0xe4,0x00,0xff]
+v_cmp_ge_u16 vcc, v1.l, v2.l row_half_mirror
+// W64: v_cmp_ge_u16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x41,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc, v1, v2 row_mirror
-// W64: v_cmp_ge_u16 vcc, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x40,0x01,0xff]
+v_cmp_ge_u16 vcc, v1.l, v2.l row_shl:1
+// W64: v_cmp_ge_u16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x01,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc, v1, v2 row_half_mirror
-// W64: v_cmp_ge_u16 vcc, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x41,0x01,0xff]
+v_cmp_ge_u16 vcc, v1.l, v2.l row_shl:15
+// W64: v_cmp_ge_u16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x0f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc, v1, v2 row_shl:1
-// W64: v_cmp_ge_u16 vcc, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x01,0x01,0xff]
+v_cmp_ge_u16 vcc, v1.l, v2.l row_shr:1
+// W64: v_cmp_ge_u16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x11,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc, v1, v2 row_shl:15
-// W64: v_cmp_ge_u16 vcc, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x0f,0x01,0xff]
+v_cmp_ge_u16 vcc, v1.l, v2.l row_shr:15
+// W64: v_cmp_ge_u16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x1f,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc, v1.l, v2.l row_ror:1
+// W64: v_cmp_ge_u16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x21,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc, v1.l, v2.l row_ror:15
+// W64: v_cmp_ge_u16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x2f,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ge_u16 vcc, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x50,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W64: v_cmp_ge_u16 vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x5f,0x01,0x01]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1
+// W64: v_cmp_ge_u16 vcc, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x60,0x09,0x13]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1
+// W64: v_cmp_ge_u16 vcc, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x7c,0x7c,0x7f,0x6f,0x05,0x30]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ge_u16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ge_u16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ge_u16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0xe4,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ge_u16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0xe4,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x40,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ge_u16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x40,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x41,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ge_u16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x41,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x01,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ge_u16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x01,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc, v1, v2 row_shr:1
-// W64: v_cmp_ge_u16 vcc, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x11,0x01,0xff]
+v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x0f,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ge_u16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x0f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc, v1, v2 row_shr:15
-// W64: v_cmp_ge_u16 vcc, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x1f,0x01,0xff]
+v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x11,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ge_u16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x11,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc, v1, v2 row_ror:1
-// W64: v_cmp_ge_u16 vcc, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x21,0x01,0xff]
+v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x1f,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ge_u16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x1f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc, v1, v2 row_ror:15
-// W64: v_cmp_ge_u16 vcc, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x2f,0x01,0xff]
+v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x21,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ge_u16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x21,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W64: v_cmp_ge_u16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x50,0x01,0xff]
+v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x2f,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ge_u16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x2f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W64: v_cmp_ge_u16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x5f,0x01,0x01]
+v_cmp_ge_u16 vcc_lo, v127.l, v127.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_ge_u16 vcc_lo, v127.l, v127.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0xfe,0x7c,0x7c,0x7f,0x5f,0x01,0x01]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc, v127.l, v127.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W64: v_cmp_ge_u16 vcc, v127.l, v127.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0xfe,0x7c,0x7c,0x7f,0x5f,0x01,0x01]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W64: v_cmp_ge_u16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x60,0x09,0x13]
+v_cmp_ge_u16 vcc_lo, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W32: v_cmp_ge_u16 vcc_lo, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x7d,0x7c,0x81,0x60,0x09,0x13]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W64: v_cmp_ge_u16 vcc, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x7d,0x7c,0x81,0x60,0x09,0x13]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
-// W64: v_cmp_ge_u16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x7c,0x7c,0x7f,0x6f,0x05,0x30]
+v_cmp_ge_u16 vcc_lo, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// W32: v_cmp_ge_u16 vcc_lo, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x7d,0x7c,0xff,0x6f,0x05,0x30]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// W64: v_cmp_ge_u16 vcc, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x7d,0x7c,0xff,0x6f,0x05,0x30]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
 v_cmp_ge_u32 vcc_lo, v1, v2 quad_perm:[3,2,1,0]
@@ -2244,180 +2660,284 @@ v_cmp_gt_f32 vcc, -|v255|, -|v255| row_xmask:15 row_mask:0x3 bank_mask:0x0 bound
 // W64: v_cmp_gt_f32 vcc, -|v255|, -|v255| row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x29,0x7c,0xff,0x6f,0xf5,0x30]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc_lo, v1, v2 quad_perm:[3,2,1,0]
-// W32: v_cmp_gt_i16 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x1b,0x00,0xff]
+v_cmp_gt_i16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0]
+// W32: v_cmp_gt_i16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x1b,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc_lo, v1, v2 quad_perm:[0,1,2,3]
-// W32: v_cmp_gt_i16 vcc_lo, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0xe4,0x00,0xff]
+v_cmp_gt_i16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3]
+// W32: v_cmp_gt_i16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0xe4,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc_lo, v1, v2 row_mirror
-// W32: v_cmp_gt_i16 vcc_lo, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x40,0x01,0xff]
+v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_mirror
+// W32: v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x40,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc_lo, v1, v2 row_half_mirror
-// W32: v_cmp_gt_i16 vcc_lo, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x41,0x01,0xff]
+v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_half_mirror
+// W32: v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x41,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc_lo, v1, v2 row_shl:1
-// W32: v_cmp_gt_i16 vcc_lo, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x01,0x01,0xff]
+v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_shl:1
+// W32: v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x01,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc_lo, v1, v2 row_shl:15
-// W32: v_cmp_gt_i16 vcc_lo, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x0f,0x01,0xff]
+v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_shl:15
+// W32: v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x0f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc_lo, v1, v2 row_shr:1
-// W32: v_cmp_gt_i16 vcc_lo, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x11,0x01,0xff]
+v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_shr:1
+// W32: v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x11,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc_lo, v1, v2 row_shr:15
-// W32: v_cmp_gt_i16 vcc_lo, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x1f,0x01,0xff]
+v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_shr:15
+// W32: v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x1f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc_lo, v1, v2 row_ror:1
-// W32: v_cmp_gt_i16 vcc_lo, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x21,0x01,0xff]
+v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_ror:1
+// W32: v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x21,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc_lo, v1, v2 row_ror:15
-// W32: v_cmp_gt_i16 vcc_lo, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x2f,0x01,0xff]
+v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_ror:15
+// W32: v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x2f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W32: v_cmp_gt_i16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x50,0x01,0xff]
+v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x50,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W32: v_cmp_gt_i16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x5f,0x01,0x01]
+v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x5f,0x01,0x01]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W32: v_cmp_gt_i16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x60,0x09,0x13]
+v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1
+// W32: v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x60,0x09,0x13]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
-// W32: v_cmp_gt_i16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x68,0x7c,0x7f,0x6f,0x05,0x30]
+v_cmp_gt_i16 vcc_lo, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1
+// W32: v_cmp_gt_i16 vcc_lo, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x68,0x7c,0x7f,0x6f,0x05,0x30]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc, v1, v2 quad_perm:[3,2,1,0]
-// W64: v_cmp_gt_i16 vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x1b,0x00,0xff]
+v_cmp_gt_i16 vcc, v1.l, v2.l quad_perm:[3,2,1,0]
+// W64: v_cmp_gt_i16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x1b,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc, v1, v2 quad_perm:[0,1,2,3]
-// W64: v_cmp_gt_i16 vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0xe4,0x00,0xff]
+v_cmp_gt_i16 vcc, v1.l, v2.l quad_perm:[0,1,2,3]
+// W64: v_cmp_gt_i16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0xe4,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc, v1, v2 row_mirror
-// W64: v_cmp_gt_i16 vcc, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x40,0x01,0xff]
+v_cmp_gt_i16 vcc, v1.l, v2.l row_mirror
+// W64: v_cmp_gt_i16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x40,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc, v1, v2 row_half_mirror
-// W64: v_cmp_gt_i16 vcc, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x41,0x01,0xff]
+v_cmp_gt_i16 vcc, v1.l, v2.l row_half_mirror
+// W64: v_cmp_gt_i16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x41,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc, v1, v2 row_shl:1
-// W64: v_cmp_gt_i16 vcc, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x01,0x01,0xff]
+v_cmp_gt_i16 vcc, v1.l, v2.l row_shl:1
+// W64: v_cmp_gt_i16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x01,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc, v1, v2 row_shl:15
-// W64: v_cmp_gt_i16 vcc, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x0f,0x01,0xff]
+v_cmp_gt_i16 vcc, v1.l, v2.l row_shl:15
+// W64: v_cmp_gt_i16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x0f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc, v1, v2 row_shr:1
-// W64: v_cmp_gt_i16 vcc, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x11,0x01,0xff]
+v_cmp_gt_i16 vcc, v1.l, v2.l row_shr:1
+// W64: v_cmp_gt_i16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x11,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc, v1, v2 row_shr:15
-// W64: v_cmp_gt_i16 vcc, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x1f,0x01,0xff]
+v_cmp_gt_i16 vcc, v1.l, v2.l row_shr:15
+// W64: v_cmp_gt_i16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x1f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc, v1, v2 row_ror:1
-// W64: v_cmp_gt_i16 vcc, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x21,0x01,0xff]
+v_cmp_gt_i16 vcc, v1.l, v2.l row_ror:1
+// W64: v_cmp_gt_i16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x21,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc, v1, v2 row_ror:15
-// W64: v_cmp_gt_i16 vcc, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x2f,0x01,0xff]
+v_cmp_gt_i16 vcc, v1.l, v2.l row_ror:15
+// W64: v_cmp_gt_i16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x2f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W64: v_cmp_gt_i16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x50,0x01,0xff]
+v_cmp_gt_i16 vcc, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_gt_i16 vcc, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x50,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W64: v_cmp_gt_i16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x5f,0x01,0x01]
+v_cmp_gt_i16 vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W64: v_cmp_gt_i16 vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x5f,0x01,0x01]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W64: v_cmp_gt_i16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x60,0x09,0x13]
+v_cmp_gt_i16 vcc, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1
+// W64: v_cmp_gt_i16 vcc, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x60,0x09,0x13]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
-// W64: v_cmp_gt_i16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x68,0x7c,0x7f,0x6f,0x05,0x30]
+v_cmp_gt_i16 vcc, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1
+// W64: v_cmp_gt_i16 vcc, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x68,0x7c,0x7f,0x6f,0x05,0x30]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i32 vcc_lo, v1, v2 quad_perm:[3,2,1,0]
-// W32: v_cmp_gt_i32 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x88,0x7c,0x01,0x1b,0x00,0xff]
+v_cmp_gt_i16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf
+// W32: v_cmp_gt_i16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x1b,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i32 vcc_lo, v1, v2 quad_perm:[0,1,2,3]
-// W32: v_cmp_gt_i32 vcc_lo, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x88,0x7c,0x01,0xe4,0x00,0xff]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_gt_i16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf
+// W64: v_cmp_gt_i16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i32 vcc_lo, v1, v2 row_mirror
-// W32: v_cmp_gt_i32 vcc_lo, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x88,0x7c,0x01,0x40,0x01,0xff]
+v_cmp_gt_i16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf
+// W32: v_cmp_gt_i16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0xe4,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i32 vcc_lo, v1, v2 row_half_mirror
-// W32: v_cmp_gt_i32 vcc_lo, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x88,0x7c,0x01,0x41,0x01,0xff]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_gt_i16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf
+// W64: v_cmp_gt_i16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0xe4,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i32 vcc_lo, v1, v2 row_shl:1
-// W32: v_cmp_gt_i32 vcc_lo, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x88,0x7c,0x01,0x01,0x01,0xff]
+v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf
+// W32: v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x40,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i32 vcc_lo, v1, v2 row_shl:15
-// W32: v_cmp_gt_i32 vcc_lo, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x88,0x7c,0x01,0x0f,0x01,0xff]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_gt_i16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf
+// W64: v_cmp_gt_i16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x40,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i32 vcc_lo, v1, v2 row_shr:1
-// W32: v_cmp_gt_i32 vcc_lo, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x88,0x7c,0x01,0x11,0x01,0xff]
+v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf
+// W32: v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x41,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i32 vcc_lo, v1, v2 row_shr:15
-// W32: v_cmp_gt_i32 vcc_lo, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x88,0x7c,0x01,0x1f,0x01,0xff]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_gt_i16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf
+// W64: v_cmp_gt_i16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x41,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i32 vcc_lo, v1, v2 row_ror:1
-// W32: v_cmp_gt_i32 vcc_lo, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x88,0x7c,0x01,0x21,0x01,0xff]
+v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x01,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i32 vcc_lo, v1, v2 row_ror:15
-// W32: v_cmp_gt_i32 vcc_lo, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x88,0x7c,0x01,0x2f,0x01,0xff]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_gt_i16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_gt_i16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x01,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i32 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W32: v_cmp_gt_i32 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x88,0x7c,0x01,0x50,0x01,0xff]
+v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x0f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i32 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W32: v_cmp_gt_i32 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x88,0x7c,0x01,0x5f,0x01,0x01]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_gt_i16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_gt_i16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x0f,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i32 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W32: v_cmp_gt_i32 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x88,0x7c,0x01,0x60,0x09,0x13]
+v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x11,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i32 vcc_lo, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
-// W32: v_cmp_gt_i32 vcc_lo, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x89,0x7c,0xff,0x6f,0x05,0x30]
+v_cmp_gt_i16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_gt_i16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x11,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x1f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i32 vcc, v1, v2 quad_perm:[3,2,1,0]
-// W64: v_cmp_gt_i32 vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x88,0x7c,0x01,0x1b,0x00,0xff]
+v_cmp_gt_i16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_gt_i16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x1f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i32 vcc, v1, v2 quad_perm:[0,1,2,3]
-// W64: v_cmp_gt_i32 vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x88,0x7c,0x01,0xe4,0x00,0xff]
+v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x21,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_gt_i16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x21,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x2f,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_gt_i16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x2f,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc_lo, v127.l, v127.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_gt_i16 vcc_lo, v127.l, v127.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0xfe,0x68,0x7c,0x7f,0x5f,0x01,0x01]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc, v127.l, v127.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W64: v_cmp_gt_i16 vcc, v127.l, v127.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0xfe,0x68,0x7c,0x7f,0x5f,0x01,0x01]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc_lo, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W32: v_cmp_gt_i16 vcc_lo, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x69,0x7c,0x81,0x60,0x09,0x13]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W64: v_cmp_gt_i16 vcc, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x69,0x7c,0x81,0x60,0x09,0x13]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc_lo, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// W32: v_cmp_gt_i16 vcc_lo, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x69,0x7c,0xff,0x6f,0x05,0x30]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// W64: v_cmp_gt_i16 vcc, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x69,0x7c,0xff,0x6f,0x05,0x30]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i32 vcc_lo, v1, v2 quad_perm:[3,2,1,0]
+// W32: v_cmp_gt_i32 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x88,0x7c,0x01,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i32 vcc_lo, v1, v2 quad_perm:[0,1,2,3]
+// W32: v_cmp_gt_i32 vcc_lo, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x88,0x7c,0x01,0xe4,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i32 vcc_lo, v1, v2 row_mirror
+// W32: v_cmp_gt_i32 vcc_lo, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x88,0x7c,0x01,0x40,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i32 vcc_lo, v1, v2 row_half_mirror
+// W32: v_cmp_gt_i32 vcc_lo, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x88,0x7c,0x01,0x41,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i32 vcc_lo, v1, v2 row_shl:1
+// W32: v_cmp_gt_i32 vcc_lo, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x88,0x7c,0x01,0x01,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i32 vcc_lo, v1, v2 row_shl:15
+// W32: v_cmp_gt_i32 vcc_lo, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x88,0x7c,0x01,0x0f,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i32 vcc_lo, v1, v2 row_shr:1
+// W32: v_cmp_gt_i32 vcc_lo, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x88,0x7c,0x01,0x11,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i32 vcc_lo, v1, v2 row_shr:15
+// W32: v_cmp_gt_i32 vcc_lo, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x88,0x7c,0x01,0x1f,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i32 vcc_lo, v1, v2 row_ror:1
+// W32: v_cmp_gt_i32 vcc_lo, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x88,0x7c,0x01,0x21,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i32 vcc_lo, v1, v2 row_ror:15
+// W32: v_cmp_gt_i32 vcc_lo, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x88,0x7c,0x01,0x2f,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i32 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_gt_i32 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x88,0x7c,0x01,0x50,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i32 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_gt_i32 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x88,0x7c,0x01,0x5f,0x01,0x01]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i32 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W32: v_cmp_gt_i32 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x88,0x7c,0x01,0x60,0x09,0x13]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i32 vcc_lo, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// W32: v_cmp_gt_i32 vcc_lo, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x89,0x7c,0xff,0x6f,0x05,0x30]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i32 vcc, v1, v2 quad_perm:[3,2,1,0]
+// W64: v_cmp_gt_i32 vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x88,0x7c,0x01,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i32 vcc, v1, v2 quad_perm:[0,1,2,3]
+// W64: v_cmp_gt_i32 vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x88,0x7c,0x01,0xe4,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
 v_cmp_gt_i32 vcc, v1, v2 row_mirror
@@ -2468,116 +2988,220 @@ v_cmp_gt_i32 vcc, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:
 // W64: v_cmp_gt_i32 vcc, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x89,0x7c,0xff,0x6f,0x05,0x30]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc_lo, v1, v2 quad_perm:[3,2,1,0]
-// W32: v_cmp_gt_u16 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x1b,0x00,0xff]
+v_cmp_gt_u16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0]
+// W32: v_cmp_gt_u16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x1b,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc_lo, v1, v2 quad_perm:[0,1,2,3]
-// W32: v_cmp_gt_u16 vcc_lo, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0xe4,0x00,0xff]
+v_cmp_gt_u16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3]
+// W32: v_cmp_gt_u16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0xe4,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc_lo, v1, v2 row_mirror
-// W32: v_cmp_gt_u16 vcc_lo, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x40,0x01,0xff]
+v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_mirror
+// W32: v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x40,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc_lo, v1, v2 row_half_mirror
-// W32: v_cmp_gt_u16 vcc_lo, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x41,0x01,0xff]
+v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_half_mirror
+// W32: v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x41,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc_lo, v1, v2 row_shl:1
-// W32: v_cmp_gt_u16 vcc_lo, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x01,0x01,0xff]
+v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_shl:1
+// W32: v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x01,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc_lo, v1, v2 row_shl:15
-// W32: v_cmp_gt_u16 vcc_lo, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x0f,0x01,0xff]
+v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_shl:15
+// W32: v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x0f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc_lo, v1, v2 row_shr:1
-// W32: v_cmp_gt_u16 vcc_lo, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x11,0x01,0xff]
+v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_shr:1
+// W32: v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x11,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc_lo, v1, v2 row_shr:15
-// W32: v_cmp_gt_u16 vcc_lo, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x1f,0x01,0xff]
+v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_shr:15
+// W32: v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x1f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc_lo, v1, v2 row_ror:1
-// W32: v_cmp_gt_u16 vcc_lo, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x21,0x01,0xff]
+v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_ror:1
+// W32: v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x21,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc_lo, v1, v2 row_ror:15
-// W32: v_cmp_gt_u16 vcc_lo, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x2f,0x01,0xff]
+v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_ror:15
+// W32: v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x2f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W32: v_cmp_gt_u16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x50,0x01,0xff]
+v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x50,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W32: v_cmp_gt_u16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x5f,0x01,0x01]
+v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x5f,0x01,0x01]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W32: v_cmp_gt_u16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x60,0x09,0x13]
+v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1
+// W32: v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x60,0x09,0x13]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
-// W32: v_cmp_gt_u16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x78,0x7c,0x7f,0x6f,0x05,0x30]
+v_cmp_gt_u16 vcc_lo, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1
+// W32: v_cmp_gt_u16 vcc_lo, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x78,0x7c,0x7f,0x6f,0x05,0x30]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc, v1, v2 quad_perm:[3,2,1,0]
-// W64: v_cmp_gt_u16 vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x1b,0x00,0xff]
+v_cmp_gt_u16 vcc, v1.l, v2.l quad_perm:[3,2,1,0]
+// W64: v_cmp_gt_u16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc, v1.l, v2.l quad_perm:[0,1,2,3]
+// W64: v_cmp_gt_u16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0xe4,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc, v1.l, v2.l row_mirror
+// W64: v_cmp_gt_u16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x40,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc, v1, v2 quad_perm:[0,1,2,3]
-// W64: v_cmp_gt_u16 vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0xe4,0x00,0xff]
+v_cmp_gt_u16 vcc, v1.l, v2.l row_half_mirror
+// W64: v_cmp_gt_u16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x41,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc, v1, v2 row_mirror
-// W64: v_cmp_gt_u16 vcc, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x40,0x01,0xff]
+v_cmp_gt_u16 vcc, v1.l, v2.l row_shl:1
+// W64: v_cmp_gt_u16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x01,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc, v1, v2 row_half_mirror
-// W64: v_cmp_gt_u16 vcc, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x41,0x01,0xff]
+v_cmp_gt_u16 vcc, v1.l, v2.l row_shl:15
+// W64: v_cmp_gt_u16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x0f,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc, v1.l, v2.l row_shr:1
+// W64: v_cmp_gt_u16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x11,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc, v1.l, v2.l row_shr:15
+// W64: v_cmp_gt_u16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x1f,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc, v1.l, v2.l row_ror:1
+// W64: v_cmp_gt_u16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x21,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc, v1.l, v2.l row_ror:15
+// W64: v_cmp_gt_u16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x2f,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_gt_u16 vcc, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x50,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W64: v_cmp_gt_u16 vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x5f,0x01,0x01]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1
+// W64: v_cmp_gt_u16 vcc, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x60,0x09,0x13]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1
+// W64: v_cmp_gt_u16 vcc, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x78,0x7c,0x7f,0x6f,0x05,0x30]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf
+// W32: v_cmp_gt_u16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf
+// W64: v_cmp_gt_u16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf
+// W32: v_cmp_gt_u16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0xe4,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf
+// W64: v_cmp_gt_u16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0xe4,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf
+// W32: v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x40,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf
+// W64: v_cmp_gt_u16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x40,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc, v1, v2 row_shl:1
-// W64: v_cmp_gt_u16 vcc, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x01,0x01,0xff]
+v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf
+// W32: v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x41,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf
+// W64: v_cmp_gt_u16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x41,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc, v1, v2 row_shl:15
-// W64: v_cmp_gt_u16 vcc, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x0f,0x01,0xff]
+v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x01,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_gt_u16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x01,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc, v1, v2 row_shr:1
-// W64: v_cmp_gt_u16 vcc, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x11,0x01,0xff]
+v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x0f,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_gt_u16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x0f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc, v1, v2 row_shr:15
-// W64: v_cmp_gt_u16 vcc, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x1f,0x01,0xff]
+v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x11,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_gt_u16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x11,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc, v1, v2 row_ror:1
-// W64: v_cmp_gt_u16 vcc, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x21,0x01,0xff]
+v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x1f,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_gt_u16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x1f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc, v1, v2 row_ror:15
-// W64: v_cmp_gt_u16 vcc, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x2f,0x01,0xff]
+v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x21,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_gt_u16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x21,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W64: v_cmp_gt_u16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x50,0x01,0xff]
+v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x2f,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_gt_u16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x2f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W64: v_cmp_gt_u16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x5f,0x01,0x01]
+v_cmp_gt_u16 vcc_lo, v127.l, v127.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_gt_u16 vcc_lo, v127.l, v127.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0xfe,0x78,0x7c,0x7f,0x5f,0x01,0x01]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc, v127.l, v127.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W64: v_cmp_gt_u16 vcc, v127.l, v127.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0xfe,0x78,0x7c,0x7f,0x5f,0x01,0x01]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W64: v_cmp_gt_u16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x60,0x09,0x13]
+v_cmp_gt_u16 vcc_lo, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W32: v_cmp_gt_u16 vcc_lo, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x79,0x7c,0x81,0x60,0x09,0x13]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W64: v_cmp_gt_u16 vcc, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x79,0x7c,0x81,0x60,0x09,0x13]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
-// W64: v_cmp_gt_u16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x78,0x7c,0x7f,0x6f,0x05,0x30]
+v_cmp_gt_u16 vcc_lo, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// W32: v_cmp_gt_u16 vcc_lo, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x79,0x7c,0xff,0x6f,0x05,0x30]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// W64: v_cmp_gt_u16 vcc, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x79,0x7c,0xff,0x6f,0x05,0x30]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
 v_cmp_gt_u32 vcc_lo, v1, v2 quad_perm:[3,2,1,0]
@@ -2916,116 +3540,220 @@ v_cmp_le_f32 vcc, -|v255|, -|v255| row_xmask:15 row_mask:0x3 bank_mask:0x0 bound
 // W64: v_cmp_le_f32 vcc, -|v255|, -|v255| row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x27,0x7c,0xff,0x6f,0xf5,0x30]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc_lo, v1, v2 quad_perm:[3,2,1,0]
-// W32: v_cmp_le_i16 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x1b,0x00,0xff]
+v_cmp_le_i16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0]
+// W32: v_cmp_le_i16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x1b,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc_lo, v1, v2 quad_perm:[0,1,2,3]
-// W32: v_cmp_le_i16 vcc_lo, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0xe4,0x00,0xff]
+v_cmp_le_i16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3]
+// W32: v_cmp_le_i16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0xe4,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc_lo, v1, v2 row_mirror
-// W32: v_cmp_le_i16 vcc_lo, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x40,0x01,0xff]
+v_cmp_le_i16 vcc_lo, v1.l, v2.l row_mirror
+// W32: v_cmp_le_i16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x40,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc_lo, v1, v2 row_half_mirror
-// W32: v_cmp_le_i16 vcc_lo, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x41,0x01,0xff]
+v_cmp_le_i16 vcc_lo, v1.l, v2.l row_half_mirror
+// W32: v_cmp_le_i16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x41,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc_lo, v1, v2 row_shl:1
-// W32: v_cmp_le_i16 vcc_lo, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x01,0x01,0xff]
+v_cmp_le_i16 vcc_lo, v1.l, v2.l row_shl:1
+// W32: v_cmp_le_i16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x01,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc_lo, v1, v2 row_shl:15
-// W32: v_cmp_le_i16 vcc_lo, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x0f,0x01,0xff]
+v_cmp_le_i16 vcc_lo, v1.l, v2.l row_shl:15
+// W32: v_cmp_le_i16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x0f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc_lo, v1, v2 row_shr:1
-// W32: v_cmp_le_i16 vcc_lo, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x11,0x01,0xff]
+v_cmp_le_i16 vcc_lo, v1.l, v2.l row_shr:1
+// W32: v_cmp_le_i16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x11,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc_lo, v1, v2 row_shr:15
-// W32: v_cmp_le_i16 vcc_lo, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x1f,0x01,0xff]
+v_cmp_le_i16 vcc_lo, v1.l, v2.l row_shr:15
+// W32: v_cmp_le_i16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x1f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc_lo, v1, v2 row_ror:1
-// W32: v_cmp_le_i16 vcc_lo, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x21,0x01,0xff]
+v_cmp_le_i16 vcc_lo, v1.l, v2.l row_ror:1
+// W32: v_cmp_le_i16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x21,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc_lo, v1, v2 row_ror:15
-// W32: v_cmp_le_i16 vcc_lo, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x2f,0x01,0xff]
+v_cmp_le_i16 vcc_lo, v1.l, v2.l row_ror:15
+// W32: v_cmp_le_i16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x2f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W32: v_cmp_le_i16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x50,0x01,0xff]
+v_cmp_le_i16 vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_le_i16 vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x50,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W32: v_cmp_le_i16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x5f,0x01,0x01]
+v_cmp_le_i16 vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_le_i16 vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x5f,0x01,0x01]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W32: v_cmp_le_i16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x60,0x09,0x13]
+v_cmp_le_i16 vcc_lo, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1
+// W32: v_cmp_le_i16 vcc_lo, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x60,0x09,0x13]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
-// W32: v_cmp_le_i16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x66,0x7c,0x7f,0x6f,0x05,0x30]
+v_cmp_le_i16 vcc_lo, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1
+// W32: v_cmp_le_i16 vcc_lo, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x66,0x7c,0x7f,0x6f,0x05,0x30]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc, v1, v2 quad_perm:[3,2,1,0]
-// W64: v_cmp_le_i16 vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x1b,0x00,0xff]
+v_cmp_le_i16 vcc, v1.l, v2.l quad_perm:[3,2,1,0]
+// W64: v_cmp_le_i16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc, v1.l, v2.l quad_perm:[0,1,2,3]
+// W64: v_cmp_le_i16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0xe4,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc, v1.l, v2.l row_mirror
+// W64: v_cmp_le_i16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x40,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc, v1.l, v2.l row_half_mirror
+// W64: v_cmp_le_i16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x41,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc, v1.l, v2.l row_shl:1
+// W64: v_cmp_le_i16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x01,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc, v1.l, v2.l row_shl:15
+// W64: v_cmp_le_i16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x0f,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc, v1.l, v2.l row_shr:1
+// W64: v_cmp_le_i16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x11,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc, v1.l, v2.l row_shr:15
+// W64: v_cmp_le_i16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x1f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc, v1, v2 quad_perm:[0,1,2,3]
-// W64: v_cmp_le_i16 vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0xe4,0x00,0xff]
+v_cmp_le_i16 vcc, v1.l, v2.l row_ror:1
+// W64: v_cmp_le_i16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x21,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc, v1, v2 row_mirror
-// W64: v_cmp_le_i16 vcc, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x40,0x01,0xff]
+v_cmp_le_i16 vcc, v1.l, v2.l row_ror:15
+// W64: v_cmp_le_i16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x2f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc, v1, v2 row_half_mirror
-// W64: v_cmp_le_i16 vcc, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x41,0x01,0xff]
+v_cmp_le_i16 vcc, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_le_i16 vcc, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x50,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc, v1, v2 row_shl:1
-// W64: v_cmp_le_i16 vcc, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x01,0x01,0xff]
+v_cmp_le_i16 vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W64: v_cmp_le_i16 vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x5f,0x01,0x01]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc, v1, v2 row_shl:15
-// W64: v_cmp_le_i16 vcc, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x0f,0x01,0xff]
+v_cmp_le_i16 vcc, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1
+// W64: v_cmp_le_i16 vcc, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x60,0x09,0x13]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc, v1, v2 row_shr:1
-// W64: v_cmp_le_i16 vcc, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x11,0x01,0xff]
+v_cmp_le_i16 vcc, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1
+// W64: v_cmp_le_i16 vcc, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x66,0x7c,0x7f,0x6f,0x05,0x30]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc, v1, v2 row_shr:15
-// W64: v_cmp_le_i16 vcc, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x1f,0x01,0xff]
+v_cmp_le_i16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf
+// W32: v_cmp_le_i16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf
+// W64: v_cmp_le_i16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x1b,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc, v1, v2 row_ror:1
-// W64: v_cmp_le_i16 vcc, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x21,0x01,0xff]
+v_cmp_le_i16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf
+// W32: v_cmp_le_i16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0xe4,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf
+// W64: v_cmp_le_i16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0xe4,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf
+// W32: v_cmp_le_i16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x40,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf
+// W64: v_cmp_le_i16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x40,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc, v1, v2 row_ror:15
-// W64: v_cmp_le_i16 vcc, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x2f,0x01,0xff]
+v_cmp_le_i16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf
+// W32: v_cmp_le_i16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x41,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf
+// W64: v_cmp_le_i16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x41,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W64: v_cmp_le_i16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x50,0x01,0xff]
+v_cmp_le_i16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_le_i16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x01,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_le_i16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x01,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W64: v_cmp_le_i16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x5f,0x01,0x01]
+v_cmp_le_i16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_le_i16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x0f,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_le_i16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x0f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W64: v_cmp_le_i16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x60,0x09,0x13]
+v_cmp_le_i16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_le_i16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x11,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_le_i16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x11,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
-// W64: v_cmp_le_i16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x66,0x7c,0x7f,0x6f,0x05,0x30]
+v_cmp_le_i16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_le_i16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x1f,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_le_i16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x1f,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_le_i16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x21,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_le_i16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x21,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_le_i16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x2f,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_le_i16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x2f,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc_lo, v127.l, v127.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_le_i16 vcc_lo, v127.l, v127.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0xfe,0x66,0x7c,0x7f,0x5f,0x01,0x01]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc, v127.l, v127.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W64: v_cmp_le_i16 vcc, v127.l, v127.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0xfe,0x66,0x7c,0x7f,0x5f,0x01,0x01]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc_lo, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W32: v_cmp_le_i16 vcc_lo, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x67,0x7c,0x81,0x60,0x09,0x13]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W64: v_cmp_le_i16 vcc, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x67,0x7c,0x81,0x60,0x09,0x13]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc_lo, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// W32: v_cmp_le_i16 vcc_lo, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x67,0x7c,0xff,0x6f,0x05,0x30]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// W64: v_cmp_le_i16 vcc, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x67,0x7c,0xff,0x6f,0x05,0x30]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
 v_cmp_le_i32 vcc_lo, v1, v2 quad_perm:[3,2,1,0]
@@ -3140,116 +3868,220 @@ v_cmp_le_i32 vcc, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:
 // W64: v_cmp_le_i32 vcc, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x87,0x7c,0xff,0x6f,0x05,0x30]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc_lo, v1, v2 quad_perm:[3,2,1,0]
-// W32: v_cmp_le_u16 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x1b,0x00,0xff]
+v_cmp_le_u16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0]
+// W32: v_cmp_le_u16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x1b,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc_lo, v1, v2 quad_perm:[0,1,2,3]
-// W32: v_cmp_le_u16 vcc_lo, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0xe4,0x00,0xff]
+v_cmp_le_u16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3]
+// W32: v_cmp_le_u16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0xe4,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc_lo, v1, v2 row_mirror
-// W32: v_cmp_le_u16 vcc_lo, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x40,0x01,0xff]
+v_cmp_le_u16 vcc_lo, v1.l, v2.l row_mirror
+// W32: v_cmp_le_u16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x40,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc_lo, v1, v2 row_half_mirror
-// W32: v_cmp_le_u16 vcc_lo, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x41,0x01,0xff]
+v_cmp_le_u16 vcc_lo, v1.l, v2.l row_half_mirror
+// W32: v_cmp_le_u16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x41,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc_lo, v1, v2 row_shl:1
-// W32: v_cmp_le_u16 vcc_lo, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x01,0x01,0xff]
+v_cmp_le_u16 vcc_lo, v1.l, v2.l row_shl:1
+// W32: v_cmp_le_u16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x01,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc_lo, v1, v2 row_shl:15
-// W32: v_cmp_le_u16 vcc_lo, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x0f,0x01,0xff]
+v_cmp_le_u16 vcc_lo, v1.l, v2.l row_shl:15
+// W32: v_cmp_le_u16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x0f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc_lo, v1, v2 row_shr:1
-// W32: v_cmp_le_u16 vcc_lo, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x11,0x01,0xff]
+v_cmp_le_u16 vcc_lo, v1.l, v2.l row_shr:1
+// W32: v_cmp_le_u16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x11,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc_lo, v1, v2 row_shr:15
-// W32: v_cmp_le_u16 vcc_lo, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x1f,0x01,0xff]
+v_cmp_le_u16 vcc_lo, v1.l, v2.l row_shr:15
+// W32: v_cmp_le_u16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x1f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc_lo, v1, v2 row_ror:1
-// W32: v_cmp_le_u16 vcc_lo, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x21,0x01,0xff]
+v_cmp_le_u16 vcc_lo, v1.l, v2.l row_ror:1
+// W32: v_cmp_le_u16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x21,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc_lo, v1, v2 row_ror:15
-// W32: v_cmp_le_u16 vcc_lo, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x2f,0x01,0xff]
+v_cmp_le_u16 vcc_lo, v1.l, v2.l row_ror:15
+// W32: v_cmp_le_u16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x2f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W32: v_cmp_le_u16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x50,0x01,0xff]
+v_cmp_le_u16 vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_le_u16 vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x50,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W32: v_cmp_le_u16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x5f,0x01,0x01]
+v_cmp_le_u16 vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_le_u16 vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x5f,0x01,0x01]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W32: v_cmp_le_u16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x60,0x09,0x13]
+v_cmp_le_u16 vcc_lo, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1
+// W32: v_cmp_le_u16 vcc_lo, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x60,0x09,0x13]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
-// W32: v_cmp_le_u16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x76,0x7c,0x7f,0x6f,0x05,0x30]
+v_cmp_le_u16 vcc_lo, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1
+// W32: v_cmp_le_u16 vcc_lo, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x76,0x7c,0x7f,0x6f,0x05,0x30]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc, v1, v2 quad_perm:[3,2,1,0]
-// W64: v_cmp_le_u16 vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x1b,0x00,0xff]
+v_cmp_le_u16 vcc, v1.l, v2.l quad_perm:[3,2,1,0]
+// W64: v_cmp_le_u16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc, v1.l, v2.l quad_perm:[0,1,2,3]
+// W64: v_cmp_le_u16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0xe4,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc, v1.l, v2.l row_mirror
+// W64: v_cmp_le_u16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x40,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc, v1, v2 quad_perm:[0,1,2,3]
-// W64: v_cmp_le_u16 vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0xe4,0x00,0xff]
+v_cmp_le_u16 vcc, v1.l, v2.l row_half_mirror
+// W64: v_cmp_le_u16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x41,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc, v1, v2 row_mirror
-// W64: v_cmp_le_u16 vcc, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x40,0x01,0xff]
+v_cmp_le_u16 vcc, v1.l, v2.l row_shl:1
+// W64: v_cmp_le_u16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x01,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc, v1, v2 row_half_mirror
-// W64: v_cmp_le_u16 vcc, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x41,0x01,0xff]
+v_cmp_le_u16 vcc, v1.l, v2.l row_shl:15
+// W64: v_cmp_le_u16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x0f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc, v1, v2 row_shl:1
-// W64: v_cmp_le_u16 vcc, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x01,0x01,0xff]
+v_cmp_le_u16 vcc, v1.l, v2.l row_shr:1
+// W64: v_cmp_le_u16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x11,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc, v1, v2 row_shl:15
-// W64: v_cmp_le_u16 vcc, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x0f,0x01,0xff]
+v_cmp_le_u16 vcc, v1.l, v2.l row_shr:15
+// W64: v_cmp_le_u16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x1f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc, v1, v2 row_shr:1
-// W64: v_cmp_le_u16 vcc, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x11,0x01,0xff]
+v_cmp_le_u16 vcc, v1.l, v2.l row_ror:1
+// W64: v_cmp_le_u16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x21,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc, v1.l, v2.l row_ror:15
+// W64: v_cmp_le_u16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x2f,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_le_u16 vcc, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x50,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W64: v_cmp_le_u16 vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x5f,0x01,0x01]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1
+// W64: v_cmp_le_u16 vcc, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x60,0x09,0x13]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1
+// W64: v_cmp_le_u16 vcc, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x76,0x7c,0x7f,0x6f,0x05,0x30]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf
+// W32: v_cmp_le_u16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf
+// W64: v_cmp_le_u16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf
+// W32: v_cmp_le_u16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0xe4,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf
+// W64: v_cmp_le_u16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0xe4,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf
+// W32: v_cmp_le_u16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x40,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf
+// W64: v_cmp_le_u16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x40,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf
+// W32: v_cmp_le_u16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x41,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf
+// W64: v_cmp_le_u16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x41,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_le_u16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x01,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_le_u16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x01,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_le_u16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x0f,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_le_u16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x0f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc, v1, v2 row_shr:15
-// W64: v_cmp_le_u16 vcc, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x1f,0x01,0xff]
+v_cmp_le_u16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_le_u16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x11,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_le_u16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x11,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc, v1, v2 row_ror:1
-// W64: v_cmp_le_u16 vcc, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x21,0x01,0xff]
+v_cmp_le_u16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_le_u16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x1f,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_le_u16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x1f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc, v1, v2 row_ror:15
-// W64: v_cmp_le_u16 vcc, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x2f,0x01,0xff]
+v_cmp_le_u16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_le_u16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x21,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_le_u16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x21,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W64: v_cmp_le_u16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x50,0x01,0xff]
+v_cmp_le_u16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_le_u16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x2f,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_le_u16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x2f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W64: v_cmp_le_u16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x5f,0x01,0x01]
+v_cmp_le_u16 vcc_lo, v127.l, v127.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_le_u16 vcc_lo, v127.l, v127.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0xfe,0x76,0x7c,0x7f,0x5f,0x01,0x01]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc, v127.l, v127.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W64: v_cmp_le_u16 vcc, v127.l, v127.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0xfe,0x76,0x7c,0x7f,0x5f,0x01,0x01]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W64: v_cmp_le_u16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x60,0x09,0x13]
+v_cmp_le_u16 vcc_lo, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W32: v_cmp_le_u16 vcc_lo, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x77,0x7c,0x81,0x60,0x09,0x13]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W64: v_cmp_le_u16 vcc, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x77,0x7c,0x81,0x60,0x09,0x13]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
-// W64: v_cmp_le_u16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x76,0x7c,0x7f,0x6f,0x05,0x30]
+v_cmp_le_u16 vcc_lo, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// W32: v_cmp_le_u16 vcc_lo, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x77,0x7c,0xff,0x6f,0x05,0x30]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// W64: v_cmp_le_u16 vcc, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x77,0x7c,0xff,0x6f,0x05,0x30]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
 v_cmp_le_u32 vcc_lo, v1, v2 quad_perm:[3,2,1,0]
@@ -3916,116 +4748,220 @@ v_cmp_lt_f32 vcc, -|v255|, -|v255| row_xmask:15 row_mask:0x3 bank_mask:0x0 bound
 // W64: v_cmp_lt_f32 vcc, -|v255|, -|v255| row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x23,0x7c,0xff,0x6f,0xf5,0x30]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc_lo, v1, v2 quad_perm:[3,2,1,0]
-// W32: v_cmp_lt_i16 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x1b,0x00,0xff]
+v_cmp_lt_i16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0]
+// W32: v_cmp_lt_i16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x1b,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc_lo, v1, v2 quad_perm:[0,1,2,3]
-// W32: v_cmp_lt_i16 vcc_lo, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0xe4,0x00,0xff]
+v_cmp_lt_i16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3]
+// W32: v_cmp_lt_i16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0xe4,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc_lo, v1, v2 row_mirror
-// W32: v_cmp_lt_i16 vcc_lo, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x40,0x01,0xff]
+v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_mirror
+// W32: v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x40,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc_lo, v1, v2 row_half_mirror
-// W32: v_cmp_lt_i16 vcc_lo, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x41,0x01,0xff]
+v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_half_mirror
+// W32: v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x41,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc_lo, v1, v2 row_shl:1
-// W32: v_cmp_lt_i16 vcc_lo, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x01,0x01,0xff]
+v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_shl:1
+// W32: v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x01,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc_lo, v1, v2 row_shl:15
-// W32: v_cmp_lt_i16 vcc_lo, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x0f,0x01,0xff]
+v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_shl:15
+// W32: v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x0f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc_lo, v1, v2 row_shr:1
-// W32: v_cmp_lt_i16 vcc_lo, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x11,0x01,0xff]
+v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_shr:1
+// W32: v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x11,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc_lo, v1, v2 row_shr:15
-// W32: v_cmp_lt_i16 vcc_lo, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x1f,0x01,0xff]
+v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_shr:15
+// W32: v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x1f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc_lo, v1, v2 row_ror:1
-// W32: v_cmp_lt_i16 vcc_lo, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x21,0x01,0xff]
+v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_ror:1
+// W32: v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x21,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc_lo, v1, v2 row_ror:15
-// W32: v_cmp_lt_i16 vcc_lo, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x2f,0x01,0xff]
+v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_ror:15
+// W32: v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x2f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W32: v_cmp_lt_i16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x50,0x01,0xff]
+v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x50,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W32: v_cmp_lt_i16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x5f,0x01,0x01]
+v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x5f,0x01,0x01]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W32: v_cmp_lt_i16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x60,0x09,0x13]
+v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1
+// W32: v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x60,0x09,0x13]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
-// W32: v_cmp_lt_i16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x62,0x7c,0x7f,0x6f,0x05,0x30]
+v_cmp_lt_i16 vcc_lo, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1
+// W32: v_cmp_lt_i16 vcc_lo, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x62,0x7c,0x7f,0x6f,0x05,0x30]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc, v1, v2 quad_perm:[3,2,1,0]
-// W64: v_cmp_lt_i16 vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x1b,0x00,0xff]
+v_cmp_lt_i16 vcc, v1.l, v2.l quad_perm:[3,2,1,0]
+// W64: v_cmp_lt_i16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc, v1.l, v2.l quad_perm:[0,1,2,3]
+// W64: v_cmp_lt_i16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0xe4,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc, v1.l, v2.l row_mirror
+// W64: v_cmp_lt_i16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x40,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc, v1.l, v2.l row_half_mirror
+// W64: v_cmp_lt_i16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x41,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc, v1.l, v2.l row_shl:1
+// W64: v_cmp_lt_i16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x01,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc, v1.l, v2.l row_shl:15
+// W64: v_cmp_lt_i16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x0f,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc, v1.l, v2.l row_shr:1
+// W64: v_cmp_lt_i16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x11,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc, v1.l, v2.l row_shr:15
+// W64: v_cmp_lt_i16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x1f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc, v1, v2 quad_perm:[0,1,2,3]
-// W64: v_cmp_lt_i16 vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0xe4,0x00,0xff]
+v_cmp_lt_i16 vcc, v1.l, v2.l row_ror:1
+// W64: v_cmp_lt_i16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x21,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc, v1, v2 row_mirror
-// W64: v_cmp_lt_i16 vcc, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x40,0x01,0xff]
+v_cmp_lt_i16 vcc, v1.l, v2.l row_ror:15
+// W64: v_cmp_lt_i16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x2f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc, v1, v2 row_half_mirror
-// W64: v_cmp_lt_i16 vcc, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x41,0x01,0xff]
+v_cmp_lt_i16 vcc, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_lt_i16 vcc, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x50,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc, v1, v2 row_shl:1
-// W64: v_cmp_lt_i16 vcc, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x01,0x01,0xff]
+v_cmp_lt_i16 vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W64: v_cmp_lt_i16 vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x5f,0x01,0x01]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc, v1, v2 row_shl:15
-// W64: v_cmp_lt_i16 vcc, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x0f,0x01,0xff]
+v_cmp_lt_i16 vcc, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1
+// W64: v_cmp_lt_i16 vcc, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x60,0x09,0x13]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc, v1, v2 row_shr:1
-// W64: v_cmp_lt_i16 vcc, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x11,0x01,0xff]
+v_cmp_lt_i16 vcc, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1
+// W64: v_cmp_lt_i16 vcc, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x62,0x7c,0x7f,0x6f,0x05,0x30]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc, v1, v2 row_shr:15
-// W64: v_cmp_lt_i16 vcc, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x1f,0x01,0xff]
+v_cmp_lt_i16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf
+// W32: v_cmp_lt_i16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf
+// W64: v_cmp_lt_i16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf
+// W32: v_cmp_lt_i16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0xe4,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf
+// W64: v_cmp_lt_i16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0xe4,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf
+// W32: v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x40,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf
+// W64: v_cmp_lt_i16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x40,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf
+// W32: v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x41,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf
+// W64: v_cmp_lt_i16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x41,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc, v1, v2 row_ror:1
-// W64: v_cmp_lt_i16 vcc, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x21,0x01,0xff]
+v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x01,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_lt_i16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x01,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc, v1, v2 row_ror:15
-// W64: v_cmp_lt_i16 vcc, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x2f,0x01,0xff]
+v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x0f,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_lt_i16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x0f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W64: v_cmp_lt_i16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x50,0x01,0xff]
+v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x11,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_lt_i16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x11,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W64: v_cmp_lt_i16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x5f,0x01,0x01]
+v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x1f,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_lt_i16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x1f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W64: v_cmp_lt_i16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x60,0x09,0x13]
+v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x21,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_lt_i16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x21,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
-// W64: v_cmp_lt_i16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x62,0x7c,0x7f,0x6f,0x05,0x30]
+v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x2f,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_lt_i16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x2f,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc_lo, v127.l, v127.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_lt_i16 vcc_lo, v127.l, v127.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0xfe,0x62,0x7c,0x7f,0x5f,0x01,0x01]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc, v127.l, v127.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W64: v_cmp_lt_i16 vcc, v127.l, v127.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0xfe,0x62,0x7c,0x7f,0x5f,0x01,0x01]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc_lo, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W32: v_cmp_lt_i16 vcc_lo, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x63,0x7c,0x81,0x60,0x09,0x13]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W64: v_cmp_lt_i16 vcc, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x63,0x7c,0x81,0x60,0x09,0x13]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc_lo, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// W32: v_cmp_lt_i16 vcc_lo, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x63,0x7c,0xff,0x6f,0x05,0x30]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// W64: v_cmp_lt_i16 vcc, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x63,0x7c,0xff,0x6f,0x05,0x30]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
 v_cmp_lt_i32 vcc_lo, v1, v2 quad_perm:[3,2,1,0]
@@ -4140,116 +5076,220 @@ v_cmp_lt_i32 vcc, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:
 // W64: v_cmp_lt_i32 vcc, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x83,0x7c,0xff,0x6f,0x05,0x30]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc_lo, v1, v2 quad_perm:[3,2,1,0]
-// W32: v_cmp_lt_u16 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x1b,0x00,0xff]
+v_cmp_lt_u16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0]
+// W32: v_cmp_lt_u16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x1b,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc_lo, v1, v2 quad_perm:[0,1,2,3]
-// W32: v_cmp_lt_u16 vcc_lo, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0xe4,0x00,0xff]
+v_cmp_lt_u16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3]
+// W32: v_cmp_lt_u16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0xe4,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc_lo, v1, v2 row_mirror
-// W32: v_cmp_lt_u16 vcc_lo, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x40,0x01,0xff]
+v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_mirror
+// W32: v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x40,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc_lo, v1, v2 row_half_mirror
-// W32: v_cmp_lt_u16 vcc_lo, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x41,0x01,0xff]
+v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_half_mirror
+// W32: v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x41,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc_lo, v1, v2 row_shl:1
-// W32: v_cmp_lt_u16 vcc_lo, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x01,0x01,0xff]
+v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_shl:1
+// W32: v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x01,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc_lo, v1, v2 row_shl:15
-// W32: v_cmp_lt_u16 vcc_lo, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x0f,0x01,0xff]
+v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_shl:15
+// W32: v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x0f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc_lo, v1, v2 row_shr:1
-// W32: v_cmp_lt_u16 vcc_lo, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x11,0x01,0xff]
+v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_shr:1
+// W32: v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x11,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc_lo, v1, v2 row_shr:15
-// W32: v_cmp_lt_u16 vcc_lo, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x1f,0x01,0xff]
+v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_shr:15
+// W32: v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x1f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc_lo, v1, v2 row_ror:1
-// W32: v_cmp_lt_u16 vcc_lo, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x21,0x01,0xff]
+v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_ror:1
+// W32: v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x21,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc_lo, v1, v2 row_ror:15
-// W32: v_cmp_lt_u16 vcc_lo, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x2f,0x01,0xff]
+v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_ror:15
+// W32: v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x2f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W32: v_cmp_lt_u16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x50,0x01,0xff]
+v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x50,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W32: v_cmp_lt_u16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x5f,0x01,0x01]
+v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x5f,0x01,0x01]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W32: v_cmp_lt_u16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x60,0x09,0x13]
+v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1
+// W32: v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x60,0x09,0x13]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
-// W32: v_cmp_lt_u16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x72,0x7c,0x7f,0x6f,0x05,0x30]
+v_cmp_lt_u16 vcc_lo, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1
+// W32: v_cmp_lt_u16 vcc_lo, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x72,0x7c,0x7f,0x6f,0x05,0x30]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc, v1, v2 quad_perm:[3,2,1,0]
-// W64: v_cmp_lt_u16 vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x1b,0x00,0xff]
+v_cmp_lt_u16 vcc, v1.l, v2.l quad_perm:[3,2,1,0]
+// W64: v_cmp_lt_u16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc, v1.l, v2.l quad_perm:[0,1,2,3]
+// W64: v_cmp_lt_u16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0xe4,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc, v1.l, v2.l row_mirror
+// W64: v_cmp_lt_u16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x40,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc, v1, v2 quad_perm:[0,1,2,3]
-// W64: v_cmp_lt_u16 vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0xe4,0x00,0xff]
+v_cmp_lt_u16 vcc, v1.l, v2.l row_half_mirror
+// W64: v_cmp_lt_u16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x41,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc, v1, v2 row_mirror
-// W64: v_cmp_lt_u16 vcc, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x40,0x01,0xff]
+v_cmp_lt_u16 vcc, v1.l, v2.l row_shl:1
+// W64: v_cmp_lt_u16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x01,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc, v1, v2 row_half_mirror
-// W64: v_cmp_lt_u16 vcc, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x41,0x01,0xff]
+v_cmp_lt_u16 vcc, v1.l, v2.l row_shl:15
+// W64: v_cmp_lt_u16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x0f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc, v1, v2 row_shl:1
-// W64: v_cmp_lt_u16 vcc, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x01,0x01,0xff]
+v_cmp_lt_u16 vcc, v1.l, v2.l row_shr:1
+// W64: v_cmp_lt_u16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x11,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc, v1, v2 row_shl:15
-// W64: v_cmp_lt_u16 vcc, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x0f,0x01,0xff]
+v_cmp_lt_u16 vcc, v1.l, v2.l row_shr:15
+// W64: v_cmp_lt_u16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x1f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc, v1, v2 row_shr:1
-// W64: v_cmp_lt_u16 vcc, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x11,0x01,0xff]
+v_cmp_lt_u16 vcc, v1.l, v2.l row_ror:1
+// W64: v_cmp_lt_u16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x21,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc, v1, v2 row_shr:15
-// W64: v_cmp_lt_u16 vcc, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x1f,0x01,0xff]
+v_cmp_lt_u16 vcc, v1.l, v2.l row_ror:15
+// W64: v_cmp_lt_u16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x2f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc, v1, v2 row_ror:1
-// W64: v_cmp_lt_u16 vcc, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x21,0x01,0xff]
+v_cmp_lt_u16 vcc, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_lt_u16 vcc, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x50,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc, v1, v2 row_ror:15
-// W64: v_cmp_lt_u16 vcc, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x2f,0x01,0xff]
+v_cmp_lt_u16 vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W64: v_cmp_lt_u16 vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x5f,0x01,0x01]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W64: v_cmp_lt_u16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x50,0x01,0xff]
+v_cmp_lt_u16 vcc, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1
+// W64: v_cmp_lt_u16 vcc, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x60,0x09,0x13]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1
+// W64: v_cmp_lt_u16 vcc, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x72,0x7c,0x7f,0x6f,0x05,0x30]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf
+// W32: v_cmp_lt_u16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf
+// W64: v_cmp_lt_u16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf
+// W32: v_cmp_lt_u16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0xe4,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf
+// W64: v_cmp_lt_u16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0xe4,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf
+// W32: v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x40,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf
+// W64: v_cmp_lt_u16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x40,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf
+// W32: v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x41,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf
+// W64: v_cmp_lt_u16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x41,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x01,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_lt_u16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x01,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x0f,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_lt_u16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x0f,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x11,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_lt_u16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x11,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x1f,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_lt_u16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x1f,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x21,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_lt_u16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x21,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x2f,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_lt_u16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x2f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W64: v_cmp_lt_u16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x5f,0x01,0x01]
+v_cmp_lt_u16 vcc_lo, v127.l, v127.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_lt_u16 vcc_lo, v127.l, v127.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0xfe,0x72,0x7c,0x7f,0x5f,0x01,0x01]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc, v127.l, v127.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W64: v_cmp_lt_u16 vcc, v127.l, v127.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0xfe,0x72,0x7c,0x7f,0x5f,0x01,0x01]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W64: v_cmp_lt_u16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x60,0x09,0x13]
+v_cmp_lt_u16 vcc_lo, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W32: v_cmp_lt_u16 vcc_lo, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x73,0x7c,0x81,0x60,0x09,0x13]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W64: v_cmp_lt_u16 vcc, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x73,0x7c,0x81,0x60,0x09,0x13]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
-// W64: v_cmp_lt_u16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x72,0x7c,0x7f,0x6f,0x05,0x30]
+v_cmp_lt_u16 vcc_lo, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// W32: v_cmp_lt_u16 vcc_lo, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x73,0x7c,0xff,0x6f,0x05,0x30]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// W64: v_cmp_lt_u16 vcc, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x73,0x7c,0xff,0x6f,0x05,0x30]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
 v_cmp_lt_u32 vcc_lo, v1, v2 quad_perm:[3,2,1,0]
@@ -4364,116 +5404,220 @@ v_cmp_lt_u32 vcc, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:
 // W64: v_cmp_lt_u32 vcc, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x93,0x7c,0xff,0x6f,0x05,0x30]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc_lo, v1, v2 quad_perm:[3,2,1,0]
-// W32: v_cmp_ne_i16 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x1b,0x00,0xff]
+v_cmp_ne_i16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0]
+// W32: v_cmp_ne_i16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x1b,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc_lo, v1, v2 quad_perm:[0,1,2,3]
-// W32: v_cmp_ne_i16 vcc_lo, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0xe4,0x00,0xff]
+v_cmp_ne_i16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3]
+// W32: v_cmp_ne_i16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0xe4,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc_lo, v1, v2 row_mirror
-// W32: v_cmp_ne_i16 vcc_lo, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x40,0x01,0xff]
+v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_mirror
+// W32: v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x40,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc_lo, v1, v2 row_half_mirror
-// W32: v_cmp_ne_i16 vcc_lo, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x41,0x01,0xff]
+v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_half_mirror
+// W32: v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x41,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc_lo, v1, v2 row_shl:1
-// W32: v_cmp_ne_i16 vcc_lo, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x01,0x01,0xff]
+v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_shl:1
+// W32: v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x01,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc_lo, v1, v2 row_shl:15
-// W32: v_cmp_ne_i16 vcc_lo, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x0f,0x01,0xff]
+v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_shl:15
+// W32: v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x0f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc_lo, v1, v2 row_shr:1
-// W32: v_cmp_ne_i16 vcc_lo, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x11,0x01,0xff]
+v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_shr:1
+// W32: v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x11,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc_lo, v1, v2 row_shr:15
-// W32: v_cmp_ne_i16 vcc_lo, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x1f,0x01,0xff]
+v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_shr:15
+// W32: v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x1f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc_lo, v1, v2 row_ror:1
-// W32: v_cmp_ne_i16 vcc_lo, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x21,0x01,0xff]
+v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_ror:1
+// W32: v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x21,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc_lo, v1, v2 row_ror:15
-// W32: v_cmp_ne_i16 vcc_lo, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x2f,0x01,0xff]
+v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_ror:15
+// W32: v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x2f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W32: v_cmp_ne_i16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x50,0x01,0xff]
+v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x50,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W32: v_cmp_ne_i16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x5f,0x01,0x01]
+v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x5f,0x01,0x01]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W32: v_cmp_ne_i16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x60,0x09,0x13]
+v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1
+// W32: v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x60,0x09,0x13]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
-// W32: v_cmp_ne_i16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x6a,0x7c,0x7f,0x6f,0x05,0x30]
+v_cmp_ne_i16 vcc_lo, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1
+// W32: v_cmp_ne_i16 vcc_lo, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x6a,0x7c,0x7f,0x6f,0x05,0x30]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc, v1, v2 quad_perm:[3,2,1,0]
-// W64: v_cmp_ne_i16 vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x1b,0x00,0xff]
+v_cmp_ne_i16 vcc, v1.l, v2.l quad_perm:[3,2,1,0]
+// W64: v_cmp_ne_i16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, v1.l, v2.l quad_perm:[0,1,2,3]
+// W64: v_cmp_ne_i16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0xe4,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, v1.l, v2.l row_mirror
+// W64: v_cmp_ne_i16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x40,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, v1.l, v2.l row_half_mirror
+// W64: v_cmp_ne_i16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x41,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, v1.l, v2.l row_shl:1
+// W64: v_cmp_ne_i16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x01,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, v1.l, v2.l row_shl:15
+// W64: v_cmp_ne_i16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x0f,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, v1.l, v2.l row_shr:1
+// W64: v_cmp_ne_i16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x11,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, v1.l, v2.l row_shr:15
+// W64: v_cmp_ne_i16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x1f,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, v1.l, v2.l row_ror:1
+// W64: v_cmp_ne_i16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x21,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, v1.l, v2.l row_ror:15
+// W64: v_cmp_ne_i16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x2f,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ne_i16 vcc, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x50,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W64: v_cmp_ne_i16 vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x5f,0x01,0x01]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc, v1, v2 quad_perm:[0,1,2,3]
-// W64: v_cmp_ne_i16 vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0xe4,0x00,0xff]
+v_cmp_ne_i16 vcc, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1
+// W64: v_cmp_ne_i16 vcc, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x60,0x09,0x13]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc, v1, v2 row_mirror
-// W64: v_cmp_ne_i16 vcc, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x40,0x01,0xff]
+v_cmp_ne_i16 vcc, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1
+// W64: v_cmp_ne_i16 vcc, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x6a,0x7c,0x7f,0x6f,0x05,0x30]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc, v1, v2 row_half_mirror
-// W64: v_cmp_ne_i16 vcc, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x41,0x01,0xff]
+v_cmp_ne_i16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ne_i16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ne_i16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ne_i16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0xe4,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ne_i16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0xe4,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc, v1, v2 row_shl:1
-// W64: v_cmp_ne_i16 vcc, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x01,0x01,0xff]
+v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x40,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ne_i16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x40,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc, v1, v2 row_shl:15
-// W64: v_cmp_ne_i16 vcc, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x0f,0x01,0xff]
+v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x41,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ne_i16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x41,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc, v1, v2 row_shr:1
-// W64: v_cmp_ne_i16 vcc, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x11,0x01,0xff]
+v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x01,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ne_i16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x01,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc, v1, v2 row_shr:15
-// W64: v_cmp_ne_i16 vcc, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x1f,0x01,0xff]
+v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x0f,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ne_i16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x0f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc, v1, v2 row_ror:1
-// W64: v_cmp_ne_i16 vcc, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x21,0x01,0xff]
+v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x11,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ne_i16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x11,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc, v1, v2 row_ror:15
-// W64: v_cmp_ne_i16 vcc, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x2f,0x01,0xff]
+v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x1f,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ne_i16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x1f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W64: v_cmp_ne_i16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x50,0x01,0xff]
+v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x21,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ne_i16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x21,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W64: v_cmp_ne_i16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x5f,0x01,0x01]
+v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x2f,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ne_i16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x2f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W64: v_cmp_ne_i16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x60,0x09,0x13]
+v_cmp_ne_i16 vcc_lo, v127.l, v127.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_ne_i16 vcc_lo, v127.l, v127.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0xfe,0x6a,0x7c,0x7f,0x5f,0x01,0x01]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, v127.l, v127.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W64: v_cmp_ne_i16 vcc, v127.l, v127.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0xfe,0x6a,0x7c,0x7f,0x5f,0x01,0x01]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
-// W64: v_cmp_ne_i16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x6a,0x7c,0x7f,0x6f,0x05,0x30]
+v_cmp_ne_i16 vcc_lo, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W32: v_cmp_ne_i16 vcc_lo, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x6b,0x7c,0x81,0x60,0x09,0x13]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W64: v_cmp_ne_i16 vcc, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x6b,0x7c,0x81,0x60,0x09,0x13]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc_lo, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// W32: v_cmp_ne_i16 vcc_lo, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x6b,0x7c,0xff,0x6f,0x05,0x30]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// W64: v_cmp_ne_i16 vcc, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x6b,0x7c,0xff,0x6f,0x05,0x30]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
 v_cmp_ne_i32 vcc_lo, v1, v2 quad_perm:[3,2,1,0]
@@ -4588,116 +5732,220 @@ v_cmp_ne_i32 vcc, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:
 // W64: v_cmp_ne_i32 vcc, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x8b,0x7c,0xff,0x6f,0x05,0x30]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc_lo, v1, v2 quad_perm:[3,2,1,0]
-// W32: v_cmp_ne_u16 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x1b,0x00,0xff]
+v_cmp_ne_u16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0]
+// W32: v_cmp_ne_u16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x1b,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc_lo, v1, v2 quad_perm:[0,1,2,3]
-// W32: v_cmp_ne_u16 vcc_lo, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0xe4,0x00,0xff]
+v_cmp_ne_u16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3]
+// W32: v_cmp_ne_u16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0xe4,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc_lo, v1, v2 row_mirror
-// W32: v_cmp_ne_u16 vcc_lo, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x40,0x01,0xff]
+v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_mirror
+// W32: v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x40,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc_lo, v1, v2 row_half_mirror
-// W32: v_cmp_ne_u16 vcc_lo, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x41,0x01,0xff]
+v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_half_mirror
+// W32: v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x41,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc_lo, v1, v2 row_shl:1
-// W32: v_cmp_ne_u16 vcc_lo, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x01,0x01,0xff]
+v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_shl:1
+// W32: v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x01,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc_lo, v1, v2 row_shl:15
-// W32: v_cmp_ne_u16 vcc_lo, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x0f,0x01,0xff]
+v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_shl:15
+// W32: v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x0f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc_lo, v1, v2 row_shr:1
-// W32: v_cmp_ne_u16 vcc_lo, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x11,0x01,0xff]
+v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_shr:1
+// W32: v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x11,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc_lo, v1, v2 row_shr:15
-// W32: v_cmp_ne_u16 vcc_lo, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x1f,0x01,0xff]
+v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_shr:15
+// W32: v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x1f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc_lo, v1, v2 row_ror:1
-// W32: v_cmp_ne_u16 vcc_lo, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x21,0x01,0xff]
+v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_ror:1
+// W32: v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x21,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc_lo, v1, v2 row_ror:15
-// W32: v_cmp_ne_u16 vcc_lo, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x2f,0x01,0xff]
+v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_ror:15
+// W32: v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x2f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W32: v_cmp_ne_u16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x50,0x01,0xff]
+v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x50,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W32: v_cmp_ne_u16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x5f,0x01,0x01]
+v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x5f,0x01,0x01]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W32: v_cmp_ne_u16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x60,0x09,0x13]
+v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1
+// W32: v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x60,0x09,0x13]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
-// W32: v_cmp_ne_u16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x7a,0x7c,0x7f,0x6f,0x05,0x30]
+v_cmp_ne_u16 vcc_lo, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1
+// W32: v_cmp_ne_u16 vcc_lo, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x7a,0x7c,0x7f,0x6f,0x05,0x30]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc, v1, v2 quad_perm:[3,2,1,0]
-// W64: v_cmp_ne_u16 vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x1b,0x00,0xff]
+v_cmp_ne_u16 vcc, v1.l, v2.l quad_perm:[3,2,1,0]
+// W64: v_cmp_ne_u16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc, v1.l, v2.l quad_perm:[0,1,2,3]
+// W64: v_cmp_ne_u16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0xe4,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc, v1.l, v2.l row_mirror
+// W64: v_cmp_ne_u16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x40,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc, v1.l, v2.l row_half_mirror
+// W64: v_cmp_ne_u16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x41,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc, v1.l, v2.l row_shl:1
+// W64: v_cmp_ne_u16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x01,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc, v1.l, v2.l row_shl:15
+// W64: v_cmp_ne_u16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x0f,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc, v1.l, v2.l row_shr:1
+// W64: v_cmp_ne_u16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x11,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc, v1, v2 quad_perm:[0,1,2,3]
-// W64: v_cmp_ne_u16 vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0xe4,0x00,0xff]
+v_cmp_ne_u16 vcc, v1.l, v2.l row_shr:15
+// W64: v_cmp_ne_u16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x1f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc, v1, v2 row_mirror
-// W64: v_cmp_ne_u16 vcc, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x40,0x01,0xff]
+v_cmp_ne_u16 vcc, v1.l, v2.l row_ror:1
+// W64: v_cmp_ne_u16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x21,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc, v1, v2 row_half_mirror
-// W64: v_cmp_ne_u16 vcc, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x41,0x01,0xff]
+v_cmp_ne_u16 vcc, v1.l, v2.l row_ror:15
+// W64: v_cmp_ne_u16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x2f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc, v1, v2 row_shl:1
-// W64: v_cmp_ne_u16 vcc, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x01,0x01,0xff]
+v_cmp_ne_u16 vcc, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ne_u16 vcc, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x50,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc, v1, v2 row_shl:15
-// W64: v_cmp_ne_u16 vcc, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x0f,0x01,0xff]
+v_cmp_ne_u16 vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W64: v_cmp_ne_u16 vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x5f,0x01,0x01]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc, v1, v2 row_shr:1
-// W64: v_cmp_ne_u16 vcc, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x11,0x01,0xff]
+v_cmp_ne_u16 vcc, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1
+// W64: v_cmp_ne_u16 vcc, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x60,0x09,0x13]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc, v1, v2 row_shr:15
-// W64: v_cmp_ne_u16 vcc, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x1f,0x01,0xff]
+v_cmp_ne_u16 vcc, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1
+// W64: v_cmp_ne_u16 vcc, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x7a,0x7c,0x7f,0x6f,0x05,0x30]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc, v1, v2 row_ror:1
-// W64: v_cmp_ne_u16 vcc, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x21,0x01,0xff]
+v_cmp_ne_u16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ne_u16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ne_u16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x1b,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc, v1, v2 row_ror:15
-// W64: v_cmp_ne_u16 vcc, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x2f,0x01,0xff]
+v_cmp_ne_u16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ne_u16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0xe4,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ne_u16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0xe4,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W64: v_cmp_ne_u16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x50,0x01,0xff]
+v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x40,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ne_u16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x40,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W64: v_cmp_ne_u16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x5f,0x01,0x01]
+v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x41,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ne_u16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x41,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W64: v_cmp_ne_u16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x60,0x09,0x13]
+v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x01,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ne_u16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x01,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
-// W64: v_cmp_ne_u16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x7a,0x7c,0x7f,0x6f,0x05,0x30]
+v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x0f,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ne_u16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x0f,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x11,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ne_u16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x11,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x1f,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ne_u16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x1f,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x21,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ne_u16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x21,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x2f,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ne_u16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x2f,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc_lo, v127.l, v127.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_ne_u16 vcc_lo, v127.l, v127.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0xfe,0x7a,0x7c,0x7f,0x5f,0x01,0x01]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc, v127.l, v127.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W64: v_cmp_ne_u16 vcc, v127.l, v127.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0xfe,0x7a,0x7c,0x7f,0x5f,0x01,0x01]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc_lo, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W32: v_cmp_ne_u16 vcc_lo, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x7b,0x7c,0x81,0x60,0x09,0x13]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W64: v_cmp_ne_u16 vcc, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x7b,0x7c,0x81,0x60,0x09,0x13]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc_lo, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// W32: v_cmp_ne_u16 vcc_lo, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x7b,0x7c,0xff,0x6f,0x05,0x30]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// W64: v_cmp_ne_u16 vcc, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x7b,0x7c,0xff,0x6f,0x05,0x30]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
 v_cmp_ne_u32 vcc_lo, v1, v2 quad_perm:[3,2,1,0]
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_vopc_dpp8.s b/llvm/test/MC/AMDGPU/gfx11_asm_vopc_dpp8.s
index 97ad419a79ca84..9f02a41603fd23 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_vopc_dpp8.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_vopc_dpp8.s
@@ -100,28 +100,52 @@ v_cmp_eq_f32 vcc, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:0
 // W64: v_cmp_eq_f32 vcc, v255, v255 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x25,0x7c,0xff,0x00,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_eq_i16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x64,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_eq_i16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_eq_i16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x64,0x7c,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W32: v_cmp_eq_i16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x64,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_eq_i16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_eq_i16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x64,0x7c,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:0
-// W32: v_cmp_eq_i16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x64,0x7c,0x7f,0x00,0x00,0x00]
+v_cmp_eq_i16 vcc_lo, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0]
+// W32: v_cmp_eq_i16 vcc_lo, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x64,0x7c,0x7f,0x00,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_eq_i16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x64,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_eq_i16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_eq_i16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x64,0x7c,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W64: v_cmp_eq_i16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x64,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_eq_i16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W64: v_cmp_eq_i16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x64,0x7c,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:0
-// W64: v_cmp_eq_i16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x64,0x7c,0x7f,0x00,0x00,0x00]
+v_cmp_eq_i16 vcc, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0]
+// W64: v_cmp_eq_i16 vcc, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x64,0x7c,0x7f,0x00,0x00,0x00]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc_lo, v127.l, v127.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_eq_i16 vcc_lo, v127.l, v127.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0xfe,0x64,0x7c,0x7f,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc, v127.l, v127.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_eq_i16 vcc, v127.l, v127.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0xfe,0x64,0x7c,0x7f,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc_lo, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_eq_i16 vcc_lo, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x65,0x7c,0x81,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W64: v_cmp_eq_i16 vcc, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x65,0x7c,0x81,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc_lo, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:0
+// W32: v_cmp_eq_i16 vcc_lo, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x65,0x7c,0xff,0x00,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:0
+// W64: v_cmp_eq_i16 vcc, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x65,0x7c,0xff,0x00,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
 v_cmp_eq_i32 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
@@ -148,28 +172,52 @@ v_cmp_eq_i32 vcc, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:0
 // W64: v_cmp_eq_i32 vcc, v255, v255 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x85,0x7c,0xff,0x00,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_eq_u16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x74,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_eq_u16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_eq_u16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x74,0x7c,0x01,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_eq_u16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x74,0x7c,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W32: v_cmp_eq_u16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x74,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_eq_u16 vcc_lo, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0]
+// W32: v_cmp_eq_u16 vcc_lo, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x74,0x7c,0x7f,0x00,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:0
-// W32: v_cmp_eq_u16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x74,0x7c,0x7f,0x00,0x00,0x00]
+v_cmp_eq_u16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_eq_u16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x74,0x7c,0x01,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W64: v_cmp_eq_u16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x74,0x7c,0x01,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0]
+// W64: v_cmp_eq_u16 vcc, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x74,0x7c,0x7f,0x00,0x00,0x00]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc_lo, v127.l, v127.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_eq_u16 vcc_lo, v127.l, v127.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0xfe,0x74,0x7c,0x7f,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_eq_u16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x74,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_eq_u16 vcc, v127.l, v127.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_eq_u16 vcc, v127.l, v127.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0xfe,0x74,0x7c,0x7f,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W64: v_cmp_eq_u16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x74,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_eq_u16 vcc_lo, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_eq_u16 vcc_lo, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x75,0x7c,0x81,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W64: v_cmp_eq_u16 vcc, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x75,0x7c,0x81,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:0
-// W64: v_cmp_eq_u16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x74,0x7c,0x7f,0x00,0x00,0x00]
+v_cmp_eq_u16 vcc_lo, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:0
+// W32: v_cmp_eq_u16 vcc_lo, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x75,0x7c,0xff,0x00,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:0
+// W64: v_cmp_eq_u16 vcc, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x75,0x7c,0xff,0x00,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
 v_cmp_eq_u32 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
@@ -340,28 +388,52 @@ v_cmp_ge_f32 vcc, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:0
 // W64: v_cmp_ge_f32 vcc, v255, v255 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x2d,0x7c,0xff,0x00,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_ge_i16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x6c,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_ge_i16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_ge_i16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x6c,0x7c,0x01,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_ge_i16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x6c,0x7c,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W32: v_cmp_ge_i16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x6c,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_ge_i16 vcc_lo, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0]
+// W32: v_cmp_ge_i16 vcc_lo, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x6c,0x7c,0x7f,0x00,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:0
-// W32: v_cmp_ge_i16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x6c,0x7c,0x7f,0x00,0x00,0x00]
+v_cmp_ge_i16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_ge_i16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x6c,0x7c,0x01,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W64: v_cmp_ge_i16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x6c,0x7c,0x01,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0]
+// W64: v_cmp_ge_i16 vcc, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x6c,0x7c,0x7f,0x00,0x00,0x00]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc_lo, v127.l, v127.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_ge_i16 vcc_lo, v127.l, v127.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0xfe,0x6c,0x7c,0x7f,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_ge_i16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x6c,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_ge_i16 vcc, v127.l, v127.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_ge_i16 vcc, v127.l, v127.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0xfe,0x6c,0x7c,0x7f,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W64: v_cmp_ge_i16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x6c,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_ge_i16 vcc_lo, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_ge_i16 vcc_lo, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x6d,0x7c,0x81,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W64: v_cmp_ge_i16 vcc, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x6d,0x7c,0x81,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:0
-// W64: v_cmp_ge_i16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x6c,0x7c,0x7f,0x00,0x00,0x00]
+v_cmp_ge_i16 vcc_lo, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:0
+// W32: v_cmp_ge_i16 vcc_lo, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x6d,0x7c,0xff,0x00,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:0
+// W64: v_cmp_ge_i16 vcc, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x6d,0x7c,0xff,0x00,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
 v_cmp_ge_i32 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
@@ -388,28 +460,52 @@ v_cmp_ge_i32 vcc, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:0
 // W64: v_cmp_ge_i32 vcc, v255, v255 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x8d,0x7c,0xff,0x00,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_ge_u16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x7c,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_ge_u16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_ge_u16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x7c,0x7c,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W32: v_cmp_ge_u16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x7c,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_ge_u16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_ge_u16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x7c,0x7c,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:0
-// W32: v_cmp_ge_u16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x7c,0x7c,0x7f,0x00,0x00,0x00]
+v_cmp_ge_u16 vcc_lo, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0]
+// W32: v_cmp_ge_u16 vcc_lo, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x7c,0x7c,0x7f,0x00,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_ge_u16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x7c,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_ge_u16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_ge_u16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x7c,0x7c,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W64: v_cmp_ge_u16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x7c,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_ge_u16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W64: v_cmp_ge_u16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x7c,0x7c,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:0
-// W64: v_cmp_ge_u16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x7c,0x7c,0x7f,0x00,0x00,0x00]
+v_cmp_ge_u16 vcc, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0]
+// W64: v_cmp_ge_u16 vcc, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x7c,0x7c,0x7f,0x00,0x00,0x00]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc_lo, v127.l, v127.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_ge_u16 vcc_lo, v127.l, v127.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0xfe,0x7c,0x7c,0x7f,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc, v127.l, v127.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_ge_u16 vcc, v127.l, v127.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0xfe,0x7c,0x7c,0x7f,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc_lo, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_ge_u16 vcc_lo, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x7d,0x7c,0x81,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W64: v_cmp_ge_u16 vcc, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x7d,0x7c,0x81,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc_lo, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:0
+// W32: v_cmp_ge_u16 vcc_lo, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x7d,0x7c,0xff,0x00,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:0
+// W64: v_cmp_ge_u16 vcc, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x7d,0x7c,0xff,0x00,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
 v_cmp_ge_u32 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
@@ -484,28 +580,52 @@ v_cmp_gt_f32 vcc, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:0
 // W64: v_cmp_gt_f32 vcc, v255, v255 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x29,0x7c,0xff,0x00,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_gt_i16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x68,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_gt_i16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_gt_i16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x68,0x7c,0x01,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_gt_i16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x68,0x7c,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W32: v_cmp_gt_i16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x68,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_gt_i16 vcc_lo, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0]
+// W32: v_cmp_gt_i16 vcc_lo, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x68,0x7c,0x7f,0x00,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:0
-// W32: v_cmp_gt_i16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x68,0x7c,0x7f,0x00,0x00,0x00]
+v_cmp_gt_i16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_gt_i16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x68,0x7c,0x01,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W64: v_cmp_gt_i16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x68,0x7c,0x01,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0]
+// W64: v_cmp_gt_i16 vcc, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x68,0x7c,0x7f,0x00,0x00,0x00]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc_lo, v127.l, v127.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_gt_i16 vcc_lo, v127.l, v127.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0xfe,0x68,0x7c,0x7f,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_gt_i16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x68,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_gt_i16 vcc, v127.l, v127.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_gt_i16 vcc, v127.l, v127.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0xfe,0x68,0x7c,0x7f,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W64: v_cmp_gt_i16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x68,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_gt_i16 vcc_lo, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_gt_i16 vcc_lo, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x69,0x7c,0x81,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W64: v_cmp_gt_i16 vcc, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x69,0x7c,0x81,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:0
-// W64: v_cmp_gt_i16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x68,0x7c,0x7f,0x00,0x00,0x00]
+v_cmp_gt_i16 vcc_lo, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:0
+// W32: v_cmp_gt_i16 vcc_lo, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x69,0x7c,0xff,0x00,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:0
+// W64: v_cmp_gt_i16 vcc, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x69,0x7c,0xff,0x00,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
 v_cmp_gt_i32 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
@@ -532,28 +652,52 @@ v_cmp_gt_i32 vcc, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:0
 // W64: v_cmp_gt_i32 vcc, v255, v255 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x89,0x7c,0xff,0x00,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_gt_u16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x78,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_gt_u16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_gt_u16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x78,0x7c,0x01,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_gt_u16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x78,0x7c,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W32: v_cmp_gt_u16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x78,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_gt_u16 vcc_lo, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0]
+// W32: v_cmp_gt_u16 vcc_lo, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x78,0x7c,0x7f,0x00,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:0
-// W32: v_cmp_gt_u16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x78,0x7c,0x7f,0x00,0x00,0x00]
+v_cmp_gt_u16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_gt_u16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x78,0x7c,0x01,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W64: v_cmp_gt_u16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x78,0x7c,0x01,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0]
+// W64: v_cmp_gt_u16 vcc, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x78,0x7c,0x7f,0x00,0x00,0x00]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc_lo, v127.l, v127.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_gt_u16 vcc_lo, v127.l, v127.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0xfe,0x78,0x7c,0x7f,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_gt_u16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x78,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_gt_u16 vcc, v127.l, v127.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_gt_u16 vcc, v127.l, v127.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0xfe,0x78,0x7c,0x7f,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W64: v_cmp_gt_u16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x78,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_gt_u16 vcc_lo, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_gt_u16 vcc_lo, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x79,0x7c,0x81,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W64: v_cmp_gt_u16 vcc, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x79,0x7c,0x81,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:0
-// W64: v_cmp_gt_u16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x78,0x7c,0x7f,0x00,0x00,0x00]
+v_cmp_gt_u16 vcc_lo, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:0
+// W32: v_cmp_gt_u16 vcc_lo, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x79,0x7c,0xff,0x00,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:0
+// W64: v_cmp_gt_u16 vcc, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x79,0x7c,0xff,0x00,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
 v_cmp_gt_u32 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
@@ -628,28 +772,52 @@ v_cmp_le_f32 vcc, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:0
 // W64: v_cmp_le_f32 vcc, v255, v255 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x27,0x7c,0xff,0x00,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_le_i16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x66,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_le_i16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_le_i16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x66,0x7c,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W32: v_cmp_le_i16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x66,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_le_i16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_le_i16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x66,0x7c,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:0
-// W32: v_cmp_le_i16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x66,0x7c,0x7f,0x00,0x00,0x00]
+v_cmp_le_i16 vcc_lo, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0]
+// W32: v_cmp_le_i16 vcc_lo, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x66,0x7c,0x7f,0x00,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_le_i16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x66,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_le_i16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_le_i16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x66,0x7c,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W64: v_cmp_le_i16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x66,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_le_i16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W64: v_cmp_le_i16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x66,0x7c,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:0
-// W64: v_cmp_le_i16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x66,0x7c,0x7f,0x00,0x00,0x00]
+v_cmp_le_i16 vcc, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0]
+// W64: v_cmp_le_i16 vcc, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x66,0x7c,0x7f,0x00,0x00,0x00]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc_lo, v127.l, v127.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_le_i16 vcc_lo, v127.l, v127.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0xfe,0x66,0x7c,0x7f,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc, v127.l, v127.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_le_i16 vcc, v127.l, v127.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0xfe,0x66,0x7c,0x7f,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc_lo, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_le_i16 vcc_lo, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x67,0x7c,0x81,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W64: v_cmp_le_i16 vcc, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x67,0x7c,0x81,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc_lo, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:0
+// W32: v_cmp_le_i16 vcc_lo, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x67,0x7c,0xff,0x00,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:0
+// W64: v_cmp_le_i16 vcc, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x67,0x7c,0xff,0x00,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
 v_cmp_le_i32 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
@@ -676,28 +844,52 @@ v_cmp_le_i32 vcc, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:0
 // W64: v_cmp_le_i32 vcc, v255, v255 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x87,0x7c,0xff,0x00,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_le_u16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x76,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_le_u16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_le_u16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x76,0x7c,0x01,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_le_u16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x76,0x7c,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W32: v_cmp_le_u16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x76,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_le_u16 vcc_lo, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0]
+// W32: v_cmp_le_u16 vcc_lo, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x76,0x7c,0x7f,0x00,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:0
-// W32: v_cmp_le_u16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x76,0x7c,0x7f,0x00,0x00,0x00]
+v_cmp_le_u16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_le_u16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x76,0x7c,0x01,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W64: v_cmp_le_u16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x76,0x7c,0x01,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0]
+// W64: v_cmp_le_u16 vcc, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x76,0x7c,0x7f,0x00,0x00,0x00]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc_lo, v127.l, v127.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_le_u16 vcc_lo, v127.l, v127.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0xfe,0x76,0x7c,0x7f,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_le_u16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x76,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_le_u16 vcc, v127.l, v127.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_le_u16 vcc, v127.l, v127.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0xfe,0x76,0x7c,0x7f,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W64: v_cmp_le_u16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x76,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_le_u16 vcc_lo, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_le_u16 vcc_lo, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x77,0x7c,0x81,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W64: v_cmp_le_u16 vcc, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x77,0x7c,0x81,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:0
-// W64: v_cmp_le_u16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x76,0x7c,0x7f,0x00,0x00,0x00]
+v_cmp_le_u16 vcc_lo, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:0
+// W32: v_cmp_le_u16 vcc_lo, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x77,0x7c,0xff,0x00,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:0
+// W64: v_cmp_le_u16 vcc, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x77,0x7c,0xff,0x00,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
 v_cmp_le_u32 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
@@ -844,28 +1036,52 @@ v_cmp_lt_f32 vcc, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:0
 // W64: v_cmp_lt_f32 vcc, v255, v255 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x23,0x7c,0xff,0x00,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_lt_i16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x62,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_lt_i16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_lt_i16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x62,0x7c,0x01,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_lt_i16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x62,0x7c,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W32: v_cmp_lt_i16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x62,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_lt_i16 vcc_lo, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0]
+// W32: v_cmp_lt_i16 vcc_lo, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x62,0x7c,0x7f,0x00,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:0
-// W32: v_cmp_lt_i16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x62,0x7c,0x7f,0x00,0x00,0x00]
+v_cmp_lt_i16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_lt_i16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x62,0x7c,0x01,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W64: v_cmp_lt_i16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x62,0x7c,0x01,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0]
+// W64: v_cmp_lt_i16 vcc, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x62,0x7c,0x7f,0x00,0x00,0x00]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc_lo, v127.l, v127.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_lt_i16 vcc_lo, v127.l, v127.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0xfe,0x62,0x7c,0x7f,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_lt_i16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x62,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_lt_i16 vcc, v127.l, v127.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_lt_i16 vcc, v127.l, v127.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0xfe,0x62,0x7c,0x7f,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W64: v_cmp_lt_i16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x62,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_lt_i16 vcc_lo, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_lt_i16 vcc_lo, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x63,0x7c,0x81,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W64: v_cmp_lt_i16 vcc, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x63,0x7c,0x81,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:0
-// W64: v_cmp_lt_i16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x62,0x7c,0x7f,0x00,0x00,0x00]
+v_cmp_lt_i16 vcc_lo, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:0
+// W32: v_cmp_lt_i16 vcc_lo, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x63,0x7c,0xff,0x00,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:0
+// W64: v_cmp_lt_i16 vcc, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x63,0x7c,0xff,0x00,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
 v_cmp_lt_i32 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
@@ -892,28 +1108,52 @@ v_cmp_lt_i32 vcc, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:0
 // W64: v_cmp_lt_i32 vcc, v255, v255 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x83,0x7c,0xff,0x00,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_lt_u16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x72,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_lt_u16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_lt_u16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x72,0x7c,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W32: v_cmp_lt_u16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x72,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_lt_u16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_lt_u16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x72,0x7c,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:0
-// W32: v_cmp_lt_u16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x72,0x7c,0x7f,0x00,0x00,0x00]
+v_cmp_lt_u16 vcc_lo, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0]
+// W32: v_cmp_lt_u16 vcc_lo, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x72,0x7c,0x7f,0x00,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_lt_u16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x72,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_lt_u16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_lt_u16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x72,0x7c,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W64: v_cmp_lt_u16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x72,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_lt_u16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W64: v_cmp_lt_u16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x72,0x7c,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:0
-// W64: v_cmp_lt_u16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x72,0x7c,0x7f,0x00,0x00,0x00]
+v_cmp_lt_u16 vcc, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0]
+// W64: v_cmp_lt_u16 vcc, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x72,0x7c,0x7f,0x00,0x00,0x00]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc_lo, v127.l, v127.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_lt_u16 vcc_lo, v127.l, v127.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0xfe,0x72,0x7c,0x7f,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc, v127.l, v127.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_lt_u16 vcc, v127.l, v127.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0xfe,0x72,0x7c,0x7f,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc_lo, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_lt_u16 vcc_lo, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x73,0x7c,0x81,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W64: v_cmp_lt_u16 vcc, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x73,0x7c,0x81,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc_lo, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:0
+// W32: v_cmp_lt_u16 vcc_lo, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x73,0x7c,0xff,0x00,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:0
+// W64: v_cmp_lt_u16 vcc, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x73,0x7c,0xff,0x00,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
 v_cmp_lt_u32 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
@@ -940,28 +1180,52 @@ v_cmp_lt_u32 vcc, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:0
 // W64: v_cmp_lt_u32 vcc, v255, v255 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x93,0x7c,0xff,0x00,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_ne_i16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x6a,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_ne_i16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_ne_i16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x6a,0x7c,0x01,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_ne_i16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x6a,0x7c,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W32: v_cmp_ne_i16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x6a,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_ne_i16 vcc_lo, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0]
+// W32: v_cmp_ne_i16 vcc_lo, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x6a,0x7c,0x7f,0x00,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:0
-// W32: v_cmp_ne_i16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x6a,0x7c,0x7f,0x00,0x00,0x00]
+v_cmp_ne_i16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_ne_i16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x6a,0x7c,0x01,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W64: v_cmp_ne_i16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x6a,0x7c,0x01,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0]
+// W64: v_cmp_ne_i16 vcc, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x6a,0x7c,0x7f,0x00,0x00,0x00]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc_lo, v127.l, v127.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_ne_i16 vcc_lo, v127.l, v127.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0xfe,0x6a,0x7c,0x7f,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_ne_i16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x6a,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_ne_i16 vcc, v127.l, v127.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_ne_i16 vcc, v127.l, v127.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0xfe,0x6a,0x7c,0x7f,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W64: v_cmp_ne_i16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x6a,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_ne_i16 vcc_lo, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_ne_i16 vcc_lo, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x6b,0x7c,0x81,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W64: v_cmp_ne_i16 vcc, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x6b,0x7c,0x81,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:0
-// W64: v_cmp_ne_i16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x6a,0x7c,0x7f,0x00,0x00,0x00]
+v_cmp_ne_i16 vcc_lo, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:0
+// W32: v_cmp_ne_i16 vcc_lo, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x6b,0x7c,0xff,0x00,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:0
+// W64: v_cmp_ne_i16 vcc, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x6b,0x7c,0xff,0x00,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
 v_cmp_ne_i32 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
@@ -988,28 +1252,52 @@ v_cmp_ne_i32 vcc, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:0
 // W64: v_cmp_ne_i32 vcc, v255, v255 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x8b,0x7c,0xff,0x00,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_ne_u16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x7a,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_ne_u16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_ne_u16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x7a,0x7c,0x01,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_ne_u16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x7a,0x7c,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W32: v_cmp_ne_u16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x7a,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_ne_u16 vcc_lo, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0]
+// W32: v_cmp_ne_u16 vcc_lo, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x7a,0x7c,0x7f,0x00,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:0
-// W32: v_cmp_ne_u16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x7a,0x7c,0x7f,0x00,0x00,0x00]
+v_cmp_ne_u16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_ne_u16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x7a,0x7c,0x01,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W64: v_cmp_ne_u16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x7a,0x7c,0x01,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0]
+// W64: v_cmp_ne_u16 vcc, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x7a,0x7c,0x7f,0x00,0x00,0x00]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc_lo, v127.l, v127.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_ne_u16 vcc_lo, v127.l, v127.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0xfe,0x7a,0x7c,0x7f,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_ne_u16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x7a,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_ne_u16 vcc, v127.l, v127.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_ne_u16 vcc, v127.l, v127.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0xfe,0x7a,0x7c,0x7f,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W64: v_cmp_ne_u16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x7a,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_ne_u16 vcc_lo, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_ne_u16 vcc_lo, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x7b,0x7c,0x81,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W64: v_cmp_ne_u16 vcc, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x7b,0x7c,0x81,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:0
-// W64: v_cmp_ne_u16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x7a,0x7c,0x7f,0x00,0x00,0x00]
+v_cmp_ne_u16 vcc_lo, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:0
+// W32: v_cmp_ne_u16 vcc_lo, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x7b,0x7c,0xff,0x00,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:0
+// W64: v_cmp_ne_u16 vcc, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x7b,0x7c,0xff,0x00,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
 v_cmp_ne_u32 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_vopc_t16_err.s b/llvm/test/MC/AMDGPU/gfx11_asm_vopc_t16_err.s
index c48bff454deeda..19bc0888f9a2a4 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_vopc_t16_err.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_vopc_t16_err.s
@@ -1,3 +1,4 @@
+// NOTE: Assertions have been autogenerated by utils/update_mc_test_checks.py UTC_ARGS: --sort --version 5
 ; NOTE: Assertions have been autogenerated by utils/update_mc_test_checks.py UTC_ARGS: --sort --version 5
 // RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize64,+real-true16 -show-encoding %s 2>&1 | FileCheck --check-prefix=GFX11 --implicit-check-not=error: %s
 
@@ -124,137 +125,269 @@ v_cmp_eq_f16_e32 vcc_lo, vcc_hi, v255
 v_cmp_eq_f16_e32 vcc_lo, vcc_lo, v255
 // GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16_e32 vcc, v1, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_eq_i16_e32 vcc, v1.h, v255.h
+// GFX11: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_eq_i16_e32 vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
+v_cmp_eq_i16_e32 vcc, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_eq_i16_e32 vcc, v1, v255 quad_perm:[3,2,1,0]
-// GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
+v_cmp_eq_i16_e32 vcc, v1.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_eq_i16_e32 vcc, v127, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_eq_i16_e32 vcc, v1.l, v255.l
+// GFX11: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_eq_i16_e32 vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
+v_cmp_eq_i16_e32 vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_eq_i16_e32 vcc, v127, v255 quad_perm:[3,2,1,0]
-// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
+v_cmp_eq_i16_e32 vcc, v1.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_eq_i16_e32 vcc, v128, v2
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_eq_i16_e32 vcc, v127.h, v255.h
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_eq_i16_e32 vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
+v_cmp_eq_i16_e32 vcc, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_eq_i16_e32 vcc, v128, v2 quad_perm:[3,2,1,0]
-// GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
+v_cmp_eq_i16_e32 vcc, v127.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_eq_i16_e32 vcc, vcc_hi, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_eq_i16_e32 vcc, v127.l, v255.l
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_eq_i16_e32 vcc, vcc_lo, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_eq_i16_e32 vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_eq_i16_e32 vcc_lo, v1, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_eq_i16_e32 vcc, v127.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_eq_i16_e32 vcc_lo, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_eq_i16_e32 vcc, v128.h, v2.h
+// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
 
-v_cmp_eq_i16_e32 vcc_lo, v1, v255 quad_perm:[3,2,1,0]
-// GFX11: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_eq_i16_e32 vcc, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
 
-v_cmp_eq_i16_e32 vcc_lo, v127, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_eq_i16_e32 vcc, v128.h, v2.h quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
 
-v_cmp_eq_i16_e32 vcc_lo, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: :[[@LINE-1]]:37: error: invalid operand for instruction
+v_cmp_eq_i16_e32 vcc, v128.l, v2.l
+// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
 
-v_cmp_eq_i16_e32 vcc_lo, v127, v255 quad_perm:[3,2,1,0]
-// GFX11: :[[@LINE-1]]:37: error: invalid operand for instruction
+v_cmp_eq_i16_e32 vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
 
-v_cmp_eq_i16_e32 vcc_lo, v128, v2
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_eq_i16_e32 vcc, v128.l, v2.l quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
 
-v_cmp_eq_i16_e32 vcc_lo, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_eq_i16_e32 vcc, vcc_hi, v255.h
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_eq_i16_e32 vcc_lo, v128, v2 quad_perm:[3,2,1,0]
-// GFX11: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_eq_i16_e32 vcc, vcc_hi, v255.l
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_eq_i16_e32 vcc_lo, vcc_hi, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_eq_i16_e32 vcc, vcc_lo, v255.h
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_eq_i16_e32 vcc_lo, vcc_lo, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_eq_i16_e32 vcc, vcc_lo, v255.l
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_eq_u16_e32 vcc, v1, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_eq_i16_e32 vcc_lo, v1.h, v255.h
+// GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_eq_u16_e32 vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
+v_cmp_eq_i16_e32 vcc_lo, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
 // GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_eq_u16_e32 vcc, v1, v255 quad_perm:[3,2,1,0]
+v_cmp_eq_i16_e32 vcc_lo, v1.h, v255.h quad_perm:[3,2,1,0]
 // GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_eq_u16_e32 vcc, v127, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_eq_i16_e32 vcc_lo, v1.l, v255.l
+// GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_eq_u16_e32 vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
+v_cmp_eq_i16_e32 vcc_lo, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
+
+v_cmp_eq_i16_e32 vcc_lo, v1.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
+
+v_cmp_eq_i16_e32 vcc_lo, v127.h, v255.h
 // GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_eq_u16_e32 vcc, v127, v255 quad_perm:[3,2,1,0]
+v_cmp_eq_i16_e32 vcc_lo, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
 // GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_eq_u16_e32 vcc, v128, v2
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_eq_i16_e32 vcc_lo, v127.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_eq_i16_e32 vcc_lo, v127.l, v255.l
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_eq_i16_e32 vcc_lo, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_eq_i16_e32 vcc_lo, v127.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_eq_i16_e32 vcc_lo, v128.h, v2.h
+// GFX11: :[[@LINE-1]]:26: error: invalid operand for instruction
+
+v_cmp_eq_i16_e32 vcc_lo, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:26: error: invalid operand for instruction
 
-v_cmp_eq_u16_e32 vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
+v_cmp_eq_i16_e32 vcc_lo, v128.h, v2.h quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:26: error: invalid operand for instruction
+
+v_cmp_eq_i16_e32 vcc_lo, v128.l, v2.l
+// GFX11: :[[@LINE-1]]:26: error: invalid operand for instruction
+
+v_cmp_eq_i16_e32 vcc_lo, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:26: error: invalid operand for instruction
+
+v_cmp_eq_i16_e32 vcc_lo, v128.l, v2.l quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:26: error: invalid operand for instruction
+
+v_cmp_eq_i16_e32 vcc_lo, vcc_hi, v255.h
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_eq_i16_e32 vcc_lo, vcc_hi, v255.l
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_eq_i16_e32 vcc_lo, vcc_lo, v255.h
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_eq_i16_e32 vcc_lo, vcc_lo, v255.l
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_eq_u16_e32 vcc, v1.h, v255.h
+// GFX11: :[[@LINE-1]]:29: error: invalid operand for instruction
+
+v_cmp_eq_u16_e32 vcc, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:29: error: invalid operand for instruction
+
+v_cmp_eq_u16_e32 vcc, v1.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:29: error: invalid operand for instruction
+
+v_cmp_eq_u16_e32 vcc, v1.l, v255.l
+// GFX11: :[[@LINE-1]]:29: error: invalid operand for instruction
+
+v_cmp_eq_u16_e32 vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:29: error: invalid operand for instruction
+
+v_cmp_eq_u16_e32 vcc, v1.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:29: error: invalid operand for instruction
+
+v_cmp_eq_u16_e32 vcc, v127.h, v255.h
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_eq_u16_e32 vcc, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_eq_u16_e32 vcc, v127.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_eq_u16_e32 vcc, v127.l, v255.l
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_eq_u16_e32 vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_eq_u16_e32 vcc, v127.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_eq_u16_e32 vcc, v128.h, v2.h
+// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_cmp_eq_u16_e32 vcc, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_cmp_eq_u16_e32 vcc, v128.h, v2.h quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_cmp_eq_u16_e32 vcc, v128.l, v2.l
+// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_cmp_eq_u16_e32 vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_cmp_eq_u16_e32 vcc, v128.l, v2.l quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_cmp_eq_u16_e32 vcc, vcc_hi, v255.h
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_eq_u16_e32 vcc, vcc_hi, v255.l
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_eq_u16_e32 vcc, vcc_lo, v255.h
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_eq_u16_e32 vcc, vcc_lo, v255.l
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_eq_u16_e32 vcc_lo, v1.h, v255.h
 // GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_eq_u16_e32 vcc, v128, v2 quad_perm:[3,2,1,0]
+v_cmp_eq_u16_e32 vcc_lo, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
 // GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_eq_u16_e32 vcc, vcc_hi, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_eq_u16_e32 vcc_lo, v1.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_eq_u16_e32 vcc, vcc_lo, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_eq_u16_e32 vcc_lo, v1.l, v255.l
+// GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_eq_u16_e32 vcc_lo, v1, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_eq_u16_e32 vcc_lo, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_eq_u16_e32 vcc_lo, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_eq_u16_e32 vcc_lo, v1.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_eq_u16_e32 vcc_lo, v1, v255 quad_perm:[3,2,1,0]
-// GFX11: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_eq_u16_e32 vcc_lo, v127.h, v255.h
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_eq_u16_e32 vcc_lo, v127, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_eq_u16_e32 vcc_lo, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_eq_u16_e32 vcc_lo, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: :[[@LINE-1]]:37: error: invalid operand for instruction
+v_cmp_eq_u16_e32 vcc_lo, v127.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_eq_u16_e32 vcc_lo, v127, v255 quad_perm:[3,2,1,0]
-// GFX11: :[[@LINE-1]]:37: error: invalid operand for instruction
+v_cmp_eq_u16_e32 vcc_lo, v127.l, v255.l
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_eq_u16_e32 vcc_lo, v128, v2
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_eq_u16_e32 vcc_lo, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_eq_u16_e32 vcc_lo, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_eq_u16_e32 vcc_lo, v127.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_eq_u16_e32 vcc_lo, v128, v2 quad_perm:[3,2,1,0]
-// GFX11: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_eq_u16_e32 vcc_lo, v128.h, v2.h
+// GFX11: :[[@LINE-1]]:26: error: invalid operand for instruction
 
-v_cmp_eq_u16_e32 vcc_lo, vcc_hi, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_eq_u16_e32 vcc_lo, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:26: error: invalid operand for instruction
 
-v_cmp_eq_u16_e32 vcc_lo, vcc_lo, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_eq_u16_e32 vcc_lo, v128.h, v2.h quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:26: error: invalid operand for instruction
+
+v_cmp_eq_u16_e32 vcc_lo, v128.l, v2.l
+// GFX11: :[[@LINE-1]]:26: error: invalid operand for instruction
+
+v_cmp_eq_u16_e32 vcc_lo, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:26: error: invalid operand for instruction
+
+v_cmp_eq_u16_e32 vcc_lo, v128.l, v2.l quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:26: error: invalid operand for instruction
+
+v_cmp_eq_u16_e32 vcc_lo, vcc_hi, v255.h
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_eq_u16_e32 vcc_lo, vcc_hi, v255.l
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_eq_u16_e32 vcc_lo, vcc_lo, v255.h
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_eq_u16_e32 vcc_lo, vcc_lo, v255.l
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
 
 v_cmp_f_f16_e32 vcc, v1, v255
 // GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
@@ -388,146 +521,278 @@ v_cmp_ge_f16_e32 vcc_lo, vcc_hi, v255
 v_cmp_ge_f16_e32 vcc_lo, vcc_lo, v255
 // GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16_e32 vcc, v1, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ge_i16_e32 vcc, v1.h, v255.h
+// GFX11: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_ge_i16_e32 vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
+v_cmp_ge_i16_e32 vcc, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_ge_i16_e32 vcc, v1, v255 quad_perm:[3,2,1,0]
-// GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
+v_cmp_ge_i16_e32 vcc, v1.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_ge_i16_e32 vcc, v127, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ge_i16_e32 vcc, v1.l, v255.l
+// GFX11: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_ge_i16_e32 vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
+v_cmp_ge_i16_e32 vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_ge_i16_e32 vcc, v127, v255 quad_perm:[3,2,1,0]
-// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
+v_cmp_ge_i16_e32 vcc, v1.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_ge_i16_e32 vcc, v128, v2
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ge_i16_e32 vcc, v127.h, v255.h
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_ge_i16_e32 vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
+v_cmp_ge_i16_e32 vcc, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_ge_i16_e32 vcc, v128, v2 quad_perm:[3,2,1,0]
-// GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
+v_cmp_ge_i16_e32 vcc, v127.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_ge_i16_e32 vcc, vcc_hi, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ge_i16_e32 vcc, v127.l, v255.l
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_ge_i16_e32 vcc, vcc_lo, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ge_i16_e32 vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_ge_i16_e32 vcc_lo, v1, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ge_i16_e32 vcc, v127.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_ge_i16_e32 vcc_lo, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_ge_i16_e32 vcc, v128.h, v2.h
+// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
 
-v_cmp_ge_i16_e32 vcc_lo, v1, v255 quad_perm:[3,2,1,0]
-// GFX11: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_ge_i16_e32 vcc, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
 
-v_cmp_ge_i16_e32 vcc_lo, v127, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ge_i16_e32 vcc, v128.h, v2.h quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
 
-v_cmp_ge_i16_e32 vcc_lo, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: :[[@LINE-1]]:37: error: invalid operand for instruction
+v_cmp_ge_i16_e32 vcc, v128.l, v2.l
+// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
 
-v_cmp_ge_i16_e32 vcc_lo, v127, v255 quad_perm:[3,2,1,0]
-// GFX11: :[[@LINE-1]]:37: error: invalid operand for instruction
+v_cmp_ge_i16_e32 vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
 
-v_cmp_ge_i16_e32 vcc_lo, v128, v2
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ge_i16_e32 vcc, v128.l, v2.l quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
 
-v_cmp_ge_i16_e32 vcc_lo, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_ge_i16_e32 vcc, vcc_hi, v255.h
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_ge_i16_e32 vcc_lo, v128, v2 quad_perm:[3,2,1,0]
-// GFX11: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_ge_i16_e32 vcc, vcc_hi, v255.l
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_ge_i16_e32 vcc_lo, vcc_hi, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ge_i16_e32 vcc, vcc_lo, v255.h
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_ge_i16_e32 vcc_lo, vcc_lo, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ge_i16_e32 vcc, vcc_lo, v255.l
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_ge_u16_e32 vcc, v1, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ge_i16_e32 vcc_lo, v1.h, v255.h
+// GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_ge_u16_e32 vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
+v_cmp_ge_i16_e32 vcc_lo, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
 // GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_ge_u16_e32 vcc, v1, v255 quad_perm:[3,2,1,0]
+v_cmp_ge_i16_e32 vcc_lo, v1.h, v255.h quad_perm:[3,2,1,0]
 // GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_ge_u16_e32 vcc, v127, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ge_i16_e32 vcc_lo, v1.l, v255.l
+// GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
+
+v_cmp_ge_i16_e32 vcc_lo, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
+
+v_cmp_ge_i16_e32 vcc_lo, v1.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_ge_u16_e32 vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
+v_cmp_ge_i16_e32 vcc_lo, v127.h, v255.h
 // GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_ge_u16_e32 vcc, v127, v255 quad_perm:[3,2,1,0]
+v_cmp_ge_i16_e32 vcc_lo, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
 // GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_ge_u16_e32 vcc, v128, v2
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ge_i16_e32 vcc_lo, v127.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_ge_u16_e32 vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
+v_cmp_ge_i16_e32 vcc_lo, v127.l, v255.l
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_ge_u16_e32 vcc, v128, v2 quad_perm:[3,2,1,0]
-// GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
+v_cmp_ge_i16_e32 vcc_lo, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_ge_u16_e32 vcc, vcc_hi, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ge_i16_e32 vcc_lo, v127.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_ge_u16_e32 vcc, vcc_lo, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ge_i16_e32 vcc_lo, v128.h, v2.h
+// GFX11: :[[@LINE-1]]:26: error: invalid operand for instruction
 
-v_cmp_ge_u16_e32 vcc_lo, v1, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ge_i16_e32 vcc_lo, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:26: error: invalid operand for instruction
 
-v_cmp_ge_u16_e32 vcc_lo, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_ge_i16_e32 vcc_lo, v128.h, v2.h quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:26: error: invalid operand for instruction
 
-v_cmp_ge_u16_e32 vcc_lo, v1, v255 quad_perm:[3,2,1,0]
-// GFX11: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_ge_i16_e32 vcc_lo, v128.l, v2.l
+// GFX11: :[[@LINE-1]]:26: error: invalid operand for instruction
 
-v_cmp_ge_u16_e32 vcc_lo, v127, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ge_i16_e32 vcc_lo, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:26: error: invalid operand for instruction
 
-v_cmp_ge_u16_e32 vcc_lo, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: :[[@LINE-1]]:37: error: invalid operand for instruction
+v_cmp_ge_i16_e32 vcc_lo, v128.l, v2.l quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:26: error: invalid operand for instruction
 
-v_cmp_ge_u16_e32 vcc_lo, v127, v255 quad_perm:[3,2,1,0]
-// GFX11: :[[@LINE-1]]:37: error: invalid operand for instruction
+v_cmp_ge_i16_e32 vcc_lo, vcc_hi, v255.h
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_ge_u16_e32 vcc_lo, v128, v2
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ge_i16_e32 vcc_lo, vcc_hi, v255.l
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_ge_u16_e32 vcc_lo, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_ge_i16_e32 vcc_lo, vcc_lo, v255.h
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_ge_u16_e32 vcc_lo, v128, v2 quad_perm:[3,2,1,0]
-// GFX11: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_ge_i16_e32 vcc_lo, vcc_lo, v255.l
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_ge_u16_e32 vcc_lo, vcc_hi, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ge_u16_e32 vcc, v1.h, v255.h
+// GFX11: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_ge_u16_e32 vcc_lo, vcc_lo, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ge_u16_e32 vcc, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_gt_f16_e32 vcc, v1, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ge_u16_e32 vcc, v1.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_gt_f16_e32 vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
+v_cmp_ge_u16_e32 vcc, v1.l, v255.l
+// GFX11: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_gt_f16_e32 vcc, v1, v255 quad_perm:[3,2,1,0]
-// GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
+v_cmp_ge_u16_e32 vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:29: error: invalid operand for instruction
+
+v_cmp_ge_u16_e32 vcc, v1.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:29: error: invalid operand for instruction
+
+v_cmp_ge_u16_e32 vcc, v127.h, v255.h
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_ge_u16_e32 vcc, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_ge_u16_e32 vcc, v127.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_ge_u16_e32 vcc, v127.l, v255.l
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_ge_u16_e32 vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_ge_u16_e32 vcc, v127.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_ge_u16_e32 vcc, v128.h, v2.h
+// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_cmp_ge_u16_e32 vcc, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_cmp_ge_u16_e32 vcc, v128.h, v2.h quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_cmp_ge_u16_e32 vcc, v128.l, v2.l
+// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_cmp_ge_u16_e32 vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_cmp_ge_u16_e32 vcc, v128.l, v2.l quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_cmp_ge_u16_e32 vcc, vcc_hi, v255.h
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_ge_u16_e32 vcc, vcc_hi, v255.l
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_ge_u16_e32 vcc, vcc_lo, v255.h
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_ge_u16_e32 vcc, vcc_lo, v255.l
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_ge_u16_e32 vcc_lo, v1.h, v255.h
+// GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
+
+v_cmp_ge_u16_e32 vcc_lo, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
+
+v_cmp_ge_u16_e32 vcc_lo, v1.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
+
+v_cmp_ge_u16_e32 vcc_lo, v1.l, v255.l
+// GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
+
+v_cmp_ge_u16_e32 vcc_lo, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
+
+v_cmp_ge_u16_e32 vcc_lo, v1.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
+
+v_cmp_ge_u16_e32 vcc_lo, v127.h, v255.h
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_ge_u16_e32 vcc_lo, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_ge_u16_e32 vcc_lo, v127.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_ge_u16_e32 vcc_lo, v127.l, v255.l
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_ge_u16_e32 vcc_lo, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_ge_u16_e32 vcc_lo, v127.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_ge_u16_e32 vcc_lo, v128.h, v2.h
+// GFX11: :[[@LINE-1]]:26: error: invalid operand for instruction
+
+v_cmp_ge_u16_e32 vcc_lo, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:26: error: invalid operand for instruction
+
+v_cmp_ge_u16_e32 vcc_lo, v128.h, v2.h quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:26: error: invalid operand for instruction
+
+v_cmp_ge_u16_e32 vcc_lo, v128.l, v2.l
+// GFX11: :[[@LINE-1]]:26: error: invalid operand for instruction
+
+v_cmp_ge_u16_e32 vcc_lo, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:26: error: invalid operand for instruction
+
+v_cmp_ge_u16_e32 vcc_lo, v128.l, v2.l quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:26: error: invalid operand for instruction
+
+v_cmp_ge_u16_e32 vcc_lo, vcc_hi, v255.h
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_ge_u16_e32 vcc_lo, vcc_hi, v255.l
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_ge_u16_e32 vcc_lo, vcc_lo, v255.h
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_ge_u16_e32 vcc_lo, vcc_lo, v255.l
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_gt_f16_e32 vcc, v1, v255
+// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f16_e32 vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
+
+v_cmp_gt_f16_e32 vcc, v1, v255 quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
 
 v_cmp_gt_f16_e32 vcc, v127, v255
 // GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
@@ -586,137 +851,269 @@ v_cmp_gt_f16_e32 vcc_lo, vcc_hi, v255
 v_cmp_gt_f16_e32 vcc_lo, vcc_lo, v255
 // GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16_e32 vcc, v1, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_gt_i16_e32 vcc, v1.h, v255.h
+// GFX11: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_gt_i16_e32 vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
+v_cmp_gt_i16_e32 vcc, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_gt_i16_e32 vcc, v1, v255 quad_perm:[3,2,1,0]
-// GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
+v_cmp_gt_i16_e32 vcc, v1.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_gt_i16_e32 vcc, v127, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_gt_i16_e32 vcc, v1.l, v255.l
+// GFX11: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_gt_i16_e32 vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
+v_cmp_gt_i16_e32 vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_gt_i16_e32 vcc, v127, v255 quad_perm:[3,2,1,0]
-// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
+v_cmp_gt_i16_e32 vcc, v1.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_gt_i16_e32 vcc, v128, v2
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_gt_i16_e32 vcc, v127.h, v255.h
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_gt_i16_e32 vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
+v_cmp_gt_i16_e32 vcc, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_gt_i16_e32 vcc, v128, v2 quad_perm:[3,2,1,0]
-// GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
+v_cmp_gt_i16_e32 vcc, v127.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_gt_i16_e32 vcc, vcc_hi, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_gt_i16_e32 vcc, v127.l, v255.l
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_gt_i16_e32 vcc, vcc_lo, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_gt_i16_e32 vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_gt_i16_e32 vcc_lo, v1, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_gt_i16_e32 vcc, v127.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_gt_i16_e32 vcc_lo, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_gt_i16_e32 vcc, v128.h, v2.h
+// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
 
-v_cmp_gt_i16_e32 vcc_lo, v1, v255 quad_perm:[3,2,1,0]
-// GFX11: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_gt_i16_e32 vcc, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
 
-v_cmp_gt_i16_e32 vcc_lo, v127, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_gt_i16_e32 vcc, v128.h, v2.h quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
 
-v_cmp_gt_i16_e32 vcc_lo, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: :[[@LINE-1]]:37: error: invalid operand for instruction
+v_cmp_gt_i16_e32 vcc, v128.l, v2.l
+// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
 
-v_cmp_gt_i16_e32 vcc_lo, v127, v255 quad_perm:[3,2,1,0]
-// GFX11: :[[@LINE-1]]:37: error: invalid operand for instruction
+v_cmp_gt_i16_e32 vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
 
-v_cmp_gt_i16_e32 vcc_lo, v128, v2
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_gt_i16_e32 vcc, v128.l, v2.l quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
 
-v_cmp_gt_i16_e32 vcc_lo, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_gt_i16_e32 vcc, vcc_hi, v255.h
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_gt_i16_e32 vcc_lo, v128, v2 quad_perm:[3,2,1,0]
-// GFX11: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_gt_i16_e32 vcc, vcc_hi, v255.l
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_gt_i16_e32 vcc_lo, vcc_hi, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_gt_i16_e32 vcc, vcc_lo, v255.h
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_gt_i16_e32 vcc_lo, vcc_lo, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_gt_i16_e32 vcc, vcc_lo, v255.l
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_gt_u16_e32 vcc, v1, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_gt_i16_e32 vcc_lo, v1.h, v255.h
+// GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_gt_u16_e32 vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
+v_cmp_gt_i16_e32 vcc_lo, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
 // GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_gt_u16_e32 vcc, v1, v255 quad_perm:[3,2,1,0]
+v_cmp_gt_i16_e32 vcc_lo, v1.h, v255.h quad_perm:[3,2,1,0]
 // GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_gt_u16_e32 vcc, v127, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_gt_i16_e32 vcc_lo, v1.l, v255.l
+// GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_gt_u16_e32 vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
+v_cmp_gt_i16_e32 vcc_lo, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
+
+v_cmp_gt_i16_e32 vcc_lo, v1.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
+
+v_cmp_gt_i16_e32 vcc_lo, v127.h, v255.h
 // GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_gt_u16_e32 vcc, v127, v255 quad_perm:[3,2,1,0]
+v_cmp_gt_i16_e32 vcc_lo, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
 // GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_gt_u16_e32 vcc, v128, v2
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_gt_i16_e32 vcc_lo, v127.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_gt_i16_e32 vcc_lo, v127.l, v255.l
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_gt_i16_e32 vcc_lo, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_gt_i16_e32 vcc_lo, v127.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_gt_i16_e32 vcc_lo, v128.h, v2.h
+// GFX11: :[[@LINE-1]]:26: error: invalid operand for instruction
+
+v_cmp_gt_i16_e32 vcc_lo, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:26: error: invalid operand for instruction
+
+v_cmp_gt_i16_e32 vcc_lo, v128.h, v2.h quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:26: error: invalid operand for instruction
+
+v_cmp_gt_i16_e32 vcc_lo, v128.l, v2.l
+// GFX11: :[[@LINE-1]]:26: error: invalid operand for instruction
+
+v_cmp_gt_i16_e32 vcc_lo, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:26: error: invalid operand for instruction
+
+v_cmp_gt_i16_e32 vcc_lo, v128.l, v2.l quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:26: error: invalid operand for instruction
+
+v_cmp_gt_i16_e32 vcc_lo, vcc_hi, v255.h
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_gt_i16_e32 vcc_lo, vcc_hi, v255.l
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_gt_i16_e32 vcc_lo, vcc_lo, v255.h
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_gt_i16_e32 vcc_lo, vcc_lo, v255.l
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_gt_u16_e32 vcc, v1.h, v255.h
+// GFX11: :[[@LINE-1]]:29: error: invalid operand for instruction
+
+v_cmp_gt_u16_e32 vcc, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:29: error: invalid operand for instruction
+
+v_cmp_gt_u16_e32 vcc, v1.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:29: error: invalid operand for instruction
+
+v_cmp_gt_u16_e32 vcc, v1.l, v255.l
+// GFX11: :[[@LINE-1]]:29: error: invalid operand for instruction
+
+v_cmp_gt_u16_e32 vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:29: error: invalid operand for instruction
+
+v_cmp_gt_u16_e32 vcc, v1.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:29: error: invalid operand for instruction
+
+v_cmp_gt_u16_e32 vcc, v127.h, v255.h
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_gt_u16_e32 vcc, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_gt_u16_e32 vcc, v127.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_gt_u16_e32 vcc, v127.l, v255.l
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_gt_u16_e32 vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_gt_u16_e32 vcc, v127.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_gt_u16_e32 vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
+v_cmp_gt_u16_e32 vcc, v128.h, v2.h
+// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_cmp_gt_u16_e32 vcc, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_cmp_gt_u16_e32 vcc, v128.h, v2.h quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_cmp_gt_u16_e32 vcc, v128.l, v2.l
+// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_cmp_gt_u16_e32 vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_cmp_gt_u16_e32 vcc, v128.l, v2.l quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_cmp_gt_u16_e32 vcc, vcc_hi, v255.h
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_gt_u16_e32 vcc, vcc_hi, v255.l
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_gt_u16_e32 vcc, vcc_lo, v255.h
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_gt_u16_e32 vcc, vcc_lo, v255.l
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_gt_u16_e32 vcc_lo, v1.h, v255.h
 // GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_gt_u16_e32 vcc, v128, v2 quad_perm:[3,2,1,0]
+v_cmp_gt_u16_e32 vcc_lo, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
 // GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_gt_u16_e32 vcc, vcc_hi, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_gt_u16_e32 vcc_lo, v1.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_gt_u16_e32 vcc, vcc_lo, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_gt_u16_e32 vcc_lo, v1.l, v255.l
+// GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_gt_u16_e32 vcc_lo, v1, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_gt_u16_e32 vcc_lo, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_gt_u16_e32 vcc_lo, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_gt_u16_e32 vcc_lo, v1.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_gt_u16_e32 vcc_lo, v1, v255 quad_perm:[3,2,1,0]
-// GFX11: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_gt_u16_e32 vcc_lo, v127.h, v255.h
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_gt_u16_e32 vcc_lo, v127, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_gt_u16_e32 vcc_lo, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_gt_u16_e32 vcc_lo, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: :[[@LINE-1]]:37: error: invalid operand for instruction
+v_cmp_gt_u16_e32 vcc_lo, v127.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_gt_u16_e32 vcc_lo, v127, v255 quad_perm:[3,2,1,0]
-// GFX11: :[[@LINE-1]]:37: error: invalid operand for instruction
+v_cmp_gt_u16_e32 vcc_lo, v127.l, v255.l
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_gt_u16_e32 vcc_lo, v128, v2
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_gt_u16_e32 vcc_lo, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_gt_u16_e32 vcc_lo, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_gt_u16_e32 vcc_lo, v127.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_gt_u16_e32 vcc_lo, v128, v2 quad_perm:[3,2,1,0]
-// GFX11: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_gt_u16_e32 vcc_lo, v128.h, v2.h
+// GFX11: :[[@LINE-1]]:26: error: invalid operand for instruction
 
-v_cmp_gt_u16_e32 vcc_lo, vcc_hi, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_gt_u16_e32 vcc_lo, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:26: error: invalid operand for instruction
 
-v_cmp_gt_u16_e32 vcc_lo, vcc_lo, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_gt_u16_e32 vcc_lo, v128.h, v2.h quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:26: error: invalid operand for instruction
+
+v_cmp_gt_u16_e32 vcc_lo, v128.l, v2.l
+// GFX11: :[[@LINE-1]]:26: error: invalid operand for instruction
+
+v_cmp_gt_u16_e32 vcc_lo, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:26: error: invalid operand for instruction
+
+v_cmp_gt_u16_e32 vcc_lo, v128.l, v2.l quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:26: error: invalid operand for instruction
+
+v_cmp_gt_u16_e32 vcc_lo, vcc_hi, v255.h
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_gt_u16_e32 vcc_lo, vcc_hi, v255.l
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_gt_u16_e32 vcc_lo, vcc_lo, v255.h
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_gt_u16_e32 vcc_lo, vcc_lo, v255.l
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
 
 v_cmp_le_f16_e32 vcc, v1, v255
 // GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
@@ -784,599 +1181,995 @@ v_cmp_le_f16_e32 vcc_lo, vcc_hi, v255
 v_cmp_le_f16_e32 vcc_lo, vcc_lo, v255
 // GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16_e32 vcc, v1, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_le_i16_e32 vcc, v1.h, v255.h
+// GFX11: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_le_i16_e32 vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
+v_cmp_le_i16_e32 vcc, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_le_i16_e32 vcc, v1, v255 quad_perm:[3,2,1,0]
+v_cmp_le_i16_e32 vcc, v1.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:29: error: invalid operand for instruction
+
+v_cmp_le_i16_e32 vcc, v1.l, v255.l
+// GFX11: :[[@LINE-1]]:29: error: invalid operand for instruction
+
+v_cmp_le_i16_e32 vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:29: error: invalid operand for instruction
+
+v_cmp_le_i16_e32 vcc, v1.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:29: error: invalid operand for instruction
+
+v_cmp_le_i16_e32 vcc, v127.h, v255.h
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_le_i16_e32 vcc, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_le_i16_e32 vcc, v127.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_le_i16_e32 vcc, v127.l, v255.l
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_le_i16_e32 vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_le_i16_e32 vcc, v127.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_le_i16_e32 vcc, v128.h, v2.h
+// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_cmp_le_i16_e32 vcc, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_cmp_le_i16_e32 vcc, v128.h, v2.h quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_cmp_le_i16_e32 vcc, v128.l, v2.l
+// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_cmp_le_i16_e32 vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_cmp_le_i16_e32 vcc, v128.l, v2.l quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_cmp_le_i16_e32 vcc, vcc_hi, v255.h
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_le_i16_e32 vcc, vcc_hi, v255.l
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_le_i16_e32 vcc, vcc_lo, v255.h
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_le_i16_e32 vcc, vcc_lo, v255.l
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_le_i16_e32 vcc_lo, v1.h, v255.h
 // GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_le_i16_e32 vcc, v127, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_le_i16_e32 vcc_lo, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
+
+v_cmp_le_i16_e32 vcc_lo, v1.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
+
+v_cmp_le_i16_e32 vcc_lo, v1.l, v255.l
+// GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_le_i16_e32 vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
+v_cmp_le_i16_e32 vcc_lo, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
+
+v_cmp_le_i16_e32 vcc_lo, v1.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
+
+v_cmp_le_i16_e32 vcc_lo, v127.h, v255.h
 // GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_le_i16_e32 vcc, v127, v255 quad_perm:[3,2,1,0]
+v_cmp_le_i16_e32 vcc_lo, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
 // GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_le_i16_e32 vcc, v128, v2
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_le_i16_e32 vcc_lo, v127.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_le_i16_e32 vcc_lo, v127.l, v255.l
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_le_i16_e32 vcc_lo, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_le_i16_e32 vcc_lo, v127.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_le_i16_e32 vcc_lo, v128.h, v2.h
+// GFX11: :[[@LINE-1]]:26: error: invalid operand for instruction
+
+v_cmp_le_i16_e32 vcc_lo, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:26: error: invalid operand for instruction
+
+v_cmp_le_i16_e32 vcc_lo, v128.h, v2.h quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:26: error: invalid operand for instruction
+
+v_cmp_le_i16_e32 vcc_lo, v128.l, v2.l
+// GFX11: :[[@LINE-1]]:26: error: invalid operand for instruction
+
+v_cmp_le_i16_e32 vcc_lo, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:26: error: invalid operand for instruction
+
+v_cmp_le_i16_e32 vcc_lo, v128.l, v2.l quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:26: error: invalid operand for instruction
+
+v_cmp_le_i16_e32 vcc_lo, vcc_hi, v255.h
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_le_i16_e32 vcc_lo, vcc_hi, v255.l
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_le_i16_e32 vcc_lo, vcc_lo, v255.h
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_le_i16_e32 vcc_lo, vcc_lo, v255.l
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_le_u16_e32 vcc, v1.h, v255.h
+// GFX11: :[[@LINE-1]]:29: error: invalid operand for instruction
+
+v_cmp_le_u16_e32 vcc, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:29: error: invalid operand for instruction
+
+v_cmp_le_u16_e32 vcc, v1.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:29: error: invalid operand for instruction
+
+v_cmp_le_u16_e32 vcc, v1.l, v255.l
+// GFX11: :[[@LINE-1]]:29: error: invalid operand for instruction
+
+v_cmp_le_u16_e32 vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:29: error: invalid operand for instruction
+
+v_cmp_le_u16_e32 vcc, v1.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:29: error: invalid operand for instruction
+
+v_cmp_le_u16_e32 vcc, v127.h, v255.h
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_le_i16_e32 vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
+v_cmp_le_u16_e32 vcc, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_le_u16_e32 vcc, v127.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_le_u16_e32 vcc, v127.l, v255.l
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_le_u16_e32 vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_le_u16_e32 vcc, v127.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_le_u16_e32 vcc, v128.h, v2.h
+// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_cmp_le_u16_e32 vcc, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_cmp_le_u16_e32 vcc, v128.h, v2.h quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_cmp_le_u16_e32 vcc, v128.l, v2.l
+// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_cmp_le_u16_e32 vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_cmp_le_u16_e32 vcc, v128.l, v2.l quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_cmp_le_u16_e32 vcc, vcc_hi, v255.h
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_le_u16_e32 vcc, vcc_hi, v255.l
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_le_u16_e32 vcc, vcc_lo, v255.h
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_le_u16_e32 vcc, vcc_lo, v255.l
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_le_u16_e32 vcc_lo, v1.h, v255.h
 // GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_le_i16_e32 vcc, v128, v2 quad_perm:[3,2,1,0]
+v_cmp_le_u16_e32 vcc_lo, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
 // GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_le_i16_e32 vcc, vcc_hi, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_le_u16_e32 vcc_lo, v1.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_le_i16_e32 vcc, vcc_lo, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_le_u16_e32 vcc_lo, v1.l, v255.l
+// GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_le_i16_e32 vcc_lo, v1, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_le_u16_e32 vcc_lo, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_le_i16_e32 vcc_lo, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_le_u16_e32 vcc_lo, v1.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_le_i16_e32 vcc_lo, v1, v255 quad_perm:[3,2,1,0]
-// GFX11: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_le_u16_e32 vcc_lo, v127.h, v255.h
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_le_i16_e32 vcc_lo, v127, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_le_u16_e32 vcc_lo, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_le_i16_e32 vcc_lo, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: :[[@LINE-1]]:37: error: invalid operand for instruction
+v_cmp_le_u16_e32 vcc_lo, v127.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_le_i16_e32 vcc_lo, v127, v255 quad_perm:[3,2,1,0]
-// GFX11: :[[@LINE-1]]:37: error: invalid operand for instruction
+v_cmp_le_u16_e32 vcc_lo, v127.l, v255.l
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_le_i16_e32 vcc_lo, v128, v2
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_le_u16_e32 vcc_lo, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_le_i16_e32 vcc_lo, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_le_u16_e32 vcc_lo, v127.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_le_i16_e32 vcc_lo, v128, v2 quad_perm:[3,2,1,0]
-// GFX11: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_le_u16_e32 vcc_lo, v128.h, v2.h
+// GFX11: :[[@LINE-1]]:26: error: invalid operand for instruction
 
-v_cmp_le_i16_e32 vcc_lo, vcc_hi, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_le_u16_e32 vcc_lo, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:26: error: invalid operand for instruction
 
-v_cmp_le_i16_e32 vcc_lo, vcc_lo, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_le_u16_e32 vcc_lo, v128.h, v2.h quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:26: error: invalid operand for instruction
+
+v_cmp_le_u16_e32 vcc_lo, v128.l, v2.l
+// GFX11: :[[@LINE-1]]:26: error: invalid operand for instruction
 
-v_cmp_le_u16_e32 vcc, v1, v255
+v_cmp_le_u16_e32 vcc_lo, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:26: error: invalid operand for instruction
+
+v_cmp_le_u16_e32 vcc_lo, v128.l, v2.l quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:26: error: invalid operand for instruction
+
+v_cmp_le_u16_e32 vcc_lo, vcc_hi, v255.h
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_le_u16_e32 vcc_lo, vcc_hi, v255.l
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_le_u16_e32 vcc_lo, vcc_lo, v255.h
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_le_u16_e32 vcc_lo, vcc_lo, v255.l
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_lg_f16_e32 vcc, v1, v255
 // GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16_e32 vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
+v_cmp_lg_f16_e32 vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
 // GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_le_u16_e32 vcc, v1, v255 quad_perm:[3,2,1,0]
+v_cmp_lg_f16_e32 vcc, v1, v255 quad_perm:[3,2,1,0]
 // GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_le_u16_e32 vcc, v127, v255
+v_cmp_lg_f16_e32 vcc, v127, v255
 // GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16_e32 vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
+v_cmp_lg_f16_e32 vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
 // GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_le_u16_e32 vcc, v127, v255 quad_perm:[3,2,1,0]
+v_cmp_lg_f16_e32 vcc, v127, v255 quad_perm:[3,2,1,0]
 // GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_le_u16_e32 vcc, v128, v2
+v_cmp_lg_f16_e32 vcc, v128, v2
 // GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16_e32 vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
+v_cmp_lg_f16_e32 vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
 // GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_le_u16_e32 vcc, v128, v2 quad_perm:[3,2,1,0]
+v_cmp_lg_f16_e32 vcc, v128, v2 quad_perm:[3,2,1,0]
 // GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_le_u16_e32 vcc, vcc_hi, v255
+v_cmp_lg_f16_e32 vcc, vcc_hi, v255
 // GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16_e32 vcc, vcc_lo, v255
+v_cmp_lg_f16_e32 vcc, vcc_lo, v255
 // GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16_e32 vcc_lo, v1, v255
+v_cmp_lg_f16_e32 vcc_lo, v1, v255
 // GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16_e32 vcc_lo, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
+v_cmp_lg_f16_e32 vcc_lo, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
 // GFX11: :[[@LINE-1]]:35: error: invalid operand for instruction
 
-v_cmp_le_u16_e32 vcc_lo, v1, v255 quad_perm:[3,2,1,0]
+v_cmp_lg_f16_e32 vcc_lo, v1, v255 quad_perm:[3,2,1,0]
 // GFX11: :[[@LINE-1]]:35: error: invalid operand for instruction
 
-v_cmp_le_u16_e32 vcc_lo, v127, v255
+v_cmp_lg_f16_e32 vcc_lo, v127, v255
 // GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16_e32 vcc_lo, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
+v_cmp_lg_f16_e32 vcc_lo, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
 // GFX11: :[[@LINE-1]]:37: error: invalid operand for instruction
 
-v_cmp_le_u16_e32 vcc_lo, v127, v255 quad_perm:[3,2,1,0]
+v_cmp_lg_f16_e32 vcc_lo, v127, v255 quad_perm:[3,2,1,0]
 // GFX11: :[[@LINE-1]]:37: error: invalid operand for instruction
 
-v_cmp_le_u16_e32 vcc_lo, v128, v2
+v_cmp_lg_f16_e32 vcc_lo, v128, v2
 // GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16_e32 vcc_lo, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
+v_cmp_lg_f16_e32 vcc_lo, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
 // GFX11: :[[@LINE-1]]:35: error: invalid operand for instruction
 
-v_cmp_le_u16_e32 vcc_lo, v128, v2 quad_perm:[3,2,1,0]
+v_cmp_lg_f16_e32 vcc_lo, v128, v2 quad_perm:[3,2,1,0]
 // GFX11: :[[@LINE-1]]:35: error: invalid operand for instruction
 
-v_cmp_le_u16_e32 vcc_lo, vcc_hi, v255
+v_cmp_lg_f16_e32 vcc_lo, vcc_hi, v255
 // GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16_e32 vcc_lo, vcc_lo, v255
+v_cmp_lg_f16_e32 vcc_lo, vcc_lo, v255
 // GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lg_f16_e32 vcc, v1, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_lt_f16_e32 vcc, v1.h, v255.h
+// GFX11: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_lg_f16_e32 vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
+v_cmp_lt_f16_e32 vcc, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:29: error: invalid operand for instruction
+
+v_cmp_lt_f16_e32 vcc, v1.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:29: error: invalid operand for instruction
+
+v_cmp_lt_f16_e32 vcc, v1.l, v255.l
+// GFX11: :[[@LINE-1]]:29: error: invalid operand for instruction
+
+v_cmp_lt_f16_e32 vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:29: error: invalid operand for instruction
+
+v_cmp_lt_f16_e32 vcc, v1.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:29: error: invalid operand for instruction
+
+v_cmp_lt_f16_e32 vcc, v127.h, v255.h
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_lt_f16_e32 vcc, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_lt_f16_e32 vcc, v127.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_lt_f16_e32 vcc, v127.l, v255.l
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_lt_f16_e32 vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_lt_f16_e32 vcc, v127.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_lt_f16_e32 vcc, v128.h, v2.h
+// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_cmp_lt_f16_e32 vcc, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_cmp_lt_f16_e32 vcc, v128.h, v2.h quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_cmp_lt_f16_e32 vcc, v128.l, v2.l
+// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_cmp_lt_f16_e32 vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_cmp_lt_f16_e32 vcc, v128.l, v2.l quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_cmp_lt_f16_e32 vcc, vcc_hi, v255.h
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_lt_f16_e32 vcc, vcc_hi, v255.l
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_lt_f16_e32 vcc, vcc_lo, v255.h
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_lt_f16_e32 vcc, vcc_lo, v255.l
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_lt_f16_e32 vcc_lo, v1.h, v255.h
 // GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_lg_f16_e32 vcc, v1, v255 quad_perm:[3,2,1,0]
+v_cmp_lt_f16_e32 vcc_lo, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
 // GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_lg_f16_e32 vcc, v127, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_lt_f16_e32 vcc_lo, v1.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_lg_f16_e32 vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
+v_cmp_lt_f16_e32 vcc_lo, v1.l, v255.l
+// GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
+
+v_cmp_lt_f16_e32 vcc_lo, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
+
+v_cmp_lt_f16_e32 vcc_lo, v1.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
+
+v_cmp_lt_f16_e32 vcc_lo, v127.h, v255.h
 // GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_lg_f16_e32 vcc, v127, v255 quad_perm:[3,2,1,0]
+v_cmp_lt_f16_e32 vcc_lo, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
 // GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_lg_f16_e32 vcc, v128, v2
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_lt_f16_e32 vcc_lo, v127.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_lt_f16_e32 vcc_lo, v127.l, v255.l
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_lt_f16_e32 vcc_lo, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_lt_f16_e32 vcc_lo, v127.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_lt_f16_e32 vcc_lo, v128.h, v2.h
+// GFX11: :[[@LINE-1]]:26: error: invalid operand for instruction
+
+v_cmp_lt_f16_e32 vcc_lo, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:26: error: invalid operand for instruction
+
+v_cmp_lt_f16_e32 vcc_lo, v128.h, v2.h quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:26: error: invalid operand for instruction
+
+v_cmp_lt_f16_e32 vcc_lo, v128.l, v2.l
+// GFX11: :[[@LINE-1]]:26: error: invalid operand for instruction
+
+v_cmp_lt_f16_e32 vcc_lo, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:26: error: invalid operand for instruction
+
+v_cmp_lt_f16_e32 vcc_lo, v128.l, v2.l quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:26: error: invalid operand for instruction
+
+v_cmp_lt_f16_e32 vcc_lo, vcc_hi, v255.h
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_lt_f16_e32 vcc_lo, vcc_hi, v255.l
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_lt_f16_e32 vcc_lo, vcc_lo, v255.h
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_lt_f16_e32 vcc_lo, vcc_lo, v255.l
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_lt_i16_e32 vcc, v1.h, v255.h
+// GFX11: :[[@LINE-1]]:29: error: invalid operand for instruction
+
+v_cmp_lt_i16_e32 vcc, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:29: error: invalid operand for instruction
+
+v_cmp_lt_i16_e32 vcc, v1.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:29: error: invalid operand for instruction
+
+v_cmp_lt_i16_e32 vcc, v1.l, v255.l
+// GFX11: :[[@LINE-1]]:29: error: invalid operand for instruction
+
+v_cmp_lt_i16_e32 vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:29: error: invalid operand for instruction
+
+v_cmp_lt_i16_e32 vcc, v1.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:29: error: invalid operand for instruction
+
+v_cmp_lt_i16_e32 vcc, v127.h, v255.h
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_lt_i16_e32 vcc, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_lt_i16_e32 vcc, v127.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_lt_i16_e32 vcc, v127.l, v255.l
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_lt_i16_e32 vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_lt_i16_e32 vcc, v127.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_lt_i16_e32 vcc, v128.h, v2.h
+// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_cmp_lt_i16_e32 vcc, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_cmp_lt_i16_e32 vcc, v128.h, v2.h quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_cmp_lt_i16_e32 vcc, v128.l, v2.l
+// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_cmp_lt_i16_e32 vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_cmp_lt_i16_e32 vcc, v128.l, v2.l quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_cmp_lt_i16_e32 vcc, vcc_hi, v255.h
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_lt_i16_e32 vcc, vcc_hi, v255.l
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_lt_i16_e32 vcc, vcc_lo, v255.h
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_lt_i16_e32 vcc, vcc_lo, v255.l
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_lt_i16_e32 vcc_lo, v1.h, v255.h
+// GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
+
+v_cmp_lt_i16_e32 vcc_lo, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
+
+v_cmp_lt_i16_e32 vcc_lo, v1.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
+
+v_cmp_lt_i16_e32 vcc_lo, v1.l, v255.l
+// GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_lg_f16_e32 vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
+v_cmp_lt_i16_e32 vcc_lo, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
 // GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_lg_f16_e32 vcc, v128, v2 quad_perm:[3,2,1,0]
+v_cmp_lt_i16_e32 vcc_lo, v1.l, v255.l quad_perm:[3,2,1,0]
 // GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_lg_f16_e32 vcc, vcc_hi, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_lt_i16_e32 vcc_lo, v127.h, v255.h
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_lg_f16_e32 vcc, vcc_lo, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_lt_i16_e32 vcc_lo, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_lg_f16_e32 vcc_lo, v1, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_lt_i16_e32 vcc_lo, v127.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_lg_f16_e32 vcc_lo, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_lt_i16_e32 vcc_lo, v127.l, v255.l
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_lg_f16_e32 vcc_lo, v1, v255 quad_perm:[3,2,1,0]
-// GFX11: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_lt_i16_e32 vcc_lo, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_lg_f16_e32 vcc_lo, v127, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_lt_i16_e32 vcc_lo, v127.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_lg_f16_e32 vcc_lo, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: :[[@LINE-1]]:37: error: invalid operand for instruction
+v_cmp_lt_i16_e32 vcc_lo, v128.h, v2.h
+// GFX11: :[[@LINE-1]]:26: error: invalid operand for instruction
 
-v_cmp_lg_f16_e32 vcc_lo, v127, v255 quad_perm:[3,2,1,0]
-// GFX11: :[[@LINE-1]]:37: error: invalid operand for instruction
+v_cmp_lt_i16_e32 vcc_lo, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:26: error: invalid operand for instruction
 
-v_cmp_lg_f16_e32 vcc_lo, v128, v2
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_lt_i16_e32 vcc_lo, v128.h, v2.h quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:26: error: invalid operand for instruction
 
-v_cmp_lg_f16_e32 vcc_lo, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_lt_i16_e32 vcc_lo, v128.l, v2.l
+// GFX11: :[[@LINE-1]]:26: error: invalid operand for instruction
 
-v_cmp_lg_f16_e32 vcc_lo, v128, v2 quad_perm:[3,2,1,0]
-// GFX11: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_lt_i16_e32 vcc_lo, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:26: error: invalid operand for instruction
 
-v_cmp_lg_f16_e32 vcc_lo, vcc_hi, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_lt_i16_e32 vcc_lo, v128.l, v2.l quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:26: error: invalid operand for instruction
 
-v_cmp_lg_f16_e32 vcc_lo, vcc_lo, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_lt_i16_e32 vcc_lo, vcc_hi, v255.h
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc, v1.h, v255.h
+v_cmp_lt_i16_e32 vcc_lo, vcc_hi, v255.l
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_lt_i16_e32 vcc_lo, vcc_lo, v255.h
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_lt_i16_e32 vcc_lo, vcc_lo, v255.l
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_lt_u16_e32 vcc, v1.h, v255.h
 // GFX11: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+v_cmp_lt_u16_e32 vcc, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
 // GFX11: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc, v1.h, v255.h quad_perm:[3,2,1,0]
+v_cmp_lt_u16_e32 vcc, v1.h, v255.h quad_perm:[3,2,1,0]
 // GFX11: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc, v1.l, v255.l
+v_cmp_lt_u16_e32 vcc, v1.l, v255.l
 // GFX11: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+v_cmp_lt_u16_e32 vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
 // GFX11: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc, v1.l, v255.l quad_perm:[3,2,1,0]
+v_cmp_lt_u16_e32 vcc, v1.l, v255.l quad_perm:[3,2,1,0]
 // GFX11: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc, v127.h, v255.h
+v_cmp_lt_u16_e32 vcc, v127.h, v255.h
 // GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+v_cmp_lt_u16_e32 vcc, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
 // GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc, v127.h, v255.h quad_perm:[3,2,1,0]
+v_cmp_lt_u16_e32 vcc, v127.h, v255.h quad_perm:[3,2,1,0]
 // GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc, v127.l, v255.l
+v_cmp_lt_u16_e32 vcc, v127.l, v255.l
 // GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+v_cmp_lt_u16_e32 vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
 // GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc, v127.l, v255.l quad_perm:[3,2,1,0]
+v_cmp_lt_u16_e32 vcc, v127.l, v255.l quad_perm:[3,2,1,0]
 // GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc, v128.h, v2.h
+v_cmp_lt_u16_e32 vcc, v128.h, v2.h
 // GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+v_cmp_lt_u16_e32 vcc, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
 // GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc, v128.h, v2.h quad_perm:[3,2,1,0]
+v_cmp_lt_u16_e32 vcc, v128.h, v2.h quad_perm:[3,2,1,0]
 // GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc, v128.l, v2.l
+v_cmp_lt_u16_e32 vcc, v128.l, v2.l
 // GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+v_cmp_lt_u16_e32 vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
 // GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc, v128.l, v2.l quad_perm:[3,2,1,0]
+v_cmp_lt_u16_e32 vcc, v128.l, v2.l quad_perm:[3,2,1,0]
 // GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc, vcc_hi, v255.h
+v_cmp_lt_u16_e32 vcc, vcc_hi, v255.h
 // GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc, vcc_hi, v255.l
+v_cmp_lt_u16_e32 vcc, vcc_hi, v255.l
 // GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc, vcc_lo, v255.h
+v_cmp_lt_u16_e32 vcc, vcc_lo, v255.h
 // GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc, vcc_lo, v255.l
+v_cmp_lt_u16_e32 vcc, vcc_lo, v255.l
 // GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc_lo, v1.h, v255.h
+v_cmp_lt_u16_e32 vcc_lo, v1.h, v255.h
 // GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc_lo, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+v_cmp_lt_u16_e32 vcc_lo, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
 // GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc_lo, v1.h, v255.h quad_perm:[3,2,1,0]
+v_cmp_lt_u16_e32 vcc_lo, v1.h, v255.h quad_perm:[3,2,1,0]
 // GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc_lo, v1.l, v255.l
+v_cmp_lt_u16_e32 vcc_lo, v1.l, v255.l
 // GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc_lo, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+v_cmp_lt_u16_e32 vcc_lo, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
 // GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc_lo, v1.l, v255.l quad_perm:[3,2,1,0]
+v_cmp_lt_u16_e32 vcc_lo, v1.l, v255.l quad_perm:[3,2,1,0]
 // GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc_lo, v127.h, v255.h
+v_cmp_lt_u16_e32 vcc_lo, v127.h, v255.h
 // GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc_lo, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+v_cmp_lt_u16_e32 vcc_lo, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
 // GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc_lo, v127.h, v255.h quad_perm:[3,2,1,0]
+v_cmp_lt_u16_e32 vcc_lo, v127.h, v255.h quad_perm:[3,2,1,0]
 // GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc_lo, v127.l, v255.l
+v_cmp_lt_u16_e32 vcc_lo, v127.l, v255.l
 // GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc_lo, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+v_cmp_lt_u16_e32 vcc_lo, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
 // GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc_lo, v127.l, v255.l quad_perm:[3,2,1,0]
+v_cmp_lt_u16_e32 vcc_lo, v127.l, v255.l quad_perm:[3,2,1,0]
 // GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc_lo, v128.h, v2.h
+v_cmp_lt_u16_e32 vcc_lo, v128.h, v2.h
 // GFX11: :[[@LINE-1]]:26: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc_lo, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+v_cmp_lt_u16_e32 vcc_lo, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
 // GFX11: :[[@LINE-1]]:26: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc_lo, v128.h, v2.h quad_perm:[3,2,1,0]
+v_cmp_lt_u16_e32 vcc_lo, v128.h, v2.h quad_perm:[3,2,1,0]
 // GFX11: :[[@LINE-1]]:26: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc_lo, v128.l, v2.l
+v_cmp_lt_u16_e32 vcc_lo, v128.l, v2.l
 // GFX11: :[[@LINE-1]]:26: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc_lo, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+v_cmp_lt_u16_e32 vcc_lo, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
 // GFX11: :[[@LINE-1]]:26: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc_lo, v128.l, v2.l quad_perm:[3,2,1,0]
+v_cmp_lt_u16_e32 vcc_lo, v128.l, v2.l quad_perm:[3,2,1,0]
 // GFX11: :[[@LINE-1]]:26: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc_lo, vcc_hi, v255.h
+v_cmp_lt_u16_e32 vcc_lo, vcc_hi, v255.h
 // GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc_lo, vcc_hi, v255.l
+v_cmp_lt_u16_e32 vcc_lo, vcc_hi, v255.l
 // GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc_lo, vcc_lo, v255.h
+v_cmp_lt_u16_e32 vcc_lo, vcc_lo, v255.h
 // GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc_lo, vcc_lo, v255.l
+v_cmp_lt_u16_e32 vcc_lo, vcc_lo, v255.l
 // GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_lt_i16_e32 vcc, v1, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_i16_e32 vcc, v1.h, v255.h
+// GFX11: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_lt_i16_e32 vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
+v_cmp_ne_i16_e32 vcc, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_lt_i16_e32 vcc, v1, v255 quad_perm:[3,2,1,0]
-// GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
+v_cmp_ne_i16_e32 vcc, v1.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_lt_i16_e32 vcc, v127, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_i16_e32 vcc, v1.l, v255.l
+// GFX11: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_lt_i16_e32 vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
+v_cmp_ne_i16_e32 vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_lt_i16_e32 vcc, v127, v255 quad_perm:[3,2,1,0]
-// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
+v_cmp_ne_i16_e32 vcc, v1.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_lt_i16_e32 vcc, v128, v2
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_i16_e32 vcc, v127.h, v255.h
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_lt_i16_e32 vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
+v_cmp_ne_i16_e32 vcc, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_lt_i16_e32 vcc, v128, v2 quad_perm:[3,2,1,0]
-// GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
+v_cmp_ne_i16_e32 vcc, v127.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_lt_i16_e32 vcc, vcc_hi, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_i16_e32 vcc, v127.l, v255.l
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_lt_i16_e32 vcc, vcc_lo, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_i16_e32 vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_lt_i16_e32 vcc_lo, v1, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_i16_e32 vcc, v127.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_lt_i16_e32 vcc_lo, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_ne_i16_e32 vcc, v128.h, v2.h
+// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
 
-v_cmp_lt_i16_e32 vcc_lo, v1, v255 quad_perm:[3,2,1,0]
-// GFX11: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_ne_i16_e32 vcc, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
 
-v_cmp_lt_i16_e32 vcc_lo, v127, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_i16_e32 vcc, v128.h, v2.h quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
 
-v_cmp_lt_i16_e32 vcc_lo, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: :[[@LINE-1]]:37: error: invalid operand for instruction
+v_cmp_ne_i16_e32 vcc, v128.l, v2.l
+// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
 
-v_cmp_lt_i16_e32 vcc_lo, v127, v255 quad_perm:[3,2,1,0]
-// GFX11: :[[@LINE-1]]:37: error: invalid operand for instruction
+v_cmp_ne_i16_e32 vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
 
-v_cmp_lt_i16_e32 vcc_lo, v128, v2
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_i16_e32 vcc, v128.l, v2.l quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
 
-v_cmp_lt_i16_e32 vcc_lo, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_ne_i16_e32 vcc, vcc_hi, v255.h
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_lt_i16_e32 vcc_lo, v128, v2 quad_perm:[3,2,1,0]
-// GFX11: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_ne_i16_e32 vcc, vcc_hi, v255.l
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_lt_i16_e32 vcc_lo, vcc_hi, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_i16_e32 vcc, vcc_lo, v255.h
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_lt_i16_e32 vcc_lo, vcc_lo, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_i16_e32 vcc, vcc_lo, v255.l
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_lt_u16_e32 vcc, v1, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_i16_e32 vcc_lo, v1.h, v255.h
+// GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_lt_u16_e32 vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
+v_cmp_ne_i16_e32 vcc_lo, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
 // GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_lt_u16_e32 vcc, v1, v255 quad_perm:[3,2,1,0]
+v_cmp_ne_i16_e32 vcc_lo, v1.h, v255.h quad_perm:[3,2,1,0]
 // GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_lt_u16_e32 vcc, v127, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_i16_e32 vcc_lo, v1.l, v255.l
+// GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
+
+v_cmp_ne_i16_e32 vcc_lo, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
+
+v_cmp_ne_i16_e32 vcc_lo, v1.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_lt_u16_e32 vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
+v_cmp_ne_i16_e32 vcc_lo, v127.h, v255.h
 // GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_lt_u16_e32 vcc, v127, v255 quad_perm:[3,2,1,0]
+v_cmp_ne_i16_e32 vcc_lo, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
 // GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_lt_u16_e32 vcc, v128, v2
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_i16_e32 vcc_lo, v127.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_lt_u16_e32 vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
+v_cmp_ne_i16_e32 vcc_lo, v127.l, v255.l
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_lt_u16_e32 vcc, v128, v2 quad_perm:[3,2,1,0]
-// GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
+v_cmp_ne_i16_e32 vcc_lo, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_lt_u16_e32 vcc, vcc_hi, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_i16_e32 vcc_lo, v127.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_lt_u16_e32 vcc, vcc_lo, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_i16_e32 vcc_lo, v128.h, v2.h
+// GFX11: :[[@LINE-1]]:26: error: invalid operand for instruction
 
-v_cmp_lt_u16_e32 vcc_lo, v1, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_i16_e32 vcc_lo, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:26: error: invalid operand for instruction
 
-v_cmp_lt_u16_e32 vcc_lo, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_ne_i16_e32 vcc_lo, v128.h, v2.h quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:26: error: invalid operand for instruction
 
-v_cmp_lt_u16_e32 vcc_lo, v1, v255 quad_perm:[3,2,1,0]
-// GFX11: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_ne_i16_e32 vcc_lo, v128.l, v2.l
+// GFX11: :[[@LINE-1]]:26: error: invalid operand for instruction
 
-v_cmp_lt_u16_e32 vcc_lo, v127, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_i16_e32 vcc_lo, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:26: error: invalid operand for instruction
 
-v_cmp_lt_u16_e32 vcc_lo, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: :[[@LINE-1]]:37: error: invalid operand for instruction
+v_cmp_ne_i16_e32 vcc_lo, v128.l, v2.l quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:26: error: invalid operand for instruction
 
-v_cmp_lt_u16_e32 vcc_lo, v127, v255 quad_perm:[3,2,1,0]
-// GFX11: :[[@LINE-1]]:37: error: invalid operand for instruction
+v_cmp_ne_i16_e32 vcc_lo, vcc_hi, v255.h
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_lt_u16_e32 vcc_lo, v128, v2
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_i16_e32 vcc_lo, vcc_hi, v255.l
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_lt_u16_e32 vcc_lo, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_ne_i16_e32 vcc_lo, vcc_lo, v255.h
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_lt_u16_e32 vcc_lo, v128, v2 quad_perm:[3,2,1,0]
-// GFX11: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_ne_i16_e32 vcc_lo, vcc_lo, v255.l
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_lt_u16_e32 vcc_lo, vcc_hi, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_u16_e32 vcc, v1.h, v255.h
+// GFX11: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_lt_u16_e32 vcc_lo, vcc_lo, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_u16_e32 vcc, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_ne_i16_e32 vcc, v1, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_u16_e32 vcc, v1.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_ne_i16_e32 vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
+v_cmp_ne_u16_e32 vcc, v1.l, v255.l
+// GFX11: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_ne_i16_e32 vcc, v1, v255 quad_perm:[3,2,1,0]
-// GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
+v_cmp_ne_u16_e32 vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_ne_i16_e32 vcc, v127, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_u16_e32 vcc, v1.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_ne_i16_e32 vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
+v_cmp_ne_u16_e32 vcc, v127.h, v255.h
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_ne_i16_e32 vcc, v127, v255 quad_perm:[3,2,1,0]
-// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
+v_cmp_ne_u16_e32 vcc, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_ne_i16_e32 vcc, v128, v2
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_u16_e32 vcc, v127.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_ne_i16_e32 vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
+v_cmp_ne_u16_e32 vcc, v127.l, v255.l
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_ne_i16_e32 vcc, v128, v2 quad_perm:[3,2,1,0]
-// GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
+v_cmp_ne_u16_e32 vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_ne_i16_e32 vcc, vcc_hi, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_u16_e32 vcc, v127.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_ne_i16_e32 vcc, vcc_lo, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_u16_e32 vcc, v128.h, v2.h
+// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
 
-v_cmp_ne_i16_e32 vcc_lo, v1, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_u16_e32 vcc, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
 
-v_cmp_ne_i16_e32 vcc_lo, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_ne_u16_e32 vcc, v128.h, v2.h quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
 
-v_cmp_ne_i16_e32 vcc_lo, v1, v255 quad_perm:[3,2,1,0]
-// GFX11: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_ne_u16_e32 vcc, v128.l, v2.l
+// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
 
-v_cmp_ne_i16_e32 vcc_lo, v127, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_u16_e32 vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
 
-v_cmp_ne_i16_e32 vcc_lo, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: :[[@LINE-1]]:37: error: invalid operand for instruction
+v_cmp_ne_u16_e32 vcc, v128.l, v2.l quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:23: error: invalid operand for instruction
 
-v_cmp_ne_i16_e32 vcc_lo, v127, v255 quad_perm:[3,2,1,0]
-// GFX11: :[[@LINE-1]]:37: error: invalid operand for instruction
+v_cmp_ne_u16_e32 vcc, vcc_hi, v255.h
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_ne_i16_e32 vcc_lo, v128, v2
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_u16_e32 vcc, vcc_hi, v255.l
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_ne_i16_e32 vcc_lo, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_ne_u16_e32 vcc, vcc_lo, v255.h
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_ne_i16_e32 vcc_lo, v128, v2 quad_perm:[3,2,1,0]
-// GFX11: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_ne_u16_e32 vcc, vcc_lo, v255.l
+// GFX11: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_ne_i16_e32 vcc_lo, vcc_hi, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_u16_e32 vcc_lo, v1.h, v255.h
+// GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_ne_i16_e32 vcc_lo, vcc_lo, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_u16_e32 vcc_lo, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_ne_u16_e32 vcc, v1, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_u16_e32 vcc_lo, v1.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_ne_u16_e32 vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
+v_cmp_ne_u16_e32 vcc_lo, v1.l, v255.l
 // GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_ne_u16_e32 vcc, v1, v255 quad_perm:[3,2,1,0]
+v_cmp_ne_u16_e32 vcc_lo, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
 // GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_ne_u16_e32 vcc, v127, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_u16_e32 vcc_lo, v1.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_ne_u16_e32 vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
+v_cmp_ne_u16_e32 vcc_lo, v127.h, v255.h
 // GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_ne_u16_e32 vcc, v127, v255 quad_perm:[3,2,1,0]
+v_cmp_ne_u16_e32 vcc_lo, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
 // GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_ne_u16_e32 vcc, v128, v2
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u16_e32 vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
-
-v_cmp_ne_u16_e32 vcc, v128, v2 quad_perm:[3,2,1,0]
-// GFX11: :[[@LINE-1]]:32: error: invalid operand for instruction
+v_cmp_ne_u16_e32 vcc_lo, v127.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_ne_u16_e32 vcc, vcc_hi, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_u16_e32 vcc_lo, v127.l, v255.l
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_ne_u16_e32 vcc, vcc_lo, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_u16_e32 vcc_lo, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_ne_u16_e32 vcc_lo, v1, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_u16_e32 vcc_lo, v127.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_ne_u16_e32 vcc_lo, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_ne_u16_e32 vcc_lo, v128.h, v2.h
+// GFX11: :[[@LINE-1]]:26: error: invalid operand for instruction
 
-v_cmp_ne_u16_e32 vcc_lo, v1, v255 quad_perm:[3,2,1,0]
-// GFX11: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_ne_u16_e32 vcc_lo, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:26: error: invalid operand for instruction
 
-v_cmp_ne_u16_e32 vcc_lo, v127, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_u16_e32 vcc_lo, v128.h, v2.h quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:26: error: invalid operand for instruction
 
-v_cmp_ne_u16_e32 vcc_lo, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: :[[@LINE-1]]:37: error: invalid operand for instruction
+v_cmp_ne_u16_e32 vcc_lo, v128.l, v2.l
+// GFX11: :[[@LINE-1]]:26: error: invalid operand for instruction
 
-v_cmp_ne_u16_e32 vcc_lo, v127, v255 quad_perm:[3,2,1,0]
-// GFX11: :[[@LINE-1]]:37: error: invalid operand for instruction
+v_cmp_ne_u16_e32 vcc_lo, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: :[[@LINE-1]]:26: error: invalid operand for instruction
 
-v_cmp_ne_u16_e32 vcc_lo, v128, v2
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_u16_e32 vcc_lo, v128.l, v2.l quad_perm:[3,2,1,0]
+// GFX11: :[[@LINE-1]]:26: error: invalid operand for instruction
 
-v_cmp_ne_u16_e32 vcc_lo, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_ne_u16_e32 vcc_lo, vcc_hi, v255.h
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_ne_u16_e32 vcc_lo, v128, v2 quad_perm:[3,2,1,0]
-// GFX11: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_ne_u16_e32 vcc_lo, vcc_hi, v255.l
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_ne_u16_e32 vcc_lo, vcc_hi, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_u16_e32 vcc_lo, vcc_lo, v255.h
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_ne_u16_e32 vcc_lo, vcc_lo, v255
-// GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_u16_e32 vcc_lo, vcc_lo, v255.l
+// GFX11: :[[@LINE-1]]:34: error: invalid operand for instruction
 
 v_cmp_neq_f16_e32 vcc, v1, v255
 // GFX11: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_vopc_t16_promote.s b/llvm/test/MC/AMDGPU/gfx11_asm_vopc_t16_promote.s
index dc0bf7663ac179..90e3f93ffdac06 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_vopc_t16_promote.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_vopc_t16_promote.s
@@ -1,3 +1,4 @@
+// NOTE: Assertions have been autogenerated by utils/update_mc_test_checks.py UTC_ARGS: --sort --version 5
 ; NOTE: Assertions have been autogenerated by utils/update_mc_test_checks.py UTC_ARGS: --sort --version 5
 // RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize64,+real-true16 -show-encoding %s 2>&1 | FileCheck --check-prefix=GFX11 %s
 
@@ -124,137 +125,269 @@ v_cmp_eq_f16 vcc, vcc_lo, v255
 v_cmp_eq_f16 vcc, vcc_lo, v255
 // GFX11: v_cmp_eq_f16_e64 vcc, vcc_lo, v255      ; encoding: [0x6a,0x00,0x02,0xd4,0x6a,0xfe,0x03,0x00]
 
-v_cmp_eq_i16 vcc, v1, v255
-// GFX11: v_cmp_eq_i16_e64 vcc, v1, v255          ; encoding: [0x6a,0x00,0x32,0xd4,0x01,0xff,0x03,0x00]
+v_cmp_eq_i16 vcc, v1.h, v255.h
+// GFX11: v_cmp_eq_i16_e64 vcc, v1.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x32,0xd4,0x01,0xff,0x03,0x00]
 
-v_cmp_eq_i16 vcc, v1, v255
-// GFX11: v_cmp_eq_i16_e64 vcc, v1, v255          ; encoding: [0x6a,0x00,0x32,0xd4,0x01,0xff,0x03,0x00]
+v_cmp_eq_i16 vcc, v1.h, v255.h
+// GFX11: v_cmp_eq_i16_e64 vcc, v1.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x32,0xd4,0x01,0xff,0x03,0x00]
 
-v_cmp_eq_i16 vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: v_cmp_eq_i16_e64_dpp vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x32,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
+v_cmp_eq_i16 vcc, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_eq_i16_e64_dpp vcc, v1.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x32,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
 
-v_cmp_eq_i16 vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: v_cmp_eq_i16_e64_dpp vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x32,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
+v_cmp_eq_i16 vcc, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_eq_i16_e64_dpp vcc, v1.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x32,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
 
-v_cmp_eq_i16 vcc, v1, v255 quad_perm:[3,2,1,0]
-// GFX11: v_cmp_eq_i16_e64_dpp vcc, v1, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x32,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_eq_i16 vcc, v1.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: v_cmp_eq_i16_e64_dpp vcc, v1.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x32,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
 
-v_cmp_eq_i16 vcc, v1, v255 quad_perm:[3,2,1,0]
-// GFX11: v_cmp_eq_i16_e64_dpp vcc, v1, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x32,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_eq_i16 vcc, v1.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: v_cmp_eq_i16_e64_dpp vcc, v1.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x32,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
 
-v_cmp_eq_i16 vcc, v127, v255
-// GFX11: v_cmp_eq_i16_e64 vcc, v127, v255        ; encoding: [0x6a,0x00,0x32,0xd4,0x7f,0xff,0x03,0x00]
+v_cmp_eq_i16 vcc, v1.l, v255.l
+// GFX11: v_cmp_eq_i16_e64 vcc, v1.l, v255.l      ; encoding: [0x6a,0x00,0x32,0xd4,0x01,0xff,0x03,0x00]
 
-v_cmp_eq_i16 vcc, v127, v255
-// GFX11: v_cmp_eq_i16_e64 vcc, v127, v255        ; encoding: [0x6a,0x00,0x32,0xd4,0x7f,0xff,0x03,0x00]
+v_cmp_eq_i16 vcc, v1.l, v255.l
+// GFX11: v_cmp_eq_i16_e64 vcc, v1.l, v255.l      ; encoding: [0x6a,0x00,0x32,0xd4,0x01,0xff,0x03,0x00]
 
-v_cmp_eq_i16 vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: v_cmp_eq_i16_e64_dpp vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x32,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+v_cmp_eq_i16 vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_eq_i16_e64_dpp vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x32,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
 
-v_cmp_eq_i16 vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: v_cmp_eq_i16_e64_dpp vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x32,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+v_cmp_eq_i16 vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_eq_i16_e64_dpp vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x32,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
 
-v_cmp_eq_i16 vcc, v127, v255 quad_perm:[3,2,1,0]
-// GFX11: v_cmp_eq_i16_e64_dpp vcc, v127, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x32,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+v_cmp_eq_i16 vcc, v1.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: v_cmp_eq_i16_e64_dpp vcc, v1.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x32,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
 
-v_cmp_eq_i16 vcc, v127, v255 quad_perm:[3,2,1,0]
-// GFX11: v_cmp_eq_i16_e64_dpp vcc, v127, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x32,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+v_cmp_eq_i16 vcc, v1.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: v_cmp_eq_i16_e64_dpp vcc, v1.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x32,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
 
-v_cmp_eq_i16 vcc, v128, v2
-// GFX11: v_cmp_eq_i16_e64 vcc, v128, v2          ; encoding: [0x6a,0x00,0x32,0xd4,0x80,0x05,0x02,0x00]
+v_cmp_eq_i16 vcc, v127.h, v255.h
+// GFX11: v_cmp_eq_i16_e64 vcc, v127.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x32,0xd4,0x7f,0xff,0x03,0x00]
 
-v_cmp_eq_i16 vcc, v128, v2
-// GFX11: v_cmp_eq_i16_e64 vcc, v128, v2          ; encoding: [0x6a,0x00,0x32,0xd4,0x80,0x05,0x02,0x00]
+v_cmp_eq_i16 vcc, v127.h, v255.h
+// GFX11: v_cmp_eq_i16_e64 vcc, v127.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x32,0xd4,0x7f,0xff,0x03,0x00]
 
-v_cmp_eq_i16 vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: v_cmp_eq_i16_e64_dpp vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+v_cmp_eq_i16 vcc, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_eq_i16_e64_dpp vcc, v127.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x32,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
 
-v_cmp_eq_i16 vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: v_cmp_eq_i16_e64_dpp vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+v_cmp_eq_i16 vcc, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_eq_i16_e64_dpp vcc, v127.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x32,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
 
-v_cmp_eq_i16 vcc, v128, v2 quad_perm:[3,2,1,0]
-// GFX11: v_cmp_eq_i16_e64_dpp vcc, v128, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+v_cmp_eq_i16 vcc, v127.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: v_cmp_eq_i16_e64_dpp vcc, v127.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x32,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
 
-v_cmp_eq_i16 vcc, v128, v2 quad_perm:[3,2,1,0]
-// GFX11: v_cmp_eq_i16_e64_dpp vcc, v128, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+v_cmp_eq_i16 vcc, v127.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: v_cmp_eq_i16_e64_dpp vcc, v127.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x32,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
 
-v_cmp_eq_i16 vcc, vcc_hi, v255
-// GFX11: v_cmp_eq_i16_e64 vcc, vcc_hi, v255      ; encoding: [0x6a,0x00,0x32,0xd4,0x6b,0xfe,0x03,0x00]
+v_cmp_eq_i16 vcc, v127.l, v255.l
+// GFX11: v_cmp_eq_i16_e64 vcc, v127.l, v255.l    ; encoding: [0x6a,0x00,0x32,0xd4,0x7f,0xff,0x03,0x00]
 
-v_cmp_eq_i16 vcc, vcc_hi, v255
-// GFX11: v_cmp_eq_i16_e64 vcc, vcc_hi, v255      ; encoding: [0x6a,0x00,0x32,0xd4,0x6b,0xfe,0x03,0x00]
+v_cmp_eq_i16 vcc, v127.l, v255.l
+// GFX11: v_cmp_eq_i16_e64 vcc, v127.l, v255.l    ; encoding: [0x6a,0x00,0x32,0xd4,0x7f,0xff,0x03,0x00]
 
-v_cmp_eq_i16 vcc, vcc_lo, v255
-// GFX11: v_cmp_eq_i16_e64 vcc, vcc_lo, v255      ; encoding: [0x6a,0x00,0x32,0xd4,0x6a,0xfe,0x03,0x00]
+v_cmp_eq_i16 vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_eq_i16_e64_dpp vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x32,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
 
-v_cmp_eq_i16 vcc, vcc_lo, v255
-// GFX11: v_cmp_eq_i16_e64 vcc, vcc_lo, v255      ; encoding: [0x6a,0x00,0x32,0xd4,0x6a,0xfe,0x03,0x00]
+v_cmp_eq_i16 vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_eq_i16_e64_dpp vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x32,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
 
-v_cmp_eq_u16 vcc, v1, v255
-// GFX11: v_cmp_eq_u16_e64 vcc, v1, v255          ; encoding: [0x6a,0x00,0x3a,0xd4,0x01,0xff,0x03,0x00]
+v_cmp_eq_i16 vcc, v127.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: v_cmp_eq_i16_e64_dpp vcc, v127.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x32,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
 
-v_cmp_eq_u16 vcc, v1, v255
-// GFX11: v_cmp_eq_u16_e64 vcc, v1, v255          ; encoding: [0x6a,0x00,0x3a,0xd4,0x01,0xff,0x03,0x00]
+v_cmp_eq_i16 vcc, v127.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: v_cmp_eq_i16_e64_dpp vcc, v127.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x32,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
 
-v_cmp_eq_u16 vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: v_cmp_eq_u16_e64_dpp vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3a,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
+v_cmp_eq_i16 vcc, v128.h, v2.h
+// GFX11: v_cmp_eq_i16_e64 vcc, v128.h, v2.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x32,0xd4,0x80,0x05,0x02,0x00]
 
-v_cmp_eq_u16 vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: v_cmp_eq_u16_e64_dpp vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3a,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
+v_cmp_eq_i16 vcc, v128.h, v2.h
+// GFX11: v_cmp_eq_i16_e64 vcc, v128.h, v2.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x32,0xd4,0x80,0x05,0x02,0x00]
 
-v_cmp_eq_u16 vcc, v1, v255 quad_perm:[3,2,1,0]
-// GFX11: v_cmp_eq_u16_e64_dpp vcc, v1, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3a,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_eq_i16 vcc, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_eq_i16_e64_dpp vcc, v128.h, v2.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x32,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
 
-v_cmp_eq_u16 vcc, v1, v255 quad_perm:[3,2,1,0]
-// GFX11: v_cmp_eq_u16_e64_dpp vcc, v1, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3a,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_eq_i16 vcc, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_eq_i16_e64_dpp vcc, v128.h, v2.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x32,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
 
-v_cmp_eq_u16 vcc, v127, v255
-// GFX11: v_cmp_eq_u16_e64 vcc, v127, v255        ; encoding: [0x6a,0x00,0x3a,0xd4,0x7f,0xff,0x03,0x00]
+v_cmp_eq_i16 vcc, v128.h, v2.h quad_perm:[3,2,1,0]
+// GFX11: v_cmp_eq_i16_e64_dpp vcc, v128.h, v2.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x32,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
 
-v_cmp_eq_u16 vcc, v127, v255
-// GFX11: v_cmp_eq_u16_e64 vcc, v127, v255        ; encoding: [0x6a,0x00,0x3a,0xd4,0x7f,0xff,0x03,0x00]
+v_cmp_eq_i16 vcc, v128.h, v2.h quad_perm:[3,2,1,0]
+// GFX11: v_cmp_eq_i16_e64_dpp vcc, v128.h, v2.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x32,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
 
-v_cmp_eq_u16 vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: v_cmp_eq_u16_e64_dpp vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3a,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+v_cmp_eq_i16 vcc, v128.l, v2.l
+// GFX11: v_cmp_eq_i16_e64 vcc, v128.l, v2.l      ; encoding: [0x6a,0x00,0x32,0xd4,0x80,0x05,0x02,0x00]
 
-v_cmp_eq_u16 vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: v_cmp_eq_u16_e64_dpp vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3a,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+v_cmp_eq_i16 vcc, v128.l, v2.l
+// GFX11: v_cmp_eq_i16_e64 vcc, v128.l, v2.l      ; encoding: [0x6a,0x00,0x32,0xd4,0x80,0x05,0x02,0x00]
 
-v_cmp_eq_u16 vcc, v127, v255 quad_perm:[3,2,1,0]
-// GFX11: v_cmp_eq_u16_e64_dpp vcc, v127, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3a,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+v_cmp_eq_i16 vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_eq_i16_e64_dpp vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
 
-v_cmp_eq_u16 vcc, v127, v255 quad_perm:[3,2,1,0]
-// GFX11: v_cmp_eq_u16_e64_dpp vcc, v127, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3a,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+v_cmp_eq_i16 vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_eq_i16_e64_dpp vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
 
-v_cmp_eq_u16 vcc, v128, v2
-// GFX11: v_cmp_eq_u16_e64 vcc, v128, v2          ; encoding: [0x6a,0x00,0x3a,0xd4,0x80,0x05,0x02,0x00]
+v_cmp_eq_i16 vcc, v128.l, v2.l quad_perm:[3,2,1,0]
+// GFX11: v_cmp_eq_i16_e64_dpp vcc, v128.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
 
-v_cmp_eq_u16 vcc, v128, v2
-// GFX11: v_cmp_eq_u16_e64 vcc, v128, v2          ; encoding: [0x6a,0x00,0x3a,0xd4,0x80,0x05,0x02,0x00]
+v_cmp_eq_i16 vcc, v128.l, v2.l quad_perm:[3,2,1,0]
+// GFX11: v_cmp_eq_i16_e64_dpp vcc, v128.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
 
-v_cmp_eq_u16 vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: v_cmp_eq_u16_e64_dpp vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+v_cmp_eq_i16 vcc, vcc_hi, v255.h
+// GFX11: v_cmp_eq_i16_e64 vcc, vcc_hi, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x32,0xd4,0x6b,0xfe,0x03,0x00]
 
-v_cmp_eq_u16 vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: v_cmp_eq_u16_e64_dpp vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+v_cmp_eq_i16 vcc, vcc_hi, v255.h
+// GFX11: v_cmp_eq_i16_e64 vcc, vcc_hi, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x32,0xd4,0x6b,0xfe,0x03,0x00]
 
-v_cmp_eq_u16 vcc, v128, v2 quad_perm:[3,2,1,0]
-// GFX11: v_cmp_eq_u16_e64_dpp vcc, v128, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+v_cmp_eq_i16 vcc, vcc_hi, v255.l
+// GFX11: v_cmp_eq_i16_e64 vcc, vcc_hi, v255.l    ; encoding: [0x6a,0x00,0x32,0xd4,0x6b,0xfe,0x03,0x00]
 
-v_cmp_eq_u16 vcc, v128, v2 quad_perm:[3,2,1,0]
-// GFX11: v_cmp_eq_u16_e64_dpp vcc, v128, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+v_cmp_eq_i16 vcc, vcc_hi, v255.l
+// GFX11: v_cmp_eq_i16_e64 vcc, vcc_hi, v255.l    ; encoding: [0x6a,0x00,0x32,0xd4,0x6b,0xfe,0x03,0x00]
 
-v_cmp_eq_u16 vcc, vcc_hi, v255
-// GFX11: v_cmp_eq_u16_e64 vcc, vcc_hi, v255      ; encoding: [0x6a,0x00,0x3a,0xd4,0x6b,0xfe,0x03,0x00]
+v_cmp_eq_i16 vcc, vcc_lo, v255.h
+// GFX11: v_cmp_eq_i16_e64 vcc, vcc_lo, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x32,0xd4,0x6a,0xfe,0x03,0x00]
 
-v_cmp_eq_u16 vcc, vcc_hi, v255
-// GFX11: v_cmp_eq_u16_e64 vcc, vcc_hi, v255      ; encoding: [0x6a,0x00,0x3a,0xd4,0x6b,0xfe,0x03,0x00]
+v_cmp_eq_i16 vcc, vcc_lo, v255.h
+// GFX11: v_cmp_eq_i16_e64 vcc, vcc_lo, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x32,0xd4,0x6a,0xfe,0x03,0x00]
 
-v_cmp_eq_u16 vcc, vcc_lo, v255
-// GFX11: v_cmp_eq_u16_e64 vcc, vcc_lo, v255      ; encoding: [0x6a,0x00,0x3a,0xd4,0x6a,0xfe,0x03,0x00]
+v_cmp_eq_i16 vcc, vcc_lo, v255.l
+// GFX11: v_cmp_eq_i16_e64 vcc, vcc_lo, v255.l    ; encoding: [0x6a,0x00,0x32,0xd4,0x6a,0xfe,0x03,0x00]
 
-v_cmp_eq_u16 vcc, vcc_lo, v255
-// GFX11: v_cmp_eq_u16_e64 vcc, vcc_lo, v255      ; encoding: [0x6a,0x00,0x3a,0xd4,0x6a,0xfe,0x03,0x00]
+v_cmp_eq_i16 vcc, vcc_lo, v255.l
+// GFX11: v_cmp_eq_i16_e64 vcc, vcc_lo, v255.l    ; encoding: [0x6a,0x00,0x32,0xd4,0x6a,0xfe,0x03,0x00]
+
+v_cmp_eq_u16 vcc, v1.h, v255.h
+// GFX11: v_cmp_eq_u16_e64 vcc, v1.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x3a,0xd4,0x01,0xff,0x03,0x00]
+
+v_cmp_eq_u16 vcc, v1.h, v255.h
+// GFX11: v_cmp_eq_u16_e64 vcc, v1.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x3a,0xd4,0x01,0xff,0x03,0x00]
+
+v_cmp_eq_u16 vcc, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_eq_u16_e64_dpp vcc, v1.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x3a,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
+
+v_cmp_eq_u16 vcc, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_eq_u16_e64_dpp vcc, v1.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x3a,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
+
+v_cmp_eq_u16 vcc, v1.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: v_cmp_eq_u16_e64_dpp vcc, v1.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x3a,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+
+v_cmp_eq_u16 vcc, v1.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: v_cmp_eq_u16_e64_dpp vcc, v1.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x3a,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+
+v_cmp_eq_u16 vcc, v1.l, v255.l
+// GFX11: v_cmp_eq_u16_e64 vcc, v1.l, v255.l      ; encoding: [0x6a,0x00,0x3a,0xd4,0x01,0xff,0x03,0x00]
+
+v_cmp_eq_u16 vcc, v1.l, v255.l
+// GFX11: v_cmp_eq_u16_e64 vcc, v1.l, v255.l      ; encoding: [0x6a,0x00,0x3a,0xd4,0x01,0xff,0x03,0x00]
+
+v_cmp_eq_u16 vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_eq_u16_e64_dpp vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3a,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
+
+v_cmp_eq_u16 vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_eq_u16_e64_dpp vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3a,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
+
+v_cmp_eq_u16 vcc, v1.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: v_cmp_eq_u16_e64_dpp vcc, v1.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3a,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+
+v_cmp_eq_u16 vcc, v1.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: v_cmp_eq_u16_e64_dpp vcc, v1.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3a,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+
+v_cmp_eq_u16 vcc, v127.h, v255.h
+// GFX11: v_cmp_eq_u16_e64 vcc, v127.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x3a,0xd4,0x7f,0xff,0x03,0x00]
+
+v_cmp_eq_u16 vcc, v127.h, v255.h
+// GFX11: v_cmp_eq_u16_e64 vcc, v127.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x3a,0xd4,0x7f,0xff,0x03,0x00]
+
+v_cmp_eq_u16 vcc, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_eq_u16_e64_dpp vcc, v127.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x3a,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+
+v_cmp_eq_u16 vcc, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_eq_u16_e64_dpp vcc, v127.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x3a,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+
+v_cmp_eq_u16 vcc, v127.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: v_cmp_eq_u16_e64_dpp vcc, v127.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x3a,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+
+v_cmp_eq_u16 vcc, v127.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: v_cmp_eq_u16_e64_dpp vcc, v127.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x3a,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+
+v_cmp_eq_u16 vcc, v127.l, v255.l
+// GFX11: v_cmp_eq_u16_e64 vcc, v127.l, v255.l    ; encoding: [0x6a,0x00,0x3a,0xd4,0x7f,0xff,0x03,0x00]
+
+v_cmp_eq_u16 vcc, v127.l, v255.l
+// GFX11: v_cmp_eq_u16_e64 vcc, v127.l, v255.l    ; encoding: [0x6a,0x00,0x3a,0xd4,0x7f,0xff,0x03,0x00]
+
+v_cmp_eq_u16 vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_eq_u16_e64_dpp vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3a,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+
+v_cmp_eq_u16 vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_eq_u16_e64_dpp vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3a,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+
+v_cmp_eq_u16 vcc, v127.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: v_cmp_eq_u16_e64_dpp vcc, v127.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3a,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+
+v_cmp_eq_u16 vcc, v127.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: v_cmp_eq_u16_e64_dpp vcc, v127.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3a,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+
+v_cmp_eq_u16 vcc, v128.h, v2.h
+// GFX11: v_cmp_eq_u16_e64 vcc, v128.h, v2.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x3a,0xd4,0x80,0x05,0x02,0x00]
+
+v_cmp_eq_u16 vcc, v128.h, v2.h
+// GFX11: v_cmp_eq_u16_e64 vcc, v128.h, v2.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x3a,0xd4,0x80,0x05,0x02,0x00]
+
+v_cmp_eq_u16 vcc, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_eq_u16_e64_dpp vcc, v128.h, v2.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+
+v_cmp_eq_u16 vcc, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_eq_u16_e64_dpp vcc, v128.h, v2.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+
+v_cmp_eq_u16 vcc, v128.h, v2.h quad_perm:[3,2,1,0]
+// GFX11: v_cmp_eq_u16_e64_dpp vcc, v128.h, v2.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+
+v_cmp_eq_u16 vcc, v128.h, v2.h quad_perm:[3,2,1,0]
+// GFX11: v_cmp_eq_u16_e64_dpp vcc, v128.h, v2.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+
+v_cmp_eq_u16 vcc, v128.l, v2.l
+// GFX11: v_cmp_eq_u16_e64 vcc, v128.l, v2.l      ; encoding: [0x6a,0x00,0x3a,0xd4,0x80,0x05,0x02,0x00]
+
+v_cmp_eq_u16 vcc, v128.l, v2.l
+// GFX11: v_cmp_eq_u16_e64 vcc, v128.l, v2.l      ; encoding: [0x6a,0x00,0x3a,0xd4,0x80,0x05,0x02,0x00]
+
+v_cmp_eq_u16 vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_eq_u16_e64_dpp vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+
+v_cmp_eq_u16 vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_eq_u16_e64_dpp vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+
+v_cmp_eq_u16 vcc, v128.l, v2.l quad_perm:[3,2,1,0]
+// GFX11: v_cmp_eq_u16_e64_dpp vcc, v128.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+
+v_cmp_eq_u16 vcc, v128.l, v2.l quad_perm:[3,2,1,0]
+// GFX11: v_cmp_eq_u16_e64_dpp vcc, v128.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+
+v_cmp_eq_u16 vcc, vcc_hi, v255.h
+// GFX11: v_cmp_eq_u16_e64 vcc, vcc_hi, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x3a,0xd4,0x6b,0xfe,0x03,0x00]
+
+v_cmp_eq_u16 vcc, vcc_hi, v255.h
+// GFX11: v_cmp_eq_u16_e64 vcc, vcc_hi, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x3a,0xd4,0x6b,0xfe,0x03,0x00]
+
+v_cmp_eq_u16 vcc, vcc_hi, v255.l
+// GFX11: v_cmp_eq_u16_e64 vcc, vcc_hi, v255.l    ; encoding: [0x6a,0x00,0x3a,0xd4,0x6b,0xfe,0x03,0x00]
+
+v_cmp_eq_u16 vcc, vcc_hi, v255.l
+// GFX11: v_cmp_eq_u16_e64 vcc, vcc_hi, v255.l    ; encoding: [0x6a,0x00,0x3a,0xd4,0x6b,0xfe,0x03,0x00]
+
+v_cmp_eq_u16 vcc, vcc_lo, v255.h
+// GFX11: v_cmp_eq_u16_e64 vcc, vcc_lo, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x3a,0xd4,0x6a,0xfe,0x03,0x00]
+
+v_cmp_eq_u16 vcc, vcc_lo, v255.h
+// GFX11: v_cmp_eq_u16_e64 vcc, vcc_lo, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x3a,0xd4,0x6a,0xfe,0x03,0x00]
+
+v_cmp_eq_u16 vcc, vcc_lo, v255.l
+// GFX11: v_cmp_eq_u16_e64 vcc, vcc_lo, v255.l    ; encoding: [0x6a,0x00,0x3a,0xd4,0x6a,0xfe,0x03,0x00]
+
+v_cmp_eq_u16 vcc, vcc_lo, v255.l
+// GFX11: v_cmp_eq_u16_e64 vcc, vcc_lo, v255.l    ; encoding: [0x6a,0x00,0x3a,0xd4,0x6a,0xfe,0x03,0x00]
 
 v_cmp_f_f16 vcc, v1, v255
 // GFX11: v_cmp_f_f16_e64 vcc, v1, v255           ; encoding: [0x6a,0x00,0x00,0xd4,0x01,0xff,0x03,0x00]
@@ -388,137 +521,269 @@ v_cmp_ge_f16 vcc, vcc_lo, v255
 v_cmp_ge_f16 vcc, vcc_lo, v255
 // GFX11: v_cmp_ge_f16_e64 vcc, vcc_lo, v255      ; encoding: [0x6a,0x00,0x06,0xd4,0x6a,0xfe,0x03,0x00]
 
-v_cmp_ge_i16 vcc, v1, v255
-// GFX11: v_cmp_ge_i16_e64 vcc, v1, v255          ; encoding: [0x6a,0x00,0x36,0xd4,0x01,0xff,0x03,0x00]
+v_cmp_ge_i16 vcc, v1.h, v255.h
+// GFX11: v_cmp_ge_i16_e64 vcc, v1.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x36,0xd4,0x01,0xff,0x03,0x00]
+
+v_cmp_ge_i16 vcc, v1.h, v255.h
+// GFX11: v_cmp_ge_i16_e64 vcc, v1.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x36,0xd4,0x01,0xff,0x03,0x00]
+
+v_cmp_ge_i16 vcc, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_ge_i16_e64_dpp vcc, v1.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x36,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
+
+v_cmp_ge_i16 vcc, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_ge_i16_e64_dpp vcc, v1.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x36,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
+
+v_cmp_ge_i16 vcc, v1.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: v_cmp_ge_i16_e64_dpp vcc, v1.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x36,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+
+v_cmp_ge_i16 vcc, v1.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: v_cmp_ge_i16_e64_dpp vcc, v1.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x36,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+
+v_cmp_ge_i16 vcc, v1.l, v255.l
+// GFX11: v_cmp_ge_i16_e64 vcc, v1.l, v255.l      ; encoding: [0x6a,0x00,0x36,0xd4,0x01,0xff,0x03,0x00]
+
+v_cmp_ge_i16 vcc, v1.l, v255.l
+// GFX11: v_cmp_ge_i16_e64 vcc, v1.l, v255.l      ; encoding: [0x6a,0x00,0x36,0xd4,0x01,0xff,0x03,0x00]
+
+v_cmp_ge_i16 vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_ge_i16_e64_dpp vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x36,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
+
+v_cmp_ge_i16 vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_ge_i16_e64_dpp vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x36,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
+
+v_cmp_ge_i16 vcc, v1.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: v_cmp_ge_i16_e64_dpp vcc, v1.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x36,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+
+v_cmp_ge_i16 vcc, v1.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: v_cmp_ge_i16_e64_dpp vcc, v1.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x36,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+
+v_cmp_ge_i16 vcc, v127.h, v255.h
+// GFX11: v_cmp_ge_i16_e64 vcc, v127.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x36,0xd4,0x7f,0xff,0x03,0x00]
+
+v_cmp_ge_i16 vcc, v127.h, v255.h
+// GFX11: v_cmp_ge_i16_e64 vcc, v127.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x36,0xd4,0x7f,0xff,0x03,0x00]
+
+v_cmp_ge_i16 vcc, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_ge_i16_e64_dpp vcc, v127.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x36,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+
+v_cmp_ge_i16 vcc, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_ge_i16_e64_dpp vcc, v127.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x36,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+
+v_cmp_ge_i16 vcc, v127.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: v_cmp_ge_i16_e64_dpp vcc, v127.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x36,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+
+v_cmp_ge_i16 vcc, v127.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: v_cmp_ge_i16_e64_dpp vcc, v127.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x36,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+
+v_cmp_ge_i16 vcc, v127.l, v255.l
+// GFX11: v_cmp_ge_i16_e64 vcc, v127.l, v255.l    ; encoding: [0x6a,0x00,0x36,0xd4,0x7f,0xff,0x03,0x00]
+
+v_cmp_ge_i16 vcc, v127.l, v255.l
+// GFX11: v_cmp_ge_i16_e64 vcc, v127.l, v255.l    ; encoding: [0x6a,0x00,0x36,0xd4,0x7f,0xff,0x03,0x00]
+
+v_cmp_ge_i16 vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_ge_i16_e64_dpp vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x36,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+
+v_cmp_ge_i16 vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_ge_i16_e64_dpp vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x36,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+
+v_cmp_ge_i16 vcc, v127.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: v_cmp_ge_i16_e64_dpp vcc, v127.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x36,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
 
-v_cmp_ge_i16 vcc, v1, v255
-// GFX11: v_cmp_ge_i16_e64 vcc, v1, v255          ; encoding: [0x6a,0x00,0x36,0xd4,0x01,0xff,0x03,0x00]
+v_cmp_ge_i16 vcc, v127.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: v_cmp_ge_i16_e64_dpp vcc, v127.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x36,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
 
-v_cmp_ge_i16 vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: v_cmp_ge_i16_e64_dpp vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x36,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ge_i16 vcc, v128.h, v2.h
+// GFX11: v_cmp_ge_i16_e64 vcc, v128.h, v2.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x36,0xd4,0x80,0x05,0x02,0x00]
 
-v_cmp_ge_i16 vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: v_cmp_ge_i16_e64_dpp vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x36,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ge_i16 vcc, v128.h, v2.h
+// GFX11: v_cmp_ge_i16_e64 vcc, v128.h, v2.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x36,0xd4,0x80,0x05,0x02,0x00]
 
-v_cmp_ge_i16 vcc, v1, v255 quad_perm:[3,2,1,0]
-// GFX11: v_cmp_ge_i16_e64_dpp vcc, v1, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x36,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_ge_i16 vcc, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_ge_i16_e64_dpp vcc, v128.h, v2.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x36,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
 
-v_cmp_ge_i16 vcc, v1, v255 quad_perm:[3,2,1,0]
-// GFX11: v_cmp_ge_i16_e64_dpp vcc, v1, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x36,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_ge_i16 vcc, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_ge_i16_e64_dpp vcc, v128.h, v2.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x36,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
 
-v_cmp_ge_i16 vcc, v127, v255
-// GFX11: v_cmp_ge_i16_e64 vcc, v127, v255        ; encoding: [0x6a,0x00,0x36,0xd4,0x7f,0xff,0x03,0x00]
+v_cmp_ge_i16 vcc, v128.h, v2.h quad_perm:[3,2,1,0]
+// GFX11: v_cmp_ge_i16_e64_dpp vcc, v128.h, v2.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x36,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
 
-v_cmp_ge_i16 vcc, v127, v255
-// GFX11: v_cmp_ge_i16_e64 vcc, v127, v255        ; encoding: [0x6a,0x00,0x36,0xd4,0x7f,0xff,0x03,0x00]
+v_cmp_ge_i16 vcc, v128.h, v2.h quad_perm:[3,2,1,0]
+// GFX11: v_cmp_ge_i16_e64_dpp vcc, v128.h, v2.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x36,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
 
-v_cmp_ge_i16 vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: v_cmp_ge_i16_e64_dpp vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x36,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+v_cmp_ge_i16 vcc, v128.l, v2.l
+// GFX11: v_cmp_ge_i16_e64 vcc, v128.l, v2.l      ; encoding: [0x6a,0x00,0x36,0xd4,0x80,0x05,0x02,0x00]
 
-v_cmp_ge_i16 vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: v_cmp_ge_i16_e64_dpp vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x36,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+v_cmp_ge_i16 vcc, v128.l, v2.l
+// GFX11: v_cmp_ge_i16_e64 vcc, v128.l, v2.l      ; encoding: [0x6a,0x00,0x36,0xd4,0x80,0x05,0x02,0x00]
 
-v_cmp_ge_i16 vcc, v127, v255 quad_perm:[3,2,1,0]
-// GFX11: v_cmp_ge_i16_e64_dpp vcc, v127, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x36,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+v_cmp_ge_i16 vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_ge_i16_e64_dpp vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
 
-v_cmp_ge_i16 vcc, v127, v255 quad_perm:[3,2,1,0]
-// GFX11: v_cmp_ge_i16_e64_dpp vcc, v127, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x36,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+v_cmp_ge_i16 vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_ge_i16_e64_dpp vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
 
-v_cmp_ge_i16 vcc, v128, v2
-// GFX11: v_cmp_ge_i16_e64 vcc, v128, v2          ; encoding: [0x6a,0x00,0x36,0xd4,0x80,0x05,0x02,0x00]
+v_cmp_ge_i16 vcc, v128.l, v2.l quad_perm:[3,2,1,0]
+// GFX11: v_cmp_ge_i16_e64_dpp vcc, v128.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
 
-v_cmp_ge_i16 vcc, v128, v2
-// GFX11: v_cmp_ge_i16_e64 vcc, v128, v2          ; encoding: [0x6a,0x00,0x36,0xd4,0x80,0x05,0x02,0x00]
+v_cmp_ge_i16 vcc, v128.l, v2.l quad_perm:[3,2,1,0]
+// GFX11: v_cmp_ge_i16_e64_dpp vcc, v128.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
 
-v_cmp_ge_i16 vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: v_cmp_ge_i16_e64_dpp vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+v_cmp_ge_i16 vcc, vcc_hi, v255.h
+// GFX11: v_cmp_ge_i16_e64 vcc, vcc_hi, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x36,0xd4,0x6b,0xfe,0x03,0x00]
 
-v_cmp_ge_i16 vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: v_cmp_ge_i16_e64_dpp vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+v_cmp_ge_i16 vcc, vcc_hi, v255.h
+// GFX11: v_cmp_ge_i16_e64 vcc, vcc_hi, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x36,0xd4,0x6b,0xfe,0x03,0x00]
 
-v_cmp_ge_i16 vcc, v128, v2 quad_perm:[3,2,1,0]
-// GFX11: v_cmp_ge_i16_e64_dpp vcc, v128, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+v_cmp_ge_i16 vcc, vcc_hi, v255.l
+// GFX11: v_cmp_ge_i16_e64 vcc, vcc_hi, v255.l    ; encoding: [0x6a,0x00,0x36,0xd4,0x6b,0xfe,0x03,0x00]
 
-v_cmp_ge_i16 vcc, v128, v2 quad_perm:[3,2,1,0]
-// GFX11: v_cmp_ge_i16_e64_dpp vcc, v128, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+v_cmp_ge_i16 vcc, vcc_hi, v255.l
+// GFX11: v_cmp_ge_i16_e64 vcc, vcc_hi, v255.l    ; encoding: [0x6a,0x00,0x36,0xd4,0x6b,0xfe,0x03,0x00]
 
-v_cmp_ge_i16 vcc, vcc_hi, v255
-// GFX11: v_cmp_ge_i16_e64 vcc, vcc_hi, v255      ; encoding: [0x6a,0x00,0x36,0xd4,0x6b,0xfe,0x03,0x00]
+v_cmp_ge_i16 vcc, vcc_lo, v255.h
+// GFX11: v_cmp_ge_i16_e64 vcc, vcc_lo, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x36,0xd4,0x6a,0xfe,0x03,0x00]
 
-v_cmp_ge_i16 vcc, vcc_hi, v255
-// GFX11: v_cmp_ge_i16_e64 vcc, vcc_hi, v255      ; encoding: [0x6a,0x00,0x36,0xd4,0x6b,0xfe,0x03,0x00]
+v_cmp_ge_i16 vcc, vcc_lo, v255.h
+// GFX11: v_cmp_ge_i16_e64 vcc, vcc_lo, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x36,0xd4,0x6a,0xfe,0x03,0x00]
 
-v_cmp_ge_i16 vcc, vcc_lo, v255
-// GFX11: v_cmp_ge_i16_e64 vcc, vcc_lo, v255      ; encoding: [0x6a,0x00,0x36,0xd4,0x6a,0xfe,0x03,0x00]
+v_cmp_ge_i16 vcc, vcc_lo, v255.l
+// GFX11: v_cmp_ge_i16_e64 vcc, vcc_lo, v255.l    ; encoding: [0x6a,0x00,0x36,0xd4,0x6a,0xfe,0x03,0x00]
 
-v_cmp_ge_i16 vcc, vcc_lo, v255
-// GFX11: v_cmp_ge_i16_e64 vcc, vcc_lo, v255      ; encoding: [0x6a,0x00,0x36,0xd4,0x6a,0xfe,0x03,0x00]
+v_cmp_ge_i16 vcc, vcc_lo, v255.l
+// GFX11: v_cmp_ge_i16_e64 vcc, vcc_lo, v255.l    ; encoding: [0x6a,0x00,0x36,0xd4,0x6a,0xfe,0x03,0x00]
 
-v_cmp_ge_u16 vcc, v1, v255
-// GFX11: v_cmp_ge_u16_e64 vcc, v1, v255          ; encoding: [0x6a,0x00,0x3e,0xd4,0x01,0xff,0x03,0x00]
+v_cmp_ge_u16 vcc, v1.h, v255.h
+// GFX11: v_cmp_ge_u16_e64 vcc, v1.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x3e,0xd4,0x01,0xff,0x03,0x00]
 
-v_cmp_ge_u16 vcc, v1, v255
-// GFX11: v_cmp_ge_u16_e64 vcc, v1, v255          ; encoding: [0x6a,0x00,0x3e,0xd4,0x01,0xff,0x03,0x00]
+v_cmp_ge_u16 vcc, v1.h, v255.h
+// GFX11: v_cmp_ge_u16_e64 vcc, v1.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x3e,0xd4,0x01,0xff,0x03,0x00]
 
-v_cmp_ge_u16 vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: v_cmp_ge_u16_e64_dpp vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3e,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ge_u16 vcc, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_ge_u16_e64_dpp vcc, v1.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x3e,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
 
-v_cmp_ge_u16 vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: v_cmp_ge_u16_e64_dpp vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3e,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ge_u16 vcc, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_ge_u16_e64_dpp vcc, v1.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x3e,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
 
-v_cmp_ge_u16 vcc, v1, v255 quad_perm:[3,2,1,0]
-// GFX11: v_cmp_ge_u16_e64_dpp vcc, v1, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3e,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_ge_u16 vcc, v1.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: v_cmp_ge_u16_e64_dpp vcc, v1.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x3e,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
 
-v_cmp_ge_u16 vcc, v1, v255 quad_perm:[3,2,1,0]
-// GFX11: v_cmp_ge_u16_e64_dpp vcc, v1, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3e,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_ge_u16 vcc, v1.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: v_cmp_ge_u16_e64_dpp vcc, v1.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x3e,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
 
-v_cmp_ge_u16 vcc, v127, v255
-// GFX11: v_cmp_ge_u16_e64 vcc, v127, v255        ; encoding: [0x6a,0x00,0x3e,0xd4,0x7f,0xff,0x03,0x00]
+v_cmp_ge_u16 vcc, v1.l, v255.l
+// GFX11: v_cmp_ge_u16_e64 vcc, v1.l, v255.l      ; encoding: [0x6a,0x00,0x3e,0xd4,0x01,0xff,0x03,0x00]
 
-v_cmp_ge_u16 vcc, v127, v255
-// GFX11: v_cmp_ge_u16_e64 vcc, v127, v255        ; encoding: [0x6a,0x00,0x3e,0xd4,0x7f,0xff,0x03,0x00]
+v_cmp_ge_u16 vcc, v1.l, v255.l
+// GFX11: v_cmp_ge_u16_e64 vcc, v1.l, v255.l      ; encoding: [0x6a,0x00,0x3e,0xd4,0x01,0xff,0x03,0x00]
 
-v_cmp_ge_u16 vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: v_cmp_ge_u16_e64_dpp vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3e,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+v_cmp_ge_u16 vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_ge_u16_e64_dpp vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3e,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
 
-v_cmp_ge_u16 vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: v_cmp_ge_u16_e64_dpp vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3e,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+v_cmp_ge_u16 vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_ge_u16_e64_dpp vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3e,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
 
-v_cmp_ge_u16 vcc, v127, v255 quad_perm:[3,2,1,0]
-// GFX11: v_cmp_ge_u16_e64_dpp vcc, v127, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3e,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+v_cmp_ge_u16 vcc, v1.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: v_cmp_ge_u16_e64_dpp vcc, v1.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3e,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
 
-v_cmp_ge_u16 vcc, v127, v255 quad_perm:[3,2,1,0]
-// GFX11: v_cmp_ge_u16_e64_dpp vcc, v127, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3e,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+v_cmp_ge_u16 vcc, v1.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: v_cmp_ge_u16_e64_dpp vcc, v1.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3e,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
 
-v_cmp_ge_u16 vcc, v128, v2
-// GFX11: v_cmp_ge_u16_e64 vcc, v128, v2          ; encoding: [0x6a,0x00,0x3e,0xd4,0x80,0x05,0x02,0x00]
+v_cmp_ge_u16 vcc, v127.h, v255.h
+// GFX11: v_cmp_ge_u16_e64 vcc, v127.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x3e,0xd4,0x7f,0xff,0x03,0x00]
 
-v_cmp_ge_u16 vcc, v128, v2
-// GFX11: v_cmp_ge_u16_e64 vcc, v128, v2          ; encoding: [0x6a,0x00,0x3e,0xd4,0x80,0x05,0x02,0x00]
+v_cmp_ge_u16 vcc, v127.h, v255.h
+// GFX11: v_cmp_ge_u16_e64 vcc, v127.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x3e,0xd4,0x7f,0xff,0x03,0x00]
 
-v_cmp_ge_u16 vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: v_cmp_ge_u16_e64_dpp vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+v_cmp_ge_u16 vcc, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_ge_u16_e64_dpp vcc, v127.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x3e,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
 
-v_cmp_ge_u16 vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: v_cmp_ge_u16_e64_dpp vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+v_cmp_ge_u16 vcc, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_ge_u16_e64_dpp vcc, v127.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x3e,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
 
-v_cmp_ge_u16 vcc, v128, v2 quad_perm:[3,2,1,0]
-// GFX11: v_cmp_ge_u16_e64_dpp vcc, v128, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+v_cmp_ge_u16 vcc, v127.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: v_cmp_ge_u16_e64_dpp vcc, v127.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x3e,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
 
-v_cmp_ge_u16 vcc, v128, v2 quad_perm:[3,2,1,0]
-// GFX11: v_cmp_ge_u16_e64_dpp vcc, v128, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+v_cmp_ge_u16 vcc, v127.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: v_cmp_ge_u16_e64_dpp vcc, v127.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x3e,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
 
-v_cmp_ge_u16 vcc, vcc_hi, v255
-// GFX11: v_cmp_ge_u16_e64 vcc, vcc_hi, v255      ; encoding: [0x6a,0x00,0x3e,0xd4,0x6b,0xfe,0x03,0x00]
+v_cmp_ge_u16 vcc, v127.l, v255.l
+// GFX11: v_cmp_ge_u16_e64 vcc, v127.l, v255.l    ; encoding: [0x6a,0x00,0x3e,0xd4,0x7f,0xff,0x03,0x00]
 
-v_cmp_ge_u16 vcc, vcc_hi, v255
-// GFX11: v_cmp_ge_u16_e64 vcc, vcc_hi, v255      ; encoding: [0x6a,0x00,0x3e,0xd4,0x6b,0xfe,0x03,0x00]
+v_cmp_ge_u16 vcc, v127.l, v255.l
+// GFX11: v_cmp_ge_u16_e64 vcc, v127.l, v255.l    ; encoding: [0x6a,0x00,0x3e,0xd4,0x7f,0xff,0x03,0x00]
 
-v_cmp_ge_u16 vcc, vcc_lo, v255
-// GFX11: v_cmp_ge_u16_e64 vcc, vcc_lo, v255      ; encoding: [0x6a,0x00,0x3e,0xd4,0x6a,0xfe,0x03,0x00]
+v_cmp_ge_u16 vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_ge_u16_e64_dpp vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3e,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
 
-v_cmp_ge_u16 vcc, vcc_lo, v255
-// GFX11: v_cmp_ge_u16_e64 vcc, vcc_lo, v255      ; encoding: [0x6a,0x00,0x3e,0xd4,0x6a,0xfe,0x03,0x00]
+v_cmp_ge_u16 vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_ge_u16_e64_dpp vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3e,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+
+v_cmp_ge_u16 vcc, v127.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: v_cmp_ge_u16_e64_dpp vcc, v127.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3e,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+
+v_cmp_ge_u16 vcc, v127.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: v_cmp_ge_u16_e64_dpp vcc, v127.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3e,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+
+v_cmp_ge_u16 vcc, v128.h, v2.h
+// GFX11: v_cmp_ge_u16_e64 vcc, v128.h, v2.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x3e,0xd4,0x80,0x05,0x02,0x00]
+
+v_cmp_ge_u16 vcc, v128.h, v2.h
+// GFX11: v_cmp_ge_u16_e64 vcc, v128.h, v2.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x3e,0xd4,0x80,0x05,0x02,0x00]
+
+v_cmp_ge_u16 vcc, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_ge_u16_e64_dpp vcc, v128.h, v2.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+
+v_cmp_ge_u16 vcc, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_ge_u16_e64_dpp vcc, v128.h, v2.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+
+v_cmp_ge_u16 vcc, v128.h, v2.h quad_perm:[3,2,1,0]
+// GFX11: v_cmp_ge_u16_e64_dpp vcc, v128.h, v2.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+
+v_cmp_ge_u16 vcc, v128.h, v2.h quad_perm:[3,2,1,0]
+// GFX11: v_cmp_ge_u16_e64_dpp vcc, v128.h, v2.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+
+v_cmp_ge_u16 vcc, v128.l, v2.l
+// GFX11: v_cmp_ge_u16_e64 vcc, v128.l, v2.l      ; encoding: [0x6a,0x00,0x3e,0xd4,0x80,0x05,0x02,0x00]
+
+v_cmp_ge_u16 vcc, v128.l, v2.l
+// GFX11: v_cmp_ge_u16_e64 vcc, v128.l, v2.l      ; encoding: [0x6a,0x00,0x3e,0xd4,0x80,0x05,0x02,0x00]
+
+v_cmp_ge_u16 vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_ge_u16_e64_dpp vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+
+v_cmp_ge_u16 vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_ge_u16_e64_dpp vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+
+v_cmp_ge_u16 vcc, v128.l, v2.l quad_perm:[3,2,1,0]
+// GFX11: v_cmp_ge_u16_e64_dpp vcc, v128.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+
+v_cmp_ge_u16 vcc, v128.l, v2.l quad_perm:[3,2,1,0]
+// GFX11: v_cmp_ge_u16_e64_dpp vcc, v128.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+
+v_cmp_ge_u16 vcc, vcc_hi, v255.h
+// GFX11: v_cmp_ge_u16_e64 vcc, vcc_hi, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x3e,0xd4,0x6b,0xfe,0x03,0x00]
+
+v_cmp_ge_u16 vcc, vcc_hi, v255.h
+// GFX11: v_cmp_ge_u16_e64 vcc, vcc_hi, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x3e,0xd4,0x6b,0xfe,0x03,0x00]
+
+v_cmp_ge_u16 vcc, vcc_hi, v255.l
+// GFX11: v_cmp_ge_u16_e64 vcc, vcc_hi, v255.l    ; encoding: [0x6a,0x00,0x3e,0xd4,0x6b,0xfe,0x03,0x00]
+
+v_cmp_ge_u16 vcc, vcc_hi, v255.l
+// GFX11: v_cmp_ge_u16_e64 vcc, vcc_hi, v255.l    ; encoding: [0x6a,0x00,0x3e,0xd4,0x6b,0xfe,0x03,0x00]
+
+v_cmp_ge_u16 vcc, vcc_lo, v255.h
+// GFX11: v_cmp_ge_u16_e64 vcc, vcc_lo, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x3e,0xd4,0x6a,0xfe,0x03,0x00]
+
+v_cmp_ge_u16 vcc, vcc_lo, v255.h
+// GFX11: v_cmp_ge_u16_e64 vcc, vcc_lo, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x3e,0xd4,0x6a,0xfe,0x03,0x00]
+
+v_cmp_ge_u16 vcc, vcc_lo, v255.l
+// GFX11: v_cmp_ge_u16_e64 vcc, vcc_lo, v255.l    ; encoding: [0x6a,0x00,0x3e,0xd4,0x6a,0xfe,0x03,0x00]
+
+v_cmp_ge_u16 vcc, vcc_lo, v255.l
+// GFX11: v_cmp_ge_u16_e64 vcc, vcc_lo, v255.l    ; encoding: [0x6a,0x00,0x3e,0xd4,0x6a,0xfe,0x03,0x00]
 
 v_cmp_gt_f16 vcc, v1, v255
 // GFX11: v_cmp_gt_f16_e64 vcc, v1, v255          ; encoding: [0x6a,0x00,0x04,0xd4,0x01,0xff,0x03,0x00]
@@ -586,137 +851,269 @@ v_cmp_gt_f16 vcc, vcc_lo, v255
 v_cmp_gt_f16 vcc, vcc_lo, v255
 // GFX11: v_cmp_gt_f16_e64 vcc, vcc_lo, v255      ; encoding: [0x6a,0x00,0x04,0xd4,0x6a,0xfe,0x03,0x00]
 
-v_cmp_gt_i16 vcc, v1, v255
-// GFX11: v_cmp_gt_i16_e64 vcc, v1, v255          ; encoding: [0x6a,0x00,0x34,0xd4,0x01,0xff,0x03,0x00]
+v_cmp_gt_i16 vcc, v1.h, v255.h
+// GFX11: v_cmp_gt_i16_e64 vcc, v1.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x34,0xd4,0x01,0xff,0x03,0x00]
+
+v_cmp_gt_i16 vcc, v1.h, v255.h
+// GFX11: v_cmp_gt_i16_e64 vcc, v1.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x34,0xd4,0x01,0xff,0x03,0x00]
+
+v_cmp_gt_i16 vcc, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_gt_i16_e64_dpp vcc, v1.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x34,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
+
+v_cmp_gt_i16 vcc, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_gt_i16_e64_dpp vcc, v1.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x34,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
+
+v_cmp_gt_i16 vcc, v1.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: v_cmp_gt_i16_e64_dpp vcc, v1.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x34,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+
+v_cmp_gt_i16 vcc, v1.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: v_cmp_gt_i16_e64_dpp vcc, v1.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x34,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+
+v_cmp_gt_i16 vcc, v1.l, v255.l
+// GFX11: v_cmp_gt_i16_e64 vcc, v1.l, v255.l      ; encoding: [0x6a,0x00,0x34,0xd4,0x01,0xff,0x03,0x00]
+
+v_cmp_gt_i16 vcc, v1.l, v255.l
+// GFX11: v_cmp_gt_i16_e64 vcc, v1.l, v255.l      ; encoding: [0x6a,0x00,0x34,0xd4,0x01,0xff,0x03,0x00]
+
+v_cmp_gt_i16 vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_gt_i16_e64_dpp vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x34,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
+
+v_cmp_gt_i16 vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_gt_i16_e64_dpp vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x34,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
+
+v_cmp_gt_i16 vcc, v1.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: v_cmp_gt_i16_e64_dpp vcc, v1.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x34,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+
+v_cmp_gt_i16 vcc, v1.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: v_cmp_gt_i16_e64_dpp vcc, v1.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x34,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+
+v_cmp_gt_i16 vcc, v127.h, v255.h
+// GFX11: v_cmp_gt_i16_e64 vcc, v127.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x34,0xd4,0x7f,0xff,0x03,0x00]
+
+v_cmp_gt_i16 vcc, v127.h, v255.h
+// GFX11: v_cmp_gt_i16_e64 vcc, v127.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x34,0xd4,0x7f,0xff,0x03,0x00]
+
+v_cmp_gt_i16 vcc, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_gt_i16_e64_dpp vcc, v127.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x34,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+
+v_cmp_gt_i16 vcc, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_gt_i16_e64_dpp vcc, v127.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x34,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+
+v_cmp_gt_i16 vcc, v127.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: v_cmp_gt_i16_e64_dpp vcc, v127.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x34,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+
+v_cmp_gt_i16 vcc, v127.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: v_cmp_gt_i16_e64_dpp vcc, v127.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x34,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+
+v_cmp_gt_i16 vcc, v127.l, v255.l
+// GFX11: v_cmp_gt_i16_e64 vcc, v127.l, v255.l    ; encoding: [0x6a,0x00,0x34,0xd4,0x7f,0xff,0x03,0x00]
+
+v_cmp_gt_i16 vcc, v127.l, v255.l
+// GFX11: v_cmp_gt_i16_e64 vcc, v127.l, v255.l    ; encoding: [0x6a,0x00,0x34,0xd4,0x7f,0xff,0x03,0x00]
+
+v_cmp_gt_i16 vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_gt_i16_e64_dpp vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x34,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+
+v_cmp_gt_i16 vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_gt_i16_e64_dpp vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x34,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+
+v_cmp_gt_i16 vcc, v127.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: v_cmp_gt_i16_e64_dpp vcc, v127.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x34,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+
+v_cmp_gt_i16 vcc, v127.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: v_cmp_gt_i16_e64_dpp vcc, v127.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x34,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+
+v_cmp_gt_i16 vcc, v128.h, v2.h
+// GFX11: v_cmp_gt_i16_e64 vcc, v128.h, v2.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x34,0xd4,0x80,0x05,0x02,0x00]
+
+v_cmp_gt_i16 vcc, v128.h, v2.h
+// GFX11: v_cmp_gt_i16_e64 vcc, v128.h, v2.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x34,0xd4,0x80,0x05,0x02,0x00]
+
+v_cmp_gt_i16 vcc, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_gt_i16_e64_dpp vcc, v128.h, v2.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x34,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+
+v_cmp_gt_i16 vcc, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_gt_i16_e64_dpp vcc, v128.h, v2.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x34,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+
+v_cmp_gt_i16 vcc, v128.h, v2.h quad_perm:[3,2,1,0]
+// GFX11: v_cmp_gt_i16_e64_dpp vcc, v128.h, v2.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x34,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+
+v_cmp_gt_i16 vcc, v128.h, v2.h quad_perm:[3,2,1,0]
+// GFX11: v_cmp_gt_i16_e64_dpp vcc, v128.h, v2.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x34,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+
+v_cmp_gt_i16 vcc, v128.l, v2.l
+// GFX11: v_cmp_gt_i16_e64 vcc, v128.l, v2.l      ; encoding: [0x6a,0x00,0x34,0xd4,0x80,0x05,0x02,0x00]
+
+v_cmp_gt_i16 vcc, v128.l, v2.l
+// GFX11: v_cmp_gt_i16_e64 vcc, v128.l, v2.l      ; encoding: [0x6a,0x00,0x34,0xd4,0x80,0x05,0x02,0x00]
+
+v_cmp_gt_i16 vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_gt_i16_e64_dpp vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+
+v_cmp_gt_i16 vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_gt_i16_e64_dpp vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+
+v_cmp_gt_i16 vcc, v128.l, v2.l quad_perm:[3,2,1,0]
+// GFX11: v_cmp_gt_i16_e64_dpp vcc, v128.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+
+v_cmp_gt_i16 vcc, v128.l, v2.l quad_perm:[3,2,1,0]
+// GFX11: v_cmp_gt_i16_e64_dpp vcc, v128.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+
+v_cmp_gt_i16 vcc, vcc_hi, v255.h
+// GFX11: v_cmp_gt_i16_e64 vcc, vcc_hi, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x34,0xd4,0x6b,0xfe,0x03,0x00]
+
+v_cmp_gt_i16 vcc, vcc_hi, v255.h
+// GFX11: v_cmp_gt_i16_e64 vcc, vcc_hi, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x34,0xd4,0x6b,0xfe,0x03,0x00]
+
+v_cmp_gt_i16 vcc, vcc_hi, v255.l
+// GFX11: v_cmp_gt_i16_e64 vcc, vcc_hi, v255.l    ; encoding: [0x6a,0x00,0x34,0xd4,0x6b,0xfe,0x03,0x00]
+
+v_cmp_gt_i16 vcc, vcc_hi, v255.l
+// GFX11: v_cmp_gt_i16_e64 vcc, vcc_hi, v255.l    ; encoding: [0x6a,0x00,0x34,0xd4,0x6b,0xfe,0x03,0x00]
+
+v_cmp_gt_i16 vcc, vcc_lo, v255.h
+// GFX11: v_cmp_gt_i16_e64 vcc, vcc_lo, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x34,0xd4,0x6a,0xfe,0x03,0x00]
+
+v_cmp_gt_i16 vcc, vcc_lo, v255.h
+// GFX11: v_cmp_gt_i16_e64 vcc, vcc_lo, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x34,0xd4,0x6a,0xfe,0x03,0x00]
+
+v_cmp_gt_i16 vcc, vcc_lo, v255.l
+// GFX11: v_cmp_gt_i16_e64 vcc, vcc_lo, v255.l    ; encoding: [0x6a,0x00,0x34,0xd4,0x6a,0xfe,0x03,0x00]
+
+v_cmp_gt_i16 vcc, vcc_lo, v255.l
+// GFX11: v_cmp_gt_i16_e64 vcc, vcc_lo, v255.l    ; encoding: [0x6a,0x00,0x34,0xd4,0x6a,0xfe,0x03,0x00]
+
+v_cmp_gt_u16 vcc, v1.h, v255.h
+// GFX11: v_cmp_gt_u16_e64 vcc, v1.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x3c,0xd4,0x01,0xff,0x03,0x00]
 
-v_cmp_gt_i16 vcc, v1, v255
-// GFX11: v_cmp_gt_i16_e64 vcc, v1, v255          ; encoding: [0x6a,0x00,0x34,0xd4,0x01,0xff,0x03,0x00]
+v_cmp_gt_u16 vcc, v1.h, v255.h
+// GFX11: v_cmp_gt_u16_e64 vcc, v1.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x3c,0xd4,0x01,0xff,0x03,0x00]
 
-v_cmp_gt_i16 vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: v_cmp_gt_i16_e64_dpp vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x34,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
+v_cmp_gt_u16 vcc, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_gt_u16_e64_dpp vcc, v1.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x3c,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
 
-v_cmp_gt_i16 vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: v_cmp_gt_i16_e64_dpp vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x34,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
+v_cmp_gt_u16 vcc, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_gt_u16_e64_dpp vcc, v1.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x3c,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
 
-v_cmp_gt_i16 vcc, v1, v255 quad_perm:[3,2,1,0]
-// GFX11: v_cmp_gt_i16_e64_dpp vcc, v1, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x34,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_gt_u16 vcc, v1.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: v_cmp_gt_u16_e64_dpp vcc, v1.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x3c,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
 
-v_cmp_gt_i16 vcc, v1, v255 quad_perm:[3,2,1,0]
-// GFX11: v_cmp_gt_i16_e64_dpp vcc, v1, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x34,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_gt_u16 vcc, v1.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: v_cmp_gt_u16_e64_dpp vcc, v1.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x3c,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
 
-v_cmp_gt_i16 vcc, v127, v255
-// GFX11: v_cmp_gt_i16_e64 vcc, v127, v255        ; encoding: [0x6a,0x00,0x34,0xd4,0x7f,0xff,0x03,0x00]
+v_cmp_gt_u16 vcc, v1.l, v255.l
+// GFX11: v_cmp_gt_u16_e64 vcc, v1.l, v255.l      ; encoding: [0x6a,0x00,0x3c,0xd4,0x01,0xff,0x03,0x00]
 
-v_cmp_gt_i16 vcc, v127, v255
-// GFX11: v_cmp_gt_i16_e64 vcc, v127, v255        ; encoding: [0x6a,0x00,0x34,0xd4,0x7f,0xff,0x03,0x00]
+v_cmp_gt_u16 vcc, v1.l, v255.l
+// GFX11: v_cmp_gt_u16_e64 vcc, v1.l, v255.l      ; encoding: [0x6a,0x00,0x3c,0xd4,0x01,0xff,0x03,0x00]
 
-v_cmp_gt_i16 vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: v_cmp_gt_i16_e64_dpp vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x34,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+v_cmp_gt_u16 vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_gt_u16_e64_dpp vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3c,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
 
-v_cmp_gt_i16 vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: v_cmp_gt_i16_e64_dpp vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x34,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+v_cmp_gt_u16 vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_gt_u16_e64_dpp vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3c,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
 
-v_cmp_gt_i16 vcc, v127, v255 quad_perm:[3,2,1,0]
-// GFX11: v_cmp_gt_i16_e64_dpp vcc, v127, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x34,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+v_cmp_gt_u16 vcc, v1.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: v_cmp_gt_u16_e64_dpp vcc, v1.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3c,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
 
-v_cmp_gt_i16 vcc, v127, v255 quad_perm:[3,2,1,0]
-// GFX11: v_cmp_gt_i16_e64_dpp vcc, v127, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x34,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+v_cmp_gt_u16 vcc, v1.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: v_cmp_gt_u16_e64_dpp vcc, v1.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3c,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
 
-v_cmp_gt_i16 vcc, v128, v2
-// GFX11: v_cmp_gt_i16_e64 vcc, v128, v2          ; encoding: [0x6a,0x00,0x34,0xd4,0x80,0x05,0x02,0x00]
+v_cmp_gt_u16 vcc, v127.h, v255.h
+// GFX11: v_cmp_gt_u16_e64 vcc, v127.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x3c,0xd4,0x7f,0xff,0x03,0x00]
 
-v_cmp_gt_i16 vcc, v128, v2
-// GFX11: v_cmp_gt_i16_e64 vcc, v128, v2          ; encoding: [0x6a,0x00,0x34,0xd4,0x80,0x05,0x02,0x00]
+v_cmp_gt_u16 vcc, v127.h, v255.h
+// GFX11: v_cmp_gt_u16_e64 vcc, v127.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x3c,0xd4,0x7f,0xff,0x03,0x00]
 
-v_cmp_gt_i16 vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: v_cmp_gt_i16_e64_dpp vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+v_cmp_gt_u16 vcc, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_gt_u16_e64_dpp vcc, v127.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x3c,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
 
-v_cmp_gt_i16 vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: v_cmp_gt_i16_e64_dpp vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+v_cmp_gt_u16 vcc, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_gt_u16_e64_dpp vcc, v127.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x3c,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
 
-v_cmp_gt_i16 vcc, v128, v2 quad_perm:[3,2,1,0]
-// GFX11: v_cmp_gt_i16_e64_dpp vcc, v128, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+v_cmp_gt_u16 vcc, v127.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: v_cmp_gt_u16_e64_dpp vcc, v127.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x3c,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
 
-v_cmp_gt_i16 vcc, v128, v2 quad_perm:[3,2,1,0]
-// GFX11: v_cmp_gt_i16_e64_dpp vcc, v128, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+v_cmp_gt_u16 vcc, v127.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: v_cmp_gt_u16_e64_dpp vcc, v127.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x3c,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
 
-v_cmp_gt_i16 vcc, vcc_hi, v255
-// GFX11: v_cmp_gt_i16_e64 vcc, vcc_hi, v255      ; encoding: [0x6a,0x00,0x34,0xd4,0x6b,0xfe,0x03,0x00]
+v_cmp_gt_u16 vcc, v127.l, v255.l
+// GFX11: v_cmp_gt_u16_e64 vcc, v127.l, v255.l    ; encoding: [0x6a,0x00,0x3c,0xd4,0x7f,0xff,0x03,0x00]
 
-v_cmp_gt_i16 vcc, vcc_hi, v255
-// GFX11: v_cmp_gt_i16_e64 vcc, vcc_hi, v255      ; encoding: [0x6a,0x00,0x34,0xd4,0x6b,0xfe,0x03,0x00]
+v_cmp_gt_u16 vcc, v127.l, v255.l
+// GFX11: v_cmp_gt_u16_e64 vcc, v127.l, v255.l    ; encoding: [0x6a,0x00,0x3c,0xd4,0x7f,0xff,0x03,0x00]
 
-v_cmp_gt_i16 vcc, vcc_lo, v255
-// GFX11: v_cmp_gt_i16_e64 vcc, vcc_lo, v255      ; encoding: [0x6a,0x00,0x34,0xd4,0x6a,0xfe,0x03,0x00]
+v_cmp_gt_u16 vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_gt_u16_e64_dpp vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3c,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
 
-v_cmp_gt_i16 vcc, vcc_lo, v255
-// GFX11: v_cmp_gt_i16_e64 vcc, vcc_lo, v255      ; encoding: [0x6a,0x00,0x34,0xd4,0x6a,0xfe,0x03,0x00]
+v_cmp_gt_u16 vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_gt_u16_e64_dpp vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3c,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
 
-v_cmp_gt_u16 vcc, v1, v255
-// GFX11: v_cmp_gt_u16_e64 vcc, v1, v255          ; encoding: [0x6a,0x00,0x3c,0xd4,0x01,0xff,0x03,0x00]
+v_cmp_gt_u16 vcc, v127.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: v_cmp_gt_u16_e64_dpp vcc, v127.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3c,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
 
-v_cmp_gt_u16 vcc, v1, v255
-// GFX11: v_cmp_gt_u16_e64 vcc, v1, v255          ; encoding: [0x6a,0x00,0x3c,0xd4,0x01,0xff,0x03,0x00]
+v_cmp_gt_u16 vcc, v127.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: v_cmp_gt_u16_e64_dpp vcc, v127.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3c,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
 
-v_cmp_gt_u16 vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: v_cmp_gt_u16_e64_dpp vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3c,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
+v_cmp_gt_u16 vcc, v128.h, v2.h
+// GFX11: v_cmp_gt_u16_e64 vcc, v128.h, v2.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x3c,0xd4,0x80,0x05,0x02,0x00]
 
-v_cmp_gt_u16 vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: v_cmp_gt_u16_e64_dpp vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3c,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
+v_cmp_gt_u16 vcc, v128.h, v2.h
+// GFX11: v_cmp_gt_u16_e64 vcc, v128.h, v2.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x3c,0xd4,0x80,0x05,0x02,0x00]
 
-v_cmp_gt_u16 vcc, v1, v255 quad_perm:[3,2,1,0]
-// GFX11: v_cmp_gt_u16_e64_dpp vcc, v1, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3c,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_gt_u16 vcc, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_gt_u16_e64_dpp vcc, v128.h, v2.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
 
-v_cmp_gt_u16 vcc, v1, v255 quad_perm:[3,2,1,0]
-// GFX11: v_cmp_gt_u16_e64_dpp vcc, v1, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3c,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_gt_u16 vcc, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_gt_u16_e64_dpp vcc, v128.h, v2.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
 
-v_cmp_gt_u16 vcc, v127, v255
-// GFX11: v_cmp_gt_u16_e64 vcc, v127, v255        ; encoding: [0x6a,0x00,0x3c,0xd4,0x7f,0xff,0x03,0x00]
+v_cmp_gt_u16 vcc, v128.h, v2.h quad_perm:[3,2,1,0]
+// GFX11: v_cmp_gt_u16_e64_dpp vcc, v128.h, v2.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
 
-v_cmp_gt_u16 vcc, v127, v255
-// GFX11: v_cmp_gt_u16_e64 vcc, v127, v255        ; encoding: [0x6a,0x00,0x3c,0xd4,0x7f,0xff,0x03,0x00]
+v_cmp_gt_u16 vcc, v128.h, v2.h quad_perm:[3,2,1,0]
+// GFX11: v_cmp_gt_u16_e64_dpp vcc, v128.h, v2.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
 
-v_cmp_gt_u16 vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: v_cmp_gt_u16_e64_dpp vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3c,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+v_cmp_gt_u16 vcc, v128.l, v2.l
+// GFX11: v_cmp_gt_u16_e64 vcc, v128.l, v2.l      ; encoding: [0x6a,0x00,0x3c,0xd4,0x80,0x05,0x02,0x00]
 
-v_cmp_gt_u16 vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: v_cmp_gt_u16_e64_dpp vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3c,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+v_cmp_gt_u16 vcc, v128.l, v2.l
+// GFX11: v_cmp_gt_u16_e64 vcc, v128.l, v2.l      ; encoding: [0x6a,0x00,0x3c,0xd4,0x80,0x05,0x02,0x00]
 
-v_cmp_gt_u16 vcc, v127, v255 quad_perm:[3,2,1,0]
-// GFX11: v_cmp_gt_u16_e64_dpp vcc, v127, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3c,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+v_cmp_gt_u16 vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_gt_u16_e64_dpp vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
 
-v_cmp_gt_u16 vcc, v127, v255 quad_perm:[3,2,1,0]
-// GFX11: v_cmp_gt_u16_e64_dpp vcc, v127, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3c,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+v_cmp_gt_u16 vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_gt_u16_e64_dpp vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
 
-v_cmp_gt_u16 vcc, v128, v2
-// GFX11: v_cmp_gt_u16_e64 vcc, v128, v2          ; encoding: [0x6a,0x00,0x3c,0xd4,0x80,0x05,0x02,0x00]
+v_cmp_gt_u16 vcc, v128.l, v2.l quad_perm:[3,2,1,0]
+// GFX11: v_cmp_gt_u16_e64_dpp vcc, v128.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
 
-v_cmp_gt_u16 vcc, v128, v2
-// GFX11: v_cmp_gt_u16_e64 vcc, v128, v2          ; encoding: [0x6a,0x00,0x3c,0xd4,0x80,0x05,0x02,0x00]
+v_cmp_gt_u16 vcc, v128.l, v2.l quad_perm:[3,2,1,0]
+// GFX11: v_cmp_gt_u16_e64_dpp vcc, v128.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
 
-v_cmp_gt_u16 vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: v_cmp_gt_u16_e64_dpp vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+v_cmp_gt_u16 vcc, vcc_hi, v255.h
+// GFX11: v_cmp_gt_u16_e64 vcc, vcc_hi, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x3c,0xd4,0x6b,0xfe,0x03,0x00]
 
-v_cmp_gt_u16 vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: v_cmp_gt_u16_e64_dpp vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+v_cmp_gt_u16 vcc, vcc_hi, v255.h
+// GFX11: v_cmp_gt_u16_e64 vcc, vcc_hi, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x3c,0xd4,0x6b,0xfe,0x03,0x00]
 
-v_cmp_gt_u16 vcc, v128, v2 quad_perm:[3,2,1,0]
-// GFX11: v_cmp_gt_u16_e64_dpp vcc, v128, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+v_cmp_gt_u16 vcc, vcc_hi, v255.l
+// GFX11: v_cmp_gt_u16_e64 vcc, vcc_hi, v255.l    ; encoding: [0x6a,0x00,0x3c,0xd4,0x6b,0xfe,0x03,0x00]
 
-v_cmp_gt_u16 vcc, v128, v2 quad_perm:[3,2,1,0]
-// GFX11: v_cmp_gt_u16_e64_dpp vcc, v128, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+v_cmp_gt_u16 vcc, vcc_hi, v255.l
+// GFX11: v_cmp_gt_u16_e64 vcc, vcc_hi, v255.l    ; encoding: [0x6a,0x00,0x3c,0xd4,0x6b,0xfe,0x03,0x00]
 
-v_cmp_gt_u16 vcc, vcc_hi, v255
-// GFX11: v_cmp_gt_u16_e64 vcc, vcc_hi, v255      ; encoding: [0x6a,0x00,0x3c,0xd4,0x6b,0xfe,0x03,0x00]
+v_cmp_gt_u16 vcc, vcc_lo, v255.h
+// GFX11: v_cmp_gt_u16_e64 vcc, vcc_lo, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x3c,0xd4,0x6a,0xfe,0x03,0x00]
 
-v_cmp_gt_u16 vcc, vcc_hi, v255
-// GFX11: v_cmp_gt_u16_e64 vcc, vcc_hi, v255      ; encoding: [0x6a,0x00,0x3c,0xd4,0x6b,0xfe,0x03,0x00]
+v_cmp_gt_u16 vcc, vcc_lo, v255.h
+// GFX11: v_cmp_gt_u16_e64 vcc, vcc_lo, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x3c,0xd4,0x6a,0xfe,0x03,0x00]
 
-v_cmp_gt_u16 vcc, vcc_lo, v255
-// GFX11: v_cmp_gt_u16_e64 vcc, vcc_lo, v255      ; encoding: [0x6a,0x00,0x3c,0xd4,0x6a,0xfe,0x03,0x00]
+v_cmp_gt_u16 vcc, vcc_lo, v255.l
+// GFX11: v_cmp_gt_u16_e64 vcc, vcc_lo, v255.l    ; encoding: [0x6a,0x00,0x3c,0xd4,0x6a,0xfe,0x03,0x00]
 
-v_cmp_gt_u16 vcc, vcc_lo, v255
-// GFX11: v_cmp_gt_u16_e64 vcc, vcc_lo, v255      ; encoding: [0x6a,0x00,0x3c,0xd4,0x6a,0xfe,0x03,0x00]
+v_cmp_gt_u16 vcc, vcc_lo, v255.l
+// GFX11: v_cmp_gt_u16_e64 vcc, vcc_lo, v255.l    ; encoding: [0x6a,0x00,0x3c,0xd4,0x6a,0xfe,0x03,0x00]
 
 v_cmp_le_f16 vcc, v1, v255
 // GFX11: v_cmp_le_f16_e64 vcc, v1, v255          ; encoding: [0x6a,0x00,0x03,0xd4,0x01,0xff,0x03,0x00]
@@ -784,137 +1181,269 @@ v_cmp_le_f16 vcc, vcc_lo, v255
 v_cmp_le_f16 vcc, vcc_lo, v255
 // GFX11: v_cmp_le_f16_e64 vcc, vcc_lo, v255      ; encoding: [0x6a,0x00,0x03,0xd4,0x6a,0xfe,0x03,0x00]
 
-v_cmp_le_i16 vcc, v1, v255
-// GFX11: v_cmp_le_i16_e64 vcc, v1, v255          ; encoding: [0x6a,0x00,0x33,0xd4,0x01,0xff,0x03,0x00]
+v_cmp_le_i16 vcc, v1.h, v255.h
+// GFX11: v_cmp_le_i16_e64 vcc, v1.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x33,0xd4,0x01,0xff,0x03,0x00]
 
-v_cmp_le_i16 vcc, v1, v255
-// GFX11: v_cmp_le_i16_e64 vcc, v1, v255          ; encoding: [0x6a,0x00,0x33,0xd4,0x01,0xff,0x03,0x00]
+v_cmp_le_i16 vcc, v1.h, v255.h
+// GFX11: v_cmp_le_i16_e64 vcc, v1.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x33,0xd4,0x01,0xff,0x03,0x00]
 
-v_cmp_le_i16 vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: v_cmp_le_i16_e64_dpp vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x33,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
+v_cmp_le_i16 vcc, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_le_i16_e64_dpp vcc, v1.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x33,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
 
-v_cmp_le_i16 vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: v_cmp_le_i16_e64_dpp vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x33,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
+v_cmp_le_i16 vcc, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_le_i16_e64_dpp vcc, v1.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x33,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
 
-v_cmp_le_i16 vcc, v1, v255 quad_perm:[3,2,1,0]
-// GFX11: v_cmp_le_i16_e64_dpp vcc, v1, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x33,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_le_i16 vcc, v1.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: v_cmp_le_i16_e64_dpp vcc, v1.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x33,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
 
-v_cmp_le_i16 vcc, v1, v255 quad_perm:[3,2,1,0]
-// GFX11: v_cmp_le_i16_e64_dpp vcc, v1, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x33,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_le_i16 vcc, v1.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: v_cmp_le_i16_e64_dpp vcc, v1.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x33,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
 
-v_cmp_le_i16 vcc, v127, v255
-// GFX11: v_cmp_le_i16_e64 vcc, v127, v255        ; encoding: [0x6a,0x00,0x33,0xd4,0x7f,0xff,0x03,0x00]
+v_cmp_le_i16 vcc, v1.l, v255.l
+// GFX11: v_cmp_le_i16_e64 vcc, v1.l, v255.l      ; encoding: [0x6a,0x00,0x33,0xd4,0x01,0xff,0x03,0x00]
 
-v_cmp_le_i16 vcc, v127, v255
-// GFX11: v_cmp_le_i16_e64 vcc, v127, v255        ; encoding: [0x6a,0x00,0x33,0xd4,0x7f,0xff,0x03,0x00]
+v_cmp_le_i16 vcc, v1.l, v255.l
+// GFX11: v_cmp_le_i16_e64 vcc, v1.l, v255.l      ; encoding: [0x6a,0x00,0x33,0xd4,0x01,0xff,0x03,0x00]
 
-v_cmp_le_i16 vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: v_cmp_le_i16_e64_dpp vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x33,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+v_cmp_le_i16 vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_le_i16_e64_dpp vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x33,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
 
-v_cmp_le_i16 vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: v_cmp_le_i16_e64_dpp vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x33,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+v_cmp_le_i16 vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_le_i16_e64_dpp vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x33,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
 
-v_cmp_le_i16 vcc, v127, v255 quad_perm:[3,2,1,0]
-// GFX11: v_cmp_le_i16_e64_dpp vcc, v127, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x33,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+v_cmp_le_i16 vcc, v1.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: v_cmp_le_i16_e64_dpp vcc, v1.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x33,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
 
-v_cmp_le_i16 vcc, v127, v255 quad_perm:[3,2,1,0]
-// GFX11: v_cmp_le_i16_e64_dpp vcc, v127, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x33,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+v_cmp_le_i16 vcc, v1.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: v_cmp_le_i16_e64_dpp vcc, v1.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x33,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
 
-v_cmp_le_i16 vcc, v128, v2
-// GFX11: v_cmp_le_i16_e64 vcc, v128, v2          ; encoding: [0x6a,0x00,0x33,0xd4,0x80,0x05,0x02,0x00]
+v_cmp_le_i16 vcc, v127.h, v255.h
+// GFX11: v_cmp_le_i16_e64 vcc, v127.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x33,0xd4,0x7f,0xff,0x03,0x00]
 
-v_cmp_le_i16 vcc, v128, v2
-// GFX11: v_cmp_le_i16_e64 vcc, v128, v2          ; encoding: [0x6a,0x00,0x33,0xd4,0x80,0x05,0x02,0x00]
+v_cmp_le_i16 vcc, v127.h, v255.h
+// GFX11: v_cmp_le_i16_e64 vcc, v127.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x33,0xd4,0x7f,0xff,0x03,0x00]
 
-v_cmp_le_i16 vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: v_cmp_le_i16_e64_dpp vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+v_cmp_le_i16 vcc, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_le_i16_e64_dpp vcc, v127.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x33,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
 
-v_cmp_le_i16 vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: v_cmp_le_i16_e64_dpp vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+v_cmp_le_i16 vcc, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_le_i16_e64_dpp vcc, v127.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x33,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
 
-v_cmp_le_i16 vcc, v128, v2 quad_perm:[3,2,1,0]
-// GFX11: v_cmp_le_i16_e64_dpp vcc, v128, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+v_cmp_le_i16 vcc, v127.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: v_cmp_le_i16_e64_dpp vcc, v127.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x33,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
 
-v_cmp_le_i16 vcc, v128, v2 quad_perm:[3,2,1,0]
-// GFX11: v_cmp_le_i16_e64_dpp vcc, v128, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+v_cmp_le_i16 vcc, v127.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: v_cmp_le_i16_e64_dpp vcc, v127.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x33,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
 
-v_cmp_le_i16 vcc, vcc_hi, v255
-// GFX11: v_cmp_le_i16_e64 vcc, vcc_hi, v255      ; encoding: [0x6a,0x00,0x33,0xd4,0x6b,0xfe,0x03,0x00]
+v_cmp_le_i16 vcc, v127.l, v255.l
+// GFX11: v_cmp_le_i16_e64 vcc, v127.l, v255.l    ; encoding: [0x6a,0x00,0x33,0xd4,0x7f,0xff,0x03,0x00]
 
-v_cmp_le_i16 vcc, vcc_hi, v255
-// GFX11: v_cmp_le_i16_e64 vcc, vcc_hi, v255      ; encoding: [0x6a,0x00,0x33,0xd4,0x6b,0xfe,0x03,0x00]
+v_cmp_le_i16 vcc, v127.l, v255.l
+// GFX11: v_cmp_le_i16_e64 vcc, v127.l, v255.l    ; encoding: [0x6a,0x00,0x33,0xd4,0x7f,0xff,0x03,0x00]
 
-v_cmp_le_i16 vcc, vcc_lo, v255
-// GFX11: v_cmp_le_i16_e64 vcc, vcc_lo, v255      ; encoding: [0x6a,0x00,0x33,0xd4,0x6a,0xfe,0x03,0x00]
+v_cmp_le_i16 vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_le_i16_e64_dpp vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x33,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
 
-v_cmp_le_i16 vcc, vcc_lo, v255
-// GFX11: v_cmp_le_i16_e64 vcc, vcc_lo, v255      ; encoding: [0x6a,0x00,0x33,0xd4,0x6a,0xfe,0x03,0x00]
+v_cmp_le_i16 vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_le_i16_e64_dpp vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x33,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
 
-v_cmp_le_u16 vcc, v1, v255
-// GFX11: v_cmp_le_u16_e64 vcc, v1, v255          ; encoding: [0x6a,0x00,0x3b,0xd4,0x01,0xff,0x03,0x00]
+v_cmp_le_i16 vcc, v127.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: v_cmp_le_i16_e64_dpp vcc, v127.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x33,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
 
-v_cmp_le_u16 vcc, v1, v255
-// GFX11: v_cmp_le_u16_e64 vcc, v1, v255          ; encoding: [0x6a,0x00,0x3b,0xd4,0x01,0xff,0x03,0x00]
+v_cmp_le_i16 vcc, v127.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: v_cmp_le_i16_e64_dpp vcc, v127.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x33,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
 
-v_cmp_le_u16 vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: v_cmp_le_u16_e64_dpp vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3b,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
+v_cmp_le_i16 vcc, v128.h, v2.h
+// GFX11: v_cmp_le_i16_e64 vcc, v128.h, v2.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x33,0xd4,0x80,0x05,0x02,0x00]
 
-v_cmp_le_u16 vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: v_cmp_le_u16_e64_dpp vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3b,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
+v_cmp_le_i16 vcc, v128.h, v2.h
+// GFX11: v_cmp_le_i16_e64 vcc, v128.h, v2.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x33,0xd4,0x80,0x05,0x02,0x00]
 
-v_cmp_le_u16 vcc, v1, v255 quad_perm:[3,2,1,0]
-// GFX11: v_cmp_le_u16_e64_dpp vcc, v1, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3b,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_le_i16 vcc, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_le_i16_e64_dpp vcc, v128.h, v2.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x33,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
 
-v_cmp_le_u16 vcc, v1, v255 quad_perm:[3,2,1,0]
-// GFX11: v_cmp_le_u16_e64_dpp vcc, v1, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3b,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_le_i16 vcc, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_le_i16_e64_dpp vcc, v128.h, v2.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x33,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
 
-v_cmp_le_u16 vcc, v127, v255
-// GFX11: v_cmp_le_u16_e64 vcc, v127, v255        ; encoding: [0x6a,0x00,0x3b,0xd4,0x7f,0xff,0x03,0x00]
+v_cmp_le_i16 vcc, v128.h, v2.h quad_perm:[3,2,1,0]
+// GFX11: v_cmp_le_i16_e64_dpp vcc, v128.h, v2.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x33,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
 
-v_cmp_le_u16 vcc, v127, v255
-// GFX11: v_cmp_le_u16_e64 vcc, v127, v255        ; encoding: [0x6a,0x00,0x3b,0xd4,0x7f,0xff,0x03,0x00]
+v_cmp_le_i16 vcc, v128.h, v2.h quad_perm:[3,2,1,0]
+// GFX11: v_cmp_le_i16_e64_dpp vcc, v128.h, v2.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x33,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
 
-v_cmp_le_u16 vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: v_cmp_le_u16_e64_dpp vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3b,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+v_cmp_le_i16 vcc, v128.l, v2.l
+// GFX11: v_cmp_le_i16_e64 vcc, v128.l, v2.l      ; encoding: [0x6a,0x00,0x33,0xd4,0x80,0x05,0x02,0x00]
 
-v_cmp_le_u16 vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: v_cmp_le_u16_e64_dpp vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3b,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+v_cmp_le_i16 vcc, v128.l, v2.l
+// GFX11: v_cmp_le_i16_e64 vcc, v128.l, v2.l      ; encoding: [0x6a,0x00,0x33,0xd4,0x80,0x05,0x02,0x00]
 
-v_cmp_le_u16 vcc, v127, v255 quad_perm:[3,2,1,0]
-// GFX11: v_cmp_le_u16_e64_dpp vcc, v127, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3b,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+v_cmp_le_i16 vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_le_i16_e64_dpp vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
 
-v_cmp_le_u16 vcc, v127, v255 quad_perm:[3,2,1,0]
-// GFX11: v_cmp_le_u16_e64_dpp vcc, v127, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3b,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+v_cmp_le_i16 vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_le_i16_e64_dpp vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
 
-v_cmp_le_u16 vcc, v128, v2
-// GFX11: v_cmp_le_u16_e64 vcc, v128, v2          ; encoding: [0x6a,0x00,0x3b,0xd4,0x80,0x05,0x02,0x00]
+v_cmp_le_i16 vcc, v128.l, v2.l quad_perm:[3,2,1,0]
+// GFX11: v_cmp_le_i16_e64_dpp vcc, v128.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
 
-v_cmp_le_u16 vcc, v128, v2
-// GFX11: v_cmp_le_u16_e64 vcc, v128, v2          ; encoding: [0x6a,0x00,0x3b,0xd4,0x80,0x05,0x02,0x00]
+v_cmp_le_i16 vcc, v128.l, v2.l quad_perm:[3,2,1,0]
+// GFX11: v_cmp_le_i16_e64_dpp vcc, v128.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
 
-v_cmp_le_u16 vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: v_cmp_le_u16_e64_dpp vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+v_cmp_le_i16 vcc, vcc_hi, v255.h
+// GFX11: v_cmp_le_i16_e64 vcc, vcc_hi, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x33,0xd4,0x6b,0xfe,0x03,0x00]
 
-v_cmp_le_u16 vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: v_cmp_le_u16_e64_dpp vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+v_cmp_le_i16 vcc, vcc_hi, v255.h
+// GFX11: v_cmp_le_i16_e64 vcc, vcc_hi, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x33,0xd4,0x6b,0xfe,0x03,0x00]
 
-v_cmp_le_u16 vcc, v128, v2 quad_perm:[3,2,1,0]
-// GFX11: v_cmp_le_u16_e64_dpp vcc, v128, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+v_cmp_le_i16 vcc, vcc_hi, v255.l
+// GFX11: v_cmp_le_i16_e64 vcc, vcc_hi, v255.l    ; encoding: [0x6a,0x00,0x33,0xd4,0x6b,0xfe,0x03,0x00]
 
-v_cmp_le_u16 vcc, v128, v2 quad_perm:[3,2,1,0]
-// GFX11: v_cmp_le_u16_e64_dpp vcc, v128, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+v_cmp_le_i16 vcc, vcc_hi, v255.l
+// GFX11: v_cmp_le_i16_e64 vcc, vcc_hi, v255.l    ; encoding: [0x6a,0x00,0x33,0xd4,0x6b,0xfe,0x03,0x00]
 
-v_cmp_le_u16 vcc, vcc_hi, v255
-// GFX11: v_cmp_le_u16_e64 vcc, vcc_hi, v255      ; encoding: [0x6a,0x00,0x3b,0xd4,0x6b,0xfe,0x03,0x00]
+v_cmp_le_i16 vcc, vcc_lo, v255.h
+// GFX11: v_cmp_le_i16_e64 vcc, vcc_lo, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x33,0xd4,0x6a,0xfe,0x03,0x00]
 
-v_cmp_le_u16 vcc, vcc_hi, v255
-// GFX11: v_cmp_le_u16_e64 vcc, vcc_hi, v255      ; encoding: [0x6a,0x00,0x3b,0xd4,0x6b,0xfe,0x03,0x00]
+v_cmp_le_i16 vcc, vcc_lo, v255.h
+// GFX11: v_cmp_le_i16_e64 vcc, vcc_lo, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x33,0xd4,0x6a,0xfe,0x03,0x00]
 
-v_cmp_le_u16 vcc, vcc_lo, v255
-// GFX11: v_cmp_le_u16_e64 vcc, vcc_lo, v255      ; encoding: [0x6a,0x00,0x3b,0xd4,0x6a,0xfe,0x03,0x00]
+v_cmp_le_i16 vcc, vcc_lo, v255.l
+// GFX11: v_cmp_le_i16_e64 vcc, vcc_lo, v255.l    ; encoding: [0x6a,0x00,0x33,0xd4,0x6a,0xfe,0x03,0x00]
 
-v_cmp_le_u16 vcc, vcc_lo, v255
-// GFX11: v_cmp_le_u16_e64 vcc, vcc_lo, v255      ; encoding: [0x6a,0x00,0x3b,0xd4,0x6a,0xfe,0x03,0x00]
+v_cmp_le_i16 vcc, vcc_lo, v255.l
+// GFX11: v_cmp_le_i16_e64 vcc, vcc_lo, v255.l    ; encoding: [0x6a,0x00,0x33,0xd4,0x6a,0xfe,0x03,0x00]
+
+v_cmp_le_u16 vcc, v1.h, v255.h
+// GFX11: v_cmp_le_u16_e64 vcc, v1.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x3b,0xd4,0x01,0xff,0x03,0x00]
+
+v_cmp_le_u16 vcc, v1.h, v255.h
+// GFX11: v_cmp_le_u16_e64 vcc, v1.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x3b,0xd4,0x01,0xff,0x03,0x00]
+
+v_cmp_le_u16 vcc, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_le_u16_e64_dpp vcc, v1.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x3b,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
+
+v_cmp_le_u16 vcc, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_le_u16_e64_dpp vcc, v1.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x3b,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
+
+v_cmp_le_u16 vcc, v1.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: v_cmp_le_u16_e64_dpp vcc, v1.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x3b,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+
+v_cmp_le_u16 vcc, v1.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: v_cmp_le_u16_e64_dpp vcc, v1.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x3b,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+
+v_cmp_le_u16 vcc, v1.l, v255.l
+// GFX11: v_cmp_le_u16_e64 vcc, v1.l, v255.l      ; encoding: [0x6a,0x00,0x3b,0xd4,0x01,0xff,0x03,0x00]
+
+v_cmp_le_u16 vcc, v1.l, v255.l
+// GFX11: v_cmp_le_u16_e64 vcc, v1.l, v255.l      ; encoding: [0x6a,0x00,0x3b,0xd4,0x01,0xff,0x03,0x00]
+
+v_cmp_le_u16 vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_le_u16_e64_dpp vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3b,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
+
+v_cmp_le_u16 vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_le_u16_e64_dpp vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3b,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
+
+v_cmp_le_u16 vcc, v1.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: v_cmp_le_u16_e64_dpp vcc, v1.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3b,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+
+v_cmp_le_u16 vcc, v1.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: v_cmp_le_u16_e64_dpp vcc, v1.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3b,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+
+v_cmp_le_u16 vcc, v127.h, v255.h
+// GFX11: v_cmp_le_u16_e64 vcc, v127.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x3b,0xd4,0x7f,0xff,0x03,0x00]
+
+v_cmp_le_u16 vcc, v127.h, v255.h
+// GFX11: v_cmp_le_u16_e64 vcc, v127.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x3b,0xd4,0x7f,0xff,0x03,0x00]
+
+v_cmp_le_u16 vcc, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_le_u16_e64_dpp vcc, v127.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x3b,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+
+v_cmp_le_u16 vcc, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_le_u16_e64_dpp vcc, v127.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x3b,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+
+v_cmp_le_u16 vcc, v127.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: v_cmp_le_u16_e64_dpp vcc, v127.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x3b,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+
+v_cmp_le_u16 vcc, v127.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: v_cmp_le_u16_e64_dpp vcc, v127.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x3b,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+
+v_cmp_le_u16 vcc, v127.l, v255.l
+// GFX11: v_cmp_le_u16_e64 vcc, v127.l, v255.l    ; encoding: [0x6a,0x00,0x3b,0xd4,0x7f,0xff,0x03,0x00]
+
+v_cmp_le_u16 vcc, v127.l, v255.l
+// GFX11: v_cmp_le_u16_e64 vcc, v127.l, v255.l    ; encoding: [0x6a,0x00,0x3b,0xd4,0x7f,0xff,0x03,0x00]
+
+v_cmp_le_u16 vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_le_u16_e64_dpp vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3b,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+
+v_cmp_le_u16 vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_le_u16_e64_dpp vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3b,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+
+v_cmp_le_u16 vcc, v127.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: v_cmp_le_u16_e64_dpp vcc, v127.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3b,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+
+v_cmp_le_u16 vcc, v127.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: v_cmp_le_u16_e64_dpp vcc, v127.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3b,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+
+v_cmp_le_u16 vcc, v128.h, v2.h
+// GFX11: v_cmp_le_u16_e64 vcc, v128.h, v2.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x3b,0xd4,0x80,0x05,0x02,0x00]
+
+v_cmp_le_u16 vcc, v128.h, v2.h
+// GFX11: v_cmp_le_u16_e64 vcc, v128.h, v2.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x3b,0xd4,0x80,0x05,0x02,0x00]
+
+v_cmp_le_u16 vcc, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_le_u16_e64_dpp vcc, v128.h, v2.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+
+v_cmp_le_u16 vcc, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_le_u16_e64_dpp vcc, v128.h, v2.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+
+v_cmp_le_u16 vcc, v128.h, v2.h quad_perm:[3,2,1,0]
+// GFX11: v_cmp_le_u16_e64_dpp vcc, v128.h, v2.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+
+v_cmp_le_u16 vcc, v128.h, v2.h quad_perm:[3,2,1,0]
+// GFX11: v_cmp_le_u16_e64_dpp vcc, v128.h, v2.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+
+v_cmp_le_u16 vcc, v128.l, v2.l
+// GFX11: v_cmp_le_u16_e64 vcc, v128.l, v2.l      ; encoding: [0x6a,0x00,0x3b,0xd4,0x80,0x05,0x02,0x00]
+
+v_cmp_le_u16 vcc, v128.l, v2.l
+// GFX11: v_cmp_le_u16_e64 vcc, v128.l, v2.l      ; encoding: [0x6a,0x00,0x3b,0xd4,0x80,0x05,0x02,0x00]
+
+v_cmp_le_u16 vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_le_u16_e64_dpp vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+
+v_cmp_le_u16 vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_le_u16_e64_dpp vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+
+v_cmp_le_u16 vcc, v128.l, v2.l quad_perm:[3,2,1,0]
+// GFX11: v_cmp_le_u16_e64_dpp vcc, v128.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+
+v_cmp_le_u16 vcc, v128.l, v2.l quad_perm:[3,2,1,0]
+// GFX11: v_cmp_le_u16_e64_dpp vcc, v128.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+
+v_cmp_le_u16 vcc, vcc_hi, v255.h
+// GFX11: v_cmp_le_u16_e64 vcc, vcc_hi, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x3b,0xd4,0x6b,0xfe,0x03,0x00]
+
+v_cmp_le_u16 vcc, vcc_hi, v255.h
+// GFX11: v_cmp_le_u16_e64 vcc, vcc_hi, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x3b,0xd4,0x6b,0xfe,0x03,0x00]
+
+v_cmp_le_u16 vcc, vcc_hi, v255.l
+// GFX11: v_cmp_le_u16_e64 vcc, vcc_hi, v255.l    ; encoding: [0x6a,0x00,0x3b,0xd4,0x6b,0xfe,0x03,0x00]
+
+v_cmp_le_u16 vcc, vcc_hi, v255.l
+// GFX11: v_cmp_le_u16_e64 vcc, vcc_hi, v255.l    ; encoding: [0x6a,0x00,0x3b,0xd4,0x6b,0xfe,0x03,0x00]
+
+v_cmp_le_u16 vcc, vcc_lo, v255.h
+// GFX11: v_cmp_le_u16_e64 vcc, vcc_lo, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x3b,0xd4,0x6a,0xfe,0x03,0x00]
+
+v_cmp_le_u16 vcc, vcc_lo, v255.h
+// GFX11: v_cmp_le_u16_e64 vcc, vcc_lo, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x3b,0xd4,0x6a,0xfe,0x03,0x00]
+
+v_cmp_le_u16 vcc, vcc_lo, v255.l
+// GFX11: v_cmp_le_u16_e64 vcc, vcc_lo, v255.l    ; encoding: [0x6a,0x00,0x3b,0xd4,0x6a,0xfe,0x03,0x00]
+
+v_cmp_le_u16 vcc, vcc_lo, v255.l
+// GFX11: v_cmp_le_u16_e64 vcc, vcc_lo, v255.l    ; encoding: [0x6a,0x00,0x3b,0xd4,0x6a,0xfe,0x03,0x00]
 
 v_cmp_lg_f16 vcc, v1, v255
 // GFX11: v_cmp_lg_f16_e64 vcc, v1, v255          ; encoding: [0x6a,0x00,0x05,0xd4,0x01,0xff,0x03,0x00]
@@ -1114,269 +1643,533 @@ v_cmp_lt_f16 vcc, vcc_lo, v255.l
 v_cmp_lt_f16 vcc, vcc_lo, v255.l
 // GFX11: v_cmp_lt_f16_e64 vcc, vcc_lo, v255.l    ; encoding: [0x6a,0x00,0x01,0xd4,0x6a,0xfe,0x03,0x00]
 
-v_cmp_lt_i16 vcc, v1, v255
-// GFX11: v_cmp_lt_i16_e64 vcc, v1, v255          ; encoding: [0x6a,0x00,0x31,0xd4,0x01,0xff,0x03,0x00]
+v_cmp_lt_i16 vcc, v1.h, v255.h
+// GFX11: v_cmp_lt_i16_e64 vcc, v1.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x31,0xd4,0x01,0xff,0x03,0x00]
+
+v_cmp_lt_i16 vcc, v1.h, v255.h
+// GFX11: v_cmp_lt_i16_e64 vcc, v1.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x31,0xd4,0x01,0xff,0x03,0x00]
+
+v_cmp_lt_i16 vcc, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_lt_i16_e64_dpp vcc, v1.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x31,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
+
+v_cmp_lt_i16 vcc, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_lt_i16_e64_dpp vcc, v1.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x31,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
+
+v_cmp_lt_i16 vcc, v1.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: v_cmp_lt_i16_e64_dpp vcc, v1.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x31,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+
+v_cmp_lt_i16 vcc, v1.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: v_cmp_lt_i16_e64_dpp vcc, v1.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x31,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+
+v_cmp_lt_i16 vcc, v1.l, v255.l
+// GFX11: v_cmp_lt_i16_e64 vcc, v1.l, v255.l      ; encoding: [0x6a,0x00,0x31,0xd4,0x01,0xff,0x03,0x00]
+
+v_cmp_lt_i16 vcc, v1.l, v255.l
+// GFX11: v_cmp_lt_i16_e64 vcc, v1.l, v255.l      ; encoding: [0x6a,0x00,0x31,0xd4,0x01,0xff,0x03,0x00]
+
+v_cmp_lt_i16 vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_lt_i16_e64_dpp vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x31,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
+
+v_cmp_lt_i16 vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_lt_i16_e64_dpp vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x31,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
+
+v_cmp_lt_i16 vcc, v1.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: v_cmp_lt_i16_e64_dpp vcc, v1.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x31,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+
+v_cmp_lt_i16 vcc, v1.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: v_cmp_lt_i16_e64_dpp vcc, v1.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x31,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+
+v_cmp_lt_i16 vcc, v127.h, v255.h
+// GFX11: v_cmp_lt_i16_e64 vcc, v127.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x31,0xd4,0x7f,0xff,0x03,0x00]
+
+v_cmp_lt_i16 vcc, v127.h, v255.h
+// GFX11: v_cmp_lt_i16_e64 vcc, v127.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x31,0xd4,0x7f,0xff,0x03,0x00]
+
+v_cmp_lt_i16 vcc, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_lt_i16_e64_dpp vcc, v127.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x31,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+
+v_cmp_lt_i16 vcc, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_lt_i16_e64_dpp vcc, v127.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x31,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+
+v_cmp_lt_i16 vcc, v127.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: v_cmp_lt_i16_e64_dpp vcc, v127.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x31,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+
+v_cmp_lt_i16 vcc, v127.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: v_cmp_lt_i16_e64_dpp vcc, v127.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x31,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+
+v_cmp_lt_i16 vcc, v127.l, v255.l
+// GFX11: v_cmp_lt_i16_e64 vcc, v127.l, v255.l    ; encoding: [0x6a,0x00,0x31,0xd4,0x7f,0xff,0x03,0x00]
+
+v_cmp_lt_i16 vcc, v127.l, v255.l
+// GFX11: v_cmp_lt_i16_e64 vcc, v127.l, v255.l    ; encoding: [0x6a,0x00,0x31,0xd4,0x7f,0xff,0x03,0x00]
+
+v_cmp_lt_i16 vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_lt_i16_e64_dpp vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x31,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+
+v_cmp_lt_i16 vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_lt_i16_e64_dpp vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x31,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+
+v_cmp_lt_i16 vcc, v127.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: v_cmp_lt_i16_e64_dpp vcc, v127.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x31,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+
+v_cmp_lt_i16 vcc, v127.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: v_cmp_lt_i16_e64_dpp vcc, v127.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x31,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+
+v_cmp_lt_i16 vcc, v128.h, v2.h
+// GFX11: v_cmp_lt_i16_e64 vcc, v128.h, v2.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x31,0xd4,0x80,0x05,0x02,0x00]
+
+v_cmp_lt_i16 vcc, v128.h, v2.h
+// GFX11: v_cmp_lt_i16_e64 vcc, v128.h, v2.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x31,0xd4,0x80,0x05,0x02,0x00]
+
+v_cmp_lt_i16 vcc, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_lt_i16_e64_dpp vcc, v128.h, v2.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x31,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+
+v_cmp_lt_i16 vcc, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_lt_i16_e64_dpp vcc, v128.h, v2.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x31,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+
+v_cmp_lt_i16 vcc, v128.h, v2.h quad_perm:[3,2,1,0]
+// GFX11: v_cmp_lt_i16_e64_dpp vcc, v128.h, v2.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x31,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+
+v_cmp_lt_i16 vcc, v128.h, v2.h quad_perm:[3,2,1,0]
+// GFX11: v_cmp_lt_i16_e64_dpp vcc, v128.h, v2.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x31,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+
+v_cmp_lt_i16 vcc, v128.l, v2.l
+// GFX11: v_cmp_lt_i16_e64 vcc, v128.l, v2.l      ; encoding: [0x6a,0x00,0x31,0xd4,0x80,0x05,0x02,0x00]
+
+v_cmp_lt_i16 vcc, v128.l, v2.l
+// GFX11: v_cmp_lt_i16_e64 vcc, v128.l, v2.l      ; encoding: [0x6a,0x00,0x31,0xd4,0x80,0x05,0x02,0x00]
+
+v_cmp_lt_i16 vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_lt_i16_e64_dpp vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+
+v_cmp_lt_i16 vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_lt_i16_e64_dpp vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+
+v_cmp_lt_i16 vcc, v128.l, v2.l quad_perm:[3,2,1,0]
+// GFX11: v_cmp_lt_i16_e64_dpp vcc, v128.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+
+v_cmp_lt_i16 vcc, v128.l, v2.l quad_perm:[3,2,1,0]
+// GFX11: v_cmp_lt_i16_e64_dpp vcc, v128.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+
+v_cmp_lt_i16 vcc, vcc_hi, v255.h
+// GFX11: v_cmp_lt_i16_e64 vcc, vcc_hi, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x31,0xd4,0x6b,0xfe,0x03,0x00]
+
+v_cmp_lt_i16 vcc, vcc_hi, v255.h
+// GFX11: v_cmp_lt_i16_e64 vcc, vcc_hi, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x31,0xd4,0x6b,0xfe,0x03,0x00]
+
+v_cmp_lt_i16 vcc, vcc_hi, v255.l
+// GFX11: v_cmp_lt_i16_e64 vcc, vcc_hi, v255.l    ; encoding: [0x6a,0x00,0x31,0xd4,0x6b,0xfe,0x03,0x00]
+
+v_cmp_lt_i16 vcc, vcc_hi, v255.l
+// GFX11: v_cmp_lt_i16_e64 vcc, vcc_hi, v255.l    ; encoding: [0x6a,0x00,0x31,0xd4,0x6b,0xfe,0x03,0x00]
+
+v_cmp_lt_i16 vcc, vcc_lo, v255.h
+// GFX11: v_cmp_lt_i16_e64 vcc, vcc_lo, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x31,0xd4,0x6a,0xfe,0x03,0x00]
+
+v_cmp_lt_i16 vcc, vcc_lo, v255.h
+// GFX11: v_cmp_lt_i16_e64 vcc, vcc_lo, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x31,0xd4,0x6a,0xfe,0x03,0x00]
+
+v_cmp_lt_i16 vcc, vcc_lo, v255.l
+// GFX11: v_cmp_lt_i16_e64 vcc, vcc_lo, v255.l    ; encoding: [0x6a,0x00,0x31,0xd4,0x6a,0xfe,0x03,0x00]
+
+v_cmp_lt_i16 vcc, vcc_lo, v255.l
+// GFX11: v_cmp_lt_i16_e64 vcc, vcc_lo, v255.l    ; encoding: [0x6a,0x00,0x31,0xd4,0x6a,0xfe,0x03,0x00]
+
+v_cmp_lt_u16 vcc, v1.h, v255.h
+// GFX11: v_cmp_lt_u16_e64 vcc, v1.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x39,0xd4,0x01,0xff,0x03,0x00]
+
+v_cmp_lt_u16 vcc, v1.h, v255.h
+// GFX11: v_cmp_lt_u16_e64 vcc, v1.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x39,0xd4,0x01,0xff,0x03,0x00]
+
+v_cmp_lt_u16 vcc, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_lt_u16_e64_dpp vcc, v1.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x39,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
+
+v_cmp_lt_u16 vcc, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_lt_u16_e64_dpp vcc, v1.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x39,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
+
+v_cmp_lt_u16 vcc, v1.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: v_cmp_lt_u16_e64_dpp vcc, v1.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x39,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+
+v_cmp_lt_u16 vcc, v1.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: v_cmp_lt_u16_e64_dpp vcc, v1.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x39,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+
+v_cmp_lt_u16 vcc, v1.l, v255.l
+// GFX11: v_cmp_lt_u16_e64 vcc, v1.l, v255.l      ; encoding: [0x6a,0x00,0x39,0xd4,0x01,0xff,0x03,0x00]
+
+v_cmp_lt_u16 vcc, v1.l, v255.l
+// GFX11: v_cmp_lt_u16_e64 vcc, v1.l, v255.l      ; encoding: [0x6a,0x00,0x39,0xd4,0x01,0xff,0x03,0x00]
+
+v_cmp_lt_u16 vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_lt_u16_e64_dpp vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x39,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
+
+v_cmp_lt_u16 vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_lt_u16_e64_dpp vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x39,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
+
+v_cmp_lt_u16 vcc, v1.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: v_cmp_lt_u16_e64_dpp vcc, v1.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x39,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+
+v_cmp_lt_u16 vcc, v1.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: v_cmp_lt_u16_e64_dpp vcc, v1.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x39,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+
+v_cmp_lt_u16 vcc, v127.h, v255.h
+// GFX11: v_cmp_lt_u16_e64 vcc, v127.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x39,0xd4,0x7f,0xff,0x03,0x00]
+
+v_cmp_lt_u16 vcc, v127.h, v255.h
+// GFX11: v_cmp_lt_u16_e64 vcc, v127.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x39,0xd4,0x7f,0xff,0x03,0x00]
+
+v_cmp_lt_u16 vcc, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_lt_u16_e64_dpp vcc, v127.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x39,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+
+v_cmp_lt_u16 vcc, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_lt_u16_e64_dpp vcc, v127.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x39,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+
+v_cmp_lt_u16 vcc, v127.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: v_cmp_lt_u16_e64_dpp vcc, v127.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x39,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+
+v_cmp_lt_u16 vcc, v127.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: v_cmp_lt_u16_e64_dpp vcc, v127.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x39,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+
+v_cmp_lt_u16 vcc, v127.l, v255.l
+// GFX11: v_cmp_lt_u16_e64 vcc, v127.l, v255.l    ; encoding: [0x6a,0x00,0x39,0xd4,0x7f,0xff,0x03,0x00]
+
+v_cmp_lt_u16 vcc, v127.l, v255.l
+// GFX11: v_cmp_lt_u16_e64 vcc, v127.l, v255.l    ; encoding: [0x6a,0x00,0x39,0xd4,0x7f,0xff,0x03,0x00]
+
+v_cmp_lt_u16 vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_lt_u16_e64_dpp vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x39,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+
+v_cmp_lt_u16 vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_lt_u16_e64_dpp vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x39,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+
+v_cmp_lt_u16 vcc, v127.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: v_cmp_lt_u16_e64_dpp vcc, v127.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x39,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+
+v_cmp_lt_u16 vcc, v127.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: v_cmp_lt_u16_e64_dpp vcc, v127.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x39,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+
+v_cmp_lt_u16 vcc, v128.h, v2.h
+// GFX11: v_cmp_lt_u16_e64 vcc, v128.h, v2.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x39,0xd4,0x80,0x05,0x02,0x00]
+
+v_cmp_lt_u16 vcc, v128.h, v2.h
+// GFX11: v_cmp_lt_u16_e64 vcc, v128.h, v2.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x39,0xd4,0x80,0x05,0x02,0x00]
+
+v_cmp_lt_u16 vcc, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_lt_u16_e64_dpp vcc, v128.h, v2.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x39,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+
+v_cmp_lt_u16 vcc, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_lt_u16_e64_dpp vcc, v128.h, v2.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x39,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+
+v_cmp_lt_u16 vcc, v128.h, v2.h quad_perm:[3,2,1,0]
+// GFX11: v_cmp_lt_u16_e64_dpp vcc, v128.h, v2.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x39,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+
+v_cmp_lt_u16 vcc, v128.h, v2.h quad_perm:[3,2,1,0]
+// GFX11: v_cmp_lt_u16_e64_dpp vcc, v128.h, v2.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x39,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+
+v_cmp_lt_u16 vcc, v128.l, v2.l
+// GFX11: v_cmp_lt_u16_e64 vcc, v128.l, v2.l      ; encoding: [0x6a,0x00,0x39,0xd4,0x80,0x05,0x02,0x00]
+
+v_cmp_lt_u16 vcc, v128.l, v2.l
+// GFX11: v_cmp_lt_u16_e64 vcc, v128.l, v2.l      ; encoding: [0x6a,0x00,0x39,0xd4,0x80,0x05,0x02,0x00]
+
+v_cmp_lt_u16 vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_lt_u16_e64_dpp vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+
+v_cmp_lt_u16 vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_lt_u16_e64_dpp vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+
+v_cmp_lt_u16 vcc, v128.l, v2.l quad_perm:[3,2,1,0]
+// GFX11: v_cmp_lt_u16_e64_dpp vcc, v128.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+
+v_cmp_lt_u16 vcc, v128.l, v2.l quad_perm:[3,2,1,0]
+// GFX11: v_cmp_lt_u16_e64_dpp vcc, v128.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+
+v_cmp_lt_u16 vcc, vcc_hi, v255.h
+// GFX11: v_cmp_lt_u16_e64 vcc, vcc_hi, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x39,0xd4,0x6b,0xfe,0x03,0x00]
+
+v_cmp_lt_u16 vcc, vcc_hi, v255.h
+// GFX11: v_cmp_lt_u16_e64 vcc, vcc_hi, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x39,0xd4,0x6b,0xfe,0x03,0x00]
+
+v_cmp_lt_u16 vcc, vcc_hi, v255.l
+// GFX11: v_cmp_lt_u16_e64 vcc, vcc_hi, v255.l    ; encoding: [0x6a,0x00,0x39,0xd4,0x6b,0xfe,0x03,0x00]
+
+v_cmp_lt_u16 vcc, vcc_hi, v255.l
+// GFX11: v_cmp_lt_u16_e64 vcc, vcc_hi, v255.l    ; encoding: [0x6a,0x00,0x39,0xd4,0x6b,0xfe,0x03,0x00]
+
+v_cmp_lt_u16 vcc, vcc_lo, v255.h
+// GFX11: v_cmp_lt_u16_e64 vcc, vcc_lo, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x39,0xd4,0x6a,0xfe,0x03,0x00]
+
+v_cmp_lt_u16 vcc, vcc_lo, v255.h
+// GFX11: v_cmp_lt_u16_e64 vcc, vcc_lo, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x39,0xd4,0x6a,0xfe,0x03,0x00]
+
+v_cmp_lt_u16 vcc, vcc_lo, v255.l
+// GFX11: v_cmp_lt_u16_e64 vcc, vcc_lo, v255.l    ; encoding: [0x6a,0x00,0x39,0xd4,0x6a,0xfe,0x03,0x00]
+
+v_cmp_lt_u16 vcc, vcc_lo, v255.l
+// GFX11: v_cmp_lt_u16_e64 vcc, vcc_lo, v255.l    ; encoding: [0x6a,0x00,0x39,0xd4,0x6a,0xfe,0x03,0x00]
+
+v_cmp_ne_i16 vcc, v1.h, v255.h
+// GFX11: v_cmp_ne_i16_e64 vcc, v1.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x35,0xd4,0x01,0xff,0x03,0x00]
 
-v_cmp_lt_i16 vcc, v1, v255
-// GFX11: v_cmp_lt_i16_e64 vcc, v1, v255          ; encoding: [0x6a,0x00,0x31,0xd4,0x01,0xff,0x03,0x00]
+v_cmp_ne_i16 vcc, v1.h, v255.h
+// GFX11: v_cmp_ne_i16_e64 vcc, v1.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x35,0xd4,0x01,0xff,0x03,0x00]
 
-v_cmp_lt_i16 vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: v_cmp_lt_i16_e64_dpp vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x31,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ne_i16 vcc, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_ne_i16_e64_dpp vcc, v1.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x35,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
 
-v_cmp_lt_i16 vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: v_cmp_lt_i16_e64_dpp vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x31,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ne_i16 vcc, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_ne_i16_e64_dpp vcc, v1.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x35,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
 
-v_cmp_lt_i16 vcc, v1, v255 quad_perm:[3,2,1,0]
-// GFX11: v_cmp_lt_i16_e64_dpp vcc, v1, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x31,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_ne_i16 vcc, v1.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: v_cmp_ne_i16_e64_dpp vcc, v1.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x35,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
 
-v_cmp_lt_i16 vcc, v1, v255 quad_perm:[3,2,1,0]
-// GFX11: v_cmp_lt_i16_e64_dpp vcc, v1, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x31,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_ne_i16 vcc, v1.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: v_cmp_ne_i16_e64_dpp vcc, v1.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x35,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
 
-v_cmp_lt_i16 vcc, v127, v255
-// GFX11: v_cmp_lt_i16_e64 vcc, v127, v255        ; encoding: [0x6a,0x00,0x31,0xd4,0x7f,0xff,0x03,0x00]
+v_cmp_ne_i16 vcc, v1.l, v255.l
+// GFX11: v_cmp_ne_i16_e64 vcc, v1.l, v255.l      ; encoding: [0x6a,0x00,0x35,0xd4,0x01,0xff,0x03,0x00]
 
-v_cmp_lt_i16 vcc, v127, v255
-// GFX11: v_cmp_lt_i16_e64 vcc, v127, v255        ; encoding: [0x6a,0x00,0x31,0xd4,0x7f,0xff,0x03,0x00]
+v_cmp_ne_i16 vcc, v1.l, v255.l
+// GFX11: v_cmp_ne_i16_e64 vcc, v1.l, v255.l      ; encoding: [0x6a,0x00,0x35,0xd4,0x01,0xff,0x03,0x00]
 
-v_cmp_lt_i16 vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: v_cmp_lt_i16_e64_dpp vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x31,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+v_cmp_ne_i16 vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_ne_i16_e64_dpp vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x35,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
 
-v_cmp_lt_i16 vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: v_cmp_lt_i16_e64_dpp vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x31,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+v_cmp_ne_i16 vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_ne_i16_e64_dpp vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x35,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
 
-v_cmp_lt_i16 vcc, v127, v255 quad_perm:[3,2,1,0]
-// GFX11: v_cmp_lt_i16_e64_dpp vcc, v127, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x31,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+v_cmp_ne_i16 vcc, v1.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: v_cmp_ne_i16_e64_dpp vcc, v1.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x35,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
 
-v_cmp_lt_i16 vcc, v127, v255 quad_perm:[3,2,1,0]
-// GFX11: v_cmp_lt_i16_e64_dpp vcc, v127, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x31,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+v_cmp_ne_i16 vcc, v1.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: v_cmp_ne_i16_e64_dpp vcc, v1.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x35,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
 
-v_cmp_lt_i16 vcc, v128, v2
-// GFX11: v_cmp_lt_i16_e64 vcc, v128, v2          ; encoding: [0x6a,0x00,0x31,0xd4,0x80,0x05,0x02,0x00]
+v_cmp_ne_i16 vcc, v127.h, v255.h
+// GFX11: v_cmp_ne_i16_e64 vcc, v127.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x35,0xd4,0x7f,0xff,0x03,0x00]
 
-v_cmp_lt_i16 vcc, v128, v2
-// GFX11: v_cmp_lt_i16_e64 vcc, v128, v2          ; encoding: [0x6a,0x00,0x31,0xd4,0x80,0x05,0x02,0x00]
+v_cmp_ne_i16 vcc, v127.h, v255.h
+// GFX11: v_cmp_ne_i16_e64 vcc, v127.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x35,0xd4,0x7f,0xff,0x03,0x00]
 
-v_cmp_lt_i16 vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: v_cmp_lt_i16_e64_dpp vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+v_cmp_ne_i16 vcc, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_ne_i16_e64_dpp vcc, v127.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x35,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
 
-v_cmp_lt_i16 vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: v_cmp_lt_i16_e64_dpp vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+v_cmp_ne_i16 vcc, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_ne_i16_e64_dpp vcc, v127.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x35,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
 
-v_cmp_lt_i16 vcc, v128, v2 quad_perm:[3,2,1,0]
-// GFX11: v_cmp_lt_i16_e64_dpp vcc, v128, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+v_cmp_ne_i16 vcc, v127.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: v_cmp_ne_i16_e64_dpp vcc, v127.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x35,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
 
-v_cmp_lt_i16 vcc, v128, v2 quad_perm:[3,2,1,0]
-// GFX11: v_cmp_lt_i16_e64_dpp vcc, v128, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+v_cmp_ne_i16 vcc, v127.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: v_cmp_ne_i16_e64_dpp vcc, v127.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x35,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
 
-v_cmp_lt_i16 vcc, vcc_hi, v255
-// GFX11: v_cmp_lt_i16_e64 vcc, vcc_hi, v255      ; encoding: [0x6a,0x00,0x31,0xd4,0x6b,0xfe,0x03,0x00]
+v_cmp_ne_i16 vcc, v127.l, v255.l
+// GFX11: v_cmp_ne_i16_e64 vcc, v127.l, v255.l    ; encoding: [0x6a,0x00,0x35,0xd4,0x7f,0xff,0x03,0x00]
 
-v_cmp_lt_i16 vcc, vcc_hi, v255
-// GFX11: v_cmp_lt_i16_e64 vcc, vcc_hi, v255      ; encoding: [0x6a,0x00,0x31,0xd4,0x6b,0xfe,0x03,0x00]
+v_cmp_ne_i16 vcc, v127.l, v255.l
+// GFX11: v_cmp_ne_i16_e64 vcc, v127.l, v255.l    ; encoding: [0x6a,0x00,0x35,0xd4,0x7f,0xff,0x03,0x00]
 
-v_cmp_lt_i16 vcc, vcc_lo, v255
-// GFX11: v_cmp_lt_i16_e64 vcc, vcc_lo, v255      ; encoding: [0x6a,0x00,0x31,0xd4,0x6a,0xfe,0x03,0x00]
+v_cmp_ne_i16 vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_ne_i16_e64_dpp vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x35,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
 
-v_cmp_lt_i16 vcc, vcc_lo, v255
-// GFX11: v_cmp_lt_i16_e64 vcc, vcc_lo, v255      ; encoding: [0x6a,0x00,0x31,0xd4,0x6a,0xfe,0x03,0x00]
+v_cmp_ne_i16 vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_ne_i16_e64_dpp vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x35,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
 
-v_cmp_lt_u16 vcc, v1, v255
-// GFX11: v_cmp_lt_u16_e64 vcc, v1, v255          ; encoding: [0x6a,0x00,0x39,0xd4,0x01,0xff,0x03,0x00]
+v_cmp_ne_i16 vcc, v127.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: v_cmp_ne_i16_e64_dpp vcc, v127.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x35,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
 
-v_cmp_lt_u16 vcc, v1, v255
-// GFX11: v_cmp_lt_u16_e64 vcc, v1, v255          ; encoding: [0x6a,0x00,0x39,0xd4,0x01,0xff,0x03,0x00]
+v_cmp_ne_i16 vcc, v127.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: v_cmp_ne_i16_e64_dpp vcc, v127.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x35,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
 
-v_cmp_lt_u16 vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: v_cmp_lt_u16_e64_dpp vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x39,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ne_i16 vcc, v128.h, v2.h
+// GFX11: v_cmp_ne_i16_e64 vcc, v128.h, v2.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x35,0xd4,0x80,0x05,0x02,0x00]
 
-v_cmp_lt_u16 vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: v_cmp_lt_u16_e64_dpp vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x39,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ne_i16 vcc, v128.h, v2.h
+// GFX11: v_cmp_ne_i16_e64 vcc, v128.h, v2.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x35,0xd4,0x80,0x05,0x02,0x00]
 
-v_cmp_lt_u16 vcc, v1, v255 quad_perm:[3,2,1,0]
-// GFX11: v_cmp_lt_u16_e64_dpp vcc, v1, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x39,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_ne_i16 vcc, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_ne_i16_e64_dpp vcc, v128.h, v2.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x35,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
 
-v_cmp_lt_u16 vcc, v1, v255 quad_perm:[3,2,1,0]
-// GFX11: v_cmp_lt_u16_e64_dpp vcc, v1, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x39,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_ne_i16 vcc, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_ne_i16_e64_dpp vcc, v128.h, v2.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x35,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
 
-v_cmp_lt_u16 vcc, v127, v255
-// GFX11: v_cmp_lt_u16_e64 vcc, v127, v255        ; encoding: [0x6a,0x00,0x39,0xd4,0x7f,0xff,0x03,0x00]
+v_cmp_ne_i16 vcc, v128.h, v2.h quad_perm:[3,2,1,0]
+// GFX11: v_cmp_ne_i16_e64_dpp vcc, v128.h, v2.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x35,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
 
-v_cmp_lt_u16 vcc, v127, v255
-// GFX11: v_cmp_lt_u16_e64 vcc, v127, v255        ; encoding: [0x6a,0x00,0x39,0xd4,0x7f,0xff,0x03,0x00]
+v_cmp_ne_i16 vcc, v128.h, v2.h quad_perm:[3,2,1,0]
+// GFX11: v_cmp_ne_i16_e64_dpp vcc, v128.h, v2.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x35,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
 
-v_cmp_lt_u16 vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: v_cmp_lt_u16_e64_dpp vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x39,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+v_cmp_ne_i16 vcc, v128.l, v2.l
+// GFX11: v_cmp_ne_i16_e64 vcc, v128.l, v2.l      ; encoding: [0x6a,0x00,0x35,0xd4,0x80,0x05,0x02,0x00]
 
-v_cmp_lt_u16 vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: v_cmp_lt_u16_e64_dpp vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x39,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+v_cmp_ne_i16 vcc, v128.l, v2.l
+// GFX11: v_cmp_ne_i16_e64 vcc, v128.l, v2.l      ; encoding: [0x6a,0x00,0x35,0xd4,0x80,0x05,0x02,0x00]
 
-v_cmp_lt_u16 vcc, v127, v255 quad_perm:[3,2,1,0]
-// GFX11: v_cmp_lt_u16_e64_dpp vcc, v127, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x39,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+v_cmp_ne_i16 vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_ne_i16_e64_dpp vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
 
-v_cmp_lt_u16 vcc, v127, v255 quad_perm:[3,2,1,0]
-// GFX11: v_cmp_lt_u16_e64_dpp vcc, v127, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x39,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+v_cmp_ne_i16 vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_ne_i16_e64_dpp vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
 
-v_cmp_lt_u16 vcc, v128, v2
-// GFX11: v_cmp_lt_u16_e64 vcc, v128, v2          ; encoding: [0x6a,0x00,0x39,0xd4,0x80,0x05,0x02,0x00]
+v_cmp_ne_i16 vcc, v128.l, v2.l quad_perm:[3,2,1,0]
+// GFX11: v_cmp_ne_i16_e64_dpp vcc, v128.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
 
-v_cmp_lt_u16 vcc, v128, v2
-// GFX11: v_cmp_lt_u16_e64 vcc, v128, v2          ; encoding: [0x6a,0x00,0x39,0xd4,0x80,0x05,0x02,0x00]
+v_cmp_ne_i16 vcc, v128.l, v2.l quad_perm:[3,2,1,0]
+// GFX11: v_cmp_ne_i16_e64_dpp vcc, v128.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
 
-v_cmp_lt_u16 vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: v_cmp_lt_u16_e64_dpp vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+v_cmp_ne_i16 vcc, vcc_hi, v255.h
+// GFX11: v_cmp_ne_i16_e64 vcc, vcc_hi, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x35,0xd4,0x6b,0xfe,0x03,0x00]
 
-v_cmp_lt_u16 vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: v_cmp_lt_u16_e64_dpp vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+v_cmp_ne_i16 vcc, vcc_hi, v255.h
+// GFX11: v_cmp_ne_i16_e64 vcc, vcc_hi, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x35,0xd4,0x6b,0xfe,0x03,0x00]
 
-v_cmp_lt_u16 vcc, v128, v2 quad_perm:[3,2,1,0]
-// GFX11: v_cmp_lt_u16_e64_dpp vcc, v128, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+v_cmp_ne_i16 vcc, vcc_hi, v255.l
+// GFX11: v_cmp_ne_i16_e64 vcc, vcc_hi, v255.l    ; encoding: [0x6a,0x00,0x35,0xd4,0x6b,0xfe,0x03,0x00]
 
-v_cmp_lt_u16 vcc, v128, v2 quad_perm:[3,2,1,0]
-// GFX11: v_cmp_lt_u16_e64_dpp vcc, v128, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+v_cmp_ne_i16 vcc, vcc_hi, v255.l
+// GFX11: v_cmp_ne_i16_e64 vcc, vcc_hi, v255.l    ; encoding: [0x6a,0x00,0x35,0xd4,0x6b,0xfe,0x03,0x00]
 
-v_cmp_lt_u16 vcc, vcc_hi, v255
-// GFX11: v_cmp_lt_u16_e64 vcc, vcc_hi, v255      ; encoding: [0x6a,0x00,0x39,0xd4,0x6b,0xfe,0x03,0x00]
+v_cmp_ne_i16 vcc, vcc_lo, v255.h
+// GFX11: v_cmp_ne_i16_e64 vcc, vcc_lo, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x35,0xd4,0x6a,0xfe,0x03,0x00]
 
-v_cmp_lt_u16 vcc, vcc_hi, v255
-// GFX11: v_cmp_lt_u16_e64 vcc, vcc_hi, v255      ; encoding: [0x6a,0x00,0x39,0xd4,0x6b,0xfe,0x03,0x00]
+v_cmp_ne_i16 vcc, vcc_lo, v255.h
+// GFX11: v_cmp_ne_i16_e64 vcc, vcc_lo, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x35,0xd4,0x6a,0xfe,0x03,0x00]
 
-v_cmp_lt_u16 vcc, vcc_lo, v255
-// GFX11: v_cmp_lt_u16_e64 vcc, vcc_lo, v255      ; encoding: [0x6a,0x00,0x39,0xd4,0x6a,0xfe,0x03,0x00]
+v_cmp_ne_i16 vcc, vcc_lo, v255.l
+// GFX11: v_cmp_ne_i16_e64 vcc, vcc_lo, v255.l    ; encoding: [0x6a,0x00,0x35,0xd4,0x6a,0xfe,0x03,0x00]
 
-v_cmp_lt_u16 vcc, vcc_lo, v255
-// GFX11: v_cmp_lt_u16_e64 vcc, vcc_lo, v255      ; encoding: [0x6a,0x00,0x39,0xd4,0x6a,0xfe,0x03,0x00]
+v_cmp_ne_i16 vcc, vcc_lo, v255.l
+// GFX11: v_cmp_ne_i16_e64 vcc, vcc_lo, v255.l    ; encoding: [0x6a,0x00,0x35,0xd4,0x6a,0xfe,0x03,0x00]
 
-v_cmp_ne_i16 vcc, v1, v255
-// GFX11: v_cmp_ne_i16_e64 vcc, v1, v255          ; encoding: [0x6a,0x00,0x35,0xd4,0x01,0xff,0x03,0x00]
+v_cmp_ne_u16 vcc, v1.h, v255.h
+// GFX11: v_cmp_ne_u16_e64 vcc, v1.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x3d,0xd4,0x01,0xff,0x03,0x00]
 
-v_cmp_ne_i16 vcc, v1, v255
-// GFX11: v_cmp_ne_i16_e64 vcc, v1, v255          ; encoding: [0x6a,0x00,0x35,0xd4,0x01,0xff,0x03,0x00]
+v_cmp_ne_u16 vcc, v1.h, v255.h
+// GFX11: v_cmp_ne_u16_e64 vcc, v1.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x3d,0xd4,0x01,0xff,0x03,0x00]
 
-v_cmp_ne_i16 vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: v_cmp_ne_i16_e64_dpp vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x35,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ne_u16 vcc, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_ne_u16_e64_dpp vcc, v1.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x3d,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
 
-v_cmp_ne_i16 vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: v_cmp_ne_i16_e64_dpp vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x35,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ne_u16 vcc, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_ne_u16_e64_dpp vcc, v1.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x3d,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
 
-v_cmp_ne_i16 vcc, v1, v255 quad_perm:[3,2,1,0]
-// GFX11: v_cmp_ne_i16_e64_dpp vcc, v1, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x35,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_ne_u16 vcc, v1.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: v_cmp_ne_u16_e64_dpp vcc, v1.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x3d,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
 
-v_cmp_ne_i16 vcc, v1, v255 quad_perm:[3,2,1,0]
-// GFX11: v_cmp_ne_i16_e64_dpp vcc, v1, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x35,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_ne_u16 vcc, v1.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: v_cmp_ne_u16_e64_dpp vcc, v1.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x3d,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
 
-v_cmp_ne_i16 vcc, v127, v255
-// GFX11: v_cmp_ne_i16_e64 vcc, v127, v255        ; encoding: [0x6a,0x00,0x35,0xd4,0x7f,0xff,0x03,0x00]
+v_cmp_ne_u16 vcc, v1.l, v255.l
+// GFX11: v_cmp_ne_u16_e64 vcc, v1.l, v255.l      ; encoding: [0x6a,0x00,0x3d,0xd4,0x01,0xff,0x03,0x00]
 
-v_cmp_ne_i16 vcc, v127, v255
-// GFX11: v_cmp_ne_i16_e64 vcc, v127, v255        ; encoding: [0x6a,0x00,0x35,0xd4,0x7f,0xff,0x03,0x00]
+v_cmp_ne_u16 vcc, v1.l, v255.l
+// GFX11: v_cmp_ne_u16_e64 vcc, v1.l, v255.l      ; encoding: [0x6a,0x00,0x3d,0xd4,0x01,0xff,0x03,0x00]
 
-v_cmp_ne_i16 vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: v_cmp_ne_i16_e64_dpp vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x35,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+v_cmp_ne_u16 vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_ne_u16_e64_dpp vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3d,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
 
-v_cmp_ne_i16 vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: v_cmp_ne_i16_e64_dpp vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x35,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+v_cmp_ne_u16 vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_ne_u16_e64_dpp vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3d,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
 
-v_cmp_ne_i16 vcc, v127, v255 quad_perm:[3,2,1,0]
-// GFX11: v_cmp_ne_i16_e64_dpp vcc, v127, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x35,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+v_cmp_ne_u16 vcc, v1.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: v_cmp_ne_u16_e64_dpp vcc, v1.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3d,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
 
-v_cmp_ne_i16 vcc, v127, v255 quad_perm:[3,2,1,0]
-// GFX11: v_cmp_ne_i16_e64_dpp vcc, v127, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x35,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+v_cmp_ne_u16 vcc, v1.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: v_cmp_ne_u16_e64_dpp vcc, v1.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3d,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
 
-v_cmp_ne_i16 vcc, v128, v2
-// GFX11: v_cmp_ne_i16_e64 vcc, v128, v2          ; encoding: [0x6a,0x00,0x35,0xd4,0x80,0x05,0x02,0x00]
+v_cmp_ne_u16 vcc, v127.h, v255.h
+// GFX11: v_cmp_ne_u16_e64 vcc, v127.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x3d,0xd4,0x7f,0xff,0x03,0x00]
 
-v_cmp_ne_i16 vcc, v128, v2
-// GFX11: v_cmp_ne_i16_e64 vcc, v128, v2          ; encoding: [0x6a,0x00,0x35,0xd4,0x80,0x05,0x02,0x00]
+v_cmp_ne_u16 vcc, v127.h, v255.h
+// GFX11: v_cmp_ne_u16_e64 vcc, v127.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x3d,0xd4,0x7f,0xff,0x03,0x00]
 
-v_cmp_ne_i16 vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: v_cmp_ne_i16_e64_dpp vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+v_cmp_ne_u16 vcc, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_ne_u16_e64_dpp vcc, v127.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x3d,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
 
-v_cmp_ne_i16 vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: v_cmp_ne_i16_e64_dpp vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+v_cmp_ne_u16 vcc, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_ne_u16_e64_dpp vcc, v127.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x3d,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
 
-v_cmp_ne_i16 vcc, v128, v2 quad_perm:[3,2,1,0]
-// GFX11: v_cmp_ne_i16_e64_dpp vcc, v128, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+v_cmp_ne_u16 vcc, v127.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: v_cmp_ne_u16_e64_dpp vcc, v127.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x3d,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
 
-v_cmp_ne_i16 vcc, v128, v2 quad_perm:[3,2,1,0]
-// GFX11: v_cmp_ne_i16_e64_dpp vcc, v128, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+v_cmp_ne_u16 vcc, v127.h, v255.h quad_perm:[3,2,1,0]
+// GFX11: v_cmp_ne_u16_e64_dpp vcc, v127.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x3d,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
 
-v_cmp_ne_i16 vcc, vcc_hi, v255
-// GFX11: v_cmp_ne_i16_e64 vcc, vcc_hi, v255      ; encoding: [0x6a,0x00,0x35,0xd4,0x6b,0xfe,0x03,0x00]
+v_cmp_ne_u16 vcc, v127.l, v255.l
+// GFX11: v_cmp_ne_u16_e64 vcc, v127.l, v255.l    ; encoding: [0x6a,0x00,0x3d,0xd4,0x7f,0xff,0x03,0x00]
 
-v_cmp_ne_i16 vcc, vcc_hi, v255
-// GFX11: v_cmp_ne_i16_e64 vcc, vcc_hi, v255      ; encoding: [0x6a,0x00,0x35,0xd4,0x6b,0xfe,0x03,0x00]
+v_cmp_ne_u16 vcc, v127.l, v255.l
+// GFX11: v_cmp_ne_u16_e64 vcc, v127.l, v255.l    ; encoding: [0x6a,0x00,0x3d,0xd4,0x7f,0xff,0x03,0x00]
 
-v_cmp_ne_i16 vcc, vcc_lo, v255
-// GFX11: v_cmp_ne_i16_e64 vcc, vcc_lo, v255      ; encoding: [0x6a,0x00,0x35,0xd4,0x6a,0xfe,0x03,0x00]
+v_cmp_ne_u16 vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_ne_u16_e64_dpp vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3d,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
 
-v_cmp_ne_i16 vcc, vcc_lo, v255
-// GFX11: v_cmp_ne_i16_e64 vcc, vcc_lo, v255      ; encoding: [0x6a,0x00,0x35,0xd4,0x6a,0xfe,0x03,0x00]
+v_cmp_ne_u16 vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_ne_u16_e64_dpp vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3d,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
 
-v_cmp_ne_u16 vcc, v1, v255
-// GFX11: v_cmp_ne_u16_e64 vcc, v1, v255          ; encoding: [0x6a,0x00,0x3d,0xd4,0x01,0xff,0x03,0x00]
+v_cmp_ne_u16 vcc, v127.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: v_cmp_ne_u16_e64_dpp vcc, v127.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3d,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
 
-v_cmp_ne_u16 vcc, v1, v255
-// GFX11: v_cmp_ne_u16_e64 vcc, v1, v255          ; encoding: [0x6a,0x00,0x3d,0xd4,0x01,0xff,0x03,0x00]
+v_cmp_ne_u16 vcc, v127.l, v255.l quad_perm:[3,2,1,0]
+// GFX11: v_cmp_ne_u16_e64_dpp vcc, v127.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3d,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
 
-v_cmp_ne_u16 vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: v_cmp_ne_u16_e64_dpp vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3d,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ne_u16 vcc, v128.h, v2.h
+// GFX11: v_cmp_ne_u16_e64 vcc, v128.h, v2.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x3d,0xd4,0x80,0x05,0x02,0x00]
 
-v_cmp_ne_u16 vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: v_cmp_ne_u16_e64_dpp vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3d,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ne_u16 vcc, v128.h, v2.h
+// GFX11: v_cmp_ne_u16_e64 vcc, v128.h, v2.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x3d,0xd4,0x80,0x05,0x02,0x00]
 
-v_cmp_ne_u16 vcc, v1, v255 quad_perm:[3,2,1,0]
-// GFX11: v_cmp_ne_u16_e64_dpp vcc, v1, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3d,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_ne_u16 vcc, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_ne_u16_e64_dpp vcc, v128.h, v2.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
 
-v_cmp_ne_u16 vcc, v1, v255 quad_perm:[3,2,1,0]
-// GFX11: v_cmp_ne_u16_e64_dpp vcc, v1, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3d,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_ne_u16 vcc, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_ne_u16_e64_dpp vcc, v128.h, v2.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
 
-v_cmp_ne_u16 vcc, v127, v255
-// GFX11: v_cmp_ne_u16_e64 vcc, v127, v255        ; encoding: [0x6a,0x00,0x3d,0xd4,0x7f,0xff,0x03,0x00]
+v_cmp_ne_u16 vcc, v128.h, v2.h quad_perm:[3,2,1,0]
+// GFX11: v_cmp_ne_u16_e64_dpp vcc, v128.h, v2.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
 
-v_cmp_ne_u16 vcc, v127, v255
-// GFX11: v_cmp_ne_u16_e64 vcc, v127, v255        ; encoding: [0x6a,0x00,0x3d,0xd4,0x7f,0xff,0x03,0x00]
+v_cmp_ne_u16 vcc, v128.h, v2.h quad_perm:[3,2,1,0]
+// GFX11: v_cmp_ne_u16_e64_dpp vcc, v128.h, v2.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
 
-v_cmp_ne_u16 vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: v_cmp_ne_u16_e64_dpp vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3d,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+v_cmp_ne_u16 vcc, v128.l, v2.l
+// GFX11: v_cmp_ne_u16_e64 vcc, v128.l, v2.l      ; encoding: [0x6a,0x00,0x3d,0xd4,0x80,0x05,0x02,0x00]
 
-v_cmp_ne_u16 vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: v_cmp_ne_u16_e64_dpp vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3d,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+v_cmp_ne_u16 vcc, v128.l, v2.l
+// GFX11: v_cmp_ne_u16_e64 vcc, v128.l, v2.l      ; encoding: [0x6a,0x00,0x3d,0xd4,0x80,0x05,0x02,0x00]
 
-v_cmp_ne_u16 vcc, v127, v255 quad_perm:[3,2,1,0]
-// GFX11: v_cmp_ne_u16_e64_dpp vcc, v127, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3d,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+v_cmp_ne_u16 vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_ne_u16_e64_dpp vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
 
-v_cmp_ne_u16 vcc, v127, v255 quad_perm:[3,2,1,0]
-// GFX11: v_cmp_ne_u16_e64_dpp vcc, v127, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3d,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+v_cmp_ne_u16 vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX11: v_cmp_ne_u16_e64_dpp vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
 
-v_cmp_ne_u16 vcc, v128, v2
-// GFX11: v_cmp_ne_u16_e64 vcc, v128, v2          ; encoding: [0x6a,0x00,0x3d,0xd4,0x80,0x05,0x02,0x00]
+v_cmp_ne_u16 vcc, v128.l, v2.l quad_perm:[3,2,1,0]
+// GFX11: v_cmp_ne_u16_e64_dpp vcc, v128.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
 
-v_cmp_ne_u16 vcc, v128, v2
-// GFX11: v_cmp_ne_u16_e64 vcc, v128, v2          ; encoding: [0x6a,0x00,0x3d,0xd4,0x80,0x05,0x02,0x00]
+v_cmp_ne_u16 vcc, v128.l, v2.l quad_perm:[3,2,1,0]
+// GFX11: v_cmp_ne_u16_e64_dpp vcc, v128.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
 
-v_cmp_ne_u16 vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: v_cmp_ne_u16_e64_dpp vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+v_cmp_ne_u16 vcc, vcc_hi, v255.h
+// GFX11: v_cmp_ne_u16_e64 vcc, vcc_hi, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x3d,0xd4,0x6b,0xfe,0x03,0x00]
 
-v_cmp_ne_u16 vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// GFX11: v_cmp_ne_u16_e64_dpp vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+v_cmp_ne_u16 vcc, vcc_hi, v255.h
+// GFX11: v_cmp_ne_u16_e64 vcc, vcc_hi, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x3d,0xd4,0x6b,0xfe,0x03,0x00]
 
-v_cmp_ne_u16 vcc, v128, v2 quad_perm:[3,2,1,0]
-// GFX11: v_cmp_ne_u16_e64_dpp vcc, v128, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+v_cmp_ne_u16 vcc, vcc_hi, v255.l
+// GFX11: v_cmp_ne_u16_e64 vcc, vcc_hi, v255.l    ; encoding: [0x6a,0x00,0x3d,0xd4,0x6b,0xfe,0x03,0x00]
 
-v_cmp_ne_u16 vcc, v128, v2 quad_perm:[3,2,1,0]
-// GFX11: v_cmp_ne_u16_e64_dpp vcc, v128, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+v_cmp_ne_u16 vcc, vcc_hi, v255.l
+// GFX11: v_cmp_ne_u16_e64 vcc, vcc_hi, v255.l    ; encoding: [0x6a,0x00,0x3d,0xd4,0x6b,0xfe,0x03,0x00]
 
-v_cmp_ne_u16 vcc, vcc_hi, v255
-// GFX11: v_cmp_ne_u16_e64 vcc, vcc_hi, v255      ; encoding: [0x6a,0x00,0x3d,0xd4,0x6b,0xfe,0x03,0x00]
+v_cmp_ne_u16 vcc, vcc_lo, v255.h
+// GFX11: v_cmp_ne_u16_e64 vcc, vcc_lo, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x3d,0xd4,0x6a,0xfe,0x03,0x00]
 
-v_cmp_ne_u16 vcc, vcc_hi, v255
-// GFX11: v_cmp_ne_u16_e64 vcc, vcc_hi, v255      ; encoding: [0x6a,0x00,0x3d,0xd4,0x6b,0xfe,0x03,0x00]
+v_cmp_ne_u16 vcc, vcc_lo, v255.h
+// GFX11: v_cmp_ne_u16_e64 vcc, vcc_lo, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x3d,0xd4,0x6a,0xfe,0x03,0x00]
 
-v_cmp_ne_u16 vcc, vcc_lo, v255
-// GFX11: v_cmp_ne_u16_e64 vcc, vcc_lo, v255      ; encoding: [0x6a,0x00,0x3d,0xd4,0x6a,0xfe,0x03,0x00]
+v_cmp_ne_u16 vcc, vcc_lo, v255.l
+// GFX11: v_cmp_ne_u16_e64 vcc, vcc_lo, v255.l    ; encoding: [0x6a,0x00,0x3d,0xd4,0x6a,0xfe,0x03,0x00]
 
-v_cmp_ne_u16 vcc, vcc_lo, v255
-// GFX11: v_cmp_ne_u16_e64 vcc, vcc_lo, v255      ; encoding: [0x6a,0x00,0x3d,0xd4,0x6a,0xfe,0x03,0x00]
+v_cmp_ne_u16 vcc, vcc_lo, v255.l
+// GFX11: v_cmp_ne_u16_e64 vcc, vcc_lo, v255.l    ; encoding: [0x6a,0x00,0x3d,0xd4,0x6a,0xfe,0x03,0x00]
 
 v_cmp_neq_f16 vcc, v1, v255
 // GFX11: v_cmp_neq_f16_e64 vcc, v1, v255         ; encoding: [0x6a,0x00,0x0d,0xd4,0x01,0xff,0x03,0x00]
diff --git a/llvm/test/MC/AMDGPU/gfx12_asm_vop3c.s b/llvm/test/MC/AMDGPU/gfx12_asm_vop3c.s
index 177b994d5ad06f..58cba4cd43a1c9 100644
--- a/llvm/test/MC/AMDGPU/gfx12_asm_vop3c.s
+++ b/llvm/test/MC/AMDGPU/gfx12_asm_vop3c.s
@@ -670,12 +670,12 @@ v_cmp_eq_f64_e64 ttmp[14:15], -|src_scc|, -|exec|
 v_cmp_eq_f64_e64 null, 0xaf123456, -|vcc| clamp
 // GFX12: v_cmp_eq_f64_e64 null, 0xaf123456, -|vcc| clamp ; encoding: [0x7c,0x82,0x22,0xd4,0xff,0xd4,0x00,0x40,0x56,0x34,0x12,0xaf]
 
-v_cmp_eq_i16_e64 s5, v1, v2
-// W32: v_cmp_eq_i16_e64 s5, v1, v2             ; encoding: [0x05,0x00,0x32,0xd4,0x01,0x05,0x02,0x00]
+v_cmp_eq_i16_e64 s5, v1.l, v2.l
+// W32: v_cmp_eq_i16_e64 s5, v1.l, v2.l         ; encoding: [0x05,0x00,0x32,0xd4,0x01,0x05,0x02,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
-v_cmp_eq_i16_e64 s5, v255, v255
-// W32: v_cmp_eq_i16_e64 s5, v255, v255         ; encoding: [0x05,0x00,0x32,0xd4,0xff,0xff,0x03,0x00]
+v_cmp_eq_i16_e64 s5, v255.l, v255.l
+// W32: v_cmp_eq_i16_e64 s5, v255.l, v255.l     ; encoding: [0x05,0x00,0x32,0xd4,0xff,0xff,0x03,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
 v_cmp_eq_i16_e64 s5, s1, s2
@@ -726,13 +726,13 @@ v_cmp_eq_i16_e64 ttmp15, src_scc, vcc_lo
 // W32: v_cmp_eq_i16_e64 ttmp15, src_scc, vcc_lo ; encoding: [0x7b,0x00,0x32,0xd4,0xfd,0xd4,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
-v_cmp_eq_i16_e64 s[10:11], v1, v2
-// W64: v_cmp_eq_i16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x32,0xd4,0x01,0x05,0x02,0x00]
-// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+v_cmp_eq_i16_e64 s10, v1.l, v2.l
+// W32: v_cmp_eq_i16_e64 s10, v1.l, v2.l        ; encoding: [0x0a,0x00,0x32,0xd4,0x01,0x05,0x02,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
-v_cmp_eq_i16_e64 s[10:11], v255, v255
-// W64: v_cmp_eq_i16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x32,0xd4,0xff,0xff,0x03,0x00]
-// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+v_cmp_eq_i16_e64 s10, v255.l, v255.l
+// W32: v_cmp_eq_i16_e64 s10, v255.l, v255.l    ; encoding: [0x0a,0x00,0x32,0xd4,0xff,0xff,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
 v_cmp_eq_i16_e64 s[10:11], s1, s2
 // W64: v_cmp_eq_i16_e64 s[10:11], s1, s2       ; encoding: [0x0a,0x00,0x32,0xd4,0x01,0x04,0x00,0x00]
@@ -785,6 +785,30 @@ v_cmp_eq_i16_e64 ttmp[14:15], src_scc, vcc_lo
 v_cmp_eq_i16_e64 null, 0xfe0b, vcc_hi
 // GFX12: v_cmp_eq_i16_e64 null, 0xfe0b, vcc_hi   ; encoding: [0x7c,0x00,0x32,0xd4,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00]
 
+v_cmp_eq_i16_e64 s5, v1.h, v2.l
+// W32: v_cmp_eq_i16_e64 s5, v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x05,0x08,0x32,0xd4,0x01,0x05,0x02,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_eq_i16_e64 s5, v255.l, v255.h
+// W32: v_cmp_eq_i16_e64 s5, v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x05,0x10,0x32,0xd4,0xff,0xff,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_eq_i16_e64 s[10:11], v1.h, v2.l
+// W64: v_cmp_eq_i16_e64 s[10:11], v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x0a,0x08,0x32,0xd4,0x01,0x05,0x02,0x00]
+// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_eq_i16_e64 s[10:11], v255.l, v255.h
+// W64: v_cmp_eq_i16_e64 s[10:11], v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x0a,0x10,0x32,0xd4,0xff,0xff,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_eq_i16_e64 vcc_lo, 0x3800, m0
+// W32: v_cmp_eq_i16_e64 vcc_lo, 0x3800, m0     ; encoding: [0x6a,0x00,0x32,0xd4,0xff,0xfa,0x00,0x00,0x00,0x38,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_eq_i16_e64 vcc, 0x3800, m0
+// W64: v_cmp_eq_i16_e64 vcc, 0x3800, m0        ; encoding: [0x6a,0x00,0x32,0xd4,0xff,0xfa,0x00,0x00,0x00,0x38,0x00,0x00]
+// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
 v_cmp_eq_i32_e64 s5, v1, v2
 // W32: v_cmp_eq_i32_e64 s5, v1, v2             ; encoding: [0x05,0x00,0x42,0xd4,0x01,0x05,0x02,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
@@ -991,12 +1015,12 @@ v_cmp_eq_i64_e64 ttmp[14:15], src_scc, exec
 v_cmp_eq_i64_e64 null, 0xaf123456, vcc
 // GFX12: v_cmp_eq_i64_e64 null, 0xaf123456, vcc  ; encoding: [0x7c,0x00,0x52,0xd4,0xff,0xd4,0x00,0x00,0x56,0x34,0x12,0xaf]
 
-v_cmp_eq_u16_e64 s5, v1, v2
-// W32: v_cmp_eq_u16_e64 s5, v1, v2             ; encoding: [0x05,0x00,0x3a,0xd4,0x01,0x05,0x02,0x00]
+v_cmp_eq_u16_e64 s5, v1.l, v2.l
+// W32: v_cmp_eq_u16_e64 s5, v1.l, v2.l         ; encoding: [0x05,0x00,0x3a,0xd4,0x01,0x05,0x02,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
-v_cmp_eq_u16_e64 s5, v255, v255
-// W32: v_cmp_eq_u16_e64 s5, v255, v255         ; encoding: [0x05,0x00,0x3a,0xd4,0xff,0xff,0x03,0x00]
+v_cmp_eq_u16_e64 s5, v255.l, v255.l
+// W32: v_cmp_eq_u16_e64 s5, v255.l, v255.l     ; encoding: [0x05,0x00,0x3a,0xd4,0xff,0xff,0x03,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
 v_cmp_eq_u16_e64 s5, s1, s2
@@ -1047,13 +1071,13 @@ v_cmp_eq_u16_e64 ttmp15, src_scc, vcc_lo
 // W32: v_cmp_eq_u16_e64 ttmp15, src_scc, vcc_lo ; encoding: [0x7b,0x00,0x3a,0xd4,0xfd,0xd4,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
-v_cmp_eq_u16_e64 s[10:11], v1, v2
-// W64: v_cmp_eq_u16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x3a,0xd4,0x01,0x05,0x02,0x00]
-// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+v_cmp_eq_u16_e64 s10, v1.l, v2.l
+// W32: v_cmp_eq_u16_e64 s10, v1.l, v2.l        ; encoding: [0x0a,0x00,0x3a,0xd4,0x01,0x05,0x02,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
-v_cmp_eq_u16_e64 s[10:11], v255, v255
-// W64: v_cmp_eq_u16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x3a,0xd4,0xff,0xff,0x03,0x00]
-// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+v_cmp_eq_u16_e64 s10, v255.l, v255.l
+// W32: v_cmp_eq_u16_e64 s10, v255.l, v255.l    ; encoding: [0x0a,0x00,0x3a,0xd4,0xff,0xff,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
 v_cmp_eq_u16_e64 s[10:11], s1, s2
 // W64: v_cmp_eq_u16_e64 s[10:11], s1, s2       ; encoding: [0x0a,0x00,0x3a,0xd4,0x01,0x04,0x00,0x00]
@@ -1106,6 +1130,30 @@ v_cmp_eq_u16_e64 ttmp[14:15], src_scc, vcc_lo
 v_cmp_eq_u16_e64 null, 0xfe0b, vcc_hi
 // GFX12: v_cmp_eq_u16_e64 null, 0xfe0b, vcc_hi   ; encoding: [0x7c,0x00,0x3a,0xd4,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00]
 
+v_cmp_eq_u16_e64 s5, v1.h, v2.l
+// W32: v_cmp_eq_u16_e64 s5, v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x05,0x08,0x3a,0xd4,0x01,0x05,0x02,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_eq_u16_e64 s5, v255.l, v255.h
+// W32: v_cmp_eq_u16_e64 s5, v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x05,0x10,0x3a,0xd4,0xff,0xff,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_eq_u16_e64 s[10:11], v1.h, v2.l
+// W64: v_cmp_eq_u16_e64 s[10:11], v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x0a,0x08,0x3a,0xd4,0x01,0x05,0x02,0x00]
+// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_eq_u16_e64 s[10:11], v255.l, v255.h
+// W64: v_cmp_eq_u16_e64 s[10:11], v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x0a,0x10,0x3a,0xd4,0xff,0xff,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_eq_u16_e64 vcc_lo, 0x3800, m0
+// W32: v_cmp_eq_u16_e64 vcc_lo, 0x3800, m0     ; encoding: [0x6a,0x00,0x3a,0xd4,0xff,0xfa,0x00,0x00,0x00,0x38,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_eq_u16_e64 vcc, 0x3800, m0
+// W64: v_cmp_eq_u16_e64 vcc, 0x3800, m0        ; encoding: [0x6a,0x00,0x3a,0xd4,0xff,0xfa,0x00,0x00,0x00,0x38,0x00,0x00]
+// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
 v_cmp_eq_u32_e64 s5, v1, v2
 // W32: v_cmp_eq_u32_e64 s5, v1, v2             ; encoding: [0x05,0x00,0x4a,0xd4,0x01,0x05,0x02,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
@@ -1633,12 +1681,12 @@ v_cmp_ge_f64_e64 ttmp[14:15], -|src_scc|, -|exec|
 v_cmp_ge_f64_e64 null, 0xaf123456, -|vcc| clamp
 // GFX12: v_cmp_ge_f64_e64 null, 0xaf123456, -|vcc| clamp ; encoding: [0x7c,0x82,0x26,0xd4,0xff,0xd4,0x00,0x40,0x56,0x34,0x12,0xaf]
 
-v_cmp_ge_i16_e64 s5, v1, v2
-// W32: v_cmp_ge_i16_e64 s5, v1, v2             ; encoding: [0x05,0x00,0x36,0xd4,0x01,0x05,0x02,0x00]
+v_cmp_ge_i16_e64 s5, v1.l, v2.l
+// W32: v_cmp_ge_i16_e64 s5, v1.l, v2.l         ; encoding: [0x05,0x00,0x36,0xd4,0x01,0x05,0x02,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
-v_cmp_ge_i16_e64 s5, v255, v255
-// W32: v_cmp_ge_i16_e64 s5, v255, v255         ; encoding: [0x05,0x00,0x36,0xd4,0xff,0xff,0x03,0x00]
+v_cmp_ge_i16_e64 s5, v255.l, v255.l
+// W32: v_cmp_ge_i16_e64 s5, v255.l, v255.l     ; encoding: [0x05,0x00,0x36,0xd4,0xff,0xff,0x03,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
 v_cmp_ge_i16_e64 s5, s1, s2
@@ -1689,13 +1737,13 @@ v_cmp_ge_i16_e64 ttmp15, src_scc, vcc_lo
 // W32: v_cmp_ge_i16_e64 ttmp15, src_scc, vcc_lo ; encoding: [0x7b,0x00,0x36,0xd4,0xfd,0xd4,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
-v_cmp_ge_i16_e64 s[10:11], v1, v2
-// W64: v_cmp_ge_i16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x36,0xd4,0x01,0x05,0x02,0x00]
-// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+v_cmp_ge_i16_e64 s10, v1.l, v2.l
+// W32: v_cmp_ge_i16_e64 s10, v1.l, v2.l        ; encoding: [0x0a,0x00,0x36,0xd4,0x01,0x05,0x02,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
-v_cmp_ge_i16_e64 s[10:11], v255, v255
-// W64: v_cmp_ge_i16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x36,0xd4,0xff,0xff,0x03,0x00]
-// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+v_cmp_ge_i16_e64 s10, v255.l, v255.l
+// W32: v_cmp_ge_i16_e64 s10, v255.l, v255.l    ; encoding: [0x0a,0x00,0x36,0xd4,0xff,0xff,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
 v_cmp_ge_i16_e64 s[10:11], s1, s2
 // W64: v_cmp_ge_i16_e64 s[10:11], s1, s2       ; encoding: [0x0a,0x00,0x36,0xd4,0x01,0x04,0x00,0x00]
@@ -1748,6 +1796,30 @@ v_cmp_ge_i16_e64 ttmp[14:15], src_scc, vcc_lo
 v_cmp_ge_i16_e64 null, 0xfe0b, vcc_hi
 // GFX12: v_cmp_ge_i16_e64 null, 0xfe0b, vcc_hi   ; encoding: [0x7c,0x00,0x36,0xd4,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00]
 
+v_cmp_ge_i16_e64 s5, v1.h, v2.l
+// W32: v_cmp_ge_i16_e64 s5, v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x05,0x08,0x36,0xd4,0x01,0x05,0x02,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_ge_i16_e64 s5, v255.l, v255.h
+// W32: v_cmp_ge_i16_e64 s5, v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x05,0x10,0x36,0xd4,0xff,0xff,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_ge_i16_e64 s[10:11], v1.h, v2.l
+// W64: v_cmp_ge_i16_e64 s[10:11], v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x0a,0x08,0x36,0xd4,0x01,0x05,0x02,0x00]
+// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_ge_i16_e64 s[10:11], v255.l, v255.h
+// W64: v_cmp_ge_i16_e64 s[10:11], v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x0a,0x10,0x36,0xd4,0xff,0xff,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_ge_i16_e64 vcc_lo, 0x3800, m0
+// W32: v_cmp_ge_i16_e64 vcc_lo, 0x3800, m0     ; encoding: [0x6a,0x00,0x36,0xd4,0xff,0xfa,0x00,0x00,0x00,0x38,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_ge_i16_e64 vcc, 0x3800, m0
+// W64: v_cmp_ge_i16_e64 vcc, 0x3800, m0        ; encoding: [0x6a,0x00,0x36,0xd4,0xff,0xfa,0x00,0x00,0x00,0x38,0x00,0x00]
+// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
 v_cmp_ge_i32_e64 s5, v1, v2
 // W32: v_cmp_ge_i32_e64 s5, v1, v2             ; encoding: [0x05,0x00,0x46,0xd4,0x01,0x05,0x02,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
@@ -1954,12 +2026,12 @@ v_cmp_ge_i64_e64 ttmp[14:15], src_scc, exec
 v_cmp_ge_i64_e64 null, 0xaf123456, vcc
 // GFX12: v_cmp_ge_i64_e64 null, 0xaf123456, vcc  ; encoding: [0x7c,0x00,0x56,0xd4,0xff,0xd4,0x00,0x00,0x56,0x34,0x12,0xaf]
 
-v_cmp_ge_u16_e64 s5, v1, v2
-// W32: v_cmp_ge_u16_e64 s5, v1, v2             ; encoding: [0x05,0x00,0x3e,0xd4,0x01,0x05,0x02,0x00]
+v_cmp_ge_u16_e64 s5, v1.l, v2.l
+// W32: v_cmp_ge_u16_e64 s5, v1.l, v2.l         ; encoding: [0x05,0x00,0x3e,0xd4,0x01,0x05,0x02,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
-v_cmp_ge_u16_e64 s5, v255, v255
-// W32: v_cmp_ge_u16_e64 s5, v255, v255         ; encoding: [0x05,0x00,0x3e,0xd4,0xff,0xff,0x03,0x00]
+v_cmp_ge_u16_e64 s5, v255.l, v255.l
+// W32: v_cmp_ge_u16_e64 s5, v255.l, v255.l     ; encoding: [0x05,0x00,0x3e,0xd4,0xff,0xff,0x03,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
 v_cmp_ge_u16_e64 s5, s1, s2
@@ -2010,13 +2082,13 @@ v_cmp_ge_u16_e64 ttmp15, src_scc, vcc_lo
 // W32: v_cmp_ge_u16_e64 ttmp15, src_scc, vcc_lo ; encoding: [0x7b,0x00,0x3e,0xd4,0xfd,0xd4,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
-v_cmp_ge_u16_e64 s[10:11], v1, v2
-// W64: v_cmp_ge_u16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x3e,0xd4,0x01,0x05,0x02,0x00]
-// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+v_cmp_ge_u16_e64 s10, v1.l, v2.l
+// W32: v_cmp_ge_u16_e64 s10, v1.l, v2.l        ; encoding: [0x0a,0x00,0x3e,0xd4,0x01,0x05,0x02,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
-v_cmp_ge_u16_e64 s[10:11], v255, v255
-// W64: v_cmp_ge_u16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x3e,0xd4,0xff,0xff,0x03,0x00]
-// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+v_cmp_ge_u16_e64 s10, v255.l, v255.l
+// W32: v_cmp_ge_u16_e64 s10, v255.l, v255.l    ; encoding: [0x0a,0x00,0x3e,0xd4,0xff,0xff,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
 v_cmp_ge_u16_e64 s[10:11], s1, s2
 // W64: v_cmp_ge_u16_e64 s[10:11], s1, s2       ; encoding: [0x0a,0x00,0x3e,0xd4,0x01,0x04,0x00,0x00]
@@ -2069,6 +2141,30 @@ v_cmp_ge_u16_e64 ttmp[14:15], src_scc, vcc_lo
 v_cmp_ge_u16_e64 null, 0xfe0b, vcc_hi
 // GFX12: v_cmp_ge_u16_e64 null, 0xfe0b, vcc_hi   ; encoding: [0x7c,0x00,0x3e,0xd4,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00]
 
+v_cmp_ge_u16_e64 s5, v1.h, v2.l
+// W32: v_cmp_ge_u16_e64 s5, v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x05,0x08,0x3e,0xd4,0x01,0x05,0x02,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_ge_u16_e64 s5, v255.l, v255.h
+// W32: v_cmp_ge_u16_e64 s5, v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x05,0x10,0x3e,0xd4,0xff,0xff,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_ge_u16_e64 s[10:11], v1.h, v2.l
+// W64: v_cmp_ge_u16_e64 s[10:11], v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x0a,0x08,0x3e,0xd4,0x01,0x05,0x02,0x00]
+// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_ge_u16_e64 s[10:11], v255.l, v255.h
+// W64: v_cmp_ge_u16_e64 s[10:11], v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x0a,0x10,0x3e,0xd4,0xff,0xff,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_ge_u16_e64 vcc_lo, 0x3800, m0
+// W32: v_cmp_ge_u16_e64 vcc_lo, 0x3800, m0     ; encoding: [0x6a,0x00,0x3e,0xd4,0xff,0xfa,0x00,0x00,0x00,0x38,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_ge_u16_e64 vcc, 0x3800, m0
+// W64: v_cmp_ge_u16_e64 vcc, 0x3800, m0        ; encoding: [0x6a,0x00,0x3e,0xd4,0xff,0xfa,0x00,0x00,0x00,0x38,0x00,0x00]
+// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
 v_cmp_ge_u32_e64 s5, v1, v2
 // W32: v_cmp_ge_u32_e64 s5, v1, v2             ; encoding: [0x05,0x00,0x4e,0xd4,0x01,0x05,0x02,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
@@ -2596,12 +2692,12 @@ v_cmp_gt_f64_e64 ttmp[14:15], -|src_scc|, -|exec|
 v_cmp_gt_f64_e64 null, 0xaf123456, -|vcc| clamp
 // GFX12: v_cmp_gt_f64_e64 null, 0xaf123456, -|vcc| clamp ; encoding: [0x7c,0x82,0x24,0xd4,0xff,0xd4,0x00,0x40,0x56,0x34,0x12,0xaf]
 
-v_cmp_gt_i16_e64 s5, v1, v2
-// W32: v_cmp_gt_i16_e64 s5, v1, v2             ; encoding: [0x05,0x00,0x34,0xd4,0x01,0x05,0x02,0x00]
+v_cmp_gt_i16_e64 s5, v1.l, v2.l
+// W32: v_cmp_gt_i16_e64 s5, v1.l, v2.l         ; encoding: [0x05,0x00,0x34,0xd4,0x01,0x05,0x02,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
-v_cmp_gt_i16_e64 s5, v255, v255
-// W32: v_cmp_gt_i16_e64 s5, v255, v255         ; encoding: [0x05,0x00,0x34,0xd4,0xff,0xff,0x03,0x00]
+v_cmp_gt_i16_e64 s5, v255.l, v255.l
+// W32: v_cmp_gt_i16_e64 s5, v255.l, v255.l     ; encoding: [0x05,0x00,0x34,0xd4,0xff,0xff,0x03,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
 v_cmp_gt_i16_e64 s5, s1, s2
@@ -2652,13 +2748,13 @@ v_cmp_gt_i16_e64 ttmp15, src_scc, vcc_lo
 // W32: v_cmp_gt_i16_e64 ttmp15, src_scc, vcc_lo ; encoding: [0x7b,0x00,0x34,0xd4,0xfd,0xd4,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
-v_cmp_gt_i16_e64 s[10:11], v1, v2
-// W64: v_cmp_gt_i16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x34,0xd4,0x01,0x05,0x02,0x00]
-// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+v_cmp_gt_i16_e64 s10, v1.l, v2.l
+// W32: v_cmp_gt_i16_e64 s10, v1.l, v2.l        ; encoding: [0x0a,0x00,0x34,0xd4,0x01,0x05,0x02,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
-v_cmp_gt_i16_e64 s[10:11], v255, v255
-// W64: v_cmp_gt_i16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x34,0xd4,0xff,0xff,0x03,0x00]
-// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+v_cmp_gt_i16_e64 s10, v255.l, v255.l
+// W32: v_cmp_gt_i16_e64 s10, v255.l, v255.l    ; encoding: [0x0a,0x00,0x34,0xd4,0xff,0xff,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
 v_cmp_gt_i16_e64 s[10:11], s1, s2
 // W64: v_cmp_gt_i16_e64 s[10:11], s1, s2       ; encoding: [0x0a,0x00,0x34,0xd4,0x01,0x04,0x00,0x00]
@@ -2711,6 +2807,30 @@ v_cmp_gt_i16_e64 ttmp[14:15], src_scc, vcc_lo
 v_cmp_gt_i16_e64 null, 0xfe0b, vcc_hi
 // GFX12: v_cmp_gt_i16_e64 null, 0xfe0b, vcc_hi   ; encoding: [0x7c,0x00,0x34,0xd4,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00]
 
+v_cmp_gt_i16_e64 s5, v1.h, v2.l
+// W32: v_cmp_gt_i16_e64 s5, v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x05,0x08,0x34,0xd4,0x01,0x05,0x02,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_gt_i16_e64 s5, v255.l, v255.h
+// W32: v_cmp_gt_i16_e64 s5, v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x05,0x10,0x34,0xd4,0xff,0xff,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_gt_i16_e64 s[10:11], v1.h, v2.l
+// W64: v_cmp_gt_i16_e64 s[10:11], v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x0a,0x08,0x34,0xd4,0x01,0x05,0x02,0x00]
+// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_gt_i16_e64 s[10:11], v255.l, v255.h
+// W64: v_cmp_gt_i16_e64 s[10:11], v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x0a,0x10,0x34,0xd4,0xff,0xff,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_gt_i16_e64 vcc_lo, 0x3800, m0
+// W32: v_cmp_gt_i16_e64 vcc_lo, 0x3800, m0     ; encoding: [0x6a,0x00,0x34,0xd4,0xff,0xfa,0x00,0x00,0x00,0x38,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_gt_i16_e64 vcc, 0x3800, m0
+// W64: v_cmp_gt_i16_e64 vcc, 0x3800, m0        ; encoding: [0x6a,0x00,0x34,0xd4,0xff,0xfa,0x00,0x00,0x00,0x38,0x00,0x00]
+// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
 v_cmp_gt_i32_e64 s5, v1, v2
 // W32: v_cmp_gt_i32_e64 s5, v1, v2             ; encoding: [0x05,0x00,0x44,0xd4,0x01,0x05,0x02,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
@@ -2917,12 +3037,12 @@ v_cmp_gt_i64_e64 ttmp[14:15], src_scc, exec
 v_cmp_gt_i64_e64 null, 0xaf123456, vcc
 // GFX12: v_cmp_gt_i64_e64 null, 0xaf123456, vcc  ; encoding: [0x7c,0x00,0x54,0xd4,0xff,0xd4,0x00,0x00,0x56,0x34,0x12,0xaf]
 
-v_cmp_gt_u16_e64 s5, v1, v2
-// W32: v_cmp_gt_u16_e64 s5, v1, v2             ; encoding: [0x05,0x00,0x3c,0xd4,0x01,0x05,0x02,0x00]
+v_cmp_gt_u16_e64 s5, v1.l, v2.l
+// W32: v_cmp_gt_u16_e64 s5, v1.l, v2.l         ; encoding: [0x05,0x00,0x3c,0xd4,0x01,0x05,0x02,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
-v_cmp_gt_u16_e64 s5, v255, v255
-// W32: v_cmp_gt_u16_e64 s5, v255, v255         ; encoding: [0x05,0x00,0x3c,0xd4,0xff,0xff,0x03,0x00]
+v_cmp_gt_u16_e64 s5, v255.l, v255.l
+// W32: v_cmp_gt_u16_e64 s5, v255.l, v255.l     ; encoding: [0x05,0x00,0x3c,0xd4,0xff,0xff,0x03,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
 v_cmp_gt_u16_e64 s5, s1, s2
@@ -2973,13 +3093,13 @@ v_cmp_gt_u16_e64 ttmp15, src_scc, vcc_lo
 // W32: v_cmp_gt_u16_e64 ttmp15, src_scc, vcc_lo ; encoding: [0x7b,0x00,0x3c,0xd4,0xfd,0xd4,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
-v_cmp_gt_u16_e64 s[10:11], v1, v2
-// W64: v_cmp_gt_u16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x3c,0xd4,0x01,0x05,0x02,0x00]
-// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+v_cmp_gt_u16_e64 s10, v1.l, v2.l
+// W32: v_cmp_gt_u16_e64 s10, v1.l, v2.l        ; encoding: [0x0a,0x00,0x3c,0xd4,0x01,0x05,0x02,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
-v_cmp_gt_u16_e64 s[10:11], v255, v255
-// W64: v_cmp_gt_u16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x3c,0xd4,0xff,0xff,0x03,0x00]
-// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+v_cmp_gt_u16_e64 s10, v255.l, v255.l
+// W32: v_cmp_gt_u16_e64 s10, v255.l, v255.l    ; encoding: [0x0a,0x00,0x3c,0xd4,0xff,0xff,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
 v_cmp_gt_u16_e64 s[10:11], s1, s2
 // W64: v_cmp_gt_u16_e64 s[10:11], s1, s2       ; encoding: [0x0a,0x00,0x3c,0xd4,0x01,0x04,0x00,0x00]
@@ -3032,6 +3152,30 @@ v_cmp_gt_u16_e64 ttmp[14:15], src_scc, vcc_lo
 v_cmp_gt_u16_e64 null, 0xfe0b, vcc_hi
 // GFX12: v_cmp_gt_u16_e64 null, 0xfe0b, vcc_hi   ; encoding: [0x7c,0x00,0x3c,0xd4,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00]
 
+v_cmp_gt_u16_e64 s5, v1.h, v2.l
+// W32: v_cmp_gt_u16_e64 s5, v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x05,0x08,0x3c,0xd4,0x01,0x05,0x02,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_gt_u16_e64 s5, v255.l, v255.h
+// W32: v_cmp_gt_u16_e64 s5, v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x05,0x10,0x3c,0xd4,0xff,0xff,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_gt_u16_e64 s[10:11], v1.h, v2.l
+// W64: v_cmp_gt_u16_e64 s[10:11], v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x0a,0x08,0x3c,0xd4,0x01,0x05,0x02,0x00]
+// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_gt_u16_e64 s[10:11], v255.l, v255.h
+// W64: v_cmp_gt_u16_e64 s[10:11], v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x0a,0x10,0x3c,0xd4,0xff,0xff,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_gt_u16_e64 vcc_lo, 0x3800, m0
+// W32: v_cmp_gt_u16_e64 vcc_lo, 0x3800, m0     ; encoding: [0x6a,0x00,0x3c,0xd4,0xff,0xfa,0x00,0x00,0x00,0x38,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_gt_u16_e64 vcc, 0x3800, m0
+// W64: v_cmp_gt_u16_e64 vcc, 0x3800, m0        ; encoding: [0x6a,0x00,0x3c,0xd4,0xff,0xfa,0x00,0x00,0x00,0x38,0x00,0x00]
+// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
 v_cmp_gt_u32_e64 s5, v1, v2
 // W32: v_cmp_gt_u32_e64 s5, v1, v2             ; encoding: [0x05,0x00,0x4c,0xd4,0x01,0x05,0x02,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
@@ -3559,12 +3703,12 @@ v_cmp_le_f64_e64 ttmp[14:15], -|src_scc|, -|exec|
 v_cmp_le_f64_e64 null, 0xaf123456, -|vcc| clamp
 // GFX12: v_cmp_le_f64_e64 null, 0xaf123456, -|vcc| clamp ; encoding: [0x7c,0x82,0x23,0xd4,0xff,0xd4,0x00,0x40,0x56,0x34,0x12,0xaf]
 
-v_cmp_le_i16_e64 s5, v1, v2
-// W32: v_cmp_le_i16_e64 s5, v1, v2             ; encoding: [0x05,0x00,0x33,0xd4,0x01,0x05,0x02,0x00]
+v_cmp_le_i16_e64 s5, v1.l, v2.l
+// W32: v_cmp_le_i16_e64 s5, v1.l, v2.l         ; encoding: [0x05,0x00,0x33,0xd4,0x01,0x05,0x02,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
-v_cmp_le_i16_e64 s5, v255, v255
-// W32: v_cmp_le_i16_e64 s5, v255, v255         ; encoding: [0x05,0x00,0x33,0xd4,0xff,0xff,0x03,0x00]
+v_cmp_le_i16_e64 s5, v255.l, v255.l
+// W32: v_cmp_le_i16_e64 s5, v255.l, v255.l     ; encoding: [0x05,0x00,0x33,0xd4,0xff,0xff,0x03,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
 v_cmp_le_i16_e64 s5, s1, s2
@@ -3615,13 +3759,13 @@ v_cmp_le_i16_e64 ttmp15, src_scc, vcc_lo
 // W32: v_cmp_le_i16_e64 ttmp15, src_scc, vcc_lo ; encoding: [0x7b,0x00,0x33,0xd4,0xfd,0xd4,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
-v_cmp_le_i16_e64 s[10:11], v1, v2
-// W64: v_cmp_le_i16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x33,0xd4,0x01,0x05,0x02,0x00]
-// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+v_cmp_le_i16_e64 s10, v1.l, v2.l
+// W32: v_cmp_le_i16_e64 s10, v1.l, v2.l        ; encoding: [0x0a,0x00,0x33,0xd4,0x01,0x05,0x02,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
-v_cmp_le_i16_e64 s[10:11], v255, v255
-// W64: v_cmp_le_i16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x33,0xd4,0xff,0xff,0x03,0x00]
-// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+v_cmp_le_i16_e64 s10, v255.l, v255.l
+// W32: v_cmp_le_i16_e64 s10, v255.l, v255.l    ; encoding: [0x0a,0x00,0x33,0xd4,0xff,0xff,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
 v_cmp_le_i16_e64 s[10:11], s1, s2
 // W64: v_cmp_le_i16_e64 s[10:11], s1, s2       ; encoding: [0x0a,0x00,0x33,0xd4,0x01,0x04,0x00,0x00]
@@ -3674,6 +3818,30 @@ v_cmp_le_i16_e64 ttmp[14:15], src_scc, vcc_lo
 v_cmp_le_i16_e64 null, 0xfe0b, vcc_hi
 // GFX12: v_cmp_le_i16_e64 null, 0xfe0b, vcc_hi   ; encoding: [0x7c,0x00,0x33,0xd4,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00]
 
+v_cmp_le_i16_e64 s5, v1.h, v2.l
+// W32: v_cmp_le_i16_e64 s5, v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x05,0x08,0x33,0xd4,0x01,0x05,0x02,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_le_i16_e64 s5, v255.l, v255.h
+// W32: v_cmp_le_i16_e64 s5, v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x05,0x10,0x33,0xd4,0xff,0xff,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_le_i16_e64 s[10:11], v1.h, v2.l
+// W64: v_cmp_le_i16_e64 s[10:11], v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x0a,0x08,0x33,0xd4,0x01,0x05,0x02,0x00]
+// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_le_i16_e64 s[10:11], v255.l, v255.h
+// W64: v_cmp_le_i16_e64 s[10:11], v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x0a,0x10,0x33,0xd4,0xff,0xff,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_le_i16_e64 vcc_lo, 0x3800, m0
+// W32: v_cmp_le_i16_e64 vcc_lo, 0x3800, m0     ; encoding: [0x6a,0x00,0x33,0xd4,0xff,0xfa,0x00,0x00,0x00,0x38,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_le_i16_e64 vcc, 0x3800, m0
+// W64: v_cmp_le_i16_e64 vcc, 0x3800, m0        ; encoding: [0x6a,0x00,0x33,0xd4,0xff,0xfa,0x00,0x00,0x00,0x38,0x00,0x00]
+// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
 v_cmp_le_i32_e64 s5, v1, v2
 // W32: v_cmp_le_i32_e64 s5, v1, v2             ; encoding: [0x05,0x00,0x43,0xd4,0x01,0x05,0x02,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
@@ -3880,12 +4048,12 @@ v_cmp_le_i64_e64 ttmp[14:15], src_scc, exec
 v_cmp_le_i64_e64 null, 0xaf123456, vcc
 // GFX12: v_cmp_le_i64_e64 null, 0xaf123456, vcc  ; encoding: [0x7c,0x00,0x53,0xd4,0xff,0xd4,0x00,0x00,0x56,0x34,0x12,0xaf]
 
-v_cmp_le_u16_e64 s5, v1, v2
-// W32: v_cmp_le_u16_e64 s5, v1, v2             ; encoding: [0x05,0x00,0x3b,0xd4,0x01,0x05,0x02,0x00]
+v_cmp_le_u16_e64 s5, v1.l, v2.l
+// W32: v_cmp_le_u16_e64 s5, v1.l, v2.l         ; encoding: [0x05,0x00,0x3b,0xd4,0x01,0x05,0x02,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
-v_cmp_le_u16_e64 s5, v255, v255
-// W32: v_cmp_le_u16_e64 s5, v255, v255         ; encoding: [0x05,0x00,0x3b,0xd4,0xff,0xff,0x03,0x00]
+v_cmp_le_u16_e64 s5, v255.l, v255.l
+// W32: v_cmp_le_u16_e64 s5, v255.l, v255.l     ; encoding: [0x05,0x00,0x3b,0xd4,0xff,0xff,0x03,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
 v_cmp_le_u16_e64 s5, s1, s2
@@ -3936,13 +4104,13 @@ v_cmp_le_u16_e64 ttmp15, src_scc, vcc_lo
 // W32: v_cmp_le_u16_e64 ttmp15, src_scc, vcc_lo ; encoding: [0x7b,0x00,0x3b,0xd4,0xfd,0xd4,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
-v_cmp_le_u16_e64 s[10:11], v1, v2
-// W64: v_cmp_le_u16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x3b,0xd4,0x01,0x05,0x02,0x00]
-// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+v_cmp_le_u16_e64 s10, v1.l, v2.l
+// W32: v_cmp_le_u16_e64 s10, v1.l, v2.l        ; encoding: [0x0a,0x00,0x3b,0xd4,0x01,0x05,0x02,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
-v_cmp_le_u16_e64 s[10:11], v255, v255
-// W64: v_cmp_le_u16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x3b,0xd4,0xff,0xff,0x03,0x00]
-// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+v_cmp_le_u16_e64 s10, v255.l, v255.l
+// W32: v_cmp_le_u16_e64 s10, v255.l, v255.l    ; encoding: [0x0a,0x00,0x3b,0xd4,0xff,0xff,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
 v_cmp_le_u16_e64 s[10:11], s1, s2
 // W64: v_cmp_le_u16_e64 s[10:11], s1, s2       ; encoding: [0x0a,0x00,0x3b,0xd4,0x01,0x04,0x00,0x00]
@@ -3995,6 +4163,30 @@ v_cmp_le_u16_e64 ttmp[14:15], src_scc, vcc_lo
 v_cmp_le_u16_e64 null, 0xfe0b, vcc_hi
 // GFX12: v_cmp_le_u16_e64 null, 0xfe0b, vcc_hi   ; encoding: [0x7c,0x00,0x3b,0xd4,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00]
 
+v_cmp_le_u16_e64 s5, v1.h, v2.l
+// W32: v_cmp_le_u16_e64 s5, v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x05,0x08,0x3b,0xd4,0x01,0x05,0x02,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_le_u16_e64 s5, v255.l, v255.h
+// W32: v_cmp_le_u16_e64 s5, v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x05,0x10,0x3b,0xd4,0xff,0xff,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_le_u16_e64 s[10:11], v1.h, v2.l
+// W64: v_cmp_le_u16_e64 s[10:11], v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x0a,0x08,0x3b,0xd4,0x01,0x05,0x02,0x00]
+// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_le_u16_e64 s[10:11], v255.l, v255.h
+// W64: v_cmp_le_u16_e64 s[10:11], v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x0a,0x10,0x3b,0xd4,0xff,0xff,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_le_u16_e64 vcc_lo, 0x3800, m0
+// W32: v_cmp_le_u16_e64 vcc_lo, 0x3800, m0     ; encoding: [0x6a,0x00,0x3b,0xd4,0xff,0xfa,0x00,0x00,0x00,0x38,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_le_u16_e64 vcc, 0x3800, m0
+// W64: v_cmp_le_u16_e64 vcc, 0x3800, m0        ; encoding: [0x6a,0x00,0x3b,0xd4,0xff,0xfa,0x00,0x00,0x00,0x38,0x00,0x00]
+// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
 v_cmp_le_u32_e64 s5, v1, v2
 // W32: v_cmp_le_u32_e64 s5, v1, v2             ; encoding: [0x05,0x00,0x4b,0xd4,0x01,0x05,0x02,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
@@ -4863,12 +5055,12 @@ v_cmp_lt_f64_e64 ttmp[14:15], -|src_scc|, -|exec|
 v_cmp_lt_f64_e64 null, 0xaf123456, -|vcc| clamp
 // GFX12: v_cmp_lt_f64_e64 null, 0xaf123456, -|vcc| clamp ; encoding: [0x7c,0x82,0x21,0xd4,0xff,0xd4,0x00,0x40,0x56,0x34,0x12,0xaf]
 
-v_cmp_lt_i16_e64 s5, v1, v2
-// W32: v_cmp_lt_i16_e64 s5, v1, v2             ; encoding: [0x05,0x00,0x31,0xd4,0x01,0x05,0x02,0x00]
+v_cmp_lt_i16_e64 s5, v1.l, v2.l
+// W32: v_cmp_lt_i16_e64 s5, v1.l, v2.l         ; encoding: [0x05,0x00,0x31,0xd4,0x01,0x05,0x02,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
-v_cmp_lt_i16_e64 s5, v255, v255
-// W32: v_cmp_lt_i16_e64 s5, v255, v255         ; encoding: [0x05,0x00,0x31,0xd4,0xff,0xff,0x03,0x00]
+v_cmp_lt_i16_e64 s5, v255.l, v255.l
+// W32: v_cmp_lt_i16_e64 s5, v255.l, v255.l     ; encoding: [0x05,0x00,0x31,0xd4,0xff,0xff,0x03,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
 v_cmp_lt_i16_e64 s5, s1, s2
@@ -4919,13 +5111,13 @@ v_cmp_lt_i16_e64 ttmp15, src_scc, vcc_lo
 // W32: v_cmp_lt_i16_e64 ttmp15, src_scc, vcc_lo ; encoding: [0x7b,0x00,0x31,0xd4,0xfd,0xd4,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
-v_cmp_lt_i16_e64 s[10:11], v1, v2
-// W64: v_cmp_lt_i16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x31,0xd4,0x01,0x05,0x02,0x00]
-// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+v_cmp_lt_i16_e64 s10, v1.l, v2.l
+// W32: v_cmp_lt_i16_e64 s10, v1.l, v2.l        ; encoding: [0x0a,0x00,0x31,0xd4,0x01,0x05,0x02,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
-v_cmp_lt_i16_e64 s[10:11], v255, v255
-// W64: v_cmp_lt_i16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x31,0xd4,0xff,0xff,0x03,0x00]
-// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+v_cmp_lt_i16_e64 s10, v255.l, v255.l
+// W32: v_cmp_lt_i16_e64 s10, v255.l, v255.l    ; encoding: [0x0a,0x00,0x31,0xd4,0xff,0xff,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
 v_cmp_lt_i16_e64 s[10:11], s1, s2
 // W64: v_cmp_lt_i16_e64 s[10:11], s1, s2       ; encoding: [0x0a,0x00,0x31,0xd4,0x01,0x04,0x00,0x00]
@@ -4978,6 +5170,30 @@ v_cmp_lt_i16_e64 ttmp[14:15], src_scc, vcc_lo
 v_cmp_lt_i16_e64 null, 0xfe0b, vcc_hi
 // GFX12: v_cmp_lt_i16_e64 null, 0xfe0b, vcc_hi   ; encoding: [0x7c,0x00,0x31,0xd4,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00]
 
+v_cmp_lt_i16_e64 s5, v1.h, v2.l
+// W32: v_cmp_lt_i16_e64 s5, v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x05,0x08,0x31,0xd4,0x01,0x05,0x02,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_lt_i16_e64 s5, v255.l, v255.h
+// W32: v_cmp_lt_i16_e64 s5, v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x05,0x10,0x31,0xd4,0xff,0xff,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_lt_i16_e64 s[10:11], v1.h, v2.l
+// W64: v_cmp_lt_i16_e64 s[10:11], v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x0a,0x08,0x31,0xd4,0x01,0x05,0x02,0x00]
+// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_lt_i16_e64 s[10:11], v255.l, v255.h
+// W64: v_cmp_lt_i16_e64 s[10:11], v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x0a,0x10,0x31,0xd4,0xff,0xff,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_lt_i16_e64 vcc_lo, 0x3800, m0
+// W32: v_cmp_lt_i16_e64 vcc_lo, 0x3800, m0     ; encoding: [0x6a,0x00,0x31,0xd4,0xff,0xfa,0x00,0x00,0x00,0x38,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_lt_i16_e64 vcc, 0x3800, m0
+// W64: v_cmp_lt_i16_e64 vcc, 0x3800, m0        ; encoding: [0x6a,0x00,0x31,0xd4,0xff,0xfa,0x00,0x00,0x00,0x38,0x00,0x00]
+// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
 v_cmp_lt_i32_e64 s5, v1, v2
 // W32: v_cmp_lt_i32_e64 s5, v1, v2             ; encoding: [0x05,0x00,0x41,0xd4,0x01,0x05,0x02,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
@@ -5184,12 +5400,12 @@ v_cmp_lt_i64_e64 ttmp[14:15], src_scc, exec
 v_cmp_lt_i64_e64 null, 0xaf123456, vcc
 // GFX12: v_cmp_lt_i64_e64 null, 0xaf123456, vcc  ; encoding: [0x7c,0x00,0x51,0xd4,0xff,0xd4,0x00,0x00,0x56,0x34,0x12,0xaf]
 
-v_cmp_lt_u16_e64 s5, v1, v2
-// W32: v_cmp_lt_u16_e64 s5, v1, v2             ; encoding: [0x05,0x00,0x39,0xd4,0x01,0x05,0x02,0x00]
+v_cmp_lt_u16_e64 s5, v1.l, v2.l
+// W32: v_cmp_lt_u16_e64 s5, v1.l, v2.l         ; encoding: [0x05,0x00,0x39,0xd4,0x01,0x05,0x02,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
-v_cmp_lt_u16_e64 s5, v255, v255
-// W32: v_cmp_lt_u16_e64 s5, v255, v255         ; encoding: [0x05,0x00,0x39,0xd4,0xff,0xff,0x03,0x00]
+v_cmp_lt_u16_e64 s5, v255.l, v255.l
+// W32: v_cmp_lt_u16_e64 s5, v255.l, v255.l     ; encoding: [0x05,0x00,0x39,0xd4,0xff,0xff,0x03,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
 v_cmp_lt_u16_e64 s5, s1, s2
@@ -5240,13 +5456,13 @@ v_cmp_lt_u16_e64 ttmp15, src_scc, vcc_lo
 // W32: v_cmp_lt_u16_e64 ttmp15, src_scc, vcc_lo ; encoding: [0x7b,0x00,0x39,0xd4,0xfd,0xd4,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
-v_cmp_lt_u16_e64 s[10:11], v1, v2
-// W64: v_cmp_lt_u16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x39,0xd4,0x01,0x05,0x02,0x00]
-// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+v_cmp_lt_u16_e64 s10, v1.l, v2.l
+// W32: v_cmp_lt_u16_e64 s10, v1.l, v2.l        ; encoding: [0x0a,0x00,0x39,0xd4,0x01,0x05,0x02,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
-v_cmp_lt_u16_e64 s[10:11], v255, v255
-// W64: v_cmp_lt_u16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x39,0xd4,0xff,0xff,0x03,0x00]
-// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+v_cmp_lt_u16_e64 s10, v255.l, v255.l
+// W32: v_cmp_lt_u16_e64 s10, v255.l, v255.l    ; encoding: [0x0a,0x00,0x39,0xd4,0xff,0xff,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
 v_cmp_lt_u16_e64 s[10:11], s1, s2
 // W64: v_cmp_lt_u16_e64 s[10:11], s1, s2       ; encoding: [0x0a,0x00,0x39,0xd4,0x01,0x04,0x00,0x00]
@@ -5299,6 +5515,30 @@ v_cmp_lt_u16_e64 ttmp[14:15], src_scc, vcc_lo
 v_cmp_lt_u16_e64 null, 0xfe0b, vcc_hi
 // GFX12: v_cmp_lt_u16_e64 null, 0xfe0b, vcc_hi   ; encoding: [0x7c,0x00,0x39,0xd4,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00]
 
+v_cmp_lt_u16_e64 s5, v1.h, v2.l
+// W32: v_cmp_lt_u16_e64 s5, v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x05,0x08,0x39,0xd4,0x01,0x05,0x02,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_lt_u16_e64 s5, v255.l, v255.h
+// W32: v_cmp_lt_u16_e64 s5, v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x05,0x10,0x39,0xd4,0xff,0xff,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_lt_u16_e64 s[10:11], v1.h, v2.l
+// W64: v_cmp_lt_u16_e64 s[10:11], v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x0a,0x08,0x39,0xd4,0x01,0x05,0x02,0x00]
+// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_lt_u16_e64 s[10:11], v255.l, v255.h
+// W64: v_cmp_lt_u16_e64 s[10:11], v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x0a,0x10,0x39,0xd4,0xff,0xff,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_lt_u16_e64 vcc_lo, 0x3800, m0
+// W32: v_cmp_lt_u16_e64 vcc_lo, 0x3800, m0     ; encoding: [0x6a,0x00,0x39,0xd4,0xff,0xfa,0x00,0x00,0x00,0x38,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_lt_u16_e64 vcc, 0x3800, m0
+// W64: v_cmp_lt_u16_e64 vcc, 0x3800, m0        ; encoding: [0x6a,0x00,0x39,0xd4,0xff,0xfa,0x00,0x00,0x00,0x38,0x00,0x00]
+// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
 v_cmp_lt_u32_e64 s5, v1, v2
 // W32: v_cmp_lt_u32_e64 s5, v1, v2             ; encoding: [0x05,0x00,0x49,0xd4,0x01,0x05,0x02,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
@@ -5505,12 +5745,12 @@ v_cmp_lt_u64_e64 ttmp[14:15], src_scc, exec
 v_cmp_lt_u64_e64 null, 0xaf123456, vcc
 // GFX12: v_cmp_lt_u64_e64 null, 0xaf123456, vcc  ; encoding: [0x7c,0x00,0x59,0xd4,0xff,0xd4,0x00,0x00,0x56,0x34,0x12,0xaf]
 
-v_cmp_ne_i16_e64 s5, v1, v2
-// W32: v_cmp_ne_i16_e64 s5, v1, v2             ; encoding: [0x05,0x00,0x35,0xd4,0x01,0x05,0x02,0x00]
+v_cmp_ne_i16_e64 s5, v1.l, v2.l
+// W32: v_cmp_ne_i16_e64 s5, v1.l, v2.l         ; encoding: [0x05,0x00,0x35,0xd4,0x01,0x05,0x02,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
-v_cmp_ne_i16_e64 s5, v255, v255
-// W32: v_cmp_ne_i16_e64 s5, v255, v255         ; encoding: [0x05,0x00,0x35,0xd4,0xff,0xff,0x03,0x00]
+v_cmp_ne_i16_e64 s5, v255.l, v255.l
+// W32: v_cmp_ne_i16_e64 s5, v255.l, v255.l     ; encoding: [0x05,0x00,0x35,0xd4,0xff,0xff,0x03,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
 v_cmp_ne_i16_e64 s5, s1, s2
@@ -5561,13 +5801,13 @@ v_cmp_ne_i16_e64 ttmp15, src_scc, vcc_lo
 // W32: v_cmp_ne_i16_e64 ttmp15, src_scc, vcc_lo ; encoding: [0x7b,0x00,0x35,0xd4,0xfd,0xd4,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
-v_cmp_ne_i16_e64 s[10:11], v1, v2
-// W64: v_cmp_ne_i16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x35,0xd4,0x01,0x05,0x02,0x00]
-// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+v_cmp_ne_i16_e64 s10, v1.l, v2.l
+// W32: v_cmp_ne_i16_e64 s10, v1.l, v2.l        ; encoding: [0x0a,0x00,0x35,0xd4,0x01,0x05,0x02,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
-v_cmp_ne_i16_e64 s[10:11], v255, v255
-// W64: v_cmp_ne_i16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x35,0xd4,0xff,0xff,0x03,0x00]
-// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+v_cmp_ne_i16_e64 s10, v255.l, v255.l
+// W32: v_cmp_ne_i16_e64 s10, v255.l, v255.l    ; encoding: [0x0a,0x00,0x35,0xd4,0xff,0xff,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
 v_cmp_ne_i16_e64 s[10:11], s1, s2
 // W64: v_cmp_ne_i16_e64 s[10:11], s1, s2       ; encoding: [0x0a,0x00,0x35,0xd4,0x01,0x04,0x00,0x00]
@@ -5620,6 +5860,30 @@ v_cmp_ne_i16_e64 ttmp[14:15], src_scc, vcc_lo
 v_cmp_ne_i16_e64 null, 0xfe0b, vcc_hi
 // GFX12: v_cmp_ne_i16_e64 null, 0xfe0b, vcc_hi   ; encoding: [0x7c,0x00,0x35,0xd4,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00]
 
+v_cmp_ne_i16_e64 s5, v1.h, v2.l
+// W32: v_cmp_ne_i16_e64 s5, v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x05,0x08,0x35,0xd4,0x01,0x05,0x02,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_ne_i16_e64 s5, v255.l, v255.h
+// W32: v_cmp_ne_i16_e64 s5, v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x05,0x10,0x35,0xd4,0xff,0xff,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_ne_i16_e64 s[10:11], v1.h, v2.l
+// W64: v_cmp_ne_i16_e64 s[10:11], v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x0a,0x08,0x35,0xd4,0x01,0x05,0x02,0x00]
+// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_ne_i16_e64 s[10:11], v255.l, v255.h
+// W64: v_cmp_ne_i16_e64 s[10:11], v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x0a,0x10,0x35,0xd4,0xff,0xff,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_ne_i16_e64 vcc_lo, 0x3800, m0
+// W32: v_cmp_ne_i16_e64 vcc_lo, 0x3800, m0     ; encoding: [0x6a,0x00,0x35,0xd4,0xff,0xfa,0x00,0x00,0x00,0x38,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_ne_i16_e64 vcc, 0x3800, m0
+// W64: v_cmp_ne_i16_e64 vcc, 0x3800, m0        ; encoding: [0x6a,0x00,0x35,0xd4,0xff,0xfa,0x00,0x00,0x00,0x38,0x00,0x00]
+// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
 v_cmp_ne_i32_e64 s5, v1, v2
 // W32: v_cmp_ne_i32_e64 s5, v1, v2             ; encoding: [0x05,0x00,0x45,0xd4,0x01,0x05,0x02,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
@@ -5826,12 +6090,12 @@ v_cmp_ne_i64_e64 ttmp[14:15], src_scc, exec
 v_cmp_ne_i64_e64 null, 0xaf123456, vcc
 // GFX12: v_cmp_ne_i64_e64 null, 0xaf123456, vcc  ; encoding: [0x7c,0x00,0x55,0xd4,0xff,0xd4,0x00,0x00,0x56,0x34,0x12,0xaf]
 
-v_cmp_ne_u16_e64 s5, v1, v2
-// W32: v_cmp_ne_u16_e64 s5, v1, v2             ; encoding: [0x05,0x00,0x3d,0xd4,0x01,0x05,0x02,0x00]
+v_cmp_ne_u16_e64 s5, v1.l, v2.l
+// W32: v_cmp_ne_u16_e64 s5, v1.l, v2.l         ; encoding: [0x05,0x00,0x3d,0xd4,0x01,0x05,0x02,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
-v_cmp_ne_u16_e64 s5, v255, v255
-// W32: v_cmp_ne_u16_e64 s5, v255, v255         ; encoding: [0x05,0x00,0x3d,0xd4,0xff,0xff,0x03,0x00]
+v_cmp_ne_u16_e64 s5, v255.l, v255.l
+// W32: v_cmp_ne_u16_e64 s5, v255.l, v255.l     ; encoding: [0x05,0x00,0x3d,0xd4,0xff,0xff,0x03,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
 v_cmp_ne_u16_e64 s5, s1, s2
@@ -5882,13 +6146,13 @@ v_cmp_ne_u16_e64 ttmp15, src_scc, vcc_lo
 // W32: v_cmp_ne_u16_e64 ttmp15, src_scc, vcc_lo ; encoding: [0x7b,0x00,0x3d,0xd4,0xfd,0xd4,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
-v_cmp_ne_u16_e64 s[10:11], v1, v2
-// W64: v_cmp_ne_u16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x3d,0xd4,0x01,0x05,0x02,0x00]
-// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+v_cmp_ne_u16_e64 s10, v1.l, v2.l
+// W32: v_cmp_ne_u16_e64 s10, v1.l, v2.l        ; encoding: [0x0a,0x00,0x3d,0xd4,0x01,0x05,0x02,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
-v_cmp_ne_u16_e64 s[10:11], v255, v255
-// W64: v_cmp_ne_u16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x3d,0xd4,0xff,0xff,0x03,0x00]
-// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+v_cmp_ne_u16_e64 s10, v255.l, v255.l
+// W32: v_cmp_ne_u16_e64 s10, v255.l, v255.l    ; encoding: [0x0a,0x00,0x3d,0xd4,0xff,0xff,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
 
 v_cmp_ne_u16_e64 s[10:11], s1, s2
 // W64: v_cmp_ne_u16_e64 s[10:11], s1, s2       ; encoding: [0x0a,0x00,0x3d,0xd4,0x01,0x04,0x00,0x00]
@@ -5941,6 +6205,30 @@ v_cmp_ne_u16_e64 ttmp[14:15], src_scc, vcc_lo
 v_cmp_ne_u16_e64 null, 0xfe0b, vcc_hi
 // GFX12: v_cmp_ne_u16_e64 null, 0xfe0b, vcc_hi   ; encoding: [0x7c,0x00,0x3d,0xd4,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00]
 
+v_cmp_ne_u16_e64 s5, v1.h, v2.l
+// W32: v_cmp_ne_u16_e64 s5, v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x05,0x08,0x3d,0xd4,0x01,0x05,0x02,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_ne_u16_e64 s5, v255.l, v255.h
+// W32: v_cmp_ne_u16_e64 s5, v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x05,0x10,0x3d,0xd4,0xff,0xff,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_ne_u16_e64 s[10:11], v1.h, v2.l
+// W64: v_cmp_ne_u16_e64 s[10:11], v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x0a,0x08,0x3d,0xd4,0x01,0x05,0x02,0x00]
+// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_ne_u16_e64 s[10:11], v255.l, v255.h
+// W64: v_cmp_ne_u16_e64 s[10:11], v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x0a,0x10,0x3d,0xd4,0xff,0xff,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_ne_u16_e64 vcc_lo, 0x3800, m0
+// W32: v_cmp_ne_u16_e64 vcc_lo, 0x3800, m0     ; encoding: [0x6a,0x00,0x3d,0xd4,0xff,0xfa,0x00,0x00,0x00,0x38,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
+v_cmp_ne_u16_e64 vcc, 0x3800, m0
+// W64: v_cmp_ne_u16_e64 vcc, 0x3800, m0        ; encoding: [0x6a,0x00,0x3d,0xd4,0xff,0xfa,0x00,0x00,0x00,0x38,0x00,0x00]
+// W32-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
+
 v_cmp_ne_u32_e64 s5, v1, v2
 // W32: v_cmp_ne_u32_e64 s5, v1, v2             ; encoding: [0x05,0x00,0x4d,0xd4,0x01,0x05,0x02,0x00]
 // W64-ERR: :[[@LINE-2]]:18: error: invalid operand for instruction
diff --git a/llvm/test/MC/AMDGPU/gfx12_asm_vop3c_dpp16.s b/llvm/test/MC/AMDGPU/gfx12_asm_vop3c_dpp16.s
index 8908f18ac29bb1..e697177314abca 100644
--- a/llvm/test/MC/AMDGPU/gfx12_asm_vop3c_dpp16.s
+++ b/llvm/test/MC/AMDGPU/gfx12_asm_vop3c_dpp16.s
@@ -496,128 +496,143 @@ v_cmp_eq_f32_e64_dpp ttmp[14:15], -v1, |v2| row_xmask:0 row_mask:0x1 bank_mask:0
 v_cmp_eq_f32_e64_dpp null, -|v255|, -|v255| clamp row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
 // GFX12: v_cmp_eq_f32_e64_dpp null, -|v255|, -|v255| clamp row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x83,0x12,0xd4,0xfa,0xfe,0x03,0x60,0xff,0x6f,0x05,0x30]
 
-v_cmp_eq_i16_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0]
-// W32: v_cmp_eq_i16_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_eq_i16_e64_dpp s5, v1.l, v2.l quad_perm:[3,2,1,0]
+// W32: v_cmp_eq_i16_e64_dpp s5, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_i16_e64_dpp s5, v1, s2 quad_perm:[3,2,1,0]
-// W32: v_cmp_eq_i16_e64_dpp s5, v1, s2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x32,0xd4,0xfa,0x04,0x00,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_eq_i16_e64_dpp s5, v1.l, s2 quad_perm:[3,2,1,0]
+// W32: v_cmp_eq_i16_e64_dpp s5, v1.l, s2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x32,0xd4,0xfa,0x04,0x00,0x00,0x01,0x1b,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_i16_e64_dpp s5, v1, 10 quad_perm:[3,2,1,0]
-// W32: v_cmp_eq_i16_e64_dpp s5, v1, 10 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x32,0xd4,0xfa,0x14,0x01,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_eq_i16_e64_dpp s5, v1.l, 10 quad_perm:[3,2,1,0]
+// W32: v_cmp_eq_i16_e64_dpp s5, v1.l, 10 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x32,0xd4,0xfa,0x14,0x01,0x00,0x01,0x1b,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_i16_e64_dpp s5, v1, v2 quad_perm:[0,1,2,3]
-// W32: v_cmp_eq_i16_e64_dpp s5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+v_cmp_eq_i16_e64_dpp s5, v1.l, v2.l quad_perm:[0,1,2,3]
+// W32: v_cmp_eq_i16_e64_dpp s5, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_i16_e64_dpp s5, v1, v2 row_mirror
-// W32: v_cmp_eq_i16_e64_dpp s5, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+v_cmp_eq_i16_e64_dpp s5, v1.l, v2.l row_mirror
+// W32: v_cmp_eq_i16_e64_dpp s5, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_i16_e64_dpp s5, v1, v2 row_half_mirror
-// W32: v_cmp_eq_i16_e64_dpp s5, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+v_cmp_eq_i16_e64_dpp s5, v1.l, v2.l row_half_mirror
+// W32: v_cmp_eq_i16_e64_dpp s5, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_i16_e64_dpp s5, v1, v2 row_shl:1
-// W32: v_cmp_eq_i16_e64_dpp s5, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+v_cmp_eq_i16_e64_dpp s5, v1.l, v2.l row_shl:1
+// W32: v_cmp_eq_i16_e64_dpp s5, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_i16_e64_dpp s5, v1, v2 row_shl:15
-// W32: v_cmp_eq_i16_e64_dpp s5, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+v_cmp_eq_i16_e64_dpp s5, v1.l, v2.l row_shl:15
+// W32: v_cmp_eq_i16_e64_dpp s5, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_i16_e64_dpp s5, v1, v2 row_shr:1
-// W32: v_cmp_eq_i16_e64_dpp s5, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+v_cmp_eq_i16_e64_dpp s5, v1.l, v2.l row_shr:1
+// W32: v_cmp_eq_i16_e64_dpp s5, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_i16_e64_dpp s5, v1, v2 row_shr:15
-// W32: v_cmp_eq_i16_e64_dpp s5, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+v_cmp_eq_i16_e64_dpp s5, v1.l, v2.l row_shr:15
+// W32: v_cmp_eq_i16_e64_dpp s5, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_i16_e64_dpp s5, v1, v2 row_ror:1
-// W32: v_cmp_eq_i16_e64_dpp s5, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+v_cmp_eq_i16_e64_dpp s5, v1.l, v2.l row_ror:1
+// W32: v_cmp_eq_i16_e64_dpp s5, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_i16_e64_dpp s105, v1, v2 row_ror:15
-// W32: v_cmp_eq_i16_e64_dpp s105, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x69,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+v_cmp_eq_i16_e64_dpp s105, v1.l, v2.l row_ror:15
+// W32: v_cmp_eq_i16_e64_dpp s105, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x69,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_i16_e64_dpp vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W32: v_cmp_eq_i16_e64_dpp vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+v_cmp_eq_i16_e64_dpp vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_eq_i16_e64_dpp vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_i16_e64_dpp vcc_hi, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W32: v_cmp_eq_i16_e64_dpp vcc_hi, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6b,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+v_cmp_eq_i16_e64_dpp vcc_hi, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_eq_i16_e64_dpp vcc_hi, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6b,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_i16_e64_dpp ttmp15, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W32: v_cmp_eq_i16_e64_dpp ttmp15, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7b,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+v_cmp_eq_i16_e64_dpp ttmp15, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W32: v_cmp_eq_i16_e64_dpp ttmp15, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7b,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0]
-// W64: v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_eq_i16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[3,2,1,0]
+// W64: v_cmp_eq_i16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_i16_e64_dpp s[10:11], v1, s2 quad_perm:[3,2,1,0]
-// W64: v_cmp_eq_i16_e64_dpp s[10:11], v1, s2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x00,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_eq_i16_e64_dpp s[10:11], v1.l, s2 quad_perm:[3,2,1,0]
+// W64: v_cmp_eq_i16_e64_dpp s[10:11], v1.l, s2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x00,0x00,0x01,0x1b,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_i16_e64_dpp s[10:11], v1, 10 quad_perm:[3,2,1,0]
-// W64: v_cmp_eq_i16_e64_dpp s[10:11], v1, 10 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x14,0x01,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_eq_i16_e64_dpp s[10:11], v1.l, 10 quad_perm:[3,2,1,0]
+// W64: v_cmp_eq_i16_e64_dpp s[10:11], v1.l, 10 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x14,0x01,0x00,0x01,0x1b,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3]
-// W64: v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+v_cmp_eq_i16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[0,1,2,3]
+// W64: v_cmp_eq_i16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 row_mirror
-// W64: v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+v_cmp_eq_i16_e64_dpp s[10:11], v1.l, v2.l row_mirror
+// W64: v_cmp_eq_i16_e64_dpp s[10:11], v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 row_half_mirror
-// W64: v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+v_cmp_eq_i16_e64_dpp s[10:11], v1.l, v2.l row_half_mirror
+// W64: v_cmp_eq_i16_e64_dpp s[10:11], v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 row_shl:1
-// W64: v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+v_cmp_eq_i16_e64_dpp s[10:11], v1.l, v2.l row_shl:1
+// W64: v_cmp_eq_i16_e64_dpp s[10:11], v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 row_shl:15
-// W64: v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+v_cmp_eq_i16_e64_dpp s[10:11], v1.l, v2.l row_shl:15
+// W64: v_cmp_eq_i16_e64_dpp s[10:11], v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 row_shr:1
-// W64: v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+v_cmp_eq_i16_e64_dpp s[10:11], v1.l, v2.l row_shr:1
+// W64: v_cmp_eq_i16_e64_dpp s[10:11], v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 row_shr:15
-// W64: v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+v_cmp_eq_i16_e64_dpp s[10:11], v1.l, v2.l row_shr:15
+// W64: v_cmp_eq_i16_e64_dpp s[10:11], v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 row_ror:1
-// W64: v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+v_cmp_eq_i16_e64_dpp s[10:11], v1.l, v2.l row_ror:1
+// W64: v_cmp_eq_i16_e64_dpp s[10:11], v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 row_ror:15
-// W64: v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+v_cmp_eq_i16_e64_dpp s[10:11], v1.l, v2.l row_ror:15
+// W64: v_cmp_eq_i16_e64_dpp s[10:11], v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_i16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W64: v_cmp_eq_i16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+v_cmp_eq_i16_e64_dpp s[104:105], v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_eq_i16_e64_dpp s[104:105], v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_i16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W64: v_cmp_eq_i16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+v_cmp_eq_i16_e64_dpp vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W64: v_cmp_eq_i16_e64_dpp vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_i16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W64: v_cmp_eq_i16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+v_cmp_eq_i16_e64_dpp ttmp[14:15], v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W64: v_cmp_eq_i16_e64_dpp ttmp[14:15], v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_i16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
-// GFX12: v_cmp_eq_i16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x00,0x32,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
+v_cmp_eq_i16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// GFX12: v_cmp_eq_i16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x00,0x32,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
+
+v_cmp_eq_i16_e64_dpp null, v255.l, v255.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// GFX12: v_cmp_eq_i16_e64_dpp null, v255.l, v255.h op_sel:[0,1] row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x10,0x32,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
+
+v_cmp_eq_i16_e64_dpp ttmp15, v1.h, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W32: v_cmp_eq_i16_e64_dpp ttmp15, v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7b,0x08,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_eq_i16_e64_dpp ttmp[14:15], v1.h, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W64: v_cmp_eq_i16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7a,0x08,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+// W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_eq_i16_e64_dpp vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_eq_i16_e64_dpp vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
 v_cmp_eq_i32_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0]
 // W32: v_cmp_eq_i32_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x42,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
@@ -742,128 +757,143 @@ v_cmp_eq_i32_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3
 v_cmp_eq_i32_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
 // GFX12: v_cmp_eq_i32_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x00,0x42,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
 
-v_cmp_eq_u16_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0]
-// W32: v_cmp_eq_u16_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_eq_u16_e64_dpp s5, v1.l, v2.l quad_perm:[3,2,1,0]
+// W32: v_cmp_eq_u16_e64_dpp s5, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_u16_e64_dpp s5, v1, s2 quad_perm:[3,2,1,0]
-// W32: v_cmp_eq_u16_e64_dpp s5, v1, s2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3a,0xd4,0xfa,0x04,0x00,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_eq_u16_e64_dpp s5, v1.l, s2 quad_perm:[3,2,1,0]
+// W32: v_cmp_eq_u16_e64_dpp s5, v1.l, s2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3a,0xd4,0xfa,0x04,0x00,0x00,0x01,0x1b,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_u16_e64_dpp s5, v1, 10 quad_perm:[3,2,1,0]
-// W32: v_cmp_eq_u16_e64_dpp s5, v1, 10 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3a,0xd4,0xfa,0x14,0x01,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_eq_u16_e64_dpp s5, v1.l, 10 quad_perm:[3,2,1,0]
+// W32: v_cmp_eq_u16_e64_dpp s5, v1.l, 10 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3a,0xd4,0xfa,0x14,0x01,0x00,0x01,0x1b,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_u16_e64_dpp s5, v1, v2 quad_perm:[0,1,2,3]
-// W32: v_cmp_eq_u16_e64_dpp s5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+v_cmp_eq_u16_e64_dpp s5, v1.l, v2.l quad_perm:[0,1,2,3]
+// W32: v_cmp_eq_u16_e64_dpp s5, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_u16_e64_dpp s5, v1, v2 row_mirror
-// W32: v_cmp_eq_u16_e64_dpp s5, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+v_cmp_eq_u16_e64_dpp s5, v1.l, v2.l row_mirror
+// W32: v_cmp_eq_u16_e64_dpp s5, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_u16_e64_dpp s5, v1, v2 row_half_mirror
-// W32: v_cmp_eq_u16_e64_dpp s5, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+v_cmp_eq_u16_e64_dpp s5, v1.l, v2.l row_half_mirror
+// W32: v_cmp_eq_u16_e64_dpp s5, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_u16_e64_dpp s5, v1, v2 row_shl:1
-// W32: v_cmp_eq_u16_e64_dpp s5, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+v_cmp_eq_u16_e64_dpp s5, v1.l, v2.l row_shl:1
+// W32: v_cmp_eq_u16_e64_dpp s5, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_u16_e64_dpp s5, v1, v2 row_shl:15
-// W32: v_cmp_eq_u16_e64_dpp s5, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+v_cmp_eq_u16_e64_dpp s5, v1.l, v2.l row_shl:15
+// W32: v_cmp_eq_u16_e64_dpp s5, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_u16_e64_dpp s5, v1, v2 row_shr:1
-// W32: v_cmp_eq_u16_e64_dpp s5, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+v_cmp_eq_u16_e64_dpp s5, v1.l, v2.l row_shr:1
+// W32: v_cmp_eq_u16_e64_dpp s5, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_u16_e64_dpp s5, v1, v2 row_shr:15
-// W32: v_cmp_eq_u16_e64_dpp s5, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+v_cmp_eq_u16_e64_dpp s5, v1.l, v2.l row_shr:15
+// W32: v_cmp_eq_u16_e64_dpp s5, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_u16_e64_dpp s5, v1, v2 row_ror:1
-// W32: v_cmp_eq_u16_e64_dpp s5, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+v_cmp_eq_u16_e64_dpp s5, v1.l, v2.l row_ror:1
+// W32: v_cmp_eq_u16_e64_dpp s5, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_u16_e64_dpp s105, v1, v2 row_ror:15
-// W32: v_cmp_eq_u16_e64_dpp s105, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x69,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+v_cmp_eq_u16_e64_dpp s105, v1.l, v2.l row_ror:15
+// W32: v_cmp_eq_u16_e64_dpp s105, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x69,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_u16_e64_dpp vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W32: v_cmp_eq_u16_e64_dpp vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+v_cmp_eq_u16_e64_dpp vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_eq_u16_e64_dpp vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_u16_e64_dpp vcc_hi, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W32: v_cmp_eq_u16_e64_dpp vcc_hi, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6b,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+v_cmp_eq_u16_e64_dpp vcc_hi, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_eq_u16_e64_dpp vcc_hi, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6b,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_u16_e64_dpp ttmp15, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W32: v_cmp_eq_u16_e64_dpp ttmp15, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7b,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+v_cmp_eq_u16_e64_dpp ttmp15, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W32: v_cmp_eq_u16_e64_dpp ttmp15, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7b,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0]
-// W64: v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_eq_u16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[3,2,1,0]
+// W64: v_cmp_eq_u16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_u16_e64_dpp s[10:11], v1, s2 quad_perm:[3,2,1,0]
-// W64: v_cmp_eq_u16_e64_dpp s[10:11], v1, s2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x00,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_eq_u16_e64_dpp s[10:11], v1.l, s2 quad_perm:[3,2,1,0]
+// W64: v_cmp_eq_u16_e64_dpp s[10:11], v1.l, s2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x00,0x00,0x01,0x1b,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_u16_e64_dpp s[10:11], v1, 10 quad_perm:[3,2,1,0]
-// W64: v_cmp_eq_u16_e64_dpp s[10:11], v1, 10 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x14,0x01,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_eq_u16_e64_dpp s[10:11], v1.l, 10 quad_perm:[3,2,1,0]
+// W64: v_cmp_eq_u16_e64_dpp s[10:11], v1.l, 10 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x14,0x01,0x00,0x01,0x1b,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3]
-// W64: v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+v_cmp_eq_u16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[0,1,2,3]
+// W64: v_cmp_eq_u16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 row_mirror
-// W64: v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+v_cmp_eq_u16_e64_dpp s[10:11], v1.l, v2.l row_mirror
+// W64: v_cmp_eq_u16_e64_dpp s[10:11], v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 row_half_mirror
-// W64: v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+v_cmp_eq_u16_e64_dpp s[10:11], v1.l, v2.l row_half_mirror
+// W64: v_cmp_eq_u16_e64_dpp s[10:11], v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 row_shl:1
-// W64: v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+v_cmp_eq_u16_e64_dpp s[10:11], v1.l, v2.l row_shl:1
+// W64: v_cmp_eq_u16_e64_dpp s[10:11], v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 row_shl:15
-// W64: v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+v_cmp_eq_u16_e64_dpp s[10:11], v1.l, v2.l row_shl:15
+// W64: v_cmp_eq_u16_e64_dpp s[10:11], v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 row_shr:1
-// W64: v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+v_cmp_eq_u16_e64_dpp s[10:11], v1.l, v2.l row_shr:1
+// W64: v_cmp_eq_u16_e64_dpp s[10:11], v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 row_shr:15
-// W64: v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+v_cmp_eq_u16_e64_dpp s[10:11], v1.l, v2.l row_shr:15
+// W64: v_cmp_eq_u16_e64_dpp s[10:11], v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 row_ror:1
-// W64: v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+v_cmp_eq_u16_e64_dpp s[10:11], v1.l, v2.l row_ror:1
+// W64: v_cmp_eq_u16_e64_dpp s[10:11], v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 row_ror:15
-// W64: v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+v_cmp_eq_u16_e64_dpp s[10:11], v1.l, v2.l row_ror:15
+// W64: v_cmp_eq_u16_e64_dpp s[10:11], v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_u16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W64: v_cmp_eq_u16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+v_cmp_eq_u16_e64_dpp s[104:105], v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_eq_u16_e64_dpp s[104:105], v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_u16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W64: v_cmp_eq_u16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+v_cmp_eq_u16_e64_dpp vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W64: v_cmp_eq_u16_e64_dpp vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_u16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W64: v_cmp_eq_u16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+v_cmp_eq_u16_e64_dpp ttmp[14:15], v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W64: v_cmp_eq_u16_e64_dpp ttmp[14:15], v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_u16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
-// GFX12: v_cmp_eq_u16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x00,0x3a,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
+v_cmp_eq_u16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// GFX12: v_cmp_eq_u16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x00,0x3a,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
+
+v_cmp_eq_u16_e64_dpp null, v255.l, v255.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// GFX12: v_cmp_eq_u16_e64_dpp null, v255.l, v255.h op_sel:[0,1] row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x10,0x3a,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
+
+v_cmp_eq_u16_e64_dpp ttmp15, v1.h, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W32: v_cmp_eq_u16_e64_dpp ttmp15, v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7b,0x08,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_eq_u16_e64_dpp ttmp[14:15], v1.h, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W64: v_cmp_eq_u16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7a,0x08,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+// W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_eq_u16_e64_dpp vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_eq_u16_e64_dpp vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
 v_cmp_eq_u32_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0]
 // W32: v_cmp_eq_u32_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x4a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
@@ -1234,128 +1264,143 @@ v_cmp_ge_f32_e64_dpp ttmp[14:15], -v1, |v2| row_xmask:0 row_mask:0x1 bank_mask:0
 v_cmp_ge_f32_e64_dpp null, -|v255|, -|v255| clamp row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
 // GFX12: v_cmp_ge_f32_e64_dpp null, -|v255|, -|v255| clamp row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x83,0x16,0xd4,0xfa,0xfe,0x03,0x60,0xff,0x6f,0x05,0x30]
 
-v_cmp_ge_i16_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0]
-// W32: v_cmp_ge_i16_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_ge_i16_e64_dpp s5, v1.l, v2.l quad_perm:[3,2,1,0]
+// W32: v_cmp_ge_i16_e64_dpp s5, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_i16_e64_dpp s5, v1, s2 quad_perm:[3,2,1,0]
-// W32: v_cmp_ge_i16_e64_dpp s5, v1, s2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x36,0xd4,0xfa,0x04,0x00,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_ge_i16_e64_dpp s5, v1.l, s2 quad_perm:[3,2,1,0]
+// W32: v_cmp_ge_i16_e64_dpp s5, v1.l, s2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x36,0xd4,0xfa,0x04,0x00,0x00,0x01,0x1b,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_i16_e64_dpp s5, v1, 10 quad_perm:[3,2,1,0]
-// W32: v_cmp_ge_i16_e64_dpp s5, v1, 10 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x36,0xd4,0xfa,0x14,0x01,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_ge_i16_e64_dpp s5, v1.l, 10 quad_perm:[3,2,1,0]
+// W32: v_cmp_ge_i16_e64_dpp s5, v1.l, 10 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x36,0xd4,0xfa,0x14,0x01,0x00,0x01,0x1b,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_i16_e64_dpp s5, v1, v2 quad_perm:[0,1,2,3]
-// W32: v_cmp_ge_i16_e64_dpp s5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+v_cmp_ge_i16_e64_dpp s5, v1.l, v2.l quad_perm:[0,1,2,3]
+// W32: v_cmp_ge_i16_e64_dpp s5, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_i16_e64_dpp s5, v1, v2 row_mirror
-// W32: v_cmp_ge_i16_e64_dpp s5, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+v_cmp_ge_i16_e64_dpp s5, v1.l, v2.l row_mirror
+// W32: v_cmp_ge_i16_e64_dpp s5, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_i16_e64_dpp s5, v1, v2 row_half_mirror
-// W32: v_cmp_ge_i16_e64_dpp s5, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+v_cmp_ge_i16_e64_dpp s5, v1.l, v2.l row_half_mirror
+// W32: v_cmp_ge_i16_e64_dpp s5, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_i16_e64_dpp s5, v1, v2 row_shl:1
-// W32: v_cmp_ge_i16_e64_dpp s5, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+v_cmp_ge_i16_e64_dpp s5, v1.l, v2.l row_shl:1
+// W32: v_cmp_ge_i16_e64_dpp s5, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_i16_e64_dpp s5, v1, v2 row_shl:15
-// W32: v_cmp_ge_i16_e64_dpp s5, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+v_cmp_ge_i16_e64_dpp s5, v1.l, v2.l row_shl:15
+// W32: v_cmp_ge_i16_e64_dpp s5, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_i16_e64_dpp s5, v1, v2 row_shr:1
-// W32: v_cmp_ge_i16_e64_dpp s5, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+v_cmp_ge_i16_e64_dpp s5, v1.l, v2.l row_shr:1
+// W32: v_cmp_ge_i16_e64_dpp s5, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_i16_e64_dpp s5, v1, v2 row_shr:15
-// W32: v_cmp_ge_i16_e64_dpp s5, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+v_cmp_ge_i16_e64_dpp s5, v1.l, v2.l row_shr:15
+// W32: v_cmp_ge_i16_e64_dpp s5, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_i16_e64_dpp s5, v1, v2 row_ror:1
-// W32: v_cmp_ge_i16_e64_dpp s5, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+v_cmp_ge_i16_e64_dpp s5, v1.l, v2.l row_ror:1
+// W32: v_cmp_ge_i16_e64_dpp s5, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_i16_e64_dpp s105, v1, v2 row_ror:15
-// W32: v_cmp_ge_i16_e64_dpp s105, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x69,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+v_cmp_ge_i16_e64_dpp s105, v1.l, v2.l row_ror:15
+// W32: v_cmp_ge_i16_e64_dpp s105, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x69,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_i16_e64_dpp vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W32: v_cmp_ge_i16_e64_dpp vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+v_cmp_ge_i16_e64_dpp vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ge_i16_e64_dpp vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_i16_e64_dpp vcc_hi, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W32: v_cmp_ge_i16_e64_dpp vcc_hi, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6b,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+v_cmp_ge_i16_e64_dpp vcc_hi, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_ge_i16_e64_dpp vcc_hi, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6b,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_i16_e64_dpp ttmp15, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W32: v_cmp_ge_i16_e64_dpp ttmp15, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7b,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+v_cmp_ge_i16_e64_dpp ttmp15, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W32: v_cmp_ge_i16_e64_dpp ttmp15, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7b,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0]
-// W64: v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_ge_i16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[3,2,1,0]
+// W64: v_cmp_ge_i16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_ge_i16_e64_dpp s[10:11], v1.l, s2 quad_perm:[3,2,1,0]
+// W64: v_cmp_ge_i16_e64_dpp s[10:11], v1.l, s2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x00,0x00,0x01,0x1b,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_i16_e64_dpp s[10:11], v1, s2 quad_perm:[3,2,1,0]
-// W64: v_cmp_ge_i16_e64_dpp s[10:11], v1, s2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x00,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_ge_i16_e64_dpp s[10:11], v1.l, 10 quad_perm:[3,2,1,0]
+// W64: v_cmp_ge_i16_e64_dpp s[10:11], v1.l, 10 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x14,0x01,0x00,0x01,0x1b,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_i16_e64_dpp s[10:11], v1, 10 quad_perm:[3,2,1,0]
-// W64: v_cmp_ge_i16_e64_dpp s[10:11], v1, 10 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x14,0x01,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_ge_i16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[0,1,2,3]
+// W64: v_cmp_ge_i16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3]
-// W64: v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+v_cmp_ge_i16_e64_dpp s[10:11], v1.l, v2.l row_mirror
+// W64: v_cmp_ge_i16_e64_dpp s[10:11], v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 row_mirror
-// W64: v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+v_cmp_ge_i16_e64_dpp s[10:11], v1.l, v2.l row_half_mirror
+// W64: v_cmp_ge_i16_e64_dpp s[10:11], v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 row_half_mirror
-// W64: v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+v_cmp_ge_i16_e64_dpp s[10:11], v1.l, v2.l row_shl:1
+// W64: v_cmp_ge_i16_e64_dpp s[10:11], v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 row_shl:1
-// W64: v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+v_cmp_ge_i16_e64_dpp s[10:11], v1.l, v2.l row_shl:15
+// W64: v_cmp_ge_i16_e64_dpp s[10:11], v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 row_shl:15
-// W64: v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+v_cmp_ge_i16_e64_dpp s[10:11], v1.l, v2.l row_shr:1
+// W64: v_cmp_ge_i16_e64_dpp s[10:11], v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 row_shr:1
-// W64: v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+v_cmp_ge_i16_e64_dpp s[10:11], v1.l, v2.l row_shr:15
+// W64: v_cmp_ge_i16_e64_dpp s[10:11], v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 row_shr:15
-// W64: v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+v_cmp_ge_i16_e64_dpp s[10:11], v1.l, v2.l row_ror:1
+// W64: v_cmp_ge_i16_e64_dpp s[10:11], v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 row_ror:1
-// W64: v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+v_cmp_ge_i16_e64_dpp s[10:11], v1.l, v2.l row_ror:15
+// W64: v_cmp_ge_i16_e64_dpp s[10:11], v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 row_ror:15
-// W64: v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+v_cmp_ge_i16_e64_dpp s[104:105], v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ge_i16_e64_dpp s[104:105], v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_i16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W64: v_cmp_ge_i16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+v_cmp_ge_i16_e64_dpp vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W64: v_cmp_ge_i16_e64_dpp vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_i16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W64: v_cmp_ge_i16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+v_cmp_ge_i16_e64_dpp ttmp[14:15], v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W64: v_cmp_ge_i16_e64_dpp ttmp[14:15], v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_i16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W64: v_cmp_ge_i16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+v_cmp_ge_i16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// GFX12: v_cmp_ge_i16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x00,0x36,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
+
+v_cmp_ge_i16_e64_dpp null, v255.l, v255.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// GFX12: v_cmp_ge_i16_e64_dpp null, v255.l, v255.h op_sel:[0,1] row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x10,0x36,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
+
+v_cmp_ge_i16_e64_dpp ttmp15, v1.h, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W32: v_cmp_ge_i16_e64_dpp ttmp15, v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7b,0x08,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_ge_i16_e64_dpp ttmp[14:15], v1.h, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W64: v_cmp_ge_i16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7a,0x08,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_i16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
-// GFX12: v_cmp_ge_i16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x00,0x36,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
+v_cmp_ge_i16_e64_dpp vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_ge_i16_e64_dpp vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
 v_cmp_ge_i32_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0]
 // W32: v_cmp_ge_i32_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x46,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
@@ -1480,128 +1525,143 @@ v_cmp_ge_i32_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3
 v_cmp_ge_i32_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
 // GFX12: v_cmp_ge_i32_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x00,0x46,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
 
-v_cmp_ge_u16_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0]
-// W32: v_cmp_ge_u16_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_ge_u16_e64_dpp s5, v1.l, v2.l quad_perm:[3,2,1,0]
+// W32: v_cmp_ge_u16_e64_dpp s5, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_u16_e64_dpp s5, v1, s2 quad_perm:[3,2,1,0]
-// W32: v_cmp_ge_u16_e64_dpp s5, v1, s2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3e,0xd4,0xfa,0x04,0x00,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_ge_u16_e64_dpp s5, v1.l, s2 quad_perm:[3,2,1,0]
+// W32: v_cmp_ge_u16_e64_dpp s5, v1.l, s2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3e,0xd4,0xfa,0x04,0x00,0x00,0x01,0x1b,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_u16_e64_dpp s5, v1, 10 quad_perm:[3,2,1,0]
-// W32: v_cmp_ge_u16_e64_dpp s5, v1, 10 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3e,0xd4,0xfa,0x14,0x01,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_ge_u16_e64_dpp s5, v1.l, 10 quad_perm:[3,2,1,0]
+// W32: v_cmp_ge_u16_e64_dpp s5, v1.l, 10 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3e,0xd4,0xfa,0x14,0x01,0x00,0x01,0x1b,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_u16_e64_dpp s5, v1, v2 quad_perm:[0,1,2,3]
-// W32: v_cmp_ge_u16_e64_dpp s5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+v_cmp_ge_u16_e64_dpp s5, v1.l, v2.l quad_perm:[0,1,2,3]
+// W32: v_cmp_ge_u16_e64_dpp s5, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_u16_e64_dpp s5, v1, v2 row_mirror
-// W32: v_cmp_ge_u16_e64_dpp s5, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+v_cmp_ge_u16_e64_dpp s5, v1.l, v2.l row_mirror
+// W32: v_cmp_ge_u16_e64_dpp s5, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_u16_e64_dpp s5, v1, v2 row_half_mirror
-// W32: v_cmp_ge_u16_e64_dpp s5, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+v_cmp_ge_u16_e64_dpp s5, v1.l, v2.l row_half_mirror
+// W32: v_cmp_ge_u16_e64_dpp s5, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_u16_e64_dpp s5, v1, v2 row_shl:1
-// W32: v_cmp_ge_u16_e64_dpp s5, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+v_cmp_ge_u16_e64_dpp s5, v1.l, v2.l row_shl:1
+// W32: v_cmp_ge_u16_e64_dpp s5, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_u16_e64_dpp s5, v1, v2 row_shl:15
-// W32: v_cmp_ge_u16_e64_dpp s5, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+v_cmp_ge_u16_e64_dpp s5, v1.l, v2.l row_shl:15
+// W32: v_cmp_ge_u16_e64_dpp s5, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_u16_e64_dpp s5, v1, v2 row_shr:1
-// W32: v_cmp_ge_u16_e64_dpp s5, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+v_cmp_ge_u16_e64_dpp s5, v1.l, v2.l row_shr:1
+// W32: v_cmp_ge_u16_e64_dpp s5, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_u16_e64_dpp s5, v1, v2 row_shr:15
-// W32: v_cmp_ge_u16_e64_dpp s5, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+v_cmp_ge_u16_e64_dpp s5, v1.l, v2.l row_shr:15
+// W32: v_cmp_ge_u16_e64_dpp s5, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_u16_e64_dpp s5, v1, v2 row_ror:1
-// W32: v_cmp_ge_u16_e64_dpp s5, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+v_cmp_ge_u16_e64_dpp s5, v1.l, v2.l row_ror:1
+// W32: v_cmp_ge_u16_e64_dpp s5, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_u16_e64_dpp s105, v1, v2 row_ror:15
-// W32: v_cmp_ge_u16_e64_dpp s105, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x69,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+v_cmp_ge_u16_e64_dpp s105, v1.l, v2.l row_ror:15
+// W32: v_cmp_ge_u16_e64_dpp s105, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x69,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_u16_e64_dpp vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W32: v_cmp_ge_u16_e64_dpp vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+v_cmp_ge_u16_e64_dpp vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ge_u16_e64_dpp vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_u16_e64_dpp vcc_hi, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W32: v_cmp_ge_u16_e64_dpp vcc_hi, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6b,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+v_cmp_ge_u16_e64_dpp vcc_hi, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_ge_u16_e64_dpp vcc_hi, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6b,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_u16_e64_dpp ttmp15, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W32: v_cmp_ge_u16_e64_dpp ttmp15, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7b,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+v_cmp_ge_u16_e64_dpp ttmp15, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W32: v_cmp_ge_u16_e64_dpp ttmp15, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7b,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0]
-// W64: v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_ge_u16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[3,2,1,0]
+// W64: v_cmp_ge_u16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_u16_e64_dpp s[10:11], v1, s2 quad_perm:[3,2,1,0]
-// W64: v_cmp_ge_u16_e64_dpp s[10:11], v1, s2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x00,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_ge_u16_e64_dpp s[10:11], v1.l, s2 quad_perm:[3,2,1,0]
+// W64: v_cmp_ge_u16_e64_dpp s[10:11], v1.l, s2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x00,0x00,0x01,0x1b,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_u16_e64_dpp s[10:11], v1, 10 quad_perm:[3,2,1,0]
-// W64: v_cmp_ge_u16_e64_dpp s[10:11], v1, 10 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x14,0x01,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_ge_u16_e64_dpp s[10:11], v1.l, 10 quad_perm:[3,2,1,0]
+// W64: v_cmp_ge_u16_e64_dpp s[10:11], v1.l, 10 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x14,0x01,0x00,0x01,0x1b,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3]
-// W64: v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+v_cmp_ge_u16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[0,1,2,3]
+// W64: v_cmp_ge_u16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 row_mirror
-// W64: v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+v_cmp_ge_u16_e64_dpp s[10:11], v1.l, v2.l row_mirror
+// W64: v_cmp_ge_u16_e64_dpp s[10:11], v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 row_half_mirror
-// W64: v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+v_cmp_ge_u16_e64_dpp s[10:11], v1.l, v2.l row_half_mirror
+// W64: v_cmp_ge_u16_e64_dpp s[10:11], v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 row_shl:1
-// W64: v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+v_cmp_ge_u16_e64_dpp s[10:11], v1.l, v2.l row_shl:1
+// W64: v_cmp_ge_u16_e64_dpp s[10:11], v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 row_shl:15
-// W64: v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+v_cmp_ge_u16_e64_dpp s[10:11], v1.l, v2.l row_shl:15
+// W64: v_cmp_ge_u16_e64_dpp s[10:11], v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 row_shr:1
-// W64: v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+v_cmp_ge_u16_e64_dpp s[10:11], v1.l, v2.l row_shr:1
+// W64: v_cmp_ge_u16_e64_dpp s[10:11], v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 row_shr:15
-// W64: v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+v_cmp_ge_u16_e64_dpp s[10:11], v1.l, v2.l row_shr:15
+// W64: v_cmp_ge_u16_e64_dpp s[10:11], v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 row_ror:1
-// W64: v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+v_cmp_ge_u16_e64_dpp s[10:11], v1.l, v2.l row_ror:1
+// W64: v_cmp_ge_u16_e64_dpp s[10:11], v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 row_ror:15
-// W64: v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+v_cmp_ge_u16_e64_dpp s[10:11], v1.l, v2.l row_ror:15
+// W64: v_cmp_ge_u16_e64_dpp s[10:11], v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_u16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W64: v_cmp_ge_u16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+v_cmp_ge_u16_e64_dpp s[104:105], v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ge_u16_e64_dpp s[104:105], v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_u16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W64: v_cmp_ge_u16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+v_cmp_ge_u16_e64_dpp vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W64: v_cmp_ge_u16_e64_dpp vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_u16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W64: v_cmp_ge_u16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+v_cmp_ge_u16_e64_dpp ttmp[14:15], v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W64: v_cmp_ge_u16_e64_dpp ttmp[14:15], v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_u16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
-// GFX12: v_cmp_ge_u16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x00,0x3e,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
+v_cmp_ge_u16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// GFX12: v_cmp_ge_u16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x00,0x3e,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
+
+v_cmp_ge_u16_e64_dpp null, v255.l, v255.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// GFX12: v_cmp_ge_u16_e64_dpp null, v255.l, v255.h op_sel:[0,1] row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x10,0x3e,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
+
+v_cmp_ge_u16_e64_dpp ttmp15, v1.h, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W32: v_cmp_ge_u16_e64_dpp ttmp15, v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7b,0x08,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_ge_u16_e64_dpp ttmp[14:15], v1.h, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W64: v_cmp_ge_u16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7a,0x08,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+// W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_ge_u16_e64_dpp vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_ge_u16_e64_dpp vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
 v_cmp_ge_u32_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0]
 // W32: v_cmp_ge_u32_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x4e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
@@ -1972,128 +2032,143 @@ v_cmp_gt_f32_e64_dpp ttmp[14:15], -v1, |v2| row_xmask:0 row_mask:0x1 bank_mask:0
 v_cmp_gt_f32_e64_dpp null, -|v255|, -|v255| clamp row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
 // GFX12: v_cmp_gt_f32_e64_dpp null, -|v255|, -|v255| clamp row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x83,0x14,0xd4,0xfa,0xfe,0x03,0x60,0xff,0x6f,0x05,0x30]
 
-v_cmp_gt_i16_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0]
-// W32: v_cmp_gt_i16_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_gt_i16_e64_dpp s5, v1.l, v2.l quad_perm:[3,2,1,0]
+// W32: v_cmp_gt_i16_e64_dpp s5, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_i16_e64_dpp s5, v1, s2 quad_perm:[3,2,1,0]
-// W32: v_cmp_gt_i16_e64_dpp s5, v1, s2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x34,0xd4,0xfa,0x04,0x00,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_gt_i16_e64_dpp s5, v1.l, s2 quad_perm:[3,2,1,0]
+// W32: v_cmp_gt_i16_e64_dpp s5, v1.l, s2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x34,0xd4,0xfa,0x04,0x00,0x00,0x01,0x1b,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_i16_e64_dpp s5, v1, 10 quad_perm:[3,2,1,0]
-// W32: v_cmp_gt_i16_e64_dpp s5, v1, 10 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x34,0xd4,0xfa,0x14,0x01,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_gt_i16_e64_dpp s5, v1.l, 10 quad_perm:[3,2,1,0]
+// W32: v_cmp_gt_i16_e64_dpp s5, v1.l, 10 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x34,0xd4,0xfa,0x14,0x01,0x00,0x01,0x1b,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_i16_e64_dpp s5, v1, v2 quad_perm:[0,1,2,3]
-// W32: v_cmp_gt_i16_e64_dpp s5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+v_cmp_gt_i16_e64_dpp s5, v1.l, v2.l quad_perm:[0,1,2,3]
+// W32: v_cmp_gt_i16_e64_dpp s5, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_i16_e64_dpp s5, v1, v2 row_mirror
-// W32: v_cmp_gt_i16_e64_dpp s5, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+v_cmp_gt_i16_e64_dpp s5, v1.l, v2.l row_mirror
+// W32: v_cmp_gt_i16_e64_dpp s5, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_i16_e64_dpp s5, v1, v2 row_half_mirror
-// W32: v_cmp_gt_i16_e64_dpp s5, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+v_cmp_gt_i16_e64_dpp s5, v1.l, v2.l row_half_mirror
+// W32: v_cmp_gt_i16_e64_dpp s5, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_i16_e64_dpp s5, v1, v2 row_shl:1
-// W32: v_cmp_gt_i16_e64_dpp s5, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+v_cmp_gt_i16_e64_dpp s5, v1.l, v2.l row_shl:1
+// W32: v_cmp_gt_i16_e64_dpp s5, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_i16_e64_dpp s5, v1, v2 row_shl:15
-// W32: v_cmp_gt_i16_e64_dpp s5, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+v_cmp_gt_i16_e64_dpp s5, v1.l, v2.l row_shl:15
+// W32: v_cmp_gt_i16_e64_dpp s5, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_i16_e64_dpp s5, v1, v2 row_shr:1
-// W32: v_cmp_gt_i16_e64_dpp s5, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+v_cmp_gt_i16_e64_dpp s5, v1.l, v2.l row_shr:1
+// W32: v_cmp_gt_i16_e64_dpp s5, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_i16_e64_dpp s5, v1, v2 row_shr:15
-// W32: v_cmp_gt_i16_e64_dpp s5, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+v_cmp_gt_i16_e64_dpp s5, v1.l, v2.l row_shr:15
+// W32: v_cmp_gt_i16_e64_dpp s5, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_i16_e64_dpp s5, v1, v2 row_ror:1
-// W32: v_cmp_gt_i16_e64_dpp s5, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+v_cmp_gt_i16_e64_dpp s5, v1.l, v2.l row_ror:1
+// W32: v_cmp_gt_i16_e64_dpp s5, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_i16_e64_dpp s105, v1, v2 row_ror:15
-// W32: v_cmp_gt_i16_e64_dpp s105, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x69,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+v_cmp_gt_i16_e64_dpp s105, v1.l, v2.l row_ror:15
+// W32: v_cmp_gt_i16_e64_dpp s105, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x69,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_i16_e64_dpp vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W32: v_cmp_gt_i16_e64_dpp vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+v_cmp_gt_i16_e64_dpp vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_gt_i16_e64_dpp vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_i16_e64_dpp vcc_hi, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W32: v_cmp_gt_i16_e64_dpp vcc_hi, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6b,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+v_cmp_gt_i16_e64_dpp vcc_hi, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_gt_i16_e64_dpp vcc_hi, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6b,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_i16_e64_dpp ttmp15, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W32: v_cmp_gt_i16_e64_dpp ttmp15, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7b,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+v_cmp_gt_i16_e64_dpp ttmp15, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W32: v_cmp_gt_i16_e64_dpp ttmp15, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7b,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0]
-// W64: v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_gt_i16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[3,2,1,0]
+// W64: v_cmp_gt_i16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_i16_e64_dpp s[10:11], v1, s2 quad_perm:[3,2,1,0]
-// W64: v_cmp_gt_i16_e64_dpp s[10:11], v1, s2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x00,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_gt_i16_e64_dpp s[10:11], v1.l, s2 quad_perm:[3,2,1,0]
+// W64: v_cmp_gt_i16_e64_dpp s[10:11], v1.l, s2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x00,0x00,0x01,0x1b,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_i16_e64_dpp s[10:11], v1, 10 quad_perm:[3,2,1,0]
-// W64: v_cmp_gt_i16_e64_dpp s[10:11], v1, 10 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x14,0x01,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_gt_i16_e64_dpp s[10:11], v1.l, 10 quad_perm:[3,2,1,0]
+// W64: v_cmp_gt_i16_e64_dpp s[10:11], v1.l, 10 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x14,0x01,0x00,0x01,0x1b,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3]
-// W64: v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+v_cmp_gt_i16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[0,1,2,3]
+// W64: v_cmp_gt_i16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 row_mirror
-// W64: v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+v_cmp_gt_i16_e64_dpp s[10:11], v1.l, v2.l row_mirror
+// W64: v_cmp_gt_i16_e64_dpp s[10:11], v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 row_half_mirror
-// W64: v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+v_cmp_gt_i16_e64_dpp s[10:11], v1.l, v2.l row_half_mirror
+// W64: v_cmp_gt_i16_e64_dpp s[10:11], v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 row_shl:1
-// W64: v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+v_cmp_gt_i16_e64_dpp s[10:11], v1.l, v2.l row_shl:1
+// W64: v_cmp_gt_i16_e64_dpp s[10:11], v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 row_shl:15
-// W64: v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+v_cmp_gt_i16_e64_dpp s[10:11], v1.l, v2.l row_shl:15
+// W64: v_cmp_gt_i16_e64_dpp s[10:11], v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 row_shr:1
-// W64: v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+v_cmp_gt_i16_e64_dpp s[10:11], v1.l, v2.l row_shr:1
+// W64: v_cmp_gt_i16_e64_dpp s[10:11], v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 row_shr:15
-// W64: v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+v_cmp_gt_i16_e64_dpp s[10:11], v1.l, v2.l row_shr:15
+// W64: v_cmp_gt_i16_e64_dpp s[10:11], v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 row_ror:1
-// W64: v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+v_cmp_gt_i16_e64_dpp s[10:11], v1.l, v2.l row_ror:1
+// W64: v_cmp_gt_i16_e64_dpp s[10:11], v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 row_ror:15
-// W64: v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+v_cmp_gt_i16_e64_dpp s[10:11], v1.l, v2.l row_ror:15
+// W64: v_cmp_gt_i16_e64_dpp s[10:11], v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_i16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W64: v_cmp_gt_i16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+v_cmp_gt_i16_e64_dpp s[104:105], v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_gt_i16_e64_dpp s[104:105], v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_i16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W64: v_cmp_gt_i16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+v_cmp_gt_i16_e64_dpp vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W64: v_cmp_gt_i16_e64_dpp vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_i16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W64: v_cmp_gt_i16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+v_cmp_gt_i16_e64_dpp ttmp[14:15], v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W64: v_cmp_gt_i16_e64_dpp ttmp[14:15], v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_i16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
-// GFX12: v_cmp_gt_i16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x00,0x34,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
+v_cmp_gt_i16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// GFX12: v_cmp_gt_i16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x00,0x34,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
+
+v_cmp_gt_i16_e64_dpp null, v255.l, v255.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// GFX12: v_cmp_gt_i16_e64_dpp null, v255.l, v255.h op_sel:[0,1] row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x10,0x34,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
+
+v_cmp_gt_i16_e64_dpp ttmp15, v1.h, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W32: v_cmp_gt_i16_e64_dpp ttmp15, v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7b,0x08,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_gt_i16_e64_dpp ttmp[14:15], v1.h, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W64: v_cmp_gt_i16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7a,0x08,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+// W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_gt_i16_e64_dpp vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_gt_i16_e64_dpp vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
 v_cmp_gt_i32_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0]
 // W32: v_cmp_gt_i32_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x44,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
@@ -2218,128 +2293,143 @@ v_cmp_gt_i32_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3
 v_cmp_gt_i32_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
 // GFX12: v_cmp_gt_i32_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x00,0x44,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
 
-v_cmp_gt_u16_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0]
-// W32: v_cmp_gt_u16_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_gt_u16_e64_dpp s5, v1.l, v2.l quad_perm:[3,2,1,0]
+// W32: v_cmp_gt_u16_e64_dpp s5, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_u16_e64_dpp s5, v1, s2 quad_perm:[3,2,1,0]
-// W32: v_cmp_gt_u16_e64_dpp s5, v1, s2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3c,0xd4,0xfa,0x04,0x00,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_gt_u16_e64_dpp s5, v1.l, s2 quad_perm:[3,2,1,0]
+// W32: v_cmp_gt_u16_e64_dpp s5, v1.l, s2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3c,0xd4,0xfa,0x04,0x00,0x00,0x01,0x1b,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_u16_e64_dpp s5, v1, 10 quad_perm:[3,2,1,0]
-// W32: v_cmp_gt_u16_e64_dpp s5, v1, 10 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3c,0xd4,0xfa,0x14,0x01,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_gt_u16_e64_dpp s5, v1.l, 10 quad_perm:[3,2,1,0]
+// W32: v_cmp_gt_u16_e64_dpp s5, v1.l, 10 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3c,0xd4,0xfa,0x14,0x01,0x00,0x01,0x1b,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_u16_e64_dpp s5, v1, v2 quad_perm:[0,1,2,3]
-// W32: v_cmp_gt_u16_e64_dpp s5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+v_cmp_gt_u16_e64_dpp s5, v1.l, v2.l quad_perm:[0,1,2,3]
+// W32: v_cmp_gt_u16_e64_dpp s5, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_u16_e64_dpp s5, v1, v2 row_mirror
-// W32: v_cmp_gt_u16_e64_dpp s5, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+v_cmp_gt_u16_e64_dpp s5, v1.l, v2.l row_mirror
+// W32: v_cmp_gt_u16_e64_dpp s5, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_u16_e64_dpp s5, v1, v2 row_half_mirror
-// W32: v_cmp_gt_u16_e64_dpp s5, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+v_cmp_gt_u16_e64_dpp s5, v1.l, v2.l row_half_mirror
+// W32: v_cmp_gt_u16_e64_dpp s5, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_u16_e64_dpp s5, v1, v2 row_shl:1
-// W32: v_cmp_gt_u16_e64_dpp s5, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+v_cmp_gt_u16_e64_dpp s5, v1.l, v2.l row_shl:1
+// W32: v_cmp_gt_u16_e64_dpp s5, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_u16_e64_dpp s5, v1, v2 row_shl:15
-// W32: v_cmp_gt_u16_e64_dpp s5, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+v_cmp_gt_u16_e64_dpp s5, v1.l, v2.l row_shl:15
+// W32: v_cmp_gt_u16_e64_dpp s5, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_u16_e64_dpp s5, v1, v2 row_shr:1
-// W32: v_cmp_gt_u16_e64_dpp s5, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+v_cmp_gt_u16_e64_dpp s5, v1.l, v2.l row_shr:1
+// W32: v_cmp_gt_u16_e64_dpp s5, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_u16_e64_dpp s5, v1, v2 row_shr:15
-// W32: v_cmp_gt_u16_e64_dpp s5, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+v_cmp_gt_u16_e64_dpp s5, v1.l, v2.l row_shr:15
+// W32: v_cmp_gt_u16_e64_dpp s5, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_u16_e64_dpp s5, v1, v2 row_ror:1
-// W32: v_cmp_gt_u16_e64_dpp s5, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+v_cmp_gt_u16_e64_dpp s5, v1.l, v2.l row_ror:1
+// W32: v_cmp_gt_u16_e64_dpp s5, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_u16_e64_dpp s105, v1, v2 row_ror:15
-// W32: v_cmp_gt_u16_e64_dpp s105, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x69,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+v_cmp_gt_u16_e64_dpp s105, v1.l, v2.l row_ror:15
+// W32: v_cmp_gt_u16_e64_dpp s105, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x69,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_u16_e64_dpp vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W32: v_cmp_gt_u16_e64_dpp vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+v_cmp_gt_u16_e64_dpp vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_gt_u16_e64_dpp vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_u16_e64_dpp vcc_hi, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W32: v_cmp_gt_u16_e64_dpp vcc_hi, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6b,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+v_cmp_gt_u16_e64_dpp vcc_hi, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_gt_u16_e64_dpp vcc_hi, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6b,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_u16_e64_dpp ttmp15, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W32: v_cmp_gt_u16_e64_dpp ttmp15, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7b,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+v_cmp_gt_u16_e64_dpp ttmp15, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W32: v_cmp_gt_u16_e64_dpp ttmp15, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7b,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0]
-// W64: v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_gt_u16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[3,2,1,0]
+// W64: v_cmp_gt_u16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_gt_u16_e64_dpp s[10:11], v1.l, s2 quad_perm:[3,2,1,0]
+// W64: v_cmp_gt_u16_e64_dpp s[10:11], v1.l, s2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x00,0x00,0x01,0x1b,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_u16_e64_dpp s[10:11], v1, s2 quad_perm:[3,2,1,0]
-// W64: v_cmp_gt_u16_e64_dpp s[10:11], v1, s2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x00,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_gt_u16_e64_dpp s[10:11], v1.l, 10 quad_perm:[3,2,1,0]
+// W64: v_cmp_gt_u16_e64_dpp s[10:11], v1.l, 10 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x14,0x01,0x00,0x01,0x1b,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_u16_e64_dpp s[10:11], v1, 10 quad_perm:[3,2,1,0]
-// W64: v_cmp_gt_u16_e64_dpp s[10:11], v1, 10 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x14,0x01,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_gt_u16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[0,1,2,3]
+// W64: v_cmp_gt_u16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3]
-// W64: v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+v_cmp_gt_u16_e64_dpp s[10:11], v1.l, v2.l row_mirror
+// W64: v_cmp_gt_u16_e64_dpp s[10:11], v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 row_mirror
-// W64: v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+v_cmp_gt_u16_e64_dpp s[10:11], v1.l, v2.l row_half_mirror
+// W64: v_cmp_gt_u16_e64_dpp s[10:11], v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 row_half_mirror
-// W64: v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+v_cmp_gt_u16_e64_dpp s[10:11], v1.l, v2.l row_shl:1
+// W64: v_cmp_gt_u16_e64_dpp s[10:11], v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 row_shl:1
-// W64: v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+v_cmp_gt_u16_e64_dpp s[10:11], v1.l, v2.l row_shl:15
+// W64: v_cmp_gt_u16_e64_dpp s[10:11], v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 row_shl:15
-// W64: v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+v_cmp_gt_u16_e64_dpp s[10:11], v1.l, v2.l row_shr:1
+// W64: v_cmp_gt_u16_e64_dpp s[10:11], v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 row_shr:1
-// W64: v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+v_cmp_gt_u16_e64_dpp s[10:11], v1.l, v2.l row_shr:15
+// W64: v_cmp_gt_u16_e64_dpp s[10:11], v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 row_shr:15
-// W64: v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+v_cmp_gt_u16_e64_dpp s[10:11], v1.l, v2.l row_ror:1
+// W64: v_cmp_gt_u16_e64_dpp s[10:11], v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 row_ror:1
-// W64: v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+v_cmp_gt_u16_e64_dpp s[10:11], v1.l, v2.l row_ror:15
+// W64: v_cmp_gt_u16_e64_dpp s[10:11], v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 row_ror:15
-// W64: v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+v_cmp_gt_u16_e64_dpp s[104:105], v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_gt_u16_e64_dpp s[104:105], v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_u16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W64: v_cmp_gt_u16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+v_cmp_gt_u16_e64_dpp vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W64: v_cmp_gt_u16_e64_dpp vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_u16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W64: v_cmp_gt_u16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+v_cmp_gt_u16_e64_dpp ttmp[14:15], v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W64: v_cmp_gt_u16_e64_dpp ttmp[14:15], v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_u16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W64: v_cmp_gt_u16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+v_cmp_gt_u16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// GFX12: v_cmp_gt_u16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x00,0x3c,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
+
+v_cmp_gt_u16_e64_dpp null, v255.l, v255.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// GFX12: v_cmp_gt_u16_e64_dpp null, v255.l, v255.h op_sel:[0,1] row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x10,0x3c,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
+
+v_cmp_gt_u16_e64_dpp ttmp15, v1.h, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W32: v_cmp_gt_u16_e64_dpp ttmp15, v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7b,0x08,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_gt_u16_e64_dpp ttmp[14:15], v1.h, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W64: v_cmp_gt_u16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7a,0x08,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_u16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
-// GFX12: v_cmp_gt_u16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x00,0x3c,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
+v_cmp_gt_u16_e64_dpp vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_gt_u16_e64_dpp vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
 v_cmp_gt_u32_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0]
 // W32: v_cmp_gt_u32_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x4c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
@@ -2710,128 +2800,143 @@ v_cmp_le_f32_e64_dpp ttmp[14:15], -v1, |v2| row_xmask:0 row_mask:0x1 bank_mask:0
 v_cmp_le_f32_e64_dpp null, -|v255|, -|v255| clamp row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
 // GFX12: v_cmp_le_f32_e64_dpp null, -|v255|, -|v255| clamp row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x83,0x13,0xd4,0xfa,0xfe,0x03,0x60,0xff,0x6f,0x05,0x30]
 
-v_cmp_le_i16_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0]
-// W32: v_cmp_le_i16_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_le_i16_e64_dpp s5, v1.l, v2.l quad_perm:[3,2,1,0]
+// W32: v_cmp_le_i16_e64_dpp s5, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_i16_e64_dpp s5, v1, s2 quad_perm:[3,2,1,0]
-// W32: v_cmp_le_i16_e64_dpp s5, v1, s2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x33,0xd4,0xfa,0x04,0x00,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_le_i16_e64_dpp s5, v1.l, s2 quad_perm:[3,2,1,0]
+// W32: v_cmp_le_i16_e64_dpp s5, v1.l, s2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x33,0xd4,0xfa,0x04,0x00,0x00,0x01,0x1b,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_i16_e64_dpp s5, v1, 10 quad_perm:[3,2,1,0]
-// W32: v_cmp_le_i16_e64_dpp s5, v1, 10 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x33,0xd4,0xfa,0x14,0x01,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_le_i16_e64_dpp s5, v1.l, 10 quad_perm:[3,2,1,0]
+// W32: v_cmp_le_i16_e64_dpp s5, v1.l, 10 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x33,0xd4,0xfa,0x14,0x01,0x00,0x01,0x1b,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_i16_e64_dpp s5, v1, v2 quad_perm:[0,1,2,3]
-// W32: v_cmp_le_i16_e64_dpp s5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+v_cmp_le_i16_e64_dpp s5, v1.l, v2.l quad_perm:[0,1,2,3]
+// W32: v_cmp_le_i16_e64_dpp s5, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_i16_e64_dpp s5, v1, v2 row_mirror
-// W32: v_cmp_le_i16_e64_dpp s5, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+v_cmp_le_i16_e64_dpp s5, v1.l, v2.l row_mirror
+// W32: v_cmp_le_i16_e64_dpp s5, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_i16_e64_dpp s5, v1, v2 row_half_mirror
-// W32: v_cmp_le_i16_e64_dpp s5, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+v_cmp_le_i16_e64_dpp s5, v1.l, v2.l row_half_mirror
+// W32: v_cmp_le_i16_e64_dpp s5, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_i16_e64_dpp s5, v1, v2 row_shl:1
-// W32: v_cmp_le_i16_e64_dpp s5, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+v_cmp_le_i16_e64_dpp s5, v1.l, v2.l row_shl:1
+// W32: v_cmp_le_i16_e64_dpp s5, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_i16_e64_dpp s5, v1, v2 row_shl:15
-// W32: v_cmp_le_i16_e64_dpp s5, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+v_cmp_le_i16_e64_dpp s5, v1.l, v2.l row_shl:15
+// W32: v_cmp_le_i16_e64_dpp s5, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_i16_e64_dpp s5, v1, v2 row_shr:1
-// W32: v_cmp_le_i16_e64_dpp s5, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+v_cmp_le_i16_e64_dpp s5, v1.l, v2.l row_shr:1
+// W32: v_cmp_le_i16_e64_dpp s5, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_i16_e64_dpp s5, v1, v2 row_shr:15
-// W32: v_cmp_le_i16_e64_dpp s5, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+v_cmp_le_i16_e64_dpp s5, v1.l, v2.l row_shr:15
+// W32: v_cmp_le_i16_e64_dpp s5, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_i16_e64_dpp s5, v1, v2 row_ror:1
-// W32: v_cmp_le_i16_e64_dpp s5, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+v_cmp_le_i16_e64_dpp s5, v1.l, v2.l row_ror:1
+// W32: v_cmp_le_i16_e64_dpp s5, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_i16_e64_dpp s105, v1, v2 row_ror:15
-// W32: v_cmp_le_i16_e64_dpp s105, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x69,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+v_cmp_le_i16_e64_dpp s105, v1.l, v2.l row_ror:15
+// W32: v_cmp_le_i16_e64_dpp s105, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x69,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_i16_e64_dpp vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W32: v_cmp_le_i16_e64_dpp vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+v_cmp_le_i16_e64_dpp vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_le_i16_e64_dpp vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_i16_e64_dpp vcc_hi, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W32: v_cmp_le_i16_e64_dpp vcc_hi, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6b,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+v_cmp_le_i16_e64_dpp vcc_hi, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_le_i16_e64_dpp vcc_hi, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6b,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_i16_e64_dpp ttmp15, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W32: v_cmp_le_i16_e64_dpp ttmp15, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7b,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+v_cmp_le_i16_e64_dpp ttmp15, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W32: v_cmp_le_i16_e64_dpp ttmp15, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7b,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_i16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0]
-// W64: v_cmp_le_i16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_le_i16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[3,2,1,0]
+// W64: v_cmp_le_i16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_i16_e64_dpp s[10:11], v1, s2 quad_perm:[3,2,1,0]
-// W64: v_cmp_le_i16_e64_dpp s[10:11], v1, s2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x00,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_le_i16_e64_dpp s[10:11], v1.l, s2 quad_perm:[3,2,1,0]
+// W64: v_cmp_le_i16_e64_dpp s[10:11], v1.l, s2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x00,0x00,0x01,0x1b,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_i16_e64_dpp s[10:11], v1, 10 quad_perm:[3,2,1,0]
-// W64: v_cmp_le_i16_e64_dpp s[10:11], v1, 10 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x14,0x01,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_le_i16_e64_dpp s[10:11], v1.l, 10 quad_perm:[3,2,1,0]
+// W64: v_cmp_le_i16_e64_dpp s[10:11], v1.l, 10 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x14,0x01,0x00,0x01,0x1b,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_i16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3]
-// W64: v_cmp_le_i16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+v_cmp_le_i16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[0,1,2,3]
+// W64: v_cmp_le_i16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_i16_e64_dpp s[10:11], v1, v2 row_mirror
-// W64: v_cmp_le_i16_e64_dpp s[10:11], v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+v_cmp_le_i16_e64_dpp s[10:11], v1.l, v2.l row_mirror
+// W64: v_cmp_le_i16_e64_dpp s[10:11], v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_i16_e64_dpp s[10:11], v1, v2 row_half_mirror
-// W64: v_cmp_le_i16_e64_dpp s[10:11], v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+v_cmp_le_i16_e64_dpp s[10:11], v1.l, v2.l row_half_mirror
+// W64: v_cmp_le_i16_e64_dpp s[10:11], v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_i16_e64_dpp s[10:11], v1, v2 row_shl:1
-// W64: v_cmp_le_i16_e64_dpp s[10:11], v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+v_cmp_le_i16_e64_dpp s[10:11], v1.l, v2.l row_shl:1
+// W64: v_cmp_le_i16_e64_dpp s[10:11], v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_i16_e64_dpp s[10:11], v1, v2 row_shl:15
-// W64: v_cmp_le_i16_e64_dpp s[10:11], v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+v_cmp_le_i16_e64_dpp s[10:11], v1.l, v2.l row_shl:15
+// W64: v_cmp_le_i16_e64_dpp s[10:11], v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_i16_e64_dpp s[10:11], v1, v2 row_shr:1
-// W64: v_cmp_le_i16_e64_dpp s[10:11], v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+v_cmp_le_i16_e64_dpp s[10:11], v1.l, v2.l row_shr:1
+// W64: v_cmp_le_i16_e64_dpp s[10:11], v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_i16_e64_dpp s[10:11], v1, v2 row_shr:15
-// W64: v_cmp_le_i16_e64_dpp s[10:11], v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+v_cmp_le_i16_e64_dpp s[10:11], v1.l, v2.l row_shr:15
+// W64: v_cmp_le_i16_e64_dpp s[10:11], v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_i16_e64_dpp s[10:11], v1, v2 row_ror:1
-// W64: v_cmp_le_i16_e64_dpp s[10:11], v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+v_cmp_le_i16_e64_dpp s[10:11], v1.l, v2.l row_ror:1
+// W64: v_cmp_le_i16_e64_dpp s[10:11], v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_i16_e64_dpp s[10:11], v1, v2 row_ror:15
-// W64: v_cmp_le_i16_e64_dpp s[10:11], v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+v_cmp_le_i16_e64_dpp s[10:11], v1.l, v2.l row_ror:15
+// W64: v_cmp_le_i16_e64_dpp s[10:11], v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_i16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W64: v_cmp_le_i16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+v_cmp_le_i16_e64_dpp s[104:105], v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_le_i16_e64_dpp s[104:105], v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_i16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W64: v_cmp_le_i16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+v_cmp_le_i16_e64_dpp vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W64: v_cmp_le_i16_e64_dpp vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_i16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W64: v_cmp_le_i16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+v_cmp_le_i16_e64_dpp ttmp[14:15], v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W64: v_cmp_le_i16_e64_dpp ttmp[14:15], v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_i16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
-// GFX12: v_cmp_le_i16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x00,0x33,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
+v_cmp_le_i16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// GFX12: v_cmp_le_i16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x00,0x33,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
+
+v_cmp_le_i16_e64_dpp null, v255.l, v255.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// GFX12: v_cmp_le_i16_e64_dpp null, v255.l, v255.h op_sel:[0,1] row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x10,0x33,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
+
+v_cmp_le_i16_e64_dpp ttmp15, v1.h, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W32: v_cmp_le_i16_e64_dpp ttmp15, v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7b,0x08,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_le_i16_e64_dpp ttmp[14:15], v1.h, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W64: v_cmp_le_i16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7a,0x08,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+// W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_le_i16_e64_dpp vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_le_i16_e64_dpp vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
 v_cmp_le_i32_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0]
 // W32: v_cmp_le_i32_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x43,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
@@ -2956,128 +3061,143 @@ v_cmp_le_i32_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3
 v_cmp_le_i32_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
 // GFX12: v_cmp_le_i32_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x00,0x43,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
 
-v_cmp_le_u16_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0]
-// W32: v_cmp_le_u16_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_le_u16_e64_dpp s5, v1.l, v2.l quad_perm:[3,2,1,0]
+// W32: v_cmp_le_u16_e64_dpp s5, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_u16_e64_dpp s5, v1, s2 quad_perm:[3,2,1,0]
-// W32: v_cmp_le_u16_e64_dpp s5, v1, s2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3b,0xd4,0xfa,0x04,0x00,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_le_u16_e64_dpp s5, v1.l, s2 quad_perm:[3,2,1,0]
+// W32: v_cmp_le_u16_e64_dpp s5, v1.l, s2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3b,0xd4,0xfa,0x04,0x00,0x00,0x01,0x1b,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_u16_e64_dpp s5, v1, 10 quad_perm:[3,2,1,0]
-// W32: v_cmp_le_u16_e64_dpp s5, v1, 10 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3b,0xd4,0xfa,0x14,0x01,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_le_u16_e64_dpp s5, v1.l, 10 quad_perm:[3,2,1,0]
+// W32: v_cmp_le_u16_e64_dpp s5, v1.l, 10 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3b,0xd4,0xfa,0x14,0x01,0x00,0x01,0x1b,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_u16_e64_dpp s5, v1, v2 quad_perm:[0,1,2,3]
-// W32: v_cmp_le_u16_e64_dpp s5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+v_cmp_le_u16_e64_dpp s5, v1.l, v2.l quad_perm:[0,1,2,3]
+// W32: v_cmp_le_u16_e64_dpp s5, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_u16_e64_dpp s5, v1, v2 row_mirror
-// W32: v_cmp_le_u16_e64_dpp s5, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+v_cmp_le_u16_e64_dpp s5, v1.l, v2.l row_mirror
+// W32: v_cmp_le_u16_e64_dpp s5, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_u16_e64_dpp s5, v1, v2 row_half_mirror
-// W32: v_cmp_le_u16_e64_dpp s5, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+v_cmp_le_u16_e64_dpp s5, v1.l, v2.l row_half_mirror
+// W32: v_cmp_le_u16_e64_dpp s5, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_u16_e64_dpp s5, v1, v2 row_shl:1
-// W32: v_cmp_le_u16_e64_dpp s5, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+v_cmp_le_u16_e64_dpp s5, v1.l, v2.l row_shl:1
+// W32: v_cmp_le_u16_e64_dpp s5, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_u16_e64_dpp s5, v1, v2 row_shl:15
-// W32: v_cmp_le_u16_e64_dpp s5, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+v_cmp_le_u16_e64_dpp s5, v1.l, v2.l row_shl:15
+// W32: v_cmp_le_u16_e64_dpp s5, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_u16_e64_dpp s5, v1, v2 row_shr:1
-// W32: v_cmp_le_u16_e64_dpp s5, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+v_cmp_le_u16_e64_dpp s5, v1.l, v2.l row_shr:1
+// W32: v_cmp_le_u16_e64_dpp s5, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_u16_e64_dpp s5, v1, v2 row_shr:15
-// W32: v_cmp_le_u16_e64_dpp s5, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+v_cmp_le_u16_e64_dpp s5, v1.l, v2.l row_shr:15
+// W32: v_cmp_le_u16_e64_dpp s5, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_u16_e64_dpp s5, v1, v2 row_ror:1
-// W32: v_cmp_le_u16_e64_dpp s5, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+v_cmp_le_u16_e64_dpp s5, v1.l, v2.l row_ror:1
+// W32: v_cmp_le_u16_e64_dpp s5, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_u16_e64_dpp s105, v1, v2 row_ror:15
-// W32: v_cmp_le_u16_e64_dpp s105, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x69,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+v_cmp_le_u16_e64_dpp s105, v1.l, v2.l row_ror:15
+// W32: v_cmp_le_u16_e64_dpp s105, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x69,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_u16_e64_dpp vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W32: v_cmp_le_u16_e64_dpp vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+v_cmp_le_u16_e64_dpp vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_le_u16_e64_dpp vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_u16_e64_dpp vcc_hi, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W32: v_cmp_le_u16_e64_dpp vcc_hi, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6b,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+v_cmp_le_u16_e64_dpp vcc_hi, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_le_u16_e64_dpp vcc_hi, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6b,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_u16_e64_dpp ttmp15, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W32: v_cmp_le_u16_e64_dpp ttmp15, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7b,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+v_cmp_le_u16_e64_dpp ttmp15, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W32: v_cmp_le_u16_e64_dpp ttmp15, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7b,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_u16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0]
-// W64: v_cmp_le_u16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_le_u16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[3,2,1,0]
+// W64: v_cmp_le_u16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_u16_e64_dpp s[10:11], v1, s2 quad_perm:[3,2,1,0]
-// W64: v_cmp_le_u16_e64_dpp s[10:11], v1, s2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x00,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_le_u16_e64_dpp s[10:11], v1.l, s2 quad_perm:[3,2,1,0]
+// W64: v_cmp_le_u16_e64_dpp s[10:11], v1.l, s2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x00,0x00,0x01,0x1b,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_u16_e64_dpp s[10:11], v1, 10 quad_perm:[3,2,1,0]
-// W64: v_cmp_le_u16_e64_dpp s[10:11], v1, 10 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x14,0x01,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_le_u16_e64_dpp s[10:11], v1.l, 10 quad_perm:[3,2,1,0]
+// W64: v_cmp_le_u16_e64_dpp s[10:11], v1.l, 10 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x14,0x01,0x00,0x01,0x1b,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_u16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3]
-// W64: v_cmp_le_u16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+v_cmp_le_u16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[0,1,2,3]
+// W64: v_cmp_le_u16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_u16_e64_dpp s[10:11], v1, v2 row_mirror
-// W64: v_cmp_le_u16_e64_dpp s[10:11], v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+v_cmp_le_u16_e64_dpp s[10:11], v1.l, v2.l row_mirror
+// W64: v_cmp_le_u16_e64_dpp s[10:11], v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_u16_e64_dpp s[10:11], v1, v2 row_half_mirror
-// W64: v_cmp_le_u16_e64_dpp s[10:11], v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+v_cmp_le_u16_e64_dpp s[10:11], v1.l, v2.l row_half_mirror
+// W64: v_cmp_le_u16_e64_dpp s[10:11], v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_u16_e64_dpp s[10:11], v1, v2 row_shl:1
-// W64: v_cmp_le_u16_e64_dpp s[10:11], v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+v_cmp_le_u16_e64_dpp s[10:11], v1.l, v2.l row_shl:1
+// W64: v_cmp_le_u16_e64_dpp s[10:11], v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_u16_e64_dpp s[10:11], v1, v2 row_shl:15
-// W64: v_cmp_le_u16_e64_dpp s[10:11], v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+v_cmp_le_u16_e64_dpp s[10:11], v1.l, v2.l row_shl:15
+// W64: v_cmp_le_u16_e64_dpp s[10:11], v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_u16_e64_dpp s[10:11], v1, v2 row_shr:1
-// W64: v_cmp_le_u16_e64_dpp s[10:11], v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+v_cmp_le_u16_e64_dpp s[10:11], v1.l, v2.l row_shr:1
+// W64: v_cmp_le_u16_e64_dpp s[10:11], v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_u16_e64_dpp s[10:11], v1, v2 row_shr:15
-// W64: v_cmp_le_u16_e64_dpp s[10:11], v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+v_cmp_le_u16_e64_dpp s[10:11], v1.l, v2.l row_shr:15
+// W64: v_cmp_le_u16_e64_dpp s[10:11], v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_u16_e64_dpp s[10:11], v1, v2 row_ror:1
-// W64: v_cmp_le_u16_e64_dpp s[10:11], v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+v_cmp_le_u16_e64_dpp s[10:11], v1.l, v2.l row_ror:1
+// W64: v_cmp_le_u16_e64_dpp s[10:11], v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_u16_e64_dpp s[10:11], v1, v2 row_ror:15
-// W64: v_cmp_le_u16_e64_dpp s[10:11], v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+v_cmp_le_u16_e64_dpp s[10:11], v1.l, v2.l row_ror:15
+// W64: v_cmp_le_u16_e64_dpp s[10:11], v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_u16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W64: v_cmp_le_u16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+v_cmp_le_u16_e64_dpp s[104:105], v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_le_u16_e64_dpp s[104:105], v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_u16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W64: v_cmp_le_u16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+v_cmp_le_u16_e64_dpp vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W64: v_cmp_le_u16_e64_dpp vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_u16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W64: v_cmp_le_u16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+v_cmp_le_u16_e64_dpp ttmp[14:15], v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W64: v_cmp_le_u16_e64_dpp ttmp[14:15], v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_u16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
-// GFX12: v_cmp_le_u16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x00,0x3b,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
+v_cmp_le_u16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// GFX12: v_cmp_le_u16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x00,0x3b,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
+
+v_cmp_le_u16_e64_dpp null, v255.l, v255.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// GFX12: v_cmp_le_u16_e64_dpp null, v255.l, v255.h op_sel:[0,1] row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x10,0x3b,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
+
+v_cmp_le_u16_e64_dpp ttmp15, v1.h, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W32: v_cmp_le_u16_e64_dpp ttmp15, v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7b,0x08,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_le_u16_e64_dpp ttmp[14:15], v1.h, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W64: v_cmp_le_u16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7a,0x08,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+// W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_le_u16_e64_dpp vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_le_u16_e64_dpp vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
 v_cmp_le_u32_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0]
 // W32: v_cmp_le_u32_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x4b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
@@ -3709,128 +3829,143 @@ v_cmp_lt_f32_e64_dpp ttmp[14:15], -v1, |v2| row_xmask:0 row_mask:0x1 bank_mask:0
 v_cmp_lt_f32_e64_dpp null, -|v255|, -|v255| clamp row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
 // GFX12: v_cmp_lt_f32_e64_dpp null, -|v255|, -|v255| clamp row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x83,0x11,0xd4,0xfa,0xfe,0x03,0x60,0xff,0x6f,0x05,0x30]
 
-v_cmp_lt_i16_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0]
-// W32: v_cmp_lt_i16_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_lt_i16_e64_dpp s5, v1.l, v2.l quad_perm:[3,2,1,0]
+// W32: v_cmp_lt_i16_e64_dpp s5, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_i16_e64_dpp s5, v1, s2 quad_perm:[3,2,1,0]
-// W32: v_cmp_lt_i16_e64_dpp s5, v1, s2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x31,0xd4,0xfa,0x04,0x00,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_lt_i16_e64_dpp s5, v1.l, s2 quad_perm:[3,2,1,0]
+// W32: v_cmp_lt_i16_e64_dpp s5, v1.l, s2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x31,0xd4,0xfa,0x04,0x00,0x00,0x01,0x1b,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_i16_e64_dpp s5, v1, 10 quad_perm:[3,2,1,0]
-// W32: v_cmp_lt_i16_e64_dpp s5, v1, 10 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x31,0xd4,0xfa,0x14,0x01,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_lt_i16_e64_dpp s5, v1.l, 10 quad_perm:[3,2,1,0]
+// W32: v_cmp_lt_i16_e64_dpp s5, v1.l, 10 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x31,0xd4,0xfa,0x14,0x01,0x00,0x01,0x1b,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_i16_e64_dpp s5, v1, v2 quad_perm:[0,1,2,3]
-// W32: v_cmp_lt_i16_e64_dpp s5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+v_cmp_lt_i16_e64_dpp s5, v1.l, v2.l quad_perm:[0,1,2,3]
+// W32: v_cmp_lt_i16_e64_dpp s5, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_i16_e64_dpp s5, v1, v2 row_mirror
-// W32: v_cmp_lt_i16_e64_dpp s5, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+v_cmp_lt_i16_e64_dpp s5, v1.l, v2.l row_mirror
+// W32: v_cmp_lt_i16_e64_dpp s5, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_i16_e64_dpp s5, v1, v2 row_half_mirror
-// W32: v_cmp_lt_i16_e64_dpp s5, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+v_cmp_lt_i16_e64_dpp s5, v1.l, v2.l row_half_mirror
+// W32: v_cmp_lt_i16_e64_dpp s5, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_i16_e64_dpp s5, v1, v2 row_shl:1
-// W32: v_cmp_lt_i16_e64_dpp s5, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+v_cmp_lt_i16_e64_dpp s5, v1.l, v2.l row_shl:1
+// W32: v_cmp_lt_i16_e64_dpp s5, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_i16_e64_dpp s5, v1, v2 row_shl:15
-// W32: v_cmp_lt_i16_e64_dpp s5, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+v_cmp_lt_i16_e64_dpp s5, v1.l, v2.l row_shl:15
+// W32: v_cmp_lt_i16_e64_dpp s5, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_i16_e64_dpp s5, v1, v2 row_shr:1
-// W32: v_cmp_lt_i16_e64_dpp s5, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+v_cmp_lt_i16_e64_dpp s5, v1.l, v2.l row_shr:1
+// W32: v_cmp_lt_i16_e64_dpp s5, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_i16_e64_dpp s5, v1, v2 row_shr:15
-// W32: v_cmp_lt_i16_e64_dpp s5, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+v_cmp_lt_i16_e64_dpp s5, v1.l, v2.l row_shr:15
+// W32: v_cmp_lt_i16_e64_dpp s5, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_i16_e64_dpp s5, v1, v2 row_ror:1
-// W32: v_cmp_lt_i16_e64_dpp s5, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+v_cmp_lt_i16_e64_dpp s5, v1.l, v2.l row_ror:1
+// W32: v_cmp_lt_i16_e64_dpp s5, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_i16_e64_dpp s105, v1, v2 row_ror:15
-// W32: v_cmp_lt_i16_e64_dpp s105, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x69,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+v_cmp_lt_i16_e64_dpp s105, v1.l, v2.l row_ror:15
+// W32: v_cmp_lt_i16_e64_dpp s105, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x69,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_i16_e64_dpp vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W32: v_cmp_lt_i16_e64_dpp vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+v_cmp_lt_i16_e64_dpp vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_lt_i16_e64_dpp vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_i16_e64_dpp vcc_hi, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W32: v_cmp_lt_i16_e64_dpp vcc_hi, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6b,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+v_cmp_lt_i16_e64_dpp vcc_hi, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_lt_i16_e64_dpp vcc_hi, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6b,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_i16_e64_dpp ttmp15, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W32: v_cmp_lt_i16_e64_dpp ttmp15, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7b,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+v_cmp_lt_i16_e64_dpp ttmp15, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W32: v_cmp_lt_i16_e64_dpp ttmp15, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7b,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0]
-// W64: v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_lt_i16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[3,2,1,0]
+// W64: v_cmp_lt_i16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_lt_i16_e64_dpp s[10:11], v1.l, s2 quad_perm:[3,2,1,0]
+// W64: v_cmp_lt_i16_e64_dpp s[10:11], v1.l, s2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x00,0x00,0x01,0x1b,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_i16_e64_dpp s[10:11], v1, s2 quad_perm:[3,2,1,0]
-// W64: v_cmp_lt_i16_e64_dpp s[10:11], v1, s2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x00,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_lt_i16_e64_dpp s[10:11], v1.l, 10 quad_perm:[3,2,1,0]
+// W64: v_cmp_lt_i16_e64_dpp s[10:11], v1.l, 10 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x14,0x01,0x00,0x01,0x1b,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_i16_e64_dpp s[10:11], v1, 10 quad_perm:[3,2,1,0]
-// W64: v_cmp_lt_i16_e64_dpp s[10:11], v1, 10 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x14,0x01,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_lt_i16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[0,1,2,3]
+// W64: v_cmp_lt_i16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3]
-// W64: v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+v_cmp_lt_i16_e64_dpp s[10:11], v1.l, v2.l row_mirror
+// W64: v_cmp_lt_i16_e64_dpp s[10:11], v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 row_mirror
-// W64: v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+v_cmp_lt_i16_e64_dpp s[10:11], v1.l, v2.l row_half_mirror
+// W64: v_cmp_lt_i16_e64_dpp s[10:11], v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 row_half_mirror
-// W64: v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+v_cmp_lt_i16_e64_dpp s[10:11], v1.l, v2.l row_shl:1
+// W64: v_cmp_lt_i16_e64_dpp s[10:11], v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 row_shl:1
-// W64: v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+v_cmp_lt_i16_e64_dpp s[10:11], v1.l, v2.l row_shl:15
+// W64: v_cmp_lt_i16_e64_dpp s[10:11], v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 row_shl:15
-// W64: v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+v_cmp_lt_i16_e64_dpp s[10:11], v1.l, v2.l row_shr:1
+// W64: v_cmp_lt_i16_e64_dpp s[10:11], v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 row_shr:1
-// W64: v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+v_cmp_lt_i16_e64_dpp s[10:11], v1.l, v2.l row_shr:15
+// W64: v_cmp_lt_i16_e64_dpp s[10:11], v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 row_shr:15
-// W64: v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+v_cmp_lt_i16_e64_dpp s[10:11], v1.l, v2.l row_ror:1
+// W64: v_cmp_lt_i16_e64_dpp s[10:11], v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 row_ror:1
-// W64: v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+v_cmp_lt_i16_e64_dpp s[10:11], v1.l, v2.l row_ror:15
+// W64: v_cmp_lt_i16_e64_dpp s[10:11], v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 row_ror:15
-// W64: v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+v_cmp_lt_i16_e64_dpp s[104:105], v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_lt_i16_e64_dpp s[104:105], v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_i16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W64: v_cmp_lt_i16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+v_cmp_lt_i16_e64_dpp vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W64: v_cmp_lt_i16_e64_dpp vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_i16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W64: v_cmp_lt_i16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+v_cmp_lt_i16_e64_dpp ttmp[14:15], v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W64: v_cmp_lt_i16_e64_dpp ttmp[14:15], v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_i16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W64: v_cmp_lt_i16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+v_cmp_lt_i16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// GFX12: v_cmp_lt_i16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x00,0x31,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
+
+v_cmp_lt_i16_e64_dpp null, v255.l, v255.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// GFX12: v_cmp_lt_i16_e64_dpp null, v255.l, v255.h op_sel:[0,1] row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x10,0x31,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
+
+v_cmp_lt_i16_e64_dpp ttmp15, v1.h, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W32: v_cmp_lt_i16_e64_dpp ttmp15, v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7b,0x08,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_lt_i16_e64_dpp ttmp[14:15], v1.h, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W64: v_cmp_lt_i16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7a,0x08,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_i16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
-// GFX12: v_cmp_lt_i16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x00,0x31,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
+v_cmp_lt_i16_e64_dpp vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_lt_i16_e64_dpp vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
 v_cmp_lt_i32_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0]
 // W32: v_cmp_lt_i32_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x41,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
@@ -3955,128 +4090,143 @@ v_cmp_lt_i32_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3
 v_cmp_lt_i32_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
 // GFX12: v_cmp_lt_i32_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x00,0x41,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
 
-v_cmp_lt_u16_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0]
-// W32: v_cmp_lt_u16_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_lt_u16_e64_dpp s5, v1.l, v2.l quad_perm:[3,2,1,0]
+// W32: v_cmp_lt_u16_e64_dpp s5, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_u16_e64_dpp s5, v1, s2 quad_perm:[3,2,1,0]
-// W32: v_cmp_lt_u16_e64_dpp s5, v1, s2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x39,0xd4,0xfa,0x04,0x00,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_lt_u16_e64_dpp s5, v1.l, s2 quad_perm:[3,2,1,0]
+// W32: v_cmp_lt_u16_e64_dpp s5, v1.l, s2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x39,0xd4,0xfa,0x04,0x00,0x00,0x01,0x1b,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_u16_e64_dpp s5, v1, 10 quad_perm:[3,2,1,0]
-// W32: v_cmp_lt_u16_e64_dpp s5, v1, 10 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x39,0xd4,0xfa,0x14,0x01,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_lt_u16_e64_dpp s5, v1.l, 10 quad_perm:[3,2,1,0]
+// W32: v_cmp_lt_u16_e64_dpp s5, v1.l, 10 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x39,0xd4,0xfa,0x14,0x01,0x00,0x01,0x1b,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_u16_e64_dpp s5, v1, v2 quad_perm:[0,1,2,3]
-// W32: v_cmp_lt_u16_e64_dpp s5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+v_cmp_lt_u16_e64_dpp s5, v1.l, v2.l quad_perm:[0,1,2,3]
+// W32: v_cmp_lt_u16_e64_dpp s5, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_u16_e64_dpp s5, v1, v2 row_mirror
-// W32: v_cmp_lt_u16_e64_dpp s5, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+v_cmp_lt_u16_e64_dpp s5, v1.l, v2.l row_mirror
+// W32: v_cmp_lt_u16_e64_dpp s5, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_u16_e64_dpp s5, v1, v2 row_half_mirror
-// W32: v_cmp_lt_u16_e64_dpp s5, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+v_cmp_lt_u16_e64_dpp s5, v1.l, v2.l row_half_mirror
+// W32: v_cmp_lt_u16_e64_dpp s5, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_u16_e64_dpp s5, v1, v2 row_shl:1
-// W32: v_cmp_lt_u16_e64_dpp s5, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+v_cmp_lt_u16_e64_dpp s5, v1.l, v2.l row_shl:1
+// W32: v_cmp_lt_u16_e64_dpp s5, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_u16_e64_dpp s5, v1, v2 row_shl:15
-// W32: v_cmp_lt_u16_e64_dpp s5, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+v_cmp_lt_u16_e64_dpp s5, v1.l, v2.l row_shl:15
+// W32: v_cmp_lt_u16_e64_dpp s5, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_u16_e64_dpp s5, v1, v2 row_shr:1
-// W32: v_cmp_lt_u16_e64_dpp s5, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+v_cmp_lt_u16_e64_dpp s5, v1.l, v2.l row_shr:1
+// W32: v_cmp_lt_u16_e64_dpp s5, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_u16_e64_dpp s5, v1, v2 row_shr:15
-// W32: v_cmp_lt_u16_e64_dpp s5, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+v_cmp_lt_u16_e64_dpp s5, v1.l, v2.l row_shr:15
+// W32: v_cmp_lt_u16_e64_dpp s5, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_u16_e64_dpp s5, v1, v2 row_ror:1
-// W32: v_cmp_lt_u16_e64_dpp s5, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+v_cmp_lt_u16_e64_dpp s5, v1.l, v2.l row_ror:1
+// W32: v_cmp_lt_u16_e64_dpp s5, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_u16_e64_dpp s105, v1, v2 row_ror:15
-// W32: v_cmp_lt_u16_e64_dpp s105, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x69,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+v_cmp_lt_u16_e64_dpp s105, v1.l, v2.l row_ror:15
+// W32: v_cmp_lt_u16_e64_dpp s105, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x69,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_u16_e64_dpp vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W32: v_cmp_lt_u16_e64_dpp vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+v_cmp_lt_u16_e64_dpp vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_lt_u16_e64_dpp vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_u16_e64_dpp vcc_hi, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W32: v_cmp_lt_u16_e64_dpp vcc_hi, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6b,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+v_cmp_lt_u16_e64_dpp vcc_hi, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_lt_u16_e64_dpp vcc_hi, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6b,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_u16_e64_dpp ttmp15, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W32: v_cmp_lt_u16_e64_dpp ttmp15, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7b,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+v_cmp_lt_u16_e64_dpp ttmp15, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W32: v_cmp_lt_u16_e64_dpp ttmp15, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7b,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0]
-// W64: v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_lt_u16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[3,2,1,0]
+// W64: v_cmp_lt_u16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_u16_e64_dpp s[10:11], v1, s2 quad_perm:[3,2,1,0]
-// W64: v_cmp_lt_u16_e64_dpp s[10:11], v1, s2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x00,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_lt_u16_e64_dpp s[10:11], v1.l, s2 quad_perm:[3,2,1,0]
+// W64: v_cmp_lt_u16_e64_dpp s[10:11], v1.l, s2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x00,0x00,0x01,0x1b,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_u16_e64_dpp s[10:11], v1, 10 quad_perm:[3,2,1,0]
-// W64: v_cmp_lt_u16_e64_dpp s[10:11], v1, 10 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x14,0x01,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_lt_u16_e64_dpp s[10:11], v1.l, 10 quad_perm:[3,2,1,0]
+// W64: v_cmp_lt_u16_e64_dpp s[10:11], v1.l, 10 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x14,0x01,0x00,0x01,0x1b,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3]
-// W64: v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+v_cmp_lt_u16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[0,1,2,3]
+// W64: v_cmp_lt_u16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 row_mirror
-// W64: v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+v_cmp_lt_u16_e64_dpp s[10:11], v1.l, v2.l row_mirror
+// W64: v_cmp_lt_u16_e64_dpp s[10:11], v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 row_half_mirror
-// W64: v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+v_cmp_lt_u16_e64_dpp s[10:11], v1.l, v2.l row_half_mirror
+// W64: v_cmp_lt_u16_e64_dpp s[10:11], v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 row_shl:1
-// W64: v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+v_cmp_lt_u16_e64_dpp s[10:11], v1.l, v2.l row_shl:1
+// W64: v_cmp_lt_u16_e64_dpp s[10:11], v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 row_shl:15
-// W64: v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+v_cmp_lt_u16_e64_dpp s[10:11], v1.l, v2.l row_shl:15
+// W64: v_cmp_lt_u16_e64_dpp s[10:11], v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 row_shr:1
-// W64: v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+v_cmp_lt_u16_e64_dpp s[10:11], v1.l, v2.l row_shr:1
+// W64: v_cmp_lt_u16_e64_dpp s[10:11], v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 row_shr:15
-// W64: v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+v_cmp_lt_u16_e64_dpp s[10:11], v1.l, v2.l row_shr:15
+// W64: v_cmp_lt_u16_e64_dpp s[10:11], v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 row_ror:1
-// W64: v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+v_cmp_lt_u16_e64_dpp s[10:11], v1.l, v2.l row_ror:1
+// W64: v_cmp_lt_u16_e64_dpp s[10:11], v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 row_ror:15
-// W64: v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+v_cmp_lt_u16_e64_dpp s[10:11], v1.l, v2.l row_ror:15
+// W64: v_cmp_lt_u16_e64_dpp s[10:11], v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_u16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W64: v_cmp_lt_u16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+v_cmp_lt_u16_e64_dpp s[104:105], v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_lt_u16_e64_dpp s[104:105], v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_u16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W64: v_cmp_lt_u16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+v_cmp_lt_u16_e64_dpp vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W64: v_cmp_lt_u16_e64_dpp vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_u16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W64: v_cmp_lt_u16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+v_cmp_lt_u16_e64_dpp ttmp[14:15], v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W64: v_cmp_lt_u16_e64_dpp ttmp[14:15], v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_u16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
-// GFX12: v_cmp_lt_u16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x00,0x39,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
+v_cmp_lt_u16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// GFX12: v_cmp_lt_u16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x00,0x39,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
+
+v_cmp_lt_u16_e64_dpp null, v255.l, v255.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// GFX12: v_cmp_lt_u16_e64_dpp null, v255.l, v255.h op_sel:[0,1] row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x10,0x39,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
+
+v_cmp_lt_u16_e64_dpp ttmp15, v1.h, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W32: v_cmp_lt_u16_e64_dpp ttmp15, v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7b,0x08,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_lt_u16_e64_dpp ttmp[14:15], v1.h, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W64: v_cmp_lt_u16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7a,0x08,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+// W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_lt_u16_e64_dpp vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_lt_u16_e64_dpp vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
 v_cmp_lt_u32_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0]
 // W32: v_cmp_lt_u32_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x49,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
@@ -4201,128 +4351,143 @@ v_cmp_lt_u32_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3
 v_cmp_lt_u32_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
 // GFX12: v_cmp_lt_u32_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x00,0x49,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
 
-v_cmp_ne_i16_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0]
-// W32: v_cmp_ne_i16_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_ne_i16_e64_dpp s5, v1.l, v2.l quad_perm:[3,2,1,0]
+// W32: v_cmp_ne_i16_e64_dpp s5, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_i16_e64_dpp s5, v1, s2 quad_perm:[3,2,1,0]
-// W32: v_cmp_ne_i16_e64_dpp s5, v1, s2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x35,0xd4,0xfa,0x04,0x00,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_ne_i16_e64_dpp s5, v1.l, s2 quad_perm:[3,2,1,0]
+// W32: v_cmp_ne_i16_e64_dpp s5, v1.l, s2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x35,0xd4,0xfa,0x04,0x00,0x00,0x01,0x1b,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_i16_e64_dpp s5, v1, 10 quad_perm:[3,2,1,0]
-// W32: v_cmp_ne_i16_e64_dpp s5, v1, 10 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x35,0xd4,0xfa,0x14,0x01,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_ne_i16_e64_dpp s5, v1.l, 10 quad_perm:[3,2,1,0]
+// W32: v_cmp_ne_i16_e64_dpp s5, v1.l, 10 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x35,0xd4,0xfa,0x14,0x01,0x00,0x01,0x1b,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_i16_e64_dpp s5, v1, v2 quad_perm:[0,1,2,3]
-// W32: v_cmp_ne_i16_e64_dpp s5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+v_cmp_ne_i16_e64_dpp s5, v1.l, v2.l quad_perm:[0,1,2,3]
+// W32: v_cmp_ne_i16_e64_dpp s5, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_i16_e64_dpp s5, v1, v2 row_mirror
-// W32: v_cmp_ne_i16_e64_dpp s5, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+v_cmp_ne_i16_e64_dpp s5, v1.l, v2.l row_mirror
+// W32: v_cmp_ne_i16_e64_dpp s5, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_i16_e64_dpp s5, v1, v2 row_half_mirror
-// W32: v_cmp_ne_i16_e64_dpp s5, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+v_cmp_ne_i16_e64_dpp s5, v1.l, v2.l row_half_mirror
+// W32: v_cmp_ne_i16_e64_dpp s5, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_i16_e64_dpp s5, v1, v2 row_shl:1
-// W32: v_cmp_ne_i16_e64_dpp s5, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+v_cmp_ne_i16_e64_dpp s5, v1.l, v2.l row_shl:1
+// W32: v_cmp_ne_i16_e64_dpp s5, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_i16_e64_dpp s5, v1, v2 row_shl:15
-// W32: v_cmp_ne_i16_e64_dpp s5, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+v_cmp_ne_i16_e64_dpp s5, v1.l, v2.l row_shl:15
+// W32: v_cmp_ne_i16_e64_dpp s5, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_i16_e64_dpp s5, v1, v2 row_shr:1
-// W32: v_cmp_ne_i16_e64_dpp s5, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+v_cmp_ne_i16_e64_dpp s5, v1.l, v2.l row_shr:1
+// W32: v_cmp_ne_i16_e64_dpp s5, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_i16_e64_dpp s5, v1, v2 row_shr:15
-// W32: v_cmp_ne_i16_e64_dpp s5, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+v_cmp_ne_i16_e64_dpp s5, v1.l, v2.l row_shr:15
+// W32: v_cmp_ne_i16_e64_dpp s5, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_i16_e64_dpp s5, v1, v2 row_ror:1
-// W32: v_cmp_ne_i16_e64_dpp s5, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+v_cmp_ne_i16_e64_dpp s5, v1.l, v2.l row_ror:1
+// W32: v_cmp_ne_i16_e64_dpp s5, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_i16_e64_dpp s105, v1, v2 row_ror:15
-// W32: v_cmp_ne_i16_e64_dpp s105, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x69,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+v_cmp_ne_i16_e64_dpp s105, v1.l, v2.l row_ror:15
+// W32: v_cmp_ne_i16_e64_dpp s105, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x69,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_i16_e64_dpp vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W32: v_cmp_ne_i16_e64_dpp vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+v_cmp_ne_i16_e64_dpp vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ne_i16_e64_dpp vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_i16_e64_dpp vcc_hi, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W32: v_cmp_ne_i16_e64_dpp vcc_hi, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6b,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+v_cmp_ne_i16_e64_dpp vcc_hi, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_ne_i16_e64_dpp vcc_hi, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6b,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_i16_e64_dpp ttmp15, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W32: v_cmp_ne_i16_e64_dpp ttmp15, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7b,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+v_cmp_ne_i16_e64_dpp ttmp15, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W32: v_cmp_ne_i16_e64_dpp ttmp15, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7b,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0]
-// W64: v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_ne_i16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[3,2,1,0]
+// W64: v_cmp_ne_i16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_i16_e64_dpp s[10:11], v1, s2 quad_perm:[3,2,1,0]
-// W64: v_cmp_ne_i16_e64_dpp s[10:11], v1, s2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x00,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_ne_i16_e64_dpp s[10:11], v1.l, s2 quad_perm:[3,2,1,0]
+// W64: v_cmp_ne_i16_e64_dpp s[10:11], v1.l, s2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x00,0x00,0x01,0x1b,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_i16_e64_dpp s[10:11], v1, 10 quad_perm:[3,2,1,0]
-// W64: v_cmp_ne_i16_e64_dpp s[10:11], v1, 10 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x14,0x01,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_ne_i16_e64_dpp s[10:11], v1.l, 10 quad_perm:[3,2,1,0]
+// W64: v_cmp_ne_i16_e64_dpp s[10:11], v1.l, 10 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x14,0x01,0x00,0x01,0x1b,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3]
-// W64: v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+v_cmp_ne_i16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[0,1,2,3]
+// W64: v_cmp_ne_i16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 row_mirror
-// W64: v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+v_cmp_ne_i16_e64_dpp s[10:11], v1.l, v2.l row_mirror
+// W64: v_cmp_ne_i16_e64_dpp s[10:11], v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 row_half_mirror
-// W64: v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+v_cmp_ne_i16_e64_dpp s[10:11], v1.l, v2.l row_half_mirror
+// W64: v_cmp_ne_i16_e64_dpp s[10:11], v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 row_shl:1
-// W64: v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+v_cmp_ne_i16_e64_dpp s[10:11], v1.l, v2.l row_shl:1
+// W64: v_cmp_ne_i16_e64_dpp s[10:11], v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 row_shl:15
-// W64: v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+v_cmp_ne_i16_e64_dpp s[10:11], v1.l, v2.l row_shl:15
+// W64: v_cmp_ne_i16_e64_dpp s[10:11], v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 row_shr:1
-// W64: v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+v_cmp_ne_i16_e64_dpp s[10:11], v1.l, v2.l row_shr:1
+// W64: v_cmp_ne_i16_e64_dpp s[10:11], v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 row_shr:15
-// W64: v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+v_cmp_ne_i16_e64_dpp s[10:11], v1.l, v2.l row_shr:15
+// W64: v_cmp_ne_i16_e64_dpp s[10:11], v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 row_ror:1
-// W64: v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+v_cmp_ne_i16_e64_dpp s[10:11], v1.l, v2.l row_ror:1
+// W64: v_cmp_ne_i16_e64_dpp s[10:11], v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 row_ror:15
-// W64: v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+v_cmp_ne_i16_e64_dpp s[10:11], v1.l, v2.l row_ror:15
+// W64: v_cmp_ne_i16_e64_dpp s[10:11], v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_i16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W64: v_cmp_ne_i16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+v_cmp_ne_i16_e64_dpp s[104:105], v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ne_i16_e64_dpp s[104:105], v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_i16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W64: v_cmp_ne_i16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+v_cmp_ne_i16_e64_dpp vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W64: v_cmp_ne_i16_e64_dpp vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_i16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W64: v_cmp_ne_i16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+v_cmp_ne_i16_e64_dpp ttmp[14:15], v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W64: v_cmp_ne_i16_e64_dpp ttmp[14:15], v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_i16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
-// GFX12: v_cmp_ne_i16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x00,0x35,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
+v_cmp_ne_i16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// GFX12: v_cmp_ne_i16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x00,0x35,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
+
+v_cmp_ne_i16_e64_dpp null, v255.l, v255.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// GFX12: v_cmp_ne_i16_e64_dpp null, v255.l, v255.h op_sel:[0,1] row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x10,0x35,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
+
+v_cmp_ne_i16_e64_dpp ttmp15, v1.h, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W32: v_cmp_ne_i16_e64_dpp ttmp15, v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7b,0x08,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_ne_i16_e64_dpp ttmp[14:15], v1.h, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W64: v_cmp_ne_i16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7a,0x08,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+// W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_ne_i16_e64_dpp vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_ne_i16_e64_dpp vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
 v_cmp_ne_i32_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0]
 // W32: v_cmp_ne_i32_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x45,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
@@ -4447,128 +4612,143 @@ v_cmp_ne_i32_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3
 v_cmp_ne_i32_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
 // GFX12: v_cmp_ne_i32_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x00,0x45,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
 
-v_cmp_ne_u16_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0]
-// W32: v_cmp_ne_u16_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_ne_u16_e64_dpp s5, v1.l, v2.l quad_perm:[3,2,1,0]
+// W32: v_cmp_ne_u16_e64_dpp s5, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_u16_e64_dpp s5, v1, s2 quad_perm:[3,2,1,0]
-// W32: v_cmp_ne_u16_e64_dpp s5, v1, s2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3d,0xd4,0xfa,0x04,0x00,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_ne_u16_e64_dpp s5, v1.l, s2 quad_perm:[3,2,1,0]
+// W32: v_cmp_ne_u16_e64_dpp s5, v1.l, s2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3d,0xd4,0xfa,0x04,0x00,0x00,0x01,0x1b,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_u16_e64_dpp s5, v1, 10 quad_perm:[3,2,1,0]
-// W32: v_cmp_ne_u16_e64_dpp s5, v1, 10 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3d,0xd4,0xfa,0x14,0x01,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_ne_u16_e64_dpp s5, v1.l, 10 quad_perm:[3,2,1,0]
+// W32: v_cmp_ne_u16_e64_dpp s5, v1.l, 10 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3d,0xd4,0xfa,0x14,0x01,0x00,0x01,0x1b,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_u16_e64_dpp s5, v1, v2 quad_perm:[0,1,2,3]
-// W32: v_cmp_ne_u16_e64_dpp s5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+v_cmp_ne_u16_e64_dpp s5, v1.l, v2.l quad_perm:[0,1,2,3]
+// W32: v_cmp_ne_u16_e64_dpp s5, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_u16_e64_dpp s5, v1, v2 row_mirror
-// W32: v_cmp_ne_u16_e64_dpp s5, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+v_cmp_ne_u16_e64_dpp s5, v1.l, v2.l row_mirror
+// W32: v_cmp_ne_u16_e64_dpp s5, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_u16_e64_dpp s5, v1, v2 row_half_mirror
-// W32: v_cmp_ne_u16_e64_dpp s5, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+v_cmp_ne_u16_e64_dpp s5, v1.l, v2.l row_half_mirror
+// W32: v_cmp_ne_u16_e64_dpp s5, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_u16_e64_dpp s5, v1, v2 row_shl:1
-// W32: v_cmp_ne_u16_e64_dpp s5, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+v_cmp_ne_u16_e64_dpp s5, v1.l, v2.l row_shl:1
+// W32: v_cmp_ne_u16_e64_dpp s5, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_u16_e64_dpp s5, v1, v2 row_shl:15
-// W32: v_cmp_ne_u16_e64_dpp s5, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+v_cmp_ne_u16_e64_dpp s5, v1.l, v2.l row_shl:15
+// W32: v_cmp_ne_u16_e64_dpp s5, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_u16_e64_dpp s5, v1, v2 row_shr:1
-// W32: v_cmp_ne_u16_e64_dpp s5, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+v_cmp_ne_u16_e64_dpp s5, v1.l, v2.l row_shr:1
+// W32: v_cmp_ne_u16_e64_dpp s5, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_u16_e64_dpp s5, v1, v2 row_shr:15
-// W32: v_cmp_ne_u16_e64_dpp s5, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+v_cmp_ne_u16_e64_dpp s5, v1.l, v2.l row_shr:15
+// W32: v_cmp_ne_u16_e64_dpp s5, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_u16_e64_dpp s5, v1, v2 row_ror:1
-// W32: v_cmp_ne_u16_e64_dpp s5, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+v_cmp_ne_u16_e64_dpp s5, v1.l, v2.l row_ror:1
+// W32: v_cmp_ne_u16_e64_dpp s5, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_u16_e64_dpp s105, v1, v2 row_ror:15
-// W32: v_cmp_ne_u16_e64_dpp s105, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x69,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+v_cmp_ne_u16_e64_dpp s105, v1.l, v2.l row_ror:15
+// W32: v_cmp_ne_u16_e64_dpp s105, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x69,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_u16_e64_dpp vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W32: v_cmp_ne_u16_e64_dpp vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+v_cmp_ne_u16_e64_dpp vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ne_u16_e64_dpp vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_u16_e64_dpp vcc_hi, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W32: v_cmp_ne_u16_e64_dpp vcc_hi, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6b,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+v_cmp_ne_u16_e64_dpp vcc_hi, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_ne_u16_e64_dpp vcc_hi, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6b,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_u16_e64_dpp ttmp15, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W32: v_cmp_ne_u16_e64_dpp ttmp15, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7b,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+v_cmp_ne_u16_e64_dpp ttmp15, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W32: v_cmp_ne_u16_e64_dpp ttmp15, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7b,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0]
-// W64: v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_ne_u16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[3,2,1,0]
+// W64: v_cmp_ne_u16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_ne_u16_e64_dpp s[10:11], v1.l, s2 quad_perm:[3,2,1,0]
+// W64: v_cmp_ne_u16_e64_dpp s[10:11], v1.l, s2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x00,0x00,0x01,0x1b,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_u16_e64_dpp s[10:11], v1, s2 quad_perm:[3,2,1,0]
-// W64: v_cmp_ne_u16_e64_dpp s[10:11], v1, s2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x00,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_ne_u16_e64_dpp s[10:11], v1.l, 10 quad_perm:[3,2,1,0]
+// W64: v_cmp_ne_u16_e64_dpp s[10:11], v1.l, 10 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x14,0x01,0x00,0x01,0x1b,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_u16_e64_dpp s[10:11], v1, 10 quad_perm:[3,2,1,0]
-// W64: v_cmp_ne_u16_e64_dpp s[10:11], v1, 10 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x14,0x01,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_ne_u16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[0,1,2,3]
+// W64: v_cmp_ne_u16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3]
-// W64: v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+v_cmp_ne_u16_e64_dpp s[10:11], v1.l, v2.l row_mirror
+// W64: v_cmp_ne_u16_e64_dpp s[10:11], v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 row_mirror
-// W64: v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+v_cmp_ne_u16_e64_dpp s[10:11], v1.l, v2.l row_half_mirror
+// W64: v_cmp_ne_u16_e64_dpp s[10:11], v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 row_half_mirror
-// W64: v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+v_cmp_ne_u16_e64_dpp s[10:11], v1.l, v2.l row_shl:1
+// W64: v_cmp_ne_u16_e64_dpp s[10:11], v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 row_shl:1
-// W64: v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+v_cmp_ne_u16_e64_dpp s[10:11], v1.l, v2.l row_shl:15
+// W64: v_cmp_ne_u16_e64_dpp s[10:11], v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 row_shl:15
-// W64: v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+v_cmp_ne_u16_e64_dpp s[10:11], v1.l, v2.l row_shr:1
+// W64: v_cmp_ne_u16_e64_dpp s[10:11], v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 row_shr:1
-// W64: v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+v_cmp_ne_u16_e64_dpp s[10:11], v1.l, v2.l row_shr:15
+// W64: v_cmp_ne_u16_e64_dpp s[10:11], v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 row_shr:15
-// W64: v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+v_cmp_ne_u16_e64_dpp s[10:11], v1.l, v2.l row_ror:1
+// W64: v_cmp_ne_u16_e64_dpp s[10:11], v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 row_ror:1
-// W64: v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+v_cmp_ne_u16_e64_dpp s[10:11], v1.l, v2.l row_ror:15
+// W64: v_cmp_ne_u16_e64_dpp s[10:11], v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 row_ror:15
-// W64: v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+v_cmp_ne_u16_e64_dpp s[104:105], v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ne_u16_e64_dpp s[104:105], v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_u16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W64: v_cmp_ne_u16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+v_cmp_ne_u16_e64_dpp vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W64: v_cmp_ne_u16_e64_dpp vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_u16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W64: v_cmp_ne_u16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+v_cmp_ne_u16_e64_dpp ttmp[14:15], v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W64: v_cmp_ne_u16_e64_dpp ttmp[14:15], v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_u16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W64: v_cmp_ne_u16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+v_cmp_ne_u16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// GFX12: v_cmp_ne_u16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x00,0x3d,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
+
+v_cmp_ne_u16_e64_dpp null, v255.l, v255.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// GFX12: v_cmp_ne_u16_e64_dpp null, v255.l, v255.h op_sel:[0,1] row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x10,0x3d,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
+
+v_cmp_ne_u16_e64_dpp ttmp15, v1.h, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W32: v_cmp_ne_u16_e64_dpp ttmp15, v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7b,0x08,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_ne_u16_e64_dpp ttmp[14:15], v1.h, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W64: v_cmp_ne_u16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x7a,0x08,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x09,0x13]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_u16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
-// GFX12: v_cmp_ne_u16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0x7c,0x00,0x3d,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x05,0x30]
+v_cmp_ne_u16_e64_dpp vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_ne_u16_e64_dpp vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
 v_cmp_ne_u32_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0]
 // W32: v_cmp_ne_u32_e64_dpp s5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x4d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
diff --git a/llvm/test/MC/AMDGPU/gfx12_asm_vop3c_dpp8.s b/llvm/test/MC/AMDGPU/gfx12_asm_vop3c_dpp8.s
index 80ac6aa9af00e6..1f73f63e8918ab 100644
--- a/llvm/test/MC/AMDGPU/gfx12_asm_vop3c_dpp8.s
+++ b/llvm/test/MC/AMDGPU/gfx12_asm_vop3c_dpp8.s
@@ -224,60 +224,71 @@ v_cmp_eq_f32_e64_dpp ttmp[14:15], -v1, |v2| dpp8:[7,6,5,4,3,2,1,0] fi:1
 v_cmp_eq_f32_e64_dpp null, -|v255|, -|v255| clamp dpp8:[0,0,0,0,0,0,0,0] fi:0
 // GFX12: v_cmp_eq_f32_e64_dpp null, -|v255|, -|v255| clamp dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x83,0x12,0xd4,0xe9,0xfe,0x03,0x60,0xff,0x00,0x00,0x00]
 
-v_cmp_eq_i16_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_eq_i16_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_eq_i16_e64_dpp s5, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_eq_i16_e64_dpp s5, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_i16_e64_dpp s5, v1, s2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_eq_i16_e64_dpp s5, v1, s2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x32,0xd4,0xe9,0x04,0x00,0x00,0x01,0x77,0x39,0x05]
+v_cmp_eq_i16_e64_dpp s5, v1.l, s2 dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_eq_i16_e64_dpp s5, v1.l, s2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x32,0xd4,0xe9,0x04,0x00,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_i16_e64_dpp s5, v1, 10 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_eq_i16_e64_dpp s5, v1, 10 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x32,0xd4,0xe9,0x14,0x01,0x00,0x01,0x77,0x39,0x05]
+v_cmp_eq_i16_e64_dpp s5, v1.l, 10 dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_eq_i16_e64_dpp s5, v1.l, 10 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x32,0xd4,0xe9,0x14,0x01,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_i16_e64_dpp s105, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_eq_i16_e64_dpp s105, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x69,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_eq_i16_e64_dpp s105, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_eq_i16_e64_dpp s105, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x69,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_i16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_eq_i16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_eq_i16_e64_dpp vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_eq_i16_e64_dpp vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_i16_e64_dpp vcc_hi, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_eq_i16_e64_dpp vcc_hi, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6b,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_eq_i16_e64_dpp vcc_hi, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_eq_i16_e64_dpp vcc_hi, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6b,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_i16_e64_dpp ttmp15, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W32: v_cmp_eq_i16_e64_dpp ttmp15, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7b,0x00,0x32,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_eq_i16_e64_dpp ttmp15, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_eq_i16_e64_dpp ttmp15, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7b,0x00,0x32,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_eq_i16_e64_dpp s[10:11], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_eq_i16_e64_dpp s[10:11], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_i16_e64_dpp s[10:11], v1, s2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_eq_i16_e64_dpp s[10:11], v1, s2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x32,0xd4,0xe9,0x04,0x00,0x00,0x01,0x77,0x39,0x05]
+v_cmp_eq_i16_e64_dpp s[10:11], v1.l, s2 dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_eq_i16_e64_dpp s[10:11], v1.l, s2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x32,0xd4,0xe9,0x04,0x00,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_i16_e64_dpp s[10:11], v1, 10 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_eq_i16_e64_dpp s[10:11], v1, 10 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x32,0xd4,0xe9,0x14,0x01,0x00,0x01,0x77,0x39,0x05]
+v_cmp_eq_i16_e64_dpp s[10:11], v1.l, 10 dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_eq_i16_e64_dpp s[10:11], v1.l, 10 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x32,0xd4,0xe9,0x14,0x01,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_i16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_eq_i16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_eq_i16_e64_dpp s[104:105], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_eq_i16_e64_dpp s[104:105], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_i16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_eq_i16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_eq_i16_e64_dpp vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_eq_i16_e64_dpp vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_i16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W64: v_cmp_eq_i16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7a,0x00,0x32,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_eq_i16_e64_dpp ttmp14, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_eq_i16_e64_dpp ttmp14, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7a,0x00,0x32,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_eq_i16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0]
+// GFX12: v_cmp_eq_i16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x00,0x32,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+
+v_cmp_eq_i16_e64_dpp ttmp15, v1.h, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_eq_i16_e64_dpp ttmp15, v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7b,0x08,0x32,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_eq_i16_e64_dpp ttmp[14:15], v1.h, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W64: v_cmp_eq_i16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7a,0x08,0x32,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_i16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:0
-// GFX12: v_cmp_eq_i16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x00,0x32,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+v_cmp_eq_i16_e64_dpp null, v255.l, v255.h dpp8:[0,0,0,0,0,0,0,0] fi:0
+// GFX12: v_cmp_eq_i16_e64_dpp null, v255.l, v255.h op_sel:[0,1] dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x10,0x32,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
 
 v_cmp_eq_i32_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
 // W32: v_cmp_eq_i32_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x42,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
@@ -334,60 +345,71 @@ v_cmp_eq_i32_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
 v_cmp_eq_i32_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:0
 // GFX12: v_cmp_eq_i32_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x00,0x42,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
 
-v_cmp_eq_u16_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_eq_u16_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_eq_u16_e64_dpp s5, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_eq_u16_e64_dpp s5, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_u16_e64_dpp s5, v1, s2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_eq_u16_e64_dpp s5, v1, s2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x3a,0xd4,0xe9,0x04,0x00,0x00,0x01,0x77,0x39,0x05]
+v_cmp_eq_u16_e64_dpp s5, v1.l, s2 dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_eq_u16_e64_dpp s5, v1.l, s2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x3a,0xd4,0xe9,0x04,0x00,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_u16_e64_dpp s5, v1, 10 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_eq_u16_e64_dpp s5, v1, 10 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x3a,0xd4,0xe9,0x14,0x01,0x00,0x01,0x77,0x39,0x05]
+v_cmp_eq_u16_e64_dpp s5, v1.l, 10 dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_eq_u16_e64_dpp s5, v1.l, 10 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x3a,0xd4,0xe9,0x14,0x01,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_u16_e64_dpp s105, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_eq_u16_e64_dpp s105, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x69,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_eq_u16_e64_dpp s105, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_eq_u16_e64_dpp s105, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x69,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_u16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_eq_u16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_eq_u16_e64_dpp vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_eq_u16_e64_dpp vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_u16_e64_dpp vcc_hi, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_eq_u16_e64_dpp vcc_hi, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6b,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_eq_u16_e64_dpp vcc_hi, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_eq_u16_e64_dpp vcc_hi, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6b,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_u16_e64_dpp ttmp15, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W32: v_cmp_eq_u16_e64_dpp ttmp15, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7b,0x00,0x3a,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_eq_u16_e64_dpp ttmp15, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_eq_u16_e64_dpp ttmp15, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7b,0x00,0x3a,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_eq_u16_e64_dpp s[10:11], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_eq_u16_e64_dpp s[10:11], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_u16_e64_dpp s[10:11], v1, s2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_eq_u16_e64_dpp s[10:11], v1, s2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3a,0xd4,0xe9,0x04,0x00,0x00,0x01,0x77,0x39,0x05]
+v_cmp_eq_u16_e64_dpp s[10:11], v1.l, s2 dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_eq_u16_e64_dpp s[10:11], v1.l, s2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3a,0xd4,0xe9,0x04,0x00,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_u16_e64_dpp s[10:11], v1, 10 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_eq_u16_e64_dpp s[10:11], v1, 10 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3a,0xd4,0xe9,0x14,0x01,0x00,0x01,0x77,0x39,0x05]
+v_cmp_eq_u16_e64_dpp s[10:11], v1.l, 10 dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_eq_u16_e64_dpp s[10:11], v1.l, 10 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3a,0xd4,0xe9,0x14,0x01,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_u16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_eq_u16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_eq_u16_e64_dpp s[104:105], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_eq_u16_e64_dpp s[104:105], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_u16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_eq_u16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_eq_u16_e64_dpp vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_eq_u16_e64_dpp vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_u16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W64: v_cmp_eq_u16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7a,0x00,0x3a,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_eq_u16_e64_dpp ttmp14, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_eq_u16_e64_dpp ttmp14, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7a,0x00,0x3a,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_eq_u16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0]
+// GFX12: v_cmp_eq_u16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x00,0x3a,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+
+v_cmp_eq_u16_e64_dpp ttmp15, v1.h, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_eq_u16_e64_dpp ttmp15, v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7b,0x08,0x3a,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_eq_u16_e64_dpp ttmp[14:15], v1.h, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W64: v_cmp_eq_u16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7a,0x08,0x3a,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_eq_u16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:0
-// GFX12: v_cmp_eq_u16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x00,0x3a,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+v_cmp_eq_u16_e64_dpp null, v255.l, v255.h dpp8:[0,0,0,0,0,0,0,0] fi:0
+// GFX12: v_cmp_eq_u16_e64_dpp null, v255.l, v255.h op_sel:[0,1] dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x10,0x3a,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
 
 v_cmp_eq_u32_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
 // W32: v_cmp_eq_u32_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x4a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
@@ -554,60 +576,71 @@ v_cmp_ge_f32_e64_dpp ttmp[14:15], -v1, |v2| dpp8:[7,6,5,4,3,2,1,0] fi:1
 v_cmp_ge_f32_e64_dpp null, -|v255|, -|v255| clamp dpp8:[0,0,0,0,0,0,0,0] fi:0
 // GFX12: v_cmp_ge_f32_e64_dpp null, -|v255|, -|v255| clamp dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x83,0x16,0xd4,0xe9,0xfe,0x03,0x60,0xff,0x00,0x00,0x00]
 
-v_cmp_ge_i16_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_ge_i16_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ge_i16_e64_dpp s5, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_ge_i16_e64_dpp s5, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_i16_e64_dpp s5, v1, s2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_ge_i16_e64_dpp s5, v1, s2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x36,0xd4,0xe9,0x04,0x00,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ge_i16_e64_dpp s5, v1.l, s2 dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_ge_i16_e64_dpp s5, v1.l, s2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x36,0xd4,0xe9,0x04,0x00,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_i16_e64_dpp s5, v1, 10 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_ge_i16_e64_dpp s5, v1, 10 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x36,0xd4,0xe9,0x14,0x01,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ge_i16_e64_dpp s5, v1.l, 10 dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_ge_i16_e64_dpp s5, v1.l, 10 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x36,0xd4,0xe9,0x14,0x01,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_i16_e64_dpp s105, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_ge_i16_e64_dpp s105, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x69,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ge_i16_e64_dpp s105, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_ge_i16_e64_dpp s105, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x69,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_i16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_ge_i16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ge_i16_e64_dpp vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_ge_i16_e64_dpp vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_i16_e64_dpp vcc_hi, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_ge_i16_e64_dpp vcc_hi, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6b,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ge_i16_e64_dpp vcc_hi, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_ge_i16_e64_dpp vcc_hi, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6b,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_i16_e64_dpp ttmp15, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W32: v_cmp_ge_i16_e64_dpp ttmp15, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7b,0x00,0x36,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ge_i16_e64_dpp ttmp15, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_ge_i16_e64_dpp ttmp15, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7b,0x00,0x36,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ge_i16_e64_dpp s[10:11], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_ge_i16_e64_dpp s[10:11], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_i16_e64_dpp s[10:11], v1, s2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_ge_i16_e64_dpp s[10:11], v1, s2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x36,0xd4,0xe9,0x04,0x00,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ge_i16_e64_dpp s[10:11], v1.l, s2 dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_ge_i16_e64_dpp s[10:11], v1.l, s2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x36,0xd4,0xe9,0x04,0x00,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_i16_e64_dpp s[10:11], v1, 10 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_ge_i16_e64_dpp s[10:11], v1, 10 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x36,0xd4,0xe9,0x14,0x01,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ge_i16_e64_dpp s[10:11], v1.l, 10 dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_ge_i16_e64_dpp s[10:11], v1.l, 10 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x36,0xd4,0xe9,0x14,0x01,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_i16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_ge_i16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ge_i16_e64_dpp s[104:105], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_ge_i16_e64_dpp s[104:105], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_i16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_ge_i16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ge_i16_e64_dpp vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_ge_i16_e64_dpp vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_i16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W64: v_cmp_ge_i16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7a,0x00,0x36,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ge_i16_e64_dpp ttmp14, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_ge_i16_e64_dpp ttmp14, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7a,0x00,0x36,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_ge_i16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0]
+// GFX12: v_cmp_ge_i16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x00,0x36,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+
+v_cmp_ge_i16_e64_dpp ttmp15, v1.h, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_ge_i16_e64_dpp ttmp15, v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7b,0x08,0x36,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_ge_i16_e64_dpp ttmp[14:15], v1.h, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W64: v_cmp_ge_i16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7a,0x08,0x36,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_i16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:0
-// GFX12: v_cmp_ge_i16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x00,0x36,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+v_cmp_ge_i16_e64_dpp null, v255.l, v255.h dpp8:[0,0,0,0,0,0,0,0] fi:0
+// GFX12: v_cmp_ge_i16_e64_dpp null, v255.l, v255.h op_sel:[0,1] dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x10,0x36,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
 
 v_cmp_ge_i32_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
 // W32: v_cmp_ge_i32_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x46,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
@@ -664,60 +697,71 @@ v_cmp_ge_i32_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
 v_cmp_ge_i32_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:0
 // GFX12: v_cmp_ge_i32_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x00,0x46,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
 
-v_cmp_ge_u16_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_ge_u16_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ge_u16_e64_dpp s5, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_ge_u16_e64_dpp s5, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_u16_e64_dpp s5, v1, s2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_ge_u16_e64_dpp s5, v1, s2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x3e,0xd4,0xe9,0x04,0x00,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ge_u16_e64_dpp s5, v1.l, s2 dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_ge_u16_e64_dpp s5, v1.l, s2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x3e,0xd4,0xe9,0x04,0x00,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_u16_e64_dpp s5, v1, 10 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_ge_u16_e64_dpp s5, v1, 10 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x3e,0xd4,0xe9,0x14,0x01,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ge_u16_e64_dpp s5, v1.l, 10 dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_ge_u16_e64_dpp s5, v1.l, 10 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x3e,0xd4,0xe9,0x14,0x01,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_u16_e64_dpp s105, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_ge_u16_e64_dpp s105, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x69,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ge_u16_e64_dpp s105, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_ge_u16_e64_dpp s105, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x69,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_u16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_ge_u16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ge_u16_e64_dpp vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_ge_u16_e64_dpp vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_u16_e64_dpp vcc_hi, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_ge_u16_e64_dpp vcc_hi, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6b,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ge_u16_e64_dpp vcc_hi, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_ge_u16_e64_dpp vcc_hi, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6b,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_u16_e64_dpp ttmp15, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W32: v_cmp_ge_u16_e64_dpp ttmp15, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7b,0x00,0x3e,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ge_u16_e64_dpp ttmp15, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_ge_u16_e64_dpp ttmp15, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7b,0x00,0x3e,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ge_u16_e64_dpp s[10:11], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_ge_u16_e64_dpp s[10:11], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_u16_e64_dpp s[10:11], v1, s2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_ge_u16_e64_dpp s[10:11], v1, s2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3e,0xd4,0xe9,0x04,0x00,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ge_u16_e64_dpp s[10:11], v1.l, s2 dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_ge_u16_e64_dpp s[10:11], v1.l, s2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3e,0xd4,0xe9,0x04,0x00,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_u16_e64_dpp s[10:11], v1, 10 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_ge_u16_e64_dpp s[10:11], v1, 10 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3e,0xd4,0xe9,0x14,0x01,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ge_u16_e64_dpp s[10:11], v1.l, 10 dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_ge_u16_e64_dpp s[10:11], v1.l, 10 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3e,0xd4,0xe9,0x14,0x01,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_u16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_ge_u16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ge_u16_e64_dpp s[104:105], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_ge_u16_e64_dpp s[104:105], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_u16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_ge_u16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ge_u16_e64_dpp vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_ge_u16_e64_dpp vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_u16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W64: v_cmp_ge_u16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7a,0x00,0x3e,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ge_u16_e64_dpp ttmp14, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_ge_u16_e64_dpp ttmp14, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7a,0x00,0x3e,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_ge_u16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0]
+// GFX12: v_cmp_ge_u16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x00,0x3e,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+
+v_cmp_ge_u16_e64_dpp ttmp15, v1.h, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_ge_u16_e64_dpp ttmp15, v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7b,0x08,0x3e,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_ge_u16_e64_dpp ttmp[14:15], v1.h, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W64: v_cmp_ge_u16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7a,0x08,0x3e,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ge_u16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:0
-// GFX12: v_cmp_ge_u16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x00,0x3e,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+v_cmp_ge_u16_e64_dpp null, v255.l, v255.h dpp8:[0,0,0,0,0,0,0,0] fi:0
+// GFX12: v_cmp_ge_u16_e64_dpp null, v255.l, v255.h op_sel:[0,1] dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x10,0x3e,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
 
 v_cmp_ge_u32_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
 // W32: v_cmp_ge_u32_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x4e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
@@ -884,60 +928,71 @@ v_cmp_gt_f32_e64_dpp ttmp[14:15], -v1, |v2| dpp8:[7,6,5,4,3,2,1,0] fi:1
 v_cmp_gt_f32_e64_dpp null, -|v255|, -|v255| clamp dpp8:[0,0,0,0,0,0,0,0] fi:0
 // GFX12: v_cmp_gt_f32_e64_dpp null, -|v255|, -|v255| clamp dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x83,0x14,0xd4,0xe9,0xfe,0x03,0x60,0xff,0x00,0x00,0x00]
 
-v_cmp_gt_i16_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_gt_i16_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_gt_i16_e64_dpp s5, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_gt_i16_e64_dpp s5, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_i16_e64_dpp s5, v1, s2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_gt_i16_e64_dpp s5, v1, s2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x34,0xd4,0xe9,0x04,0x00,0x00,0x01,0x77,0x39,0x05]
+v_cmp_gt_i16_e64_dpp s5, v1.l, s2 dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_gt_i16_e64_dpp s5, v1.l, s2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x34,0xd4,0xe9,0x04,0x00,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_i16_e64_dpp s5, v1, 10 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_gt_i16_e64_dpp s5, v1, 10 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x34,0xd4,0xe9,0x14,0x01,0x00,0x01,0x77,0x39,0x05]
+v_cmp_gt_i16_e64_dpp s5, v1.l, 10 dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_gt_i16_e64_dpp s5, v1.l, 10 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x34,0xd4,0xe9,0x14,0x01,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_i16_e64_dpp s105, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_gt_i16_e64_dpp s105, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x69,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_gt_i16_e64_dpp s105, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_gt_i16_e64_dpp s105, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x69,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_i16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_gt_i16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_gt_i16_e64_dpp vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_gt_i16_e64_dpp vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_i16_e64_dpp vcc_hi, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_gt_i16_e64_dpp vcc_hi, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6b,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_gt_i16_e64_dpp vcc_hi, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_gt_i16_e64_dpp vcc_hi, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6b,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_i16_e64_dpp ttmp15, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W32: v_cmp_gt_i16_e64_dpp ttmp15, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7b,0x00,0x34,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_gt_i16_e64_dpp ttmp15, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_gt_i16_e64_dpp ttmp15, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7b,0x00,0x34,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_gt_i16_e64_dpp s[10:11], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_gt_i16_e64_dpp s[10:11], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_i16_e64_dpp s[10:11], v1, s2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_gt_i16_e64_dpp s[10:11], v1, s2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x34,0xd4,0xe9,0x04,0x00,0x00,0x01,0x77,0x39,0x05]
+v_cmp_gt_i16_e64_dpp s[10:11], v1.l, s2 dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_gt_i16_e64_dpp s[10:11], v1.l, s2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x34,0xd4,0xe9,0x04,0x00,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_i16_e64_dpp s[10:11], v1, 10 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_gt_i16_e64_dpp s[10:11], v1, 10 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x34,0xd4,0xe9,0x14,0x01,0x00,0x01,0x77,0x39,0x05]
+v_cmp_gt_i16_e64_dpp s[10:11], v1.l, 10 dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_gt_i16_e64_dpp s[10:11], v1.l, 10 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x34,0xd4,0xe9,0x14,0x01,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_i16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_gt_i16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_gt_i16_e64_dpp s[104:105], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_gt_i16_e64_dpp s[104:105], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_i16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_gt_i16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_gt_i16_e64_dpp vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_gt_i16_e64_dpp vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_i16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W64: v_cmp_gt_i16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7a,0x00,0x34,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_gt_i16_e64_dpp ttmp14, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_gt_i16_e64_dpp ttmp14, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7a,0x00,0x34,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_gt_i16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0]
+// GFX12: v_cmp_gt_i16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x00,0x34,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+
+v_cmp_gt_i16_e64_dpp ttmp15, v1.h, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_gt_i16_e64_dpp ttmp15, v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7b,0x08,0x34,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_gt_i16_e64_dpp ttmp[14:15], v1.h, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W64: v_cmp_gt_i16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7a,0x08,0x34,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_i16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:0
-// GFX12: v_cmp_gt_i16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x00,0x34,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+v_cmp_gt_i16_e64_dpp null, v255.l, v255.h dpp8:[0,0,0,0,0,0,0,0] fi:0
+// GFX12: v_cmp_gt_i16_e64_dpp null, v255.l, v255.h op_sel:[0,1] dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x10,0x34,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
 
 v_cmp_gt_i32_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
 // W32: v_cmp_gt_i32_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x44,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
@@ -994,60 +1049,71 @@ v_cmp_gt_i32_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
 v_cmp_gt_i32_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:0
 // GFX12: v_cmp_gt_i32_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x00,0x44,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
 
-v_cmp_gt_u16_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_gt_u16_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_gt_u16_e64_dpp s5, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_gt_u16_e64_dpp s5, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_u16_e64_dpp s5, v1, s2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_gt_u16_e64_dpp s5, v1, s2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x3c,0xd4,0xe9,0x04,0x00,0x00,0x01,0x77,0x39,0x05]
+v_cmp_gt_u16_e64_dpp s5, v1.l, s2 dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_gt_u16_e64_dpp s5, v1.l, s2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x3c,0xd4,0xe9,0x04,0x00,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_u16_e64_dpp s5, v1, 10 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_gt_u16_e64_dpp s5, v1, 10 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x3c,0xd4,0xe9,0x14,0x01,0x00,0x01,0x77,0x39,0x05]
+v_cmp_gt_u16_e64_dpp s5, v1.l, 10 dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_gt_u16_e64_dpp s5, v1.l, 10 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x3c,0xd4,0xe9,0x14,0x01,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_u16_e64_dpp s105, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_gt_u16_e64_dpp s105, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x69,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_gt_u16_e64_dpp s105, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_gt_u16_e64_dpp s105, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x69,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_u16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_gt_u16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_gt_u16_e64_dpp vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_gt_u16_e64_dpp vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_u16_e64_dpp vcc_hi, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_gt_u16_e64_dpp vcc_hi, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6b,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_gt_u16_e64_dpp vcc_hi, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_gt_u16_e64_dpp vcc_hi, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6b,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_u16_e64_dpp ttmp15, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W32: v_cmp_gt_u16_e64_dpp ttmp15, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7b,0x00,0x3c,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_gt_u16_e64_dpp ttmp15, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_gt_u16_e64_dpp ttmp15, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7b,0x00,0x3c,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_gt_u16_e64_dpp s[10:11], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_gt_u16_e64_dpp s[10:11], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_u16_e64_dpp s[10:11], v1, s2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_gt_u16_e64_dpp s[10:11], v1, s2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3c,0xd4,0xe9,0x04,0x00,0x00,0x01,0x77,0x39,0x05]
+v_cmp_gt_u16_e64_dpp s[10:11], v1.l, s2 dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_gt_u16_e64_dpp s[10:11], v1.l, s2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3c,0xd4,0xe9,0x04,0x00,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_u16_e64_dpp s[10:11], v1, 10 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_gt_u16_e64_dpp s[10:11], v1, 10 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3c,0xd4,0xe9,0x14,0x01,0x00,0x01,0x77,0x39,0x05]
+v_cmp_gt_u16_e64_dpp s[10:11], v1.l, 10 dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_gt_u16_e64_dpp s[10:11], v1.l, 10 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3c,0xd4,0xe9,0x14,0x01,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_u16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_gt_u16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_gt_u16_e64_dpp s[104:105], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_gt_u16_e64_dpp s[104:105], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_u16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_gt_u16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_gt_u16_e64_dpp vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_gt_u16_e64_dpp vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_u16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W64: v_cmp_gt_u16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7a,0x00,0x3c,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_gt_u16_e64_dpp ttmp14, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_gt_u16_e64_dpp ttmp14, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7a,0x00,0x3c,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_gt_u16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0]
+// GFX12: v_cmp_gt_u16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x00,0x3c,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+
+v_cmp_gt_u16_e64_dpp ttmp15, v1.h, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_gt_u16_e64_dpp ttmp15, v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7b,0x08,0x3c,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_gt_u16_e64_dpp ttmp[14:15], v1.h, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W64: v_cmp_gt_u16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7a,0x08,0x3c,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_gt_u16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:0
-// GFX12: v_cmp_gt_u16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x00,0x3c,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+v_cmp_gt_u16_e64_dpp null, v255.l, v255.h dpp8:[0,0,0,0,0,0,0,0] fi:0
+// GFX12: v_cmp_gt_u16_e64_dpp null, v255.l, v255.h op_sel:[0,1] dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x10,0x3c,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
 
 v_cmp_gt_u32_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
 // W32: v_cmp_gt_u32_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x4c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
@@ -1214,60 +1280,71 @@ v_cmp_le_f32_e64_dpp ttmp[14:15], -v1, |v2| dpp8:[7,6,5,4,3,2,1,0] fi:1
 v_cmp_le_f32_e64_dpp null, -|v255|, -|v255| clamp dpp8:[0,0,0,0,0,0,0,0] fi:0
 // GFX12: v_cmp_le_f32_e64_dpp null, -|v255|, -|v255| clamp dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x83,0x13,0xd4,0xe9,0xfe,0x03,0x60,0xff,0x00,0x00,0x00]
 
-v_cmp_le_i16_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_le_i16_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_le_i16_e64_dpp s5, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_le_i16_e64_dpp s5, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_i16_e64_dpp s5, v1, s2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_le_i16_e64_dpp s5, v1, s2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x33,0xd4,0xe9,0x04,0x00,0x00,0x01,0x77,0x39,0x05]
+v_cmp_le_i16_e64_dpp s5, v1.l, s2 dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_le_i16_e64_dpp s5, v1.l, s2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x33,0xd4,0xe9,0x04,0x00,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_i16_e64_dpp s5, v1, 10 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_le_i16_e64_dpp s5, v1, 10 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x33,0xd4,0xe9,0x14,0x01,0x00,0x01,0x77,0x39,0x05]
+v_cmp_le_i16_e64_dpp s5, v1.l, 10 dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_le_i16_e64_dpp s5, v1.l, 10 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x33,0xd4,0xe9,0x14,0x01,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_i16_e64_dpp s105, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_le_i16_e64_dpp s105, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x69,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_le_i16_e64_dpp s105, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_le_i16_e64_dpp s105, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x69,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_i16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_le_i16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_le_i16_e64_dpp vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_le_i16_e64_dpp vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_i16_e64_dpp vcc_hi, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_le_i16_e64_dpp vcc_hi, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6b,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_le_i16_e64_dpp vcc_hi, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_le_i16_e64_dpp vcc_hi, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6b,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_i16_e64_dpp ttmp15, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W32: v_cmp_le_i16_e64_dpp ttmp15, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7b,0x00,0x33,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_le_i16_e64_dpp ttmp15, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_le_i16_e64_dpp ttmp15, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7b,0x00,0x33,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_i16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_le_i16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_le_i16_e64_dpp s[10:11], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_le_i16_e64_dpp s[10:11], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_i16_e64_dpp s[10:11], v1, s2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_le_i16_e64_dpp s[10:11], v1, s2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x33,0xd4,0xe9,0x04,0x00,0x00,0x01,0x77,0x39,0x05]
+v_cmp_le_i16_e64_dpp s[10:11], v1.l, s2 dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_le_i16_e64_dpp s[10:11], v1.l, s2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x33,0xd4,0xe9,0x04,0x00,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_i16_e64_dpp s[10:11], v1, 10 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_le_i16_e64_dpp s[10:11], v1, 10 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x33,0xd4,0xe9,0x14,0x01,0x00,0x01,0x77,0x39,0x05]
+v_cmp_le_i16_e64_dpp s[10:11], v1.l, 10 dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_le_i16_e64_dpp s[10:11], v1.l, 10 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x33,0xd4,0xe9,0x14,0x01,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_i16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_le_i16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_le_i16_e64_dpp s[104:105], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_le_i16_e64_dpp s[104:105], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_i16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_le_i16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_le_i16_e64_dpp vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_le_i16_e64_dpp vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_i16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W64: v_cmp_le_i16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7a,0x00,0x33,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_le_i16_e64_dpp ttmp14, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_le_i16_e64_dpp ttmp14, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7a,0x00,0x33,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_le_i16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0]
+// GFX12: v_cmp_le_i16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x00,0x33,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+
+v_cmp_le_i16_e64_dpp ttmp15, v1.h, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_le_i16_e64_dpp ttmp15, v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7b,0x08,0x33,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_le_i16_e64_dpp ttmp[14:15], v1.h, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W64: v_cmp_le_i16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7a,0x08,0x33,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_i16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:0
-// GFX12: v_cmp_le_i16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x00,0x33,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+v_cmp_le_i16_e64_dpp null, v255.l, v255.h dpp8:[0,0,0,0,0,0,0,0] fi:0
+// GFX12: v_cmp_le_i16_e64_dpp null, v255.l, v255.h op_sel:[0,1] dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x10,0x33,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
 
 v_cmp_le_i32_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
 // W32: v_cmp_le_i32_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x43,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
@@ -1324,60 +1401,71 @@ v_cmp_le_i32_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
 v_cmp_le_i32_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:0
 // GFX12: v_cmp_le_i32_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x00,0x43,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
 
-v_cmp_le_u16_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_le_u16_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_le_u16_e64_dpp s5, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_le_u16_e64_dpp s5, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_u16_e64_dpp s5, v1, s2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_le_u16_e64_dpp s5, v1, s2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x3b,0xd4,0xe9,0x04,0x00,0x00,0x01,0x77,0x39,0x05]
+v_cmp_le_u16_e64_dpp s5, v1.l, s2 dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_le_u16_e64_dpp s5, v1.l, s2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x3b,0xd4,0xe9,0x04,0x00,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_u16_e64_dpp s5, v1, 10 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_le_u16_e64_dpp s5, v1, 10 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x3b,0xd4,0xe9,0x14,0x01,0x00,0x01,0x77,0x39,0x05]
+v_cmp_le_u16_e64_dpp s5, v1.l, 10 dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_le_u16_e64_dpp s5, v1.l, 10 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x3b,0xd4,0xe9,0x14,0x01,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_u16_e64_dpp s105, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_le_u16_e64_dpp s105, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x69,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_le_u16_e64_dpp s105, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_le_u16_e64_dpp s105, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x69,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_u16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_le_u16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_le_u16_e64_dpp vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_le_u16_e64_dpp vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_u16_e64_dpp vcc_hi, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_le_u16_e64_dpp vcc_hi, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6b,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_le_u16_e64_dpp vcc_hi, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_le_u16_e64_dpp vcc_hi, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6b,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_u16_e64_dpp ttmp15, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W32: v_cmp_le_u16_e64_dpp ttmp15, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7b,0x00,0x3b,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_le_u16_e64_dpp ttmp15, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_le_u16_e64_dpp ttmp15, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7b,0x00,0x3b,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_u16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_le_u16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_le_u16_e64_dpp s[10:11], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_le_u16_e64_dpp s[10:11], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_u16_e64_dpp s[10:11], v1, s2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_le_u16_e64_dpp s[10:11], v1, s2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3b,0xd4,0xe9,0x04,0x00,0x00,0x01,0x77,0x39,0x05]
+v_cmp_le_u16_e64_dpp s[10:11], v1.l, s2 dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_le_u16_e64_dpp s[10:11], v1.l, s2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3b,0xd4,0xe9,0x04,0x00,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_u16_e64_dpp s[10:11], v1, 10 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_le_u16_e64_dpp s[10:11], v1, 10 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3b,0xd4,0xe9,0x14,0x01,0x00,0x01,0x77,0x39,0x05]
+v_cmp_le_u16_e64_dpp s[10:11], v1.l, 10 dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_le_u16_e64_dpp s[10:11], v1.l, 10 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3b,0xd4,0xe9,0x14,0x01,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_u16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_le_u16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_le_u16_e64_dpp s[104:105], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_le_u16_e64_dpp s[104:105], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_u16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_le_u16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_le_u16_e64_dpp vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_le_u16_e64_dpp vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_u16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W64: v_cmp_le_u16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7a,0x00,0x3b,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_le_u16_e64_dpp ttmp14, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_le_u16_e64_dpp ttmp14, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7a,0x00,0x3b,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_le_u16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0]
+// GFX12: v_cmp_le_u16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x00,0x3b,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+
+v_cmp_le_u16_e64_dpp ttmp15, v1.h, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_le_u16_e64_dpp ttmp15, v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7b,0x08,0x3b,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_le_u16_e64_dpp ttmp[14:15], v1.h, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W64: v_cmp_le_u16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7a,0x08,0x3b,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_le_u16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:0
-// GFX12: v_cmp_le_u16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x00,0x3b,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+v_cmp_le_u16_e64_dpp null, v255.l, v255.h dpp8:[0,0,0,0,0,0,0,0] fi:0
+// GFX12: v_cmp_le_u16_e64_dpp null, v255.l, v255.h op_sel:[0,1] dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x10,0x3b,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
 
 v_cmp_le_u32_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
 // W32: v_cmp_le_u32_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x4b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
@@ -1669,60 +1757,71 @@ v_cmp_lt_f32_e64_dpp ttmp[14:15], -v1, |v2| dpp8:[7,6,5,4,3,2,1,0] fi:1
 v_cmp_lt_f32_e64_dpp null, -|v255|, -|v255| clamp dpp8:[0,0,0,0,0,0,0,0] fi:0
 // GFX12: v_cmp_lt_f32_e64_dpp null, -|v255|, -|v255| clamp dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x83,0x11,0xd4,0xe9,0xfe,0x03,0x60,0xff,0x00,0x00,0x00]
 
-v_cmp_lt_i16_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_lt_i16_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_lt_i16_e64_dpp s5, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_lt_i16_e64_dpp s5, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_i16_e64_dpp s5, v1, s2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_lt_i16_e64_dpp s5, v1, s2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x31,0xd4,0xe9,0x04,0x00,0x00,0x01,0x77,0x39,0x05]
+v_cmp_lt_i16_e64_dpp s5, v1.l, s2 dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_lt_i16_e64_dpp s5, v1.l, s2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x31,0xd4,0xe9,0x04,0x00,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_i16_e64_dpp s5, v1, 10 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_lt_i16_e64_dpp s5, v1, 10 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x31,0xd4,0xe9,0x14,0x01,0x00,0x01,0x77,0x39,0x05]
+v_cmp_lt_i16_e64_dpp s5, v1.l, 10 dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_lt_i16_e64_dpp s5, v1.l, 10 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x31,0xd4,0xe9,0x14,0x01,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_i16_e64_dpp s105, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_lt_i16_e64_dpp s105, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x69,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_lt_i16_e64_dpp s105, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_lt_i16_e64_dpp s105, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x69,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_i16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_lt_i16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_lt_i16_e64_dpp vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_lt_i16_e64_dpp vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_i16_e64_dpp vcc_hi, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_lt_i16_e64_dpp vcc_hi, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6b,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_lt_i16_e64_dpp vcc_hi, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_lt_i16_e64_dpp vcc_hi, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6b,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_i16_e64_dpp ttmp15, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W32: v_cmp_lt_i16_e64_dpp ttmp15, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7b,0x00,0x31,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_lt_i16_e64_dpp ttmp15, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_lt_i16_e64_dpp ttmp15, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7b,0x00,0x31,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_lt_i16_e64_dpp s[10:11], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_lt_i16_e64_dpp s[10:11], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_i16_e64_dpp s[10:11], v1, s2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_lt_i16_e64_dpp s[10:11], v1, s2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x31,0xd4,0xe9,0x04,0x00,0x00,0x01,0x77,0x39,0x05]
+v_cmp_lt_i16_e64_dpp s[10:11], v1.l, s2 dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_lt_i16_e64_dpp s[10:11], v1.l, s2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x31,0xd4,0xe9,0x04,0x00,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_i16_e64_dpp s[10:11], v1, 10 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_lt_i16_e64_dpp s[10:11], v1, 10 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x31,0xd4,0xe9,0x14,0x01,0x00,0x01,0x77,0x39,0x05]
+v_cmp_lt_i16_e64_dpp s[10:11], v1.l, 10 dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_lt_i16_e64_dpp s[10:11], v1.l, 10 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x31,0xd4,0xe9,0x14,0x01,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_i16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_lt_i16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_lt_i16_e64_dpp s[104:105], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_lt_i16_e64_dpp s[104:105], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_i16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_lt_i16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_lt_i16_e64_dpp vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_lt_i16_e64_dpp vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_i16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W64: v_cmp_lt_i16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7a,0x00,0x31,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_lt_i16_e64_dpp ttmp14, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_lt_i16_e64_dpp ttmp14, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7a,0x00,0x31,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_lt_i16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0]
+// GFX12: v_cmp_lt_i16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x00,0x31,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+
+v_cmp_lt_i16_e64_dpp ttmp15, v1.h, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_lt_i16_e64_dpp ttmp15, v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7b,0x08,0x31,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_lt_i16_e64_dpp ttmp[14:15], v1.h, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W64: v_cmp_lt_i16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7a,0x08,0x31,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_i16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:0
-// GFX12: v_cmp_lt_i16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x00,0x31,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+v_cmp_lt_i16_e64_dpp null, v255.l, v255.h dpp8:[0,0,0,0,0,0,0,0] fi:0
+// GFX12: v_cmp_lt_i16_e64_dpp null, v255.l, v255.h op_sel:[0,1] dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x10,0x31,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
 
 v_cmp_lt_i32_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
 // W32: v_cmp_lt_i32_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x41,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
@@ -1779,60 +1878,71 @@ v_cmp_lt_i32_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
 v_cmp_lt_i32_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:0
 // GFX12: v_cmp_lt_i32_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x00,0x41,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
 
-v_cmp_lt_u16_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_lt_u16_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_lt_u16_e64_dpp s5, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_lt_u16_e64_dpp s5, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_u16_e64_dpp s5, v1, s2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_lt_u16_e64_dpp s5, v1, s2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x39,0xd4,0xe9,0x04,0x00,0x00,0x01,0x77,0x39,0x05]
+v_cmp_lt_u16_e64_dpp s5, v1.l, s2 dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_lt_u16_e64_dpp s5, v1.l, s2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x39,0xd4,0xe9,0x04,0x00,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_u16_e64_dpp s5, v1, 10 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_lt_u16_e64_dpp s5, v1, 10 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x39,0xd4,0xe9,0x14,0x01,0x00,0x01,0x77,0x39,0x05]
+v_cmp_lt_u16_e64_dpp s5, v1.l, 10 dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_lt_u16_e64_dpp s5, v1.l, 10 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x39,0xd4,0xe9,0x14,0x01,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_u16_e64_dpp s105, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_lt_u16_e64_dpp s105, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x69,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_lt_u16_e64_dpp s105, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_lt_u16_e64_dpp s105, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x69,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_u16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_lt_u16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_lt_u16_e64_dpp vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_lt_u16_e64_dpp vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_u16_e64_dpp vcc_hi, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_lt_u16_e64_dpp vcc_hi, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6b,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_lt_u16_e64_dpp vcc_hi, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_lt_u16_e64_dpp vcc_hi, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6b,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_u16_e64_dpp ttmp15, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W32: v_cmp_lt_u16_e64_dpp ttmp15, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7b,0x00,0x39,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_lt_u16_e64_dpp ttmp15, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_lt_u16_e64_dpp ttmp15, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7b,0x00,0x39,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_lt_u16_e64_dpp s[10:11], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_lt_u16_e64_dpp s[10:11], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_u16_e64_dpp s[10:11], v1, s2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_lt_u16_e64_dpp s[10:11], v1, s2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x39,0xd4,0xe9,0x04,0x00,0x00,0x01,0x77,0x39,0x05]
+v_cmp_lt_u16_e64_dpp s[10:11], v1.l, s2 dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_lt_u16_e64_dpp s[10:11], v1.l, s2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x39,0xd4,0xe9,0x04,0x00,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_u16_e64_dpp s[10:11], v1, 10 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_lt_u16_e64_dpp s[10:11], v1, 10 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x39,0xd4,0xe9,0x14,0x01,0x00,0x01,0x77,0x39,0x05]
+v_cmp_lt_u16_e64_dpp s[10:11], v1.l, 10 dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_lt_u16_e64_dpp s[10:11], v1.l, 10 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x39,0xd4,0xe9,0x14,0x01,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_u16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_lt_u16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_lt_u16_e64_dpp s[104:105], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_lt_u16_e64_dpp s[104:105], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_u16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_lt_u16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_lt_u16_e64_dpp vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_lt_u16_e64_dpp vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_u16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W64: v_cmp_lt_u16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7a,0x00,0x39,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_lt_u16_e64_dpp ttmp14, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_lt_u16_e64_dpp ttmp14, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7a,0x00,0x39,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_lt_u16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0]
+// GFX12: v_cmp_lt_u16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x00,0x39,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+
+v_cmp_lt_u16_e64_dpp ttmp15, v1.h, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_lt_u16_e64_dpp ttmp15, v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7b,0x08,0x39,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_lt_u16_e64_dpp ttmp[14:15], v1.h, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W64: v_cmp_lt_u16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7a,0x08,0x39,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_lt_u16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:0
-// GFX12: v_cmp_lt_u16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x00,0x39,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+v_cmp_lt_u16_e64_dpp null, v255.l, v255.h dpp8:[0,0,0,0,0,0,0,0] fi:0
+// GFX12: v_cmp_lt_u16_e64_dpp null, v255.l, v255.h op_sel:[0,1] dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x10,0x39,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
 
 v_cmp_lt_u32_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
 // W32: v_cmp_lt_u32_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x49,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
@@ -1889,60 +1999,71 @@ v_cmp_lt_u32_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
 v_cmp_lt_u32_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:0
 // GFX12: v_cmp_lt_u32_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x00,0x49,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
 
-v_cmp_ne_i16_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_ne_i16_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ne_i16_e64_dpp s5, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_ne_i16_e64_dpp s5, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_i16_e64_dpp s5, v1, s2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_ne_i16_e64_dpp s5, v1, s2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x35,0xd4,0xe9,0x04,0x00,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ne_i16_e64_dpp s5, v1.l, s2 dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_ne_i16_e64_dpp s5, v1.l, s2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x35,0xd4,0xe9,0x04,0x00,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_i16_e64_dpp s5, v1, 10 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_ne_i16_e64_dpp s5, v1, 10 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x35,0xd4,0xe9,0x14,0x01,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ne_i16_e64_dpp s5, v1.l, 10 dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_ne_i16_e64_dpp s5, v1.l, 10 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x35,0xd4,0xe9,0x14,0x01,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_i16_e64_dpp s105, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_ne_i16_e64_dpp s105, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x69,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ne_i16_e64_dpp s105, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_ne_i16_e64_dpp s105, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x69,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_i16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_ne_i16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ne_i16_e64_dpp vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_ne_i16_e64_dpp vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_i16_e64_dpp vcc_hi, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_ne_i16_e64_dpp vcc_hi, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6b,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ne_i16_e64_dpp vcc_hi, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_ne_i16_e64_dpp vcc_hi, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6b,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_i16_e64_dpp ttmp15, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W32: v_cmp_ne_i16_e64_dpp ttmp15, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7b,0x00,0x35,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ne_i16_e64_dpp ttmp15, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_ne_i16_e64_dpp ttmp15, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7b,0x00,0x35,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ne_i16_e64_dpp s[10:11], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_ne_i16_e64_dpp s[10:11], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_i16_e64_dpp s[10:11], v1, s2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_ne_i16_e64_dpp s[10:11], v1, s2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x35,0xd4,0xe9,0x04,0x00,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ne_i16_e64_dpp s[10:11], v1.l, s2 dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_ne_i16_e64_dpp s[10:11], v1.l, s2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x35,0xd4,0xe9,0x04,0x00,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_i16_e64_dpp s[10:11], v1, 10 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_ne_i16_e64_dpp s[10:11], v1, 10 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x35,0xd4,0xe9,0x14,0x01,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ne_i16_e64_dpp s[10:11], v1.l, 10 dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_ne_i16_e64_dpp s[10:11], v1.l, 10 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x35,0xd4,0xe9,0x14,0x01,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_i16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_ne_i16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ne_i16_e64_dpp s[104:105], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_ne_i16_e64_dpp s[104:105], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_i16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_ne_i16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ne_i16_e64_dpp vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_ne_i16_e64_dpp vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_i16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W64: v_cmp_ne_i16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7a,0x00,0x35,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ne_i16_e64_dpp ttmp14, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_ne_i16_e64_dpp ttmp14, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7a,0x00,0x35,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_ne_i16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0]
+// GFX12: v_cmp_ne_i16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x00,0x35,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+
+v_cmp_ne_i16_e64_dpp ttmp15, v1.h, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_ne_i16_e64_dpp ttmp15, v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7b,0x08,0x35,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_ne_i16_e64_dpp ttmp[14:15], v1.h, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W64: v_cmp_ne_i16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7a,0x08,0x35,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_i16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:0
-// GFX12: v_cmp_ne_i16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x00,0x35,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+v_cmp_ne_i16_e64_dpp null, v255.l, v255.h dpp8:[0,0,0,0,0,0,0,0] fi:0
+// GFX12: v_cmp_ne_i16_e64_dpp null, v255.l, v255.h op_sel:[0,1] dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x10,0x35,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
 
 v_cmp_ne_i32_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
 // W32: v_cmp_ne_i32_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x45,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
@@ -1999,60 +2120,71 @@ v_cmp_ne_i32_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
 v_cmp_ne_i32_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:0
 // GFX12: v_cmp_ne_i32_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x00,0x45,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
 
-v_cmp_ne_u16_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_ne_u16_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ne_u16_e64_dpp s5, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_ne_u16_e64_dpp s5, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_u16_e64_dpp s5, v1, s2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_ne_u16_e64_dpp s5, v1, s2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x3d,0xd4,0xe9,0x04,0x00,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ne_u16_e64_dpp s5, v1.l, s2 dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_ne_u16_e64_dpp s5, v1.l, s2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x3d,0xd4,0xe9,0x04,0x00,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_u16_e64_dpp s5, v1, 10 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_ne_u16_e64_dpp s5, v1, 10 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x3d,0xd4,0xe9,0x14,0x01,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ne_u16_e64_dpp s5, v1.l, 10 dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_ne_u16_e64_dpp s5, v1.l, 10 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x3d,0xd4,0xe9,0x14,0x01,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_u16_e64_dpp s105, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_ne_u16_e64_dpp s105, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x69,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ne_u16_e64_dpp s105, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_ne_u16_e64_dpp s105, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x69,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_u16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_ne_u16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ne_u16_e64_dpp vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_ne_u16_e64_dpp vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_u16_e64_dpp vcc_hi, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_ne_u16_e64_dpp vcc_hi, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6b,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ne_u16_e64_dpp vcc_hi, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_ne_u16_e64_dpp vcc_hi, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6b,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_u16_e64_dpp ttmp15, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W32: v_cmp_ne_u16_e64_dpp ttmp15, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7b,0x00,0x3d,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ne_u16_e64_dpp ttmp15, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_ne_u16_e64_dpp ttmp15, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7b,0x00,0x3d,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ne_u16_e64_dpp s[10:11], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_ne_u16_e64_dpp s[10:11], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_u16_e64_dpp s[10:11], v1, s2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_ne_u16_e64_dpp s[10:11], v1, s2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3d,0xd4,0xe9,0x04,0x00,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ne_u16_e64_dpp s[10:11], v1.l, s2 dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_ne_u16_e64_dpp s[10:11], v1.l, s2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3d,0xd4,0xe9,0x04,0x00,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_u16_e64_dpp s[10:11], v1, 10 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_ne_u16_e64_dpp s[10:11], v1, 10 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3d,0xd4,0xe9,0x14,0x01,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ne_u16_e64_dpp s[10:11], v1.l, 10 dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_ne_u16_e64_dpp s[10:11], v1.l, 10 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3d,0xd4,0xe9,0x14,0x01,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_u16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_ne_u16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ne_u16_e64_dpp s[104:105], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_ne_u16_e64_dpp s[104:105], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_u16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_ne_u16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ne_u16_e64_dpp vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_ne_u16_e64_dpp vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_u16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W64: v_cmp_ne_u16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7a,0x00,0x3d,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ne_u16_e64_dpp ttmp14, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_ne_u16_e64_dpp ttmp14, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7a,0x00,0x3d,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_ne_u16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0]
+// GFX12: v_cmp_ne_u16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x00,0x3d,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+
+v_cmp_ne_u16_e64_dpp ttmp15, v1.h, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_ne_u16_e64_dpp ttmp15, v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7b,0x08,0x3d,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
+
+v_cmp_ne_u16_e64_dpp ttmp[14:15], v1.h, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W64: v_cmp_ne_u16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x7a,0x08,0x3d,0xd4,0xea,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:22: error: invalid operand for instruction
 
-v_cmp_ne_u16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:0
-// GFX12: v_cmp_ne_u16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x00,0x3d,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+v_cmp_ne_u16_e64_dpp null, v255.l, v255.h dpp8:[0,0,0,0,0,0,0,0] fi:0
+// GFX12: v_cmp_ne_u16_e64_dpp null, v255.l, v255.h op_sel:[0,1] dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0x7c,0x10,0x3d,0xd4,0xe9,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
 
 v_cmp_ne_u32_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
 // W32: v_cmp_ne_u32_e64_dpp s5, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x4d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
diff --git a/llvm/test/MC/AMDGPU/gfx12_asm_vopc.s b/llvm/test/MC/AMDGPU/gfx12_asm_vopc.s
index 7991231aa68ed3..324c803e379737 100644
--- a/llvm/test/MC/AMDGPU/gfx12_asm_vopc.s
+++ b/llvm/test/MC/AMDGPU/gfx12_asm_vopc.s
@@ -676,124 +676,164 @@ v_cmp_eq_f64 vcc, 0xaf123456, v[254:255]
 // W64: v_cmp_eq_f64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x45,0x7c,0x56,0x34,0x12,0xaf]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc_lo, v1, v2
-// W32: v_cmp_eq_i16_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x64,0x7c]
+v_cmp_eq_i16 vcc_lo, v1.l, v2.l
+// W32: v_cmp_eq_i16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x64,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc_lo, v127, v2
-// W32: v_cmp_eq_i16_e32 vcc_lo, v127, v2       ; encoding: [0x7f,0x05,0x64,0x7c]
+v_cmp_eq_i16 vcc_lo, v127.l, v2.l
+// W32: v_cmp_eq_i16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x64,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc_lo, s1, v2
-// W32: v_cmp_eq_i16_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x64,0x7c]
+v_cmp_eq_i16 vcc_lo, s1, v2.l
+// W32: v_cmp_eq_i16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x64,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc_lo, s105, v2
-// W32: v_cmp_eq_i16_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x64,0x7c]
+v_cmp_eq_i16 vcc_lo, s105, v2.l
+// W32: v_cmp_eq_i16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x64,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc_lo, vcc_lo, v2
-// W32: v_cmp_eq_i16_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x64,0x7c]
+v_cmp_eq_i16 vcc_lo, vcc_lo, v2.l
+// W32: v_cmp_eq_i16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x64,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc_lo, vcc_hi, v2
-// W32: v_cmp_eq_i16_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x64,0x7c]
+v_cmp_eq_i16 vcc_lo, vcc_hi, v2.l
+// W32: v_cmp_eq_i16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x64,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc_lo, ttmp15, v2
-// W32: v_cmp_eq_i16_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x64,0x7c]
+v_cmp_eq_i16 vcc_lo, ttmp15, v2.l
+// W32: v_cmp_eq_i16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x64,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc_lo, m0, v2
-// W32: v_cmp_eq_i16_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x64,0x7c]
+v_cmp_eq_i16 vcc_lo, m0, v2.l
+// W32: v_cmp_eq_i16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x64,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc_lo, exec_lo, v2
-// W32: v_cmp_eq_i16_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x64,0x7c]
+v_cmp_eq_i16 vcc_lo, exec_lo, v2.l
+// W32: v_cmp_eq_i16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x64,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc_lo, exec_hi, v2
-// W32: v_cmp_eq_i16_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x64,0x7c]
+v_cmp_eq_i16 vcc_lo, exec_hi, v2.l
+// W32: v_cmp_eq_i16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x64,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc_lo, null, v2
-// W32: v_cmp_eq_i16_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x64,0x7c]
+v_cmp_eq_i16 vcc_lo, null, v2.l
+// W32: v_cmp_eq_i16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x64,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc_lo, -1, v2
-// W32: v_cmp_eq_i16_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x64,0x7c]
+v_cmp_eq_i16 vcc_lo, -1, v2.l
+// W32: v_cmp_eq_i16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x64,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc_lo, 0.5, v2
-// W32: v_cmp_eq_i16_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x64,0x7c]
+v_cmp_eq_i16 vcc_lo, 0.5, v2.l
+// W32: v_cmp_eq_i16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x64,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc_lo, src_scc, v2
-// W32: v_cmp_eq_i16_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x64,0x7c]
+v_cmp_eq_i16 vcc_lo, src_scc, v2.l
+// W32: v_cmp_eq_i16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x64,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc_lo, 0xfe0b, v127
-// W32: v_cmp_eq_i16_e32 vcc_lo, 0xfe0b, v127   ; encoding: [0xff,0xfe,0x64,0x7c,0x0b,0xfe,0x00,0x00]
+v_cmp_eq_i16 vcc_lo, 0xfe0b, v127.l
+// W32: v_cmp_eq_i16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x64,0x7c,0x0b,0xfe,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc, v1, v2
-// W64: v_cmp_eq_i16_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x64,0x7c]
+v_cmp_eq_i16 vcc, v1.l, v2.l
+// W64: v_cmp_eq_i16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x64,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc, v127, v2
-// W64: v_cmp_eq_i16_e32 vcc, v127, v2          ; encoding: [0x7f,0x05,0x64,0x7c]
+v_cmp_eq_i16 vcc, v127.l, v2.l
+// W64: v_cmp_eq_i16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x64,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc, s1, v2
-// W64: v_cmp_eq_i16_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x64,0x7c]
+v_cmp_eq_i16 vcc, s1, v2.l
+// W64: v_cmp_eq_i16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x64,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc, s105, v2
-// W64: v_cmp_eq_i16_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x64,0x7c]
+v_cmp_eq_i16 vcc, s105, v2.l
+// W64: v_cmp_eq_i16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x64,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc, vcc_lo, v2
-// W64: v_cmp_eq_i16_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x64,0x7c]
+v_cmp_eq_i16 vcc, vcc_lo, v2.l
+// W64: v_cmp_eq_i16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x64,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc, vcc_hi, v2
-// W64: v_cmp_eq_i16_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x64,0x7c]
+v_cmp_eq_i16 vcc, vcc_hi, v2.l
+// W64: v_cmp_eq_i16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x64,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc, ttmp15, v2
-// W64: v_cmp_eq_i16_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x64,0x7c]
+v_cmp_eq_i16 vcc, ttmp15, v2.l
+// W64: v_cmp_eq_i16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x64,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc, m0, v2
-// W64: v_cmp_eq_i16_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x64,0x7c]
+v_cmp_eq_i16 vcc, m0, v2.l
+// W64: v_cmp_eq_i16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x64,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc, exec_lo, v2
-// W64: v_cmp_eq_i16_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x64,0x7c]
+v_cmp_eq_i16 vcc, exec_lo, v2.l
+// W64: v_cmp_eq_i16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x64,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc, exec_hi, v2
-// W64: v_cmp_eq_i16_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x64,0x7c]
+v_cmp_eq_i16 vcc, exec_hi, v2.l
+// W64: v_cmp_eq_i16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x64,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc, null, v2
-// W64: v_cmp_eq_i16_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x64,0x7c]
+v_cmp_eq_i16 vcc, null, v2.l
+// W64: v_cmp_eq_i16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x64,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc, -1, v2
-// W64: v_cmp_eq_i16_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x64,0x7c]
+v_cmp_eq_i16 vcc, -1, v2.l
+// W64: v_cmp_eq_i16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x64,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc, 0.5, v2
-// W64: v_cmp_eq_i16_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x64,0x7c]
+v_cmp_eq_i16 vcc, 0.5, v2.l
+// W64: v_cmp_eq_i16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x64,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc, src_scc, v2
-// W64: v_cmp_eq_i16_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x64,0x7c]
+v_cmp_eq_i16 vcc, src_scc, v2.l
+// W64: v_cmp_eq_i16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x64,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc, 0xfe0b, v127
-// W64: v_cmp_eq_i16_e32 vcc, 0xfe0b, v127      ; encoding: [0xff,0xfe,0x64,0x7c,0x0b,0xfe,0x00,0x00]
+v_cmp_eq_i16 vcc, 0xfe0b, v127.l
+// W64: v_cmp_eq_i16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x64,0x7c,0x0b,0xfe,0x00,0x00]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc_lo, v1.h, v2.l
+// W32: v_cmp_eq_i16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x64,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc, v1.h, v2.l
+// W64: v_cmp_eq_i16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x64,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc_lo, v127.h, v2.l
+// W32: v_cmp_eq_i16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x64,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc, v127.h, v2.l
+// W64: v_cmp_eq_i16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x64,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc_lo, 0x3800, v2.l
+// W32: v_cmp_eq_i16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x64,0x7c,0x00,0x38,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc, 0x3800, v2.l
+// W64: v_cmp_eq_i16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x64,0x7c,0x00,0x38,0x00,0x00]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc_lo, src_scc, v2.h
+// W32: v_cmp_eq_i16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x65,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc, src_scc, v2.h
+// W64: v_cmp_eq_i16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x65,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc_lo, 0xfe0b, v127.h
+// W32: v_cmp_eq_i16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x65,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc, 0xfe0b, v127.h
+// W64: v_cmp_eq_i16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x65,0x7c,0x0b,0xfe,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
 v_cmp_eq_i32 vcc_lo, v1, v2
@@ -1012,124 +1052,164 @@ v_cmp_eq_i64 vcc, 0xaf123456, v[254:255]
 // W64: v_cmp_eq_i64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xa5,0x7c,0x56,0x34,0x12,0xaf]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc_lo, v1, v2
-// W32: v_cmp_eq_u16_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x74,0x7c]
+v_cmp_eq_u16 vcc_lo, v1.l, v2.l
+// W32: v_cmp_eq_u16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x74,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc_lo, v127, v2
-// W32: v_cmp_eq_u16_e32 vcc_lo, v127, v2       ; encoding: [0x7f,0x05,0x74,0x7c]
+v_cmp_eq_u16 vcc_lo, v127.l, v2.l
+// W32: v_cmp_eq_u16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x74,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc_lo, s1, v2
-// W32: v_cmp_eq_u16_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x74,0x7c]
+v_cmp_eq_u16 vcc_lo, s1, v2.l
+// W32: v_cmp_eq_u16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x74,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc_lo, s105, v2
-// W32: v_cmp_eq_u16_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x74,0x7c]
+v_cmp_eq_u16 vcc_lo, s105, v2.l
+// W32: v_cmp_eq_u16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x74,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc_lo, vcc_lo, v2
-// W32: v_cmp_eq_u16_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x74,0x7c]
+v_cmp_eq_u16 vcc_lo, vcc_lo, v2.l
+// W32: v_cmp_eq_u16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x74,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc_lo, vcc_hi, v2
-// W32: v_cmp_eq_u16_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x74,0x7c]
+v_cmp_eq_u16 vcc_lo, vcc_hi, v2.l
+// W32: v_cmp_eq_u16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x74,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc_lo, ttmp15, v2
-// W32: v_cmp_eq_u16_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x74,0x7c]
+v_cmp_eq_u16 vcc_lo, ttmp15, v2.l
+// W32: v_cmp_eq_u16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x74,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc_lo, m0, v2
-// W32: v_cmp_eq_u16_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x74,0x7c]
+v_cmp_eq_u16 vcc_lo, m0, v2.l
+// W32: v_cmp_eq_u16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x74,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc_lo, exec_lo, v2
-// W32: v_cmp_eq_u16_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x74,0x7c]
+v_cmp_eq_u16 vcc_lo, exec_lo, v2.l
+// W32: v_cmp_eq_u16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x74,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc_lo, exec_hi, v2
-// W32: v_cmp_eq_u16_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x74,0x7c]
+v_cmp_eq_u16 vcc_lo, exec_hi, v2.l
+// W32: v_cmp_eq_u16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x74,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc_lo, null, v2
-// W32: v_cmp_eq_u16_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x74,0x7c]
+v_cmp_eq_u16 vcc_lo, null, v2.l
+// W32: v_cmp_eq_u16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x74,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc_lo, -1, v2
-// W32: v_cmp_eq_u16_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x74,0x7c]
+v_cmp_eq_u16 vcc_lo, -1, v2.l
+// W32: v_cmp_eq_u16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x74,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc_lo, 0.5, v2
-// W32: v_cmp_eq_u16_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x74,0x7c]
+v_cmp_eq_u16 vcc_lo, 0.5, v2.l
+// W32: v_cmp_eq_u16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x74,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc_lo, src_scc, v2
-// W32: v_cmp_eq_u16_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x74,0x7c]
+v_cmp_eq_u16 vcc_lo, src_scc, v2.l
+// W32: v_cmp_eq_u16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x74,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc_lo, 0xfe0b, v127
-// W32: v_cmp_eq_u16_e32 vcc_lo, 0xfe0b, v127   ; encoding: [0xff,0xfe,0x74,0x7c,0x0b,0xfe,0x00,0x00]
+v_cmp_eq_u16 vcc_lo, 0xfe0b, v127.l
+// W32: v_cmp_eq_u16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x74,0x7c,0x0b,0xfe,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc, v1, v2
-// W64: v_cmp_eq_u16_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x74,0x7c]
+v_cmp_eq_u16 vcc, v1.l, v2.l
+// W64: v_cmp_eq_u16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x74,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc, v127.l, v2.l
+// W64: v_cmp_eq_u16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x74,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc, s1, v2.l
+// W64: v_cmp_eq_u16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x74,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc, s105, v2.l
+// W64: v_cmp_eq_u16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x74,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc, vcc_lo, v2.l
+// W64: v_cmp_eq_u16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x74,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc, vcc_hi, v2.l
+// W64: v_cmp_eq_u16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x74,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc, v127, v2
-// W64: v_cmp_eq_u16_e32 vcc, v127, v2          ; encoding: [0x7f,0x05,0x74,0x7c]
+v_cmp_eq_u16 vcc, ttmp15, v2.l
+// W64: v_cmp_eq_u16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x74,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc, s1, v2
-// W64: v_cmp_eq_u16_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x74,0x7c]
+v_cmp_eq_u16 vcc, m0, v2.l
+// W64: v_cmp_eq_u16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x74,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc, s105, v2
-// W64: v_cmp_eq_u16_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x74,0x7c]
+v_cmp_eq_u16 vcc, exec_lo, v2.l
+// W64: v_cmp_eq_u16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x74,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc, vcc_lo, v2
-// W64: v_cmp_eq_u16_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x74,0x7c]
+v_cmp_eq_u16 vcc, exec_hi, v2.l
+// W64: v_cmp_eq_u16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x74,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc, vcc_hi, v2
-// W64: v_cmp_eq_u16_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x74,0x7c]
+v_cmp_eq_u16 vcc, null, v2.l
+// W64: v_cmp_eq_u16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x74,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc, ttmp15, v2
-// W64: v_cmp_eq_u16_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x74,0x7c]
+v_cmp_eq_u16 vcc, -1, v2.l
+// W64: v_cmp_eq_u16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x74,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc, m0, v2
-// W64: v_cmp_eq_u16_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x74,0x7c]
+v_cmp_eq_u16 vcc, 0.5, v2.l
+// W64: v_cmp_eq_u16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x74,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc, exec_lo, v2
-// W64: v_cmp_eq_u16_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x74,0x7c]
+v_cmp_eq_u16 vcc, src_scc, v2.l
+// W64: v_cmp_eq_u16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x74,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc, exec_hi, v2
-// W64: v_cmp_eq_u16_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x74,0x7c]
+v_cmp_eq_u16 vcc, 0xfe0b, v127.l
+// W64: v_cmp_eq_u16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x74,0x7c,0x0b,0xfe,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc, null, v2
-// W64: v_cmp_eq_u16_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x74,0x7c]
+v_cmp_eq_u16 vcc_lo, v1.h, v2.l
+// W32: v_cmp_eq_u16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x74,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc, v1.h, v2.l
+// W64: v_cmp_eq_u16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x74,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc, -1, v2
-// W64: v_cmp_eq_u16_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x74,0x7c]
+v_cmp_eq_u16 vcc_lo, v127.h, v2.l
+// W32: v_cmp_eq_u16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x74,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc, v127.h, v2.l
+// W64: v_cmp_eq_u16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x74,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc, 0.5, v2
-// W64: v_cmp_eq_u16_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x74,0x7c]
+v_cmp_eq_u16 vcc_lo, 0x3800, v2.l
+// W32: v_cmp_eq_u16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x74,0x7c,0x00,0x38,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc, 0x3800, v2.l
+// W64: v_cmp_eq_u16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x74,0x7c,0x00,0x38,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc, src_scc, v2
-// W64: v_cmp_eq_u16_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x74,0x7c]
+v_cmp_eq_u16 vcc_lo, src_scc, v2.h
+// W32: v_cmp_eq_u16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x75,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc, src_scc, v2.h
+// W64: v_cmp_eq_u16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x75,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc, 0xfe0b, v127
-// W64: v_cmp_eq_u16_e32 vcc, 0xfe0b, v127      ; encoding: [0xff,0xfe,0x74,0x7c,0x0b,0xfe,0x00,0x00]
+v_cmp_eq_u16 vcc_lo, 0xfe0b, v127.h
+// W32: v_cmp_eq_u16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x75,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc, 0xfe0b, v127.h
+// W64: v_cmp_eq_u16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x75,0x7c,0x0b,0xfe,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
 v_cmp_eq_u32 vcc_lo, v1, v2
@@ -1684,124 +1764,164 @@ v_cmp_ge_f64 vcc, 0xaf123456, v[254:255]
 // W64: v_cmp_ge_f64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x4d,0x7c,0x56,0x34,0x12,0xaf]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc_lo, v1, v2
-// W32: v_cmp_ge_i16_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x6c,0x7c]
+v_cmp_ge_i16 vcc_lo, v1.l, v2.l
+// W32: v_cmp_ge_i16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x6c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc_lo, v127, v2
-// W32: v_cmp_ge_i16_e32 vcc_lo, v127, v2       ; encoding: [0x7f,0x05,0x6c,0x7c]
+v_cmp_ge_i16 vcc_lo, v127.l, v2.l
+// W32: v_cmp_ge_i16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x6c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc_lo, s1, v2
-// W32: v_cmp_ge_i16_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x6c,0x7c]
+v_cmp_ge_i16 vcc_lo, s1, v2.l
+// W32: v_cmp_ge_i16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x6c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc_lo, s105, v2
-// W32: v_cmp_ge_i16_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x6c,0x7c]
+v_cmp_ge_i16 vcc_lo, s105, v2.l
+// W32: v_cmp_ge_i16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x6c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc_lo, vcc_lo, v2
-// W32: v_cmp_ge_i16_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x6c,0x7c]
+v_cmp_ge_i16 vcc_lo, vcc_lo, v2.l
+// W32: v_cmp_ge_i16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x6c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc_lo, vcc_hi, v2
-// W32: v_cmp_ge_i16_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x6c,0x7c]
+v_cmp_ge_i16 vcc_lo, vcc_hi, v2.l
+// W32: v_cmp_ge_i16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x6c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc_lo, ttmp15, v2
-// W32: v_cmp_ge_i16_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x6c,0x7c]
+v_cmp_ge_i16 vcc_lo, ttmp15, v2.l
+// W32: v_cmp_ge_i16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x6c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc_lo, m0, v2
-// W32: v_cmp_ge_i16_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x6c,0x7c]
+v_cmp_ge_i16 vcc_lo, m0, v2.l
+// W32: v_cmp_ge_i16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x6c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc_lo, exec_lo, v2
-// W32: v_cmp_ge_i16_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x6c,0x7c]
+v_cmp_ge_i16 vcc_lo, exec_lo, v2.l
+// W32: v_cmp_ge_i16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x6c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc_lo, exec_hi, v2
-// W32: v_cmp_ge_i16_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x6c,0x7c]
+v_cmp_ge_i16 vcc_lo, exec_hi, v2.l
+// W32: v_cmp_ge_i16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x6c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc_lo, null, v2
-// W32: v_cmp_ge_i16_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x6c,0x7c]
+v_cmp_ge_i16 vcc_lo, null, v2.l
+// W32: v_cmp_ge_i16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x6c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc_lo, -1, v2
-// W32: v_cmp_ge_i16_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x6c,0x7c]
+v_cmp_ge_i16 vcc_lo, -1, v2.l
+// W32: v_cmp_ge_i16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x6c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc_lo, 0.5, v2
-// W32: v_cmp_ge_i16_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x6c,0x7c]
+v_cmp_ge_i16 vcc_lo, 0.5, v2.l
+// W32: v_cmp_ge_i16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x6c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc_lo, src_scc, v2
-// W32: v_cmp_ge_i16_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x6c,0x7c]
+v_cmp_ge_i16 vcc_lo, src_scc, v2.l
+// W32: v_cmp_ge_i16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x6c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc_lo, 0xfe0b, v127
-// W32: v_cmp_ge_i16_e32 vcc_lo, 0xfe0b, v127   ; encoding: [0xff,0xfe,0x6c,0x7c,0x0b,0xfe,0x00,0x00]
+v_cmp_ge_i16 vcc_lo, 0xfe0b, v127.l
+// W32: v_cmp_ge_i16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x6c,0x7c,0x0b,0xfe,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc, v1, v2
-// W64: v_cmp_ge_i16_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x6c,0x7c]
+v_cmp_ge_i16 vcc, v1.l, v2.l
+// W64: v_cmp_ge_i16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x6c,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc, v127.l, v2.l
+// W64: v_cmp_ge_i16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x6c,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc, s1, v2.l
+// W64: v_cmp_ge_i16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x6c,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc, s105, v2.l
+// W64: v_cmp_ge_i16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x6c,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc, v127, v2
-// W64: v_cmp_ge_i16_e32 vcc, v127, v2          ; encoding: [0x7f,0x05,0x6c,0x7c]
+v_cmp_ge_i16 vcc, vcc_lo, v2.l
+// W64: v_cmp_ge_i16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x6c,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc, s1, v2
-// W64: v_cmp_ge_i16_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x6c,0x7c]
+v_cmp_ge_i16 vcc, vcc_hi, v2.l
+// W64: v_cmp_ge_i16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x6c,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc, s105, v2
-// W64: v_cmp_ge_i16_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x6c,0x7c]
+v_cmp_ge_i16 vcc, ttmp15, v2.l
+// W64: v_cmp_ge_i16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x6c,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc, vcc_lo, v2
-// W64: v_cmp_ge_i16_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x6c,0x7c]
+v_cmp_ge_i16 vcc, m0, v2.l
+// W64: v_cmp_ge_i16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x6c,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc, vcc_hi, v2
-// W64: v_cmp_ge_i16_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x6c,0x7c]
+v_cmp_ge_i16 vcc, exec_lo, v2.l
+// W64: v_cmp_ge_i16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x6c,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc, ttmp15, v2
-// W64: v_cmp_ge_i16_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x6c,0x7c]
+v_cmp_ge_i16 vcc, exec_hi, v2.l
+// W64: v_cmp_ge_i16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x6c,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc, m0, v2
-// W64: v_cmp_ge_i16_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x6c,0x7c]
+v_cmp_ge_i16 vcc, null, v2.l
+// W64: v_cmp_ge_i16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x6c,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc, exec_lo, v2
-// W64: v_cmp_ge_i16_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x6c,0x7c]
+v_cmp_ge_i16 vcc, -1, v2.l
+// W64: v_cmp_ge_i16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x6c,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc, exec_hi, v2
-// W64: v_cmp_ge_i16_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x6c,0x7c]
+v_cmp_ge_i16 vcc, 0.5, v2.l
+// W64: v_cmp_ge_i16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x6c,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc, null, v2
-// W64: v_cmp_ge_i16_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x6c,0x7c]
+v_cmp_ge_i16 vcc, src_scc, v2.l
+// W64: v_cmp_ge_i16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x6c,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc, -1, v2
-// W64: v_cmp_ge_i16_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x6c,0x7c]
+v_cmp_ge_i16 vcc, 0xfe0b, v127.l
+// W64: v_cmp_ge_i16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x6c,0x7c,0x0b,0xfe,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc, 0.5, v2
-// W64: v_cmp_ge_i16_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x6c,0x7c]
+v_cmp_ge_i16 vcc_lo, 0x3800, v2.l
+// W32: v_cmp_ge_i16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x6c,0x7c,0x00,0x38,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc, 0x3800, v2.l
+// W64: v_cmp_ge_i16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x6c,0x7c,0x00,0x38,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc, src_scc, v2
-// W64: v_cmp_ge_i16_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x6c,0x7c]
+v_cmp_ge_i16 vcc_lo, v1.h, v2.l
+// W32: v_cmp_ge_i16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x6c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc, v1.h, v2.l
+// W64: v_cmp_ge_i16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x6c,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc, 0xfe0b, v127
-// W64: v_cmp_ge_i16_e32 vcc, 0xfe0b, v127      ; encoding: [0xff,0xfe,0x6c,0x7c,0x0b,0xfe,0x00,0x00]
+v_cmp_ge_i16 vcc_lo, v127.h, v2.l
+// W32: v_cmp_ge_i16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x6c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc, v127.h, v2.l
+// W64: v_cmp_ge_i16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x6c,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc_lo, src_scc, v2.h
+// W32: v_cmp_ge_i16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x6d,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc, src_scc, v2.h
+// W64: v_cmp_ge_i16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x6d,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc_lo, 0xfe0b, v127.h
+// W32: v_cmp_ge_i16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x6d,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc, 0xfe0b, v127.h
+// W64: v_cmp_ge_i16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x6d,0x7c,0x0b,0xfe,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
 v_cmp_ge_i32 vcc_lo, v1, v2
@@ -2020,124 +2140,164 @@ v_cmp_ge_i64 vcc, 0xaf123456, v[254:255]
 // W64: v_cmp_ge_i64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xad,0x7c,0x56,0x34,0x12,0xaf]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc_lo, v1, v2
-// W32: v_cmp_ge_u16_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x7c,0x7c]
+v_cmp_ge_u16 vcc_lo, v1.l, v2.l
+// W32: v_cmp_ge_u16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x7c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc_lo, v127, v2
-// W32: v_cmp_ge_u16_e32 vcc_lo, v127, v2       ; encoding: [0x7f,0x05,0x7c,0x7c]
+v_cmp_ge_u16 vcc_lo, v127.l, v2.l
+// W32: v_cmp_ge_u16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x7c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc_lo, s1, v2
-// W32: v_cmp_ge_u16_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x7c,0x7c]
+v_cmp_ge_u16 vcc_lo, s1, v2.l
+// W32: v_cmp_ge_u16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x7c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc_lo, s105, v2
-// W32: v_cmp_ge_u16_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x7c,0x7c]
+v_cmp_ge_u16 vcc_lo, s105, v2.l
+// W32: v_cmp_ge_u16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x7c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc_lo, vcc_lo, v2
-// W32: v_cmp_ge_u16_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x7c,0x7c]
+v_cmp_ge_u16 vcc_lo, vcc_lo, v2.l
+// W32: v_cmp_ge_u16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x7c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc_lo, vcc_hi, v2
-// W32: v_cmp_ge_u16_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x7c,0x7c]
+v_cmp_ge_u16 vcc_lo, vcc_hi, v2.l
+// W32: v_cmp_ge_u16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x7c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc_lo, ttmp15, v2
-// W32: v_cmp_ge_u16_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x7c,0x7c]
+v_cmp_ge_u16 vcc_lo, ttmp15, v2.l
+// W32: v_cmp_ge_u16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x7c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc_lo, m0, v2
-// W32: v_cmp_ge_u16_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x7c,0x7c]
+v_cmp_ge_u16 vcc_lo, m0, v2.l
+// W32: v_cmp_ge_u16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x7c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc_lo, exec_lo, v2
-// W32: v_cmp_ge_u16_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x7c,0x7c]
+v_cmp_ge_u16 vcc_lo, exec_lo, v2.l
+// W32: v_cmp_ge_u16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x7c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc_lo, exec_hi, v2
-// W32: v_cmp_ge_u16_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x7c,0x7c]
+v_cmp_ge_u16 vcc_lo, exec_hi, v2.l
+// W32: v_cmp_ge_u16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x7c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc_lo, null, v2
-// W32: v_cmp_ge_u16_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x7c,0x7c]
+v_cmp_ge_u16 vcc_lo, null, v2.l
+// W32: v_cmp_ge_u16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x7c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc_lo, -1, v2
-// W32: v_cmp_ge_u16_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x7c,0x7c]
+v_cmp_ge_u16 vcc_lo, -1, v2.l
+// W32: v_cmp_ge_u16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x7c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc_lo, 0.5, v2
-// W32: v_cmp_ge_u16_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x7c,0x7c]
+v_cmp_ge_u16 vcc_lo, 0.5, v2.l
+// W32: v_cmp_ge_u16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x7c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc_lo, src_scc, v2
-// W32: v_cmp_ge_u16_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x7c,0x7c]
+v_cmp_ge_u16 vcc_lo, src_scc, v2.l
+// W32: v_cmp_ge_u16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x7c,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc_lo, 0xfe0b, v127
-// W32: v_cmp_ge_u16_e32 vcc_lo, 0xfe0b, v127   ; encoding: [0xff,0xfe,0x7c,0x7c,0x0b,0xfe,0x00,0x00]
+v_cmp_ge_u16 vcc_lo, 0xfe0b, v127.l
+// W32: v_cmp_ge_u16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x7c,0x7c,0x0b,0xfe,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc, v1, v2
-// W64: v_cmp_ge_u16_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x7c,0x7c]
+v_cmp_ge_u16 vcc, v1.l, v2.l
+// W64: v_cmp_ge_u16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x7c,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc, v127, v2
-// W64: v_cmp_ge_u16_e32 vcc, v127, v2          ; encoding: [0x7f,0x05,0x7c,0x7c]
+v_cmp_ge_u16 vcc, v127.l, v2.l
+// W64: v_cmp_ge_u16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x7c,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc, s1, v2
-// W64: v_cmp_ge_u16_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x7c,0x7c]
+v_cmp_ge_u16 vcc, s1, v2.l
+// W64: v_cmp_ge_u16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x7c,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc, s105, v2
-// W64: v_cmp_ge_u16_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x7c,0x7c]
+v_cmp_ge_u16 vcc, s105, v2.l
+// W64: v_cmp_ge_u16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x7c,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc, vcc_lo, v2
-// W64: v_cmp_ge_u16_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x7c,0x7c]
+v_cmp_ge_u16 vcc, vcc_lo, v2.l
+// W64: v_cmp_ge_u16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x7c,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc, vcc_hi, v2
-// W64: v_cmp_ge_u16_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x7c,0x7c]
+v_cmp_ge_u16 vcc, vcc_hi, v2.l
+// W64: v_cmp_ge_u16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x7c,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc, ttmp15, v2
-// W64: v_cmp_ge_u16_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x7c,0x7c]
+v_cmp_ge_u16 vcc, ttmp15, v2.l
+// W64: v_cmp_ge_u16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x7c,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc, m0, v2
-// W64: v_cmp_ge_u16_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x7c,0x7c]
+v_cmp_ge_u16 vcc, m0, v2.l
+// W64: v_cmp_ge_u16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x7c,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc, exec_lo, v2
-// W64: v_cmp_ge_u16_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x7c,0x7c]
+v_cmp_ge_u16 vcc, exec_lo, v2.l
+// W64: v_cmp_ge_u16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x7c,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc, exec_hi, v2
-// W64: v_cmp_ge_u16_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x7c,0x7c]
+v_cmp_ge_u16 vcc, exec_hi, v2.l
+// W64: v_cmp_ge_u16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x7c,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc, null, v2
-// W64: v_cmp_ge_u16_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x7c,0x7c]
+v_cmp_ge_u16 vcc, null, v2.l
+// W64: v_cmp_ge_u16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x7c,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc, -1, v2
-// W64: v_cmp_ge_u16_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x7c,0x7c]
+v_cmp_ge_u16 vcc, -1, v2.l
+// W64: v_cmp_ge_u16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x7c,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc, 0.5, v2
-// W64: v_cmp_ge_u16_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x7c,0x7c]
+v_cmp_ge_u16 vcc, 0.5, v2.l
+// W64: v_cmp_ge_u16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x7c,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc, src_scc, v2
-// W64: v_cmp_ge_u16_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x7c,0x7c]
+v_cmp_ge_u16 vcc, src_scc, v2.l
+// W64: v_cmp_ge_u16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x7c,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc, 0xfe0b, v127
-// W64: v_cmp_ge_u16_e32 vcc, 0xfe0b, v127      ; encoding: [0xff,0xfe,0x7c,0x7c,0x0b,0xfe,0x00,0x00]
+v_cmp_ge_u16 vcc, 0xfe0b, v127.l
+// W64: v_cmp_ge_u16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x7c,0x7c,0x0b,0xfe,0x00,0x00]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc_lo, 0x3800, v2.l
+// W32: v_cmp_ge_u16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x7c,0x7c,0x00,0x38,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc, 0x3800, v2.l
+// W64: v_cmp_ge_u16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x7c,0x7c,0x00,0x38,0x00,0x00]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc_lo, v1.h, v2.l
+// W32: v_cmp_ge_u16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x7c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc, v1.h, v2.l
+// W64: v_cmp_ge_u16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x7c,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc_lo, v127.h, v2.l
+// W32: v_cmp_ge_u16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x7c,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc, v127.h, v2.l
+// W64: v_cmp_ge_u16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x7c,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc_lo, src_scc, v2.h
+// W32: v_cmp_ge_u16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x7d,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc, src_scc, v2.h
+// W64: v_cmp_ge_u16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x7d,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc_lo, 0xfe0b, v127.h
+// W32: v_cmp_ge_u16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x7d,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc, 0xfe0b, v127.h
+// W64: v_cmp_ge_u16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x7d,0x7c,0x0b,0xfe,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
 v_cmp_ge_u32 vcc_lo, v1, v2
@@ -2692,124 +2852,164 @@ v_cmp_gt_f64 vcc, 0xaf123456, v[254:255]
 // W64: v_cmp_gt_f64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x49,0x7c,0x56,0x34,0x12,0xaf]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc_lo, v1, v2
-// W32: v_cmp_gt_i16_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x68,0x7c]
+v_cmp_gt_i16 vcc_lo, v1.l, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x68,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc_lo, v127, v2
-// W32: v_cmp_gt_i16_e32 vcc_lo, v127, v2       ; encoding: [0x7f,0x05,0x68,0x7c]
+v_cmp_gt_i16 vcc_lo, v127.l, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x68,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc_lo, s1, v2
-// W32: v_cmp_gt_i16_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x68,0x7c]
+v_cmp_gt_i16 vcc_lo, s1, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x68,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc_lo, s105, v2
-// W32: v_cmp_gt_i16_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x68,0x7c]
+v_cmp_gt_i16 vcc_lo, s105, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x68,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc_lo, vcc_lo, v2
-// W32: v_cmp_gt_i16_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x68,0x7c]
+v_cmp_gt_i16 vcc_lo, vcc_lo, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x68,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc_lo, vcc_hi, v2
-// W32: v_cmp_gt_i16_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x68,0x7c]
+v_cmp_gt_i16 vcc_lo, vcc_hi, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x68,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc_lo, ttmp15, v2
-// W32: v_cmp_gt_i16_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x68,0x7c]
+v_cmp_gt_i16 vcc_lo, ttmp15, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x68,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc_lo, m0, v2
-// W32: v_cmp_gt_i16_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x68,0x7c]
+v_cmp_gt_i16 vcc_lo, m0, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x68,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc_lo, exec_lo, v2
-// W32: v_cmp_gt_i16_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x68,0x7c]
+v_cmp_gt_i16 vcc_lo, exec_lo, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x68,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc_lo, exec_hi, v2
-// W32: v_cmp_gt_i16_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x68,0x7c]
+v_cmp_gt_i16 vcc_lo, exec_hi, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x68,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc_lo, null, v2
-// W32: v_cmp_gt_i16_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x68,0x7c]
+v_cmp_gt_i16 vcc_lo, null, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x68,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc_lo, -1, v2
-// W32: v_cmp_gt_i16_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x68,0x7c]
+v_cmp_gt_i16 vcc_lo, -1, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x68,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc_lo, 0.5, v2
-// W32: v_cmp_gt_i16_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x68,0x7c]
+v_cmp_gt_i16 vcc_lo, 0.5, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x68,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc_lo, src_scc, v2
-// W32: v_cmp_gt_i16_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x68,0x7c]
+v_cmp_gt_i16 vcc_lo, src_scc, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x68,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc_lo, 0xfe0b, v127
-// W32: v_cmp_gt_i16_e32 vcc_lo, 0xfe0b, v127   ; encoding: [0xff,0xfe,0x68,0x7c,0x0b,0xfe,0x00,0x00]
+v_cmp_gt_i16 vcc_lo, 0xfe0b, v127.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x68,0x7c,0x0b,0xfe,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc, v1, v2
-// W64: v_cmp_gt_i16_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x68,0x7c]
+v_cmp_gt_i16 vcc, v1.l, v2.l
+// W64: v_cmp_gt_i16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x68,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc, v127.l, v2.l
+// W64: v_cmp_gt_i16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x68,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc, s1, v2.l
+// W64: v_cmp_gt_i16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x68,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc, s105, v2.l
+// W64: v_cmp_gt_i16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x68,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc, vcc_lo, v2.l
+// W64: v_cmp_gt_i16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x68,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc, vcc_hi, v2.l
+// W64: v_cmp_gt_i16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x68,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc, v127, v2
-// W64: v_cmp_gt_i16_e32 vcc, v127, v2          ; encoding: [0x7f,0x05,0x68,0x7c]
+v_cmp_gt_i16 vcc, ttmp15, v2.l
+// W64: v_cmp_gt_i16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x68,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc, s1, v2
-// W64: v_cmp_gt_i16_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x68,0x7c]
+v_cmp_gt_i16 vcc, m0, v2.l
+// W64: v_cmp_gt_i16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x68,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc, s105, v2
-// W64: v_cmp_gt_i16_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x68,0x7c]
+v_cmp_gt_i16 vcc, exec_lo, v2.l
+// W64: v_cmp_gt_i16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x68,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc, vcc_lo, v2
-// W64: v_cmp_gt_i16_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x68,0x7c]
+v_cmp_gt_i16 vcc, exec_hi, v2.l
+// W64: v_cmp_gt_i16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x68,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc, vcc_hi, v2
-// W64: v_cmp_gt_i16_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x68,0x7c]
+v_cmp_gt_i16 vcc, null, v2.l
+// W64: v_cmp_gt_i16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x68,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc, ttmp15, v2
-// W64: v_cmp_gt_i16_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x68,0x7c]
+v_cmp_gt_i16 vcc, -1, v2.l
+// W64: v_cmp_gt_i16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x68,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc, m0, v2
-// W64: v_cmp_gt_i16_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x68,0x7c]
+v_cmp_gt_i16 vcc, 0.5, v2.l
+// W64: v_cmp_gt_i16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x68,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc, exec_lo, v2
-// W64: v_cmp_gt_i16_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x68,0x7c]
+v_cmp_gt_i16 vcc, src_scc, v2.l
+// W64: v_cmp_gt_i16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x68,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc, exec_hi, v2
-// W64: v_cmp_gt_i16_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x68,0x7c]
+v_cmp_gt_i16 vcc, 0xfe0b, v127.l
+// W64: v_cmp_gt_i16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x68,0x7c,0x0b,0xfe,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc, null, v2
-// W64: v_cmp_gt_i16_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x68,0x7c]
+v_cmp_gt_i16 vcc_lo, 0x3800, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x68,0x7c,0x00,0x38,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc, 0x3800, v2.l
+// W64: v_cmp_gt_i16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x68,0x7c,0x00,0x38,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc, -1, v2
-// W64: v_cmp_gt_i16_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x68,0x7c]
+v_cmp_gt_i16 vcc_lo, v1.h, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x68,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc, v1.h, v2.l
+// W64: v_cmp_gt_i16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x68,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc, 0.5, v2
-// W64: v_cmp_gt_i16_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x68,0x7c]
+v_cmp_gt_i16 vcc_lo, v127.h, v2.l
+// W32: v_cmp_gt_i16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x68,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc, v127.h, v2.l
+// W64: v_cmp_gt_i16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x68,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc, src_scc, v2
-// W64: v_cmp_gt_i16_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x68,0x7c]
+v_cmp_gt_i16 vcc_lo, src_scc, v2.h
+// W32: v_cmp_gt_i16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x69,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc, src_scc, v2.h
+// W64: v_cmp_gt_i16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x69,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc, 0xfe0b, v127
-// W64: v_cmp_gt_i16_e32 vcc, 0xfe0b, v127      ; encoding: [0xff,0xfe,0x68,0x7c,0x0b,0xfe,0x00,0x00]
+v_cmp_gt_i16 vcc_lo, 0xfe0b, v127.h
+// W32: v_cmp_gt_i16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x69,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc, 0xfe0b, v127.h
+// W64: v_cmp_gt_i16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x69,0x7c,0x0b,0xfe,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
 v_cmp_gt_i32 vcc_lo, v1, v2
@@ -3028,124 +3228,164 @@ v_cmp_gt_i64 vcc, 0xaf123456, v[254:255]
 // W64: v_cmp_gt_i64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xa9,0x7c,0x56,0x34,0x12,0xaf]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc_lo, v1, v2
-// W32: v_cmp_gt_u16_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x78,0x7c]
+v_cmp_gt_u16 vcc_lo, v1.l, v2.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x78,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc_lo, v127, v2
-// W32: v_cmp_gt_u16_e32 vcc_lo, v127, v2       ; encoding: [0x7f,0x05,0x78,0x7c]
+v_cmp_gt_u16 vcc_lo, v127.l, v2.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x78,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc_lo, s1, v2
-// W32: v_cmp_gt_u16_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x78,0x7c]
+v_cmp_gt_u16 vcc_lo, s1, v2.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x78,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc_lo, s105, v2
-// W32: v_cmp_gt_u16_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x78,0x7c]
+v_cmp_gt_u16 vcc_lo, s105, v2.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x78,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc_lo, vcc_lo, v2
-// W32: v_cmp_gt_u16_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x78,0x7c]
+v_cmp_gt_u16 vcc_lo, vcc_lo, v2.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x78,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc_lo, vcc_hi, v2
-// W32: v_cmp_gt_u16_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x78,0x7c]
+v_cmp_gt_u16 vcc_lo, vcc_hi, v2.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x78,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc_lo, ttmp15, v2
-// W32: v_cmp_gt_u16_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x78,0x7c]
+v_cmp_gt_u16 vcc_lo, ttmp15, v2.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x78,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc_lo, m0, v2
-// W32: v_cmp_gt_u16_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x78,0x7c]
+v_cmp_gt_u16 vcc_lo, m0, v2.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x78,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc_lo, exec_lo, v2
-// W32: v_cmp_gt_u16_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x78,0x7c]
+v_cmp_gt_u16 vcc_lo, exec_lo, v2.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x78,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc_lo, exec_hi, v2
-// W32: v_cmp_gt_u16_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x78,0x7c]
+v_cmp_gt_u16 vcc_lo, exec_hi, v2.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x78,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc_lo, null, v2
-// W32: v_cmp_gt_u16_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x78,0x7c]
+v_cmp_gt_u16 vcc_lo, null, v2.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x78,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc_lo, -1, v2
-// W32: v_cmp_gt_u16_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x78,0x7c]
+v_cmp_gt_u16 vcc_lo, -1, v2.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x78,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc_lo, 0.5, v2
-// W32: v_cmp_gt_u16_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x78,0x7c]
+v_cmp_gt_u16 vcc_lo, 0.5, v2.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x78,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc_lo, src_scc, v2
-// W32: v_cmp_gt_u16_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x78,0x7c]
+v_cmp_gt_u16 vcc_lo, src_scc, v2.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x78,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc_lo, 0xfe0b, v127
-// W32: v_cmp_gt_u16_e32 vcc_lo, 0xfe0b, v127   ; encoding: [0xff,0xfe,0x78,0x7c,0x0b,0xfe,0x00,0x00]
+v_cmp_gt_u16 vcc_lo, 0xfe0b, v127.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x78,0x7c,0x0b,0xfe,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc, v1, v2
-// W64: v_cmp_gt_u16_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x78,0x7c]
+v_cmp_gt_u16 vcc, v1.l, v2.l
+// W64: v_cmp_gt_u16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x78,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc, v127.l, v2.l
+// W64: v_cmp_gt_u16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x78,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc, s1, v2.l
+// W64: v_cmp_gt_u16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x78,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc, s105, v2.l
+// W64: v_cmp_gt_u16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x78,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc, v127, v2
-// W64: v_cmp_gt_u16_e32 vcc, v127, v2          ; encoding: [0x7f,0x05,0x78,0x7c]
+v_cmp_gt_u16 vcc, vcc_lo, v2.l
+// W64: v_cmp_gt_u16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x78,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc, s1, v2
-// W64: v_cmp_gt_u16_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x78,0x7c]
+v_cmp_gt_u16 vcc, vcc_hi, v2.l
+// W64: v_cmp_gt_u16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x78,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc, s105, v2
-// W64: v_cmp_gt_u16_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x78,0x7c]
+v_cmp_gt_u16 vcc, ttmp15, v2.l
+// W64: v_cmp_gt_u16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x78,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc, vcc_lo, v2
-// W64: v_cmp_gt_u16_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x78,0x7c]
+v_cmp_gt_u16 vcc, m0, v2.l
+// W64: v_cmp_gt_u16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x78,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc, vcc_hi, v2
-// W64: v_cmp_gt_u16_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x78,0x7c]
+v_cmp_gt_u16 vcc, exec_lo, v2.l
+// W64: v_cmp_gt_u16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x78,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc, ttmp15, v2
-// W64: v_cmp_gt_u16_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x78,0x7c]
+v_cmp_gt_u16 vcc, exec_hi, v2.l
+// W64: v_cmp_gt_u16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x78,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc, m0, v2
-// W64: v_cmp_gt_u16_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x78,0x7c]
+v_cmp_gt_u16 vcc, null, v2.l
+// W64: v_cmp_gt_u16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x78,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc, exec_lo, v2
-// W64: v_cmp_gt_u16_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x78,0x7c]
+v_cmp_gt_u16 vcc, -1, v2.l
+// W64: v_cmp_gt_u16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x78,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc, exec_hi, v2
-// W64: v_cmp_gt_u16_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x78,0x7c]
+v_cmp_gt_u16 vcc, 0.5, v2.l
+// W64: v_cmp_gt_u16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x78,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc, null, v2
-// W64: v_cmp_gt_u16_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x78,0x7c]
+v_cmp_gt_u16 vcc, src_scc, v2.l
+// W64: v_cmp_gt_u16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x78,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc, -1, v2
-// W64: v_cmp_gt_u16_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x78,0x7c]
+v_cmp_gt_u16 vcc, 0xfe0b, v127.l
+// W64: v_cmp_gt_u16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x78,0x7c,0x0b,0xfe,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc, 0.5, v2
-// W64: v_cmp_gt_u16_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x78,0x7c]
+v_cmp_gt_u16 vcc_lo, 0x3800, v2.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x78,0x7c,0x00,0x38,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc, 0x3800, v2.l
+// W64: v_cmp_gt_u16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x78,0x7c,0x00,0x38,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc, src_scc, v2
-// W64: v_cmp_gt_u16_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x78,0x7c]
+v_cmp_gt_u16 vcc_lo, v1.h, v2.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x78,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc, v1.h, v2.l
+// W64: v_cmp_gt_u16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x78,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc, 0xfe0b, v127
-// W64: v_cmp_gt_u16_e32 vcc, 0xfe0b, v127      ; encoding: [0xff,0xfe,0x78,0x7c,0x0b,0xfe,0x00,0x00]
+v_cmp_gt_u16 vcc_lo, v127.h, v2.l
+// W32: v_cmp_gt_u16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x78,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc, v127.h, v2.l
+// W64: v_cmp_gt_u16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x78,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc_lo, src_scc, v2.h
+// W32: v_cmp_gt_u16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x79,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc, src_scc, v2.h
+// W64: v_cmp_gt_u16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x79,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc_lo, 0xfe0b, v127.h
+// W32: v_cmp_gt_u16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x79,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc, 0xfe0b, v127.h
+// W64: v_cmp_gt_u16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x79,0x7c,0x0b,0xfe,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
 v_cmp_gt_u32 vcc_lo, v1, v2
@@ -3700,124 +3940,164 @@ v_cmp_le_f64 vcc, 0xaf123456, v[254:255]
 // W64: v_cmp_le_f64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x47,0x7c,0x56,0x34,0x12,0xaf]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc_lo, v1, v2
-// W32: v_cmp_le_i16_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x66,0x7c]
+v_cmp_le_i16 vcc_lo, v1.l, v2.l
+// W32: v_cmp_le_i16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x66,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc_lo, v127, v2
-// W32: v_cmp_le_i16_e32 vcc_lo, v127, v2       ; encoding: [0x7f,0x05,0x66,0x7c]
+v_cmp_le_i16 vcc_lo, v127.l, v2.l
+// W32: v_cmp_le_i16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x66,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc_lo, s1, v2
-// W32: v_cmp_le_i16_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x66,0x7c]
+v_cmp_le_i16 vcc_lo, s1, v2.l
+// W32: v_cmp_le_i16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x66,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc_lo, s105, v2
-// W32: v_cmp_le_i16_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x66,0x7c]
+v_cmp_le_i16 vcc_lo, s105, v2.l
+// W32: v_cmp_le_i16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x66,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc_lo, vcc_lo, v2
-// W32: v_cmp_le_i16_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x66,0x7c]
+v_cmp_le_i16 vcc_lo, vcc_lo, v2.l
+// W32: v_cmp_le_i16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x66,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc_lo, vcc_hi, v2
-// W32: v_cmp_le_i16_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x66,0x7c]
+v_cmp_le_i16 vcc_lo, vcc_hi, v2.l
+// W32: v_cmp_le_i16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x66,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc_lo, ttmp15, v2
-// W32: v_cmp_le_i16_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x66,0x7c]
+v_cmp_le_i16 vcc_lo, ttmp15, v2.l
+// W32: v_cmp_le_i16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x66,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc_lo, m0, v2
-// W32: v_cmp_le_i16_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x66,0x7c]
+v_cmp_le_i16 vcc_lo, m0, v2.l
+// W32: v_cmp_le_i16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x66,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc_lo, exec_lo, v2
-// W32: v_cmp_le_i16_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x66,0x7c]
+v_cmp_le_i16 vcc_lo, exec_lo, v2.l
+// W32: v_cmp_le_i16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x66,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc_lo, exec_hi, v2
-// W32: v_cmp_le_i16_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x66,0x7c]
+v_cmp_le_i16 vcc_lo, exec_hi, v2.l
+// W32: v_cmp_le_i16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x66,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc_lo, null, v2
-// W32: v_cmp_le_i16_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x66,0x7c]
+v_cmp_le_i16 vcc_lo, null, v2.l
+// W32: v_cmp_le_i16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x66,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc_lo, -1, v2
-// W32: v_cmp_le_i16_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x66,0x7c]
+v_cmp_le_i16 vcc_lo, -1, v2.l
+// W32: v_cmp_le_i16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x66,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc_lo, 0.5, v2
-// W32: v_cmp_le_i16_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x66,0x7c]
+v_cmp_le_i16 vcc_lo, 0.5, v2.l
+// W32: v_cmp_le_i16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x66,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc_lo, src_scc, v2
-// W32: v_cmp_le_i16_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x66,0x7c]
+v_cmp_le_i16 vcc_lo, src_scc, v2.l
+// W32: v_cmp_le_i16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x66,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc_lo, 0xfe0b, v127
-// W32: v_cmp_le_i16_e32 vcc_lo, 0xfe0b, v127   ; encoding: [0xff,0xfe,0x66,0x7c,0x0b,0xfe,0x00,0x00]
+v_cmp_le_i16 vcc_lo, 0xfe0b, v127.l
+// W32: v_cmp_le_i16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x66,0x7c,0x0b,0xfe,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc, v1, v2
-// W64: v_cmp_le_i16_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x66,0x7c]
+v_cmp_le_i16 vcc, v1.l, v2.l
+// W64: v_cmp_le_i16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x66,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc, v127, v2
-// W64: v_cmp_le_i16_e32 vcc, v127, v2          ; encoding: [0x7f,0x05,0x66,0x7c]
+v_cmp_le_i16 vcc, v127.l, v2.l
+// W64: v_cmp_le_i16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x66,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc, s1, v2
-// W64: v_cmp_le_i16_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x66,0x7c]
+v_cmp_le_i16 vcc, s1, v2.l
+// W64: v_cmp_le_i16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x66,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc, s105, v2
-// W64: v_cmp_le_i16_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x66,0x7c]
+v_cmp_le_i16 vcc, s105, v2.l
+// W64: v_cmp_le_i16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x66,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc, vcc_lo, v2
-// W64: v_cmp_le_i16_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x66,0x7c]
+v_cmp_le_i16 vcc, vcc_lo, v2.l
+// W64: v_cmp_le_i16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x66,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc, vcc_hi, v2
-// W64: v_cmp_le_i16_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x66,0x7c]
+v_cmp_le_i16 vcc, vcc_hi, v2.l
+// W64: v_cmp_le_i16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x66,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc, ttmp15, v2
-// W64: v_cmp_le_i16_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x66,0x7c]
+v_cmp_le_i16 vcc, ttmp15, v2.l
+// W64: v_cmp_le_i16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x66,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc, m0, v2
-// W64: v_cmp_le_i16_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x66,0x7c]
+v_cmp_le_i16 vcc, m0, v2.l
+// W64: v_cmp_le_i16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x66,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc, exec_lo, v2
-// W64: v_cmp_le_i16_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x66,0x7c]
+v_cmp_le_i16 vcc, exec_lo, v2.l
+// W64: v_cmp_le_i16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x66,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc, exec_hi, v2
-// W64: v_cmp_le_i16_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x66,0x7c]
+v_cmp_le_i16 vcc, exec_hi, v2.l
+// W64: v_cmp_le_i16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x66,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc, null, v2
-// W64: v_cmp_le_i16_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x66,0x7c]
+v_cmp_le_i16 vcc, null, v2.l
+// W64: v_cmp_le_i16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x66,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc, -1, v2
-// W64: v_cmp_le_i16_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x66,0x7c]
+v_cmp_le_i16 vcc, -1, v2.l
+// W64: v_cmp_le_i16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x66,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc, 0.5, v2
-// W64: v_cmp_le_i16_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x66,0x7c]
+v_cmp_le_i16 vcc, 0.5, v2.l
+// W64: v_cmp_le_i16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x66,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc, src_scc, v2
-// W64: v_cmp_le_i16_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x66,0x7c]
+v_cmp_le_i16 vcc, src_scc, v2.l
+// W64: v_cmp_le_i16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x66,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc, 0xfe0b, v127
-// W64: v_cmp_le_i16_e32 vcc, 0xfe0b, v127      ; encoding: [0xff,0xfe,0x66,0x7c,0x0b,0xfe,0x00,0x00]
+v_cmp_le_i16 vcc, 0xfe0b, v127.l
+// W64: v_cmp_le_i16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x66,0x7c,0x0b,0xfe,0x00,0x00]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc_lo, 0x3800, v2.l
+// W32: v_cmp_le_i16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x66,0x7c,0x00,0x38,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc, 0x3800, v2.l
+// W64: v_cmp_le_i16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x66,0x7c,0x00,0x38,0x00,0x00]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc_lo, v1.h, v2.l
+// W32: v_cmp_le_i16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x66,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc, v1.h, v2.l
+// W64: v_cmp_le_i16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x66,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc_lo, v127.h, v2.l
+// W32: v_cmp_le_i16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x66,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc, v127.h, v2.l
+// W64: v_cmp_le_i16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x66,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc_lo, src_scc, v2.h
+// W32: v_cmp_le_i16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x67,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc, src_scc, v2.h
+// W64: v_cmp_le_i16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x67,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc_lo, 0xfe0b, v127.h
+// W32: v_cmp_le_i16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x67,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc, 0xfe0b, v127.h
+// W64: v_cmp_le_i16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x67,0x7c,0x0b,0xfe,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
 v_cmp_le_i32 vcc_lo, v1, v2
@@ -4036,124 +4316,164 @@ v_cmp_le_i64 vcc, 0xaf123456, v[254:255]
 // W64: v_cmp_le_i64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xa7,0x7c,0x56,0x34,0x12,0xaf]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc_lo, v1, v2
-// W32: v_cmp_le_u16_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x76,0x7c]
+v_cmp_le_u16 vcc_lo, v1.l, v2.l
+// W32: v_cmp_le_u16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x76,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc_lo, v127, v2
-// W32: v_cmp_le_u16_e32 vcc_lo, v127, v2       ; encoding: [0x7f,0x05,0x76,0x7c]
+v_cmp_le_u16 vcc_lo, v127.l, v2.l
+// W32: v_cmp_le_u16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x76,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc_lo, s1, v2
-// W32: v_cmp_le_u16_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x76,0x7c]
+v_cmp_le_u16 vcc_lo, s1, v2.l
+// W32: v_cmp_le_u16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x76,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc_lo, s105, v2
-// W32: v_cmp_le_u16_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x76,0x7c]
+v_cmp_le_u16 vcc_lo, s105, v2.l
+// W32: v_cmp_le_u16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x76,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc_lo, vcc_lo, v2
-// W32: v_cmp_le_u16_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x76,0x7c]
+v_cmp_le_u16 vcc_lo, vcc_lo, v2.l
+// W32: v_cmp_le_u16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x76,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc_lo, vcc_hi, v2
-// W32: v_cmp_le_u16_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x76,0x7c]
+v_cmp_le_u16 vcc_lo, vcc_hi, v2.l
+// W32: v_cmp_le_u16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x76,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc_lo, ttmp15, v2
-// W32: v_cmp_le_u16_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x76,0x7c]
+v_cmp_le_u16 vcc_lo, ttmp15, v2.l
+// W32: v_cmp_le_u16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x76,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc_lo, m0, v2
-// W32: v_cmp_le_u16_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x76,0x7c]
+v_cmp_le_u16 vcc_lo, m0, v2.l
+// W32: v_cmp_le_u16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x76,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc_lo, exec_lo, v2
-// W32: v_cmp_le_u16_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x76,0x7c]
+v_cmp_le_u16 vcc_lo, exec_lo, v2.l
+// W32: v_cmp_le_u16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x76,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc_lo, exec_hi, v2
-// W32: v_cmp_le_u16_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x76,0x7c]
+v_cmp_le_u16 vcc_lo, exec_hi, v2.l
+// W32: v_cmp_le_u16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x76,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc_lo, null, v2
-// W32: v_cmp_le_u16_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x76,0x7c]
+v_cmp_le_u16 vcc_lo, null, v2.l
+// W32: v_cmp_le_u16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x76,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc_lo, -1, v2
-// W32: v_cmp_le_u16_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x76,0x7c]
+v_cmp_le_u16 vcc_lo, -1, v2.l
+// W32: v_cmp_le_u16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x76,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc_lo, 0.5, v2
-// W32: v_cmp_le_u16_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x76,0x7c]
+v_cmp_le_u16 vcc_lo, 0.5, v2.l
+// W32: v_cmp_le_u16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x76,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc_lo, src_scc, v2
-// W32: v_cmp_le_u16_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x76,0x7c]
+v_cmp_le_u16 vcc_lo, src_scc, v2.l
+// W32: v_cmp_le_u16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x76,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc_lo, 0xfe0b, v127
-// W32: v_cmp_le_u16_e32 vcc_lo, 0xfe0b, v127   ; encoding: [0xff,0xfe,0x76,0x7c,0x0b,0xfe,0x00,0x00]
+v_cmp_le_u16 vcc_lo, 0xfe0b, v127.l
+// W32: v_cmp_le_u16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x76,0x7c,0x0b,0xfe,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc, v1, v2
-// W64: v_cmp_le_u16_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x76,0x7c]
+v_cmp_le_u16 vcc, v1.l, v2.l
+// W64: v_cmp_le_u16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x76,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc, v127.l, v2.l
+// W64: v_cmp_le_u16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x76,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc, s1, v2.l
+// W64: v_cmp_le_u16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x76,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc, s105, v2.l
+// W64: v_cmp_le_u16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x76,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc, vcc_lo, v2.l
+// W64: v_cmp_le_u16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x76,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc, vcc_hi, v2.l
+// W64: v_cmp_le_u16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x76,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc, v127, v2
-// W64: v_cmp_le_u16_e32 vcc, v127, v2          ; encoding: [0x7f,0x05,0x76,0x7c]
+v_cmp_le_u16 vcc, ttmp15, v2.l
+// W64: v_cmp_le_u16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x76,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc, s1, v2
-// W64: v_cmp_le_u16_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x76,0x7c]
+v_cmp_le_u16 vcc, m0, v2.l
+// W64: v_cmp_le_u16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x76,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc, s105, v2
-// W64: v_cmp_le_u16_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x76,0x7c]
+v_cmp_le_u16 vcc, exec_lo, v2.l
+// W64: v_cmp_le_u16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x76,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc, vcc_lo, v2
-// W64: v_cmp_le_u16_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x76,0x7c]
+v_cmp_le_u16 vcc, exec_hi, v2.l
+// W64: v_cmp_le_u16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x76,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc, vcc_hi, v2
-// W64: v_cmp_le_u16_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x76,0x7c]
+v_cmp_le_u16 vcc, null, v2.l
+// W64: v_cmp_le_u16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x76,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc, ttmp15, v2
-// W64: v_cmp_le_u16_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x76,0x7c]
+v_cmp_le_u16 vcc, -1, v2.l
+// W64: v_cmp_le_u16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x76,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc, m0, v2
-// W64: v_cmp_le_u16_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x76,0x7c]
+v_cmp_le_u16 vcc, 0.5, v2.l
+// W64: v_cmp_le_u16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x76,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc, exec_lo, v2
-// W64: v_cmp_le_u16_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x76,0x7c]
+v_cmp_le_u16 vcc, src_scc, v2.l
+// W64: v_cmp_le_u16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x76,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc, exec_hi, v2
-// W64: v_cmp_le_u16_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x76,0x7c]
+v_cmp_le_u16 vcc, 0xfe0b, v127.l
+// W64: v_cmp_le_u16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x76,0x7c,0x0b,0xfe,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc, null, v2
-// W64: v_cmp_le_u16_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x76,0x7c]
+v_cmp_le_u16 vcc_lo, 0x3800, v2.l
+// W32: v_cmp_le_u16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x76,0x7c,0x00,0x38,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc, 0x3800, v2.l
+// W64: v_cmp_le_u16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x76,0x7c,0x00,0x38,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc, -1, v2
-// W64: v_cmp_le_u16_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x76,0x7c]
+v_cmp_le_u16 vcc_lo, v1.h, v2.l
+// W32: v_cmp_le_u16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x76,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc, v1.h, v2.l
+// W64: v_cmp_le_u16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x76,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc, 0.5, v2
-// W64: v_cmp_le_u16_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x76,0x7c]
+v_cmp_le_u16 vcc_lo, v127.h, v2.l
+// W32: v_cmp_le_u16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x76,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc, v127.h, v2.l
+// W64: v_cmp_le_u16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x76,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc, src_scc, v2
-// W64: v_cmp_le_u16_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x76,0x7c]
+v_cmp_le_u16 vcc_lo, src_scc, v2.h
+// W32: v_cmp_le_u16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x77,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc, src_scc, v2.h
+// W64: v_cmp_le_u16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x77,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc, 0xfe0b, v127
-// W64: v_cmp_le_u16_e32 vcc, 0xfe0b, v127      ; encoding: [0xff,0xfe,0x76,0x7c,0x0b,0xfe,0x00,0x00]
+v_cmp_le_u16 vcc_lo, 0xfe0b, v127.h
+// W32: v_cmp_le_u16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x77,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc, 0xfe0b, v127.h
+// W64: v_cmp_le_u16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x77,0x7c,0x0b,0xfe,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
 v_cmp_le_u32 vcc_lo, v1, v2
@@ -5076,124 +5396,164 @@ v_cmp_lt_f64 vcc, 0xaf123456, v[254:255]
 // W64: v_cmp_lt_f64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x43,0x7c,0x56,0x34,0x12,0xaf]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc_lo, v1, v2
-// W32: v_cmp_lt_i16_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x62,0x7c]
+v_cmp_lt_i16 vcc_lo, v1.l, v2.l
+// W32: v_cmp_lt_i16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x62,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc_lo, v127, v2
-// W32: v_cmp_lt_i16_e32 vcc_lo, v127, v2       ; encoding: [0x7f,0x05,0x62,0x7c]
+v_cmp_lt_i16 vcc_lo, v127.l, v2.l
+// W32: v_cmp_lt_i16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x62,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc_lo, s1, v2
-// W32: v_cmp_lt_i16_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x62,0x7c]
+v_cmp_lt_i16 vcc_lo, s1, v2.l
+// W32: v_cmp_lt_i16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x62,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc_lo, s105, v2
-// W32: v_cmp_lt_i16_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x62,0x7c]
+v_cmp_lt_i16 vcc_lo, s105, v2.l
+// W32: v_cmp_lt_i16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x62,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc_lo, vcc_lo, v2
-// W32: v_cmp_lt_i16_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x62,0x7c]
+v_cmp_lt_i16 vcc_lo, vcc_lo, v2.l
+// W32: v_cmp_lt_i16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x62,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc_lo, vcc_hi, v2
-// W32: v_cmp_lt_i16_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x62,0x7c]
+v_cmp_lt_i16 vcc_lo, vcc_hi, v2.l
+// W32: v_cmp_lt_i16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x62,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc_lo, ttmp15, v2
-// W32: v_cmp_lt_i16_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x62,0x7c]
+v_cmp_lt_i16 vcc_lo, ttmp15, v2.l
+// W32: v_cmp_lt_i16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x62,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc_lo, m0, v2
-// W32: v_cmp_lt_i16_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x62,0x7c]
+v_cmp_lt_i16 vcc_lo, m0, v2.l
+// W32: v_cmp_lt_i16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x62,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc_lo, exec_lo, v2
-// W32: v_cmp_lt_i16_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x62,0x7c]
+v_cmp_lt_i16 vcc_lo, exec_lo, v2.l
+// W32: v_cmp_lt_i16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x62,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc_lo, exec_hi, v2
-// W32: v_cmp_lt_i16_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x62,0x7c]
+v_cmp_lt_i16 vcc_lo, exec_hi, v2.l
+// W32: v_cmp_lt_i16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x62,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc_lo, null, v2
-// W32: v_cmp_lt_i16_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x62,0x7c]
+v_cmp_lt_i16 vcc_lo, null, v2.l
+// W32: v_cmp_lt_i16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x62,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc_lo, -1, v2
-// W32: v_cmp_lt_i16_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x62,0x7c]
+v_cmp_lt_i16 vcc_lo, -1, v2.l
+// W32: v_cmp_lt_i16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x62,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc_lo, 0.5, v2
-// W32: v_cmp_lt_i16_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x62,0x7c]
+v_cmp_lt_i16 vcc_lo, 0.5, v2.l
+// W32: v_cmp_lt_i16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x62,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc_lo, src_scc, v2
-// W32: v_cmp_lt_i16_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x62,0x7c]
+v_cmp_lt_i16 vcc_lo, src_scc, v2.l
+// W32: v_cmp_lt_i16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x62,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc_lo, 0xfe0b, v127
-// W32: v_cmp_lt_i16_e32 vcc_lo, 0xfe0b, v127   ; encoding: [0xff,0xfe,0x62,0x7c,0x0b,0xfe,0x00,0x00]
+v_cmp_lt_i16 vcc_lo, 0xfe0b, v127.l
+// W32: v_cmp_lt_i16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x62,0x7c,0x0b,0xfe,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc, v1, v2
-// W64: v_cmp_lt_i16_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x62,0x7c]
+v_cmp_lt_i16 vcc, v1.l, v2.l
+// W64: v_cmp_lt_i16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x62,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc, v127.l, v2.l
+// W64: v_cmp_lt_i16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x62,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc, s1, v2.l
+// W64: v_cmp_lt_i16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x62,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc, s105, v2.l
+// W64: v_cmp_lt_i16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x62,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc, v127, v2
-// W64: v_cmp_lt_i16_e32 vcc, v127, v2          ; encoding: [0x7f,0x05,0x62,0x7c]
+v_cmp_lt_i16 vcc, vcc_lo, v2.l
+// W64: v_cmp_lt_i16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x62,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc, s1, v2
-// W64: v_cmp_lt_i16_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x62,0x7c]
+v_cmp_lt_i16 vcc, vcc_hi, v2.l
+// W64: v_cmp_lt_i16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x62,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc, s105, v2
-// W64: v_cmp_lt_i16_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x62,0x7c]
+v_cmp_lt_i16 vcc, ttmp15, v2.l
+// W64: v_cmp_lt_i16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x62,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc, vcc_lo, v2
-// W64: v_cmp_lt_i16_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x62,0x7c]
+v_cmp_lt_i16 vcc, m0, v2.l
+// W64: v_cmp_lt_i16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x62,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc, vcc_hi, v2
-// W64: v_cmp_lt_i16_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x62,0x7c]
+v_cmp_lt_i16 vcc, exec_lo, v2.l
+// W64: v_cmp_lt_i16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x62,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc, ttmp15, v2
-// W64: v_cmp_lt_i16_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x62,0x7c]
+v_cmp_lt_i16 vcc, exec_hi, v2.l
+// W64: v_cmp_lt_i16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x62,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc, m0, v2
-// W64: v_cmp_lt_i16_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x62,0x7c]
+v_cmp_lt_i16 vcc, null, v2.l
+// W64: v_cmp_lt_i16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x62,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc, exec_lo, v2
-// W64: v_cmp_lt_i16_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x62,0x7c]
+v_cmp_lt_i16 vcc, -1, v2.l
+// W64: v_cmp_lt_i16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x62,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc, exec_hi, v2
-// W64: v_cmp_lt_i16_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x62,0x7c]
+v_cmp_lt_i16 vcc, 0.5, v2.l
+// W64: v_cmp_lt_i16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x62,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc, null, v2
-// W64: v_cmp_lt_i16_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x62,0x7c]
+v_cmp_lt_i16 vcc, src_scc, v2.l
+// W64: v_cmp_lt_i16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x62,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc, -1, v2
-// W64: v_cmp_lt_i16_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x62,0x7c]
+v_cmp_lt_i16 vcc, 0xfe0b, v127.l
+// W64: v_cmp_lt_i16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x62,0x7c,0x0b,0xfe,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc, 0.5, v2
-// W64: v_cmp_lt_i16_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x62,0x7c]
+v_cmp_lt_i16 vcc_lo, 0x3800, v2.l
+// W32: v_cmp_lt_i16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x62,0x7c,0x00,0x38,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc, 0x3800, v2.l
+// W64: v_cmp_lt_i16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x62,0x7c,0x00,0x38,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc, src_scc, v2
-// W64: v_cmp_lt_i16_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x62,0x7c]
+v_cmp_lt_i16 vcc_lo, v1.h, v2.l
+// W32: v_cmp_lt_i16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x62,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc, v1.h, v2.l
+// W64: v_cmp_lt_i16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x62,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc, 0xfe0b, v127
-// W64: v_cmp_lt_i16_e32 vcc, 0xfe0b, v127      ; encoding: [0xff,0xfe,0x62,0x7c,0x0b,0xfe,0x00,0x00]
+v_cmp_lt_i16 vcc_lo, v127.h, v2.l
+// W32: v_cmp_lt_i16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x62,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc, v127.h, v2.l
+// W64: v_cmp_lt_i16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x62,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc_lo, src_scc, v2.h
+// W32: v_cmp_lt_i16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x63,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc, src_scc, v2.h
+// W64: v_cmp_lt_i16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x63,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc_lo, 0xfe0b, v127.h
+// W32: v_cmp_lt_i16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x63,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc, 0xfe0b, v127.h
+// W64: v_cmp_lt_i16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x63,0x7c,0x0b,0xfe,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
 v_cmp_lt_i32 vcc_lo, v1, v2
@@ -5412,124 +5772,164 @@ v_cmp_lt_i64 vcc, 0xaf123456, v[254:255]
 // W64: v_cmp_lt_i64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xa3,0x7c,0x56,0x34,0x12,0xaf]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc_lo, v1, v2
-// W32: v_cmp_lt_u16_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x72,0x7c]
+v_cmp_lt_u16 vcc_lo, v1.l, v2.l
+// W32: v_cmp_lt_u16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x72,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc_lo, v127, v2
-// W32: v_cmp_lt_u16_e32 vcc_lo, v127, v2       ; encoding: [0x7f,0x05,0x72,0x7c]
+v_cmp_lt_u16 vcc_lo, v127.l, v2.l
+// W32: v_cmp_lt_u16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x72,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc_lo, s1, v2
-// W32: v_cmp_lt_u16_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x72,0x7c]
+v_cmp_lt_u16 vcc_lo, s1, v2.l
+// W32: v_cmp_lt_u16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x72,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc_lo, s105, v2
-// W32: v_cmp_lt_u16_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x72,0x7c]
+v_cmp_lt_u16 vcc_lo, s105, v2.l
+// W32: v_cmp_lt_u16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x72,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc_lo, vcc_lo, v2
-// W32: v_cmp_lt_u16_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x72,0x7c]
+v_cmp_lt_u16 vcc_lo, vcc_lo, v2.l
+// W32: v_cmp_lt_u16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x72,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc_lo, vcc_hi, v2
-// W32: v_cmp_lt_u16_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x72,0x7c]
+v_cmp_lt_u16 vcc_lo, vcc_hi, v2.l
+// W32: v_cmp_lt_u16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x72,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc_lo, ttmp15, v2
-// W32: v_cmp_lt_u16_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x72,0x7c]
+v_cmp_lt_u16 vcc_lo, ttmp15, v2.l
+// W32: v_cmp_lt_u16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x72,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc_lo, m0, v2
-// W32: v_cmp_lt_u16_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x72,0x7c]
+v_cmp_lt_u16 vcc_lo, m0, v2.l
+// W32: v_cmp_lt_u16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x72,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc_lo, exec_lo, v2
-// W32: v_cmp_lt_u16_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x72,0x7c]
+v_cmp_lt_u16 vcc_lo, exec_lo, v2.l
+// W32: v_cmp_lt_u16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x72,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc_lo, exec_hi, v2
-// W32: v_cmp_lt_u16_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x72,0x7c]
+v_cmp_lt_u16 vcc_lo, exec_hi, v2.l
+// W32: v_cmp_lt_u16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x72,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc_lo, null, v2
-// W32: v_cmp_lt_u16_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x72,0x7c]
+v_cmp_lt_u16 vcc_lo, null, v2.l
+// W32: v_cmp_lt_u16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x72,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc_lo, -1, v2
-// W32: v_cmp_lt_u16_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x72,0x7c]
+v_cmp_lt_u16 vcc_lo, -1, v2.l
+// W32: v_cmp_lt_u16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x72,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc_lo, 0.5, v2
-// W32: v_cmp_lt_u16_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x72,0x7c]
+v_cmp_lt_u16 vcc_lo, 0.5, v2.l
+// W32: v_cmp_lt_u16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x72,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc_lo, src_scc, v2
-// W32: v_cmp_lt_u16_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x72,0x7c]
+v_cmp_lt_u16 vcc_lo, src_scc, v2.l
+// W32: v_cmp_lt_u16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x72,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc_lo, 0xfe0b, v127
-// W32: v_cmp_lt_u16_e32 vcc_lo, 0xfe0b, v127   ; encoding: [0xff,0xfe,0x72,0x7c,0x0b,0xfe,0x00,0x00]
+v_cmp_lt_u16 vcc_lo, 0xfe0b, v127.l
+// W32: v_cmp_lt_u16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x72,0x7c,0x0b,0xfe,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc, v1, v2
-// W64: v_cmp_lt_u16_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x72,0x7c]
+v_cmp_lt_u16 vcc, v1.l, v2.l
+// W64: v_cmp_lt_u16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x72,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc, v127, v2
-// W64: v_cmp_lt_u16_e32 vcc, v127, v2          ; encoding: [0x7f,0x05,0x72,0x7c]
+v_cmp_lt_u16 vcc, v127.l, v2.l
+// W64: v_cmp_lt_u16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x72,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc, s1, v2
-// W64: v_cmp_lt_u16_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x72,0x7c]
+v_cmp_lt_u16 vcc, s1, v2.l
+// W64: v_cmp_lt_u16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x72,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc, s105, v2
-// W64: v_cmp_lt_u16_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x72,0x7c]
+v_cmp_lt_u16 vcc, s105, v2.l
+// W64: v_cmp_lt_u16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x72,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc, vcc_lo, v2
-// W64: v_cmp_lt_u16_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x72,0x7c]
+v_cmp_lt_u16 vcc, vcc_lo, v2.l
+// W64: v_cmp_lt_u16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x72,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc, vcc_hi, v2
-// W64: v_cmp_lt_u16_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x72,0x7c]
+v_cmp_lt_u16 vcc, vcc_hi, v2.l
+// W64: v_cmp_lt_u16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x72,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc, ttmp15, v2
-// W64: v_cmp_lt_u16_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x72,0x7c]
+v_cmp_lt_u16 vcc, ttmp15, v2.l
+// W64: v_cmp_lt_u16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x72,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc, m0, v2
-// W64: v_cmp_lt_u16_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x72,0x7c]
+v_cmp_lt_u16 vcc, m0, v2.l
+// W64: v_cmp_lt_u16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x72,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc, exec_lo, v2
-// W64: v_cmp_lt_u16_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x72,0x7c]
+v_cmp_lt_u16 vcc, exec_lo, v2.l
+// W64: v_cmp_lt_u16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x72,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc, exec_hi, v2
-// W64: v_cmp_lt_u16_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x72,0x7c]
+v_cmp_lt_u16 vcc, exec_hi, v2.l
+// W64: v_cmp_lt_u16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x72,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc, null, v2
-// W64: v_cmp_lt_u16_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x72,0x7c]
+v_cmp_lt_u16 vcc, null, v2.l
+// W64: v_cmp_lt_u16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x72,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc, -1, v2
-// W64: v_cmp_lt_u16_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x72,0x7c]
+v_cmp_lt_u16 vcc, -1, v2.l
+// W64: v_cmp_lt_u16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x72,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc, 0.5, v2
-// W64: v_cmp_lt_u16_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x72,0x7c]
+v_cmp_lt_u16 vcc, 0.5, v2.l
+// W64: v_cmp_lt_u16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x72,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc, src_scc, v2
-// W64: v_cmp_lt_u16_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x72,0x7c]
+v_cmp_lt_u16 vcc, src_scc, v2.l
+// W64: v_cmp_lt_u16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x72,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc, 0xfe0b, v127
-// W64: v_cmp_lt_u16_e32 vcc, 0xfe0b, v127      ; encoding: [0xff,0xfe,0x72,0x7c,0x0b,0xfe,0x00,0x00]
+v_cmp_lt_u16 vcc, 0xfe0b, v127.l
+// W64: v_cmp_lt_u16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x72,0x7c,0x0b,0xfe,0x00,0x00]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc_lo, 0x3800, v2.l
+// W32: v_cmp_lt_u16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x72,0x7c,0x00,0x38,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc, 0x3800, v2.l
+// W64: v_cmp_lt_u16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x72,0x7c,0x00,0x38,0x00,0x00]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc_lo, v1.h, v2.l
+// W32: v_cmp_lt_u16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x72,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc, v1.h, v2.l
+// W64: v_cmp_lt_u16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x72,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc_lo, v127.h, v2.l
+// W32: v_cmp_lt_u16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x72,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc, v127.h, v2.l
+// W64: v_cmp_lt_u16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x72,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc_lo, src_scc, v2.h
+// W32: v_cmp_lt_u16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x73,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc, src_scc, v2.h
+// W64: v_cmp_lt_u16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x73,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc_lo, 0xfe0b, v127.h
+// W32: v_cmp_lt_u16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x73,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc, 0xfe0b, v127.h
+// W64: v_cmp_lt_u16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x73,0x7c,0x0b,0xfe,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
 v_cmp_lt_u32 vcc_lo, v1, v2
@@ -5748,124 +6148,164 @@ v_cmp_lt_u64 vcc, 0xaf123456, v[254:255]
 // W64: v_cmp_lt_u64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xb3,0x7c,0x56,0x34,0x12,0xaf]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc_lo, v1, v2
-// W32: v_cmp_ne_i16_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x6a,0x7c]
+v_cmp_ne_i16 vcc_lo, v1.l, v2.l
+// W32: v_cmp_ne_i16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x6a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc_lo, v127, v2
-// W32: v_cmp_ne_i16_e32 vcc_lo, v127, v2       ; encoding: [0x7f,0x05,0x6a,0x7c]
+v_cmp_ne_i16 vcc_lo, v127.l, v2.l
+// W32: v_cmp_ne_i16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x6a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc_lo, s1, v2
-// W32: v_cmp_ne_i16_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x6a,0x7c]
+v_cmp_ne_i16 vcc_lo, s1, v2.l
+// W32: v_cmp_ne_i16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x6a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc_lo, s105, v2
-// W32: v_cmp_ne_i16_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x6a,0x7c]
+v_cmp_ne_i16 vcc_lo, s105, v2.l
+// W32: v_cmp_ne_i16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x6a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc_lo, vcc_lo, v2
-// W32: v_cmp_ne_i16_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x6a,0x7c]
+v_cmp_ne_i16 vcc_lo, vcc_lo, v2.l
+// W32: v_cmp_ne_i16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x6a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc_lo, vcc_hi, v2
-// W32: v_cmp_ne_i16_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x6a,0x7c]
+v_cmp_ne_i16 vcc_lo, vcc_hi, v2.l
+// W32: v_cmp_ne_i16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x6a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc_lo, ttmp15, v2
-// W32: v_cmp_ne_i16_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x6a,0x7c]
+v_cmp_ne_i16 vcc_lo, ttmp15, v2.l
+// W32: v_cmp_ne_i16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x6a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc_lo, m0, v2
-// W32: v_cmp_ne_i16_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x6a,0x7c]
+v_cmp_ne_i16 vcc_lo, m0, v2.l
+// W32: v_cmp_ne_i16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x6a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc_lo, exec_lo, v2
-// W32: v_cmp_ne_i16_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x6a,0x7c]
+v_cmp_ne_i16 vcc_lo, exec_lo, v2.l
+// W32: v_cmp_ne_i16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x6a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc_lo, exec_hi, v2
-// W32: v_cmp_ne_i16_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x6a,0x7c]
+v_cmp_ne_i16 vcc_lo, exec_hi, v2.l
+// W32: v_cmp_ne_i16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x6a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc_lo, null, v2
-// W32: v_cmp_ne_i16_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x6a,0x7c]
+v_cmp_ne_i16 vcc_lo, null, v2.l
+// W32: v_cmp_ne_i16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x6a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc_lo, -1, v2
-// W32: v_cmp_ne_i16_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x6a,0x7c]
+v_cmp_ne_i16 vcc_lo, -1, v2.l
+// W32: v_cmp_ne_i16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x6a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc_lo, 0.5, v2
-// W32: v_cmp_ne_i16_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x6a,0x7c]
+v_cmp_ne_i16 vcc_lo, 0.5, v2.l
+// W32: v_cmp_ne_i16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x6a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc_lo, src_scc, v2
-// W32: v_cmp_ne_i16_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x6a,0x7c]
+v_cmp_ne_i16 vcc_lo, src_scc, v2.l
+// W32: v_cmp_ne_i16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x6a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc_lo, 0xfe0b, v127
-// W32: v_cmp_ne_i16_e32 vcc_lo, 0xfe0b, v127   ; encoding: [0xff,0xfe,0x6a,0x7c,0x0b,0xfe,0x00,0x00]
+v_cmp_ne_i16 vcc_lo, 0xfe0b, v127.l
+// W32: v_cmp_ne_i16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x6a,0x7c,0x0b,0xfe,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc, v1, v2
-// W64: v_cmp_ne_i16_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x6a,0x7c]
+v_cmp_ne_i16 vcc, v1.l, v2.l
+// W64: v_cmp_ne_i16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x6a,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, v127.l, v2.l
+// W64: v_cmp_ne_i16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x6a,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, s1, v2.l
+// W64: v_cmp_ne_i16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x6a,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, s105, v2.l
+// W64: v_cmp_ne_i16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x6a,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, vcc_lo, v2.l
+// W64: v_cmp_ne_i16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x6a,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, vcc_hi, v2.l
+// W64: v_cmp_ne_i16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x6a,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc, v127, v2
-// W64: v_cmp_ne_i16_e32 vcc, v127, v2          ; encoding: [0x7f,0x05,0x6a,0x7c]
+v_cmp_ne_i16 vcc, ttmp15, v2.l
+// W64: v_cmp_ne_i16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x6a,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc, s1, v2
-// W64: v_cmp_ne_i16_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x6a,0x7c]
+v_cmp_ne_i16 vcc, m0, v2.l
+// W64: v_cmp_ne_i16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x6a,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc, s105, v2
-// W64: v_cmp_ne_i16_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x6a,0x7c]
+v_cmp_ne_i16 vcc, exec_lo, v2.l
+// W64: v_cmp_ne_i16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x6a,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc, vcc_lo, v2
-// W64: v_cmp_ne_i16_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x6a,0x7c]
+v_cmp_ne_i16 vcc, exec_hi, v2.l
+// W64: v_cmp_ne_i16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x6a,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc, vcc_hi, v2
-// W64: v_cmp_ne_i16_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x6a,0x7c]
+v_cmp_ne_i16 vcc, null, v2.l
+// W64: v_cmp_ne_i16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x6a,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc, ttmp15, v2
-// W64: v_cmp_ne_i16_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x6a,0x7c]
+v_cmp_ne_i16 vcc, -1, v2.l
+// W64: v_cmp_ne_i16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x6a,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc, m0, v2
-// W64: v_cmp_ne_i16_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x6a,0x7c]
+v_cmp_ne_i16 vcc, 0.5, v2.l
+// W64: v_cmp_ne_i16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x6a,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc, exec_lo, v2
-// W64: v_cmp_ne_i16_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x6a,0x7c]
+v_cmp_ne_i16 vcc, src_scc, v2.l
+// W64: v_cmp_ne_i16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x6a,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc, exec_hi, v2
-// W64: v_cmp_ne_i16_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x6a,0x7c]
+v_cmp_ne_i16 vcc, 0xfe0b, v127.l
+// W64: v_cmp_ne_i16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x6a,0x7c,0x0b,0xfe,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc, null, v2
-// W64: v_cmp_ne_i16_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x6a,0x7c]
+v_cmp_ne_i16 vcc_lo, 0x3800, v2.l
+// W32: v_cmp_ne_i16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x6a,0x7c,0x00,0x38,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, 0x3800, v2.l
+// W64: v_cmp_ne_i16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x6a,0x7c,0x00,0x38,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc, -1, v2
-// W64: v_cmp_ne_i16_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x6a,0x7c]
+v_cmp_ne_i16 vcc_lo, v1.h, v2.l
+// W32: v_cmp_ne_i16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x6a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, v1.h, v2.l
+// W64: v_cmp_ne_i16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x6a,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc, 0.5, v2
-// W64: v_cmp_ne_i16_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x6a,0x7c]
+v_cmp_ne_i16 vcc_lo, v127.h, v2.l
+// W32: v_cmp_ne_i16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x6a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, v127.h, v2.l
+// W64: v_cmp_ne_i16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x6a,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc, src_scc, v2
-// W64: v_cmp_ne_i16_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x6a,0x7c]
+v_cmp_ne_i16 vcc_lo, src_scc, v2.h
+// W32: v_cmp_ne_i16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x6b,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, src_scc, v2.h
+// W64: v_cmp_ne_i16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x6b,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc, 0xfe0b, v127
-// W64: v_cmp_ne_i16_e32 vcc, 0xfe0b, v127      ; encoding: [0xff,0xfe,0x6a,0x7c,0x0b,0xfe,0x00,0x00]
+v_cmp_ne_i16 vcc_lo, 0xfe0b, v127.h
+// W32: v_cmp_ne_i16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x6b,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, 0xfe0b, v127.h
+// W64: v_cmp_ne_i16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x6b,0x7c,0x0b,0xfe,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
 v_cmp_ne_i32 vcc_lo, v1, v2
@@ -6084,124 +6524,164 @@ v_cmp_ne_i64 vcc, 0xaf123456, v[254:255]
 // W64: v_cmp_ne_i64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xab,0x7c,0x56,0x34,0x12,0xaf]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc_lo, v1, v2
-// W32: v_cmp_ne_u16_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x7a,0x7c]
+v_cmp_ne_u16 vcc_lo, v1.l, v2.l
+// W32: v_cmp_ne_u16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x7a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc_lo, v127, v2
-// W32: v_cmp_ne_u16_e32 vcc_lo, v127, v2       ; encoding: [0x7f,0x05,0x7a,0x7c]
+v_cmp_ne_u16 vcc_lo, v127.l, v2.l
+// W32: v_cmp_ne_u16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x7a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc_lo, s1, v2
-// W32: v_cmp_ne_u16_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x7a,0x7c]
+v_cmp_ne_u16 vcc_lo, s1, v2.l
+// W32: v_cmp_ne_u16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x7a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc_lo, s105, v2
-// W32: v_cmp_ne_u16_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x7a,0x7c]
+v_cmp_ne_u16 vcc_lo, s105, v2.l
+// W32: v_cmp_ne_u16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x7a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc_lo, vcc_lo, v2
-// W32: v_cmp_ne_u16_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x7a,0x7c]
+v_cmp_ne_u16 vcc_lo, vcc_lo, v2.l
+// W32: v_cmp_ne_u16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x7a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc_lo, vcc_hi, v2
-// W32: v_cmp_ne_u16_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x7a,0x7c]
+v_cmp_ne_u16 vcc_lo, vcc_hi, v2.l
+// W32: v_cmp_ne_u16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x7a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc_lo, ttmp15, v2
-// W32: v_cmp_ne_u16_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x7a,0x7c]
+v_cmp_ne_u16 vcc_lo, ttmp15, v2.l
+// W32: v_cmp_ne_u16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x7a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc_lo, m0, v2
-// W32: v_cmp_ne_u16_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x7a,0x7c]
+v_cmp_ne_u16 vcc_lo, m0, v2.l
+// W32: v_cmp_ne_u16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x7a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc_lo, exec_lo, v2
-// W32: v_cmp_ne_u16_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x7a,0x7c]
+v_cmp_ne_u16 vcc_lo, exec_lo, v2.l
+// W32: v_cmp_ne_u16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x7a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc_lo, exec_hi, v2
-// W32: v_cmp_ne_u16_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x7a,0x7c]
+v_cmp_ne_u16 vcc_lo, exec_hi, v2.l
+// W32: v_cmp_ne_u16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x7a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc_lo, null, v2
-// W32: v_cmp_ne_u16_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x7a,0x7c]
+v_cmp_ne_u16 vcc_lo, null, v2.l
+// W32: v_cmp_ne_u16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x7a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc_lo, -1, v2
-// W32: v_cmp_ne_u16_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x7a,0x7c]
+v_cmp_ne_u16 vcc_lo, -1, v2.l
+// W32: v_cmp_ne_u16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x7a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc_lo, 0.5, v2
-// W32: v_cmp_ne_u16_e32 vcc_lo, 0.5, v2        ; encoding: [0xf0,0x04,0x7a,0x7c]
+v_cmp_ne_u16 vcc_lo, 0.5, v2.l
+// W32: v_cmp_ne_u16_e32 vcc_lo, 0.5, v2.l      ; encoding: [0xf0,0x04,0x7a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc_lo, src_scc, v2
-// W32: v_cmp_ne_u16_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x7a,0x7c]
+v_cmp_ne_u16 vcc_lo, src_scc, v2.l
+// W32: v_cmp_ne_u16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x7a,0x7c]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc_lo, 0xfe0b, v127
-// W32: v_cmp_ne_u16_e32 vcc_lo, 0xfe0b, v127   ; encoding: [0xff,0xfe,0x7a,0x7c,0x0b,0xfe,0x00,0x00]
+v_cmp_ne_u16 vcc_lo, 0xfe0b, v127.l
+// W32: v_cmp_ne_u16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x7a,0x7c,0x0b,0xfe,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc, v1, v2
-// W64: v_cmp_ne_u16_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x7a,0x7c]
+v_cmp_ne_u16 vcc, v1.l, v2.l
+// W64: v_cmp_ne_u16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x7a,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc, v127.l, v2.l
+// W64: v_cmp_ne_u16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x7a,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc, s1, v2.l
+// W64: v_cmp_ne_u16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x7a,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc, s105, v2.l
+// W64: v_cmp_ne_u16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x7a,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc, v127, v2
-// W64: v_cmp_ne_u16_e32 vcc, v127, v2          ; encoding: [0x7f,0x05,0x7a,0x7c]
+v_cmp_ne_u16 vcc, vcc_lo, v2.l
+// W64: v_cmp_ne_u16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x7a,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc, s1, v2
-// W64: v_cmp_ne_u16_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x7a,0x7c]
+v_cmp_ne_u16 vcc, vcc_hi, v2.l
+// W64: v_cmp_ne_u16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x7a,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc, s105, v2
-// W64: v_cmp_ne_u16_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x7a,0x7c]
+v_cmp_ne_u16 vcc, ttmp15, v2.l
+// W64: v_cmp_ne_u16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x7a,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc, vcc_lo, v2
-// W64: v_cmp_ne_u16_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x7a,0x7c]
+v_cmp_ne_u16 vcc, m0, v2.l
+// W64: v_cmp_ne_u16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x7a,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc, vcc_hi, v2
-// W64: v_cmp_ne_u16_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x7a,0x7c]
+v_cmp_ne_u16 vcc, exec_lo, v2.l
+// W64: v_cmp_ne_u16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x7a,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc, ttmp15, v2
-// W64: v_cmp_ne_u16_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x7a,0x7c]
+v_cmp_ne_u16 vcc, exec_hi, v2.l
+// W64: v_cmp_ne_u16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x7a,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc, m0, v2
-// W64: v_cmp_ne_u16_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x7a,0x7c]
+v_cmp_ne_u16 vcc, null, v2.l
+// W64: v_cmp_ne_u16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x7a,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc, exec_lo, v2
-// W64: v_cmp_ne_u16_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x7a,0x7c]
+v_cmp_ne_u16 vcc, -1, v2.l
+// W64: v_cmp_ne_u16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x7a,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc, exec_hi, v2
-// W64: v_cmp_ne_u16_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x7a,0x7c]
+v_cmp_ne_u16 vcc, 0.5, v2.l
+// W64: v_cmp_ne_u16_e32 vcc, 0.5, v2.l         ; encoding: [0xf0,0x04,0x7a,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc, null, v2
-// W64: v_cmp_ne_u16_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x7a,0x7c]
+v_cmp_ne_u16 vcc, src_scc, v2.l
+// W64: v_cmp_ne_u16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x7a,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc, -1, v2
-// W64: v_cmp_ne_u16_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x7a,0x7c]
+v_cmp_ne_u16 vcc, 0xfe0b, v127.l
+// W64: v_cmp_ne_u16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x7a,0x7c,0x0b,0xfe,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc, 0.5, v2
-// W64: v_cmp_ne_u16_e32 vcc, 0.5, v2           ; encoding: [0xf0,0x04,0x7a,0x7c]
+v_cmp_ne_u16 vcc_lo, 0x3800, v2.l
+// W32: v_cmp_ne_u16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x7a,0x7c,0x00,0x38,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc, 0x3800, v2.l
+// W64: v_cmp_ne_u16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x7a,0x7c,0x00,0x38,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc, src_scc, v2
-// W64: v_cmp_ne_u16_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x7a,0x7c]
+v_cmp_ne_u16 vcc_lo, v1.h, v2.l
+// W32: v_cmp_ne_u16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x7a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc, v1.h, v2.l
+// W64: v_cmp_ne_u16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x7a,0x7c]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc, 0xfe0b, v127
-// W64: v_cmp_ne_u16_e32 vcc, 0xfe0b, v127      ; encoding: [0xff,0xfe,0x7a,0x7c,0x0b,0xfe,0x00,0x00]
+v_cmp_ne_u16 vcc_lo, v127.h, v2.l
+// W32: v_cmp_ne_u16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x7a,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc, v127.h, v2.l
+// W64: v_cmp_ne_u16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x7a,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc_lo, src_scc, v2.h
+// W32: v_cmp_ne_u16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x7b,0x7c]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc, src_scc, v2.h
+// W64: v_cmp_ne_u16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x7b,0x7c]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc_lo, 0xfe0b, v127.h
+// W32: v_cmp_ne_u16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x7b,0x7c,0x0b,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc, 0xfe0b, v127.h
+// W64: v_cmp_ne_u16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x7b,0x7c,0x0b,0xfe,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
 v_cmp_ne_u32 vcc_lo, v1, v2
diff --git a/llvm/test/MC/AMDGPU/gfx12_asm_vopc_dpp16.s b/llvm/test/MC/AMDGPU/gfx12_asm_vopc_dpp16.s
index 54c3df6b139af9..15ed1a23e2ec78 100644
--- a/llvm/test/MC/AMDGPU/gfx12_asm_vopc_dpp16.s
+++ b/llvm/test/MC/AMDGPU/gfx12_asm_vopc_dpp16.s
@@ -452,116 +452,212 @@ v_cmp_eq_f32 vcc, -|v255|, -|v255| row_xmask:15 row_mask:0x3 bank_mask:0x0 bound
 // W64: v_cmp_eq_f32 vcc, -|v255|, -|v255| row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x25,0x7c,0xff,0x6f,0xf5,0x30]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc_lo, v1, v2 quad_perm:[3,2,1,0]
-// W32: v_cmp_eq_i16 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x1b,0x00,0xff]
+v_cmp_eq_i16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0]
+// W32: v_cmp_eq_i16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x1b,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc_lo, v1, v2 quad_perm:[0,1,2,3]
-// W32: v_cmp_eq_i16 vcc_lo, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0xe4,0x00,0xff]
+v_cmp_eq_i16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3]
+// W32: v_cmp_eq_i16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0xe4,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc_lo, v1, v2 row_mirror
-// W32: v_cmp_eq_i16 vcc_lo, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x40,0x01,0xff]
+v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_mirror
+// W32: v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x40,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc_lo, v1, v2 row_half_mirror
-// W32: v_cmp_eq_i16 vcc_lo, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x41,0x01,0xff]
+v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_half_mirror
+// W32: v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x41,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc_lo, v1, v2 row_shl:1
-// W32: v_cmp_eq_i16 vcc_lo, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x01,0x01,0xff]
+v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_shl:1
+// W32: v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x01,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc_lo, v1, v2 row_shl:15
-// W32: v_cmp_eq_i16 vcc_lo, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x0f,0x01,0xff]
+v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_shl:15
+// W32: v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x0f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc_lo, v1, v2 row_shr:1
-// W32: v_cmp_eq_i16 vcc_lo, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x11,0x01,0xff]
+v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_shr:1
+// W32: v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x11,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc_lo, v1, v2 row_shr:15
-// W32: v_cmp_eq_i16 vcc_lo, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x1f,0x01,0xff]
+v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_shr:15
+// W32: v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x1f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc_lo, v1, v2 row_ror:1
-// W32: v_cmp_eq_i16 vcc_lo, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x21,0x01,0xff]
+v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_ror:1
+// W32: v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x21,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc_lo, v1, v2 row_ror:15
-// W32: v_cmp_eq_i16 vcc_lo, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x2f,0x01,0xff]
+v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_ror:15
+// W32: v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x2f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W32: v_cmp_eq_i16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x50,0x01,0xff]
+v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x50,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W32: v_cmp_eq_i16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x5f,0x01,0x01]
+v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x5f,0x01,0x01]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W32: v_cmp_eq_i16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x60,0x09,0x13]
+v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1
+// W32: v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x60,0x09,0x13]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
-// W32: v_cmp_eq_i16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x64,0x7c,0x7f,0x6f,0x05,0x30]
+v_cmp_eq_i16 vcc_lo, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1
+// W32: v_cmp_eq_i16 vcc_lo, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x64,0x7c,0x7f,0x6f,0x05,0x30]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc, v1, v2 quad_perm:[3,2,1,0]
-// W64: v_cmp_eq_i16 vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x1b,0x00,0xff]
+v_cmp_eq_i16 vcc, v1.l, v2.l quad_perm:[3,2,1,0]
+// W64: v_cmp_eq_i16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x1b,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc, v1, v2 quad_perm:[0,1,2,3]
-// W64: v_cmp_eq_i16 vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0xe4,0x00,0xff]
+v_cmp_eq_i16 vcc, v1.l, v2.l quad_perm:[0,1,2,3]
+// W64: v_cmp_eq_i16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0xe4,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc, v1, v2 row_mirror
-// W64: v_cmp_eq_i16 vcc, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x40,0x01,0xff]
+v_cmp_eq_i16 vcc, v1.l, v2.l row_mirror
+// W64: v_cmp_eq_i16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x40,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc, v1, v2 row_half_mirror
-// W64: v_cmp_eq_i16 vcc, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x41,0x01,0xff]
+v_cmp_eq_i16 vcc, v1.l, v2.l row_half_mirror
+// W64: v_cmp_eq_i16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x41,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc, v1, v2 row_shl:1
-// W64: v_cmp_eq_i16 vcc, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x01,0x01,0xff]
+v_cmp_eq_i16 vcc, v1.l, v2.l row_shl:1
+// W64: v_cmp_eq_i16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x01,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc, v1, v2 row_shl:15
-// W64: v_cmp_eq_i16 vcc, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x0f,0x01,0xff]
+v_cmp_eq_i16 vcc, v1.l, v2.l row_shl:15
+// W64: v_cmp_eq_i16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x0f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc, v1, v2 row_shr:1
-// W64: v_cmp_eq_i16 vcc, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x11,0x01,0xff]
+v_cmp_eq_i16 vcc, v1.l, v2.l row_shr:1
+// W64: v_cmp_eq_i16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x11,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc, v1, v2 row_shr:15
-// W64: v_cmp_eq_i16 vcc, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x1f,0x01,0xff]
+v_cmp_eq_i16 vcc, v1.l, v2.l row_shr:15
+// W64: v_cmp_eq_i16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x1f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc, v1, v2 row_ror:1
-// W64: v_cmp_eq_i16 vcc, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x21,0x01,0xff]
+v_cmp_eq_i16 vcc, v1.l, v2.l row_ror:1
+// W64: v_cmp_eq_i16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x21,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc, v1, v2 row_ror:15
-// W64: v_cmp_eq_i16 vcc, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x2f,0x01,0xff]
+v_cmp_eq_i16 vcc, v1.l, v2.l row_ror:15
+// W64: v_cmp_eq_i16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x2f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W64: v_cmp_eq_i16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x50,0x01,0xff]
+v_cmp_eq_i16 vcc, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_eq_i16 vcc, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x50,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W64: v_cmp_eq_i16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x5f,0x01,0x01]
+v_cmp_eq_i16 vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W64: v_cmp_eq_i16 vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x5f,0x01,0x01]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W64: v_cmp_eq_i16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x60,0x09,0x13]
+v_cmp_eq_i16 vcc, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1
+// W64: v_cmp_eq_i16 vcc, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x60,0x09,0x13]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
-// W64: v_cmp_eq_i16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x64,0x7c,0x7f,0x6f,0x05,0x30]
+v_cmp_eq_i16 vcc, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1
+// W64: v_cmp_eq_i16 vcc, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x64,0x7c,0x7f,0x6f,0x05,0x30]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf
+// W32: v_cmp_eq_i16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf
+// W64: v_cmp_eq_i16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf
+// W32: v_cmp_eq_i16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0xe4,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf
+// W64: v_cmp_eq_i16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0xe4,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf
+// W32: v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x40,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf
+// W64: v_cmp_eq_i16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x40,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf
+// W32: v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x41,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf
+// W64: v_cmp_eq_i16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x41,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x01,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_eq_i16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x01,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x0f,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_eq_i16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x0f,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x11,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_eq_i16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x11,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x1f,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_eq_i16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x1f,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x21,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_eq_i16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x21,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x2f,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_eq_i16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x2f,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc_lo, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W32: v_cmp_eq_i16 vcc_lo, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x65,0x7c,0x81,0x60,0x09,0x13]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W64: v_cmp_eq_i16 vcc, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x65,0x7c,0x81,0x60,0x09,0x13]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc_lo, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// W32: v_cmp_eq_i16 vcc_lo, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x65,0x7c,0xff,0x6f,0x05,0x30]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// W64: v_cmp_eq_i16 vcc, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x65,0x7c,0xff,0x6f,0x05,0x30]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
 v_cmp_eq_i32 vcc_lo, v1, v2 quad_perm:[3,2,1,0]
@@ -676,116 +772,212 @@ v_cmp_eq_i32 vcc, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:
 // W64: v_cmp_eq_i32 vcc, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x85,0x7c,0xff,0x6f,0x05,0x30]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc_lo, v1, v2 quad_perm:[3,2,1,0]
-// W32: v_cmp_eq_u16 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x1b,0x00,0xff]
+v_cmp_eq_u16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0]
+// W32: v_cmp_eq_u16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x1b,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc_lo, v1, v2 quad_perm:[0,1,2,3]
-// W32: v_cmp_eq_u16 vcc_lo, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0xe4,0x00,0xff]
+v_cmp_eq_u16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3]
+// W32: v_cmp_eq_u16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0xe4,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc_lo, v1, v2 row_mirror
-// W32: v_cmp_eq_u16 vcc_lo, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x40,0x01,0xff]
+v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_mirror
+// W32: v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x40,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc_lo, v1, v2 row_half_mirror
-// W32: v_cmp_eq_u16 vcc_lo, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x41,0x01,0xff]
+v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_half_mirror
+// W32: v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x41,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc_lo, v1, v2 row_shl:1
-// W32: v_cmp_eq_u16 vcc_lo, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x01,0x01,0xff]
+v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_shl:1
+// W32: v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x01,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc_lo, v1, v2 row_shl:15
-// W32: v_cmp_eq_u16 vcc_lo, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x0f,0x01,0xff]
+v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_shl:15
+// W32: v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x0f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc_lo, v1, v2 row_shr:1
-// W32: v_cmp_eq_u16 vcc_lo, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x11,0x01,0xff]
+v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_shr:1
+// W32: v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x11,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc_lo, v1, v2 row_shr:15
-// W32: v_cmp_eq_u16 vcc_lo, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x1f,0x01,0xff]
+v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_shr:15
+// W32: v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x1f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc_lo, v1, v2 row_ror:1
-// W32: v_cmp_eq_u16 vcc_lo, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x21,0x01,0xff]
+v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_ror:1
+// W32: v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x21,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc_lo, v1, v2 row_ror:15
-// W32: v_cmp_eq_u16 vcc_lo, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x2f,0x01,0xff]
+v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_ror:15
+// W32: v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x2f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W32: v_cmp_eq_u16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x50,0x01,0xff]
+v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x50,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W32: v_cmp_eq_u16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x5f,0x01,0x01]
+v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x5f,0x01,0x01]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W32: v_cmp_eq_u16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x60,0x09,0x13]
+v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1
+// W32: v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x60,0x09,0x13]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
-// W32: v_cmp_eq_u16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x74,0x7c,0x7f,0x6f,0x05,0x30]
+v_cmp_eq_u16 vcc_lo, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1
+// W32: v_cmp_eq_u16 vcc_lo, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x74,0x7c,0x7f,0x6f,0x05,0x30]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc, v1, v2 quad_perm:[3,2,1,0]
-// W64: v_cmp_eq_u16 vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x1b,0x00,0xff]
+v_cmp_eq_u16 vcc, v1.l, v2.l quad_perm:[3,2,1,0]
+// W64: v_cmp_eq_u16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc, v1.l, v2.l quad_perm:[0,1,2,3]
+// W64: v_cmp_eq_u16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0xe4,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc, v1.l, v2.l row_mirror
+// W64: v_cmp_eq_u16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x40,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc, v1.l, v2.l row_half_mirror
+// W64: v_cmp_eq_u16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x41,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc, v1.l, v2.l row_shl:1
+// W64: v_cmp_eq_u16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x01,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc, v1.l, v2.l row_shl:15
+// W64: v_cmp_eq_u16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x0f,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc, v1.l, v2.l row_shr:1
+// W64: v_cmp_eq_u16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x11,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc, v1.l, v2.l row_shr:15
+// W64: v_cmp_eq_u16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x1f,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc, v1.l, v2.l row_ror:1
+// W64: v_cmp_eq_u16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x21,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc, v1, v2 quad_perm:[0,1,2,3]
-// W64: v_cmp_eq_u16 vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0xe4,0x00,0xff]
+v_cmp_eq_u16 vcc, v1.l, v2.l row_ror:15
+// W64: v_cmp_eq_u16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x2f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc, v1, v2 row_mirror
-// W64: v_cmp_eq_u16 vcc, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x40,0x01,0xff]
+v_cmp_eq_u16 vcc, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_eq_u16 vcc, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x50,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc, v1, v2 row_half_mirror
-// W64: v_cmp_eq_u16 vcc, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x41,0x01,0xff]
+v_cmp_eq_u16 vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W64: v_cmp_eq_u16 vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x5f,0x01,0x01]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc, v1, v2 row_shl:1
-// W64: v_cmp_eq_u16 vcc, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x01,0x01,0xff]
+v_cmp_eq_u16 vcc, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1
+// W64: v_cmp_eq_u16 vcc, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x60,0x09,0x13]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc, v1, v2 row_shl:15
-// W64: v_cmp_eq_u16 vcc, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x0f,0x01,0xff]
+v_cmp_eq_u16 vcc, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1
+// W64: v_cmp_eq_u16 vcc, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x74,0x7c,0x7f,0x6f,0x05,0x30]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc, v1, v2 row_shr:1
-// W64: v_cmp_eq_u16 vcc, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x11,0x01,0xff]
+v_cmp_eq_u16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf
+// W32: v_cmp_eq_u16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf
+// W64: v_cmp_eq_u16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x1b,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc, v1, v2 row_shr:15
-// W64: v_cmp_eq_u16 vcc, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x1f,0x01,0xff]
+v_cmp_eq_u16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf
+// W32: v_cmp_eq_u16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0xe4,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf
+// W64: v_cmp_eq_u16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0xe4,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc, v1, v2 row_ror:1
-// W64: v_cmp_eq_u16 vcc, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x21,0x01,0xff]
+v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf
+// W32: v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x40,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf
+// W64: v_cmp_eq_u16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x40,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc, v1, v2 row_ror:15
-// W64: v_cmp_eq_u16 vcc, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x2f,0x01,0xff]
+v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf
+// W32: v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x41,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf
+// W64: v_cmp_eq_u16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x41,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W64: v_cmp_eq_u16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x50,0x01,0xff]
+v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x01,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_eq_u16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x01,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W64: v_cmp_eq_u16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x5f,0x01,0x01]
+v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x0f,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_eq_u16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x0f,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x11,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_eq_u16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x11,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W64: v_cmp_eq_u16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x60,0x09,0x13]
+v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x1f,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_eq_u16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x1f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
-// W64: v_cmp_eq_u16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x74,0x7c,0x7f,0x6f,0x05,0x30]
+v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x21,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_eq_u16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x21,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x2f,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_eq_u16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x2f,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc_lo, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W32: v_cmp_eq_u16 vcc_lo, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x75,0x7c,0x81,0x60,0x09,0x13]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W64: v_cmp_eq_u16 vcc, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x75,0x7c,0x81,0x60,0x09,0x13]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc_lo, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// W32: v_cmp_eq_u16 vcc_lo, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x75,0x7c,0xff,0x6f,0x05,0x30]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// W64: v_cmp_eq_u16 vcc, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x75,0x7c,0xff,0x6f,0x05,0x30]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
 v_cmp_eq_u32 vcc_lo, v1, v2 quad_perm:[3,2,1,0]
@@ -1124,116 +1316,212 @@ v_cmp_ge_f32 vcc, -|v255|, -|v255| row_xmask:15 row_mask:0x3 bank_mask:0x0 bound
 // W64: v_cmp_ge_f32 vcc, -|v255|, -|v255| row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x2d,0x7c,0xff,0x6f,0xf5,0x30]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc_lo, v1, v2 quad_perm:[3,2,1,0]
-// W32: v_cmp_ge_i16 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x1b,0x00,0xff]
+v_cmp_ge_i16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0]
+// W32: v_cmp_ge_i16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x1b,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc_lo, v1, v2 quad_perm:[0,1,2,3]
-// W32: v_cmp_ge_i16 vcc_lo, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0xe4,0x00,0xff]
+v_cmp_ge_i16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3]
+// W32: v_cmp_ge_i16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0xe4,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc_lo, v1, v2 row_mirror
-// W32: v_cmp_ge_i16 vcc_lo, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x40,0x01,0xff]
+v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_mirror
+// W32: v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x40,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc_lo, v1, v2 row_half_mirror
-// W32: v_cmp_ge_i16 vcc_lo, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x41,0x01,0xff]
+v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_half_mirror
+// W32: v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x41,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc_lo, v1, v2 row_shl:1
-// W32: v_cmp_ge_i16 vcc_lo, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x01,0x01,0xff]
+v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_shl:1
+// W32: v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x01,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc_lo, v1, v2 row_shl:15
-// W32: v_cmp_ge_i16 vcc_lo, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x0f,0x01,0xff]
+v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_shl:15
+// W32: v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x0f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc_lo, v1, v2 row_shr:1
-// W32: v_cmp_ge_i16 vcc_lo, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x11,0x01,0xff]
+v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_shr:1
+// W32: v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x11,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc_lo, v1, v2 row_shr:15
-// W32: v_cmp_ge_i16 vcc_lo, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x1f,0x01,0xff]
+v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_shr:15
+// W32: v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x1f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc_lo, v1, v2 row_ror:1
-// W32: v_cmp_ge_i16 vcc_lo, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x21,0x01,0xff]
+v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_ror:1
+// W32: v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x21,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc_lo, v1, v2 row_ror:15
-// W32: v_cmp_ge_i16 vcc_lo, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x2f,0x01,0xff]
+v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_ror:15
+// W32: v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x2f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W32: v_cmp_ge_i16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x50,0x01,0xff]
+v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x50,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W32: v_cmp_ge_i16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x5f,0x01,0x01]
+v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x5f,0x01,0x01]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W32: v_cmp_ge_i16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x60,0x09,0x13]
+v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1
+// W32: v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x60,0x09,0x13]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
-// W32: v_cmp_ge_i16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x6c,0x7c,0x7f,0x6f,0x05,0x30]
+v_cmp_ge_i16 vcc_lo, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1
+// W32: v_cmp_ge_i16 vcc_lo, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x6c,0x7c,0x7f,0x6f,0x05,0x30]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc, v1, v2 quad_perm:[3,2,1,0]
-// W64: v_cmp_ge_i16 vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x1b,0x00,0xff]
+v_cmp_ge_i16 vcc, v1.l, v2.l quad_perm:[3,2,1,0]
+// W64: v_cmp_ge_i16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc, v1.l, v2.l quad_perm:[0,1,2,3]
+// W64: v_cmp_ge_i16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0xe4,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc, v1.l, v2.l row_mirror
+// W64: v_cmp_ge_i16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x40,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc, v1.l, v2.l row_half_mirror
+// W64: v_cmp_ge_i16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x41,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc, v1.l, v2.l row_shl:1
+// W64: v_cmp_ge_i16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x01,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc, v1.l, v2.l row_shl:15
+// W64: v_cmp_ge_i16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x0f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc, v1, v2 quad_perm:[0,1,2,3]
-// W64: v_cmp_ge_i16 vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0xe4,0x00,0xff]
+v_cmp_ge_i16 vcc, v1.l, v2.l row_shr:1
+// W64: v_cmp_ge_i16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x11,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc, v1, v2 row_mirror
-// W64: v_cmp_ge_i16 vcc, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x40,0x01,0xff]
+v_cmp_ge_i16 vcc, v1.l, v2.l row_shr:15
+// W64: v_cmp_ge_i16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x1f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc, v1, v2 row_half_mirror
-// W64: v_cmp_ge_i16 vcc, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x41,0x01,0xff]
+v_cmp_ge_i16 vcc, v1.l, v2.l row_ror:1
+// W64: v_cmp_ge_i16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x21,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc, v1, v2 row_shl:1
-// W64: v_cmp_ge_i16 vcc, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x01,0x01,0xff]
+v_cmp_ge_i16 vcc, v1.l, v2.l row_ror:15
+// W64: v_cmp_ge_i16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x2f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc, v1, v2 row_shl:15
-// W64: v_cmp_ge_i16 vcc, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x0f,0x01,0xff]
+v_cmp_ge_i16 vcc, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ge_i16 vcc, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x50,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc, v1, v2 row_shr:1
-// W64: v_cmp_ge_i16 vcc, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x11,0x01,0xff]
+v_cmp_ge_i16 vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W64: v_cmp_ge_i16 vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x5f,0x01,0x01]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc, v1, v2 row_shr:15
-// W64: v_cmp_ge_i16 vcc, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x1f,0x01,0xff]
+v_cmp_ge_i16 vcc, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1
+// W64: v_cmp_ge_i16 vcc, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x60,0x09,0x13]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc, v1, v2 row_ror:1
-// W64: v_cmp_ge_i16 vcc, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x21,0x01,0xff]
+v_cmp_ge_i16 vcc, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1
+// W64: v_cmp_ge_i16 vcc, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x6c,0x7c,0x7f,0x6f,0x05,0x30]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc, v1, v2 row_ror:15
-// W64: v_cmp_ge_i16 vcc, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x2f,0x01,0xff]
+v_cmp_ge_i16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ge_i16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ge_i16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x1b,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W64: v_cmp_ge_i16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x50,0x01,0xff]
+v_cmp_ge_i16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ge_i16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0xe4,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ge_i16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0xe4,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W64: v_cmp_ge_i16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x5f,0x01,0x01]
+v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x40,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ge_i16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x40,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W64: v_cmp_ge_i16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x60,0x09,0x13]
+v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x41,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ge_i16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x41,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
-// W64: v_cmp_ge_i16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x6c,0x7c,0x7f,0x6f,0x05,0x30]
+v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x01,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ge_i16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x01,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x0f,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ge_i16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x0f,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x11,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ge_i16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x11,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x1f,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ge_i16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x1f,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x21,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ge_i16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x21,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x2f,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ge_i16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x2f,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc_lo, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W32: v_cmp_ge_i16 vcc_lo, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x6d,0x7c,0x81,0x60,0x09,0x13]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W64: v_cmp_ge_i16 vcc, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x6d,0x7c,0x81,0x60,0x09,0x13]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc_lo, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// W32: v_cmp_ge_i16 vcc_lo, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x6d,0x7c,0xff,0x6f,0x05,0x30]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// W64: v_cmp_ge_i16 vcc, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x6d,0x7c,0xff,0x6f,0x05,0x30]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
 v_cmp_ge_i32 vcc_lo, v1, v2 quad_perm:[3,2,1,0]
@@ -1348,116 +1636,212 @@ v_cmp_ge_i32 vcc, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:
 // W64: v_cmp_ge_i32 vcc, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x8d,0x7c,0xff,0x6f,0x05,0x30]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc_lo, v1, v2 quad_perm:[3,2,1,0]
-// W32: v_cmp_ge_u16 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x1b,0x00,0xff]
+v_cmp_ge_u16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0]
+// W32: v_cmp_ge_u16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x1b,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc_lo, v1, v2 quad_perm:[0,1,2,3]
-// W32: v_cmp_ge_u16 vcc_lo, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0xe4,0x00,0xff]
+v_cmp_ge_u16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3]
+// W32: v_cmp_ge_u16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0xe4,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc_lo, v1, v2 row_mirror
-// W32: v_cmp_ge_u16 vcc_lo, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x40,0x01,0xff]
+v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_mirror
+// W32: v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x40,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc_lo, v1, v2 row_half_mirror
-// W32: v_cmp_ge_u16 vcc_lo, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x41,0x01,0xff]
+v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_half_mirror
+// W32: v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x41,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc_lo, v1, v2 row_shl:1
-// W32: v_cmp_ge_u16 vcc_lo, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x01,0x01,0xff]
+v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_shl:1
+// W32: v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x01,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc_lo, v1, v2 row_shl:15
-// W32: v_cmp_ge_u16 vcc_lo, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x0f,0x01,0xff]
+v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_shl:15
+// W32: v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x0f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc_lo, v1, v2 row_shr:1
-// W32: v_cmp_ge_u16 vcc_lo, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x11,0x01,0xff]
+v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_shr:1
+// W32: v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x11,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc_lo, v1, v2 row_shr:15
-// W32: v_cmp_ge_u16 vcc_lo, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x1f,0x01,0xff]
+v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_shr:15
+// W32: v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x1f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc_lo, v1, v2 row_ror:1
-// W32: v_cmp_ge_u16 vcc_lo, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x21,0x01,0xff]
+v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_ror:1
+// W32: v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x21,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc_lo, v1, v2 row_ror:15
-// W32: v_cmp_ge_u16 vcc_lo, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x2f,0x01,0xff]
+v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_ror:15
+// W32: v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x2f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W32: v_cmp_ge_u16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x50,0x01,0xff]
+v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x50,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W32: v_cmp_ge_u16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x5f,0x01,0x01]
+v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x5f,0x01,0x01]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W32: v_cmp_ge_u16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x60,0x09,0x13]
+v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1
+// W32: v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x60,0x09,0x13]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
-// W32: v_cmp_ge_u16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x7c,0x7c,0x7f,0x6f,0x05,0x30]
+v_cmp_ge_u16 vcc_lo, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1
+// W32: v_cmp_ge_u16 vcc_lo, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x7c,0x7c,0x7f,0x6f,0x05,0x30]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc, v1, v2 quad_perm:[3,2,1,0]
-// W64: v_cmp_ge_u16 vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x1b,0x00,0xff]
+v_cmp_ge_u16 vcc, v1.l, v2.l quad_perm:[3,2,1,0]
+// W64: v_cmp_ge_u16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc, v1.l, v2.l quad_perm:[0,1,2,3]
+// W64: v_cmp_ge_u16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0xe4,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc, v1.l, v2.l row_mirror
+// W64: v_cmp_ge_u16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x40,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc, v1.l, v2.l row_half_mirror
+// W64: v_cmp_ge_u16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x41,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc, v1.l, v2.l row_shl:1
+// W64: v_cmp_ge_u16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x01,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc, v1.l, v2.l row_shl:15
+// W64: v_cmp_ge_u16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x0f,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc, v1.l, v2.l row_shr:1
+// W64: v_cmp_ge_u16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x11,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc, v1.l, v2.l row_shr:15
+// W64: v_cmp_ge_u16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x1f,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc, v1.l, v2.l row_ror:1
+// W64: v_cmp_ge_u16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x21,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc, v1.l, v2.l row_ror:15
+// W64: v_cmp_ge_u16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x2f,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ge_u16 vcc, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x50,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W64: v_cmp_ge_u16 vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x5f,0x01,0x01]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1
+// W64: v_cmp_ge_u16 vcc, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x60,0x09,0x13]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc, v1, v2 quad_perm:[0,1,2,3]
-// W64: v_cmp_ge_u16 vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0xe4,0x00,0xff]
+v_cmp_ge_u16 vcc, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1
+// W64: v_cmp_ge_u16 vcc, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x7c,0x7c,0x7f,0x6f,0x05,0x30]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc, v1, v2 row_mirror
-// W64: v_cmp_ge_u16 vcc, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x40,0x01,0xff]
+v_cmp_ge_u16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ge_u16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ge_u16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x1b,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc, v1, v2 row_half_mirror
-// W64: v_cmp_ge_u16 vcc, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x41,0x01,0xff]
+v_cmp_ge_u16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ge_u16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0xe4,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ge_u16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0xe4,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc, v1, v2 row_shl:1
-// W64: v_cmp_ge_u16 vcc, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x01,0x01,0xff]
+v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x40,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ge_u16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x40,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc, v1, v2 row_shl:15
-// W64: v_cmp_ge_u16 vcc, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x0f,0x01,0xff]
+v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x41,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ge_u16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x41,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc, v1, v2 row_shr:1
-// W64: v_cmp_ge_u16 vcc, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x11,0x01,0xff]
+v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x01,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ge_u16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x01,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc, v1, v2 row_shr:15
-// W64: v_cmp_ge_u16 vcc, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x1f,0x01,0xff]
+v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x0f,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ge_u16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x0f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc, v1, v2 row_ror:1
-// W64: v_cmp_ge_u16 vcc, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x21,0x01,0xff]
+v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x11,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ge_u16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x11,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc, v1, v2 row_ror:15
-// W64: v_cmp_ge_u16 vcc, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x2f,0x01,0xff]
+v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x1f,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ge_u16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x1f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W64: v_cmp_ge_u16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x50,0x01,0xff]
+v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x21,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ge_u16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x21,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W64: v_cmp_ge_u16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x5f,0x01,0x01]
+v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x2f,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ge_u16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x2f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W64: v_cmp_ge_u16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x60,0x09,0x13]
+v_cmp_ge_u16 vcc_lo, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W32: v_cmp_ge_u16 vcc_lo, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x7d,0x7c,0x81,0x60,0x09,0x13]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W64: v_cmp_ge_u16 vcc, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x7d,0x7c,0x81,0x60,0x09,0x13]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
-// W64: v_cmp_ge_u16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x7c,0x7c,0x7f,0x6f,0x05,0x30]
+v_cmp_ge_u16 vcc_lo, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// W32: v_cmp_ge_u16 vcc_lo, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x7d,0x7c,0xff,0x6f,0x05,0x30]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// W64: v_cmp_ge_u16 vcc, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x7d,0x7c,0xff,0x6f,0x05,0x30]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
 v_cmp_ge_u32 vcc_lo, v1, v2 quad_perm:[3,2,1,0]
@@ -1796,116 +2180,212 @@ v_cmp_gt_f32 vcc, -|v255|, -|v255| row_xmask:15 row_mask:0x3 bank_mask:0x0 bound
 // W64: v_cmp_gt_f32 vcc, -|v255|, -|v255| row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x29,0x7c,0xff,0x6f,0xf5,0x30]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc_lo, v1, v2 quad_perm:[3,2,1,0]
-// W32: v_cmp_gt_i16 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x1b,0x00,0xff]
+v_cmp_gt_i16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0]
+// W32: v_cmp_gt_i16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x1b,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc_lo, v1, v2 quad_perm:[0,1,2,3]
-// W32: v_cmp_gt_i16 vcc_lo, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0xe4,0x00,0xff]
+v_cmp_gt_i16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3]
+// W32: v_cmp_gt_i16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0xe4,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc_lo, v1, v2 row_mirror
-// W32: v_cmp_gt_i16 vcc_lo, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x40,0x01,0xff]
+v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_mirror
+// W32: v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x40,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc_lo, v1, v2 row_half_mirror
-// W32: v_cmp_gt_i16 vcc_lo, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x41,0x01,0xff]
+v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_half_mirror
+// W32: v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x41,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc_lo, v1, v2 row_shl:1
-// W32: v_cmp_gt_i16 vcc_lo, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x01,0x01,0xff]
+v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_shl:1
+// W32: v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x01,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc_lo, v1, v2 row_shl:15
-// W32: v_cmp_gt_i16 vcc_lo, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x0f,0x01,0xff]
+v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_shl:15
+// W32: v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x0f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc_lo, v1, v2 row_shr:1
-// W32: v_cmp_gt_i16 vcc_lo, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x11,0x01,0xff]
+v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_shr:1
+// W32: v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x11,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc_lo, v1, v2 row_shr:15
-// W32: v_cmp_gt_i16 vcc_lo, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x1f,0x01,0xff]
+v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_shr:15
+// W32: v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x1f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc_lo, v1, v2 row_ror:1
-// W32: v_cmp_gt_i16 vcc_lo, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x21,0x01,0xff]
+v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_ror:1
+// W32: v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x21,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc_lo, v1, v2 row_ror:15
-// W32: v_cmp_gt_i16 vcc_lo, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x2f,0x01,0xff]
+v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_ror:15
+// W32: v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x2f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W32: v_cmp_gt_i16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x50,0x01,0xff]
+v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x50,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W32: v_cmp_gt_i16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x5f,0x01,0x01]
+v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x5f,0x01,0x01]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W32: v_cmp_gt_i16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x60,0x09,0x13]
+v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1
+// W32: v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x60,0x09,0x13]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
-// W32: v_cmp_gt_i16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x68,0x7c,0x7f,0x6f,0x05,0x30]
+v_cmp_gt_i16 vcc_lo, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1
+// W32: v_cmp_gt_i16 vcc_lo, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x68,0x7c,0x7f,0x6f,0x05,0x30]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc, v1, v2 quad_perm:[3,2,1,0]
-// W64: v_cmp_gt_i16 vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x1b,0x00,0xff]
+v_cmp_gt_i16 vcc, v1.l, v2.l quad_perm:[3,2,1,0]
+// W64: v_cmp_gt_i16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc, v1.l, v2.l quad_perm:[0,1,2,3]
+// W64: v_cmp_gt_i16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0xe4,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc, v1.l, v2.l row_mirror
+// W64: v_cmp_gt_i16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x40,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc, v1.l, v2.l row_half_mirror
+// W64: v_cmp_gt_i16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x41,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc, v1.l, v2.l row_shl:1
+// W64: v_cmp_gt_i16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x01,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc, v1.l, v2.l row_shl:15
+// W64: v_cmp_gt_i16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x0f,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc, v1.l, v2.l row_shr:1
+// W64: v_cmp_gt_i16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x11,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc, v1.l, v2.l row_shr:15
+// W64: v_cmp_gt_i16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x1f,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc, v1.l, v2.l row_ror:1
+// W64: v_cmp_gt_i16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x21,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc, v1.l, v2.l row_ror:15
+// W64: v_cmp_gt_i16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x2f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc, v1, v2 quad_perm:[0,1,2,3]
-// W64: v_cmp_gt_i16 vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0xe4,0x00,0xff]
+v_cmp_gt_i16 vcc, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_gt_i16 vcc, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x50,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc, v1, v2 row_mirror
-// W64: v_cmp_gt_i16 vcc, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x40,0x01,0xff]
+v_cmp_gt_i16 vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W64: v_cmp_gt_i16 vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x5f,0x01,0x01]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc, v1, v2 row_half_mirror
-// W64: v_cmp_gt_i16 vcc, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x41,0x01,0xff]
+v_cmp_gt_i16 vcc, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1
+// W64: v_cmp_gt_i16 vcc, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x60,0x09,0x13]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc, v1, v2 row_shl:1
-// W64: v_cmp_gt_i16 vcc, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x01,0x01,0xff]
+v_cmp_gt_i16 vcc, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1
+// W64: v_cmp_gt_i16 vcc, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x68,0x7c,0x7f,0x6f,0x05,0x30]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc, v1, v2 row_shl:15
-// W64: v_cmp_gt_i16 vcc, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x0f,0x01,0xff]
+v_cmp_gt_i16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf
+// W32: v_cmp_gt_i16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf
+// W64: v_cmp_gt_i16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x1b,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc, v1, v2 row_shr:1
-// W64: v_cmp_gt_i16 vcc, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x11,0x01,0xff]
+v_cmp_gt_i16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf
+// W32: v_cmp_gt_i16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0xe4,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf
+// W64: v_cmp_gt_i16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0xe4,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc, v1, v2 row_shr:15
-// W64: v_cmp_gt_i16 vcc, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x1f,0x01,0xff]
+v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf
+// W32: v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x40,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf
+// W64: v_cmp_gt_i16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x40,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf
+// W32: v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x41,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf
+// W64: v_cmp_gt_i16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x41,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc, v1, v2 row_ror:1
-// W64: v_cmp_gt_i16 vcc, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x21,0x01,0xff]
+v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x01,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_gt_i16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x01,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x0f,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_gt_i16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x0f,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x11,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_gt_i16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x11,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc, v1, v2 row_ror:15
-// W64: v_cmp_gt_i16 vcc, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x2f,0x01,0xff]
+v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x1f,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_gt_i16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x1f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W64: v_cmp_gt_i16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x50,0x01,0xff]
+v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x21,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_gt_i16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x21,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W64: v_cmp_gt_i16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x5f,0x01,0x01]
+v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x2f,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_gt_i16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x2f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W64: v_cmp_gt_i16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x60,0x09,0x13]
+v_cmp_gt_i16 vcc_lo, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W32: v_cmp_gt_i16 vcc_lo, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x69,0x7c,0x81,0x60,0x09,0x13]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W64: v_cmp_gt_i16 vcc, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x69,0x7c,0x81,0x60,0x09,0x13]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
-// W64: v_cmp_gt_i16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x68,0x7c,0x7f,0x6f,0x05,0x30]
+v_cmp_gt_i16 vcc_lo, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// W32: v_cmp_gt_i16 vcc_lo, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x69,0x7c,0xff,0x6f,0x05,0x30]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// W64: v_cmp_gt_i16 vcc, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x69,0x7c,0xff,0x6f,0x05,0x30]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
 v_cmp_gt_i32 vcc_lo, v1, v2 quad_perm:[3,2,1,0]
@@ -2020,116 +2500,212 @@ v_cmp_gt_i32 vcc, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:
 // W64: v_cmp_gt_i32 vcc, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x89,0x7c,0xff,0x6f,0x05,0x30]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc_lo, v1, v2 quad_perm:[3,2,1,0]
-// W32: v_cmp_gt_u16 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x1b,0x00,0xff]
+v_cmp_gt_u16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0]
+// W32: v_cmp_gt_u16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x1b,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc_lo, v1, v2 quad_perm:[0,1,2,3]
-// W32: v_cmp_gt_u16 vcc_lo, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0xe4,0x00,0xff]
+v_cmp_gt_u16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3]
+// W32: v_cmp_gt_u16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0xe4,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc_lo, v1, v2 row_mirror
-// W32: v_cmp_gt_u16 vcc_lo, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x40,0x01,0xff]
+v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_mirror
+// W32: v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x40,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc_lo, v1, v2 row_half_mirror
-// W32: v_cmp_gt_u16 vcc_lo, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x41,0x01,0xff]
+v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_half_mirror
+// W32: v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x41,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc_lo, v1, v2 row_shl:1
-// W32: v_cmp_gt_u16 vcc_lo, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x01,0x01,0xff]
+v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_shl:1
+// W32: v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x01,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc_lo, v1, v2 row_shl:15
-// W32: v_cmp_gt_u16 vcc_lo, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x0f,0x01,0xff]
+v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_shl:15
+// W32: v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x0f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc_lo, v1, v2 row_shr:1
-// W32: v_cmp_gt_u16 vcc_lo, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x11,0x01,0xff]
+v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_shr:1
+// W32: v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x11,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc_lo, v1, v2 row_shr:15
-// W32: v_cmp_gt_u16 vcc_lo, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x1f,0x01,0xff]
+v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_shr:15
+// W32: v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x1f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc_lo, v1, v2 row_ror:1
-// W32: v_cmp_gt_u16 vcc_lo, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x21,0x01,0xff]
+v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_ror:1
+// W32: v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x21,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc_lo, v1, v2 row_ror:15
-// W32: v_cmp_gt_u16 vcc_lo, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x2f,0x01,0xff]
+v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_ror:15
+// W32: v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x2f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W32: v_cmp_gt_u16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x50,0x01,0xff]
+v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x50,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W32: v_cmp_gt_u16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x5f,0x01,0x01]
+v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x5f,0x01,0x01]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W32: v_cmp_gt_u16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x60,0x09,0x13]
+v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1
+// W32: v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x60,0x09,0x13]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
-// W32: v_cmp_gt_u16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x78,0x7c,0x7f,0x6f,0x05,0x30]
+v_cmp_gt_u16 vcc_lo, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1
+// W32: v_cmp_gt_u16 vcc_lo, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x78,0x7c,0x7f,0x6f,0x05,0x30]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc, v1, v2 quad_perm:[3,2,1,0]
-// W64: v_cmp_gt_u16 vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x1b,0x00,0xff]
+v_cmp_gt_u16 vcc, v1.l, v2.l quad_perm:[3,2,1,0]
+// W64: v_cmp_gt_u16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x1b,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc, v1, v2 quad_perm:[0,1,2,3]
-// W64: v_cmp_gt_u16 vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0xe4,0x00,0xff]
+v_cmp_gt_u16 vcc, v1.l, v2.l quad_perm:[0,1,2,3]
+// W64: v_cmp_gt_u16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0xe4,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc, v1, v2 row_mirror
-// W64: v_cmp_gt_u16 vcc, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x40,0x01,0xff]
+v_cmp_gt_u16 vcc, v1.l, v2.l row_mirror
+// W64: v_cmp_gt_u16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x40,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc, v1, v2 row_half_mirror
-// W64: v_cmp_gt_u16 vcc, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x41,0x01,0xff]
+v_cmp_gt_u16 vcc, v1.l, v2.l row_half_mirror
+// W64: v_cmp_gt_u16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x41,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc, v1, v2 row_shl:1
-// W64: v_cmp_gt_u16 vcc, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x01,0x01,0xff]
+v_cmp_gt_u16 vcc, v1.l, v2.l row_shl:1
+// W64: v_cmp_gt_u16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x01,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc, v1, v2 row_shl:15
-// W64: v_cmp_gt_u16 vcc, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x0f,0x01,0xff]
+v_cmp_gt_u16 vcc, v1.l, v2.l row_shl:15
+// W64: v_cmp_gt_u16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x0f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc, v1, v2 row_shr:1
-// W64: v_cmp_gt_u16 vcc, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x11,0x01,0xff]
+v_cmp_gt_u16 vcc, v1.l, v2.l row_shr:1
+// W64: v_cmp_gt_u16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x11,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc, v1, v2 row_shr:15
-// W64: v_cmp_gt_u16 vcc, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x1f,0x01,0xff]
+v_cmp_gt_u16 vcc, v1.l, v2.l row_shr:15
+// W64: v_cmp_gt_u16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x1f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc, v1, v2 row_ror:1
-// W64: v_cmp_gt_u16 vcc, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x21,0x01,0xff]
+v_cmp_gt_u16 vcc, v1.l, v2.l row_ror:1
+// W64: v_cmp_gt_u16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x21,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc, v1, v2 row_ror:15
-// W64: v_cmp_gt_u16 vcc, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x2f,0x01,0xff]
+v_cmp_gt_u16 vcc, v1.l, v2.l row_ror:15
+// W64: v_cmp_gt_u16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x2f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W64: v_cmp_gt_u16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x50,0x01,0xff]
+v_cmp_gt_u16 vcc, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_gt_u16 vcc, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x50,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W64: v_cmp_gt_u16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x5f,0x01,0x01]
+v_cmp_gt_u16 vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W64: v_cmp_gt_u16 vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x5f,0x01,0x01]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W64: v_cmp_gt_u16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x60,0x09,0x13]
+v_cmp_gt_u16 vcc, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1
+// W64: v_cmp_gt_u16 vcc, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x60,0x09,0x13]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
-// W64: v_cmp_gt_u16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x78,0x7c,0x7f,0x6f,0x05,0x30]
+v_cmp_gt_u16 vcc, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1
+// W64: v_cmp_gt_u16 vcc, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x78,0x7c,0x7f,0x6f,0x05,0x30]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf
+// W32: v_cmp_gt_u16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf
+// W64: v_cmp_gt_u16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf
+// W32: v_cmp_gt_u16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0xe4,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf
+// W64: v_cmp_gt_u16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0xe4,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf
+// W32: v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x40,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf
+// W64: v_cmp_gt_u16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x40,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf
+// W32: v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x41,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf
+// W64: v_cmp_gt_u16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x41,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x01,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_gt_u16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x01,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x0f,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_gt_u16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x0f,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x11,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_gt_u16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x11,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x1f,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_gt_u16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x1f,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x21,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_gt_u16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x21,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x2f,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_gt_u16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x2f,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc_lo, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W32: v_cmp_gt_u16 vcc_lo, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x79,0x7c,0x81,0x60,0x09,0x13]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W64: v_cmp_gt_u16 vcc, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x79,0x7c,0x81,0x60,0x09,0x13]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc_lo, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// W32: v_cmp_gt_u16 vcc_lo, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x79,0x7c,0xff,0x6f,0x05,0x30]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// W64: v_cmp_gt_u16 vcc, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x79,0x7c,0xff,0x6f,0x05,0x30]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
 v_cmp_gt_u32 vcc_lo, v1, v2 quad_perm:[3,2,1,0]
@@ -2468,116 +3044,212 @@ v_cmp_le_f32 vcc, -|v255|, -|v255| row_xmask:15 row_mask:0x3 bank_mask:0x0 bound
 // W64: v_cmp_le_f32 vcc, -|v255|, -|v255| row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x27,0x7c,0xff,0x6f,0xf5,0x30]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc_lo, v1, v2 quad_perm:[3,2,1,0]
-// W32: v_cmp_le_i16 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x1b,0x00,0xff]
+v_cmp_le_i16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0]
+// W32: v_cmp_le_i16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x1b,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc_lo, v1, v2 quad_perm:[0,1,2,3]
-// W32: v_cmp_le_i16 vcc_lo, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0xe4,0x00,0xff]
+v_cmp_le_i16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3]
+// W32: v_cmp_le_i16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0xe4,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc_lo, v1, v2 row_mirror
-// W32: v_cmp_le_i16 vcc_lo, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x40,0x01,0xff]
+v_cmp_le_i16 vcc_lo, v1.l, v2.l row_mirror
+// W32: v_cmp_le_i16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x40,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc_lo, v1, v2 row_half_mirror
-// W32: v_cmp_le_i16 vcc_lo, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x41,0x01,0xff]
+v_cmp_le_i16 vcc_lo, v1.l, v2.l row_half_mirror
+// W32: v_cmp_le_i16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x41,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc_lo, v1, v2 row_shl:1
-// W32: v_cmp_le_i16 vcc_lo, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x01,0x01,0xff]
+v_cmp_le_i16 vcc_lo, v1.l, v2.l row_shl:1
+// W32: v_cmp_le_i16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x01,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc_lo, v1, v2 row_shl:15
-// W32: v_cmp_le_i16 vcc_lo, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x0f,0x01,0xff]
+v_cmp_le_i16 vcc_lo, v1.l, v2.l row_shl:15
+// W32: v_cmp_le_i16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x0f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc_lo, v1, v2 row_shr:1
-// W32: v_cmp_le_i16 vcc_lo, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x11,0x01,0xff]
+v_cmp_le_i16 vcc_lo, v1.l, v2.l row_shr:1
+// W32: v_cmp_le_i16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x11,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc_lo, v1, v2 row_shr:15
-// W32: v_cmp_le_i16 vcc_lo, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x1f,0x01,0xff]
+v_cmp_le_i16 vcc_lo, v1.l, v2.l row_shr:15
+// W32: v_cmp_le_i16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x1f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc_lo, v1, v2 row_ror:1
-// W32: v_cmp_le_i16 vcc_lo, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x21,0x01,0xff]
+v_cmp_le_i16 vcc_lo, v1.l, v2.l row_ror:1
+// W32: v_cmp_le_i16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x21,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc_lo, v1, v2 row_ror:15
-// W32: v_cmp_le_i16 vcc_lo, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x2f,0x01,0xff]
+v_cmp_le_i16 vcc_lo, v1.l, v2.l row_ror:15
+// W32: v_cmp_le_i16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x2f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W32: v_cmp_le_i16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x50,0x01,0xff]
+v_cmp_le_i16 vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_le_i16 vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x50,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W32: v_cmp_le_i16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x5f,0x01,0x01]
+v_cmp_le_i16 vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_le_i16 vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x5f,0x01,0x01]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc_lo, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1
+// W32: v_cmp_le_i16 vcc_lo, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x60,0x09,0x13]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc_lo, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1
+// W32: v_cmp_le_i16 vcc_lo, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x66,0x7c,0x7f,0x6f,0x05,0x30]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc, v1.l, v2.l quad_perm:[3,2,1,0]
+// W64: v_cmp_le_i16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc, v1.l, v2.l quad_perm:[0,1,2,3]
+// W64: v_cmp_le_i16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0xe4,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc, v1.l, v2.l row_mirror
+// W64: v_cmp_le_i16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x40,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc, v1.l, v2.l row_half_mirror
+// W64: v_cmp_le_i16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x41,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc, v1.l, v2.l row_shl:1
+// W64: v_cmp_le_i16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x01,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc, v1.l, v2.l row_shl:15
+// W64: v_cmp_le_i16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x0f,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc, v1.l, v2.l row_shr:1
+// W64: v_cmp_le_i16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x11,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc, v1.l, v2.l row_shr:15
+// W64: v_cmp_le_i16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x1f,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc, v1.l, v2.l row_ror:1
+// W64: v_cmp_le_i16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x21,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc, v1.l, v2.l row_ror:15
+// W64: v_cmp_le_i16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x2f,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_le_i16 vcc, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x50,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W64: v_cmp_le_i16 vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x5f,0x01,0x01]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1
+// W64: v_cmp_le_i16 vcc, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x60,0x09,0x13]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1
+// W64: v_cmp_le_i16 vcc, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x66,0x7c,0x7f,0x6f,0x05,0x30]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf
+// W32: v_cmp_le_i16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf
+// W64: v_cmp_le_i16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf
+// W32: v_cmp_le_i16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0xe4,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf
+// W64: v_cmp_le_i16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0xe4,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf
+// W32: v_cmp_le_i16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x40,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf
+// W64: v_cmp_le_i16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x40,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf
+// W32: v_cmp_le_i16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x41,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W32: v_cmp_le_i16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x60,0x09,0x13]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_le_i16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf
+// W64: v_cmp_le_i16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x41,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
-// W32: v_cmp_le_i16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x66,0x7c,0x7f,0x6f,0x05,0x30]
+v_cmp_le_i16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_le_i16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x01,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc, v1, v2 quad_perm:[3,2,1,0]
-// W64: v_cmp_le_i16 vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x1b,0x00,0xff]
+v_cmp_le_i16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_le_i16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x01,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc, v1, v2 quad_perm:[0,1,2,3]
-// W64: v_cmp_le_i16 vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0xe4,0x00,0xff]
-// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_le_i16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_le_i16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x0f,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc, v1, v2 row_mirror
-// W64: v_cmp_le_i16 vcc, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x40,0x01,0xff]
+v_cmp_le_i16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_le_i16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x0f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc, v1, v2 row_half_mirror
-// W64: v_cmp_le_i16 vcc, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x41,0x01,0xff]
-// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_le_i16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_le_i16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x11,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc, v1, v2 row_shl:1
-// W64: v_cmp_le_i16 vcc, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x01,0x01,0xff]
+v_cmp_le_i16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_le_i16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x11,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc, v1, v2 row_shl:15
-// W64: v_cmp_le_i16 vcc, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x0f,0x01,0xff]
-// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_le_i16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_le_i16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x1f,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc, v1, v2 row_shr:1
-// W64: v_cmp_le_i16 vcc, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x11,0x01,0xff]
+v_cmp_le_i16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_le_i16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x1f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc, v1, v2 row_shr:15
-// W64: v_cmp_le_i16 vcc, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x1f,0x01,0xff]
-// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_le_i16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_le_i16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x21,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc, v1, v2 row_ror:1
-// W64: v_cmp_le_i16 vcc, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x21,0x01,0xff]
+v_cmp_le_i16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_le_i16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x21,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc, v1, v2 row_ror:15
-// W64: v_cmp_le_i16 vcc, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x2f,0x01,0xff]
-// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_le_i16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_le_i16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x2f,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W64: v_cmp_le_i16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x50,0x01,0xff]
+v_cmp_le_i16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_le_i16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x2f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W64: v_cmp_le_i16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x5f,0x01,0x01]
-// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_le_i16 vcc_lo, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W32: v_cmp_le_i16 vcc_lo, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x67,0x7c,0x81,0x60,0x09,0x13]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W64: v_cmp_le_i16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x60,0x09,0x13]
+v_cmp_le_i16 vcc, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W64: v_cmp_le_i16 vcc, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x67,0x7c,0x81,0x60,0x09,0x13]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
-// W64: v_cmp_le_i16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x66,0x7c,0x7f,0x6f,0x05,0x30]
+v_cmp_le_i16 vcc_lo, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// W32: v_cmp_le_i16 vcc_lo, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x67,0x7c,0xff,0x6f,0x05,0x30]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// W64: v_cmp_le_i16 vcc, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x67,0x7c,0xff,0x6f,0x05,0x30]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
 v_cmp_le_i32 vcc_lo, v1, v2 quad_perm:[3,2,1,0]
@@ -2692,116 +3364,212 @@ v_cmp_le_i32 vcc, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:
 // W64: v_cmp_le_i32 vcc, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x87,0x7c,0xff,0x6f,0x05,0x30]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc_lo, v1, v2 quad_perm:[3,2,1,0]
-// W32: v_cmp_le_u16 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x1b,0x00,0xff]
+v_cmp_le_u16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0]
+// W32: v_cmp_le_u16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x1b,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc_lo, v1, v2 quad_perm:[0,1,2,3]
-// W32: v_cmp_le_u16 vcc_lo, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0xe4,0x00,0xff]
+v_cmp_le_u16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3]
+// W32: v_cmp_le_u16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0xe4,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc_lo, v1, v2 row_mirror
-// W32: v_cmp_le_u16 vcc_lo, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x40,0x01,0xff]
+v_cmp_le_u16 vcc_lo, v1.l, v2.l row_mirror
+// W32: v_cmp_le_u16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x40,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc_lo, v1, v2 row_half_mirror
-// W32: v_cmp_le_u16 vcc_lo, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x41,0x01,0xff]
+v_cmp_le_u16 vcc_lo, v1.l, v2.l row_half_mirror
+// W32: v_cmp_le_u16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x41,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc_lo, v1, v2 row_shl:1
-// W32: v_cmp_le_u16 vcc_lo, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x01,0x01,0xff]
+v_cmp_le_u16 vcc_lo, v1.l, v2.l row_shl:1
+// W32: v_cmp_le_u16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x01,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc_lo, v1, v2 row_shl:15
-// W32: v_cmp_le_u16 vcc_lo, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x0f,0x01,0xff]
+v_cmp_le_u16 vcc_lo, v1.l, v2.l row_shl:15
+// W32: v_cmp_le_u16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x0f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc_lo, v1, v2 row_shr:1
-// W32: v_cmp_le_u16 vcc_lo, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x11,0x01,0xff]
+v_cmp_le_u16 vcc_lo, v1.l, v2.l row_shr:1
+// W32: v_cmp_le_u16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x11,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc_lo, v1, v2 row_shr:15
-// W32: v_cmp_le_u16 vcc_lo, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x1f,0x01,0xff]
+v_cmp_le_u16 vcc_lo, v1.l, v2.l row_shr:15
+// W32: v_cmp_le_u16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x1f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc_lo, v1, v2 row_ror:1
-// W32: v_cmp_le_u16 vcc_lo, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x21,0x01,0xff]
+v_cmp_le_u16 vcc_lo, v1.l, v2.l row_ror:1
+// W32: v_cmp_le_u16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x21,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc_lo, v1, v2 row_ror:15
-// W32: v_cmp_le_u16 vcc_lo, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x2f,0x01,0xff]
+v_cmp_le_u16 vcc_lo, v1.l, v2.l row_ror:15
+// W32: v_cmp_le_u16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x2f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W32: v_cmp_le_u16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x50,0x01,0xff]
+v_cmp_le_u16 vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_le_u16 vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x50,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W32: v_cmp_le_u16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x5f,0x01,0x01]
+v_cmp_le_u16 vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_le_u16 vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x5f,0x01,0x01]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W32: v_cmp_le_u16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x60,0x09,0x13]
+v_cmp_le_u16 vcc_lo, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1
+// W32: v_cmp_le_u16 vcc_lo, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x60,0x09,0x13]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
-// W32: v_cmp_le_u16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x76,0x7c,0x7f,0x6f,0x05,0x30]
+v_cmp_le_u16 vcc_lo, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1
+// W32: v_cmp_le_u16 vcc_lo, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x76,0x7c,0x7f,0x6f,0x05,0x30]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc, v1, v2 quad_perm:[3,2,1,0]
-// W64: v_cmp_le_u16 vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x1b,0x00,0xff]
+v_cmp_le_u16 vcc, v1.l, v2.l quad_perm:[3,2,1,0]
+// W64: v_cmp_le_u16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc, v1.l, v2.l quad_perm:[0,1,2,3]
+// W64: v_cmp_le_u16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0xe4,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc, v1.l, v2.l row_mirror
+// W64: v_cmp_le_u16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x40,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc, v1.l, v2.l row_half_mirror
+// W64: v_cmp_le_u16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x41,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc, v1.l, v2.l row_shl:1
+// W64: v_cmp_le_u16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x01,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc, v1.l, v2.l row_shl:15
+// W64: v_cmp_le_u16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x0f,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc, v1.l, v2.l row_shr:1
+// W64: v_cmp_le_u16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x11,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc, v1.l, v2.l row_shr:15
+// W64: v_cmp_le_u16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x1f,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc, v1.l, v2.l row_ror:1
+// W64: v_cmp_le_u16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x21,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc, v1, v2 quad_perm:[0,1,2,3]
-// W64: v_cmp_le_u16 vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0xe4,0x00,0xff]
+v_cmp_le_u16 vcc, v1.l, v2.l row_ror:15
+// W64: v_cmp_le_u16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x2f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc, v1, v2 row_mirror
-// W64: v_cmp_le_u16 vcc, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x40,0x01,0xff]
+v_cmp_le_u16 vcc, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_le_u16 vcc, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x50,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc, v1, v2 row_half_mirror
-// W64: v_cmp_le_u16 vcc, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x41,0x01,0xff]
+v_cmp_le_u16 vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W64: v_cmp_le_u16 vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x5f,0x01,0x01]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc, v1, v2 row_shl:1
-// W64: v_cmp_le_u16 vcc, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x01,0x01,0xff]
+v_cmp_le_u16 vcc, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1
+// W64: v_cmp_le_u16 vcc, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x60,0x09,0x13]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc, v1, v2 row_shl:15
-// W64: v_cmp_le_u16 vcc, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x0f,0x01,0xff]
+v_cmp_le_u16 vcc, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1
+// W64: v_cmp_le_u16 vcc, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x76,0x7c,0x7f,0x6f,0x05,0x30]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc, v1, v2 row_shr:1
-// W64: v_cmp_le_u16 vcc, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x11,0x01,0xff]
+v_cmp_le_u16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf
+// W32: v_cmp_le_u16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf
+// W64: v_cmp_le_u16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf
+// W32: v_cmp_le_u16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0xe4,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf
+// W64: v_cmp_le_u16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0xe4,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf
+// W32: v_cmp_le_u16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x40,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf
+// W64: v_cmp_le_u16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x40,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf
+// W32: v_cmp_le_u16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x41,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf
+// W64: v_cmp_le_u16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x41,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_le_u16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x01,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_le_u16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x01,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc, v1, v2 row_shr:15
-// W64: v_cmp_le_u16 vcc, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x1f,0x01,0xff]
+v_cmp_le_u16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_le_u16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x0f,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_le_u16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x0f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc, v1, v2 row_ror:1
-// W64: v_cmp_le_u16 vcc, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x21,0x01,0xff]
+v_cmp_le_u16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_le_u16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x11,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_le_u16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x11,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc, v1, v2 row_ror:15
-// W64: v_cmp_le_u16 vcc, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x2f,0x01,0xff]
+v_cmp_le_u16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_le_u16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x1f,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_le_u16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x1f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W64: v_cmp_le_u16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x50,0x01,0xff]
+v_cmp_le_u16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_le_u16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x21,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_le_u16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x21,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W64: v_cmp_le_u16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x5f,0x01,0x01]
+v_cmp_le_u16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_le_u16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x2f,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_le_u16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x2f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W64: v_cmp_le_u16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x60,0x09,0x13]
+v_cmp_le_u16 vcc_lo, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W32: v_cmp_le_u16 vcc_lo, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x77,0x7c,0x81,0x60,0x09,0x13]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W64: v_cmp_le_u16 vcc, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x77,0x7c,0x81,0x60,0x09,0x13]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
-// W64: v_cmp_le_u16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x76,0x7c,0x7f,0x6f,0x05,0x30]
+v_cmp_le_u16 vcc_lo, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// W32: v_cmp_le_u16 vcc_lo, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x77,0x7c,0xff,0x6f,0x05,0x30]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// W64: v_cmp_le_u16 vcc, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x77,0x7c,0xff,0x6f,0x05,0x30]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
 v_cmp_le_u32 vcc_lo, v1, v2 quad_perm:[3,2,1,0]
@@ -3460,116 +4228,212 @@ v_cmp_lt_f32 vcc, -|v255|, -|v255| row_xmask:15 row_mask:0x3 bank_mask:0x0 bound
 // W64: v_cmp_lt_f32 vcc, -|v255|, -|v255| row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x23,0x7c,0xff,0x6f,0xf5,0x30]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc_lo, v1, v2 quad_perm:[3,2,1,0]
-// W32: v_cmp_lt_i16 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x1b,0x00,0xff]
+v_cmp_lt_i16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0]
+// W32: v_cmp_lt_i16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x1b,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc_lo, v1, v2 quad_perm:[0,1,2,3]
-// W32: v_cmp_lt_i16 vcc_lo, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0xe4,0x00,0xff]
+v_cmp_lt_i16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3]
+// W32: v_cmp_lt_i16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0xe4,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc_lo, v1, v2 row_mirror
-// W32: v_cmp_lt_i16 vcc_lo, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x40,0x01,0xff]
+v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_mirror
+// W32: v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x40,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc_lo, v1, v2 row_half_mirror
-// W32: v_cmp_lt_i16 vcc_lo, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x41,0x01,0xff]
+v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_half_mirror
+// W32: v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x41,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc_lo, v1, v2 row_shl:1
-// W32: v_cmp_lt_i16 vcc_lo, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x01,0x01,0xff]
+v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_shl:1
+// W32: v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x01,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc_lo, v1, v2 row_shl:15
-// W32: v_cmp_lt_i16 vcc_lo, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x0f,0x01,0xff]
+v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_shl:15
+// W32: v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x0f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc_lo, v1, v2 row_shr:1
-// W32: v_cmp_lt_i16 vcc_lo, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x11,0x01,0xff]
+v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_shr:1
+// W32: v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x11,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc_lo, v1, v2 row_shr:15
-// W32: v_cmp_lt_i16 vcc_lo, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x1f,0x01,0xff]
+v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_shr:15
+// W32: v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x1f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc_lo, v1, v2 row_ror:1
-// W32: v_cmp_lt_i16 vcc_lo, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x21,0x01,0xff]
+v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_ror:1
+// W32: v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x21,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc_lo, v1, v2 row_ror:15
-// W32: v_cmp_lt_i16 vcc_lo, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x2f,0x01,0xff]
+v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_ror:15
+// W32: v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x2f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W32: v_cmp_lt_i16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x50,0x01,0xff]
+v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x50,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W32: v_cmp_lt_i16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x5f,0x01,0x01]
+v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x5f,0x01,0x01]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W32: v_cmp_lt_i16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x60,0x09,0x13]
+v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1
+// W32: v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x60,0x09,0x13]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
-// W32: v_cmp_lt_i16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x62,0x7c,0x7f,0x6f,0x05,0x30]
+v_cmp_lt_i16 vcc_lo, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1
+// W32: v_cmp_lt_i16 vcc_lo, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x62,0x7c,0x7f,0x6f,0x05,0x30]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc, v1, v2 quad_perm:[3,2,1,0]
-// W64: v_cmp_lt_i16 vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x1b,0x00,0xff]
+v_cmp_lt_i16 vcc, v1.l, v2.l quad_perm:[3,2,1,0]
+// W64: v_cmp_lt_i16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x1b,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc, v1, v2 quad_perm:[0,1,2,3]
-// W64: v_cmp_lt_i16 vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0xe4,0x00,0xff]
+v_cmp_lt_i16 vcc, v1.l, v2.l quad_perm:[0,1,2,3]
+// W64: v_cmp_lt_i16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0xe4,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc, v1, v2 row_mirror
-// W64: v_cmp_lt_i16 vcc, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x40,0x01,0xff]
+v_cmp_lt_i16 vcc, v1.l, v2.l row_mirror
+// W64: v_cmp_lt_i16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x40,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc, v1, v2 row_half_mirror
-// W64: v_cmp_lt_i16 vcc, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x41,0x01,0xff]
+v_cmp_lt_i16 vcc, v1.l, v2.l row_half_mirror
+// W64: v_cmp_lt_i16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x41,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc, v1, v2 row_shl:1
-// W64: v_cmp_lt_i16 vcc, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x01,0x01,0xff]
+v_cmp_lt_i16 vcc, v1.l, v2.l row_shl:1
+// W64: v_cmp_lt_i16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x01,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc, v1, v2 row_shl:15
-// W64: v_cmp_lt_i16 vcc, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x0f,0x01,0xff]
+v_cmp_lt_i16 vcc, v1.l, v2.l row_shl:15
+// W64: v_cmp_lt_i16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x0f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc, v1, v2 row_shr:1
-// W64: v_cmp_lt_i16 vcc, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x11,0x01,0xff]
+v_cmp_lt_i16 vcc, v1.l, v2.l row_shr:1
+// W64: v_cmp_lt_i16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x11,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc, v1, v2 row_shr:15
-// W64: v_cmp_lt_i16 vcc, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x1f,0x01,0xff]
+v_cmp_lt_i16 vcc, v1.l, v2.l row_shr:15
+// W64: v_cmp_lt_i16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x1f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc, v1, v2 row_ror:1
-// W64: v_cmp_lt_i16 vcc, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x21,0x01,0xff]
+v_cmp_lt_i16 vcc, v1.l, v2.l row_ror:1
+// W64: v_cmp_lt_i16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x21,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc, v1, v2 row_ror:15
-// W64: v_cmp_lt_i16 vcc, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x2f,0x01,0xff]
+v_cmp_lt_i16 vcc, v1.l, v2.l row_ror:15
+// W64: v_cmp_lt_i16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x2f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W64: v_cmp_lt_i16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x50,0x01,0xff]
+v_cmp_lt_i16 vcc, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_lt_i16 vcc, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x50,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W64: v_cmp_lt_i16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x5f,0x01,0x01]
+v_cmp_lt_i16 vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W64: v_cmp_lt_i16 vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x5f,0x01,0x01]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W64: v_cmp_lt_i16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x60,0x09,0x13]
+v_cmp_lt_i16 vcc, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1
+// W64: v_cmp_lt_i16 vcc, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x60,0x09,0x13]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
-// W64: v_cmp_lt_i16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x62,0x7c,0x7f,0x6f,0x05,0x30]
+v_cmp_lt_i16 vcc, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1
+// W64: v_cmp_lt_i16 vcc, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x62,0x7c,0x7f,0x6f,0x05,0x30]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf
+// W32: v_cmp_lt_i16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf
+// W64: v_cmp_lt_i16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf
+// W32: v_cmp_lt_i16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0xe4,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf
+// W64: v_cmp_lt_i16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0xe4,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf
+// W32: v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x40,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf
+// W64: v_cmp_lt_i16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x40,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf
+// W32: v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x41,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf
+// W64: v_cmp_lt_i16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x41,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x01,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_lt_i16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x01,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x0f,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_lt_i16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x0f,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x11,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_lt_i16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x11,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x1f,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_lt_i16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x1f,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x21,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_lt_i16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x21,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x2f,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_lt_i16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x2f,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc_lo, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W32: v_cmp_lt_i16 vcc_lo, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x63,0x7c,0x81,0x60,0x09,0x13]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W64: v_cmp_lt_i16 vcc, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x63,0x7c,0x81,0x60,0x09,0x13]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc_lo, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// W32: v_cmp_lt_i16 vcc_lo, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x63,0x7c,0xff,0x6f,0x05,0x30]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// W64: v_cmp_lt_i16 vcc, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x63,0x7c,0xff,0x6f,0x05,0x30]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
 v_cmp_lt_i32 vcc_lo, v1, v2 quad_perm:[3,2,1,0]
@@ -3684,116 +4548,212 @@ v_cmp_lt_i32 vcc, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:
 // W64: v_cmp_lt_i32 vcc, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x83,0x7c,0xff,0x6f,0x05,0x30]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc_lo, v1, v2 quad_perm:[3,2,1,0]
-// W32: v_cmp_lt_u16 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x1b,0x00,0xff]
+v_cmp_lt_u16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0]
+// W32: v_cmp_lt_u16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x1b,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc_lo, v1, v2 quad_perm:[0,1,2,3]
-// W32: v_cmp_lt_u16 vcc_lo, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0xe4,0x00,0xff]
+v_cmp_lt_u16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3]
+// W32: v_cmp_lt_u16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0xe4,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc_lo, v1, v2 row_mirror
-// W32: v_cmp_lt_u16 vcc_lo, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x40,0x01,0xff]
+v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_mirror
+// W32: v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x40,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc_lo, v1, v2 row_half_mirror
-// W32: v_cmp_lt_u16 vcc_lo, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x41,0x01,0xff]
+v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_half_mirror
+// W32: v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x41,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc_lo, v1, v2 row_shl:1
-// W32: v_cmp_lt_u16 vcc_lo, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x01,0x01,0xff]
+v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_shl:1
+// W32: v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x01,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc_lo, v1, v2 row_shl:15
-// W32: v_cmp_lt_u16 vcc_lo, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x0f,0x01,0xff]
+v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_shl:15
+// W32: v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x0f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc_lo, v1, v2 row_shr:1
-// W32: v_cmp_lt_u16 vcc_lo, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x11,0x01,0xff]
+v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_shr:1
+// W32: v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x11,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc_lo, v1, v2 row_shr:15
-// W32: v_cmp_lt_u16 vcc_lo, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x1f,0x01,0xff]
+v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_shr:15
+// W32: v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x1f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc_lo, v1, v2 row_ror:1
-// W32: v_cmp_lt_u16 vcc_lo, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x21,0x01,0xff]
+v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_ror:1
+// W32: v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x21,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc_lo, v1, v2 row_ror:15
-// W32: v_cmp_lt_u16 vcc_lo, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x2f,0x01,0xff]
+v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_ror:15
+// W32: v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x2f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W32: v_cmp_lt_u16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x50,0x01,0xff]
+v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x50,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W32: v_cmp_lt_u16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x5f,0x01,0x01]
+v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x5f,0x01,0x01]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W32: v_cmp_lt_u16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x60,0x09,0x13]
+v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1
+// W32: v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x60,0x09,0x13]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
-// W32: v_cmp_lt_u16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x72,0x7c,0x7f,0x6f,0x05,0x30]
+v_cmp_lt_u16 vcc_lo, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1
+// W32: v_cmp_lt_u16 vcc_lo, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x72,0x7c,0x7f,0x6f,0x05,0x30]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc, v1, v2 quad_perm:[3,2,1,0]
-// W64: v_cmp_lt_u16 vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x1b,0x00,0xff]
+v_cmp_lt_u16 vcc, v1.l, v2.l quad_perm:[3,2,1,0]
+// W64: v_cmp_lt_u16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc, v1.l, v2.l quad_perm:[0,1,2,3]
+// W64: v_cmp_lt_u16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0xe4,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc, v1.l, v2.l row_mirror
+// W64: v_cmp_lt_u16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x40,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc, v1.l, v2.l row_half_mirror
+// W64: v_cmp_lt_u16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x41,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc, v1.l, v2.l row_shl:1
+// W64: v_cmp_lt_u16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x01,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc, v1.l, v2.l row_shl:15
+// W64: v_cmp_lt_u16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x0f,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc, v1.l, v2.l row_shr:1
+// W64: v_cmp_lt_u16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x11,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc, v1.l, v2.l row_shr:15
+// W64: v_cmp_lt_u16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x1f,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc, v1.l, v2.l row_ror:1
+// W64: v_cmp_lt_u16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x21,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc, v1, v2 quad_perm:[0,1,2,3]
-// W64: v_cmp_lt_u16 vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0xe4,0x00,0xff]
+v_cmp_lt_u16 vcc, v1.l, v2.l row_ror:15
+// W64: v_cmp_lt_u16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x2f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc, v1, v2 row_mirror
-// W64: v_cmp_lt_u16 vcc, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x40,0x01,0xff]
+v_cmp_lt_u16 vcc, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_lt_u16 vcc, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x50,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc, v1, v2 row_half_mirror
-// W64: v_cmp_lt_u16 vcc, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x41,0x01,0xff]
+v_cmp_lt_u16 vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W64: v_cmp_lt_u16 vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x5f,0x01,0x01]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc, v1, v2 row_shl:1
-// W64: v_cmp_lt_u16 vcc, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x01,0x01,0xff]
+v_cmp_lt_u16 vcc, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1
+// W64: v_cmp_lt_u16 vcc, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x60,0x09,0x13]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc, v1, v2 row_shl:15
-// W64: v_cmp_lt_u16 vcc, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x0f,0x01,0xff]
+v_cmp_lt_u16 vcc, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1
+// W64: v_cmp_lt_u16 vcc, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x72,0x7c,0x7f,0x6f,0x05,0x30]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc, v1, v2 row_shr:1
-// W64: v_cmp_lt_u16 vcc, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x11,0x01,0xff]
+v_cmp_lt_u16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf
+// W32: v_cmp_lt_u16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf
+// W64: v_cmp_lt_u16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf
+// W32: v_cmp_lt_u16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0xe4,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf
+// W64: v_cmp_lt_u16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0xe4,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf
+// W32: v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x40,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf
+// W64: v_cmp_lt_u16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x40,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf
+// W32: v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x41,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf
+// W64: v_cmp_lt_u16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x41,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x01,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_lt_u16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x01,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc, v1, v2 row_shr:15
-// W64: v_cmp_lt_u16 vcc, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x1f,0x01,0xff]
+v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x0f,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_lt_u16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x0f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc, v1, v2 row_ror:1
-// W64: v_cmp_lt_u16 vcc, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x21,0x01,0xff]
+v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x11,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_lt_u16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x11,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc, v1, v2 row_ror:15
-// W64: v_cmp_lt_u16 vcc, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x2f,0x01,0xff]
+v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x1f,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_lt_u16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x1f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W64: v_cmp_lt_u16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x50,0x01,0xff]
+v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x21,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_lt_u16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x21,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W64: v_cmp_lt_u16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x5f,0x01,0x01]
+v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x2f,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_lt_u16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x2f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W64: v_cmp_lt_u16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x60,0x09,0x13]
+v_cmp_lt_u16 vcc_lo, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W32: v_cmp_lt_u16 vcc_lo, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x73,0x7c,0x81,0x60,0x09,0x13]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W64: v_cmp_lt_u16 vcc, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x73,0x7c,0x81,0x60,0x09,0x13]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
-// W64: v_cmp_lt_u16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x72,0x7c,0x7f,0x6f,0x05,0x30]
+v_cmp_lt_u16 vcc_lo, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// W32: v_cmp_lt_u16 vcc_lo, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x73,0x7c,0xff,0x6f,0x05,0x30]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// W64: v_cmp_lt_u16 vcc, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x73,0x7c,0xff,0x6f,0x05,0x30]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
 v_cmp_lt_u32 vcc_lo, v1, v2 quad_perm:[3,2,1,0]
@@ -3908,116 +4868,212 @@ v_cmp_lt_u32 vcc, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:
 // W64: v_cmp_lt_u32 vcc, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x93,0x7c,0xff,0x6f,0x05,0x30]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc_lo, v1, v2 quad_perm:[3,2,1,0]
-// W32: v_cmp_ne_i16 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x1b,0x00,0xff]
+v_cmp_ne_i16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0]
+// W32: v_cmp_ne_i16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x1b,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc_lo, v1, v2 quad_perm:[0,1,2,3]
-// W32: v_cmp_ne_i16 vcc_lo, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0xe4,0x00,0xff]
+v_cmp_ne_i16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3]
+// W32: v_cmp_ne_i16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0xe4,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc_lo, v1, v2 row_mirror
-// W32: v_cmp_ne_i16 vcc_lo, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x40,0x01,0xff]
+v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_mirror
+// W32: v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x40,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc_lo, v1, v2 row_half_mirror
-// W32: v_cmp_ne_i16 vcc_lo, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x41,0x01,0xff]
+v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_half_mirror
+// W32: v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x41,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc_lo, v1, v2 row_shl:1
-// W32: v_cmp_ne_i16 vcc_lo, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x01,0x01,0xff]
+v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_shl:1
+// W32: v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x01,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc_lo, v1, v2 row_shl:15
-// W32: v_cmp_ne_i16 vcc_lo, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x0f,0x01,0xff]
+v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_shl:15
+// W32: v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x0f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc_lo, v1, v2 row_shr:1
-// W32: v_cmp_ne_i16 vcc_lo, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x11,0x01,0xff]
+v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_shr:1
+// W32: v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x11,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc_lo, v1, v2 row_shr:15
-// W32: v_cmp_ne_i16 vcc_lo, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x1f,0x01,0xff]
+v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_shr:15
+// W32: v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x1f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc_lo, v1, v2 row_ror:1
-// W32: v_cmp_ne_i16 vcc_lo, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x21,0x01,0xff]
+v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_ror:1
+// W32: v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x21,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc_lo, v1, v2 row_ror:15
-// W32: v_cmp_ne_i16 vcc_lo, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x2f,0x01,0xff]
+v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_ror:15
+// W32: v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x2f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W32: v_cmp_ne_i16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x50,0x01,0xff]
+v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x50,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W32: v_cmp_ne_i16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x5f,0x01,0x01]
+v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x5f,0x01,0x01]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W32: v_cmp_ne_i16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x60,0x09,0x13]
+v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1
+// W32: v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x60,0x09,0x13]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
-// W32: v_cmp_ne_i16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x6a,0x7c,0x7f,0x6f,0x05,0x30]
+v_cmp_ne_i16 vcc_lo, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1
+// W32: v_cmp_ne_i16 vcc_lo, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x6a,0x7c,0x7f,0x6f,0x05,0x30]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc, v1, v2 quad_perm:[3,2,1,0]
-// W64: v_cmp_ne_i16 vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x1b,0x00,0xff]
+v_cmp_ne_i16 vcc, v1.l, v2.l quad_perm:[3,2,1,0]
+// W64: v_cmp_ne_i16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x1b,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc, v1, v2 quad_perm:[0,1,2,3]
-// W64: v_cmp_ne_i16 vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0xe4,0x00,0xff]
+v_cmp_ne_i16 vcc, v1.l, v2.l quad_perm:[0,1,2,3]
+// W64: v_cmp_ne_i16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0xe4,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc, v1, v2 row_mirror
-// W64: v_cmp_ne_i16 vcc, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x40,0x01,0xff]
+v_cmp_ne_i16 vcc, v1.l, v2.l row_mirror
+// W64: v_cmp_ne_i16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x40,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc, v1, v2 row_half_mirror
-// W64: v_cmp_ne_i16 vcc, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x41,0x01,0xff]
+v_cmp_ne_i16 vcc, v1.l, v2.l row_half_mirror
+// W64: v_cmp_ne_i16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x41,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc, v1, v2 row_shl:1
-// W64: v_cmp_ne_i16 vcc, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x01,0x01,0xff]
+v_cmp_ne_i16 vcc, v1.l, v2.l row_shl:1
+// W64: v_cmp_ne_i16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x01,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc, v1, v2 row_shl:15
-// W64: v_cmp_ne_i16 vcc, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x0f,0x01,0xff]
+v_cmp_ne_i16 vcc, v1.l, v2.l row_shl:15
+// W64: v_cmp_ne_i16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x0f,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, v1.l, v2.l row_shr:1
+// W64: v_cmp_ne_i16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x11,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, v1.l, v2.l row_shr:15
+// W64: v_cmp_ne_i16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x1f,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, v1.l, v2.l row_ror:1
+// W64: v_cmp_ne_i16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x21,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, v1.l, v2.l row_ror:15
+// W64: v_cmp_ne_i16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x2f,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ne_i16 vcc, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x50,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W64: v_cmp_ne_i16 vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x5f,0x01,0x01]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1
+// W64: v_cmp_ne_i16 vcc, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x60,0x09,0x13]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1
+// W64: v_cmp_ne_i16 vcc, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x6a,0x7c,0x7f,0x6f,0x05,0x30]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ne_i16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ne_i16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ne_i16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0xe4,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ne_i16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0xe4,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x40,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ne_i16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x40,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x41,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ne_i16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x41,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc, v1, v2 row_shr:1
-// W64: v_cmp_ne_i16 vcc, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x11,0x01,0xff]
+v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x01,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ne_i16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x01,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc, v1, v2 row_shr:15
-// W64: v_cmp_ne_i16 vcc, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x1f,0x01,0xff]
+v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x0f,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ne_i16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x0f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc, v1, v2 row_ror:1
-// W64: v_cmp_ne_i16 vcc, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x21,0x01,0xff]
+v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x11,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ne_i16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x11,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc, v1, v2 row_ror:15
-// W64: v_cmp_ne_i16 vcc, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x2f,0x01,0xff]
+v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x1f,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ne_i16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x1f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W64: v_cmp_ne_i16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x50,0x01,0xff]
+v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x21,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ne_i16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x21,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W64: v_cmp_ne_i16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x5f,0x01,0x01]
+v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x2f,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ne_i16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x2f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W64: v_cmp_ne_i16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x60,0x09,0x13]
+v_cmp_ne_i16 vcc_lo, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W32: v_cmp_ne_i16 vcc_lo, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x6b,0x7c,0x81,0x60,0x09,0x13]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W64: v_cmp_ne_i16 vcc, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x6b,0x7c,0x81,0x60,0x09,0x13]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
-// W64: v_cmp_ne_i16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x6a,0x7c,0x7f,0x6f,0x05,0x30]
+v_cmp_ne_i16 vcc_lo, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// W32: v_cmp_ne_i16 vcc_lo, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x6b,0x7c,0xff,0x6f,0x05,0x30]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// W64: v_cmp_ne_i16 vcc, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x6b,0x7c,0xff,0x6f,0x05,0x30]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
 v_cmp_ne_i32 vcc_lo, v1, v2 quad_perm:[3,2,1,0]
@@ -4132,116 +5188,212 @@ v_cmp_ne_i32 vcc, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:
 // W64: v_cmp_ne_i32 vcc, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x8b,0x7c,0xff,0x6f,0x05,0x30]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc_lo, v1, v2 quad_perm:[3,2,1,0]
-// W32: v_cmp_ne_u16 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x1b,0x00,0xff]
+v_cmp_ne_u16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0]
+// W32: v_cmp_ne_u16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x1b,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc_lo, v1, v2 quad_perm:[0,1,2,3]
-// W32: v_cmp_ne_u16 vcc_lo, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0xe4,0x00,0xff]
+v_cmp_ne_u16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3]
+// W32: v_cmp_ne_u16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0xe4,0x00,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc_lo, v1, v2 row_mirror
-// W32: v_cmp_ne_u16 vcc_lo, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x40,0x01,0xff]
+v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_mirror
+// W32: v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x40,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc_lo, v1, v2 row_half_mirror
-// W32: v_cmp_ne_u16 vcc_lo, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x41,0x01,0xff]
+v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_half_mirror
+// W32: v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x41,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc_lo, v1, v2 row_shl:1
-// W32: v_cmp_ne_u16 vcc_lo, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x01,0x01,0xff]
+v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_shl:1
+// W32: v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x01,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc_lo, v1, v2 row_shl:15
-// W32: v_cmp_ne_u16 vcc_lo, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x0f,0x01,0xff]
+v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_shl:15
+// W32: v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x0f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc_lo, v1, v2 row_shr:1
-// W32: v_cmp_ne_u16 vcc_lo, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x11,0x01,0xff]
+v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_shr:1
+// W32: v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x11,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc_lo, v1, v2 row_shr:15
-// W32: v_cmp_ne_u16 vcc_lo, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x1f,0x01,0xff]
+v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_shr:15
+// W32: v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x1f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc_lo, v1, v2 row_ror:1
-// W32: v_cmp_ne_u16 vcc_lo, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x21,0x01,0xff]
+v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_ror:1
+// W32: v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x21,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc_lo, v1, v2 row_ror:15
-// W32: v_cmp_ne_u16 vcc_lo, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x2f,0x01,0xff]
+v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_ror:15
+// W32: v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x2f,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W32: v_cmp_ne_u16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x50,0x01,0xff]
+v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x50,0x01,0xff]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W32: v_cmp_ne_u16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x5f,0x01,0x01]
+v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W32: v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x5f,0x01,0x01]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W32: v_cmp_ne_u16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x60,0x09,0x13]
+v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1
+// W32: v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x60,0x09,0x13]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
-// W32: v_cmp_ne_u16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x7a,0x7c,0x7f,0x6f,0x05,0x30]
+v_cmp_ne_u16 vcc_lo, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1
+// W32: v_cmp_ne_u16 vcc_lo, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x7a,0x7c,0x7f,0x6f,0x05,0x30]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc, v1, v2 quad_perm:[3,2,1,0]
-// W64: v_cmp_ne_u16 vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x1b,0x00,0xff]
+v_cmp_ne_u16 vcc, v1.l, v2.l quad_perm:[3,2,1,0]
+// W64: v_cmp_ne_u16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc, v1.l, v2.l quad_perm:[0,1,2,3]
+// W64: v_cmp_ne_u16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0xe4,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc, v1.l, v2.l row_mirror
+// W64: v_cmp_ne_u16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x40,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc, v1.l, v2.l row_half_mirror
+// W64: v_cmp_ne_u16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x41,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc, v1.l, v2.l row_shl:1
+// W64: v_cmp_ne_u16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x01,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc, v1.l, v2.l row_shl:15
+// W64: v_cmp_ne_u16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x0f,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc, v1.l, v2.l row_shr:1
+// W64: v_cmp_ne_u16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x11,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc, v1.l, v2.l row_shr:15
+// W64: v_cmp_ne_u16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x1f,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc, v1.l, v2.l row_ror:1
+// W64: v_cmp_ne_u16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x21,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc, v1, v2 quad_perm:[0,1,2,3]
-// W64: v_cmp_ne_u16 vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0xe4,0x00,0xff]
+v_cmp_ne_u16 vcc, v1.l, v2.l row_ror:15
+// W64: v_cmp_ne_u16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x2f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc, v1, v2 row_mirror
-// W64: v_cmp_ne_u16 vcc, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x40,0x01,0xff]
+v_cmp_ne_u16 vcc, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ne_u16 vcc, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x50,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc, v1, v2 row_half_mirror
-// W64: v_cmp_ne_u16 vcc, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x41,0x01,0xff]
+v_cmp_ne_u16 vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// W64: v_cmp_ne_u16 vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x5f,0x01,0x01]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc, v1, v2 row_shl:1
-// W64: v_cmp_ne_u16 vcc, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x01,0x01,0xff]
+v_cmp_ne_u16 vcc, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1
+// W64: v_cmp_ne_u16 vcc, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x60,0x09,0x13]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc, v1, v2 row_shl:15
-// W64: v_cmp_ne_u16 vcc, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x0f,0x01,0xff]
+v_cmp_ne_u16 vcc, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1
+// W64: v_cmp_ne_u16 vcc, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x7a,0x7c,0x7f,0x6f,0x05,0x30]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc, v1, v2 row_shr:1
-// W64: v_cmp_ne_u16 vcc, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x11,0x01,0xff]
+v_cmp_ne_u16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ne_u16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ne_u16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ne_u16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0xe4,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ne_u16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0xe4,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x40,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ne_u16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x40,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x41,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ne_u16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x41,0x01,0xff]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x01,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ne_u16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x01,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc, v1, v2 row_shr:15
-// W64: v_cmp_ne_u16 vcc, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x1f,0x01,0xff]
+v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x0f,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ne_u16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x0f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc, v1, v2 row_ror:1
-// W64: v_cmp_ne_u16 vcc, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x21,0x01,0xff]
+v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x11,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ne_u16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x11,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc, v1, v2 row_ror:15
-// W64: v_cmp_ne_u16 vcc, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x2f,0x01,0xff]
+v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x1f,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ne_u16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x1f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// W64: v_cmp_ne_u16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x50,0x01,0xff]
+v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x21,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ne_u16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x21,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// W64: v_cmp_ne_u16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x5f,0x01,0x01]
+v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf
+// W32: v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x2f,0x01,0xff]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf
+// W64: v_cmp_ne_u16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x2f,0x01,0xff]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// W64: v_cmp_ne_u16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x60,0x09,0x13]
+v_cmp_ne_u16 vcc_lo, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W32: v_cmp_ne_u16 vcc_lo, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x7b,0x7c,0x81,0x60,0x09,0x13]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// W64: v_cmp_ne_u16 vcc, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x7b,0x7c,0x81,0x60,0x09,0x13]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
-// W64: v_cmp_ne_u16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x7a,0x7c,0x7f,0x6f,0x05,0x30]
+v_cmp_ne_u16 vcc_lo, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// W32: v_cmp_ne_u16 vcc_lo, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x7b,0x7c,0xff,0x6f,0x05,0x30]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// W64: v_cmp_ne_u16 vcc, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0x7b,0x7c,0xff,0x6f,0x05,0x30]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
 v_cmp_ne_u32 vcc_lo, v1, v2 quad_perm:[3,2,1,0]
diff --git a/llvm/test/MC/AMDGPU/gfx12_asm_vopc_dpp8.s b/llvm/test/MC/AMDGPU/gfx12_asm_vopc_dpp8.s
index 74147956392054..4942cf25e0458d 100644
--- a/llvm/test/MC/AMDGPU/gfx12_asm_vopc_dpp8.s
+++ b/llvm/test/MC/AMDGPU/gfx12_asm_vopc_dpp8.s
@@ -100,28 +100,44 @@ v_cmp_eq_f32 vcc, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:0
 // W64: v_cmp_eq_f32 vcc, v255, v255 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x25,0x7c,0xff,0x00,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_eq_i16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x64,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_eq_i16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_eq_i16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x64,0x7c,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W32: v_cmp_eq_i16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x64,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_eq_i16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_eq_i16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x64,0x7c,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:0
-// W32: v_cmp_eq_i16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x64,0x7c,0x7f,0x00,0x00,0x00]
+v_cmp_eq_i16 vcc_lo, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0]
+// W32: v_cmp_eq_i16 vcc_lo, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x64,0x7c,0x7f,0x00,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_eq_i16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x64,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_eq_i16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_eq_i16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x64,0x7c,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W64: v_cmp_eq_i16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x64,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_eq_i16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W64: v_cmp_eq_i16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x64,0x7c,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:0
-// W64: v_cmp_eq_i16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x64,0x7c,0x7f,0x00,0x00,0x00]
+v_cmp_eq_i16 vcc, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0]
+// W64: v_cmp_eq_i16 vcc, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x64,0x7c,0x7f,0x00,0x00,0x00]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc_lo, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_eq_i16 vcc_lo, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x65,0x7c,0x81,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W64: v_cmp_eq_i16 vcc, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x65,0x7c,0x81,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc_lo, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:0
+// W32: v_cmp_eq_i16 vcc_lo, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x65,0x7c,0xff,0x00,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_i16 vcc, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:0
+// W64: v_cmp_eq_i16 vcc, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x65,0x7c,0xff,0x00,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
 v_cmp_eq_i32 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
@@ -148,28 +164,44 @@ v_cmp_eq_i32 vcc, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:0
 // W64: v_cmp_eq_i32 vcc, v255, v255 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x85,0x7c,0xff,0x00,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_eq_u16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x74,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_eq_u16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_eq_u16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x74,0x7c,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W32: v_cmp_eq_u16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x74,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_eq_u16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_eq_u16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x74,0x7c,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:0
-// W32: v_cmp_eq_u16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x74,0x7c,0x7f,0x00,0x00,0x00]
+v_cmp_eq_u16 vcc_lo, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0]
+// W32: v_cmp_eq_u16 vcc_lo, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x74,0x7c,0x7f,0x00,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_eq_u16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x74,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_eq_u16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_eq_u16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x74,0x7c,0x01,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W64: v_cmp_eq_u16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x74,0x7c,0x01,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0]
+// W64: v_cmp_eq_u16 vcc, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x74,0x7c,0x7f,0x00,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W64: v_cmp_eq_u16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x74,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_eq_u16 vcc_lo, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_eq_u16 vcc_lo, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x75,0x7c,0x81,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W64: v_cmp_eq_u16 vcc, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x75,0x7c,0x81,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_u16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:0
-// W64: v_cmp_eq_u16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x74,0x7c,0x7f,0x00,0x00,0x00]
+v_cmp_eq_u16 vcc_lo, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:0
+// W32: v_cmp_eq_u16 vcc_lo, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x75,0x7c,0xff,0x00,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_eq_u16 vcc, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:0
+// W64: v_cmp_eq_u16 vcc, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x75,0x7c,0xff,0x00,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
 v_cmp_eq_u32 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
@@ -244,28 +276,44 @@ v_cmp_ge_f32 vcc, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:0
 // W64: v_cmp_ge_f32 vcc, v255, v255 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x2d,0x7c,0xff,0x00,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_ge_i16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x6c,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_ge_i16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_ge_i16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x6c,0x7c,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W32: v_cmp_ge_i16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x6c,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_ge_i16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_ge_i16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x6c,0x7c,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:0
-// W32: v_cmp_ge_i16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x6c,0x7c,0x7f,0x00,0x00,0x00]
+v_cmp_ge_i16 vcc_lo, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0]
+// W32: v_cmp_ge_i16 vcc_lo, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x6c,0x7c,0x7f,0x00,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_ge_i16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x6c,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_ge_i16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_ge_i16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x6c,0x7c,0x01,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W64: v_cmp_ge_i16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x6c,0x7c,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W64: v_cmp_ge_i16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x6c,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_ge_i16 vcc, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0]
+// W64: v_cmp_ge_i16 vcc, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x6c,0x7c,0x7f,0x00,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:0
-// W64: v_cmp_ge_i16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x6c,0x7c,0x7f,0x00,0x00,0x00]
+v_cmp_ge_i16 vcc_lo, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_ge_i16 vcc_lo, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x6d,0x7c,0x81,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W64: v_cmp_ge_i16 vcc, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x6d,0x7c,0x81,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc_lo, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:0
+// W32: v_cmp_ge_i16 vcc_lo, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x6d,0x7c,0xff,0x00,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_i16 vcc, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:0
+// W64: v_cmp_ge_i16 vcc, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x6d,0x7c,0xff,0x00,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
 v_cmp_ge_i32 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
@@ -292,28 +340,44 @@ v_cmp_ge_i32 vcc, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:0
 // W64: v_cmp_ge_i32 vcc, v255, v255 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x8d,0x7c,0xff,0x00,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_ge_u16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x7c,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_ge_u16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_ge_u16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x7c,0x7c,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W32: v_cmp_ge_u16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x7c,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_ge_u16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_ge_u16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x7c,0x7c,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:0
-// W32: v_cmp_ge_u16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x7c,0x7c,0x7f,0x00,0x00,0x00]
+v_cmp_ge_u16 vcc_lo, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0]
+// W32: v_cmp_ge_u16 vcc_lo, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x7c,0x7c,0x7f,0x00,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_ge_u16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x7c,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_ge_u16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_ge_u16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x7c,0x7c,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W64: v_cmp_ge_u16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x7c,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_ge_u16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W64: v_cmp_ge_u16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x7c,0x7c,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_u16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:0
-// W64: v_cmp_ge_u16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x7c,0x7c,0x7f,0x00,0x00,0x00]
+v_cmp_ge_u16 vcc, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0]
+// W64: v_cmp_ge_u16 vcc, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x7c,0x7c,0x7f,0x00,0x00,0x00]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc_lo, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_ge_u16 vcc_lo, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x7d,0x7c,0x81,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W64: v_cmp_ge_u16 vcc, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x7d,0x7c,0x81,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc_lo, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:0
+// W32: v_cmp_ge_u16 vcc_lo, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x7d,0x7c,0xff,0x00,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ge_u16 vcc, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:0
+// W64: v_cmp_ge_u16 vcc, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x7d,0x7c,0xff,0x00,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
 v_cmp_ge_u32 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
@@ -388,28 +452,44 @@ v_cmp_gt_f32 vcc, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:0
 // W64: v_cmp_gt_f32 vcc, v255, v255 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x29,0x7c,0xff,0x00,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_gt_i16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x68,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_gt_i16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_gt_i16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x68,0x7c,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W32: v_cmp_gt_i16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x68,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_gt_i16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_gt_i16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x68,0x7c,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:0
-// W32: v_cmp_gt_i16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x68,0x7c,0x7f,0x00,0x00,0x00]
+v_cmp_gt_i16 vcc_lo, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0]
+// W32: v_cmp_gt_i16 vcc_lo, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x68,0x7c,0x7f,0x00,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_gt_i16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x68,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_gt_i16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_gt_i16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x68,0x7c,0x01,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W64: v_cmp_gt_i16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x68,0x7c,0x01,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0]
+// W64: v_cmp_gt_i16 vcc, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x68,0x7c,0x7f,0x00,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W64: v_cmp_gt_i16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x68,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_gt_i16 vcc_lo, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_gt_i16 vcc_lo, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x69,0x7c,0x81,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W64: v_cmp_gt_i16 vcc, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x69,0x7c,0x81,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:0
-// W64: v_cmp_gt_i16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x68,0x7c,0x7f,0x00,0x00,0x00]
+v_cmp_gt_i16 vcc_lo, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:0
+// W32: v_cmp_gt_i16 vcc_lo, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x69,0x7c,0xff,0x00,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_i16 vcc, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:0
+// W64: v_cmp_gt_i16 vcc, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x69,0x7c,0xff,0x00,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
 v_cmp_gt_i32 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
@@ -436,28 +516,44 @@ v_cmp_gt_i32 vcc, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:0
 // W64: v_cmp_gt_i32 vcc, v255, v255 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x89,0x7c,0xff,0x00,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_gt_u16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x78,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_gt_u16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_gt_u16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x78,0x7c,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W32: v_cmp_gt_u16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x78,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_gt_u16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_gt_u16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x78,0x7c,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:0
-// W32: v_cmp_gt_u16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x78,0x7c,0x7f,0x00,0x00,0x00]
+v_cmp_gt_u16 vcc_lo, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0]
+// W32: v_cmp_gt_u16 vcc_lo, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x78,0x7c,0x7f,0x00,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_gt_u16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x78,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_gt_u16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_gt_u16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x78,0x7c,0x01,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W64: v_cmp_gt_u16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x78,0x7c,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W64: v_cmp_gt_u16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x78,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_gt_u16 vcc, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0]
+// W64: v_cmp_gt_u16 vcc, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x78,0x7c,0x7f,0x00,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_u16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:0
-// W64: v_cmp_gt_u16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x78,0x7c,0x7f,0x00,0x00,0x00]
+v_cmp_gt_u16 vcc_lo, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_gt_u16 vcc_lo, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x79,0x7c,0x81,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W64: v_cmp_gt_u16 vcc, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x79,0x7c,0x81,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc_lo, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:0
+// W32: v_cmp_gt_u16 vcc_lo, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x79,0x7c,0xff,0x00,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_u16 vcc, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:0
+// W64: v_cmp_gt_u16 vcc, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x79,0x7c,0xff,0x00,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
 v_cmp_gt_u32 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
@@ -532,28 +628,44 @@ v_cmp_le_f32 vcc, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:0
 // W64: v_cmp_le_f32 vcc, v255, v255 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x27,0x7c,0xff,0x00,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_le_i16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x66,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_le_i16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_le_i16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x66,0x7c,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W32: v_cmp_le_i16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x66,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_le_i16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_le_i16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x66,0x7c,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:0
-// W32: v_cmp_le_i16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x66,0x7c,0x7f,0x00,0x00,0x00]
+v_cmp_le_i16 vcc_lo, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0]
+// W32: v_cmp_le_i16 vcc_lo, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x66,0x7c,0x7f,0x00,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_le_i16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x66,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_le_i16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_le_i16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x66,0x7c,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W64: v_cmp_le_i16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x66,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_le_i16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W64: v_cmp_le_i16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x66,0x7c,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:0
-// W64: v_cmp_le_i16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x66,0x7c,0x7f,0x00,0x00,0x00]
+v_cmp_le_i16 vcc, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0]
+// W64: v_cmp_le_i16 vcc, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x66,0x7c,0x7f,0x00,0x00,0x00]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc_lo, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_le_i16 vcc_lo, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x67,0x7c,0x81,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W64: v_cmp_le_i16 vcc, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x67,0x7c,0x81,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc_lo, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:0
+// W32: v_cmp_le_i16 vcc_lo, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x67,0x7c,0xff,0x00,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_i16 vcc, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:0
+// W64: v_cmp_le_i16 vcc, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x67,0x7c,0xff,0x00,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
 v_cmp_le_i32 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
@@ -580,28 +692,44 @@ v_cmp_le_i32 vcc, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:0
 // W64: v_cmp_le_i32 vcc, v255, v255 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x87,0x7c,0xff,0x00,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_le_u16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x76,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_le_u16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_le_u16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x76,0x7c,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W32: v_cmp_le_u16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x76,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_le_u16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_le_u16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x76,0x7c,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:0
-// W32: v_cmp_le_u16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x76,0x7c,0x7f,0x00,0x00,0x00]
+v_cmp_le_u16 vcc_lo, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0]
+// W32: v_cmp_le_u16 vcc_lo, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x76,0x7c,0x7f,0x00,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_le_u16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x76,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_le_u16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_le_u16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x76,0x7c,0x01,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W64: v_cmp_le_u16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x76,0x7c,0x01,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0]
+// W64: v_cmp_le_u16 vcc, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x76,0x7c,0x7f,0x00,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W64: v_cmp_le_u16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x76,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_le_u16 vcc_lo, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_le_u16 vcc_lo, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x77,0x7c,0x81,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W64: v_cmp_le_u16 vcc, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x77,0x7c,0x81,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:0
-// W64: v_cmp_le_u16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x76,0x7c,0x7f,0x00,0x00,0x00]
+v_cmp_le_u16 vcc_lo, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:0
+// W32: v_cmp_le_u16 vcc_lo, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x77,0x7c,0xff,0x00,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_le_u16 vcc, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:0
+// W64: v_cmp_le_u16 vcc, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x77,0x7c,0xff,0x00,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
 v_cmp_le_u32 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
@@ -740,28 +868,44 @@ v_cmp_lt_f32 vcc, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:0
 // W64: v_cmp_lt_f32 vcc, v255, v255 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x23,0x7c,0xff,0x00,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_lt_i16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x62,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_lt_i16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_lt_i16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x62,0x7c,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W32: v_cmp_lt_i16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x62,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_lt_i16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_lt_i16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x62,0x7c,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:0
-// W32: v_cmp_lt_i16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x62,0x7c,0x7f,0x00,0x00,0x00]
+v_cmp_lt_i16 vcc_lo, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0]
+// W32: v_cmp_lt_i16 vcc_lo, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x62,0x7c,0x7f,0x00,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_lt_i16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x62,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_lt_i16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_lt_i16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x62,0x7c,0x01,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W64: v_cmp_lt_i16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x62,0x7c,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W64: v_cmp_lt_i16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x62,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_lt_i16 vcc, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0]
+// W64: v_cmp_lt_i16 vcc, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x62,0x7c,0x7f,0x00,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_i16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:0
-// W64: v_cmp_lt_i16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x62,0x7c,0x7f,0x00,0x00,0x00]
+v_cmp_lt_i16 vcc_lo, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_lt_i16 vcc_lo, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x63,0x7c,0x81,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W64: v_cmp_lt_i16 vcc, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x63,0x7c,0x81,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc_lo, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:0
+// W32: v_cmp_lt_i16 vcc_lo, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x63,0x7c,0xff,0x00,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_i16 vcc, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:0
+// W64: v_cmp_lt_i16 vcc, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x63,0x7c,0xff,0x00,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
 v_cmp_lt_i32 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
@@ -788,28 +932,44 @@ v_cmp_lt_i32 vcc, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:0
 // W64: v_cmp_lt_i32 vcc, v255, v255 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x83,0x7c,0xff,0x00,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_lt_u16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x72,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_lt_u16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_lt_u16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x72,0x7c,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W32: v_cmp_lt_u16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x72,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_lt_u16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_lt_u16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x72,0x7c,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:0
-// W32: v_cmp_lt_u16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x72,0x7c,0x7f,0x00,0x00,0x00]
+v_cmp_lt_u16 vcc_lo, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0]
+// W32: v_cmp_lt_u16 vcc_lo, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x72,0x7c,0x7f,0x00,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_lt_u16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x72,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_lt_u16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_lt_u16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x72,0x7c,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W64: v_cmp_lt_u16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x72,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_lt_u16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W64: v_cmp_lt_u16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x72,0x7c,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lt_u16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:0
-// W64: v_cmp_lt_u16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x72,0x7c,0x7f,0x00,0x00,0x00]
+v_cmp_lt_u16 vcc, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0]
+// W64: v_cmp_lt_u16 vcc, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x72,0x7c,0x7f,0x00,0x00,0x00]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc_lo, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_lt_u16 vcc_lo, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x73,0x7c,0x81,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W64: v_cmp_lt_u16 vcc, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x73,0x7c,0x81,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc_lo, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:0
+// W32: v_cmp_lt_u16 vcc_lo, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x73,0x7c,0xff,0x00,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_lt_u16 vcc, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:0
+// W64: v_cmp_lt_u16 vcc, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x73,0x7c,0xff,0x00,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
 v_cmp_lt_u32 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
@@ -836,28 +996,44 @@ v_cmp_lt_u32 vcc, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:0
 // W64: v_cmp_lt_u32 vcc, v255, v255 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x93,0x7c,0xff,0x00,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_ne_i16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x6a,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_ne_i16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_ne_i16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x6a,0x7c,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W32: v_cmp_ne_i16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x6a,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_ne_i16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_ne_i16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x6a,0x7c,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:0
-// W32: v_cmp_ne_i16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x6a,0x7c,0x7f,0x00,0x00,0x00]
+v_cmp_ne_i16 vcc_lo, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0]
+// W32: v_cmp_ne_i16 vcc_lo, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x6a,0x7c,0x7f,0x00,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_ne_i16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x6a,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_ne_i16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_ne_i16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x6a,0x7c,0x01,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W64: v_cmp_ne_i16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x6a,0x7c,0x01,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0]
+// W64: v_cmp_ne_i16 vcc, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x6a,0x7c,0x7f,0x00,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W64: v_cmp_ne_i16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x6a,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_ne_i16 vcc_lo, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_ne_i16 vcc_lo, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x6b,0x7c,0x81,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W64: v_cmp_ne_i16 vcc, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x6b,0x7c,0x81,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_i16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:0
-// W64: v_cmp_ne_i16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x6a,0x7c,0x7f,0x00,0x00,0x00]
+v_cmp_ne_i16 vcc_lo, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:0
+// W32: v_cmp_ne_i16 vcc_lo, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x6b,0x7c,0xff,0x00,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_i16 vcc, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:0
+// W64: v_cmp_ne_i16 vcc, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x6b,0x7c,0xff,0x00,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
 v_cmp_ne_i32 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
@@ -884,28 +1060,44 @@ v_cmp_ne_i32 vcc, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:0
 // W64: v_cmp_ne_i32 vcc, v255, v255 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x8b,0x7c,0xff,0x00,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_ne_u16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x7a,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_ne_u16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_ne_u16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x7a,0x7c,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W32: v_cmp_ne_u16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x7a,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_ne_u16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_ne_u16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x7a,0x7c,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:0
-// W32: v_cmp_ne_u16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x7a,0x7c,0x7f,0x00,0x00,0x00]
+v_cmp_ne_u16 vcc_lo, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0]
+// W32: v_cmp_ne_u16 vcc_lo, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x7a,0x7c,0x7f,0x00,0x00,0x00]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_ne_u16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x7a,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_ne_u16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_ne_u16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x7a,0x7c,0x01,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W64: v_cmp_ne_u16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x7a,0x7c,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1
-// W64: v_cmp_ne_u16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x7a,0x7c,0x01,0x77,0x39,0x05]
+v_cmp_ne_u16 vcc, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0]
+// W64: v_cmp_ne_u16 vcc, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x7a,0x7c,0x7f,0x00,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ne_u16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:0
-// W64: v_cmp_ne_u16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x7a,0x7c,0x7f,0x00,0x00,0x00]
+v_cmp_ne_u16 vcc_lo, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W32: v_cmp_ne_u16 vcc_lo, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x7b,0x7c,0x81,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1
+// W64: v_cmp_ne_u16 vcc, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x7b,0x7c,0x81,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc_lo, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:0
+// W32: v_cmp_ne_u16 vcc_lo, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x7b,0x7c,0xff,0x00,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_ne_u16 vcc, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:0
+// W64: v_cmp_ne_u16 vcc, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0xfe,0x7b,0x7c,0xff,0x00,0x00,0x00]
 // W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
 v_cmp_ne_u32 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0]
diff --git a/llvm/test/MC/AMDGPU/gfx12_asm_vopc_t16_err.s b/llvm/test/MC/AMDGPU/gfx12_asm_vopc_t16_err.s
index 8944a76fcc8018..474f6ab3df9ee2 100644
--- a/llvm/test/MC/AMDGPU/gfx12_asm_vopc_t16_err.s
+++ b/llvm/test/MC/AMDGPU/gfx12_asm_vopc_t16_err.s
@@ -1,3 +1,4 @@
+// NOTE: Assertions have been autogenerated by utils/update_mc_test_checks.py UTC_ARGS: --sort --version 5
 ; NOTE: Assertions have been autogenerated by utils/update_mc_test_checks.py UTC_ARGS: --sort --version 5
 // RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1200 -mattr=+wavefrontsize64,+real-true16 -show-encoding %s 2>&1 | FileCheck --check-prefix=GFX12 --implicit-check-not=error %s
 
@@ -124,137 +125,269 @@ v_cmp_eq_f16_e32 vcc_lo, vcc_hi, v255
 v_cmp_eq_f16_e32 vcc_lo, vcc_lo, v255
 // GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16_e32 vcc, v1, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_eq_i16_e32 vcc, v1.h, v255.h
+// GFX12: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_eq_i16_e32 vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
+v_cmp_eq_i16_e32 vcc, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_eq_i16_e32 vcc, v1, v255 quad_perm:[3,2,1,0]
-// GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
+v_cmp_eq_i16_e32 vcc, v1.h, v255.h quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_eq_i16_e32 vcc, v127, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_eq_i16_e32 vcc, v1.l, v255.l
+// GFX12: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_eq_i16_e32 vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
+v_cmp_eq_i16_e32 vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_eq_i16_e32 vcc, v127, v255 quad_perm:[3,2,1,0]
-// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
+v_cmp_eq_i16_e32 vcc, v1.l, v255.l quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_eq_i16_e32 vcc, v128, v2
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_eq_i16_e32 vcc, v127.h, v255.h
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_eq_i16_e32 vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
+v_cmp_eq_i16_e32 vcc, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_eq_i16_e32 vcc, v128, v2 quad_perm:[3,2,1,0]
-// GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
+v_cmp_eq_i16_e32 vcc, v127.h, v255.h quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_eq_i16_e32 vcc, vcc_hi, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_eq_i16_e32 vcc, v127.l, v255.l
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_eq_i16_e32 vcc, vcc_lo, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_eq_i16_e32 vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_eq_i16_e32 vcc_lo, v1, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_eq_i16_e32 vcc, v127.l, v255.l quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_eq_i16_e32 vcc_lo, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX12: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_eq_i16_e32 vcc, v128.h, v2.h
+// GFX12: :[[@LINE-1]]:23: error: invalid operand for instruction
 
-v_cmp_eq_i16_e32 vcc_lo, v1, v255 quad_perm:[3,2,1,0]
-// GFX12: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_eq_i16_e32 vcc, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:23: error: invalid operand for instruction
 
-v_cmp_eq_i16_e32 vcc_lo, v127, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_eq_i16_e32 vcc, v128.h, v2.h quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:23: error: invalid operand for instruction
 
-v_cmp_eq_i16_e32 vcc_lo, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX12: :[[@LINE-1]]:37: error: invalid operand for instruction
+v_cmp_eq_i16_e32 vcc, v128.l, v2.l
+// GFX12: :[[@LINE-1]]:23: error: invalid operand for instruction
 
-v_cmp_eq_i16_e32 vcc_lo, v127, v255 quad_perm:[3,2,1,0]
-// GFX12: :[[@LINE-1]]:37: error: invalid operand for instruction
+v_cmp_eq_i16_e32 vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:23: error: invalid operand for instruction
 
-v_cmp_eq_i16_e32 vcc_lo, v128, v2
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_eq_i16_e32 vcc, v128.l, v2.l quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:23: error: invalid operand for instruction
 
-v_cmp_eq_i16_e32 vcc_lo, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// GFX12: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_eq_i16_e32 vcc, vcc_hi, v255.h
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_eq_i16_e32 vcc_lo, v128, v2 quad_perm:[3,2,1,0]
-// GFX12: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_eq_i16_e32 vcc, vcc_hi, v255.l
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_eq_i16_e32 vcc_lo, vcc_hi, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_eq_i16_e32 vcc, vcc_lo, v255.h
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_eq_i16_e32 vcc_lo, vcc_lo, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_eq_i16_e32 vcc, vcc_lo, v255.l
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_eq_u16_e32 vcc, v1, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_eq_i16_e32 vcc_lo, v1.h, v255.h
+// GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_eq_u16_e32 vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
+v_cmp_eq_i16_e32 vcc_lo, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
 // GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_eq_u16_e32 vcc, v1, v255 quad_perm:[3,2,1,0]
+v_cmp_eq_i16_e32 vcc_lo, v1.h, v255.h quad_perm:[3,2,1,0]
 // GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_eq_u16_e32 vcc, v127, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_eq_i16_e32 vcc_lo, v1.l, v255.l
+// GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_eq_u16_e32 vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
+v_cmp_eq_i16_e32 vcc_lo, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
+
+v_cmp_eq_i16_e32 vcc_lo, v1.l, v255.l quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
+
+v_cmp_eq_i16_e32 vcc_lo, v127.h, v255.h
 // GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_eq_u16_e32 vcc, v127, v255 quad_perm:[3,2,1,0]
+v_cmp_eq_i16_e32 vcc_lo, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
 // GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_eq_u16_e32 vcc, v128, v2
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_eq_i16_e32 vcc_lo, v127.h, v255.h quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_eq_i16_e32 vcc_lo, v127.l, v255.l
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_eq_i16_e32 vcc_lo, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_eq_i16_e32 vcc_lo, v127.l, v255.l quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_eq_i16_e32 vcc_lo, v128.h, v2.h
+// GFX12: :[[@LINE-1]]:26: error: invalid operand for instruction
+
+v_cmp_eq_i16_e32 vcc_lo, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:26: error: invalid operand for instruction
 
-v_cmp_eq_u16_e32 vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
+v_cmp_eq_i16_e32 vcc_lo, v128.h, v2.h quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:26: error: invalid operand for instruction
+
+v_cmp_eq_i16_e32 vcc_lo, v128.l, v2.l
+// GFX12: :[[@LINE-1]]:26: error: invalid operand for instruction
+
+v_cmp_eq_i16_e32 vcc_lo, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:26: error: invalid operand for instruction
+
+v_cmp_eq_i16_e32 vcc_lo, v128.l, v2.l quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:26: error: invalid operand for instruction
+
+v_cmp_eq_i16_e32 vcc_lo, vcc_hi, v255.h
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_eq_i16_e32 vcc_lo, vcc_hi, v255.l
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_eq_i16_e32 vcc_lo, vcc_lo, v255.h
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_eq_i16_e32 vcc_lo, vcc_lo, v255.l
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_eq_u16_e32 vcc, v1.h, v255.h
+// GFX12: :[[@LINE-1]]:29: error: invalid operand for instruction
+
+v_cmp_eq_u16_e32 vcc, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:29: error: invalid operand for instruction
+
+v_cmp_eq_u16_e32 vcc, v1.h, v255.h quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:29: error: invalid operand for instruction
+
+v_cmp_eq_u16_e32 vcc, v1.l, v255.l
+// GFX12: :[[@LINE-1]]:29: error: invalid operand for instruction
+
+v_cmp_eq_u16_e32 vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:29: error: invalid operand for instruction
+
+v_cmp_eq_u16_e32 vcc, v1.l, v255.l quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:29: error: invalid operand for instruction
+
+v_cmp_eq_u16_e32 vcc, v127.h, v255.h
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_eq_u16_e32 vcc, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_eq_u16_e32 vcc, v127.h, v255.h quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_eq_u16_e32 vcc, v127.l, v255.l
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_eq_u16_e32 vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_eq_u16_e32 vcc, v127.l, v255.l quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_eq_u16_e32 vcc, v128.h, v2.h
+// GFX12: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_cmp_eq_u16_e32 vcc, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_cmp_eq_u16_e32 vcc, v128.h, v2.h quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_cmp_eq_u16_e32 vcc, v128.l, v2.l
+// GFX12: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_cmp_eq_u16_e32 vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_cmp_eq_u16_e32 vcc, v128.l, v2.l quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_cmp_eq_u16_e32 vcc, vcc_hi, v255.h
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_eq_u16_e32 vcc, vcc_hi, v255.l
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_eq_u16_e32 vcc, vcc_lo, v255.h
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_eq_u16_e32 vcc, vcc_lo, v255.l
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_eq_u16_e32 vcc_lo, v1.h, v255.h
 // GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_eq_u16_e32 vcc, v128, v2 quad_perm:[3,2,1,0]
+v_cmp_eq_u16_e32 vcc_lo, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
 // GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_eq_u16_e32 vcc, vcc_hi, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_eq_u16_e32 vcc_lo, v1.h, v255.h quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_eq_u16_e32 vcc, vcc_lo, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_eq_u16_e32 vcc_lo, v1.l, v255.l
+// GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_eq_u16_e32 vcc_lo, v1, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_eq_u16_e32 vcc_lo, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_eq_u16_e32 vcc_lo, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX12: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_eq_u16_e32 vcc_lo, v1.l, v255.l quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_eq_u16_e32 vcc_lo, v1, v255 quad_perm:[3,2,1,0]
-// GFX12: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_eq_u16_e32 vcc_lo, v127.h, v255.h
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_eq_u16_e32 vcc_lo, v127, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_eq_u16_e32 vcc_lo, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_eq_u16_e32 vcc_lo, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX12: :[[@LINE-1]]:37: error: invalid operand for instruction
+v_cmp_eq_u16_e32 vcc_lo, v127.h, v255.h quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_eq_u16_e32 vcc_lo, v127, v255 quad_perm:[3,2,1,0]
-// GFX12: :[[@LINE-1]]:37: error: invalid operand for instruction
+v_cmp_eq_u16_e32 vcc_lo, v127.l, v255.l
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_eq_u16_e32 vcc_lo, v128, v2
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_eq_u16_e32 vcc_lo, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_eq_u16_e32 vcc_lo, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// GFX12: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_eq_u16_e32 vcc_lo, v127.l, v255.l quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_eq_u16_e32 vcc_lo, v128, v2 quad_perm:[3,2,1,0]
-// GFX12: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_eq_u16_e32 vcc_lo, v128.h, v2.h
+// GFX12: :[[@LINE-1]]:26: error: invalid operand for instruction
 
-v_cmp_eq_u16_e32 vcc_lo, vcc_hi, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_eq_u16_e32 vcc_lo, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:26: error: invalid operand for instruction
 
-v_cmp_eq_u16_e32 vcc_lo, vcc_lo, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_eq_u16_e32 vcc_lo, v128.h, v2.h quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:26: error: invalid operand for instruction
+
+v_cmp_eq_u16_e32 vcc_lo, v128.l, v2.l
+// GFX12: :[[@LINE-1]]:26: error: invalid operand for instruction
+
+v_cmp_eq_u16_e32 vcc_lo, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:26: error: invalid operand for instruction
+
+v_cmp_eq_u16_e32 vcc_lo, v128.l, v2.l quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:26: error: invalid operand for instruction
+
+v_cmp_eq_u16_e32 vcc_lo, vcc_hi, v255.h
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_eq_u16_e32 vcc_lo, vcc_hi, v255.l
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_eq_u16_e32 vcc_lo, vcc_lo, v255.h
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_eq_u16_e32 vcc_lo, vcc_lo, v255.l
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
 
 v_cmp_ge_f16_e32 vcc, v1, v255
 // GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
@@ -322,146 +455,278 @@ v_cmp_ge_f16_e32 vcc_lo, vcc_hi, v255
 v_cmp_ge_f16_e32 vcc_lo, vcc_lo, v255
 // GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16_e32 vcc, v1, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ge_i16_e32 vcc, v1.h, v255.h
+// GFX12: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_ge_i16_e32 vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
+v_cmp_ge_i16_e32 vcc, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_ge_i16_e32 vcc, v1, v255 quad_perm:[3,2,1,0]
-// GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
+v_cmp_ge_i16_e32 vcc, v1.h, v255.h quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_ge_i16_e32 vcc, v127, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ge_i16_e32 vcc, v1.l, v255.l
+// GFX12: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_ge_i16_e32 vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
+v_cmp_ge_i16_e32 vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_ge_i16_e32 vcc, v127, v255 quad_perm:[3,2,1,0]
-// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
+v_cmp_ge_i16_e32 vcc, v1.l, v255.l quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_ge_i16_e32 vcc, v128, v2
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ge_i16_e32 vcc, v127.h, v255.h
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_ge_i16_e32 vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
+v_cmp_ge_i16_e32 vcc, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_ge_i16_e32 vcc, v128, v2 quad_perm:[3,2,1,0]
-// GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
+v_cmp_ge_i16_e32 vcc, v127.h, v255.h quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_ge_i16_e32 vcc, vcc_hi, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ge_i16_e32 vcc, v127.l, v255.l
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_ge_i16_e32 vcc, vcc_lo, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ge_i16_e32 vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_ge_i16_e32 vcc_lo, v1, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ge_i16_e32 vcc, v127.l, v255.l quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_ge_i16_e32 vcc_lo, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX12: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_ge_i16_e32 vcc, v128.h, v2.h
+// GFX12: :[[@LINE-1]]:23: error: invalid operand for instruction
 
-v_cmp_ge_i16_e32 vcc_lo, v1, v255 quad_perm:[3,2,1,0]
-// GFX12: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_ge_i16_e32 vcc, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:23: error: invalid operand for instruction
 
-v_cmp_ge_i16_e32 vcc_lo, v127, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ge_i16_e32 vcc, v128.h, v2.h quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:23: error: invalid operand for instruction
 
-v_cmp_ge_i16_e32 vcc_lo, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX12: :[[@LINE-1]]:37: error: invalid operand for instruction
+v_cmp_ge_i16_e32 vcc, v128.l, v2.l
+// GFX12: :[[@LINE-1]]:23: error: invalid operand for instruction
 
-v_cmp_ge_i16_e32 vcc_lo, v127, v255 quad_perm:[3,2,1,0]
-// GFX12: :[[@LINE-1]]:37: error: invalid operand for instruction
+v_cmp_ge_i16_e32 vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:23: error: invalid operand for instruction
 
-v_cmp_ge_i16_e32 vcc_lo, v128, v2
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ge_i16_e32 vcc, v128.l, v2.l quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:23: error: invalid operand for instruction
 
-v_cmp_ge_i16_e32 vcc_lo, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// GFX12: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_ge_i16_e32 vcc, vcc_hi, v255.h
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_ge_i16_e32 vcc_lo, v128, v2 quad_perm:[3,2,1,0]
-// GFX12: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_ge_i16_e32 vcc, vcc_hi, v255.l
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_ge_i16_e32 vcc_lo, vcc_hi, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ge_i16_e32 vcc, vcc_lo, v255.h
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_ge_i16_e32 vcc_lo, vcc_lo, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ge_i16_e32 vcc, vcc_lo, v255.l
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_ge_u16_e32 vcc, v1, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ge_i16_e32 vcc_lo, v1.h, v255.h
+// GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_ge_u16_e32 vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
+v_cmp_ge_i16_e32 vcc_lo, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
 // GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_ge_u16_e32 vcc, v1, v255 quad_perm:[3,2,1,0]
+v_cmp_ge_i16_e32 vcc_lo, v1.h, v255.h quad_perm:[3,2,1,0]
 // GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_ge_u16_e32 vcc, v127, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ge_i16_e32 vcc_lo, v1.l, v255.l
+// GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
+
+v_cmp_ge_i16_e32 vcc_lo, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
+
+v_cmp_ge_i16_e32 vcc_lo, v1.l, v255.l quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_ge_u16_e32 vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
+v_cmp_ge_i16_e32 vcc_lo, v127.h, v255.h
 // GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_ge_u16_e32 vcc, v127, v255 quad_perm:[3,2,1,0]
+v_cmp_ge_i16_e32 vcc_lo, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
 // GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_ge_u16_e32 vcc, v128, v2
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ge_i16_e32 vcc_lo, v127.h, v255.h quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_ge_u16_e32 vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
+v_cmp_ge_i16_e32 vcc_lo, v127.l, v255.l
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_ge_u16_e32 vcc, v128, v2 quad_perm:[3,2,1,0]
-// GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
+v_cmp_ge_i16_e32 vcc_lo, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_ge_u16_e32 vcc, vcc_hi, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ge_i16_e32 vcc_lo, v127.l, v255.l quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_ge_u16_e32 vcc, vcc_lo, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ge_i16_e32 vcc_lo, v128.h, v2.h
+// GFX12: :[[@LINE-1]]:26: error: invalid operand for instruction
 
-v_cmp_ge_u16_e32 vcc_lo, v1, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ge_i16_e32 vcc_lo, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:26: error: invalid operand for instruction
 
-v_cmp_ge_u16_e32 vcc_lo, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX12: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_ge_i16_e32 vcc_lo, v128.h, v2.h quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:26: error: invalid operand for instruction
 
-v_cmp_ge_u16_e32 vcc_lo, v1, v255 quad_perm:[3,2,1,0]
-// GFX12: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_ge_i16_e32 vcc_lo, v128.l, v2.l
+// GFX12: :[[@LINE-1]]:26: error: invalid operand for instruction
 
-v_cmp_ge_u16_e32 vcc_lo, v127, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ge_i16_e32 vcc_lo, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:26: error: invalid operand for instruction
 
-v_cmp_ge_u16_e32 vcc_lo, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX12: :[[@LINE-1]]:37: error: invalid operand for instruction
+v_cmp_ge_i16_e32 vcc_lo, v128.l, v2.l quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:26: error: invalid operand for instruction
 
-v_cmp_ge_u16_e32 vcc_lo, v127, v255 quad_perm:[3,2,1,0]
-// GFX12: :[[@LINE-1]]:37: error: invalid operand for instruction
+v_cmp_ge_i16_e32 vcc_lo, vcc_hi, v255.h
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_ge_u16_e32 vcc_lo, v128, v2
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ge_i16_e32 vcc_lo, vcc_hi, v255.l
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_ge_u16_e32 vcc_lo, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// GFX12: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_ge_i16_e32 vcc_lo, vcc_lo, v255.h
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_ge_u16_e32 vcc_lo, v128, v2 quad_perm:[3,2,1,0]
-// GFX12: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_ge_i16_e32 vcc_lo, vcc_lo, v255.l
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_ge_u16_e32 vcc_lo, vcc_hi, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ge_u16_e32 vcc, v1.h, v255.h
+// GFX12: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_ge_u16_e32 vcc_lo, vcc_lo, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ge_u16_e32 vcc, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_gt_f16_e32 vcc, v1, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ge_u16_e32 vcc, v1.h, v255.h quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_gt_f16_e32 vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
+v_cmp_ge_u16_e32 vcc, v1.l, v255.l
+// GFX12: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_gt_f16_e32 vcc, v1, v255 quad_perm:[3,2,1,0]
-// GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
+v_cmp_ge_u16_e32 vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:29: error: invalid operand for instruction
+
+v_cmp_ge_u16_e32 vcc, v1.l, v255.l quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:29: error: invalid operand for instruction
+
+v_cmp_ge_u16_e32 vcc, v127.h, v255.h
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_ge_u16_e32 vcc, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_ge_u16_e32 vcc, v127.h, v255.h quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_ge_u16_e32 vcc, v127.l, v255.l
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_ge_u16_e32 vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_ge_u16_e32 vcc, v127.l, v255.l quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_ge_u16_e32 vcc, v128.h, v2.h
+// GFX12: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_cmp_ge_u16_e32 vcc, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_cmp_ge_u16_e32 vcc, v128.h, v2.h quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_cmp_ge_u16_e32 vcc, v128.l, v2.l
+// GFX12: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_cmp_ge_u16_e32 vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_cmp_ge_u16_e32 vcc, v128.l, v2.l quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_cmp_ge_u16_e32 vcc, vcc_hi, v255.h
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_ge_u16_e32 vcc, vcc_hi, v255.l
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_ge_u16_e32 vcc, vcc_lo, v255.h
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_ge_u16_e32 vcc, vcc_lo, v255.l
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_ge_u16_e32 vcc_lo, v1.h, v255.h
+// GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
+
+v_cmp_ge_u16_e32 vcc_lo, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
+
+v_cmp_ge_u16_e32 vcc_lo, v1.h, v255.h quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
+
+v_cmp_ge_u16_e32 vcc_lo, v1.l, v255.l
+// GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
+
+v_cmp_ge_u16_e32 vcc_lo, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
+
+v_cmp_ge_u16_e32 vcc_lo, v1.l, v255.l quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
+
+v_cmp_ge_u16_e32 vcc_lo, v127.h, v255.h
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_ge_u16_e32 vcc_lo, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_ge_u16_e32 vcc_lo, v127.h, v255.h quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_ge_u16_e32 vcc_lo, v127.l, v255.l
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_ge_u16_e32 vcc_lo, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_ge_u16_e32 vcc_lo, v127.l, v255.l quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_ge_u16_e32 vcc_lo, v128.h, v2.h
+// GFX12: :[[@LINE-1]]:26: error: invalid operand for instruction
+
+v_cmp_ge_u16_e32 vcc_lo, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:26: error: invalid operand for instruction
+
+v_cmp_ge_u16_e32 vcc_lo, v128.h, v2.h quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:26: error: invalid operand for instruction
+
+v_cmp_ge_u16_e32 vcc_lo, v128.l, v2.l
+// GFX12: :[[@LINE-1]]:26: error: invalid operand for instruction
+
+v_cmp_ge_u16_e32 vcc_lo, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:26: error: invalid operand for instruction
+
+v_cmp_ge_u16_e32 vcc_lo, v128.l, v2.l quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:26: error: invalid operand for instruction
+
+v_cmp_ge_u16_e32 vcc_lo, vcc_hi, v255.h
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_ge_u16_e32 vcc_lo, vcc_hi, v255.l
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_ge_u16_e32 vcc_lo, vcc_lo, v255.h
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_ge_u16_e32 vcc_lo, vcc_lo, v255.l
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_gt_f16_e32 vcc, v1, v255
+// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+
+v_cmp_gt_f16_e32 vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
+
+v_cmp_gt_f16_e32 vcc, v1, v255 quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
 
 v_cmp_gt_f16_e32 vcc, v127, v255
 // GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
@@ -520,137 +785,269 @@ v_cmp_gt_f16_e32 vcc_lo, vcc_hi, v255
 v_cmp_gt_f16_e32 vcc_lo, vcc_lo, v255
 // GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16_e32 vcc, v1, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_gt_i16_e32 vcc, v1.h, v255.h
+// GFX12: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_gt_i16_e32 vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
+v_cmp_gt_i16_e32 vcc, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_gt_i16_e32 vcc, v1, v255 quad_perm:[3,2,1,0]
-// GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
+v_cmp_gt_i16_e32 vcc, v1.h, v255.h quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_gt_i16_e32 vcc, v127, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_gt_i16_e32 vcc, v1.l, v255.l
+// GFX12: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_gt_i16_e32 vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
+v_cmp_gt_i16_e32 vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_gt_i16_e32 vcc, v127, v255 quad_perm:[3,2,1,0]
-// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
+v_cmp_gt_i16_e32 vcc, v1.l, v255.l quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_gt_i16_e32 vcc, v128, v2
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_gt_i16_e32 vcc, v127.h, v255.h
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_gt_i16_e32 vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
+v_cmp_gt_i16_e32 vcc, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_gt_i16_e32 vcc, v128, v2 quad_perm:[3,2,1,0]
-// GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
+v_cmp_gt_i16_e32 vcc, v127.h, v255.h quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_gt_i16_e32 vcc, vcc_hi, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_gt_i16_e32 vcc, v127.l, v255.l
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_gt_i16_e32 vcc, vcc_lo, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_gt_i16_e32 vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_gt_i16_e32 vcc_lo, v1, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_gt_i16_e32 vcc, v127.l, v255.l quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_gt_i16_e32 vcc_lo, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX12: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_gt_i16_e32 vcc, v128.h, v2.h
+// GFX12: :[[@LINE-1]]:23: error: invalid operand for instruction
 
-v_cmp_gt_i16_e32 vcc_lo, v1, v255 quad_perm:[3,2,1,0]
-// GFX12: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_gt_i16_e32 vcc, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:23: error: invalid operand for instruction
 
-v_cmp_gt_i16_e32 vcc_lo, v127, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_gt_i16_e32 vcc, v128.h, v2.h quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:23: error: invalid operand for instruction
 
-v_cmp_gt_i16_e32 vcc_lo, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX12: :[[@LINE-1]]:37: error: invalid operand for instruction
+v_cmp_gt_i16_e32 vcc, v128.l, v2.l
+// GFX12: :[[@LINE-1]]:23: error: invalid operand for instruction
 
-v_cmp_gt_i16_e32 vcc_lo, v127, v255 quad_perm:[3,2,1,0]
-// GFX12: :[[@LINE-1]]:37: error: invalid operand for instruction
+v_cmp_gt_i16_e32 vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:23: error: invalid operand for instruction
 
-v_cmp_gt_i16_e32 vcc_lo, v128, v2
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_gt_i16_e32 vcc, v128.l, v2.l quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:23: error: invalid operand for instruction
 
-v_cmp_gt_i16_e32 vcc_lo, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// GFX12: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_gt_i16_e32 vcc, vcc_hi, v255.h
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_gt_i16_e32 vcc_lo, v128, v2 quad_perm:[3,2,1,0]
-// GFX12: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_gt_i16_e32 vcc, vcc_hi, v255.l
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_gt_i16_e32 vcc_lo, vcc_hi, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_gt_i16_e32 vcc, vcc_lo, v255.h
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_gt_i16_e32 vcc_lo, vcc_lo, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_gt_i16_e32 vcc, vcc_lo, v255.l
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_gt_u16_e32 vcc, v1, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_gt_i16_e32 vcc_lo, v1.h, v255.h
+// GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_gt_u16_e32 vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
+v_cmp_gt_i16_e32 vcc_lo, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
 // GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_gt_u16_e32 vcc, v1, v255 quad_perm:[3,2,1,0]
+v_cmp_gt_i16_e32 vcc_lo, v1.h, v255.h quad_perm:[3,2,1,0]
 // GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_gt_u16_e32 vcc, v127, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_gt_i16_e32 vcc_lo, v1.l, v255.l
+// GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_gt_u16_e32 vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
+v_cmp_gt_i16_e32 vcc_lo, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
+
+v_cmp_gt_i16_e32 vcc_lo, v1.l, v255.l quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
+
+v_cmp_gt_i16_e32 vcc_lo, v127.h, v255.h
 // GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_gt_u16_e32 vcc, v127, v255 quad_perm:[3,2,1,0]
+v_cmp_gt_i16_e32 vcc_lo, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
 // GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_gt_u16_e32 vcc, v128, v2
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_gt_i16_e32 vcc_lo, v127.h, v255.h quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_gt_i16_e32 vcc_lo, v127.l, v255.l
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_gt_i16_e32 vcc_lo, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_gt_i16_e32 vcc_lo, v127.l, v255.l quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_gt_i16_e32 vcc_lo, v128.h, v2.h
+// GFX12: :[[@LINE-1]]:26: error: invalid operand for instruction
+
+v_cmp_gt_i16_e32 vcc_lo, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:26: error: invalid operand for instruction
+
+v_cmp_gt_i16_e32 vcc_lo, v128.h, v2.h quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:26: error: invalid operand for instruction
+
+v_cmp_gt_i16_e32 vcc_lo, v128.l, v2.l
+// GFX12: :[[@LINE-1]]:26: error: invalid operand for instruction
+
+v_cmp_gt_i16_e32 vcc_lo, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:26: error: invalid operand for instruction
+
+v_cmp_gt_i16_e32 vcc_lo, v128.l, v2.l quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:26: error: invalid operand for instruction
+
+v_cmp_gt_i16_e32 vcc_lo, vcc_hi, v255.h
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_gt_i16_e32 vcc_lo, vcc_hi, v255.l
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_gt_i16_e32 vcc_lo, vcc_lo, v255.h
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_gt_i16_e32 vcc_lo, vcc_lo, v255.l
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_gt_u16_e32 vcc, v1.h, v255.h
+// GFX12: :[[@LINE-1]]:29: error: invalid operand for instruction
+
+v_cmp_gt_u16_e32 vcc, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:29: error: invalid operand for instruction
+
+v_cmp_gt_u16_e32 vcc, v1.h, v255.h quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:29: error: invalid operand for instruction
+
+v_cmp_gt_u16_e32 vcc, v1.l, v255.l
+// GFX12: :[[@LINE-1]]:29: error: invalid operand for instruction
+
+v_cmp_gt_u16_e32 vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:29: error: invalid operand for instruction
+
+v_cmp_gt_u16_e32 vcc, v1.l, v255.l quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:29: error: invalid operand for instruction
+
+v_cmp_gt_u16_e32 vcc, v127.h, v255.h
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_gt_u16_e32 vcc, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_gt_u16_e32 vcc, v127.h, v255.h quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_gt_u16_e32 vcc, v127.l, v255.l
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_gt_u16_e32 vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_gt_u16_e32 vcc, v127.l, v255.l quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_gt_u16_e32 vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
+v_cmp_gt_u16_e32 vcc, v128.h, v2.h
+// GFX12: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_cmp_gt_u16_e32 vcc, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_cmp_gt_u16_e32 vcc, v128.h, v2.h quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_cmp_gt_u16_e32 vcc, v128.l, v2.l
+// GFX12: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_cmp_gt_u16_e32 vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_cmp_gt_u16_e32 vcc, v128.l, v2.l quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_cmp_gt_u16_e32 vcc, vcc_hi, v255.h
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_gt_u16_e32 vcc, vcc_hi, v255.l
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_gt_u16_e32 vcc, vcc_lo, v255.h
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_gt_u16_e32 vcc, vcc_lo, v255.l
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_gt_u16_e32 vcc_lo, v1.h, v255.h
 // GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_gt_u16_e32 vcc, v128, v2 quad_perm:[3,2,1,0]
+v_cmp_gt_u16_e32 vcc_lo, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
 // GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_gt_u16_e32 vcc, vcc_hi, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_gt_u16_e32 vcc_lo, v1.h, v255.h quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_gt_u16_e32 vcc, vcc_lo, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_gt_u16_e32 vcc_lo, v1.l, v255.l
+// GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_gt_u16_e32 vcc_lo, v1, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_gt_u16_e32 vcc_lo, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_gt_u16_e32 vcc_lo, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX12: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_gt_u16_e32 vcc_lo, v1.l, v255.l quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_gt_u16_e32 vcc_lo, v1, v255 quad_perm:[3,2,1,0]
-// GFX12: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_gt_u16_e32 vcc_lo, v127.h, v255.h
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_gt_u16_e32 vcc_lo, v127, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_gt_u16_e32 vcc_lo, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_gt_u16_e32 vcc_lo, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX12: :[[@LINE-1]]:37: error: invalid operand for instruction
+v_cmp_gt_u16_e32 vcc_lo, v127.h, v255.h quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_gt_u16_e32 vcc_lo, v127, v255 quad_perm:[3,2,1,0]
-// GFX12: :[[@LINE-1]]:37: error: invalid operand for instruction
+v_cmp_gt_u16_e32 vcc_lo, v127.l, v255.l
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_gt_u16_e32 vcc_lo, v128, v2
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_gt_u16_e32 vcc_lo, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_gt_u16_e32 vcc_lo, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// GFX12: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_gt_u16_e32 vcc_lo, v127.l, v255.l quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_gt_u16_e32 vcc_lo, v128, v2 quad_perm:[3,2,1,0]
-// GFX12: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_gt_u16_e32 vcc_lo, v128.h, v2.h
+// GFX12: :[[@LINE-1]]:26: error: invalid operand for instruction
 
-v_cmp_gt_u16_e32 vcc_lo, vcc_hi, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_gt_u16_e32 vcc_lo, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:26: error: invalid operand for instruction
 
-v_cmp_gt_u16_e32 vcc_lo, vcc_lo, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_gt_u16_e32 vcc_lo, v128.h, v2.h quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:26: error: invalid operand for instruction
+
+v_cmp_gt_u16_e32 vcc_lo, v128.l, v2.l
+// GFX12: :[[@LINE-1]]:26: error: invalid operand for instruction
+
+v_cmp_gt_u16_e32 vcc_lo, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:26: error: invalid operand for instruction
+
+v_cmp_gt_u16_e32 vcc_lo, v128.l, v2.l quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:26: error: invalid operand for instruction
+
+v_cmp_gt_u16_e32 vcc_lo, vcc_hi, v255.h
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_gt_u16_e32 vcc_lo, vcc_hi, v255.l
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_gt_u16_e32 vcc_lo, vcc_lo, v255.h
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_gt_u16_e32 vcc_lo, vcc_lo, v255.l
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
 
 v_cmp_le_f16_e32 vcc, v1, v255
 // GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
@@ -718,599 +1115,995 @@ v_cmp_le_f16_e32 vcc_lo, vcc_hi, v255
 v_cmp_le_f16_e32 vcc_lo, vcc_lo, v255
 // GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16_e32 vcc, v1, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_le_i16_e32 vcc, v1.h, v255.h
+// GFX12: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_le_i16_e32 vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
+v_cmp_le_i16_e32 vcc, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_le_i16_e32 vcc, v1, v255 quad_perm:[3,2,1,0]
+v_cmp_le_i16_e32 vcc, v1.h, v255.h quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:29: error: invalid operand for instruction
+
+v_cmp_le_i16_e32 vcc, v1.l, v255.l
+// GFX12: :[[@LINE-1]]:29: error: invalid operand for instruction
+
+v_cmp_le_i16_e32 vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:29: error: invalid operand for instruction
+
+v_cmp_le_i16_e32 vcc, v1.l, v255.l quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:29: error: invalid operand for instruction
+
+v_cmp_le_i16_e32 vcc, v127.h, v255.h
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_le_i16_e32 vcc, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_le_i16_e32 vcc, v127.h, v255.h quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_le_i16_e32 vcc, v127.l, v255.l
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_le_i16_e32 vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_le_i16_e32 vcc, v127.l, v255.l quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_le_i16_e32 vcc, v128.h, v2.h
+// GFX12: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_cmp_le_i16_e32 vcc, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_cmp_le_i16_e32 vcc, v128.h, v2.h quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_cmp_le_i16_e32 vcc, v128.l, v2.l
+// GFX12: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_cmp_le_i16_e32 vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_cmp_le_i16_e32 vcc, v128.l, v2.l quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_cmp_le_i16_e32 vcc, vcc_hi, v255.h
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_le_i16_e32 vcc, vcc_hi, v255.l
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_le_i16_e32 vcc, vcc_lo, v255.h
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_le_i16_e32 vcc, vcc_lo, v255.l
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_le_i16_e32 vcc_lo, v1.h, v255.h
 // GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_le_i16_e32 vcc, v127, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_le_i16_e32 vcc_lo, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
+
+v_cmp_le_i16_e32 vcc_lo, v1.h, v255.h quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
+
+v_cmp_le_i16_e32 vcc_lo, v1.l, v255.l
+// GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_le_i16_e32 vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
+v_cmp_le_i16_e32 vcc_lo, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
+
+v_cmp_le_i16_e32 vcc_lo, v1.l, v255.l quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
+
+v_cmp_le_i16_e32 vcc_lo, v127.h, v255.h
 // GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_le_i16_e32 vcc, v127, v255 quad_perm:[3,2,1,0]
+v_cmp_le_i16_e32 vcc_lo, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
 // GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_le_i16_e32 vcc, v128, v2
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_le_i16_e32 vcc_lo, v127.h, v255.h quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_le_i16_e32 vcc_lo, v127.l, v255.l
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_le_i16_e32 vcc_lo, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_le_i16_e32 vcc_lo, v127.l, v255.l quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_le_i16_e32 vcc_lo, v128.h, v2.h
+// GFX12: :[[@LINE-1]]:26: error: invalid operand for instruction
+
+v_cmp_le_i16_e32 vcc_lo, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:26: error: invalid operand for instruction
+
+v_cmp_le_i16_e32 vcc_lo, v128.h, v2.h quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:26: error: invalid operand for instruction
+
+v_cmp_le_i16_e32 vcc_lo, v128.l, v2.l
+// GFX12: :[[@LINE-1]]:26: error: invalid operand for instruction
+
+v_cmp_le_i16_e32 vcc_lo, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:26: error: invalid operand for instruction
+
+v_cmp_le_i16_e32 vcc_lo, v128.l, v2.l quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:26: error: invalid operand for instruction
+
+v_cmp_le_i16_e32 vcc_lo, vcc_hi, v255.h
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_le_i16_e32 vcc_lo, vcc_hi, v255.l
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_le_i16_e32 vcc_lo, vcc_lo, v255.h
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_le_i16_e32 vcc_lo, vcc_lo, v255.l
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_le_u16_e32 vcc, v1.h, v255.h
+// GFX12: :[[@LINE-1]]:29: error: invalid operand for instruction
+
+v_cmp_le_u16_e32 vcc, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:29: error: invalid operand for instruction
+
+v_cmp_le_u16_e32 vcc, v1.h, v255.h quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:29: error: invalid operand for instruction
+
+v_cmp_le_u16_e32 vcc, v1.l, v255.l
+// GFX12: :[[@LINE-1]]:29: error: invalid operand for instruction
+
+v_cmp_le_u16_e32 vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:29: error: invalid operand for instruction
+
+v_cmp_le_u16_e32 vcc, v1.l, v255.l quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:29: error: invalid operand for instruction
+
+v_cmp_le_u16_e32 vcc, v127.h, v255.h
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_le_i16_e32 vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
+v_cmp_le_u16_e32 vcc, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_le_u16_e32 vcc, v127.h, v255.h quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_le_u16_e32 vcc, v127.l, v255.l
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_le_u16_e32 vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_le_u16_e32 vcc, v127.l, v255.l quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_le_u16_e32 vcc, v128.h, v2.h
+// GFX12: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_cmp_le_u16_e32 vcc, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_cmp_le_u16_e32 vcc, v128.h, v2.h quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_cmp_le_u16_e32 vcc, v128.l, v2.l
+// GFX12: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_cmp_le_u16_e32 vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_cmp_le_u16_e32 vcc, v128.l, v2.l quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_cmp_le_u16_e32 vcc, vcc_hi, v255.h
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_le_u16_e32 vcc, vcc_hi, v255.l
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_le_u16_e32 vcc, vcc_lo, v255.h
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_le_u16_e32 vcc, vcc_lo, v255.l
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_le_u16_e32 vcc_lo, v1.h, v255.h
 // GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_le_i16_e32 vcc, v128, v2 quad_perm:[3,2,1,0]
+v_cmp_le_u16_e32 vcc_lo, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
 // GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_le_i16_e32 vcc, vcc_hi, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_le_u16_e32 vcc_lo, v1.h, v255.h quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_le_i16_e32 vcc, vcc_lo, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_le_u16_e32 vcc_lo, v1.l, v255.l
+// GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_le_i16_e32 vcc_lo, v1, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_le_u16_e32 vcc_lo, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_le_i16_e32 vcc_lo, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX12: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_le_u16_e32 vcc_lo, v1.l, v255.l quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_le_i16_e32 vcc_lo, v1, v255 quad_perm:[3,2,1,0]
-// GFX12: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_le_u16_e32 vcc_lo, v127.h, v255.h
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_le_i16_e32 vcc_lo, v127, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_le_u16_e32 vcc_lo, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_le_i16_e32 vcc_lo, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX12: :[[@LINE-1]]:37: error: invalid operand for instruction
+v_cmp_le_u16_e32 vcc_lo, v127.h, v255.h quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_le_i16_e32 vcc_lo, v127, v255 quad_perm:[3,2,1,0]
-// GFX12: :[[@LINE-1]]:37: error: invalid operand for instruction
+v_cmp_le_u16_e32 vcc_lo, v127.l, v255.l
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_le_i16_e32 vcc_lo, v128, v2
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_le_u16_e32 vcc_lo, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_le_i16_e32 vcc_lo, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// GFX12: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_le_u16_e32 vcc_lo, v127.l, v255.l quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_le_i16_e32 vcc_lo, v128, v2 quad_perm:[3,2,1,0]
-// GFX12: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_le_u16_e32 vcc_lo, v128.h, v2.h
+// GFX12: :[[@LINE-1]]:26: error: invalid operand for instruction
 
-v_cmp_le_i16_e32 vcc_lo, vcc_hi, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_le_u16_e32 vcc_lo, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:26: error: invalid operand for instruction
 
-v_cmp_le_i16_e32 vcc_lo, vcc_lo, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_le_u16_e32 vcc_lo, v128.h, v2.h quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:26: error: invalid operand for instruction
+
+v_cmp_le_u16_e32 vcc_lo, v128.l, v2.l
+// GFX12: :[[@LINE-1]]:26: error: invalid operand for instruction
 
-v_cmp_le_u16_e32 vcc, v1, v255
+v_cmp_le_u16_e32 vcc_lo, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:26: error: invalid operand for instruction
+
+v_cmp_le_u16_e32 vcc_lo, v128.l, v2.l quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:26: error: invalid operand for instruction
+
+v_cmp_le_u16_e32 vcc_lo, vcc_hi, v255.h
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_le_u16_e32 vcc_lo, vcc_hi, v255.l
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_le_u16_e32 vcc_lo, vcc_lo, v255.h
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_le_u16_e32 vcc_lo, vcc_lo, v255.l
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_lg_f16_e32 vcc, v1, v255
 // GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16_e32 vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
+v_cmp_lg_f16_e32 vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
 // GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_le_u16_e32 vcc, v1, v255 quad_perm:[3,2,1,0]
+v_cmp_lg_f16_e32 vcc, v1, v255 quad_perm:[3,2,1,0]
 // GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_le_u16_e32 vcc, v127, v255
+v_cmp_lg_f16_e32 vcc, v127, v255
 // GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16_e32 vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
+v_cmp_lg_f16_e32 vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
 // GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_le_u16_e32 vcc, v127, v255 quad_perm:[3,2,1,0]
+v_cmp_lg_f16_e32 vcc, v127, v255 quad_perm:[3,2,1,0]
 // GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_le_u16_e32 vcc, v128, v2
+v_cmp_lg_f16_e32 vcc, v128, v2
 // GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16_e32 vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
+v_cmp_lg_f16_e32 vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
 // GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_le_u16_e32 vcc, v128, v2 quad_perm:[3,2,1,0]
+v_cmp_lg_f16_e32 vcc, v128, v2 quad_perm:[3,2,1,0]
 // GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_le_u16_e32 vcc, vcc_hi, v255
+v_cmp_lg_f16_e32 vcc, vcc_hi, v255
 // GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16_e32 vcc, vcc_lo, v255
+v_cmp_lg_f16_e32 vcc, vcc_lo, v255
 // GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16_e32 vcc_lo, v1, v255
+v_cmp_lg_f16_e32 vcc_lo, v1, v255
 // GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16_e32 vcc_lo, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
+v_cmp_lg_f16_e32 vcc_lo, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
 // GFX12: :[[@LINE-1]]:35: error: invalid operand for instruction
 
-v_cmp_le_u16_e32 vcc_lo, v1, v255 quad_perm:[3,2,1,0]
+v_cmp_lg_f16_e32 vcc_lo, v1, v255 quad_perm:[3,2,1,0]
 // GFX12: :[[@LINE-1]]:35: error: invalid operand for instruction
 
-v_cmp_le_u16_e32 vcc_lo, v127, v255
+v_cmp_lg_f16_e32 vcc_lo, v127, v255
 // GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16_e32 vcc_lo, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
+v_cmp_lg_f16_e32 vcc_lo, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
 // GFX12: :[[@LINE-1]]:37: error: invalid operand for instruction
 
-v_cmp_le_u16_e32 vcc_lo, v127, v255 quad_perm:[3,2,1,0]
+v_cmp_lg_f16_e32 vcc_lo, v127, v255 quad_perm:[3,2,1,0]
 // GFX12: :[[@LINE-1]]:37: error: invalid operand for instruction
 
-v_cmp_le_u16_e32 vcc_lo, v128, v2
+v_cmp_lg_f16_e32 vcc_lo, v128, v2
 // GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16_e32 vcc_lo, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
+v_cmp_lg_f16_e32 vcc_lo, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
 // GFX12: :[[@LINE-1]]:35: error: invalid operand for instruction
 
-v_cmp_le_u16_e32 vcc_lo, v128, v2 quad_perm:[3,2,1,0]
+v_cmp_lg_f16_e32 vcc_lo, v128, v2 quad_perm:[3,2,1,0]
 // GFX12: :[[@LINE-1]]:35: error: invalid operand for instruction
 
-v_cmp_le_u16_e32 vcc_lo, vcc_hi, v255
+v_cmp_lg_f16_e32 vcc_lo, vcc_hi, v255
 // GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_u16_e32 vcc_lo, vcc_lo, v255
+v_cmp_lg_f16_e32 vcc_lo, vcc_lo, v255
 // GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_lg_f16_e32 vcc, v1, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_lt_f16_e32 vcc, v1.h, v255.h
+// GFX12: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_lg_f16_e32 vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
+v_cmp_lt_f16_e32 vcc, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:29: error: invalid operand for instruction
+
+v_cmp_lt_f16_e32 vcc, v1.h, v255.h quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:29: error: invalid operand for instruction
+
+v_cmp_lt_f16_e32 vcc, v1.l, v255.l
+// GFX12: :[[@LINE-1]]:29: error: invalid operand for instruction
+
+v_cmp_lt_f16_e32 vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:29: error: invalid operand for instruction
+
+v_cmp_lt_f16_e32 vcc, v1.l, v255.l quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:29: error: invalid operand for instruction
+
+v_cmp_lt_f16_e32 vcc, v127.h, v255.h
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_lt_f16_e32 vcc, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_lt_f16_e32 vcc, v127.h, v255.h quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_lt_f16_e32 vcc, v127.l, v255.l
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_lt_f16_e32 vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_lt_f16_e32 vcc, v127.l, v255.l quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_lt_f16_e32 vcc, v128.h, v2.h
+// GFX12: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_cmp_lt_f16_e32 vcc, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_cmp_lt_f16_e32 vcc, v128.h, v2.h quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_cmp_lt_f16_e32 vcc, v128.l, v2.l
+// GFX12: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_cmp_lt_f16_e32 vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_cmp_lt_f16_e32 vcc, v128.l, v2.l quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_cmp_lt_f16_e32 vcc, vcc_hi, v255.h
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_lt_f16_e32 vcc, vcc_hi, v255.l
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_lt_f16_e32 vcc, vcc_lo, v255.h
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_lt_f16_e32 vcc, vcc_lo, v255.l
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_lt_f16_e32 vcc_lo, v1.h, v255.h
 // GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_lg_f16_e32 vcc, v1, v255 quad_perm:[3,2,1,0]
+v_cmp_lt_f16_e32 vcc_lo, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
 // GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_lg_f16_e32 vcc, v127, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_lt_f16_e32 vcc_lo, v1.h, v255.h quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_lg_f16_e32 vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
+v_cmp_lt_f16_e32 vcc_lo, v1.l, v255.l
+// GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
+
+v_cmp_lt_f16_e32 vcc_lo, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
+
+v_cmp_lt_f16_e32 vcc_lo, v1.l, v255.l quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
+
+v_cmp_lt_f16_e32 vcc_lo, v127.h, v255.h
 // GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_lg_f16_e32 vcc, v127, v255 quad_perm:[3,2,1,0]
+v_cmp_lt_f16_e32 vcc_lo, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
 // GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_lg_f16_e32 vcc, v128, v2
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_lt_f16_e32 vcc_lo, v127.h, v255.h quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_lt_f16_e32 vcc_lo, v127.l, v255.l
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_lt_f16_e32 vcc_lo, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_lt_f16_e32 vcc_lo, v127.l, v255.l quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_lt_f16_e32 vcc_lo, v128.h, v2.h
+// GFX12: :[[@LINE-1]]:26: error: invalid operand for instruction
+
+v_cmp_lt_f16_e32 vcc_lo, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:26: error: invalid operand for instruction
+
+v_cmp_lt_f16_e32 vcc_lo, v128.h, v2.h quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:26: error: invalid operand for instruction
+
+v_cmp_lt_f16_e32 vcc_lo, v128.l, v2.l
+// GFX12: :[[@LINE-1]]:26: error: invalid operand for instruction
+
+v_cmp_lt_f16_e32 vcc_lo, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:26: error: invalid operand for instruction
+
+v_cmp_lt_f16_e32 vcc_lo, v128.l, v2.l quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:26: error: invalid operand for instruction
+
+v_cmp_lt_f16_e32 vcc_lo, vcc_hi, v255.h
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_lt_f16_e32 vcc_lo, vcc_hi, v255.l
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_lt_f16_e32 vcc_lo, vcc_lo, v255.h
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_lt_f16_e32 vcc_lo, vcc_lo, v255.l
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_lt_i16_e32 vcc, v1.h, v255.h
+// GFX12: :[[@LINE-1]]:29: error: invalid operand for instruction
+
+v_cmp_lt_i16_e32 vcc, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:29: error: invalid operand for instruction
+
+v_cmp_lt_i16_e32 vcc, v1.h, v255.h quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:29: error: invalid operand for instruction
+
+v_cmp_lt_i16_e32 vcc, v1.l, v255.l
+// GFX12: :[[@LINE-1]]:29: error: invalid operand for instruction
+
+v_cmp_lt_i16_e32 vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:29: error: invalid operand for instruction
+
+v_cmp_lt_i16_e32 vcc, v1.l, v255.l quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:29: error: invalid operand for instruction
+
+v_cmp_lt_i16_e32 vcc, v127.h, v255.h
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_lt_i16_e32 vcc, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_lt_i16_e32 vcc, v127.h, v255.h quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_lt_i16_e32 vcc, v127.l, v255.l
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_lt_i16_e32 vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_lt_i16_e32 vcc, v127.l, v255.l quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_lt_i16_e32 vcc, v128.h, v2.h
+// GFX12: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_cmp_lt_i16_e32 vcc, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_cmp_lt_i16_e32 vcc, v128.h, v2.h quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_cmp_lt_i16_e32 vcc, v128.l, v2.l
+// GFX12: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_cmp_lt_i16_e32 vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_cmp_lt_i16_e32 vcc, v128.l, v2.l quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:23: error: invalid operand for instruction
+
+v_cmp_lt_i16_e32 vcc, vcc_hi, v255.h
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_lt_i16_e32 vcc, vcc_hi, v255.l
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_lt_i16_e32 vcc, vcc_lo, v255.h
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_lt_i16_e32 vcc, vcc_lo, v255.l
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
+
+v_cmp_lt_i16_e32 vcc_lo, v1.h, v255.h
+// GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
+
+v_cmp_lt_i16_e32 vcc_lo, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
+
+v_cmp_lt_i16_e32 vcc_lo, v1.h, v255.h quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
+
+v_cmp_lt_i16_e32 vcc_lo, v1.l, v255.l
+// GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_lg_f16_e32 vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
+v_cmp_lt_i16_e32 vcc_lo, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
 // GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_lg_f16_e32 vcc, v128, v2 quad_perm:[3,2,1,0]
+v_cmp_lt_i16_e32 vcc_lo, v1.l, v255.l quad_perm:[3,2,1,0]
 // GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_lg_f16_e32 vcc, vcc_hi, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_lt_i16_e32 vcc_lo, v127.h, v255.h
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_lg_f16_e32 vcc, vcc_lo, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_lt_i16_e32 vcc_lo, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_lg_f16_e32 vcc_lo, v1, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_lt_i16_e32 vcc_lo, v127.h, v255.h quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_lg_f16_e32 vcc_lo, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX12: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_lt_i16_e32 vcc_lo, v127.l, v255.l
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_lg_f16_e32 vcc_lo, v1, v255 quad_perm:[3,2,1,0]
-// GFX12: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_lt_i16_e32 vcc_lo, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_lg_f16_e32 vcc_lo, v127, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_lt_i16_e32 vcc_lo, v127.l, v255.l quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_lg_f16_e32 vcc_lo, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX12: :[[@LINE-1]]:37: error: invalid operand for instruction
+v_cmp_lt_i16_e32 vcc_lo, v128.h, v2.h
+// GFX12: :[[@LINE-1]]:26: error: invalid operand for instruction
 
-v_cmp_lg_f16_e32 vcc_lo, v127, v255 quad_perm:[3,2,1,0]
-// GFX12: :[[@LINE-1]]:37: error: invalid operand for instruction
+v_cmp_lt_i16_e32 vcc_lo, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:26: error: invalid operand for instruction
 
-v_cmp_lg_f16_e32 vcc_lo, v128, v2
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_lt_i16_e32 vcc_lo, v128.h, v2.h quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:26: error: invalid operand for instruction
 
-v_cmp_lg_f16_e32 vcc_lo, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// GFX12: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_lt_i16_e32 vcc_lo, v128.l, v2.l
+// GFX12: :[[@LINE-1]]:26: error: invalid operand for instruction
 
-v_cmp_lg_f16_e32 vcc_lo, v128, v2 quad_perm:[3,2,1,0]
-// GFX12: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_lt_i16_e32 vcc_lo, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:26: error: invalid operand for instruction
 
-v_cmp_lg_f16_e32 vcc_lo, vcc_hi, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_lt_i16_e32 vcc_lo, v128.l, v2.l quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:26: error: invalid operand for instruction
 
-v_cmp_lg_f16_e32 vcc_lo, vcc_lo, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_lt_i16_e32 vcc_lo, vcc_hi, v255.h
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc, v1.h, v255.h
+v_cmp_lt_i16_e32 vcc_lo, vcc_hi, v255.l
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_lt_i16_e32 vcc_lo, vcc_lo, v255.h
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_lt_i16_e32 vcc_lo, vcc_lo, v255.l
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
+
+v_cmp_lt_u16_e32 vcc, v1.h, v255.h
 // GFX12: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+v_cmp_lt_u16_e32 vcc, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
 // GFX12: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc, v1.h, v255.h quad_perm:[3,2,1,0]
+v_cmp_lt_u16_e32 vcc, v1.h, v255.h quad_perm:[3,2,1,0]
 // GFX12: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc, v1.l, v255.l
+v_cmp_lt_u16_e32 vcc, v1.l, v255.l
 // GFX12: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+v_cmp_lt_u16_e32 vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
 // GFX12: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc, v1.l, v255.l quad_perm:[3,2,1,0]
+v_cmp_lt_u16_e32 vcc, v1.l, v255.l quad_perm:[3,2,1,0]
 // GFX12: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc, v127.h, v255.h
+v_cmp_lt_u16_e32 vcc, v127.h, v255.h
 // GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+v_cmp_lt_u16_e32 vcc, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
 // GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc, v127.h, v255.h quad_perm:[3,2,1,0]
+v_cmp_lt_u16_e32 vcc, v127.h, v255.h quad_perm:[3,2,1,0]
 // GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc, v127.l, v255.l
+v_cmp_lt_u16_e32 vcc, v127.l, v255.l
 // GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+v_cmp_lt_u16_e32 vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
 // GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc, v127.l, v255.l quad_perm:[3,2,1,0]
+v_cmp_lt_u16_e32 vcc, v127.l, v255.l quad_perm:[3,2,1,0]
 // GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc, v128.h, v2.h
+v_cmp_lt_u16_e32 vcc, v128.h, v2.h
 // GFX12: :[[@LINE-1]]:23: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+v_cmp_lt_u16_e32 vcc, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
 // GFX12: :[[@LINE-1]]:23: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc, v128.h, v2.h quad_perm:[3,2,1,0]
+v_cmp_lt_u16_e32 vcc, v128.h, v2.h quad_perm:[3,2,1,0]
 // GFX12: :[[@LINE-1]]:23: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc, v128.l, v2.l
+v_cmp_lt_u16_e32 vcc, v128.l, v2.l
 // GFX12: :[[@LINE-1]]:23: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+v_cmp_lt_u16_e32 vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
 // GFX12: :[[@LINE-1]]:23: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc, v128.l, v2.l quad_perm:[3,2,1,0]
+v_cmp_lt_u16_e32 vcc, v128.l, v2.l quad_perm:[3,2,1,0]
 // GFX12: :[[@LINE-1]]:23: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc, vcc_hi, v255.h
+v_cmp_lt_u16_e32 vcc, vcc_hi, v255.h
 // GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc, vcc_hi, v255.l
+v_cmp_lt_u16_e32 vcc, vcc_hi, v255.l
 // GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc, vcc_lo, v255.h
+v_cmp_lt_u16_e32 vcc, vcc_lo, v255.h
 // GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc, vcc_lo, v255.l
+v_cmp_lt_u16_e32 vcc, vcc_lo, v255.l
 // GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc_lo, v1.h, v255.h
+v_cmp_lt_u16_e32 vcc_lo, v1.h, v255.h
 // GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc_lo, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+v_cmp_lt_u16_e32 vcc_lo, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
 // GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc_lo, v1.h, v255.h quad_perm:[3,2,1,0]
+v_cmp_lt_u16_e32 vcc_lo, v1.h, v255.h quad_perm:[3,2,1,0]
 // GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc_lo, v1.l, v255.l
+v_cmp_lt_u16_e32 vcc_lo, v1.l, v255.l
 // GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc_lo, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+v_cmp_lt_u16_e32 vcc_lo, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
 // GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc_lo, v1.l, v255.l quad_perm:[3,2,1,0]
+v_cmp_lt_u16_e32 vcc_lo, v1.l, v255.l quad_perm:[3,2,1,0]
 // GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc_lo, v127.h, v255.h
+v_cmp_lt_u16_e32 vcc_lo, v127.h, v255.h
 // GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc_lo, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+v_cmp_lt_u16_e32 vcc_lo, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
 // GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc_lo, v127.h, v255.h quad_perm:[3,2,1,0]
+v_cmp_lt_u16_e32 vcc_lo, v127.h, v255.h quad_perm:[3,2,1,0]
 // GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc_lo, v127.l, v255.l
+v_cmp_lt_u16_e32 vcc_lo, v127.l, v255.l
 // GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc_lo, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+v_cmp_lt_u16_e32 vcc_lo, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
 // GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc_lo, v127.l, v255.l quad_perm:[3,2,1,0]
+v_cmp_lt_u16_e32 vcc_lo, v127.l, v255.l quad_perm:[3,2,1,0]
 // GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc_lo, v128.h, v2.h
+v_cmp_lt_u16_e32 vcc_lo, v128.h, v2.h
 // GFX12: :[[@LINE-1]]:26: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc_lo, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+v_cmp_lt_u16_e32 vcc_lo, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
 // GFX12: :[[@LINE-1]]:26: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc_lo, v128.h, v2.h quad_perm:[3,2,1,0]
+v_cmp_lt_u16_e32 vcc_lo, v128.h, v2.h quad_perm:[3,2,1,0]
 // GFX12: :[[@LINE-1]]:26: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc_lo, v128.l, v2.l
+v_cmp_lt_u16_e32 vcc_lo, v128.l, v2.l
 // GFX12: :[[@LINE-1]]:26: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc_lo, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+v_cmp_lt_u16_e32 vcc_lo, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
 // GFX12: :[[@LINE-1]]:26: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc_lo, v128.l, v2.l quad_perm:[3,2,1,0]
+v_cmp_lt_u16_e32 vcc_lo, v128.l, v2.l quad_perm:[3,2,1,0]
 // GFX12: :[[@LINE-1]]:26: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc_lo, vcc_hi, v255.h
+v_cmp_lt_u16_e32 vcc_lo, vcc_hi, v255.h
 // GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc_lo, vcc_hi, v255.l
+v_cmp_lt_u16_e32 vcc_lo, vcc_hi, v255.l
 // GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc_lo, vcc_lo, v255.h
+v_cmp_lt_u16_e32 vcc_lo, vcc_lo, v255.h
 // GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_lt_f16_e32 vcc_lo, vcc_lo, v255.l
+v_cmp_lt_u16_e32 vcc_lo, vcc_lo, v255.l
 // GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_lt_i16_e32 vcc, v1, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_i16_e32 vcc, v1.h, v255.h
+// GFX12: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_lt_i16_e32 vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
+v_cmp_ne_i16_e32 vcc, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_lt_i16_e32 vcc, v1, v255 quad_perm:[3,2,1,0]
-// GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
+v_cmp_ne_i16_e32 vcc, v1.h, v255.h quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_lt_i16_e32 vcc, v127, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_i16_e32 vcc, v1.l, v255.l
+// GFX12: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_lt_i16_e32 vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
+v_cmp_ne_i16_e32 vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_lt_i16_e32 vcc, v127, v255 quad_perm:[3,2,1,0]
-// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
+v_cmp_ne_i16_e32 vcc, v1.l, v255.l quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_lt_i16_e32 vcc, v128, v2
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_i16_e32 vcc, v127.h, v255.h
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_lt_i16_e32 vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
+v_cmp_ne_i16_e32 vcc, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_lt_i16_e32 vcc, v128, v2 quad_perm:[3,2,1,0]
-// GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
+v_cmp_ne_i16_e32 vcc, v127.h, v255.h quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_lt_i16_e32 vcc, vcc_hi, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_i16_e32 vcc, v127.l, v255.l
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_lt_i16_e32 vcc, vcc_lo, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_i16_e32 vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_lt_i16_e32 vcc_lo, v1, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_i16_e32 vcc, v127.l, v255.l quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_lt_i16_e32 vcc_lo, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX12: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_ne_i16_e32 vcc, v128.h, v2.h
+// GFX12: :[[@LINE-1]]:23: error: invalid operand for instruction
 
-v_cmp_lt_i16_e32 vcc_lo, v1, v255 quad_perm:[3,2,1,0]
-// GFX12: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_ne_i16_e32 vcc, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:23: error: invalid operand for instruction
 
-v_cmp_lt_i16_e32 vcc_lo, v127, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_i16_e32 vcc, v128.h, v2.h quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:23: error: invalid operand for instruction
 
-v_cmp_lt_i16_e32 vcc_lo, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX12: :[[@LINE-1]]:37: error: invalid operand for instruction
+v_cmp_ne_i16_e32 vcc, v128.l, v2.l
+// GFX12: :[[@LINE-1]]:23: error: invalid operand for instruction
 
-v_cmp_lt_i16_e32 vcc_lo, v127, v255 quad_perm:[3,2,1,0]
-// GFX12: :[[@LINE-1]]:37: error: invalid operand for instruction
+v_cmp_ne_i16_e32 vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:23: error: invalid operand for instruction
 
-v_cmp_lt_i16_e32 vcc_lo, v128, v2
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_i16_e32 vcc, v128.l, v2.l quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:23: error: invalid operand for instruction
 
-v_cmp_lt_i16_e32 vcc_lo, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// GFX12: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_ne_i16_e32 vcc, vcc_hi, v255.h
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_lt_i16_e32 vcc_lo, v128, v2 quad_perm:[3,2,1,0]
-// GFX12: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_ne_i16_e32 vcc, vcc_hi, v255.l
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_lt_i16_e32 vcc_lo, vcc_hi, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_i16_e32 vcc, vcc_lo, v255.h
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_lt_i16_e32 vcc_lo, vcc_lo, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_i16_e32 vcc, vcc_lo, v255.l
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_lt_u16_e32 vcc, v1, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_i16_e32 vcc_lo, v1.h, v255.h
+// GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_lt_u16_e32 vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
+v_cmp_ne_i16_e32 vcc_lo, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
 // GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_lt_u16_e32 vcc, v1, v255 quad_perm:[3,2,1,0]
+v_cmp_ne_i16_e32 vcc_lo, v1.h, v255.h quad_perm:[3,2,1,0]
 // GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_lt_u16_e32 vcc, v127, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_i16_e32 vcc_lo, v1.l, v255.l
+// GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
+
+v_cmp_ne_i16_e32 vcc_lo, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
+
+v_cmp_ne_i16_e32 vcc_lo, v1.l, v255.l quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_lt_u16_e32 vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
+v_cmp_ne_i16_e32 vcc_lo, v127.h, v255.h
 // GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_lt_u16_e32 vcc, v127, v255 quad_perm:[3,2,1,0]
+v_cmp_ne_i16_e32 vcc_lo, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
 // GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_lt_u16_e32 vcc, v128, v2
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_i16_e32 vcc_lo, v127.h, v255.h quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_lt_u16_e32 vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
+v_cmp_ne_i16_e32 vcc_lo, v127.l, v255.l
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_lt_u16_e32 vcc, v128, v2 quad_perm:[3,2,1,0]
-// GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
+v_cmp_ne_i16_e32 vcc_lo, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_lt_u16_e32 vcc, vcc_hi, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_i16_e32 vcc_lo, v127.l, v255.l quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_lt_u16_e32 vcc, vcc_lo, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_i16_e32 vcc_lo, v128.h, v2.h
+// GFX12: :[[@LINE-1]]:26: error: invalid operand for instruction
 
-v_cmp_lt_u16_e32 vcc_lo, v1, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_i16_e32 vcc_lo, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:26: error: invalid operand for instruction
 
-v_cmp_lt_u16_e32 vcc_lo, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX12: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_ne_i16_e32 vcc_lo, v128.h, v2.h quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:26: error: invalid operand for instruction
 
-v_cmp_lt_u16_e32 vcc_lo, v1, v255 quad_perm:[3,2,1,0]
-// GFX12: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_ne_i16_e32 vcc_lo, v128.l, v2.l
+// GFX12: :[[@LINE-1]]:26: error: invalid operand for instruction
 
-v_cmp_lt_u16_e32 vcc_lo, v127, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_i16_e32 vcc_lo, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:26: error: invalid operand for instruction
 
-v_cmp_lt_u16_e32 vcc_lo, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX12: :[[@LINE-1]]:37: error: invalid operand for instruction
+v_cmp_ne_i16_e32 vcc_lo, v128.l, v2.l quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:26: error: invalid operand for instruction
 
-v_cmp_lt_u16_e32 vcc_lo, v127, v255 quad_perm:[3,2,1,0]
-// GFX12: :[[@LINE-1]]:37: error: invalid operand for instruction
+v_cmp_ne_i16_e32 vcc_lo, vcc_hi, v255.h
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_lt_u16_e32 vcc_lo, v128, v2
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_i16_e32 vcc_lo, vcc_hi, v255.l
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_lt_u16_e32 vcc_lo, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// GFX12: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_ne_i16_e32 vcc_lo, vcc_lo, v255.h
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_lt_u16_e32 vcc_lo, v128, v2 quad_perm:[3,2,1,0]
-// GFX12: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_ne_i16_e32 vcc_lo, vcc_lo, v255.l
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_lt_u16_e32 vcc_lo, vcc_hi, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_u16_e32 vcc, v1.h, v255.h
+// GFX12: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_lt_u16_e32 vcc_lo, vcc_lo, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_u16_e32 vcc, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_ne_i16_e32 vcc, v1, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_u16_e32 vcc, v1.h, v255.h quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_ne_i16_e32 vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
+v_cmp_ne_u16_e32 vcc, v1.l, v255.l
+// GFX12: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_ne_i16_e32 vcc, v1, v255 quad_perm:[3,2,1,0]
-// GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
+v_cmp_ne_u16_e32 vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_ne_i16_e32 vcc, v127, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_u16_e32 vcc, v1.l, v255.l quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:29: error: invalid operand for instruction
 
-v_cmp_ne_i16_e32 vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
+v_cmp_ne_u16_e32 vcc, v127.h, v255.h
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_ne_i16_e32 vcc, v127, v255 quad_perm:[3,2,1,0]
-// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
+v_cmp_ne_u16_e32 vcc, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_ne_i16_e32 vcc, v128, v2
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_u16_e32 vcc, v127.h, v255.h quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_ne_i16_e32 vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
+v_cmp_ne_u16_e32 vcc, v127.l, v255.l
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_ne_i16_e32 vcc, v128, v2 quad_perm:[3,2,1,0]
-// GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
+v_cmp_ne_u16_e32 vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_ne_i16_e32 vcc, vcc_hi, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_u16_e32 vcc, v127.l, v255.l quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_ne_i16_e32 vcc, vcc_lo, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_u16_e32 vcc, v128.h, v2.h
+// GFX12: :[[@LINE-1]]:23: error: invalid operand for instruction
 
-v_cmp_ne_i16_e32 vcc_lo, v1, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_u16_e32 vcc, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:23: error: invalid operand for instruction
 
-v_cmp_ne_i16_e32 vcc_lo, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX12: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_ne_u16_e32 vcc, v128.h, v2.h quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:23: error: invalid operand for instruction
 
-v_cmp_ne_i16_e32 vcc_lo, v1, v255 quad_perm:[3,2,1,0]
-// GFX12: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_ne_u16_e32 vcc, v128.l, v2.l
+// GFX12: :[[@LINE-1]]:23: error: invalid operand for instruction
 
-v_cmp_ne_i16_e32 vcc_lo, v127, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_u16_e32 vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:23: error: invalid operand for instruction
 
-v_cmp_ne_i16_e32 vcc_lo, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX12: :[[@LINE-1]]:37: error: invalid operand for instruction
+v_cmp_ne_u16_e32 vcc, v128.l, v2.l quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:23: error: invalid operand for instruction
 
-v_cmp_ne_i16_e32 vcc_lo, v127, v255 quad_perm:[3,2,1,0]
-// GFX12: :[[@LINE-1]]:37: error: invalid operand for instruction
+v_cmp_ne_u16_e32 vcc, vcc_hi, v255.h
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_ne_i16_e32 vcc_lo, v128, v2
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_u16_e32 vcc, vcc_hi, v255.l
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_ne_i16_e32 vcc_lo, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// GFX12: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_ne_u16_e32 vcc, vcc_lo, v255.h
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_ne_i16_e32 vcc_lo, v128, v2 quad_perm:[3,2,1,0]
-// GFX12: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_ne_u16_e32 vcc, vcc_lo, v255.l
+// GFX12: :[[@LINE-1]]:31: error: invalid operand for instruction
 
-v_cmp_ne_i16_e32 vcc_lo, vcc_hi, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_u16_e32 vcc_lo, v1.h, v255.h
+// GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_ne_i16_e32 vcc_lo, vcc_lo, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_u16_e32 vcc_lo, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_ne_u16_e32 vcc, v1, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_u16_e32 vcc_lo, v1.h, v255.h quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_ne_u16_e32 vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
+v_cmp_ne_u16_e32 vcc_lo, v1.l, v255.l
 // GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_ne_u16_e32 vcc, v1, v255 quad_perm:[3,2,1,0]
+v_cmp_ne_u16_e32 vcc_lo, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
 // GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_ne_u16_e32 vcc, v127, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_u16_e32 vcc_lo, v1.l, v255.l quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
 
-v_cmp_ne_u16_e32 vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
+v_cmp_ne_u16_e32 vcc_lo, v127.h, v255.h
 // GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_ne_u16_e32 vcc, v127, v255 quad_perm:[3,2,1,0]
+v_cmp_ne_u16_e32 vcc_lo, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
 // GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_ne_u16_e32 vcc, v128, v2
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
-
-v_cmp_ne_u16_e32 vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
-
-v_cmp_ne_u16_e32 vcc, v128, v2 quad_perm:[3,2,1,0]
-// GFX12: :[[@LINE-1]]:32: error: invalid operand for instruction
+v_cmp_ne_u16_e32 vcc_lo, v127.h, v255.h quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_ne_u16_e32 vcc, vcc_hi, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_u16_e32 vcc_lo, v127.l, v255.l
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_ne_u16_e32 vcc, vcc_lo, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_u16_e32 vcc_lo, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_ne_u16_e32 vcc_lo, v1, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_u16_e32 vcc_lo, v127.l, v255.l quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_ne_u16_e32 vcc_lo, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX12: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_ne_u16_e32 vcc_lo, v128.h, v2.h
+// GFX12: :[[@LINE-1]]:26: error: invalid operand for instruction
 
-v_cmp_ne_u16_e32 vcc_lo, v1, v255 quad_perm:[3,2,1,0]
-// GFX12: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_ne_u16_e32 vcc_lo, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:26: error: invalid operand for instruction
 
-v_cmp_ne_u16_e32 vcc_lo, v127, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_u16_e32 vcc_lo, v128.h, v2.h quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:26: error: invalid operand for instruction
 
-v_cmp_ne_u16_e32 vcc_lo, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
-// GFX12: :[[@LINE-1]]:37: error: invalid operand for instruction
+v_cmp_ne_u16_e32 vcc_lo, v128.l, v2.l
+// GFX12: :[[@LINE-1]]:26: error: invalid operand for instruction
 
-v_cmp_ne_u16_e32 vcc_lo, v127, v255 quad_perm:[3,2,1,0]
-// GFX12: :[[@LINE-1]]:37: error: invalid operand for instruction
+v_cmp_ne_u16_e32 vcc_lo, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX12: :[[@LINE-1]]:26: error: invalid operand for instruction
 
-v_cmp_ne_u16_e32 vcc_lo, v128, v2
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_u16_e32 vcc_lo, v128.l, v2.l quad_perm:[3,2,1,0]
+// GFX12: :[[@LINE-1]]:26: error: invalid operand for instruction
 
-v_cmp_ne_u16_e32 vcc_lo, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// GFX12: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_ne_u16_e32 vcc_lo, vcc_hi, v255.h
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_ne_u16_e32 vcc_lo, v128, v2 quad_perm:[3,2,1,0]
-// GFX12: :[[@LINE-1]]:35: error: invalid operand for instruction
+v_cmp_ne_u16_e32 vcc_lo, vcc_hi, v255.l
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_ne_u16_e32 vcc_lo, vcc_hi, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_u16_e32 vcc_lo, vcc_lo, v255.h
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
 
-v_cmp_ne_u16_e32 vcc_lo, vcc_lo, v255
-// GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_u16_e32 vcc_lo, vcc_lo, v255.l
+// GFX12: :[[@LINE-1]]:34: error: invalid operand for instruction
 
 v_cmp_neq_f16_e32 vcc, v1, v255
 // GFX12: :[[@LINE-1]]:1: error: operands are not valid for this GPU or mode
diff --git a/llvm/test/MC/AMDGPU/gfx12_asm_vopc_t16_promote.s b/llvm/test/MC/AMDGPU/gfx12_asm_vopc_t16_promote.s
index d37859f2802b81..c3b5f6d1c8e3c0 100644
--- a/llvm/test/MC/AMDGPU/gfx12_asm_vopc_t16_promote.s
+++ b/llvm/test/MC/AMDGPU/gfx12_asm_vopc_t16_promote.s
@@ -1,3 +1,4 @@
+// NOTE: Assertions have been autogenerated by utils/update_mc_test_checks.py UTC_ARGS: --sort --version 5
 ; NOTE: Assertions have been autogenerated by utils/update_mc_test_checks.py UTC_ARGS: --sort --version 5
 // RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1200 -mattr=+wavefrontsize32,+real-true16 -show-encoding %s | FileCheck --check-prefix=W32 %s
 // RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1200 -mattr=+wavefrontsize64,+real-true16 -show-encoding %s | FileCheck --check-prefix=W64 %s
@@ -168,181 +169,357 @@ v_cmp_eq_f16 vcc_lo, vcc_lo, v255
 // W32: v_cmp_eq_f16_e64 vcc_lo, vcc_lo, v255   ; encoding: [0x6a,0x00,0x02,0xd4,0x6a,0xfe,0x03,0x00]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_eq_i16 vcc, v1, v255
-// W64: v_cmp_eq_i16_e64 vcc, v1, v255          ; encoding: [0x6a,0x00,0x32,0xd4,0x01,0xff,0x03,0x00]
-// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_eq_i16 vcc, v1.h, v255.h
+// W64: v_cmp_eq_i16_e64 vcc, v1.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x32,0xd4,0x01,0xff,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_eq_i16 vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_eq_i16_e64_dpp vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x32,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
+v_cmp_eq_i16 vcc, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_eq_i16_e64_dpp vcc, v1.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x32,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_eq_i16 vcc, v1, v255 quad_perm:[3,2,1,0]
-// W64: v_cmp_eq_i16_e64_dpp vcc, v1, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x32,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_eq_i16 vcc, v1.h, v255.h quad_perm:[3,2,1,0]
+// W64: v_cmp_eq_i16_e64_dpp vcc, v1.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x32,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_eq_i16 vcc, v127, v255
-// W64: v_cmp_eq_i16_e64 vcc, v127, v255        ; encoding: [0x6a,0x00,0x32,0xd4,0x7f,0xff,0x03,0x00]
-// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_eq_i16 vcc, v1.l, v255.l
+// W64: v_cmp_eq_i16_e64 vcc, v1.l, v255.l      ; encoding: [0x6a,0x00,0x32,0xd4,0x01,0xff,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_eq_i16 vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_eq_i16_e64_dpp vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x32,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+v_cmp_eq_i16 vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_eq_i16_e64_dpp vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x32,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_eq_i16 vcc, v127, v255 quad_perm:[3,2,1,0]
-// W64: v_cmp_eq_i16_e64_dpp vcc, v127, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x32,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+v_cmp_eq_i16 vcc, v1.l, v255.l quad_perm:[3,2,1,0]
+// W64: v_cmp_eq_i16_e64_dpp vcc, v1.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x32,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_eq_i16 vcc, v128, v2
-// W64: v_cmp_eq_i16_e64 vcc, v128, v2          ; encoding: [0x6a,0x00,0x32,0xd4,0x80,0x05,0x02,0x00]
-// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_eq_i16 vcc, v127.h, v255.h
+// W64: v_cmp_eq_i16_e64 vcc, v127.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x32,0xd4,0x7f,0xff,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_eq_i16 vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_eq_i16_e64_dpp vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+v_cmp_eq_i16 vcc, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_eq_i16_e64_dpp vcc, v127.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x32,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_eq_i16 vcc, v128, v2 quad_perm:[3,2,1,0]
-// W64: v_cmp_eq_i16_e64_dpp vcc, v128, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+v_cmp_eq_i16 vcc, v127.h, v255.h quad_perm:[3,2,1,0]
+// W64: v_cmp_eq_i16_e64_dpp vcc, v127.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x32,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_eq_i16 vcc, vcc_hi, v255
-// W64: v_cmp_eq_i16_e64 vcc, vcc_hi, v255      ; encoding: [0x6a,0x00,0x32,0xd4,0x6b,0xfe,0x03,0x00]
-// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_eq_i16 vcc, v127.l, v255.l
+// W64: v_cmp_eq_i16_e64 vcc, v127.l, v255.l    ; encoding: [0x6a,0x00,0x32,0xd4,0x7f,0xff,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_eq_i16 vcc, vcc_lo, v255
-// W64: v_cmp_eq_i16_e64 vcc, vcc_lo, v255      ; encoding: [0x6a,0x00,0x32,0xd4,0x6a,0xfe,0x03,0x00]
-// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_eq_i16 vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_eq_i16_e64_dpp vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x32,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_eq_i16 vcc_lo, v1, v255
-// W32: v_cmp_eq_i16_e64 vcc_lo, v1, v255       ; encoding: [0x6a,0x00,0x32,0xd4,0x01,0xff,0x03,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_eq_i16 vcc, v127.l, v255.l quad_perm:[3,2,1,0]
+// W64: v_cmp_eq_i16_e64_dpp vcc, v127.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x32,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_eq_i16 vcc, v128.h, v2.h
+// W64: v_cmp_eq_i16_e64 vcc, v128.h, v2.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x32,0xd4,0x80,0x05,0x02,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_eq_i16 vcc, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_eq_i16_e64_dpp vcc, v128.h, v2.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x32,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_eq_i16 vcc, v128.h, v2.h quad_perm:[3,2,1,0]
+// W64: v_cmp_eq_i16_e64_dpp vcc, v128.h, v2.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x32,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_eq_i16 vcc, v128.l, v2.l
+// W64: v_cmp_eq_i16_e64 vcc, v128.l, v2.l      ; encoding: [0x6a,0x00,0x32,0xd4,0x80,0x05,0x02,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_eq_i16 vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_eq_i16_e64_dpp vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_eq_i16 vcc, v128.l, v2.l quad_perm:[3,2,1,0]
+// W64: v_cmp_eq_i16_e64_dpp vcc, v128.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_eq_i16 vcc, vcc_hi, v255.h
+// W64: v_cmp_eq_i16_e64 vcc, vcc_hi, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x32,0xd4,0x6b,0xfe,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_eq_i16 vcc, vcc_hi, v255.l
+// W64: v_cmp_eq_i16_e64 vcc, vcc_hi, v255.l    ; encoding: [0x6a,0x00,0x32,0xd4,0x6b,0xfe,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_eq_i16 vcc, vcc_lo, v255.h
+// W64: v_cmp_eq_i16_e64 vcc, vcc_lo, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x32,0xd4,0x6a,0xfe,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_eq_i16 vcc, vcc_lo, v255.l
+// W64: v_cmp_eq_i16_e64 vcc, vcc_lo, v255.l    ; encoding: [0x6a,0x00,0x32,0xd4,0x6a,0xfe,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_eq_i16 vcc_lo, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_eq_i16_e64_dpp vcc_lo, v1, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x32,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
+v_cmp_eq_i16 vcc_lo, v1.h, v255.h
+// W32: v_cmp_eq_i16_e64 vcc_lo, v1.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x32,0xd4,0x01,0xff,0x03,0x00]
 // W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_eq_i16 vcc_lo, v1, v255 quad_perm:[3,2,1,0]
-// W32: v_cmp_eq_i16_e64_dpp vcc_lo, v1, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x32,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_eq_i16 vcc_lo, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_eq_i16_e64_dpp vcc_lo, v1.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x32,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_eq_i16 vcc_lo, v127, v255
-// W32: v_cmp_eq_i16_e64 vcc_lo, v127, v255     ; encoding: [0x6a,0x00,0x32,0xd4,0x7f,0xff,0x03,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_eq_i16 vcc_lo, v1.h, v255.h quad_perm:[3,2,1,0]
+// W32: v_cmp_eq_i16_e64_dpp vcc_lo, v1.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x32,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_eq_i16 vcc_lo, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_eq_i16_e64_dpp vcc_lo, v127, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x32,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+v_cmp_eq_i16 vcc_lo, v1.l, v255.l
+// W32: v_cmp_eq_i16_e64 vcc_lo, v1.l, v255.l   ; encoding: [0x6a,0x00,0x32,0xd4,0x01,0xff,0x03,0x00]
 // W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_eq_i16 vcc_lo, v127, v255 quad_perm:[3,2,1,0]
-// W32: v_cmp_eq_i16_e64_dpp vcc_lo, v127, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x32,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+v_cmp_eq_i16 vcc_lo, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_eq_i16_e64_dpp vcc_lo, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x32,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_eq_i16 vcc_lo, v128, v2
-// W32: v_cmp_eq_i16_e64 vcc_lo, v128, v2       ; encoding: [0x6a,0x00,0x32,0xd4,0x80,0x05,0x02,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_eq_i16 vcc_lo, v1.l, v255.l quad_perm:[3,2,1,0]
+// W32: v_cmp_eq_i16_e64_dpp vcc_lo, v1.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x32,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_eq_i16 vcc_lo, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_eq_i16_e64_dpp vcc_lo, v128, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+v_cmp_eq_i16 vcc_lo, v127.h, v255.h
+// W32: v_cmp_eq_i16_e64 vcc_lo, v127.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x32,0xd4,0x7f,0xff,0x03,0x00]
 // W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_eq_i16 vcc_lo, v128, v2 quad_perm:[3,2,1,0]
-// W32: v_cmp_eq_i16_e64_dpp vcc_lo, v128, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+v_cmp_eq_i16 vcc_lo, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_eq_i16_e64_dpp vcc_lo, v127.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x32,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_eq_i16 vcc_lo, vcc_hi, v255
-// W32: v_cmp_eq_i16_e64 vcc_lo, vcc_hi, v255   ; encoding: [0x6a,0x00,0x32,0xd4,0x6b,0xfe,0x03,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_eq_i16 vcc_lo, v127.h, v255.h quad_perm:[3,2,1,0]
+// W32: v_cmp_eq_i16_e64_dpp vcc_lo, v127.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x32,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_eq_i16 vcc_lo, vcc_lo, v255
-// W32: v_cmp_eq_i16_e64 vcc_lo, vcc_lo, v255   ; encoding: [0x6a,0x00,0x32,0xd4,0x6a,0xfe,0x03,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_eq_i16 vcc_lo, v127.l, v255.l
+// W32: v_cmp_eq_i16_e64 vcc_lo, v127.l, v255.l ; encoding: [0x6a,0x00,0x32,0xd4,0x7f,0xff,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_eq_u16 vcc, v1, v255
-// W64: v_cmp_eq_u16_e64 vcc, v1, v255          ; encoding: [0x6a,0x00,0x3a,0xd4,0x01,0xff,0x03,0x00]
-// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_eq_i16 vcc_lo, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_eq_i16_e64_dpp vcc_lo, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x32,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_eq_i16 vcc_lo, v127.l, v255.l quad_perm:[3,2,1,0]
+// W32: v_cmp_eq_i16_e64_dpp vcc_lo, v127.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x32,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_eq_i16 vcc_lo, v128.h, v2.h
+// W32: v_cmp_eq_i16_e64 vcc_lo, v128.h, v2.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x32,0xd4,0x80,0x05,0x02,0x00]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_eq_i16 vcc_lo, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_eq_i16_e64_dpp vcc_lo, v128.h, v2.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x32,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_eq_i16 vcc_lo, v128.h, v2.h quad_perm:[3,2,1,0]
+// W32: v_cmp_eq_i16_e64_dpp vcc_lo, v128.h, v2.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x32,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_eq_i16 vcc_lo, v128.l, v2.l
+// W32: v_cmp_eq_i16_e64 vcc_lo, v128.l, v2.l   ; encoding: [0x6a,0x00,0x32,0xd4,0x80,0x05,0x02,0x00]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_eq_i16 vcc_lo, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_eq_i16_e64_dpp vcc_lo, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_eq_i16 vcc_lo, v128.l, v2.l quad_perm:[3,2,1,0]
+// W32: v_cmp_eq_i16_e64_dpp vcc_lo, v128.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_eq_i16 vcc_lo, vcc_hi, v255.h
+// W32: v_cmp_eq_i16_e64 vcc_lo, vcc_hi, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x32,0xd4,0x6b,0xfe,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_eq_i16 vcc_lo, vcc_hi, v255.l
+// W32: v_cmp_eq_i16_e64 vcc_lo, vcc_hi, v255.l ; encoding: [0x6a,0x00,0x32,0xd4,0x6b,0xfe,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_eq_i16 vcc_lo, vcc_lo, v255.h
+// W32: v_cmp_eq_i16_e64 vcc_lo, vcc_lo, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x32,0xd4,0x6a,0xfe,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_eq_i16 vcc_lo, vcc_lo, v255.l
+// W32: v_cmp_eq_i16_e64 vcc_lo, vcc_lo, v255.l ; encoding: [0x6a,0x00,0x32,0xd4,0x6a,0xfe,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_eq_u16 vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_eq_u16_e64_dpp vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3a,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
+v_cmp_eq_u16 vcc, v1.h, v255.h
+// W64: v_cmp_eq_u16_e64 vcc, v1.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x3a,0xd4,0x01,0xff,0x03,0x00]
 // W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_eq_u16 vcc, v1, v255 quad_perm:[3,2,1,0]
-// W64: v_cmp_eq_u16_e64_dpp vcc, v1, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3a,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_eq_u16 vcc, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_eq_u16_e64_dpp vcc, v1.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x3a,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_eq_u16 vcc, v127, v255
-// W64: v_cmp_eq_u16_e64 vcc, v127, v255        ; encoding: [0x6a,0x00,0x3a,0xd4,0x7f,0xff,0x03,0x00]
-// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_eq_u16 vcc, v1.h, v255.h quad_perm:[3,2,1,0]
+// W64: v_cmp_eq_u16_e64_dpp vcc, v1.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x3a,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_eq_u16 vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_eq_u16_e64_dpp vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3a,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+v_cmp_eq_u16 vcc, v1.l, v255.l
+// W64: v_cmp_eq_u16_e64 vcc, v1.l, v255.l      ; encoding: [0x6a,0x00,0x3a,0xd4,0x01,0xff,0x03,0x00]
 // W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_eq_u16 vcc, v127, v255 quad_perm:[3,2,1,0]
-// W64: v_cmp_eq_u16_e64_dpp vcc, v127, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3a,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+v_cmp_eq_u16 vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_eq_u16_e64_dpp vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3a,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_eq_u16 vcc, v128, v2
-// W64: v_cmp_eq_u16_e64 vcc, v128, v2          ; encoding: [0x6a,0x00,0x3a,0xd4,0x80,0x05,0x02,0x00]
-// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_eq_u16 vcc, v1.l, v255.l quad_perm:[3,2,1,0]
+// W64: v_cmp_eq_u16_e64_dpp vcc, v1.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3a,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_eq_u16 vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_eq_u16_e64_dpp vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+v_cmp_eq_u16 vcc, v127.h, v255.h
+// W64: v_cmp_eq_u16_e64 vcc, v127.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x3a,0xd4,0x7f,0xff,0x03,0x00]
 // W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_eq_u16 vcc, v128, v2 quad_perm:[3,2,1,0]
-// W64: v_cmp_eq_u16_e64_dpp vcc, v128, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+v_cmp_eq_u16 vcc, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_eq_u16_e64_dpp vcc, v127.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x3a,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_eq_u16 vcc, vcc_hi, v255
-// W64: v_cmp_eq_u16_e64 vcc, vcc_hi, v255      ; encoding: [0x6a,0x00,0x3a,0xd4,0x6b,0xfe,0x03,0x00]
-// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_eq_u16 vcc, v127.h, v255.h quad_perm:[3,2,1,0]
+// W64: v_cmp_eq_u16_e64_dpp vcc, v127.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x3a,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_eq_u16 vcc, vcc_lo, v255
-// W64: v_cmp_eq_u16_e64 vcc, vcc_lo, v255      ; encoding: [0x6a,0x00,0x3a,0xd4,0x6a,0xfe,0x03,0x00]
-// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_eq_u16 vcc, v127.l, v255.l
+// W64: v_cmp_eq_u16_e64 vcc, v127.l, v255.l    ; encoding: [0x6a,0x00,0x3a,0xd4,0x7f,0xff,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_eq_u16 vcc_lo, v1, v255
-// W32: v_cmp_eq_u16_e64 vcc_lo, v1, v255       ; encoding: [0x6a,0x00,0x3a,0xd4,0x01,0xff,0x03,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_eq_u16 vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_eq_u16_e64_dpp vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3a,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_eq_u16 vcc, v127.l, v255.l quad_perm:[3,2,1,0]
+// W64: v_cmp_eq_u16_e64_dpp vcc, v127.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3a,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_eq_u16 vcc, v128.h, v2.h
+// W64: v_cmp_eq_u16_e64 vcc, v128.h, v2.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x3a,0xd4,0x80,0x05,0x02,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_eq_u16 vcc, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_eq_u16_e64_dpp vcc, v128.h, v2.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_eq_u16 vcc, v128.h, v2.h quad_perm:[3,2,1,0]
+// W64: v_cmp_eq_u16_e64_dpp vcc, v128.h, v2.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_eq_u16 vcc, v128.l, v2.l
+// W64: v_cmp_eq_u16_e64 vcc, v128.l, v2.l      ; encoding: [0x6a,0x00,0x3a,0xd4,0x80,0x05,0x02,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_eq_u16 vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_eq_u16_e64_dpp vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_eq_u16 vcc, v128.l, v2.l quad_perm:[3,2,1,0]
+// W64: v_cmp_eq_u16_e64_dpp vcc, v128.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_eq_u16 vcc, vcc_hi, v255.h
+// W64: v_cmp_eq_u16_e64 vcc, vcc_hi, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x3a,0xd4,0x6b,0xfe,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_eq_u16 vcc, vcc_hi, v255.l
+// W64: v_cmp_eq_u16_e64 vcc, vcc_hi, v255.l    ; encoding: [0x6a,0x00,0x3a,0xd4,0x6b,0xfe,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_eq_u16 vcc, vcc_lo, v255.h
+// W64: v_cmp_eq_u16_e64 vcc, vcc_lo, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x3a,0xd4,0x6a,0xfe,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_eq_u16 vcc, vcc_lo, v255.l
+// W64: v_cmp_eq_u16_e64 vcc, vcc_lo, v255.l    ; encoding: [0x6a,0x00,0x3a,0xd4,0x6a,0xfe,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_eq_u16 vcc_lo, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_eq_u16_e64_dpp vcc_lo, v1, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3a,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
+v_cmp_eq_u16 vcc_lo, v1.h, v255.h
+// W32: v_cmp_eq_u16_e64 vcc_lo, v1.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x3a,0xd4,0x01,0xff,0x03,0x00]
 // W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_eq_u16 vcc_lo, v1, v255 quad_perm:[3,2,1,0]
-// W32: v_cmp_eq_u16_e64_dpp vcc_lo, v1, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3a,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_eq_u16 vcc_lo, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_eq_u16_e64_dpp vcc_lo, v1.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x3a,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_eq_u16 vcc_lo, v127, v255
-// W32: v_cmp_eq_u16_e64 vcc_lo, v127, v255     ; encoding: [0x6a,0x00,0x3a,0xd4,0x7f,0xff,0x03,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_eq_u16 vcc_lo, v1.h, v255.h quad_perm:[3,2,1,0]
+// W32: v_cmp_eq_u16_e64_dpp vcc_lo, v1.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x3a,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_eq_u16 vcc_lo, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_eq_u16_e64_dpp vcc_lo, v127, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3a,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+v_cmp_eq_u16 vcc_lo, v1.l, v255.l
+// W32: v_cmp_eq_u16_e64 vcc_lo, v1.l, v255.l   ; encoding: [0x6a,0x00,0x3a,0xd4,0x01,0xff,0x03,0x00]
 // W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_eq_u16 vcc_lo, v127, v255 quad_perm:[3,2,1,0]
-// W32: v_cmp_eq_u16_e64_dpp vcc_lo, v127, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3a,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+v_cmp_eq_u16 vcc_lo, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_eq_u16_e64_dpp vcc_lo, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3a,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_eq_u16 vcc_lo, v128, v2
-// W32: v_cmp_eq_u16_e64 vcc_lo, v128, v2       ; encoding: [0x6a,0x00,0x3a,0xd4,0x80,0x05,0x02,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_eq_u16 vcc_lo, v1.l, v255.l quad_perm:[3,2,1,0]
+// W32: v_cmp_eq_u16_e64_dpp vcc_lo, v1.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3a,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_eq_u16 vcc_lo, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_eq_u16_e64_dpp vcc_lo, v128, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+v_cmp_eq_u16 vcc_lo, v127.h, v255.h
+// W32: v_cmp_eq_u16_e64 vcc_lo, v127.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x3a,0xd4,0x7f,0xff,0x03,0x00]
 // W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_eq_u16 vcc_lo, v128, v2 quad_perm:[3,2,1,0]
-// W32: v_cmp_eq_u16_e64_dpp vcc_lo, v128, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+v_cmp_eq_u16 vcc_lo, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_eq_u16_e64_dpp vcc_lo, v127.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x3a,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_eq_u16 vcc_lo, vcc_hi, v255
-// W32: v_cmp_eq_u16_e64 vcc_lo, vcc_hi, v255   ; encoding: [0x6a,0x00,0x3a,0xd4,0x6b,0xfe,0x03,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_eq_u16 vcc_lo, v127.h, v255.h quad_perm:[3,2,1,0]
+// W32: v_cmp_eq_u16_e64_dpp vcc_lo, v127.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x3a,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_eq_u16 vcc_lo, vcc_lo, v255
-// W32: v_cmp_eq_u16_e64 vcc_lo, vcc_lo, v255   ; encoding: [0x6a,0x00,0x3a,0xd4,0x6a,0xfe,0x03,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_eq_u16 vcc_lo, v127.l, v255.l
+// W32: v_cmp_eq_u16_e64 vcc_lo, v127.l, v255.l ; encoding: [0x6a,0x00,0x3a,0xd4,0x7f,0xff,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_eq_u16 vcc_lo, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_eq_u16_e64_dpp vcc_lo, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3a,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_eq_u16 vcc_lo, v127.l, v255.l quad_perm:[3,2,1,0]
+// W32: v_cmp_eq_u16_e64_dpp vcc_lo, v127.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3a,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_eq_u16 vcc_lo, v128.h, v2.h
+// W32: v_cmp_eq_u16_e64 vcc_lo, v128.h, v2.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x3a,0xd4,0x80,0x05,0x02,0x00]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_eq_u16 vcc_lo, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_eq_u16_e64_dpp vcc_lo, v128.h, v2.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_eq_u16 vcc_lo, v128.h, v2.h quad_perm:[3,2,1,0]
+// W32: v_cmp_eq_u16_e64_dpp vcc_lo, v128.h, v2.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_eq_u16 vcc_lo, v128.l, v2.l
+// W32: v_cmp_eq_u16_e64 vcc_lo, v128.l, v2.l   ; encoding: [0x6a,0x00,0x3a,0xd4,0x80,0x05,0x02,0x00]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_eq_u16 vcc_lo, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_eq_u16_e64_dpp vcc_lo, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_eq_u16 vcc_lo, v128.l, v2.l quad_perm:[3,2,1,0]
+// W32: v_cmp_eq_u16_e64_dpp vcc_lo, v128.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_eq_u16 vcc_lo, vcc_hi, v255.h
+// W32: v_cmp_eq_u16_e64 vcc_lo, vcc_hi, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x3a,0xd4,0x6b,0xfe,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_eq_u16 vcc_lo, vcc_hi, v255.l
+// W32: v_cmp_eq_u16_e64 vcc_lo, vcc_hi, v255.l ; encoding: [0x6a,0x00,0x3a,0xd4,0x6b,0xfe,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_eq_u16 vcc_lo, vcc_lo, v255.h
+// W32: v_cmp_eq_u16_e64 vcc_lo, vcc_lo, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x3a,0xd4,0x6a,0xfe,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_eq_u16 vcc_lo, vcc_lo, v255.l
+// W32: v_cmp_eq_u16_e64 vcc_lo, vcc_lo, v255.l ; encoding: [0x6a,0x00,0x3a,0xd4,0x6a,0xfe,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
 v_cmp_ge_f16 vcc, v1, v255
 // W64: v_cmp_ge_f16_e64 vcc, v1, v255          ; encoding: [0x6a,0x00,0x06,0xd4,0x01,0xff,0x03,0x00]
@@ -432,181 +609,357 @@ v_cmp_ge_f16 vcc_lo, vcc_lo, v255
 // W32: v_cmp_ge_f16_e64 vcc_lo, vcc_lo, v255   ; encoding: [0x6a,0x00,0x06,0xd4,0x6a,0xfe,0x03,0x00]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_ge_i16 vcc, v1, v255
-// W64: v_cmp_ge_i16_e64 vcc, v1, v255          ; encoding: [0x6a,0x00,0x36,0xd4,0x01,0xff,0x03,0x00]
-// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ge_i16 vcc, v1.h, v255.h
+// W64: v_cmp_ge_i16_e64 vcc, v1.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x36,0xd4,0x01,0xff,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ge_i16 vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_ge_i16_e64_dpp vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x36,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ge_i16 vcc, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_ge_i16_e64_dpp vcc, v1.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x36,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ge_i16 vcc, v1, v255 quad_perm:[3,2,1,0]
-// W64: v_cmp_ge_i16_e64_dpp vcc, v1, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x36,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_ge_i16 vcc, v1.h, v255.h quad_perm:[3,2,1,0]
+// W64: v_cmp_ge_i16_e64_dpp vcc, v1.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x36,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ge_i16 vcc, v127, v255
-// W64: v_cmp_ge_i16_e64 vcc, v127, v255        ; encoding: [0x6a,0x00,0x36,0xd4,0x7f,0xff,0x03,0x00]
-// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ge_i16 vcc, v1.l, v255.l
+// W64: v_cmp_ge_i16_e64 vcc, v1.l, v255.l      ; encoding: [0x6a,0x00,0x36,0xd4,0x01,0xff,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ge_i16 vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_ge_i16_e64_dpp vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x36,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+v_cmp_ge_i16 vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_ge_i16_e64_dpp vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x36,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ge_i16 vcc, v127, v255 quad_perm:[3,2,1,0]
-// W64: v_cmp_ge_i16_e64_dpp vcc, v127, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x36,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+v_cmp_ge_i16 vcc, v1.l, v255.l quad_perm:[3,2,1,0]
+// W64: v_cmp_ge_i16_e64_dpp vcc, v1.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x36,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ge_i16 vcc, v128, v2
-// W64: v_cmp_ge_i16_e64 vcc, v128, v2          ; encoding: [0x6a,0x00,0x36,0xd4,0x80,0x05,0x02,0x00]
-// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ge_i16 vcc, v127.h, v255.h
+// W64: v_cmp_ge_i16_e64 vcc, v127.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x36,0xd4,0x7f,0xff,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ge_i16 vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_ge_i16_e64_dpp vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+v_cmp_ge_i16 vcc, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_ge_i16_e64_dpp vcc, v127.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x36,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ge_i16 vcc, v128, v2 quad_perm:[3,2,1,0]
-// W64: v_cmp_ge_i16_e64_dpp vcc, v128, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+v_cmp_ge_i16 vcc, v127.h, v255.h quad_perm:[3,2,1,0]
+// W64: v_cmp_ge_i16_e64_dpp vcc, v127.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x36,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ge_i16 vcc, vcc_hi, v255
-// W64: v_cmp_ge_i16_e64 vcc, vcc_hi, v255      ; encoding: [0x6a,0x00,0x36,0xd4,0x6b,0xfe,0x03,0x00]
-// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ge_i16 vcc, v127.l, v255.l
+// W64: v_cmp_ge_i16_e64 vcc, v127.l, v255.l    ; encoding: [0x6a,0x00,0x36,0xd4,0x7f,0xff,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ge_i16 vcc, vcc_lo, v255
-// W64: v_cmp_ge_i16_e64 vcc, vcc_lo, v255      ; encoding: [0x6a,0x00,0x36,0xd4,0x6a,0xfe,0x03,0x00]
-// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ge_i16 vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_ge_i16_e64_dpp vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x36,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ge_i16 vcc_lo, v1, v255
-// W32: v_cmp_ge_i16_e64 vcc_lo, v1, v255       ; encoding: [0x6a,0x00,0x36,0xd4,0x01,0xff,0x03,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ge_i16 vcc, v127.l, v255.l quad_perm:[3,2,1,0]
+// W64: v_cmp_ge_i16_e64_dpp vcc, v127.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x36,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ge_i16 vcc, v128.h, v2.h
+// W64: v_cmp_ge_i16_e64 vcc, v128.h, v2.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x36,0xd4,0x80,0x05,0x02,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ge_i16 vcc, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_ge_i16_e64_dpp vcc, v128.h, v2.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x36,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ge_i16 vcc, v128.h, v2.h quad_perm:[3,2,1,0]
+// W64: v_cmp_ge_i16_e64_dpp vcc, v128.h, v2.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x36,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ge_i16 vcc, v128.l, v2.l
+// W64: v_cmp_ge_i16_e64 vcc, v128.l, v2.l      ; encoding: [0x6a,0x00,0x36,0xd4,0x80,0x05,0x02,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ge_i16 vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_ge_i16_e64_dpp vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ge_i16 vcc, v128.l, v2.l quad_perm:[3,2,1,0]
+// W64: v_cmp_ge_i16_e64_dpp vcc, v128.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ge_i16 vcc, vcc_hi, v255.h
+// W64: v_cmp_ge_i16_e64 vcc, vcc_hi, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x36,0xd4,0x6b,0xfe,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ge_i16 vcc, vcc_hi, v255.l
+// W64: v_cmp_ge_i16_e64 vcc, vcc_hi, v255.l    ; encoding: [0x6a,0x00,0x36,0xd4,0x6b,0xfe,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ge_i16 vcc, vcc_lo, v255.h
+// W64: v_cmp_ge_i16_e64 vcc, vcc_lo, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x36,0xd4,0x6a,0xfe,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ge_i16 vcc, vcc_lo, v255.l
+// W64: v_cmp_ge_i16_e64 vcc, vcc_lo, v255.l    ; encoding: [0x6a,0x00,0x36,0xd4,0x6a,0xfe,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ge_i16 vcc_lo, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_ge_i16_e64_dpp vcc_lo, v1, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x36,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ge_i16 vcc_lo, v1.h, v255.h
+// W32: v_cmp_ge_i16_e64 vcc_lo, v1.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x36,0xd4,0x01,0xff,0x03,0x00]
 // W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ge_i16 vcc_lo, v1, v255 quad_perm:[3,2,1,0]
-// W32: v_cmp_ge_i16_e64_dpp vcc_lo, v1, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x36,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_ge_i16 vcc_lo, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_ge_i16_e64_dpp vcc_lo, v1.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x36,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ge_i16 vcc_lo, v127, v255
-// W32: v_cmp_ge_i16_e64 vcc_lo, v127, v255     ; encoding: [0x6a,0x00,0x36,0xd4,0x7f,0xff,0x03,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ge_i16 vcc_lo, v1.h, v255.h quad_perm:[3,2,1,0]
+// W32: v_cmp_ge_i16_e64_dpp vcc_lo, v1.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x36,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ge_i16 vcc_lo, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_ge_i16_e64_dpp vcc_lo, v127, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x36,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+v_cmp_ge_i16 vcc_lo, v1.l, v255.l
+// W32: v_cmp_ge_i16_e64 vcc_lo, v1.l, v255.l   ; encoding: [0x6a,0x00,0x36,0xd4,0x01,0xff,0x03,0x00]
 // W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ge_i16 vcc_lo, v127, v255 quad_perm:[3,2,1,0]
-// W32: v_cmp_ge_i16_e64_dpp vcc_lo, v127, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x36,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+v_cmp_ge_i16 vcc_lo, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_ge_i16_e64_dpp vcc_lo, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x36,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ge_i16 vcc_lo, v128, v2
-// W32: v_cmp_ge_i16_e64 vcc_lo, v128, v2       ; encoding: [0x6a,0x00,0x36,0xd4,0x80,0x05,0x02,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ge_i16 vcc_lo, v1.l, v255.l quad_perm:[3,2,1,0]
+// W32: v_cmp_ge_i16_e64_dpp vcc_lo, v1.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x36,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ge_i16 vcc_lo, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_ge_i16_e64_dpp vcc_lo, v128, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+v_cmp_ge_i16 vcc_lo, v127.h, v255.h
+// W32: v_cmp_ge_i16_e64 vcc_lo, v127.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x36,0xd4,0x7f,0xff,0x03,0x00]
 // W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ge_i16 vcc_lo, v128, v2 quad_perm:[3,2,1,0]
-// W32: v_cmp_ge_i16_e64_dpp vcc_lo, v128, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+v_cmp_ge_i16 vcc_lo, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_ge_i16_e64_dpp vcc_lo, v127.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x36,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ge_i16 vcc_lo, vcc_hi, v255
-// W32: v_cmp_ge_i16_e64 vcc_lo, vcc_hi, v255   ; encoding: [0x6a,0x00,0x36,0xd4,0x6b,0xfe,0x03,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ge_i16 vcc_lo, v127.h, v255.h quad_perm:[3,2,1,0]
+// W32: v_cmp_ge_i16_e64_dpp vcc_lo, v127.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x36,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ge_i16 vcc_lo, vcc_lo, v255
-// W32: v_cmp_ge_i16_e64 vcc_lo, vcc_lo, v255   ; encoding: [0x6a,0x00,0x36,0xd4,0x6a,0xfe,0x03,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ge_i16 vcc_lo, v127.l, v255.l
+// W32: v_cmp_ge_i16_e64 vcc_lo, v127.l, v255.l ; encoding: [0x6a,0x00,0x36,0xd4,0x7f,0xff,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ge_u16 vcc, v1, v255
-// W64: v_cmp_ge_u16_e64 vcc, v1, v255          ; encoding: [0x6a,0x00,0x3e,0xd4,0x01,0xff,0x03,0x00]
-// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ge_i16 vcc_lo, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_ge_i16_e64_dpp vcc_lo, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x36,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ge_i16 vcc_lo, v127.l, v255.l quad_perm:[3,2,1,0]
+// W32: v_cmp_ge_i16_e64_dpp vcc_lo, v127.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x36,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ge_i16 vcc_lo, v128.h, v2.h
+// W32: v_cmp_ge_i16_e64 vcc_lo, v128.h, v2.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x36,0xd4,0x80,0x05,0x02,0x00]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ge_i16 vcc_lo, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_ge_i16_e64_dpp vcc_lo, v128.h, v2.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x36,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ge_i16 vcc_lo, v128.h, v2.h quad_perm:[3,2,1,0]
+// W32: v_cmp_ge_i16_e64_dpp vcc_lo, v128.h, v2.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x36,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ge_i16 vcc_lo, v128.l, v2.l
+// W32: v_cmp_ge_i16_e64 vcc_lo, v128.l, v2.l   ; encoding: [0x6a,0x00,0x36,0xd4,0x80,0x05,0x02,0x00]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ge_i16 vcc_lo, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_ge_i16_e64_dpp vcc_lo, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ge_i16 vcc_lo, v128.l, v2.l quad_perm:[3,2,1,0]
+// W32: v_cmp_ge_i16_e64_dpp vcc_lo, v128.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ge_i16 vcc_lo, vcc_hi, v255.h
+// W32: v_cmp_ge_i16_e64 vcc_lo, vcc_hi, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x36,0xd4,0x6b,0xfe,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ge_i16 vcc_lo, vcc_hi, v255.l
+// W32: v_cmp_ge_i16_e64 vcc_lo, vcc_hi, v255.l ; encoding: [0x6a,0x00,0x36,0xd4,0x6b,0xfe,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ge_i16 vcc_lo, vcc_lo, v255.h
+// W32: v_cmp_ge_i16_e64 vcc_lo, vcc_lo, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x36,0xd4,0x6a,0xfe,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ge_i16 vcc_lo, vcc_lo, v255.l
+// W32: v_cmp_ge_i16_e64 vcc_lo, vcc_lo, v255.l ; encoding: [0x6a,0x00,0x36,0xd4,0x6a,0xfe,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ge_u16 vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_ge_u16_e64_dpp vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3e,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ge_u16 vcc, v1.h, v255.h
+// W64: v_cmp_ge_u16_e64 vcc, v1.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x3e,0xd4,0x01,0xff,0x03,0x00]
 // W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ge_u16 vcc, v1, v255 quad_perm:[3,2,1,0]
-// W64: v_cmp_ge_u16_e64_dpp vcc, v1, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3e,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_ge_u16 vcc, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_ge_u16_e64_dpp vcc, v1.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x3e,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ge_u16 vcc, v127, v255
-// W64: v_cmp_ge_u16_e64 vcc, v127, v255        ; encoding: [0x6a,0x00,0x3e,0xd4,0x7f,0xff,0x03,0x00]
-// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ge_u16 vcc, v1.h, v255.h quad_perm:[3,2,1,0]
+// W64: v_cmp_ge_u16_e64_dpp vcc, v1.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x3e,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ge_u16 vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_ge_u16_e64_dpp vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3e,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+v_cmp_ge_u16 vcc, v1.l, v255.l
+// W64: v_cmp_ge_u16_e64 vcc, v1.l, v255.l      ; encoding: [0x6a,0x00,0x3e,0xd4,0x01,0xff,0x03,0x00]
 // W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ge_u16 vcc, v127, v255 quad_perm:[3,2,1,0]
-// W64: v_cmp_ge_u16_e64_dpp vcc, v127, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3e,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+v_cmp_ge_u16 vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_ge_u16_e64_dpp vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3e,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ge_u16 vcc, v128, v2
-// W64: v_cmp_ge_u16_e64 vcc, v128, v2          ; encoding: [0x6a,0x00,0x3e,0xd4,0x80,0x05,0x02,0x00]
-// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ge_u16 vcc, v1.l, v255.l quad_perm:[3,2,1,0]
+// W64: v_cmp_ge_u16_e64_dpp vcc, v1.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3e,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ge_u16 vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_ge_u16_e64_dpp vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+v_cmp_ge_u16 vcc, v127.h, v255.h
+// W64: v_cmp_ge_u16_e64 vcc, v127.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x3e,0xd4,0x7f,0xff,0x03,0x00]
 // W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ge_u16 vcc, v128, v2 quad_perm:[3,2,1,0]
-// W64: v_cmp_ge_u16_e64_dpp vcc, v128, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+v_cmp_ge_u16 vcc, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_ge_u16_e64_dpp vcc, v127.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x3e,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ge_u16 vcc, vcc_hi, v255
-// W64: v_cmp_ge_u16_e64 vcc, vcc_hi, v255      ; encoding: [0x6a,0x00,0x3e,0xd4,0x6b,0xfe,0x03,0x00]
-// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ge_u16 vcc, v127.h, v255.h quad_perm:[3,2,1,0]
+// W64: v_cmp_ge_u16_e64_dpp vcc, v127.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x3e,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ge_u16 vcc, vcc_lo, v255
-// W64: v_cmp_ge_u16_e64 vcc, vcc_lo, v255      ; encoding: [0x6a,0x00,0x3e,0xd4,0x6a,0xfe,0x03,0x00]
-// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ge_u16 vcc, v127.l, v255.l
+// W64: v_cmp_ge_u16_e64 vcc, v127.l, v255.l    ; encoding: [0x6a,0x00,0x3e,0xd4,0x7f,0xff,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ge_u16 vcc_lo, v1, v255
-// W32: v_cmp_ge_u16_e64 vcc_lo, v1, v255       ; encoding: [0x6a,0x00,0x3e,0xd4,0x01,0xff,0x03,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ge_u16 vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_ge_u16_e64_dpp vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3e,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ge_u16 vcc, v127.l, v255.l quad_perm:[3,2,1,0]
+// W64: v_cmp_ge_u16_e64_dpp vcc, v127.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3e,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ge_u16 vcc, v128.h, v2.h
+// W64: v_cmp_ge_u16_e64 vcc, v128.h, v2.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x3e,0xd4,0x80,0x05,0x02,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ge_u16 vcc, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_ge_u16_e64_dpp vcc, v128.h, v2.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ge_u16 vcc, v128.h, v2.h quad_perm:[3,2,1,0]
+// W64: v_cmp_ge_u16_e64_dpp vcc, v128.h, v2.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ge_u16 vcc, v128.l, v2.l
+// W64: v_cmp_ge_u16_e64 vcc, v128.l, v2.l      ; encoding: [0x6a,0x00,0x3e,0xd4,0x80,0x05,0x02,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ge_u16 vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_ge_u16_e64_dpp vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ge_u16 vcc, v128.l, v2.l quad_perm:[3,2,1,0]
+// W64: v_cmp_ge_u16_e64_dpp vcc, v128.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ge_u16 vcc, vcc_hi, v255.h
+// W64: v_cmp_ge_u16_e64 vcc, vcc_hi, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x3e,0xd4,0x6b,0xfe,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ge_u16 vcc, vcc_hi, v255.l
+// W64: v_cmp_ge_u16_e64 vcc, vcc_hi, v255.l    ; encoding: [0x6a,0x00,0x3e,0xd4,0x6b,0xfe,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ge_u16 vcc, vcc_lo, v255.h
+// W64: v_cmp_ge_u16_e64 vcc, vcc_lo, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x3e,0xd4,0x6a,0xfe,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ge_u16 vcc, vcc_lo, v255.l
+// W64: v_cmp_ge_u16_e64 vcc, vcc_lo, v255.l    ; encoding: [0x6a,0x00,0x3e,0xd4,0x6a,0xfe,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ge_u16 vcc_lo, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_ge_u16_e64_dpp vcc_lo, v1, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3e,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ge_u16 vcc_lo, v1.h, v255.h
+// W32: v_cmp_ge_u16_e64 vcc_lo, v1.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x3e,0xd4,0x01,0xff,0x03,0x00]
 // W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ge_u16 vcc_lo, v1, v255 quad_perm:[3,2,1,0]
-// W32: v_cmp_ge_u16_e64_dpp vcc_lo, v1, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3e,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_ge_u16 vcc_lo, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_ge_u16_e64_dpp vcc_lo, v1.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x3e,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ge_u16 vcc_lo, v127, v255
-// W32: v_cmp_ge_u16_e64 vcc_lo, v127, v255     ; encoding: [0x6a,0x00,0x3e,0xd4,0x7f,0xff,0x03,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ge_u16 vcc_lo, v1.h, v255.h quad_perm:[3,2,1,0]
+// W32: v_cmp_ge_u16_e64_dpp vcc_lo, v1.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x3e,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ge_u16 vcc_lo, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_ge_u16_e64_dpp vcc_lo, v127, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3e,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+v_cmp_ge_u16 vcc_lo, v1.l, v255.l
+// W32: v_cmp_ge_u16_e64 vcc_lo, v1.l, v255.l   ; encoding: [0x6a,0x00,0x3e,0xd4,0x01,0xff,0x03,0x00]
 // W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ge_u16 vcc_lo, v127, v255 quad_perm:[3,2,1,0]
-// W32: v_cmp_ge_u16_e64_dpp vcc_lo, v127, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3e,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+v_cmp_ge_u16 vcc_lo, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_ge_u16_e64_dpp vcc_lo, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3e,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ge_u16 vcc_lo, v128, v2
-// W32: v_cmp_ge_u16_e64 vcc_lo, v128, v2       ; encoding: [0x6a,0x00,0x3e,0xd4,0x80,0x05,0x02,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ge_u16 vcc_lo, v1.l, v255.l quad_perm:[3,2,1,0]
+// W32: v_cmp_ge_u16_e64_dpp vcc_lo, v1.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3e,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ge_u16 vcc_lo, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_ge_u16_e64_dpp vcc_lo, v128, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+v_cmp_ge_u16 vcc_lo, v127.h, v255.h
+// W32: v_cmp_ge_u16_e64 vcc_lo, v127.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x3e,0xd4,0x7f,0xff,0x03,0x00]
 // W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ge_u16 vcc_lo, v128, v2 quad_perm:[3,2,1,0]
-// W32: v_cmp_ge_u16_e64_dpp vcc_lo, v128, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+v_cmp_ge_u16 vcc_lo, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_ge_u16_e64_dpp vcc_lo, v127.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x3e,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ge_u16 vcc_lo, vcc_hi, v255
-// W32: v_cmp_ge_u16_e64 vcc_lo, vcc_hi, v255   ; encoding: [0x6a,0x00,0x3e,0xd4,0x6b,0xfe,0x03,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ge_u16 vcc_lo, v127.h, v255.h quad_perm:[3,2,1,0]
+// W32: v_cmp_ge_u16_e64_dpp vcc_lo, v127.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x3e,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ge_u16 vcc_lo, vcc_lo, v255
-// W32: v_cmp_ge_u16_e64 vcc_lo, vcc_lo, v255   ; encoding: [0x6a,0x00,0x3e,0xd4,0x6a,0xfe,0x03,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ge_u16 vcc_lo, v127.l, v255.l
+// W32: v_cmp_ge_u16_e64 vcc_lo, v127.l, v255.l ; encoding: [0x6a,0x00,0x3e,0xd4,0x7f,0xff,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ge_u16 vcc_lo, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_ge_u16_e64_dpp vcc_lo, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3e,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ge_u16 vcc_lo, v127.l, v255.l quad_perm:[3,2,1,0]
+// W32: v_cmp_ge_u16_e64_dpp vcc_lo, v127.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3e,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ge_u16 vcc_lo, v128.h, v2.h
+// W32: v_cmp_ge_u16_e64 vcc_lo, v128.h, v2.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x3e,0xd4,0x80,0x05,0x02,0x00]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ge_u16 vcc_lo, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_ge_u16_e64_dpp vcc_lo, v128.h, v2.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ge_u16 vcc_lo, v128.h, v2.h quad_perm:[3,2,1,0]
+// W32: v_cmp_ge_u16_e64_dpp vcc_lo, v128.h, v2.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ge_u16 vcc_lo, v128.l, v2.l
+// W32: v_cmp_ge_u16_e64 vcc_lo, v128.l, v2.l   ; encoding: [0x6a,0x00,0x3e,0xd4,0x80,0x05,0x02,0x00]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ge_u16 vcc_lo, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_ge_u16_e64_dpp vcc_lo, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ge_u16 vcc_lo, v128.l, v2.l quad_perm:[3,2,1,0]
+// W32: v_cmp_ge_u16_e64_dpp vcc_lo, v128.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ge_u16 vcc_lo, vcc_hi, v255.h
+// W32: v_cmp_ge_u16_e64 vcc_lo, vcc_hi, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x3e,0xd4,0x6b,0xfe,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ge_u16 vcc_lo, vcc_hi, v255.l
+// W32: v_cmp_ge_u16_e64 vcc_lo, vcc_hi, v255.l ; encoding: [0x6a,0x00,0x3e,0xd4,0x6b,0xfe,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ge_u16 vcc_lo, vcc_lo, v255.h
+// W32: v_cmp_ge_u16_e64 vcc_lo, vcc_lo, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x3e,0xd4,0x6a,0xfe,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ge_u16 vcc_lo, vcc_lo, v255.l
+// W32: v_cmp_ge_u16_e64 vcc_lo, vcc_lo, v255.l ; encoding: [0x6a,0x00,0x3e,0xd4,0x6a,0xfe,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
 v_cmp_gt_f16 vcc, v1, v255
 // W64: v_cmp_gt_f16_e64 vcc, v1, v255          ; encoding: [0x6a,0x00,0x04,0xd4,0x01,0xff,0x03,0x00]
@@ -696,181 +1049,357 @@ v_cmp_gt_f16 vcc_lo, vcc_lo, v255
 // W32: v_cmp_gt_f16_e64 vcc_lo, vcc_lo, v255   ; encoding: [0x6a,0x00,0x04,0xd4,0x6a,0xfe,0x03,0x00]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_gt_i16 vcc, v1, v255
-// W64: v_cmp_gt_i16_e64 vcc, v1, v255          ; encoding: [0x6a,0x00,0x34,0xd4,0x01,0xff,0x03,0x00]
-// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_gt_i16 vcc, v1.h, v255.h
+// W64: v_cmp_gt_i16_e64 vcc, v1.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x34,0xd4,0x01,0xff,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_gt_i16 vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_gt_i16_e64_dpp vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x34,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
+v_cmp_gt_i16 vcc, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_gt_i16_e64_dpp vcc, v1.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x34,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_gt_i16 vcc, v1, v255 quad_perm:[3,2,1,0]
-// W64: v_cmp_gt_i16_e64_dpp vcc, v1, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x34,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_gt_i16 vcc, v1.h, v255.h quad_perm:[3,2,1,0]
+// W64: v_cmp_gt_i16_e64_dpp vcc, v1.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x34,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_gt_i16 vcc, v127, v255
-// W64: v_cmp_gt_i16_e64 vcc, v127, v255        ; encoding: [0x6a,0x00,0x34,0xd4,0x7f,0xff,0x03,0x00]
-// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_gt_i16 vcc, v1.l, v255.l
+// W64: v_cmp_gt_i16_e64 vcc, v1.l, v255.l      ; encoding: [0x6a,0x00,0x34,0xd4,0x01,0xff,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_gt_i16 vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_gt_i16_e64_dpp vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x34,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+v_cmp_gt_i16 vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_gt_i16_e64_dpp vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x34,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_gt_i16 vcc, v127, v255 quad_perm:[3,2,1,0]
-// W64: v_cmp_gt_i16_e64_dpp vcc, v127, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x34,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+v_cmp_gt_i16 vcc, v1.l, v255.l quad_perm:[3,2,1,0]
+// W64: v_cmp_gt_i16_e64_dpp vcc, v1.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x34,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_gt_i16 vcc, v128, v2
-// W64: v_cmp_gt_i16_e64 vcc, v128, v2          ; encoding: [0x6a,0x00,0x34,0xd4,0x80,0x05,0x02,0x00]
-// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_gt_i16 vcc, v127.h, v255.h
+// W64: v_cmp_gt_i16_e64 vcc, v127.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x34,0xd4,0x7f,0xff,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_gt_i16 vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_gt_i16_e64_dpp vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+v_cmp_gt_i16 vcc, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_gt_i16_e64_dpp vcc, v127.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x34,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_gt_i16 vcc, v128, v2 quad_perm:[3,2,1,0]
-// W64: v_cmp_gt_i16_e64_dpp vcc, v128, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+v_cmp_gt_i16 vcc, v127.h, v255.h quad_perm:[3,2,1,0]
+// W64: v_cmp_gt_i16_e64_dpp vcc, v127.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x34,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_gt_i16 vcc, vcc_hi, v255
-// W64: v_cmp_gt_i16_e64 vcc, vcc_hi, v255      ; encoding: [0x6a,0x00,0x34,0xd4,0x6b,0xfe,0x03,0x00]
-// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_gt_i16 vcc, v127.l, v255.l
+// W64: v_cmp_gt_i16_e64 vcc, v127.l, v255.l    ; encoding: [0x6a,0x00,0x34,0xd4,0x7f,0xff,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_gt_i16 vcc, vcc_lo, v255
-// W64: v_cmp_gt_i16_e64 vcc, vcc_lo, v255      ; encoding: [0x6a,0x00,0x34,0xd4,0x6a,0xfe,0x03,0x00]
-// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_gt_i16 vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_gt_i16_e64_dpp vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x34,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_gt_i16 vcc_lo, v1, v255
-// W32: v_cmp_gt_i16_e64 vcc_lo, v1, v255       ; encoding: [0x6a,0x00,0x34,0xd4,0x01,0xff,0x03,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_gt_i16 vcc, v127.l, v255.l quad_perm:[3,2,1,0]
+// W64: v_cmp_gt_i16_e64_dpp vcc, v127.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x34,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_gt_i16 vcc, v128.h, v2.h
+// W64: v_cmp_gt_i16_e64 vcc, v128.h, v2.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x34,0xd4,0x80,0x05,0x02,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_gt_i16 vcc, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_gt_i16_e64_dpp vcc, v128.h, v2.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x34,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_gt_i16 vcc, v128.h, v2.h quad_perm:[3,2,1,0]
+// W64: v_cmp_gt_i16_e64_dpp vcc, v128.h, v2.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x34,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_gt_i16 vcc, v128.l, v2.l
+// W64: v_cmp_gt_i16_e64 vcc, v128.l, v2.l      ; encoding: [0x6a,0x00,0x34,0xd4,0x80,0x05,0x02,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_gt_i16 vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_gt_i16_e64_dpp vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_gt_i16 vcc, v128.l, v2.l quad_perm:[3,2,1,0]
+// W64: v_cmp_gt_i16_e64_dpp vcc, v128.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_gt_i16 vcc, vcc_hi, v255.h
+// W64: v_cmp_gt_i16_e64 vcc, vcc_hi, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x34,0xd4,0x6b,0xfe,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_gt_i16 vcc, vcc_hi, v255.l
+// W64: v_cmp_gt_i16_e64 vcc, vcc_hi, v255.l    ; encoding: [0x6a,0x00,0x34,0xd4,0x6b,0xfe,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_gt_i16 vcc, vcc_lo, v255.h
+// W64: v_cmp_gt_i16_e64 vcc, vcc_lo, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x34,0xd4,0x6a,0xfe,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_gt_i16 vcc, vcc_lo, v255.l
+// W64: v_cmp_gt_i16_e64 vcc, vcc_lo, v255.l    ; encoding: [0x6a,0x00,0x34,0xd4,0x6a,0xfe,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_gt_i16 vcc_lo, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_gt_i16_e64_dpp vcc_lo, v1, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x34,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
+v_cmp_gt_i16 vcc_lo, v1.h, v255.h
+// W32: v_cmp_gt_i16_e64 vcc_lo, v1.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x34,0xd4,0x01,0xff,0x03,0x00]
 // W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_gt_i16 vcc_lo, v1, v255 quad_perm:[3,2,1,0]
-// W32: v_cmp_gt_i16_e64_dpp vcc_lo, v1, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x34,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_gt_i16 vcc_lo, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_gt_i16_e64_dpp vcc_lo, v1.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x34,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_gt_i16 vcc_lo, v127, v255
-// W32: v_cmp_gt_i16_e64 vcc_lo, v127, v255     ; encoding: [0x6a,0x00,0x34,0xd4,0x7f,0xff,0x03,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_gt_i16 vcc_lo, v1.h, v255.h quad_perm:[3,2,1,0]
+// W32: v_cmp_gt_i16_e64_dpp vcc_lo, v1.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x34,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_gt_i16 vcc_lo, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_gt_i16_e64_dpp vcc_lo, v127, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x34,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+v_cmp_gt_i16 vcc_lo, v1.l, v255.l
+// W32: v_cmp_gt_i16_e64 vcc_lo, v1.l, v255.l   ; encoding: [0x6a,0x00,0x34,0xd4,0x01,0xff,0x03,0x00]
 // W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_gt_i16 vcc_lo, v127, v255 quad_perm:[3,2,1,0]
-// W32: v_cmp_gt_i16_e64_dpp vcc_lo, v127, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x34,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+v_cmp_gt_i16 vcc_lo, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_gt_i16_e64_dpp vcc_lo, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x34,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_gt_i16 vcc_lo, v128, v2
-// W32: v_cmp_gt_i16_e64 vcc_lo, v128, v2       ; encoding: [0x6a,0x00,0x34,0xd4,0x80,0x05,0x02,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_gt_i16 vcc_lo, v1.l, v255.l quad_perm:[3,2,1,0]
+// W32: v_cmp_gt_i16_e64_dpp vcc_lo, v1.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x34,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_gt_i16 vcc_lo, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_gt_i16_e64_dpp vcc_lo, v128, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+v_cmp_gt_i16 vcc_lo, v127.h, v255.h
+// W32: v_cmp_gt_i16_e64 vcc_lo, v127.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x34,0xd4,0x7f,0xff,0x03,0x00]
 // W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_gt_i16 vcc_lo, v128, v2 quad_perm:[3,2,1,0]
-// W32: v_cmp_gt_i16_e64_dpp vcc_lo, v128, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+v_cmp_gt_i16 vcc_lo, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_gt_i16_e64_dpp vcc_lo, v127.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x34,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_gt_i16 vcc_lo, vcc_hi, v255
-// W32: v_cmp_gt_i16_e64 vcc_lo, vcc_hi, v255   ; encoding: [0x6a,0x00,0x34,0xd4,0x6b,0xfe,0x03,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_gt_i16 vcc_lo, v127.h, v255.h quad_perm:[3,2,1,0]
+// W32: v_cmp_gt_i16_e64_dpp vcc_lo, v127.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x34,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_gt_i16 vcc_lo, vcc_lo, v255
-// W32: v_cmp_gt_i16_e64 vcc_lo, vcc_lo, v255   ; encoding: [0x6a,0x00,0x34,0xd4,0x6a,0xfe,0x03,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_gt_i16 vcc_lo, v127.l, v255.l
+// W32: v_cmp_gt_i16_e64 vcc_lo, v127.l, v255.l ; encoding: [0x6a,0x00,0x34,0xd4,0x7f,0xff,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_gt_u16 vcc, v1, v255
-// W64: v_cmp_gt_u16_e64 vcc, v1, v255          ; encoding: [0x6a,0x00,0x3c,0xd4,0x01,0xff,0x03,0x00]
-// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_gt_i16 vcc_lo, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_gt_i16_e64_dpp vcc_lo, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x34,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_gt_i16 vcc_lo, v127.l, v255.l quad_perm:[3,2,1,0]
+// W32: v_cmp_gt_i16_e64_dpp vcc_lo, v127.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x34,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_gt_i16 vcc_lo, v128.h, v2.h
+// W32: v_cmp_gt_i16_e64 vcc_lo, v128.h, v2.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x34,0xd4,0x80,0x05,0x02,0x00]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_gt_i16 vcc_lo, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_gt_i16_e64_dpp vcc_lo, v128.h, v2.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x34,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_gt_i16 vcc_lo, v128.h, v2.h quad_perm:[3,2,1,0]
+// W32: v_cmp_gt_i16_e64_dpp vcc_lo, v128.h, v2.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x34,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_gt_i16 vcc_lo, v128.l, v2.l
+// W32: v_cmp_gt_i16_e64 vcc_lo, v128.l, v2.l   ; encoding: [0x6a,0x00,0x34,0xd4,0x80,0x05,0x02,0x00]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_gt_i16 vcc_lo, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_gt_i16_e64_dpp vcc_lo, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_gt_i16 vcc_lo, v128.l, v2.l quad_perm:[3,2,1,0]
+// W32: v_cmp_gt_i16_e64_dpp vcc_lo, v128.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_gt_i16 vcc_lo, vcc_hi, v255.h
+// W32: v_cmp_gt_i16_e64 vcc_lo, vcc_hi, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x34,0xd4,0x6b,0xfe,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_gt_i16 vcc_lo, vcc_hi, v255.l
+// W32: v_cmp_gt_i16_e64 vcc_lo, vcc_hi, v255.l ; encoding: [0x6a,0x00,0x34,0xd4,0x6b,0xfe,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_gt_i16 vcc_lo, vcc_lo, v255.h
+// W32: v_cmp_gt_i16_e64 vcc_lo, vcc_lo, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x34,0xd4,0x6a,0xfe,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_gt_i16 vcc_lo, vcc_lo, v255.l
+// W32: v_cmp_gt_i16_e64 vcc_lo, vcc_lo, v255.l ; encoding: [0x6a,0x00,0x34,0xd4,0x6a,0xfe,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_gt_u16 vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_gt_u16_e64_dpp vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3c,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
+v_cmp_gt_u16 vcc, v1.h, v255.h
+// W64: v_cmp_gt_u16_e64 vcc, v1.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x3c,0xd4,0x01,0xff,0x03,0x00]
 // W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_gt_u16 vcc, v1, v255 quad_perm:[3,2,1,0]
-// W64: v_cmp_gt_u16_e64_dpp vcc, v1, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3c,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_gt_u16 vcc, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_gt_u16_e64_dpp vcc, v1.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x3c,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_gt_u16 vcc, v127, v255
-// W64: v_cmp_gt_u16_e64 vcc, v127, v255        ; encoding: [0x6a,0x00,0x3c,0xd4,0x7f,0xff,0x03,0x00]
-// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_gt_u16 vcc, v1.h, v255.h quad_perm:[3,2,1,0]
+// W64: v_cmp_gt_u16_e64_dpp vcc, v1.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x3c,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_gt_u16 vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_gt_u16_e64_dpp vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3c,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+v_cmp_gt_u16 vcc, v1.l, v255.l
+// W64: v_cmp_gt_u16_e64 vcc, v1.l, v255.l      ; encoding: [0x6a,0x00,0x3c,0xd4,0x01,0xff,0x03,0x00]
 // W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_gt_u16 vcc, v127, v255 quad_perm:[3,2,1,0]
-// W64: v_cmp_gt_u16_e64_dpp vcc, v127, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3c,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+v_cmp_gt_u16 vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_gt_u16_e64_dpp vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3c,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_gt_u16 vcc, v128, v2
-// W64: v_cmp_gt_u16_e64 vcc, v128, v2          ; encoding: [0x6a,0x00,0x3c,0xd4,0x80,0x05,0x02,0x00]
-// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_gt_u16 vcc, v1.l, v255.l quad_perm:[3,2,1,0]
+// W64: v_cmp_gt_u16_e64_dpp vcc, v1.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3c,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_gt_u16 vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_gt_u16_e64_dpp vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+v_cmp_gt_u16 vcc, v127.h, v255.h
+// W64: v_cmp_gt_u16_e64 vcc, v127.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x3c,0xd4,0x7f,0xff,0x03,0x00]
 // W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_gt_u16 vcc, v128, v2 quad_perm:[3,2,1,0]
-// W64: v_cmp_gt_u16_e64_dpp vcc, v128, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+v_cmp_gt_u16 vcc, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_gt_u16_e64_dpp vcc, v127.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x3c,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_gt_u16 vcc, vcc_hi, v255
-// W64: v_cmp_gt_u16_e64 vcc, vcc_hi, v255      ; encoding: [0x6a,0x00,0x3c,0xd4,0x6b,0xfe,0x03,0x00]
-// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_gt_u16 vcc, v127.h, v255.h quad_perm:[3,2,1,0]
+// W64: v_cmp_gt_u16_e64_dpp vcc, v127.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x3c,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_gt_u16 vcc, vcc_lo, v255
-// W64: v_cmp_gt_u16_e64 vcc, vcc_lo, v255      ; encoding: [0x6a,0x00,0x3c,0xd4,0x6a,0xfe,0x03,0x00]
-// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_gt_u16 vcc, v127.l, v255.l
+// W64: v_cmp_gt_u16_e64 vcc, v127.l, v255.l    ; encoding: [0x6a,0x00,0x3c,0xd4,0x7f,0xff,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_gt_u16 vcc_lo, v1, v255
-// W32: v_cmp_gt_u16_e64 vcc_lo, v1, v255       ; encoding: [0x6a,0x00,0x3c,0xd4,0x01,0xff,0x03,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_gt_u16 vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_gt_u16_e64_dpp vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3c,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_gt_u16 vcc, v127.l, v255.l quad_perm:[3,2,1,0]
+// W64: v_cmp_gt_u16_e64_dpp vcc, v127.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3c,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_gt_u16 vcc, v128.h, v2.h
+// W64: v_cmp_gt_u16_e64 vcc, v128.h, v2.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x3c,0xd4,0x80,0x05,0x02,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_gt_u16 vcc, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_gt_u16_e64_dpp vcc, v128.h, v2.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_gt_u16 vcc, v128.h, v2.h quad_perm:[3,2,1,0]
+// W64: v_cmp_gt_u16_e64_dpp vcc, v128.h, v2.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_gt_u16 vcc, v128.l, v2.l
+// W64: v_cmp_gt_u16_e64 vcc, v128.l, v2.l      ; encoding: [0x6a,0x00,0x3c,0xd4,0x80,0x05,0x02,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_gt_u16 vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_gt_u16_e64_dpp vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_gt_u16 vcc, v128.l, v2.l quad_perm:[3,2,1,0]
+// W64: v_cmp_gt_u16_e64_dpp vcc, v128.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_gt_u16 vcc, vcc_hi, v255.h
+// W64: v_cmp_gt_u16_e64 vcc, vcc_hi, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x3c,0xd4,0x6b,0xfe,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_gt_u16 vcc, vcc_hi, v255.l
+// W64: v_cmp_gt_u16_e64 vcc, vcc_hi, v255.l    ; encoding: [0x6a,0x00,0x3c,0xd4,0x6b,0xfe,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_gt_u16 vcc, vcc_lo, v255.h
+// W64: v_cmp_gt_u16_e64 vcc, vcc_lo, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x3c,0xd4,0x6a,0xfe,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_gt_u16 vcc, vcc_lo, v255.l
+// W64: v_cmp_gt_u16_e64 vcc, vcc_lo, v255.l    ; encoding: [0x6a,0x00,0x3c,0xd4,0x6a,0xfe,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_gt_u16 vcc_lo, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_gt_u16_e64_dpp vcc_lo, v1, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3c,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
+v_cmp_gt_u16 vcc_lo, v1.h, v255.h
+// W32: v_cmp_gt_u16_e64 vcc_lo, v1.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x3c,0xd4,0x01,0xff,0x03,0x00]
 // W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_gt_u16 vcc_lo, v1, v255 quad_perm:[3,2,1,0]
-// W32: v_cmp_gt_u16_e64_dpp vcc_lo, v1, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3c,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_gt_u16 vcc_lo, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_gt_u16_e64_dpp vcc_lo, v1.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x3c,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_gt_u16 vcc_lo, v127, v255
-// W32: v_cmp_gt_u16_e64 vcc_lo, v127, v255     ; encoding: [0x6a,0x00,0x3c,0xd4,0x7f,0xff,0x03,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_gt_u16 vcc_lo, v1.h, v255.h quad_perm:[3,2,1,0]
+// W32: v_cmp_gt_u16_e64_dpp vcc_lo, v1.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x3c,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_gt_u16 vcc_lo, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_gt_u16_e64_dpp vcc_lo, v127, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3c,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+v_cmp_gt_u16 vcc_lo, v1.l, v255.l
+// W32: v_cmp_gt_u16_e64 vcc_lo, v1.l, v255.l   ; encoding: [0x6a,0x00,0x3c,0xd4,0x01,0xff,0x03,0x00]
 // W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_gt_u16 vcc_lo, v127, v255 quad_perm:[3,2,1,0]
-// W32: v_cmp_gt_u16_e64_dpp vcc_lo, v127, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3c,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+v_cmp_gt_u16 vcc_lo, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_gt_u16_e64_dpp vcc_lo, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3c,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_gt_u16 vcc_lo, v128, v2
-// W32: v_cmp_gt_u16_e64 vcc_lo, v128, v2       ; encoding: [0x6a,0x00,0x3c,0xd4,0x80,0x05,0x02,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_gt_u16 vcc_lo, v1.l, v255.l quad_perm:[3,2,1,0]
+// W32: v_cmp_gt_u16_e64_dpp vcc_lo, v1.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3c,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_gt_u16 vcc_lo, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_gt_u16_e64_dpp vcc_lo, v128, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+v_cmp_gt_u16 vcc_lo, v127.h, v255.h
+// W32: v_cmp_gt_u16_e64 vcc_lo, v127.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x3c,0xd4,0x7f,0xff,0x03,0x00]
 // W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_gt_u16 vcc_lo, v128, v2 quad_perm:[3,2,1,0]
-// W32: v_cmp_gt_u16_e64_dpp vcc_lo, v128, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+v_cmp_gt_u16 vcc_lo, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_gt_u16_e64_dpp vcc_lo, v127.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x3c,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_gt_u16 vcc_lo, vcc_hi, v255
-// W32: v_cmp_gt_u16_e64 vcc_lo, vcc_hi, v255   ; encoding: [0x6a,0x00,0x3c,0xd4,0x6b,0xfe,0x03,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_gt_u16 vcc_lo, v127.h, v255.h quad_perm:[3,2,1,0]
+// W32: v_cmp_gt_u16_e64_dpp vcc_lo, v127.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x3c,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_gt_u16 vcc_lo, vcc_lo, v255
-// W32: v_cmp_gt_u16_e64 vcc_lo, vcc_lo, v255   ; encoding: [0x6a,0x00,0x3c,0xd4,0x6a,0xfe,0x03,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_gt_u16 vcc_lo, v127.l, v255.l
+// W32: v_cmp_gt_u16_e64 vcc_lo, v127.l, v255.l ; encoding: [0x6a,0x00,0x3c,0xd4,0x7f,0xff,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_gt_u16 vcc_lo, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_gt_u16_e64_dpp vcc_lo, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3c,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_gt_u16 vcc_lo, v127.l, v255.l quad_perm:[3,2,1,0]
+// W32: v_cmp_gt_u16_e64_dpp vcc_lo, v127.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3c,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_gt_u16 vcc_lo, v128.h, v2.h
+// W32: v_cmp_gt_u16_e64 vcc_lo, v128.h, v2.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x3c,0xd4,0x80,0x05,0x02,0x00]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_gt_u16 vcc_lo, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_gt_u16_e64_dpp vcc_lo, v128.h, v2.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_gt_u16 vcc_lo, v128.h, v2.h quad_perm:[3,2,1,0]
+// W32: v_cmp_gt_u16_e64_dpp vcc_lo, v128.h, v2.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_gt_u16 vcc_lo, v128.l, v2.l
+// W32: v_cmp_gt_u16_e64 vcc_lo, v128.l, v2.l   ; encoding: [0x6a,0x00,0x3c,0xd4,0x80,0x05,0x02,0x00]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_gt_u16 vcc_lo, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_gt_u16_e64_dpp vcc_lo, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_gt_u16 vcc_lo, v128.l, v2.l quad_perm:[3,2,1,0]
+// W32: v_cmp_gt_u16_e64_dpp vcc_lo, v128.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_gt_u16 vcc_lo, vcc_hi, v255.h
+// W32: v_cmp_gt_u16_e64 vcc_lo, vcc_hi, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x3c,0xd4,0x6b,0xfe,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_gt_u16 vcc_lo, vcc_hi, v255.l
+// W32: v_cmp_gt_u16_e64 vcc_lo, vcc_hi, v255.l ; encoding: [0x6a,0x00,0x3c,0xd4,0x6b,0xfe,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_gt_u16 vcc_lo, vcc_lo, v255.h
+// W32: v_cmp_gt_u16_e64 vcc_lo, vcc_lo, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x3c,0xd4,0x6a,0xfe,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_gt_u16 vcc_lo, vcc_lo, v255.l
+// W32: v_cmp_gt_u16_e64 vcc_lo, vcc_lo, v255.l ; encoding: [0x6a,0x00,0x3c,0xd4,0x6a,0xfe,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
 v_cmp_le_f16 vcc, v1, v255
 // W64: v_cmp_le_f16_e64 vcc, v1, v255          ; encoding: [0x6a,0x00,0x03,0xd4,0x01,0xff,0x03,0x00]
@@ -960,181 +1489,357 @@ v_cmp_le_f16 vcc_lo, vcc_lo, v255
 // W32: v_cmp_le_f16_e64 vcc_lo, vcc_lo, v255   ; encoding: [0x6a,0x00,0x03,0xd4,0x6a,0xfe,0x03,0x00]
 // W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
 
-v_cmp_le_i16 vcc, v1, v255
-// W64: v_cmp_le_i16_e64 vcc, v1, v255          ; encoding: [0x6a,0x00,0x33,0xd4,0x01,0xff,0x03,0x00]
-// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_le_i16 vcc, v1.h, v255.h
+// W64: v_cmp_le_i16_e64 vcc, v1.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x33,0xd4,0x01,0xff,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_le_i16 vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_le_i16_e64_dpp vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x33,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
+v_cmp_le_i16 vcc, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_le_i16_e64_dpp vcc, v1.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x33,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_le_i16 vcc, v1, v255 quad_perm:[3,2,1,0]
-// W64: v_cmp_le_i16_e64_dpp vcc, v1, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x33,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_le_i16 vcc, v1.h, v255.h quad_perm:[3,2,1,0]
+// W64: v_cmp_le_i16_e64_dpp vcc, v1.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x33,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_le_i16 vcc, v127, v255
-// W64: v_cmp_le_i16_e64 vcc, v127, v255        ; encoding: [0x6a,0x00,0x33,0xd4,0x7f,0xff,0x03,0x00]
-// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_le_i16 vcc, v1.l, v255.l
+// W64: v_cmp_le_i16_e64 vcc, v1.l, v255.l      ; encoding: [0x6a,0x00,0x33,0xd4,0x01,0xff,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_le_i16 vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_le_i16_e64_dpp vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x33,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+v_cmp_le_i16 vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_le_i16_e64_dpp vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x33,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_le_i16 vcc, v127, v255 quad_perm:[3,2,1,0]
-// W64: v_cmp_le_i16_e64_dpp vcc, v127, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x33,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+v_cmp_le_i16 vcc, v1.l, v255.l quad_perm:[3,2,1,0]
+// W64: v_cmp_le_i16_e64_dpp vcc, v1.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x33,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_le_i16 vcc, v128, v2
-// W64: v_cmp_le_i16_e64 vcc, v128, v2          ; encoding: [0x6a,0x00,0x33,0xd4,0x80,0x05,0x02,0x00]
-// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_le_i16 vcc, v127.h, v255.h
+// W64: v_cmp_le_i16_e64 vcc, v127.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x33,0xd4,0x7f,0xff,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_le_i16 vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_le_i16_e64_dpp vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+v_cmp_le_i16 vcc, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_le_i16_e64_dpp vcc, v127.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x33,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_le_i16 vcc, v128, v2 quad_perm:[3,2,1,0]
-// W64: v_cmp_le_i16_e64_dpp vcc, v128, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+v_cmp_le_i16 vcc, v127.h, v255.h quad_perm:[3,2,1,0]
+// W64: v_cmp_le_i16_e64_dpp vcc, v127.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x33,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_le_i16 vcc, vcc_hi, v255
-// W64: v_cmp_le_i16_e64 vcc, vcc_hi, v255      ; encoding: [0x6a,0x00,0x33,0xd4,0x6b,0xfe,0x03,0x00]
-// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_le_i16 vcc, v127.l, v255.l
+// W64: v_cmp_le_i16_e64 vcc, v127.l, v255.l    ; encoding: [0x6a,0x00,0x33,0xd4,0x7f,0xff,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_le_i16 vcc, vcc_lo, v255
-// W64: v_cmp_le_i16_e64 vcc, vcc_lo, v255      ; encoding: [0x6a,0x00,0x33,0xd4,0x6a,0xfe,0x03,0x00]
-// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_le_i16 vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_le_i16_e64_dpp vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x33,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_le_i16 vcc_lo, v1, v255
-// W32: v_cmp_le_i16_e64 vcc_lo, v1, v255       ; encoding: [0x6a,0x00,0x33,0xd4,0x01,0xff,0x03,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_le_i16 vcc, v127.l, v255.l quad_perm:[3,2,1,0]
+// W64: v_cmp_le_i16_e64_dpp vcc, v127.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x33,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_le_i16 vcc, v128.h, v2.h
+// W64: v_cmp_le_i16_e64 vcc, v128.h, v2.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x33,0xd4,0x80,0x05,0x02,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_le_i16 vcc, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_le_i16_e64_dpp vcc, v128.h, v2.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x33,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_le_i16 vcc, v128.h, v2.h quad_perm:[3,2,1,0]
+// W64: v_cmp_le_i16_e64_dpp vcc, v128.h, v2.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x33,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_le_i16 vcc, v128.l, v2.l
+// W64: v_cmp_le_i16_e64 vcc, v128.l, v2.l      ; encoding: [0x6a,0x00,0x33,0xd4,0x80,0x05,0x02,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_le_i16 vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_le_i16_e64_dpp vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_le_i16 vcc, v128.l, v2.l quad_perm:[3,2,1,0]
+// W64: v_cmp_le_i16_e64_dpp vcc, v128.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_le_i16 vcc, vcc_hi, v255.h
+// W64: v_cmp_le_i16_e64 vcc, vcc_hi, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x33,0xd4,0x6b,0xfe,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_le_i16 vcc, vcc_hi, v255.l
+// W64: v_cmp_le_i16_e64 vcc, vcc_hi, v255.l    ; encoding: [0x6a,0x00,0x33,0xd4,0x6b,0xfe,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_le_i16 vcc, vcc_lo, v255.h
+// W64: v_cmp_le_i16_e64 vcc, vcc_lo, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x33,0xd4,0x6a,0xfe,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_le_i16 vcc, vcc_lo, v255.l
+// W64: v_cmp_le_i16_e64 vcc, vcc_lo, v255.l    ; encoding: [0x6a,0x00,0x33,0xd4,0x6a,0xfe,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_le_i16 vcc_lo, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_le_i16_e64_dpp vcc_lo, v1, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x33,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
+v_cmp_le_i16 vcc_lo, v1.h, v255.h
+// W32: v_cmp_le_i16_e64 vcc_lo, v1.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x33,0xd4,0x01,0xff,0x03,0x00]
 // W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_le_i16 vcc_lo, v1, v255 quad_perm:[3,2,1,0]
-// W32: v_cmp_le_i16_e64_dpp vcc_lo, v1, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x33,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_le_i16 vcc_lo, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_le_i16_e64_dpp vcc_lo, v1.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x33,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_le_i16 vcc_lo, v127, v255
-// W32: v_cmp_le_i16_e64 vcc_lo, v127, v255     ; encoding: [0x6a,0x00,0x33,0xd4,0x7f,0xff,0x03,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_le_i16 vcc_lo, v1.h, v255.h quad_perm:[3,2,1,0]
+// W32: v_cmp_le_i16_e64_dpp vcc_lo, v1.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x33,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_le_i16 vcc_lo, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_le_i16_e64_dpp vcc_lo, v127, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x33,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+v_cmp_le_i16 vcc_lo, v1.l, v255.l
+// W32: v_cmp_le_i16_e64 vcc_lo, v1.l, v255.l   ; encoding: [0x6a,0x00,0x33,0xd4,0x01,0xff,0x03,0x00]
 // W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_le_i16 vcc_lo, v127, v255 quad_perm:[3,2,1,0]
-// W32: v_cmp_le_i16_e64_dpp vcc_lo, v127, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x33,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+v_cmp_le_i16 vcc_lo, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_le_i16_e64_dpp vcc_lo, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x33,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_le_i16 vcc_lo, v128, v2
-// W32: v_cmp_le_i16_e64 vcc_lo, v128, v2       ; encoding: [0x6a,0x00,0x33,0xd4,0x80,0x05,0x02,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_le_i16 vcc_lo, v1.l, v255.l quad_perm:[3,2,1,0]
+// W32: v_cmp_le_i16_e64_dpp vcc_lo, v1.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x33,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_le_i16 vcc_lo, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_le_i16_e64_dpp vcc_lo, v128, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+v_cmp_le_i16 vcc_lo, v127.h, v255.h
+// W32: v_cmp_le_i16_e64 vcc_lo, v127.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x33,0xd4,0x7f,0xff,0x03,0x00]
 // W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_le_i16 vcc_lo, v128, v2 quad_perm:[3,2,1,0]
-// W32: v_cmp_le_i16_e64_dpp vcc_lo, v128, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+v_cmp_le_i16 vcc_lo, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_le_i16_e64_dpp vcc_lo, v127.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x33,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_le_i16 vcc_lo, vcc_hi, v255
-// W32: v_cmp_le_i16_e64 vcc_lo, vcc_hi, v255   ; encoding: [0x6a,0x00,0x33,0xd4,0x6b,0xfe,0x03,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_le_i16 vcc_lo, v127.h, v255.h quad_perm:[3,2,1,0]
+// W32: v_cmp_le_i16_e64_dpp vcc_lo, v127.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x33,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_le_i16 vcc_lo, vcc_lo, v255
-// W32: v_cmp_le_i16_e64 vcc_lo, vcc_lo, v255   ; encoding: [0x6a,0x00,0x33,0xd4,0x6a,0xfe,0x03,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_le_i16 vcc_lo, v127.l, v255.l
+// W32: v_cmp_le_i16_e64 vcc_lo, v127.l, v255.l ; encoding: [0x6a,0x00,0x33,0xd4,0x7f,0xff,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_le_u16 vcc, v1, v255
-// W64: v_cmp_le_u16_e64 vcc, v1, v255          ; encoding: [0x6a,0x00,0x3b,0xd4,0x01,0xff,0x03,0x00]
-// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_le_i16 vcc_lo, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_le_i16_e64_dpp vcc_lo, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x33,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_le_i16 vcc_lo, v127.l, v255.l quad_perm:[3,2,1,0]
+// W32: v_cmp_le_i16_e64_dpp vcc_lo, v127.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x33,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_le_i16 vcc_lo, v128.h, v2.h
+// W32: v_cmp_le_i16_e64 vcc_lo, v128.h, v2.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x33,0xd4,0x80,0x05,0x02,0x00]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_le_i16 vcc_lo, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_le_i16_e64_dpp vcc_lo, v128.h, v2.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x33,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_le_i16 vcc_lo, v128.h, v2.h quad_perm:[3,2,1,0]
+// W32: v_cmp_le_i16_e64_dpp vcc_lo, v128.h, v2.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x33,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_le_i16 vcc_lo, v128.l, v2.l
+// W32: v_cmp_le_i16_e64 vcc_lo, v128.l, v2.l   ; encoding: [0x6a,0x00,0x33,0xd4,0x80,0x05,0x02,0x00]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_le_i16 vcc_lo, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_le_i16_e64_dpp vcc_lo, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_le_i16 vcc_lo, v128.l, v2.l quad_perm:[3,2,1,0]
+// W32: v_cmp_le_i16_e64_dpp vcc_lo, v128.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_le_i16 vcc_lo, vcc_hi, v255.h
+// W32: v_cmp_le_i16_e64 vcc_lo, vcc_hi, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x33,0xd4,0x6b,0xfe,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_le_i16 vcc_lo, vcc_hi, v255.l
+// W32: v_cmp_le_i16_e64 vcc_lo, vcc_hi, v255.l ; encoding: [0x6a,0x00,0x33,0xd4,0x6b,0xfe,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_le_i16 vcc_lo, vcc_lo, v255.h
+// W32: v_cmp_le_i16_e64 vcc_lo, vcc_lo, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x33,0xd4,0x6a,0xfe,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_le_i16 vcc_lo, vcc_lo, v255.l
+// W32: v_cmp_le_i16_e64 vcc_lo, vcc_lo, v255.l ; encoding: [0x6a,0x00,0x33,0xd4,0x6a,0xfe,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_le_u16 vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_le_u16_e64_dpp vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3b,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
+v_cmp_le_u16 vcc, v1.h, v255.h
+// W64: v_cmp_le_u16_e64 vcc, v1.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x3b,0xd4,0x01,0xff,0x03,0x00]
 // W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_le_u16 vcc, v1, v255 quad_perm:[3,2,1,0]
-// W64: v_cmp_le_u16_e64_dpp vcc, v1, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3b,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_le_u16 vcc, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_le_u16_e64_dpp vcc, v1.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x3b,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_le_u16 vcc, v127, v255
-// W64: v_cmp_le_u16_e64 vcc, v127, v255        ; encoding: [0x6a,0x00,0x3b,0xd4,0x7f,0xff,0x03,0x00]
-// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_le_u16 vcc, v1.h, v255.h quad_perm:[3,2,1,0]
+// W64: v_cmp_le_u16_e64_dpp vcc, v1.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x3b,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_le_u16 vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_le_u16_e64_dpp vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3b,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+v_cmp_le_u16 vcc, v1.l, v255.l
+// W64: v_cmp_le_u16_e64 vcc, v1.l, v255.l      ; encoding: [0x6a,0x00,0x3b,0xd4,0x01,0xff,0x03,0x00]
 // W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_le_u16 vcc, v127, v255 quad_perm:[3,2,1,0]
-// W64: v_cmp_le_u16_e64_dpp vcc, v127, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3b,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+v_cmp_le_u16 vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_le_u16_e64_dpp vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3b,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_le_u16 vcc, v128, v2
-// W64: v_cmp_le_u16_e64 vcc, v128, v2          ; encoding: [0x6a,0x00,0x3b,0xd4,0x80,0x05,0x02,0x00]
-// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_le_u16 vcc, v1.l, v255.l quad_perm:[3,2,1,0]
+// W64: v_cmp_le_u16_e64_dpp vcc, v1.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3b,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_le_u16 vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_le_u16_e64_dpp vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+v_cmp_le_u16 vcc, v127.h, v255.h
+// W64: v_cmp_le_u16_e64 vcc, v127.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x3b,0xd4,0x7f,0xff,0x03,0x00]
 // W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_le_u16 vcc, v128, v2 quad_perm:[3,2,1,0]
-// W64: v_cmp_le_u16_e64_dpp vcc, v128, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+v_cmp_le_u16 vcc, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_le_u16_e64_dpp vcc, v127.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x3b,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_le_u16 vcc, vcc_hi, v255
-// W64: v_cmp_le_u16_e64 vcc, vcc_hi, v255      ; encoding: [0x6a,0x00,0x3b,0xd4,0x6b,0xfe,0x03,0x00]
-// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_le_u16 vcc, v127.h, v255.h quad_perm:[3,2,1,0]
+// W64: v_cmp_le_u16_e64_dpp vcc, v127.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x3b,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_le_u16 vcc, vcc_lo, v255
-// W64: v_cmp_le_u16_e64 vcc, vcc_lo, v255      ; encoding: [0x6a,0x00,0x3b,0xd4,0x6a,0xfe,0x03,0x00]
-// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_le_u16 vcc, v127.l, v255.l
+// W64: v_cmp_le_u16_e64 vcc, v127.l, v255.l    ; encoding: [0x6a,0x00,0x3b,0xd4,0x7f,0xff,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_le_u16 vcc_lo, v1, v255
-// W32: v_cmp_le_u16_e64 vcc_lo, v1, v255       ; encoding: [0x6a,0x00,0x3b,0xd4,0x01,0xff,0x03,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_le_u16 vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_le_u16_e64_dpp vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3b,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_le_u16 vcc, v127.l, v255.l quad_perm:[3,2,1,0]
+// W64: v_cmp_le_u16_e64_dpp vcc, v127.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3b,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_le_u16 vcc, v128.h, v2.h
+// W64: v_cmp_le_u16_e64 vcc, v128.h, v2.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x3b,0xd4,0x80,0x05,0x02,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_le_u16 vcc, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_le_u16_e64_dpp vcc, v128.h, v2.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_le_u16 vcc, v128.h, v2.h quad_perm:[3,2,1,0]
+// W64: v_cmp_le_u16_e64_dpp vcc, v128.h, v2.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_le_u16 vcc, v128.l, v2.l
+// W64: v_cmp_le_u16_e64 vcc, v128.l, v2.l      ; encoding: [0x6a,0x00,0x3b,0xd4,0x80,0x05,0x02,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_le_u16 vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_le_u16_e64_dpp vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_le_u16 vcc, v128.l, v2.l quad_perm:[3,2,1,0]
+// W64: v_cmp_le_u16_e64_dpp vcc, v128.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_le_u16 vcc, vcc_hi, v255.h
+// W64: v_cmp_le_u16_e64 vcc, vcc_hi, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x3b,0xd4,0x6b,0xfe,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_le_u16 vcc, vcc_hi, v255.l
+// W64: v_cmp_le_u16_e64 vcc, vcc_hi, v255.l    ; encoding: [0x6a,0x00,0x3b,0xd4,0x6b,0xfe,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_le_u16 vcc, vcc_lo, v255.h
+// W64: v_cmp_le_u16_e64 vcc, vcc_lo, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x3b,0xd4,0x6a,0xfe,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_le_u16 vcc, vcc_lo, v255.l
+// W64: v_cmp_le_u16_e64 vcc, vcc_lo, v255.l    ; encoding: [0x6a,0x00,0x3b,0xd4,0x6a,0xfe,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_le_u16 vcc_lo, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_le_u16_e64_dpp vcc_lo, v1, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3b,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
+v_cmp_le_u16 vcc_lo, v1.h, v255.h
+// W32: v_cmp_le_u16_e64 vcc_lo, v1.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x3b,0xd4,0x01,0xff,0x03,0x00]
 // W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_le_u16 vcc_lo, v1, v255 quad_perm:[3,2,1,0]
-// W32: v_cmp_le_u16_e64_dpp vcc_lo, v1, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3b,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_le_u16 vcc_lo, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_le_u16_e64_dpp vcc_lo, v1.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x3b,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_le_u16 vcc_lo, v127, v255
-// W32: v_cmp_le_u16_e64 vcc_lo, v127, v255     ; encoding: [0x6a,0x00,0x3b,0xd4,0x7f,0xff,0x03,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_le_u16 vcc_lo, v1.h, v255.h quad_perm:[3,2,1,0]
+// W32: v_cmp_le_u16_e64_dpp vcc_lo, v1.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x3b,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_le_u16 vcc_lo, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_le_u16_e64_dpp vcc_lo, v127, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3b,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+v_cmp_le_u16 vcc_lo, v1.l, v255.l
+// W32: v_cmp_le_u16_e64 vcc_lo, v1.l, v255.l   ; encoding: [0x6a,0x00,0x3b,0xd4,0x01,0xff,0x03,0x00]
 // W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_le_u16 vcc_lo, v127, v255 quad_perm:[3,2,1,0]
-// W32: v_cmp_le_u16_e64_dpp vcc_lo, v127, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3b,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+v_cmp_le_u16 vcc_lo, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_le_u16_e64_dpp vcc_lo, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3b,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_le_u16 vcc_lo, v128, v2
-// W32: v_cmp_le_u16_e64 vcc_lo, v128, v2       ; encoding: [0x6a,0x00,0x3b,0xd4,0x80,0x05,0x02,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_le_u16 vcc_lo, v1.l, v255.l quad_perm:[3,2,1,0]
+// W32: v_cmp_le_u16_e64_dpp vcc_lo, v1.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3b,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_le_u16 vcc_lo, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_le_u16_e64_dpp vcc_lo, v128, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+v_cmp_le_u16 vcc_lo, v127.h, v255.h
+// W32: v_cmp_le_u16_e64 vcc_lo, v127.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x3b,0xd4,0x7f,0xff,0x03,0x00]
 // W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_le_u16 vcc_lo, v128, v2 quad_perm:[3,2,1,0]
-// W32: v_cmp_le_u16_e64_dpp vcc_lo, v128, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+v_cmp_le_u16 vcc_lo, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_le_u16_e64_dpp vcc_lo, v127.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x3b,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_le_u16 vcc_lo, vcc_hi, v255
-// W32: v_cmp_le_u16_e64 vcc_lo, vcc_hi, v255   ; encoding: [0x6a,0x00,0x3b,0xd4,0x6b,0xfe,0x03,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_le_u16 vcc_lo, v127.h, v255.h quad_perm:[3,2,1,0]
+// W32: v_cmp_le_u16_e64_dpp vcc_lo, v127.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x3b,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_le_u16 vcc_lo, vcc_lo, v255
-// W32: v_cmp_le_u16_e64 vcc_lo, vcc_lo, v255   ; encoding: [0x6a,0x00,0x3b,0xd4,0x6a,0xfe,0x03,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_le_u16 vcc_lo, v127.l, v255.l
+// W32: v_cmp_le_u16_e64 vcc_lo, v127.l, v255.l ; encoding: [0x6a,0x00,0x3b,0xd4,0x7f,0xff,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_le_u16 vcc_lo, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_le_u16_e64_dpp vcc_lo, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3b,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_le_u16 vcc_lo, v127.l, v255.l quad_perm:[3,2,1,0]
+// W32: v_cmp_le_u16_e64_dpp vcc_lo, v127.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3b,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_le_u16 vcc_lo, v128.h, v2.h
+// W32: v_cmp_le_u16_e64 vcc_lo, v128.h, v2.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x3b,0xd4,0x80,0x05,0x02,0x00]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_le_u16 vcc_lo, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_le_u16_e64_dpp vcc_lo, v128.h, v2.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_le_u16 vcc_lo, v128.h, v2.h quad_perm:[3,2,1,0]
+// W32: v_cmp_le_u16_e64_dpp vcc_lo, v128.h, v2.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_le_u16 vcc_lo, v128.l, v2.l
+// W32: v_cmp_le_u16_e64 vcc_lo, v128.l, v2.l   ; encoding: [0x6a,0x00,0x3b,0xd4,0x80,0x05,0x02,0x00]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_le_u16 vcc_lo, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_le_u16_e64_dpp vcc_lo, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_le_u16 vcc_lo, v128.l, v2.l quad_perm:[3,2,1,0]
+// W32: v_cmp_le_u16_e64_dpp vcc_lo, v128.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_le_u16 vcc_lo, vcc_hi, v255.h
+// W32: v_cmp_le_u16_e64 vcc_lo, vcc_hi, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x3b,0xd4,0x6b,0xfe,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_le_u16 vcc_lo, vcc_hi, v255.l
+// W32: v_cmp_le_u16_e64 vcc_lo, vcc_hi, v255.l ; encoding: [0x6a,0x00,0x3b,0xd4,0x6b,0xfe,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_le_u16 vcc_lo, vcc_lo, v255.h
+// W32: v_cmp_le_u16_e64 vcc_lo, vcc_lo, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x3b,0xd4,0x6a,0xfe,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_le_u16 vcc_lo, vcc_lo, v255.l
+// W32: v_cmp_le_u16_e64 vcc_lo, vcc_lo, v255.l ; encoding: [0x6a,0x00,0x3b,0xd4,0x6a,0xfe,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
 v_cmp_lg_f16 vcc, v1, v255
 // W64: v_cmp_lg_f16_e64 vcc, v1, v255          ; encoding: [0x6a,0x00,0x05,0xd4,0x01,0xff,0x03,0x00]
@@ -1400,357 +2105,709 @@ v_cmp_lt_f16 vcc_lo, vcc_lo, v255.l
 // W32: v_cmp_lt_f16_e64 vcc_lo, vcc_lo, v255.l ; encoding: [0x6a,0x00,0x01,0xd4,0x6a,0xfe,0x03,0x00]
 // W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_lt_i16 vcc, v1, v255
-// W64: v_cmp_lt_i16_e64 vcc, v1, v255          ; encoding: [0x6a,0x00,0x31,0xd4,0x01,0xff,0x03,0x00]
-// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_lt_i16 vcc, v1.h, v255.h
+// W64: v_cmp_lt_i16_e64 vcc, v1.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x31,0xd4,0x01,0xff,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_lt_i16 vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_lt_i16_e64_dpp vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x31,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
+v_cmp_lt_i16 vcc, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_lt_i16_e64_dpp vcc, v1.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x31,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_lt_i16 vcc, v1, v255 quad_perm:[3,2,1,0]
-// W64: v_cmp_lt_i16_e64_dpp vcc, v1, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x31,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_lt_i16 vcc, v1.h, v255.h quad_perm:[3,2,1,0]
+// W64: v_cmp_lt_i16_e64_dpp vcc, v1.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x31,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_lt_i16 vcc, v127, v255
-// W64: v_cmp_lt_i16_e64 vcc, v127, v255        ; encoding: [0x6a,0x00,0x31,0xd4,0x7f,0xff,0x03,0x00]
-// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_lt_i16 vcc, v1.l, v255.l
+// W64: v_cmp_lt_i16_e64 vcc, v1.l, v255.l      ; encoding: [0x6a,0x00,0x31,0xd4,0x01,0xff,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_lt_i16 vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_lt_i16_e64_dpp vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x31,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+v_cmp_lt_i16 vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_lt_i16_e64_dpp vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x31,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_lt_i16 vcc, v127, v255 quad_perm:[3,2,1,0]
-// W64: v_cmp_lt_i16_e64_dpp vcc, v127, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x31,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+v_cmp_lt_i16 vcc, v1.l, v255.l quad_perm:[3,2,1,0]
+// W64: v_cmp_lt_i16_e64_dpp vcc, v1.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x31,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_lt_i16 vcc, v128, v2
-// W64: v_cmp_lt_i16_e64 vcc, v128, v2          ; encoding: [0x6a,0x00,0x31,0xd4,0x80,0x05,0x02,0x00]
-// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_lt_i16 vcc, v127.h, v255.h
+// W64: v_cmp_lt_i16_e64 vcc, v127.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x31,0xd4,0x7f,0xff,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_lt_i16 vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_lt_i16_e64_dpp vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+v_cmp_lt_i16 vcc, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_lt_i16_e64_dpp vcc, v127.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x31,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_lt_i16 vcc, v128, v2 quad_perm:[3,2,1,0]
-// W64: v_cmp_lt_i16_e64_dpp vcc, v128, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+v_cmp_lt_i16 vcc, v127.h, v255.h quad_perm:[3,2,1,0]
+// W64: v_cmp_lt_i16_e64_dpp vcc, v127.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x31,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
 // W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_lt_i16 vcc, vcc_hi, v255
-// W64: v_cmp_lt_i16_e64 vcc, vcc_hi, v255      ; encoding: [0x6a,0x00,0x31,0xd4,0x6b,0xfe,0x03,0x00]
-// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_lt_i16 vcc, v127.l, v255.l
+// W64: v_cmp_lt_i16_e64 vcc, v127.l, v255.l    ; encoding: [0x6a,0x00,0x31,0xd4,0x7f,0xff,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_lt_i16 vcc, vcc_lo, v255
-// W64: v_cmp_lt_i16_e64 vcc, vcc_lo, v255      ; encoding: [0x6a,0x00,0x31,0xd4,0x6a,0xfe,0x03,0x00]
-// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_lt_i16 vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_lt_i16_e64_dpp vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x31,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_lt_i16 vcc_lo, v1, v255
-// W32: v_cmp_lt_i16_e64 vcc_lo, v1, v255       ; encoding: [0x6a,0x00,0x31,0xd4,0x01,0xff,0x03,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_lt_i16 vcc, v127.l, v255.l quad_perm:[3,2,1,0]
+// W64: v_cmp_lt_i16_e64_dpp vcc, v127.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x31,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_lt_i16 vcc, v128.h, v2.h
+// W64: v_cmp_lt_i16_e64 vcc, v128.h, v2.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x31,0xd4,0x80,0x05,0x02,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_lt_i16 vcc, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_lt_i16_e64_dpp vcc, v128.h, v2.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x31,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_lt_i16 vcc, v128.h, v2.h quad_perm:[3,2,1,0]
+// W64: v_cmp_lt_i16_e64_dpp vcc, v128.h, v2.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x31,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_lt_i16 vcc, v128.l, v2.l
+// W64: v_cmp_lt_i16_e64 vcc, v128.l, v2.l      ; encoding: [0x6a,0x00,0x31,0xd4,0x80,0x05,0x02,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_lt_i16 vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_lt_i16_e64_dpp vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_lt_i16 vcc, v128.l, v2.l quad_perm:[3,2,1,0]
+// W64: v_cmp_lt_i16_e64_dpp vcc, v128.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_lt_i16 vcc, vcc_hi, v255.h
+// W64: v_cmp_lt_i16_e64 vcc, vcc_hi, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x31,0xd4,0x6b,0xfe,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_lt_i16 vcc, vcc_hi, v255.l
+// W64: v_cmp_lt_i16_e64 vcc, vcc_hi, v255.l    ; encoding: [0x6a,0x00,0x31,0xd4,0x6b,0xfe,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_lt_i16 vcc, vcc_lo, v255.h
+// W64: v_cmp_lt_i16_e64 vcc, vcc_lo, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x31,0xd4,0x6a,0xfe,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_lt_i16 vcc, vcc_lo, v255.l
+// W64: v_cmp_lt_i16_e64 vcc, vcc_lo, v255.l    ; encoding: [0x6a,0x00,0x31,0xd4,0x6a,0xfe,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_lt_i16 vcc_lo, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_lt_i16_e64_dpp vcc_lo, v1, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x31,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
+v_cmp_lt_i16 vcc_lo, v1.h, v255.h
+// W32: v_cmp_lt_i16_e64 vcc_lo, v1.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x31,0xd4,0x01,0xff,0x03,0x00]
 // W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_lt_i16 vcc_lo, v1, v255 quad_perm:[3,2,1,0]
-// W32: v_cmp_lt_i16_e64_dpp vcc_lo, v1, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x31,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_lt_i16 vcc_lo, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_lt_i16_e64_dpp vcc_lo, v1.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x31,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_lt_i16 vcc_lo, v127, v255
-// W32: v_cmp_lt_i16_e64 vcc_lo, v127, v255     ; encoding: [0x6a,0x00,0x31,0xd4,0x7f,0xff,0x03,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_lt_i16 vcc_lo, v1.h, v255.h quad_perm:[3,2,1,0]
+// W32: v_cmp_lt_i16_e64_dpp vcc_lo, v1.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x31,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_lt_i16 vcc_lo, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_lt_i16_e64_dpp vcc_lo, v127, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x31,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+v_cmp_lt_i16 vcc_lo, v1.l, v255.l
+// W32: v_cmp_lt_i16_e64 vcc_lo, v1.l, v255.l   ; encoding: [0x6a,0x00,0x31,0xd4,0x01,0xff,0x03,0x00]
 // W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_lt_i16 vcc_lo, v127, v255 quad_perm:[3,2,1,0]
-// W32: v_cmp_lt_i16_e64_dpp vcc_lo, v127, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x31,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+v_cmp_lt_i16 vcc_lo, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_lt_i16_e64_dpp vcc_lo, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x31,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_lt_i16 vcc_lo, v128, v2
-// W32: v_cmp_lt_i16_e64 vcc_lo, v128, v2       ; encoding: [0x6a,0x00,0x31,0xd4,0x80,0x05,0x02,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_lt_i16 vcc_lo, v1.l, v255.l quad_perm:[3,2,1,0]
+// W32: v_cmp_lt_i16_e64_dpp vcc_lo, v1.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x31,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_lt_i16 vcc_lo, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_lt_i16_e64_dpp vcc_lo, v128, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+v_cmp_lt_i16 vcc_lo, v127.h, v255.h
+// W32: v_cmp_lt_i16_e64 vcc_lo, v127.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x31,0xd4,0x7f,0xff,0x03,0x00]
 // W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_lt_i16 vcc_lo, v128, v2 quad_perm:[3,2,1,0]
-// W32: v_cmp_lt_i16_e64_dpp vcc_lo, v128, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+v_cmp_lt_i16 vcc_lo, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_lt_i16_e64_dpp vcc_lo, v127.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x31,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_lt_i16 vcc_lo, vcc_hi, v255
-// W32: v_cmp_lt_i16_e64 vcc_lo, vcc_hi, v255   ; encoding: [0x6a,0x00,0x31,0xd4,0x6b,0xfe,0x03,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_lt_i16 vcc_lo, v127.h, v255.h quad_perm:[3,2,1,0]
+// W32: v_cmp_lt_i16_e64_dpp vcc_lo, v127.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x31,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_lt_i16 vcc_lo, vcc_lo, v255
-// W32: v_cmp_lt_i16_e64 vcc_lo, vcc_lo, v255   ; encoding: [0x6a,0x00,0x31,0xd4,0x6a,0xfe,0x03,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_lt_i16 vcc_lo, v127.l, v255.l
+// W32: v_cmp_lt_i16_e64 vcc_lo, v127.l, v255.l ; encoding: [0x6a,0x00,0x31,0xd4,0x7f,0xff,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_lt_u16 vcc, v1, v255
-// W64: v_cmp_lt_u16_e64 vcc, v1, v255          ; encoding: [0x6a,0x00,0x39,0xd4,0x01,0xff,0x03,0x00]
-// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_lt_i16 vcc_lo, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_lt_i16_e64_dpp vcc_lo, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x31,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_lt_i16 vcc_lo, v127.l, v255.l quad_perm:[3,2,1,0]
+// W32: v_cmp_lt_i16_e64_dpp vcc_lo, v127.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x31,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_lt_i16 vcc_lo, v128.h, v2.h
+// W32: v_cmp_lt_i16_e64 vcc_lo, v128.h, v2.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x31,0xd4,0x80,0x05,0x02,0x00]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_lt_i16 vcc_lo, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_lt_i16_e64_dpp vcc_lo, v128.h, v2.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x31,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_lt_i16 vcc_lo, v128.h, v2.h quad_perm:[3,2,1,0]
+// W32: v_cmp_lt_i16_e64_dpp vcc_lo, v128.h, v2.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x31,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_lt_i16 vcc_lo, v128.l, v2.l
+// W32: v_cmp_lt_i16_e64 vcc_lo, v128.l, v2.l   ; encoding: [0x6a,0x00,0x31,0xd4,0x80,0x05,0x02,0x00]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_lt_i16 vcc_lo, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_lt_i16_e64_dpp vcc_lo, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_lt_i16 vcc_lo, v128.l, v2.l quad_perm:[3,2,1,0]
+// W32: v_cmp_lt_i16_e64_dpp vcc_lo, v128.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_lt_i16 vcc_lo, vcc_hi, v255.h
+// W32: v_cmp_lt_i16_e64 vcc_lo, vcc_hi, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x31,0xd4,0x6b,0xfe,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_lt_i16 vcc_lo, vcc_hi, v255.l
+// W32: v_cmp_lt_i16_e64 vcc_lo, vcc_hi, v255.l ; encoding: [0x6a,0x00,0x31,0xd4,0x6b,0xfe,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_lt_i16 vcc_lo, vcc_lo, v255.h
+// W32: v_cmp_lt_i16_e64 vcc_lo, vcc_lo, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x31,0xd4,0x6a,0xfe,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_lt_i16 vcc_lo, vcc_lo, v255.l
+// W32: v_cmp_lt_i16_e64 vcc_lo, vcc_lo, v255.l ; encoding: [0x6a,0x00,0x31,0xd4,0x6a,0xfe,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_lt_u16 vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_lt_u16_e64_dpp vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x39,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
+v_cmp_lt_u16 vcc, v1.h, v255.h
+// W64: v_cmp_lt_u16_e64 vcc, v1.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x39,0xd4,0x01,0xff,0x03,0x00]
 // W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_lt_u16 vcc, v1, v255 quad_perm:[3,2,1,0]
-// W64: v_cmp_lt_u16_e64_dpp vcc, v1, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x39,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_lt_u16 vcc, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_lt_u16_e64_dpp vcc, v1.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x39,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_lt_u16 vcc, v127, v255
-// W64: v_cmp_lt_u16_e64 vcc, v127, v255        ; encoding: [0x6a,0x00,0x39,0xd4,0x7f,0xff,0x03,0x00]
-// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_lt_u16 vcc, v1.h, v255.h quad_perm:[3,2,1,0]
+// W64: v_cmp_lt_u16_e64_dpp vcc, v1.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x39,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_lt_u16 vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_lt_u16_e64_dpp vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x39,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+v_cmp_lt_u16 vcc, v1.l, v255.l
+// W64: v_cmp_lt_u16_e64 vcc, v1.l, v255.l      ; encoding: [0x6a,0x00,0x39,0xd4,0x01,0xff,0x03,0x00]
 // W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_lt_u16 vcc, v127, v255 quad_perm:[3,2,1,0]
-// W64: v_cmp_lt_u16_e64_dpp vcc, v127, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x39,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+v_cmp_lt_u16 vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_lt_u16_e64_dpp vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x39,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_lt_u16 vcc, v128, v2
-// W64: v_cmp_lt_u16_e64 vcc, v128, v2          ; encoding: [0x6a,0x00,0x39,0xd4,0x80,0x05,0x02,0x00]
-// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_lt_u16 vcc, v1.l, v255.l quad_perm:[3,2,1,0]
+// W64: v_cmp_lt_u16_e64_dpp vcc, v1.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x39,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_lt_u16 vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_lt_u16_e64_dpp vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+v_cmp_lt_u16 vcc, v127.h, v255.h
+// W64: v_cmp_lt_u16_e64 vcc, v127.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x39,0xd4,0x7f,0xff,0x03,0x00]
 // W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_lt_u16 vcc, v128, v2 quad_perm:[3,2,1,0]
-// W64: v_cmp_lt_u16_e64_dpp vcc, v128, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+v_cmp_lt_u16 vcc, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_lt_u16_e64_dpp vcc, v127.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x39,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_lt_u16 vcc, vcc_hi, v255
-// W64: v_cmp_lt_u16_e64 vcc, vcc_hi, v255      ; encoding: [0x6a,0x00,0x39,0xd4,0x6b,0xfe,0x03,0x00]
-// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_lt_u16 vcc, v127.h, v255.h quad_perm:[3,2,1,0]
+// W64: v_cmp_lt_u16_e64_dpp vcc, v127.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x39,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_lt_u16 vcc, vcc_lo, v255
-// W64: v_cmp_lt_u16_e64 vcc, vcc_lo, v255      ; encoding: [0x6a,0x00,0x39,0xd4,0x6a,0xfe,0x03,0x00]
-// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_lt_u16 vcc, v127.l, v255.l
+// W64: v_cmp_lt_u16_e64 vcc, v127.l, v255.l    ; encoding: [0x6a,0x00,0x39,0xd4,0x7f,0xff,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_lt_u16 vcc_lo, v1, v255
-// W32: v_cmp_lt_u16_e64 vcc_lo, v1, v255       ; encoding: [0x6a,0x00,0x39,0xd4,0x01,0xff,0x03,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_lt_u16 vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_lt_u16_e64_dpp vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x39,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_lt_u16 vcc, v127.l, v255.l quad_perm:[3,2,1,0]
+// W64: v_cmp_lt_u16_e64_dpp vcc, v127.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x39,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_lt_u16 vcc, v128.h, v2.h
+// W64: v_cmp_lt_u16_e64 vcc, v128.h, v2.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x39,0xd4,0x80,0x05,0x02,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_lt_u16 vcc, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_lt_u16_e64_dpp vcc, v128.h, v2.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x39,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_lt_u16 vcc, v128.h, v2.h quad_perm:[3,2,1,0]
+// W64: v_cmp_lt_u16_e64_dpp vcc, v128.h, v2.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x39,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_lt_u16 vcc, v128.l, v2.l
+// W64: v_cmp_lt_u16_e64 vcc, v128.l, v2.l      ; encoding: [0x6a,0x00,0x39,0xd4,0x80,0x05,0x02,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_lt_u16 vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_lt_u16_e64_dpp vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_lt_u16 vcc, v128.l, v2.l quad_perm:[3,2,1,0]
+// W64: v_cmp_lt_u16_e64_dpp vcc, v128.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_lt_u16 vcc, vcc_hi, v255.h
+// W64: v_cmp_lt_u16_e64 vcc, vcc_hi, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x39,0xd4,0x6b,0xfe,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_lt_u16 vcc, vcc_hi, v255.l
+// W64: v_cmp_lt_u16_e64 vcc, vcc_hi, v255.l    ; encoding: [0x6a,0x00,0x39,0xd4,0x6b,0xfe,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_lt_u16 vcc, vcc_lo, v255.h
+// W64: v_cmp_lt_u16_e64 vcc, vcc_lo, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x39,0xd4,0x6a,0xfe,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_lt_u16 vcc, vcc_lo, v255.l
+// W64: v_cmp_lt_u16_e64 vcc, vcc_lo, v255.l    ; encoding: [0x6a,0x00,0x39,0xd4,0x6a,0xfe,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_lt_u16 vcc_lo, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_lt_u16_e64_dpp vcc_lo, v1, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x39,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
+v_cmp_lt_u16 vcc_lo, v1.h, v255.h
+// W32: v_cmp_lt_u16_e64 vcc_lo, v1.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x39,0xd4,0x01,0xff,0x03,0x00]
 // W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_lt_u16 vcc_lo, v1, v255 quad_perm:[3,2,1,0]
-// W32: v_cmp_lt_u16_e64_dpp vcc_lo, v1, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x39,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_lt_u16 vcc_lo, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_lt_u16_e64_dpp vcc_lo, v1.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x39,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_lt_u16 vcc_lo, v127, v255
-// W32: v_cmp_lt_u16_e64 vcc_lo, v127, v255     ; encoding: [0x6a,0x00,0x39,0xd4,0x7f,0xff,0x03,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_lt_u16 vcc_lo, v1.h, v255.h quad_perm:[3,2,1,0]
+// W32: v_cmp_lt_u16_e64_dpp vcc_lo, v1.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x39,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_lt_u16 vcc_lo, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_lt_u16_e64_dpp vcc_lo, v127, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x39,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+v_cmp_lt_u16 vcc_lo, v1.l, v255.l
+// W32: v_cmp_lt_u16_e64 vcc_lo, v1.l, v255.l   ; encoding: [0x6a,0x00,0x39,0xd4,0x01,0xff,0x03,0x00]
 // W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_lt_u16 vcc_lo, v127, v255 quad_perm:[3,2,1,0]
-// W32: v_cmp_lt_u16_e64_dpp vcc_lo, v127, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x39,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+v_cmp_lt_u16 vcc_lo, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_lt_u16_e64_dpp vcc_lo, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x39,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_lt_u16 vcc_lo, v128, v2
-// W32: v_cmp_lt_u16_e64 vcc_lo, v128, v2       ; encoding: [0x6a,0x00,0x39,0xd4,0x80,0x05,0x02,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_lt_u16 vcc_lo, v1.l, v255.l quad_perm:[3,2,1,0]
+// W32: v_cmp_lt_u16_e64_dpp vcc_lo, v1.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x39,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_lt_u16 vcc_lo, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_lt_u16_e64_dpp vcc_lo, v128, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+v_cmp_lt_u16 vcc_lo, v127.h, v255.h
+// W32: v_cmp_lt_u16_e64 vcc_lo, v127.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x39,0xd4,0x7f,0xff,0x03,0x00]
 // W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_lt_u16 vcc_lo, v128, v2 quad_perm:[3,2,1,0]
-// W32: v_cmp_lt_u16_e64_dpp vcc_lo, v128, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+v_cmp_lt_u16 vcc_lo, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_lt_u16_e64_dpp vcc_lo, v127.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x39,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_lt_u16 vcc_lo, vcc_hi, v255
-// W32: v_cmp_lt_u16_e64 vcc_lo, vcc_hi, v255   ; encoding: [0x6a,0x00,0x39,0xd4,0x6b,0xfe,0x03,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_lt_u16 vcc_lo, v127.h, v255.h quad_perm:[3,2,1,0]
+// W32: v_cmp_lt_u16_e64_dpp vcc_lo, v127.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x39,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_lt_u16 vcc_lo, vcc_lo, v255
-// W32: v_cmp_lt_u16_e64 vcc_lo, vcc_lo, v255   ; encoding: [0x6a,0x00,0x39,0xd4,0x6a,0xfe,0x03,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_lt_u16 vcc_lo, v127.l, v255.l
+// W32: v_cmp_lt_u16_e64 vcc_lo, v127.l, v255.l ; encoding: [0x6a,0x00,0x39,0xd4,0x7f,0xff,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ne_i16 vcc, v1, v255
-// W64: v_cmp_ne_i16_e64 vcc, v1, v255          ; encoding: [0x6a,0x00,0x35,0xd4,0x01,0xff,0x03,0x00]
-// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_lt_u16 vcc_lo, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_lt_u16_e64_dpp vcc_lo, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x39,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_lt_u16 vcc_lo, v127.l, v255.l quad_perm:[3,2,1,0]
+// W32: v_cmp_lt_u16_e64_dpp vcc_lo, v127.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x39,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_lt_u16 vcc_lo, v128.h, v2.h
+// W32: v_cmp_lt_u16_e64 vcc_lo, v128.h, v2.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x39,0xd4,0x80,0x05,0x02,0x00]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_lt_u16 vcc_lo, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_lt_u16_e64_dpp vcc_lo, v128.h, v2.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x39,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_lt_u16 vcc_lo, v128.h, v2.h quad_perm:[3,2,1,0]
+// W32: v_cmp_lt_u16_e64_dpp vcc_lo, v128.h, v2.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x39,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_lt_u16 vcc_lo, v128.l, v2.l
+// W32: v_cmp_lt_u16_e64 vcc_lo, v128.l, v2.l   ; encoding: [0x6a,0x00,0x39,0xd4,0x80,0x05,0x02,0x00]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_lt_u16 vcc_lo, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_lt_u16_e64_dpp vcc_lo, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_lt_u16 vcc_lo, v128.l, v2.l quad_perm:[3,2,1,0]
+// W32: v_cmp_lt_u16_e64_dpp vcc_lo, v128.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_lt_u16 vcc_lo, vcc_hi, v255.h
+// W32: v_cmp_lt_u16_e64 vcc_lo, vcc_hi, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x39,0xd4,0x6b,0xfe,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_lt_u16 vcc_lo, vcc_hi, v255.l
+// W32: v_cmp_lt_u16_e64 vcc_lo, vcc_hi, v255.l ; encoding: [0x6a,0x00,0x39,0xd4,0x6b,0xfe,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_lt_u16 vcc_lo, vcc_lo, v255.h
+// W32: v_cmp_lt_u16_e64 vcc_lo, vcc_lo, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x39,0xd4,0x6a,0xfe,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_lt_u16 vcc_lo, vcc_lo, v255.l
+// W32: v_cmp_lt_u16_e64 vcc_lo, vcc_lo, v255.l ; encoding: [0x6a,0x00,0x39,0xd4,0x6a,0xfe,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ne_i16 vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_ne_i16_e64_dpp vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x35,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ne_i16 vcc, v1.h, v255.h
+// W64: v_cmp_ne_i16_e64 vcc, v1.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x35,0xd4,0x01,0xff,0x03,0x00]
 // W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ne_i16 vcc, v1, v255 quad_perm:[3,2,1,0]
-// W64: v_cmp_ne_i16_e64_dpp vcc, v1, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x35,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_ne_i16 vcc, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_ne_i16_e64_dpp vcc, v1.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x35,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ne_i16 vcc, v127, v255
-// W64: v_cmp_ne_i16_e64 vcc, v127, v255        ; encoding: [0x6a,0x00,0x35,0xd4,0x7f,0xff,0x03,0x00]
-// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_i16 vcc, v1.h, v255.h quad_perm:[3,2,1,0]
+// W64: v_cmp_ne_i16_e64_dpp vcc, v1.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x35,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ne_i16 vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_ne_i16_e64_dpp vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x35,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+v_cmp_ne_i16 vcc, v1.l, v255.l
+// W64: v_cmp_ne_i16_e64 vcc, v1.l, v255.l      ; encoding: [0x6a,0x00,0x35,0xd4,0x01,0xff,0x03,0x00]
 // W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ne_i16 vcc, v127, v255 quad_perm:[3,2,1,0]
-// W64: v_cmp_ne_i16_e64_dpp vcc, v127, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x35,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+v_cmp_ne_i16 vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_ne_i16_e64_dpp vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x35,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ne_i16 vcc, v128, v2
-// W64: v_cmp_ne_i16_e64 vcc, v128, v2          ; encoding: [0x6a,0x00,0x35,0xd4,0x80,0x05,0x02,0x00]
-// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_i16 vcc, v1.l, v255.l quad_perm:[3,2,1,0]
+// W64: v_cmp_ne_i16_e64_dpp vcc, v1.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x35,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ne_i16 vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_ne_i16_e64_dpp vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+v_cmp_ne_i16 vcc, v127.h, v255.h
+// W64: v_cmp_ne_i16_e64 vcc, v127.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x35,0xd4,0x7f,0xff,0x03,0x00]
 // W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ne_i16 vcc, v128, v2 quad_perm:[3,2,1,0]
-// W64: v_cmp_ne_i16_e64_dpp vcc, v128, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+v_cmp_ne_i16 vcc, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_ne_i16_e64_dpp vcc, v127.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x35,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ne_i16 vcc, vcc_hi, v255
-// W64: v_cmp_ne_i16_e64 vcc, vcc_hi, v255      ; encoding: [0x6a,0x00,0x35,0xd4,0x6b,0xfe,0x03,0x00]
-// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_i16 vcc, v127.h, v255.h quad_perm:[3,2,1,0]
+// W64: v_cmp_ne_i16_e64_dpp vcc, v127.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x35,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ne_i16 vcc, vcc_lo, v255
-// W64: v_cmp_ne_i16_e64 vcc, vcc_lo, v255      ; encoding: [0x6a,0x00,0x35,0xd4,0x6a,0xfe,0x03,0x00]
-// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_i16 vcc, v127.l, v255.l
+// W64: v_cmp_ne_i16_e64 vcc, v127.l, v255.l    ; encoding: [0x6a,0x00,0x35,0xd4,0x7f,0xff,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ne_i16 vcc_lo, v1, v255
-// W32: v_cmp_ne_i16_e64 vcc_lo, v1, v255       ; encoding: [0x6a,0x00,0x35,0xd4,0x01,0xff,0x03,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_i16 vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_ne_i16_e64_dpp vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x35,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ne_i16 vcc, v127.l, v255.l quad_perm:[3,2,1,0]
+// W64: v_cmp_ne_i16_e64_dpp vcc, v127.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x35,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ne_i16 vcc, v128.h, v2.h
+// W64: v_cmp_ne_i16_e64 vcc, v128.h, v2.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x35,0xd4,0x80,0x05,0x02,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ne_i16 vcc, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_ne_i16_e64_dpp vcc, v128.h, v2.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x35,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ne_i16 vcc, v128.h, v2.h quad_perm:[3,2,1,0]
+// W64: v_cmp_ne_i16_e64_dpp vcc, v128.h, v2.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x35,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ne_i16 vcc, v128.l, v2.l
+// W64: v_cmp_ne_i16_e64 vcc, v128.l, v2.l      ; encoding: [0x6a,0x00,0x35,0xd4,0x80,0x05,0x02,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ne_i16 vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_ne_i16_e64_dpp vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ne_i16 vcc, v128.l, v2.l quad_perm:[3,2,1,0]
+// W64: v_cmp_ne_i16_e64_dpp vcc, v128.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ne_i16 vcc, vcc_hi, v255.h
+// W64: v_cmp_ne_i16_e64 vcc, vcc_hi, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x35,0xd4,0x6b,0xfe,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ne_i16 vcc, vcc_hi, v255.l
+// W64: v_cmp_ne_i16_e64 vcc, vcc_hi, v255.l    ; encoding: [0x6a,0x00,0x35,0xd4,0x6b,0xfe,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ne_i16 vcc, vcc_lo, v255.h
+// W64: v_cmp_ne_i16_e64 vcc, vcc_lo, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x35,0xd4,0x6a,0xfe,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ne_i16 vcc, vcc_lo, v255.l
+// W64: v_cmp_ne_i16_e64 vcc, vcc_lo, v255.l    ; encoding: [0x6a,0x00,0x35,0xd4,0x6a,0xfe,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ne_i16 vcc_lo, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_ne_i16_e64_dpp vcc_lo, v1, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x35,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ne_i16 vcc_lo, v1.h, v255.h
+// W32: v_cmp_ne_i16_e64 vcc_lo, v1.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x35,0xd4,0x01,0xff,0x03,0x00]
 // W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ne_i16 vcc_lo, v1, v255 quad_perm:[3,2,1,0]
-// W32: v_cmp_ne_i16_e64_dpp vcc_lo, v1, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x35,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_ne_i16 vcc_lo, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_ne_i16_e64_dpp vcc_lo, v1.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x35,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ne_i16 vcc_lo, v127, v255
-// W32: v_cmp_ne_i16_e64 vcc_lo, v127, v255     ; encoding: [0x6a,0x00,0x35,0xd4,0x7f,0xff,0x03,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_i16 vcc_lo, v1.h, v255.h quad_perm:[3,2,1,0]
+// W32: v_cmp_ne_i16_e64_dpp vcc_lo, v1.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x35,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ne_i16 vcc_lo, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_ne_i16_e64_dpp vcc_lo, v127, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x35,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+v_cmp_ne_i16 vcc_lo, v1.l, v255.l
+// W32: v_cmp_ne_i16_e64 vcc_lo, v1.l, v255.l   ; encoding: [0x6a,0x00,0x35,0xd4,0x01,0xff,0x03,0x00]
 // W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ne_i16 vcc_lo, v127, v255 quad_perm:[3,2,1,0]
-// W32: v_cmp_ne_i16_e64_dpp vcc_lo, v127, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x35,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+v_cmp_ne_i16 vcc_lo, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_ne_i16_e64_dpp vcc_lo, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x35,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ne_i16 vcc_lo, v128, v2
-// W32: v_cmp_ne_i16_e64 vcc_lo, v128, v2       ; encoding: [0x6a,0x00,0x35,0xd4,0x80,0x05,0x02,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_i16 vcc_lo, v1.l, v255.l quad_perm:[3,2,1,0]
+// W32: v_cmp_ne_i16_e64_dpp vcc_lo, v1.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x35,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ne_i16 vcc_lo, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_ne_i16_e64_dpp vcc_lo, v128, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+v_cmp_ne_i16 vcc_lo, v127.h, v255.h
+// W32: v_cmp_ne_i16_e64 vcc_lo, v127.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x35,0xd4,0x7f,0xff,0x03,0x00]
 // W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ne_i16 vcc_lo, v128, v2 quad_perm:[3,2,1,0]
-// W32: v_cmp_ne_i16_e64_dpp vcc_lo, v128, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+v_cmp_ne_i16 vcc_lo, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_ne_i16_e64_dpp vcc_lo, v127.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x35,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ne_i16 vcc_lo, vcc_hi, v255
-// W32: v_cmp_ne_i16_e64 vcc_lo, vcc_hi, v255   ; encoding: [0x6a,0x00,0x35,0xd4,0x6b,0xfe,0x03,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_i16 vcc_lo, v127.h, v255.h quad_perm:[3,2,1,0]
+// W32: v_cmp_ne_i16_e64_dpp vcc_lo, v127.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x35,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ne_i16 vcc_lo, vcc_lo, v255
-// W32: v_cmp_ne_i16_e64 vcc_lo, vcc_lo, v255   ; encoding: [0x6a,0x00,0x35,0xd4,0x6a,0xfe,0x03,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_i16 vcc_lo, v127.l, v255.l
+// W32: v_cmp_ne_i16_e64 vcc_lo, v127.l, v255.l ; encoding: [0x6a,0x00,0x35,0xd4,0x7f,0xff,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ne_u16 vcc, v1, v255
-// W64: v_cmp_ne_u16_e64 vcc, v1, v255          ; encoding: [0x6a,0x00,0x3d,0xd4,0x01,0xff,0x03,0x00]
-// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_i16 vcc_lo, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_ne_i16_e64_dpp vcc_lo, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x35,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ne_i16 vcc_lo, v127.l, v255.l quad_perm:[3,2,1,0]
+// W32: v_cmp_ne_i16_e64_dpp vcc_lo, v127.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x35,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ne_i16 vcc_lo, v128.h, v2.h
+// W32: v_cmp_ne_i16_e64 vcc_lo, v128.h, v2.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x35,0xd4,0x80,0x05,0x02,0x00]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ne_i16 vcc_lo, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_ne_i16_e64_dpp vcc_lo, v128.h, v2.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x35,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ne_i16 vcc_lo, v128.h, v2.h quad_perm:[3,2,1,0]
+// W32: v_cmp_ne_i16_e64_dpp vcc_lo, v128.h, v2.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x35,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ne_i16 vcc_lo, v128.l, v2.l
+// W32: v_cmp_ne_i16_e64 vcc_lo, v128.l, v2.l   ; encoding: [0x6a,0x00,0x35,0xd4,0x80,0x05,0x02,0x00]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ne_i16 vcc_lo, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_ne_i16_e64_dpp vcc_lo, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ne_i16 vcc_lo, v128.l, v2.l quad_perm:[3,2,1,0]
+// W32: v_cmp_ne_i16_e64_dpp vcc_lo, v128.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ne_i16 vcc_lo, vcc_hi, v255.h
+// W32: v_cmp_ne_i16_e64 vcc_lo, vcc_hi, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x35,0xd4,0x6b,0xfe,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ne_i16 vcc_lo, vcc_hi, v255.l
+// W32: v_cmp_ne_i16_e64 vcc_lo, vcc_hi, v255.l ; encoding: [0x6a,0x00,0x35,0xd4,0x6b,0xfe,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ne_i16 vcc_lo, vcc_lo, v255.h
+// W32: v_cmp_ne_i16_e64 vcc_lo, vcc_lo, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x35,0xd4,0x6a,0xfe,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ne_i16 vcc_lo, vcc_lo, v255.l
+// W32: v_cmp_ne_i16_e64 vcc_lo, vcc_lo, v255.l ; encoding: [0x6a,0x00,0x35,0xd4,0x6a,0xfe,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ne_u16 vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_ne_u16_e64_dpp vcc, v1, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3d,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ne_u16 vcc, v1.h, v255.h
+// W64: v_cmp_ne_u16_e64 vcc, v1.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x3d,0xd4,0x01,0xff,0x03,0x00]
 // W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ne_u16 vcc, v1, v255 quad_perm:[3,2,1,0]
-// W64: v_cmp_ne_u16_e64_dpp vcc, v1, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3d,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_ne_u16 vcc, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_ne_u16_e64_dpp vcc, v1.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x3d,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ne_u16 vcc, v127, v255
-// W64: v_cmp_ne_u16_e64 vcc, v127, v255        ; encoding: [0x6a,0x00,0x3d,0xd4,0x7f,0xff,0x03,0x00]
-// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_u16 vcc, v1.h, v255.h quad_perm:[3,2,1,0]
+// W64: v_cmp_ne_u16_e64_dpp vcc, v1.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x3d,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ne_u16 vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_ne_u16_e64_dpp vcc, v127, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3d,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+v_cmp_ne_u16 vcc, v1.l, v255.l
+// W64: v_cmp_ne_u16_e64 vcc, v1.l, v255.l      ; encoding: [0x6a,0x00,0x3d,0xd4,0x01,0xff,0x03,0x00]
 // W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ne_u16 vcc, v127, v255 quad_perm:[3,2,1,0]
-// W64: v_cmp_ne_u16_e64_dpp vcc, v127, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3d,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+v_cmp_ne_u16 vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_ne_u16_e64_dpp vcc, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3d,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ne_u16 vcc, v128, v2
-// W64: v_cmp_ne_u16_e64 vcc, v128, v2          ; encoding: [0x6a,0x00,0x3d,0xd4,0x80,0x05,0x02,0x00]
-// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_u16 vcc, v1.l, v255.l quad_perm:[3,2,1,0]
+// W64: v_cmp_ne_u16_e64_dpp vcc, v1.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3d,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ne_u16 vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W64: v_cmp_ne_u16_e64_dpp vcc, v128, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+v_cmp_ne_u16 vcc, v127.h, v255.h
+// W64: v_cmp_ne_u16_e64 vcc, v127.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x3d,0xd4,0x7f,0xff,0x03,0x00]
 // W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ne_u16 vcc, v128, v2 quad_perm:[3,2,1,0]
-// W64: v_cmp_ne_u16_e64_dpp vcc, v128, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+v_cmp_ne_u16 vcc, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_ne_u16_e64_dpp vcc, v127.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x3d,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
 // W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ne_u16 vcc, vcc_hi, v255
-// W64: v_cmp_ne_u16_e64 vcc, vcc_hi, v255      ; encoding: [0x6a,0x00,0x3d,0xd4,0x6b,0xfe,0x03,0x00]
-// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_u16 vcc, v127.h, v255.h quad_perm:[3,2,1,0]
+// W64: v_cmp_ne_u16_e64_dpp vcc, v127.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x3d,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ne_u16 vcc, vcc_lo, v255
-// W64: v_cmp_ne_u16_e64 vcc, vcc_lo, v255      ; encoding: [0x6a,0x00,0x3d,0xd4,0x6a,0xfe,0x03,0x00]
-// W32-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_u16 vcc, v127.l, v255.l
+// W64: v_cmp_ne_u16_e64 vcc, v127.l, v255.l    ; encoding: [0x6a,0x00,0x3d,0xd4,0x7f,0xff,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ne_u16 vcc_lo, v1, v255
-// W32: v_cmp_ne_u16_e64 vcc_lo, v1, v255       ; encoding: [0x6a,0x00,0x3d,0xd4,0x01,0xff,0x03,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_u16 vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_ne_u16_e64_dpp vcc, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3d,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ne_u16 vcc, v127.l, v255.l quad_perm:[3,2,1,0]
+// W64: v_cmp_ne_u16_e64_dpp vcc, v127.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3d,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ne_u16 vcc, v128.h, v2.h
+// W64: v_cmp_ne_u16_e64 vcc, v128.h, v2.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x3d,0xd4,0x80,0x05,0x02,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ne_u16 vcc, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_ne_u16_e64_dpp vcc, v128.h, v2.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ne_u16 vcc, v128.h, v2.h quad_perm:[3,2,1,0]
+// W64: v_cmp_ne_u16_e64_dpp vcc, v128.h, v2.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ne_u16 vcc, v128.l, v2.l
+// W64: v_cmp_ne_u16_e64 vcc, v128.l, v2.l      ; encoding: [0x6a,0x00,0x3d,0xd4,0x80,0x05,0x02,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ne_u16 vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W64: v_cmp_ne_u16_e64_dpp vcc, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ne_u16 vcc, v128.l, v2.l quad_perm:[3,2,1,0]
+// W64: v_cmp_ne_u16_e64_dpp vcc, v128.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ne_u16 vcc, vcc_hi, v255.h
+// W64: v_cmp_ne_u16_e64 vcc, vcc_hi, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x3d,0xd4,0x6b,0xfe,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ne_u16 vcc, vcc_hi, v255.l
+// W64: v_cmp_ne_u16_e64 vcc, vcc_hi, v255.l    ; encoding: [0x6a,0x00,0x3d,0xd4,0x6b,0xfe,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ne_u16 vcc, vcc_lo, v255.h
+// W64: v_cmp_ne_u16_e64 vcc, vcc_lo, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x3d,0xd4,0x6a,0xfe,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ne_u16 vcc, vcc_lo, v255.l
+// W64: v_cmp_ne_u16_e64 vcc, vcc_lo, v255.l    ; encoding: [0x6a,0x00,0x3d,0xd4,0x6a,0xfe,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ne_u16 vcc_lo, v1, v255 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_ne_u16_e64_dpp vcc_lo, v1, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3d,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
+v_cmp_ne_u16 vcc_lo, v1.h, v255.h
+// W32: v_cmp_ne_u16_e64 vcc_lo, v1.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x3d,0xd4,0x01,0xff,0x03,0x00]
 // W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ne_u16 vcc_lo, v1, v255 quad_perm:[3,2,1,0]
-// W32: v_cmp_ne_u16_e64_dpp vcc_lo, v1, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3d,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+v_cmp_ne_u16 vcc_lo, v1.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_ne_u16_e64_dpp vcc_lo, v1.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x3d,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ne_u16 vcc_lo, v127, v255
-// W32: v_cmp_ne_u16_e64 vcc_lo, v127, v255     ; encoding: [0x6a,0x00,0x3d,0xd4,0x7f,0xff,0x03,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_u16 vcc_lo, v1.h, v255.h quad_perm:[3,2,1,0]
+// W32: v_cmp_ne_u16_e64_dpp vcc_lo, v1.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x3d,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ne_u16 vcc_lo, v127, v255 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_ne_u16_e64_dpp vcc_lo, v127, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3d,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+v_cmp_ne_u16 vcc_lo, v1.l, v255.l
+// W32: v_cmp_ne_u16_e64 vcc_lo, v1.l, v255.l   ; encoding: [0x6a,0x00,0x3d,0xd4,0x01,0xff,0x03,0x00]
 // W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ne_u16 vcc_lo, v127, v255 quad_perm:[3,2,1,0]
-// W32: v_cmp_ne_u16_e64_dpp vcc_lo, v127, v255 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3d,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+v_cmp_ne_u16 vcc_lo, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_ne_u16_e64_dpp vcc_lo, v1.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3d,0xd4,0xe9,0xfe,0x03,0x00,0x01,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ne_u16 vcc_lo, v128, v2
-// W32: v_cmp_ne_u16_e64 vcc_lo, v128, v2       ; encoding: [0x6a,0x00,0x3d,0xd4,0x80,0x05,0x02,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_u16 vcc_lo, v1.l, v255.l quad_perm:[3,2,1,0]
+// W32: v_cmp_ne_u16_e64_dpp vcc_lo, v1.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3d,0xd4,0xfa,0xfe,0x03,0x00,0x01,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ne_u16 vcc_lo, v128, v2 dpp8:[7,6,5,4,3,2,1,0]
-// W32: v_cmp_ne_u16_e64_dpp vcc_lo, v128, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+v_cmp_ne_u16 vcc_lo, v127.h, v255.h
+// W32: v_cmp_ne_u16_e64 vcc_lo, v127.h, v255.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x3d,0xd4,0x7f,0xff,0x03,0x00]
 // W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ne_u16 vcc_lo, v128, v2 quad_perm:[3,2,1,0]
-// W32: v_cmp_ne_u16_e64_dpp vcc_lo, v128, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+v_cmp_ne_u16 vcc_lo, v127.h, v255.h dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_ne_u16_e64_dpp vcc_lo, v127.h, v255.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x3d,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
 // W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ne_u16 vcc_lo, vcc_hi, v255
-// W32: v_cmp_ne_u16_e64 vcc_lo, vcc_hi, v255   ; encoding: [0x6a,0x00,0x3d,0xd4,0x6b,0xfe,0x03,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_u16 vcc_lo, v127.h, v255.h quad_perm:[3,2,1,0]
+// W32: v_cmp_ne_u16_e64_dpp vcc_lo, v127.h, v255.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x3d,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
-v_cmp_ne_u16 vcc_lo, vcc_lo, v255
-// W32: v_cmp_ne_u16_e64 vcc_lo, vcc_lo, v255   ; encoding: [0x6a,0x00,0x3d,0xd4,0x6a,0xfe,0x03,0x00]
-// W64-ERR: :[[@LINE-2]]:1: error: operands are not valid for this GPU or mode
+v_cmp_ne_u16 vcc_lo, v127.l, v255.l
+// W32: v_cmp_ne_u16_e64 vcc_lo, v127.l, v255.l ; encoding: [0x6a,0x00,0x3d,0xd4,0x7f,0xff,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ne_u16 vcc_lo, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_ne_u16_e64_dpp vcc_lo, v127.l, v255.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3d,0xd4,0xe9,0xfe,0x03,0x00,0x7f,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ne_u16 vcc_lo, v127.l, v255.l quad_perm:[3,2,1,0]
+// W32: v_cmp_ne_u16_e64_dpp vcc_lo, v127.l, v255.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3d,0xd4,0xfa,0xfe,0x03,0x00,0x7f,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ne_u16 vcc_lo, v128.h, v2.h
+// W32: v_cmp_ne_u16_e64 vcc_lo, v128.h, v2.h op_sel:[1,1,0] ; encoding: [0x6a,0x18,0x3d,0xd4,0x80,0x05,0x02,0x00]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ne_u16 vcc_lo, v128.h, v2.h dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_ne_u16_e64_dpp vcc_lo, v128.h, v2.h op_sel:[1,1] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x18,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ne_u16 vcc_lo, v128.h, v2.h quad_perm:[3,2,1,0]
+// W32: v_cmp_ne_u16_e64_dpp vcc_lo, v128.h, v2.h op_sel:[1,1] quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x18,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ne_u16 vcc_lo, v128.l, v2.l
+// W32: v_cmp_ne_u16_e64 vcc_lo, v128.l, v2.l   ; encoding: [0x6a,0x00,0x3d,0xd4,0x80,0x05,0x02,0x00]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ne_u16 vcc_lo, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0]
+// W32: v_cmp_ne_u16_e64_dpp vcc_lo, v128.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x80,0x77,0x39,0x05]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ne_u16 vcc_lo, v128.l, v2.l quad_perm:[3,2,1,0]
+// W32: v_cmp_ne_u16_e64_dpp vcc_lo, v128.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x6a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x80,0x1b,0x00,0xff]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ne_u16 vcc_lo, vcc_hi, v255.h
+// W32: v_cmp_ne_u16_e64 vcc_lo, vcc_hi, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x3d,0xd4,0x6b,0xfe,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ne_u16 vcc_lo, vcc_hi, v255.l
+// W32: v_cmp_ne_u16_e64 vcc_lo, vcc_hi, v255.l ; encoding: [0x6a,0x00,0x3d,0xd4,0x6b,0xfe,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ne_u16 vcc_lo, vcc_lo, v255.h
+// W32: v_cmp_ne_u16_e64 vcc_lo, vcc_lo, v255.h op_sel:[0,1,0] ; encoding: [0x6a,0x10,0x3d,0xd4,0x6a,0xfe,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
+
+v_cmp_ne_u16 vcc_lo, vcc_lo, v255.l
+// W32: v_cmp_ne_u16_e64 vcc_lo, vcc_lo, v255.l ; encoding: [0x6a,0x00,0x3d,0xd4,0x6a,0xfe,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:14: error: invalid operand for instruction
 
 v_cmp_neq_f16 vcc, v1, v255
 // W64: v_cmp_neq_f16_e64 vcc, v1, v255         ; encoding: [0x6a,0x00,0x0d,0xd4,0x01,0xff,0x03,0x00]
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16_from_vopc.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16_from_vopc.txt
index 4e2527cc2fa2f1..bca59aa19a7d89 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16_from_vopc.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16_from_vopc.txt
@@ -225,59 +225,100 @@
 # GFX11: v_cmp_eq_f32_e64_dpp null, -|v255|, -|v255| clamp row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x83,0x12,0xd4,0xfa,0xfe,0x03,0x60,0xff,0x6f,0x0d,0x30]
 
 0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff
-# W32: v_cmp_eq_i16_e64_dpp s10, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
-# W64: v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W32-REAL16: v_cmp_eq_i16_e64_dpp s10, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W32-FAKE16: v_cmp_eq_i16_e64_dpp s10, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W64-REAL16: v_cmp_eq_i16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W64-FAKE16: v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
 
 0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff
-# W32: v_cmp_eq_i16_e64_dpp s10, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
-# W64: v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W32-REAL16: v_cmp_eq_i16_e64_dpp s10, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W32-FAKE16: v_cmp_eq_i16_e64_dpp s10, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W64-REAL16: v_cmp_eq_i16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W64-FAKE16: v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
 
 0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff
-# W32: v_cmp_eq_i16_e64_dpp s10, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
-# W64: v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W32-REAL16: v_cmp_eq_i16_e64_dpp s10, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W32-FAKE16: v_cmp_eq_i16_e64_dpp s10, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W64-REAL16: v_cmp_eq_i16_e64_dpp s[10:11], v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W64-FAKE16: v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
 
 0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff
-# W32: v_cmp_eq_i16_e64_dpp s10, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
-# W64: v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W32-REAL16: v_cmp_eq_i16_e64_dpp s10, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W32-FAKE16: v_cmp_eq_i16_e64_dpp s10, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W64-REAL16: v_cmp_eq_i16_e64_dpp s[10:11], v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W64-FAKE16: v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
 
 0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff
-# W32: v_cmp_eq_i16_e64_dpp s10, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
-# W64: v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W32-REAL16: v_cmp_eq_i16_e64_dpp s10, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W32-FAKE16: v_cmp_eq_i16_e64_dpp s10, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W64-REAL16: v_cmp_eq_i16_e64_dpp s[10:11], v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W64-FAKE16: v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
 
 0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff
-# W32: v_cmp_eq_i16_e64_dpp s10, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
-# W64: v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W32-REAL16: v_cmp_eq_i16_e64_dpp s10, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W32-FAKE16: v_cmp_eq_i16_e64_dpp s10, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W64-REAL16: v_cmp_eq_i16_e64_dpp s[10:11], v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W64-FAKE16: v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
 
 0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff
-# W32: v_cmp_eq_i16_e64_dpp s10, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
-# W64: v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W32-REAL16: v_cmp_eq_i16_e64_dpp s10, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W32-FAKE16: v_cmp_eq_i16_e64_dpp s10, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W64-REAL16: v_cmp_eq_i16_e64_dpp s[10:11], v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W64-FAKE16: v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
 
 0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff
-# W32: v_cmp_eq_i16_e64_dpp s10, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
-# W64: v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W32-REAL16: v_cmp_eq_i16_e64_dpp s10, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W32-FAKE16: v_cmp_eq_i16_e64_dpp s10, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W64-REAL16: v_cmp_eq_i16_e64_dpp s[10:11], v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W64-FAKE16: v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
 
 0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff
-# W32: v_cmp_eq_i16_e64_dpp s10, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
-# W64: v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W32-REAL16: v_cmp_eq_i16_e64_dpp s10, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W32-FAKE16: v_cmp_eq_i16_e64_dpp s10, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W64-REAL16: v_cmp_eq_i16_e64_dpp s[10:11], v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W64-FAKE16: v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
 
 0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff
-# W32: v_cmp_eq_i16_e64_dpp s10, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
-# W64: v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W32-REAL16: v_cmp_eq_i16_e64_dpp s10, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W32-FAKE16: v_cmp_eq_i16_e64_dpp s10, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W64-REAL16: v_cmp_eq_i16_e64_dpp s[10:11], v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W64-FAKE16: v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
 
 0x68,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff
-# W32: v_cmp_eq_i16_e64_dpp s104, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
-# W64: v_cmp_eq_i16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W32-REAL16: v_cmp_eq_i16_e64_dpp s104, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W32-FAKE16: v_cmp_eq_i16_e64_dpp s104, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W64-REAL16: v_cmp_eq_i16_e64_dpp s[104:105], v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W64-FAKE16: v_cmp_eq_i16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
 
 0x6a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01
-# W32: v_cmp_eq_i16_e64_dpp vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
-# W64: v_cmp_eq_i16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W32-REAL16: v_cmp_eq_i16_e64_dpp vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W32-FAKE16: v_cmp_eq_i16_e64_dpp vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W64-REAL16: v_cmp_eq_i16_e64_dpp vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W64-FAKE16: v_cmp_eq_i16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
 
 0x7a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13
-# W32: v_cmp_eq_i16_e64_dpp ttmp14, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
-# W64: v_cmp_eq_i16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W32-REAL16: v_cmp_eq_i16_e64_dpp ttmp14, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_eq_i16_e64_dpp ttmp14, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_eq_i16_e64_dpp ttmp[14:15], v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_eq_i16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
 
 0x7c,0x00,0x32,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30
-# GFX11: v_cmp_eq_i16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x32,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W32-REAL16: v_cmp_eq_i16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x32,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_eq_i16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x32,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_eq_i16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x32,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_eq_i16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x32,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+
+0x7a,0x08,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13
+# W32-REAL16: v_cmp_eq_i16_e64_dpp ttmp14, v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x08,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_eq_i16_e64_dpp ttmp14, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_eq_i16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x08,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_eq_i16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+
+0x7c,0x10,0x32,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30
+# W32-REAL16: v_cmp_eq_i16_e64_dpp null, v255.l, v255.h op_sel:[0,1] row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x10,0x32,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_eq_i16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x32,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_eq_i16_e64_dpp null, v255.l, v255.h op_sel:[0,1] row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x10,0x32,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_eq_i16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x32,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
 
 0x0a,0x00,0x42,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff
 # W32: v_cmp_eq_i32_e64_dpp s10, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x42,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
@@ -335,59 +376,100 @@
 # GFX11: v_cmp_eq_i32_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x42,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
 
 0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff
-# W32: v_cmp_eq_u16_e64_dpp s10, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
-# W64: v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W32-REAL16: v_cmp_eq_u16_e64_dpp s10, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W32-FAKE16: v_cmp_eq_u16_e64_dpp s10, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W64-REAL16: v_cmp_eq_u16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W64-FAKE16: v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
 
 0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff
-# W32: v_cmp_eq_u16_e64_dpp s10, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
-# W64: v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W32-REAL16: v_cmp_eq_u16_e64_dpp s10, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W32-FAKE16: v_cmp_eq_u16_e64_dpp s10, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W64-REAL16: v_cmp_eq_u16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W64-FAKE16: v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
 
 0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff
-# W32: v_cmp_eq_u16_e64_dpp s10, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
-# W64: v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W32-REAL16: v_cmp_eq_u16_e64_dpp s10, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W32-FAKE16: v_cmp_eq_u16_e64_dpp s10, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W64-REAL16: v_cmp_eq_u16_e64_dpp s[10:11], v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W64-FAKE16: v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
 
 0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff
-# W32: v_cmp_eq_u16_e64_dpp s10, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
-# W64: v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W32-REAL16: v_cmp_eq_u16_e64_dpp s10, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W32-FAKE16: v_cmp_eq_u16_e64_dpp s10, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W64-REAL16: v_cmp_eq_u16_e64_dpp s[10:11], v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W64-FAKE16: v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
 
 0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff
-# W32: v_cmp_eq_u16_e64_dpp s10, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
-# W64: v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W32-REAL16: v_cmp_eq_u16_e64_dpp s10, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W32-FAKE16: v_cmp_eq_u16_e64_dpp s10, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W64-REAL16: v_cmp_eq_u16_e64_dpp s[10:11], v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W64-FAKE16: v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
 
 0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff
-# W32: v_cmp_eq_u16_e64_dpp s10, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
-# W64: v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W32-REAL16: v_cmp_eq_u16_e64_dpp s10, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W32-FAKE16: v_cmp_eq_u16_e64_dpp s10, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W64-REAL16: v_cmp_eq_u16_e64_dpp s[10:11], v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W64-FAKE16: v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
 
 0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff
-# W32: v_cmp_eq_u16_e64_dpp s10, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
-# W64: v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W32-REAL16: v_cmp_eq_u16_e64_dpp s10, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W32-FAKE16: v_cmp_eq_u16_e64_dpp s10, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W64-REAL16: v_cmp_eq_u16_e64_dpp s[10:11], v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W64-FAKE16: v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
 
 0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff
-# W32: v_cmp_eq_u16_e64_dpp s10, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
-# W64: v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W32-REAL16: v_cmp_eq_u16_e64_dpp s10, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W32-FAKE16: v_cmp_eq_u16_e64_dpp s10, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W64-REAL16: v_cmp_eq_u16_e64_dpp s[10:11], v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W64-FAKE16: v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
 
 0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff
-# W32: v_cmp_eq_u16_e64_dpp s10, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
-# W64: v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W32-REAL16: v_cmp_eq_u16_e64_dpp s10, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W32-FAKE16: v_cmp_eq_u16_e64_dpp s10, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W64-REAL16: v_cmp_eq_u16_e64_dpp s[10:11], v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W64-FAKE16: v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
 
 0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff
-# W32: v_cmp_eq_u16_e64_dpp s10, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
-# W64: v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W32-REAL16: v_cmp_eq_u16_e64_dpp s10, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W32-FAKE16: v_cmp_eq_u16_e64_dpp s10, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W64-REAL16: v_cmp_eq_u16_e64_dpp s[10:11], v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W64-FAKE16: v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
 
 0x68,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff
-# W32: v_cmp_eq_u16_e64_dpp s104, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
-# W64: v_cmp_eq_u16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W32-REAL16: v_cmp_eq_u16_e64_dpp s104, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W32-FAKE16: v_cmp_eq_u16_e64_dpp s104, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W64-REAL16: v_cmp_eq_u16_e64_dpp s[104:105], v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W64-FAKE16: v_cmp_eq_u16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
 
 0x6a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01
-# W32: v_cmp_eq_u16_e64_dpp vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
-# W64: v_cmp_eq_u16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W32-REAL16: v_cmp_eq_u16_e64_dpp vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W32-FAKE16: v_cmp_eq_u16_e64_dpp vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W64-REAL16: v_cmp_eq_u16_e64_dpp vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W64-FAKE16: v_cmp_eq_u16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
 
 0x7a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13
-# W32: v_cmp_eq_u16_e64_dpp ttmp14, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
-# W64: v_cmp_eq_u16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W32-REAL16: v_cmp_eq_u16_e64_dpp ttmp14, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_eq_u16_e64_dpp ttmp14, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_eq_u16_e64_dpp ttmp[14:15], v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_eq_u16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
 
 0x7c,0x00,0x3a,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30
-# GFX11: v_cmp_eq_u16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x3a,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W32-REAL16: v_cmp_eq_u16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x3a,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_eq_u16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x3a,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_eq_u16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x3a,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_eq_u16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x3a,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+
+0x7a,0x08,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13
+# W32-REAL16: v_cmp_eq_u16_e64_dpp ttmp14, v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x08,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_eq_u16_e64_dpp ttmp14, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_eq_u16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x08,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_eq_u16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+
+0x7c,0x10,0x3a,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30
+# W32-REAL16: v_cmp_eq_u16_e64_dpp null, v255.l, v255.h op_sel:[0,1] row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x10,0x3a,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_eq_u16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x3a,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_eq_u16_e64_dpp null, v255.l, v255.h op_sel:[0,1] row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x10,0x3a,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_eq_u16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x3a,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
 
 0x0a,0x00,0x4a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff
 # W32: v_cmp_eq_u32_e64_dpp s10, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x4a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
@@ -775,59 +857,100 @@
 # GFX11: v_cmp_ge_f32_e64_dpp null, -|v255|, -|v255| clamp row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x83,0x16,0xd4,0xfa,0xfe,0x03,0x60,0xff,0x6f,0x0d,0x30]
 
 0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff
-# W32: v_cmp_ge_i16_e64_dpp s10, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
-# W64: v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W32-REAL16: v_cmp_ge_i16_e64_dpp s10, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W32-FAKE16: v_cmp_ge_i16_e64_dpp s10, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W64-REAL16: v_cmp_ge_i16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W64-FAKE16: v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
 
 0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff
-# W32: v_cmp_ge_i16_e64_dpp s10, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
-# W64: v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W32-REAL16: v_cmp_ge_i16_e64_dpp s10, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W32-FAKE16: v_cmp_ge_i16_e64_dpp s10, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W64-REAL16: v_cmp_ge_i16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W64-FAKE16: v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
 
 0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff
-# W32: v_cmp_ge_i16_e64_dpp s10, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
-# W64: v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W32-REAL16: v_cmp_ge_i16_e64_dpp s10, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W32-FAKE16: v_cmp_ge_i16_e64_dpp s10, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W64-REAL16: v_cmp_ge_i16_e64_dpp s[10:11], v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W64-FAKE16: v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
 
 0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff
-# W32: v_cmp_ge_i16_e64_dpp s10, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
-# W64: v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W32-REAL16: v_cmp_ge_i16_e64_dpp s10, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W32-FAKE16: v_cmp_ge_i16_e64_dpp s10, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W64-REAL16: v_cmp_ge_i16_e64_dpp s[10:11], v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W64-FAKE16: v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
 
 0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff
-# W32: v_cmp_ge_i16_e64_dpp s10, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
-# W64: v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W32-REAL16: v_cmp_ge_i16_e64_dpp s10, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W32-FAKE16: v_cmp_ge_i16_e64_dpp s10, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W64-REAL16: v_cmp_ge_i16_e64_dpp s[10:11], v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W64-FAKE16: v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
 
 0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff
-# W32: v_cmp_ge_i16_e64_dpp s10, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
-# W64: v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W32-REAL16: v_cmp_ge_i16_e64_dpp s10, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W32-FAKE16: v_cmp_ge_i16_e64_dpp s10, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W64-REAL16: v_cmp_ge_i16_e64_dpp s[10:11], v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W64-FAKE16: v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
 
 0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff
-# W32: v_cmp_ge_i16_e64_dpp s10, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
-# W64: v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W32-REAL16: v_cmp_ge_i16_e64_dpp s10, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W32-FAKE16: v_cmp_ge_i16_e64_dpp s10, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W64-REAL16: v_cmp_ge_i16_e64_dpp s[10:11], v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W64-FAKE16: v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
 
 0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff
-# W32: v_cmp_ge_i16_e64_dpp s10, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
-# W64: v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W32-REAL16: v_cmp_ge_i16_e64_dpp s10, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W32-FAKE16: v_cmp_ge_i16_e64_dpp s10, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W64-REAL16: v_cmp_ge_i16_e64_dpp s[10:11], v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W64-FAKE16: v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
 
 0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff
-# W32: v_cmp_ge_i16_e64_dpp s10, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
-# W64: v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W32-REAL16: v_cmp_ge_i16_e64_dpp s10, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W32-FAKE16: v_cmp_ge_i16_e64_dpp s10, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W64-REAL16: v_cmp_ge_i16_e64_dpp s[10:11], v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W64-FAKE16: v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
 
 0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff
-# W32: v_cmp_ge_i16_e64_dpp s10, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
-# W64: v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W32-REAL16: v_cmp_ge_i16_e64_dpp s10, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W32-FAKE16: v_cmp_ge_i16_e64_dpp s10, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W64-REAL16: v_cmp_ge_i16_e64_dpp s[10:11], v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W64-FAKE16: v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
 
 0x68,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff
-# W32: v_cmp_ge_i16_e64_dpp s104, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
-# W64: v_cmp_ge_i16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W32-REAL16: v_cmp_ge_i16_e64_dpp s104, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W32-FAKE16: v_cmp_ge_i16_e64_dpp s104, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W64-REAL16: v_cmp_ge_i16_e64_dpp s[104:105], v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W64-FAKE16: v_cmp_ge_i16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
 
 0x6a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01
-# W32: v_cmp_ge_i16_e64_dpp vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
-# W64: v_cmp_ge_i16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W32-REAL16: v_cmp_ge_i16_e64_dpp vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W32-FAKE16: v_cmp_ge_i16_e64_dpp vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W64-REAL16: v_cmp_ge_i16_e64_dpp vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W64-FAKE16: v_cmp_ge_i16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
 
 0x7a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13
-# W32: v_cmp_ge_i16_e64_dpp ttmp14, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
-# W64: v_cmp_ge_i16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W32-REAL16: v_cmp_ge_i16_e64_dpp ttmp14, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_ge_i16_e64_dpp ttmp14, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_ge_i16_e64_dpp ttmp[14:15], v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_ge_i16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
 
 0x7c,0x00,0x36,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30
-# GFX11: v_cmp_ge_i16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x36,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W32-REAL16: v_cmp_ge_i16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x36,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_ge_i16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x36,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_ge_i16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x36,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_ge_i16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x36,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+
+0x7a,0x08,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13
+# W32-REAL16: v_cmp_ge_i16_e64_dpp ttmp14, v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x08,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_ge_i16_e64_dpp ttmp14, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_ge_i16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x08,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_ge_i16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+
+0x7c,0x10,0x36,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30
+# W32-REAL16: v_cmp_ge_i16_e64_dpp null, v255.l, v255.h op_sel:[0,1] row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x10,0x36,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_ge_i16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x36,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_ge_i16_e64_dpp null, v255.l, v255.h op_sel:[0,1] row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x10,0x36,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_ge_i16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x36,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
 
 0x0a,0x00,0x46,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff
 # W32: v_cmp_ge_i32_e64_dpp s10, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x46,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
@@ -885,59 +1008,100 @@
 # GFX11: v_cmp_ge_i32_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x46,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
 
 0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff
-# W32: v_cmp_ge_u16_e64_dpp s10, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
-# W64: v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W32-REAL16: v_cmp_ge_u16_e64_dpp s10, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W32-FAKE16: v_cmp_ge_u16_e64_dpp s10, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W64-REAL16: v_cmp_ge_u16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W64-FAKE16: v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
 
 0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff
-# W32: v_cmp_ge_u16_e64_dpp s10, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
-# W64: v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W32-REAL16: v_cmp_ge_u16_e64_dpp s10, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W32-FAKE16: v_cmp_ge_u16_e64_dpp s10, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W64-REAL16: v_cmp_ge_u16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W64-FAKE16: v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
 
 0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff
-# W32: v_cmp_ge_u16_e64_dpp s10, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
-# W64: v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W32-REAL16: v_cmp_ge_u16_e64_dpp s10, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W32-FAKE16: v_cmp_ge_u16_e64_dpp s10, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W64-REAL16: v_cmp_ge_u16_e64_dpp s[10:11], v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W64-FAKE16: v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
 
 0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff
-# W32: v_cmp_ge_u16_e64_dpp s10, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
-# W64: v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W32-REAL16: v_cmp_ge_u16_e64_dpp s10, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W32-FAKE16: v_cmp_ge_u16_e64_dpp s10, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W64-REAL16: v_cmp_ge_u16_e64_dpp s[10:11], v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W64-FAKE16: v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
 
 0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff
-# W32: v_cmp_ge_u16_e64_dpp s10, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
-# W64: v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W32-REAL16: v_cmp_ge_u16_e64_dpp s10, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W32-FAKE16: v_cmp_ge_u16_e64_dpp s10, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W64-REAL16: v_cmp_ge_u16_e64_dpp s[10:11], v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W64-FAKE16: v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
 
 0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff
-# W32: v_cmp_ge_u16_e64_dpp s10, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
-# W64: v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W32-REAL16: v_cmp_ge_u16_e64_dpp s10, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W32-FAKE16: v_cmp_ge_u16_e64_dpp s10, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W64-REAL16: v_cmp_ge_u16_e64_dpp s[10:11], v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W64-FAKE16: v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
 
 0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff
-# W32: v_cmp_ge_u16_e64_dpp s10, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
-# W64: v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W32-REAL16: v_cmp_ge_u16_e64_dpp s10, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W32-FAKE16: v_cmp_ge_u16_e64_dpp s10, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W64-REAL16: v_cmp_ge_u16_e64_dpp s[10:11], v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W64-FAKE16: v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
 
 0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff
-# W32: v_cmp_ge_u16_e64_dpp s10, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
-# W64: v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W32-REAL16: v_cmp_ge_u16_e64_dpp s10, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W32-FAKE16: v_cmp_ge_u16_e64_dpp s10, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W64-REAL16: v_cmp_ge_u16_e64_dpp s[10:11], v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W64-FAKE16: v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
 
 0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff
-# W32: v_cmp_ge_u16_e64_dpp s10, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
-# W64: v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W32-REAL16: v_cmp_ge_u16_e64_dpp s10, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W32-FAKE16: v_cmp_ge_u16_e64_dpp s10, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W64-REAL16: v_cmp_ge_u16_e64_dpp s[10:11], v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W64-FAKE16: v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
 
 0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff
-# W32: v_cmp_ge_u16_e64_dpp s10, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
-# W64: v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W32-REAL16: v_cmp_ge_u16_e64_dpp s10, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W32-FAKE16: v_cmp_ge_u16_e64_dpp s10, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W64-REAL16: v_cmp_ge_u16_e64_dpp s[10:11], v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W64-FAKE16: v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
 
 0x68,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff
-# W32: v_cmp_ge_u16_e64_dpp s104, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
-# W64: v_cmp_ge_u16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W32-REAL16: v_cmp_ge_u16_e64_dpp s104, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W32-FAKE16: v_cmp_ge_u16_e64_dpp s104, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W64-REAL16: v_cmp_ge_u16_e64_dpp s[104:105], v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W64-FAKE16: v_cmp_ge_u16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
 
 0x6a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01
-# W32: v_cmp_ge_u16_e64_dpp vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
-# W64: v_cmp_ge_u16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W32-REAL16: v_cmp_ge_u16_e64_dpp vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W32-FAKE16: v_cmp_ge_u16_e64_dpp vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W64-REAL16: v_cmp_ge_u16_e64_dpp vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W64-FAKE16: v_cmp_ge_u16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
 
 0x7a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13
-# W32: v_cmp_ge_u16_e64_dpp ttmp14, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
-# W64: v_cmp_ge_u16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W32-REAL16: v_cmp_ge_u16_e64_dpp ttmp14, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_ge_u16_e64_dpp ttmp14, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_ge_u16_e64_dpp ttmp[14:15], v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_ge_u16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
 
 0x7c,0x00,0x3e,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30
-# GFX11: v_cmp_ge_u16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x3e,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W32-REAL16: v_cmp_ge_u16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x3e,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_ge_u16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x3e,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_ge_u16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x3e,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_ge_u16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x3e,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+
+0x7a,0x08,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13
+# W32-REAL16: v_cmp_ge_u16_e64_dpp ttmp14, v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x08,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_ge_u16_e64_dpp ttmp14, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_ge_u16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x08,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_ge_u16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+
+0x7c,0x10,0x3e,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30
+# W32-REAL16: v_cmp_ge_u16_e64_dpp null, v255.l, v255.h op_sel:[0,1] row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x10,0x3e,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_ge_u16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x3e,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_ge_u16_e64_dpp null, v255.l, v255.h op_sel:[0,1] row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x10,0x3e,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_ge_u16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x3e,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
 
 0x0a,0x00,0x4e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff
 # W32: v_cmp_ge_u32_e64_dpp s10, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x4e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
@@ -1105,59 +1269,100 @@
 # GFX11: v_cmp_gt_f32_e64_dpp null, -|v255|, -|v255| clamp row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x83,0x14,0xd4,0xfa,0xfe,0x03,0x60,0xff,0x6f,0x0d,0x30]
 
 0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff
-# W32: v_cmp_gt_i16_e64_dpp s10, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
-# W64: v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W32-REAL16: v_cmp_gt_i16_e64_dpp s10, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W32-FAKE16: v_cmp_gt_i16_e64_dpp s10, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W64-REAL16: v_cmp_gt_i16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W64-FAKE16: v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
 
 0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff
-# W32: v_cmp_gt_i16_e64_dpp s10, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
-# W64: v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W32-REAL16: v_cmp_gt_i16_e64_dpp s10, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W32-FAKE16: v_cmp_gt_i16_e64_dpp s10, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W64-REAL16: v_cmp_gt_i16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W64-FAKE16: v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
 
 0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff
-# W32: v_cmp_gt_i16_e64_dpp s10, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
-# W64: v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W32-REAL16: v_cmp_gt_i16_e64_dpp s10, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W32-FAKE16: v_cmp_gt_i16_e64_dpp s10, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W64-REAL16: v_cmp_gt_i16_e64_dpp s[10:11], v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W64-FAKE16: v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
 
 0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff
-# W32: v_cmp_gt_i16_e64_dpp s10, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
-# W64: v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W32-REAL16: v_cmp_gt_i16_e64_dpp s10, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W32-FAKE16: v_cmp_gt_i16_e64_dpp s10, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W64-REAL16: v_cmp_gt_i16_e64_dpp s[10:11], v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W64-FAKE16: v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
 
 0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff
-# W32: v_cmp_gt_i16_e64_dpp s10, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
-# W64: v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W32-REAL16: v_cmp_gt_i16_e64_dpp s10, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W32-FAKE16: v_cmp_gt_i16_e64_dpp s10, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W64-REAL16: v_cmp_gt_i16_e64_dpp s[10:11], v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W64-FAKE16: v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
 
 0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff
-# W32: v_cmp_gt_i16_e64_dpp s10, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
-# W64: v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W32-REAL16: v_cmp_gt_i16_e64_dpp s10, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W32-FAKE16: v_cmp_gt_i16_e64_dpp s10, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W64-REAL16: v_cmp_gt_i16_e64_dpp s[10:11], v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W64-FAKE16: v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
 
 0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff
-# W32: v_cmp_gt_i16_e64_dpp s10, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
-# W64: v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W32-REAL16: v_cmp_gt_i16_e64_dpp s10, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W32-FAKE16: v_cmp_gt_i16_e64_dpp s10, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W64-REAL16: v_cmp_gt_i16_e64_dpp s[10:11], v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W64-FAKE16: v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
 
 0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff
-# W32: v_cmp_gt_i16_e64_dpp s10, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
-# W64: v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W32-REAL16: v_cmp_gt_i16_e64_dpp s10, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W32-FAKE16: v_cmp_gt_i16_e64_dpp s10, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W64-REAL16: v_cmp_gt_i16_e64_dpp s[10:11], v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W64-FAKE16: v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
 
 0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff
-# W32: v_cmp_gt_i16_e64_dpp s10, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
-# W64: v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W32-REAL16: v_cmp_gt_i16_e64_dpp s10, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W32-FAKE16: v_cmp_gt_i16_e64_dpp s10, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W64-REAL16: v_cmp_gt_i16_e64_dpp s[10:11], v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W64-FAKE16: v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
 
 0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff
-# W32: v_cmp_gt_i16_e64_dpp s10, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
-# W64: v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W32-REAL16: v_cmp_gt_i16_e64_dpp s10, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W32-FAKE16: v_cmp_gt_i16_e64_dpp s10, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W64-REAL16: v_cmp_gt_i16_e64_dpp s[10:11], v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W64-FAKE16: v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
 
 0x68,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff
-# W32: v_cmp_gt_i16_e64_dpp s104, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
-# W64: v_cmp_gt_i16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W32-REAL16: v_cmp_gt_i16_e64_dpp s104, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W32-FAKE16: v_cmp_gt_i16_e64_dpp s104, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W64-REAL16: v_cmp_gt_i16_e64_dpp s[104:105], v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W64-FAKE16: v_cmp_gt_i16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
 
 0x6a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01
-# W32: v_cmp_gt_i16_e64_dpp vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
-# W64: v_cmp_gt_i16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W32-REAL16: v_cmp_gt_i16_e64_dpp vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W32-FAKE16: v_cmp_gt_i16_e64_dpp vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W64-REAL16: v_cmp_gt_i16_e64_dpp vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W64-FAKE16: v_cmp_gt_i16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
 
 0x7a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13
-# W32: v_cmp_gt_i16_e64_dpp ttmp14, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
-# W64: v_cmp_gt_i16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W32-REAL16: v_cmp_gt_i16_e64_dpp ttmp14, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_gt_i16_e64_dpp ttmp14, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_gt_i16_e64_dpp ttmp[14:15], v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_gt_i16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
 
 0x7c,0x00,0x34,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30
-# GFX11: v_cmp_gt_i16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x34,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W32-REAL16: v_cmp_gt_i16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x34,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_gt_i16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x34,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_gt_i16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x34,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_gt_i16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x34,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+
+0x7a,0x08,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13
+# W32-REAL16: v_cmp_gt_i16_e64_dpp ttmp14, v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x08,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_gt_i16_e64_dpp ttmp14, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_gt_i16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x08,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_gt_i16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+
+0x7c,0x10,0x34,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30
+# W32-REAL16: v_cmp_gt_i16_e64_dpp null, v255.l, v255.h op_sel:[0,1] row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x10,0x34,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_gt_i16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x34,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_gt_i16_e64_dpp null, v255.l, v255.h op_sel:[0,1] row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x10,0x34,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_gt_i16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x34,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
 
 0x0a,0x00,0x44,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff
 # W32: v_cmp_gt_i32_e64_dpp s10, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x44,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
@@ -1215,59 +1420,100 @@
 # GFX11: v_cmp_gt_i32_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x44,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
 
 0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff
-# W32: v_cmp_gt_u16_e64_dpp s10, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
-# W64: v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W32-REAL16: v_cmp_gt_u16_e64_dpp s10, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W32-FAKE16: v_cmp_gt_u16_e64_dpp s10, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W64-REAL16: v_cmp_gt_u16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W64-FAKE16: v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
 
 0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff
-# W32: v_cmp_gt_u16_e64_dpp s10, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
-# W64: v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W32-REAL16: v_cmp_gt_u16_e64_dpp s10, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W32-FAKE16: v_cmp_gt_u16_e64_dpp s10, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W64-REAL16: v_cmp_gt_u16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W64-FAKE16: v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
 
 0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff
-# W32: v_cmp_gt_u16_e64_dpp s10, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
-# W64: v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W32-REAL16: v_cmp_gt_u16_e64_dpp s10, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W32-FAKE16: v_cmp_gt_u16_e64_dpp s10, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W64-REAL16: v_cmp_gt_u16_e64_dpp s[10:11], v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W64-FAKE16: v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
 
 0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff
-# W32: v_cmp_gt_u16_e64_dpp s10, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
-# W64: v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W32-REAL16: v_cmp_gt_u16_e64_dpp s10, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W32-FAKE16: v_cmp_gt_u16_e64_dpp s10, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W64-REAL16: v_cmp_gt_u16_e64_dpp s[10:11], v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W64-FAKE16: v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
 
 0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff
-# W32: v_cmp_gt_u16_e64_dpp s10, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
-# W64: v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W32-REAL16: v_cmp_gt_u16_e64_dpp s10, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W32-FAKE16: v_cmp_gt_u16_e64_dpp s10, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W64-REAL16: v_cmp_gt_u16_e64_dpp s[10:11], v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W64-FAKE16: v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
 
 0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff
-# W32: v_cmp_gt_u16_e64_dpp s10, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
-# W64: v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W32-REAL16: v_cmp_gt_u16_e64_dpp s10, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W32-FAKE16: v_cmp_gt_u16_e64_dpp s10, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W64-REAL16: v_cmp_gt_u16_e64_dpp s[10:11], v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W64-FAKE16: v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
 
 0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff
-# W32: v_cmp_gt_u16_e64_dpp s10, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
-# W64: v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W32-REAL16: v_cmp_gt_u16_e64_dpp s10, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W32-FAKE16: v_cmp_gt_u16_e64_dpp s10, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W64-REAL16: v_cmp_gt_u16_e64_dpp s[10:11], v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W64-FAKE16: v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
 
 0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff
-# W32: v_cmp_gt_u16_e64_dpp s10, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
-# W64: v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W32-REAL16: v_cmp_gt_u16_e64_dpp s10, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W32-FAKE16: v_cmp_gt_u16_e64_dpp s10, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W64-REAL16: v_cmp_gt_u16_e64_dpp s[10:11], v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W64-FAKE16: v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
 
 0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff
-# W32: v_cmp_gt_u16_e64_dpp s10, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
-# W64: v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W32-REAL16: v_cmp_gt_u16_e64_dpp s10, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W32-FAKE16: v_cmp_gt_u16_e64_dpp s10, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W64-REAL16: v_cmp_gt_u16_e64_dpp s[10:11], v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W64-FAKE16: v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
 
 0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff
-# W32: v_cmp_gt_u16_e64_dpp s10, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
-# W64: v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W32-REAL16: v_cmp_gt_u16_e64_dpp s10, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W32-FAKE16: v_cmp_gt_u16_e64_dpp s10, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W64-REAL16: v_cmp_gt_u16_e64_dpp s[10:11], v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W64-FAKE16: v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
 
 0x68,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff
-# W32: v_cmp_gt_u16_e64_dpp s104, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
-# W64: v_cmp_gt_u16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W32-REAL16: v_cmp_gt_u16_e64_dpp s104, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W32-FAKE16: v_cmp_gt_u16_e64_dpp s104, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W64-REAL16: v_cmp_gt_u16_e64_dpp s[104:105], v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W64-FAKE16: v_cmp_gt_u16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
 
 0x6a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01
-# W32: v_cmp_gt_u16_e64_dpp vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
-# W64: v_cmp_gt_u16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W32-REAL16: v_cmp_gt_u16_e64_dpp vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W32-FAKE16: v_cmp_gt_u16_e64_dpp vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W64-REAL16: v_cmp_gt_u16_e64_dpp vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W64-FAKE16: v_cmp_gt_u16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
 
 0x7a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13
-# W32: v_cmp_gt_u16_e64_dpp ttmp14, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
-# W64: v_cmp_gt_u16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W32-REAL16: v_cmp_gt_u16_e64_dpp ttmp14, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_gt_u16_e64_dpp ttmp14, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_gt_u16_e64_dpp ttmp[14:15], v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_gt_u16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
 
 0x7c,0x00,0x3c,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30
-# GFX11: v_cmp_gt_u16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x3c,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W32-REAL16: v_cmp_gt_u16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x3c,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_gt_u16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x3c,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_gt_u16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x3c,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_gt_u16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x3c,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+
+0x7a,0x08,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13
+# W32-REAL16: v_cmp_gt_u16_e64_dpp ttmp14, v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x08,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_gt_u16_e64_dpp ttmp14, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_gt_u16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x08,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_gt_u16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+
+0x7c,0x10,0x3c,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30
+# W32-REAL16: v_cmp_gt_u16_e64_dpp null, v255.l, v255.h op_sel:[0,1] row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x10,0x3c,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_gt_u16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x3c,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_gt_u16_e64_dpp null, v255.l, v255.h op_sel:[0,1] row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x10,0x3c,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_gt_u16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x3c,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
 
 0x0a,0x00,0x4c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff
 # W32: v_cmp_gt_u32_e64_dpp s10, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x4c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
@@ -1435,59 +1681,100 @@
 # GFX11: v_cmp_le_f32_e64_dpp null, -|v255|, -|v255| clamp row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x83,0x13,0xd4,0xfa,0xfe,0x03,0x60,0xff,0x6f,0x0d,0x30]
 
 0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff
-# W32: v_cmp_le_i16_e64_dpp s10, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
-# W64: v_cmp_le_i16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W32-REAL16: v_cmp_le_i16_e64_dpp s10, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W32-FAKE16: v_cmp_le_i16_e64_dpp s10, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W64-REAL16: v_cmp_le_i16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W64-FAKE16: v_cmp_le_i16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
 
 0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff
-# W32: v_cmp_le_i16_e64_dpp s10, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
-# W64: v_cmp_le_i16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W32-REAL16: v_cmp_le_i16_e64_dpp s10, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W32-FAKE16: v_cmp_le_i16_e64_dpp s10, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W64-REAL16: v_cmp_le_i16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W64-FAKE16: v_cmp_le_i16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
 
 0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff
-# W32: v_cmp_le_i16_e64_dpp s10, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
-# W64: v_cmp_le_i16_e64_dpp s[10:11], v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W32-REAL16: v_cmp_le_i16_e64_dpp s10, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W32-FAKE16: v_cmp_le_i16_e64_dpp s10, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W64-REAL16: v_cmp_le_i16_e64_dpp s[10:11], v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W64-FAKE16: v_cmp_le_i16_e64_dpp s[10:11], v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
 
 0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff
-# W32: v_cmp_le_i16_e64_dpp s10, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
-# W64: v_cmp_le_i16_e64_dpp s[10:11], v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W32-REAL16: v_cmp_le_i16_e64_dpp s10, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W32-FAKE16: v_cmp_le_i16_e64_dpp s10, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W64-REAL16: v_cmp_le_i16_e64_dpp s[10:11], v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W64-FAKE16: v_cmp_le_i16_e64_dpp s[10:11], v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
 
 0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff
-# W32: v_cmp_le_i16_e64_dpp s10, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
-# W64: v_cmp_le_i16_e64_dpp s[10:11], v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W32-REAL16: v_cmp_le_i16_e64_dpp s10, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W32-FAKE16: v_cmp_le_i16_e64_dpp s10, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W64-REAL16: v_cmp_le_i16_e64_dpp s[10:11], v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W64-FAKE16: v_cmp_le_i16_e64_dpp s[10:11], v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
 
 0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff
-# W32: v_cmp_le_i16_e64_dpp s10, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
-# W64: v_cmp_le_i16_e64_dpp s[10:11], v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W32-REAL16: v_cmp_le_i16_e64_dpp s10, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W32-FAKE16: v_cmp_le_i16_e64_dpp s10, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W64-REAL16: v_cmp_le_i16_e64_dpp s[10:11], v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W64-FAKE16: v_cmp_le_i16_e64_dpp s[10:11], v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
 
 0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff
-# W32: v_cmp_le_i16_e64_dpp s10, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
-# W64: v_cmp_le_i16_e64_dpp s[10:11], v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W32-REAL16: v_cmp_le_i16_e64_dpp s10, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W32-FAKE16: v_cmp_le_i16_e64_dpp s10, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W64-REAL16: v_cmp_le_i16_e64_dpp s[10:11], v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W64-FAKE16: v_cmp_le_i16_e64_dpp s[10:11], v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
 
 0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff
-# W32: v_cmp_le_i16_e64_dpp s10, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
-# W64: v_cmp_le_i16_e64_dpp s[10:11], v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W32-REAL16: v_cmp_le_i16_e64_dpp s10, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W32-FAKE16: v_cmp_le_i16_e64_dpp s10, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W64-REAL16: v_cmp_le_i16_e64_dpp s[10:11], v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W64-FAKE16: v_cmp_le_i16_e64_dpp s[10:11], v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
 
 0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff
-# W32: v_cmp_le_i16_e64_dpp s10, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
-# W64: v_cmp_le_i16_e64_dpp s[10:11], v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W32-REAL16: v_cmp_le_i16_e64_dpp s10, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W32-FAKE16: v_cmp_le_i16_e64_dpp s10, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W64-REAL16: v_cmp_le_i16_e64_dpp s[10:11], v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W64-FAKE16: v_cmp_le_i16_e64_dpp s[10:11], v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
 
 0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff
-# W32: v_cmp_le_i16_e64_dpp s10, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
-# W64: v_cmp_le_i16_e64_dpp s[10:11], v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W32-REAL16: v_cmp_le_i16_e64_dpp s10, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W32-FAKE16: v_cmp_le_i16_e64_dpp s10, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W64-REAL16: v_cmp_le_i16_e64_dpp s[10:11], v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W64-FAKE16: v_cmp_le_i16_e64_dpp s[10:11], v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
 
 0x68,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff
-# W32: v_cmp_le_i16_e64_dpp s104, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
-# W64: v_cmp_le_i16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W32-REAL16: v_cmp_le_i16_e64_dpp s104, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W32-FAKE16: v_cmp_le_i16_e64_dpp s104, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W64-REAL16: v_cmp_le_i16_e64_dpp s[104:105], v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W64-FAKE16: v_cmp_le_i16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
 
 0x6a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01
-# W32: v_cmp_le_i16_e64_dpp vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
-# W64: v_cmp_le_i16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W32-REAL16: v_cmp_le_i16_e64_dpp vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W32-FAKE16: v_cmp_le_i16_e64_dpp vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W64-REAL16: v_cmp_le_i16_e64_dpp vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W64-FAKE16: v_cmp_le_i16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
 
 0x7a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13
-# W32: v_cmp_le_i16_e64_dpp ttmp14, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
-# W64: v_cmp_le_i16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W32-REAL16: v_cmp_le_i16_e64_dpp ttmp14, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_le_i16_e64_dpp ttmp14, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_le_i16_e64_dpp ttmp[14:15], v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_le_i16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
 
 0x7c,0x00,0x33,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30
-# GFX11: v_cmp_le_i16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x33,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W32-REAL16: v_cmp_le_i16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x33,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_le_i16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x33,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_le_i16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x33,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_le_i16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x33,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+
+0x7a,0x08,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13
+# W32-REAL16: v_cmp_le_i16_e64_dpp ttmp14, v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x08,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_le_i16_e64_dpp ttmp14, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_le_i16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x08,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_le_i16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+
+0x7c,0x10,0x33,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30
+# W32-REAL16: v_cmp_le_i16_e64_dpp null, v255.l, v255.h op_sel:[0,1] row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x10,0x33,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_le_i16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x33,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_le_i16_e64_dpp null, v255.l, v255.h op_sel:[0,1] row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x10,0x33,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_le_i16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x33,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
 
 0x0a,0x00,0x43,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff
 # W32: v_cmp_le_i32_e64_dpp s10, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x43,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
@@ -1545,59 +1832,100 @@
 # GFX11: v_cmp_le_i32_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x43,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
 
 0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff
-# W32: v_cmp_le_u16_e64_dpp s10, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
-# W64: v_cmp_le_u16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W32-REAL16: v_cmp_le_u16_e64_dpp s10, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W32-FAKE16: v_cmp_le_u16_e64_dpp s10, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W64-REAL16: v_cmp_le_u16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W64-FAKE16: v_cmp_le_u16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
 
 0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff
-# W32: v_cmp_le_u16_e64_dpp s10, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
-# W64: v_cmp_le_u16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W32-REAL16: v_cmp_le_u16_e64_dpp s10, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W32-FAKE16: v_cmp_le_u16_e64_dpp s10, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W64-REAL16: v_cmp_le_u16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W64-FAKE16: v_cmp_le_u16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
 
 0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff
-# W32: v_cmp_le_u16_e64_dpp s10, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
-# W64: v_cmp_le_u16_e64_dpp s[10:11], v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W32-REAL16: v_cmp_le_u16_e64_dpp s10, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W32-FAKE16: v_cmp_le_u16_e64_dpp s10, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W64-REAL16: v_cmp_le_u16_e64_dpp s[10:11], v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W64-FAKE16: v_cmp_le_u16_e64_dpp s[10:11], v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
 
 0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff
-# W32: v_cmp_le_u16_e64_dpp s10, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
-# W64: v_cmp_le_u16_e64_dpp s[10:11], v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W32-REAL16: v_cmp_le_u16_e64_dpp s10, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W32-FAKE16: v_cmp_le_u16_e64_dpp s10, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W64-REAL16: v_cmp_le_u16_e64_dpp s[10:11], v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W64-FAKE16: v_cmp_le_u16_e64_dpp s[10:11], v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
 
 0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff
-# W32: v_cmp_le_u16_e64_dpp s10, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
-# W64: v_cmp_le_u16_e64_dpp s[10:11], v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W32-REAL16: v_cmp_le_u16_e64_dpp s10, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W32-FAKE16: v_cmp_le_u16_e64_dpp s10, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W64-REAL16: v_cmp_le_u16_e64_dpp s[10:11], v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W64-FAKE16: v_cmp_le_u16_e64_dpp s[10:11], v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
 
 0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff
-# W32: v_cmp_le_u16_e64_dpp s10, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
-# W64: v_cmp_le_u16_e64_dpp s[10:11], v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W32-REAL16: v_cmp_le_u16_e64_dpp s10, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W32-FAKE16: v_cmp_le_u16_e64_dpp s10, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W64-REAL16: v_cmp_le_u16_e64_dpp s[10:11], v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W64-FAKE16: v_cmp_le_u16_e64_dpp s[10:11], v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
 
 0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff
-# W32: v_cmp_le_u16_e64_dpp s10, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
-# W64: v_cmp_le_u16_e64_dpp s[10:11], v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W32-REAL16: v_cmp_le_u16_e64_dpp s10, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W32-FAKE16: v_cmp_le_u16_e64_dpp s10, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W64-REAL16: v_cmp_le_u16_e64_dpp s[10:11], v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W64-FAKE16: v_cmp_le_u16_e64_dpp s[10:11], v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
 
 0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff
-# W32: v_cmp_le_u16_e64_dpp s10, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
-# W64: v_cmp_le_u16_e64_dpp s[10:11], v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W32-REAL16: v_cmp_le_u16_e64_dpp s10, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W32-FAKE16: v_cmp_le_u16_e64_dpp s10, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W64-REAL16: v_cmp_le_u16_e64_dpp s[10:11], v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W64-FAKE16: v_cmp_le_u16_e64_dpp s[10:11], v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
 
 0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff
-# W32: v_cmp_le_u16_e64_dpp s10, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
-# W64: v_cmp_le_u16_e64_dpp s[10:11], v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W32-REAL16: v_cmp_le_u16_e64_dpp s10, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W32-FAKE16: v_cmp_le_u16_e64_dpp s10, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W64-REAL16: v_cmp_le_u16_e64_dpp s[10:11], v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W64-FAKE16: v_cmp_le_u16_e64_dpp s[10:11], v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
 
 0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff
-# W32: v_cmp_le_u16_e64_dpp s10, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
-# W64: v_cmp_le_u16_e64_dpp s[10:11], v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W32-REAL16: v_cmp_le_u16_e64_dpp s10, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W32-FAKE16: v_cmp_le_u16_e64_dpp s10, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W64-REAL16: v_cmp_le_u16_e64_dpp s[10:11], v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W64-FAKE16: v_cmp_le_u16_e64_dpp s[10:11], v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
 
 0x68,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff
-# W32: v_cmp_le_u16_e64_dpp s104, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
-# W64: v_cmp_le_u16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W32-REAL16: v_cmp_le_u16_e64_dpp s104, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W32-FAKE16: v_cmp_le_u16_e64_dpp s104, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W64-REAL16: v_cmp_le_u16_e64_dpp s[104:105], v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W64-FAKE16: v_cmp_le_u16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
 
 0x6a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01
-# W32: v_cmp_le_u16_e64_dpp vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
-# W64: v_cmp_le_u16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W32-REAL16: v_cmp_le_u16_e64_dpp vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W32-FAKE16: v_cmp_le_u16_e64_dpp vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W64-REAL16: v_cmp_le_u16_e64_dpp vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W64-FAKE16: v_cmp_le_u16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
 
 0x7a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13
-# W32: v_cmp_le_u16_e64_dpp ttmp14, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
-# W64: v_cmp_le_u16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W32-REAL16: v_cmp_le_u16_e64_dpp ttmp14, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_le_u16_e64_dpp ttmp14, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_le_u16_e64_dpp ttmp[14:15], v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_le_u16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
 
 0x7c,0x00,0x3b,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30
-# GFX11: v_cmp_le_u16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x3b,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W32-REAL16: v_cmp_le_u16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x3b,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_le_u16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x3b,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_le_u16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x3b,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_le_u16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x3b,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+
+0x7a,0x08,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13
+# W32-REAL16: v_cmp_le_u16_e64_dpp ttmp14, v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x08,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_le_u16_e64_dpp ttmp14, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_le_u16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x08,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_le_u16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+
+0x7c,0x10,0x3b,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30
+# W32-REAL16: v_cmp_le_u16_e64_dpp null, v255.l, v255.h op_sel:[0,1] row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x10,0x3b,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_le_u16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x3b,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_le_u16_e64_dpp null, v255.l, v255.h op_sel:[0,1] row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x10,0x3b,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_le_u16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x3b,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
 
 0x0a,0x00,0x4b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff
 # W32: v_cmp_le_u32_e64_dpp s10, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x4b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
@@ -1916,59 +2244,100 @@
 # GFX11: v_cmp_lt_f32_e64_dpp null, -|v255|, -|v255| clamp row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x83,0x11,0xd4,0xfa,0xfe,0x03,0x60,0xff,0x6f,0x0d,0x30]
 
 0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff
-# W32: v_cmp_lt_i16_e64_dpp s10, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
-# W64: v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W32-REAL16: v_cmp_lt_i16_e64_dpp s10, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W32-FAKE16: v_cmp_lt_i16_e64_dpp s10, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W64-REAL16: v_cmp_lt_i16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W64-FAKE16: v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
 
 0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff
-# W32: v_cmp_lt_i16_e64_dpp s10, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
-# W64: v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W32-REAL16: v_cmp_lt_i16_e64_dpp s10, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W32-FAKE16: v_cmp_lt_i16_e64_dpp s10, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W64-REAL16: v_cmp_lt_i16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W64-FAKE16: v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
 
 0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff
-# W32: v_cmp_lt_i16_e64_dpp s10, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
-# W64: v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W32-REAL16: v_cmp_lt_i16_e64_dpp s10, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W32-FAKE16: v_cmp_lt_i16_e64_dpp s10, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W64-REAL16: v_cmp_lt_i16_e64_dpp s[10:11], v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W64-FAKE16: v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
 
 0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff
-# W32: v_cmp_lt_i16_e64_dpp s10, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
-# W64: v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W32-REAL16: v_cmp_lt_i16_e64_dpp s10, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W32-FAKE16: v_cmp_lt_i16_e64_dpp s10, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W64-REAL16: v_cmp_lt_i16_e64_dpp s[10:11], v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W64-FAKE16: v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
 
 0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff
-# W32: v_cmp_lt_i16_e64_dpp s10, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
-# W64: v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W32-REAL16: v_cmp_lt_i16_e64_dpp s10, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W32-FAKE16: v_cmp_lt_i16_e64_dpp s10, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W64-REAL16: v_cmp_lt_i16_e64_dpp s[10:11], v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W64-FAKE16: v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
 
 0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff
-# W32: v_cmp_lt_i16_e64_dpp s10, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
-# W64: v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W32-REAL16: v_cmp_lt_i16_e64_dpp s10, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W32-FAKE16: v_cmp_lt_i16_e64_dpp s10, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W64-REAL16: v_cmp_lt_i16_e64_dpp s[10:11], v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W64-FAKE16: v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
 
 0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff
-# W32: v_cmp_lt_i16_e64_dpp s10, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
-# W64: v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W32-REAL16: v_cmp_lt_i16_e64_dpp s10, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W32-FAKE16: v_cmp_lt_i16_e64_dpp s10, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W64-REAL16: v_cmp_lt_i16_e64_dpp s[10:11], v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W64-FAKE16: v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
 
 0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff
-# W32: v_cmp_lt_i16_e64_dpp s10, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
-# W64: v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W32-REAL16: v_cmp_lt_i16_e64_dpp s10, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W32-FAKE16: v_cmp_lt_i16_e64_dpp s10, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W64-REAL16: v_cmp_lt_i16_e64_dpp s[10:11], v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W64-FAKE16: v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
 
 0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff
-# W32: v_cmp_lt_i16_e64_dpp s10, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
-# W64: v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W32-REAL16: v_cmp_lt_i16_e64_dpp s10, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W32-FAKE16: v_cmp_lt_i16_e64_dpp s10, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W64-REAL16: v_cmp_lt_i16_e64_dpp s[10:11], v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W64-FAKE16: v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
 
 0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff
-# W32: v_cmp_lt_i16_e64_dpp s10, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
-# W64: v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W32-REAL16: v_cmp_lt_i16_e64_dpp s10, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W32-FAKE16: v_cmp_lt_i16_e64_dpp s10, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W64-REAL16: v_cmp_lt_i16_e64_dpp s[10:11], v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W64-FAKE16: v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
 
 0x68,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff
-# W32: v_cmp_lt_i16_e64_dpp s104, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
-# W64: v_cmp_lt_i16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W32-REAL16: v_cmp_lt_i16_e64_dpp s104, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W32-FAKE16: v_cmp_lt_i16_e64_dpp s104, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W64-REAL16: v_cmp_lt_i16_e64_dpp s[104:105], v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W64-FAKE16: v_cmp_lt_i16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
 
 0x6a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01
-# W32: v_cmp_lt_i16_e64_dpp vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
-# W64: v_cmp_lt_i16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W32-REAL16: v_cmp_lt_i16_e64_dpp vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W32-FAKE16: v_cmp_lt_i16_e64_dpp vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W64-REAL16: v_cmp_lt_i16_e64_dpp vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W64-FAKE16: v_cmp_lt_i16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
 
 0x7a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13
-# W32: v_cmp_lt_i16_e64_dpp ttmp14, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
-# W64: v_cmp_lt_i16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W32-REAL16: v_cmp_lt_i16_e64_dpp ttmp14, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_lt_i16_e64_dpp ttmp14, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_lt_i16_e64_dpp ttmp[14:15], v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_lt_i16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
 
 0x7c,0x00,0x31,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30
-# GFX11: v_cmp_lt_i16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x31,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W32-REAL16: v_cmp_lt_i16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x31,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_lt_i16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x31,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_lt_i16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x31,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_lt_i16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x31,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+
+0x7a,0x08,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13
+# W32-REAL16: v_cmp_lt_i16_e64_dpp ttmp14, v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x08,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_lt_i16_e64_dpp ttmp14, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_lt_i16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x08,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_lt_i16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+
+0x7c,0x10,0x31,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30
+# W32-REAL16: v_cmp_lt_i16_e64_dpp null, v255.l, v255.h op_sel:[0,1] row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x10,0x31,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_lt_i16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x31,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_lt_i16_e64_dpp null, v255.l, v255.h op_sel:[0,1] row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x10,0x31,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_lt_i16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x31,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
 
 0x0a,0x00,0x41,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff
 # W32: v_cmp_lt_i32_e64_dpp s10, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x41,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
@@ -2026,59 +2395,100 @@
 # GFX11: v_cmp_lt_i32_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x41,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
 
 0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff
-# W32: v_cmp_lt_u16_e64_dpp s10, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
-# W64: v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W32-REAL16: v_cmp_lt_u16_e64_dpp s10, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W32-FAKE16: v_cmp_lt_u16_e64_dpp s10, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W64-REAL16: v_cmp_lt_u16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W64-FAKE16: v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
 
 0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff
-# W32: v_cmp_lt_u16_e64_dpp s10, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
-# W64: v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W32-REAL16: v_cmp_lt_u16_e64_dpp s10, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W32-FAKE16: v_cmp_lt_u16_e64_dpp s10, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W64-REAL16: v_cmp_lt_u16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W64-FAKE16: v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
 
 0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff
-# W32: v_cmp_lt_u16_e64_dpp s10, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
-# W64: v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W32-REAL16: v_cmp_lt_u16_e64_dpp s10, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W32-FAKE16: v_cmp_lt_u16_e64_dpp s10, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W64-REAL16: v_cmp_lt_u16_e64_dpp s[10:11], v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W64-FAKE16: v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
 
 0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff
-# W32: v_cmp_lt_u16_e64_dpp s10, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
-# W64: v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W32-REAL16: v_cmp_lt_u16_e64_dpp s10, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W32-FAKE16: v_cmp_lt_u16_e64_dpp s10, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W64-REAL16: v_cmp_lt_u16_e64_dpp s[10:11], v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W64-FAKE16: v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
 
 0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff
-# W32: v_cmp_lt_u16_e64_dpp s10, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
-# W64: v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W32-REAL16: v_cmp_lt_u16_e64_dpp s10, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W32-FAKE16: v_cmp_lt_u16_e64_dpp s10, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W64-REAL16: v_cmp_lt_u16_e64_dpp s[10:11], v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W64-FAKE16: v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
 
 0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff
-# W32: v_cmp_lt_u16_e64_dpp s10, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
-# W64: v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W32-REAL16: v_cmp_lt_u16_e64_dpp s10, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W32-FAKE16: v_cmp_lt_u16_e64_dpp s10, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W64-REAL16: v_cmp_lt_u16_e64_dpp s[10:11], v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W64-FAKE16: v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
 
 0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff
-# W32: v_cmp_lt_u16_e64_dpp s10, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
-# W64: v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W32-REAL16: v_cmp_lt_u16_e64_dpp s10, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W32-FAKE16: v_cmp_lt_u16_e64_dpp s10, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W64-REAL16: v_cmp_lt_u16_e64_dpp s[10:11], v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W64-FAKE16: v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
 
 0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff
-# W32: v_cmp_lt_u16_e64_dpp s10, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
-# W64: v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W32-REAL16: v_cmp_lt_u16_e64_dpp s10, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W32-FAKE16: v_cmp_lt_u16_e64_dpp s10, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W64-REAL16: v_cmp_lt_u16_e64_dpp s[10:11], v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W64-FAKE16: v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
 
 0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff
-# W32: v_cmp_lt_u16_e64_dpp s10, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
-# W64: v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W32-REAL16: v_cmp_lt_u16_e64_dpp s10, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W32-FAKE16: v_cmp_lt_u16_e64_dpp s10, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W64-REAL16: v_cmp_lt_u16_e64_dpp s[10:11], v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W64-FAKE16: v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
 
 0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff
-# W32: v_cmp_lt_u16_e64_dpp s10, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
-# W64: v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W32-REAL16: v_cmp_lt_u16_e64_dpp s10, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W32-FAKE16: v_cmp_lt_u16_e64_dpp s10, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W64-REAL16: v_cmp_lt_u16_e64_dpp s[10:11], v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W64-FAKE16: v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
 
 0x68,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff
-# W32: v_cmp_lt_u16_e64_dpp s104, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
-# W64: v_cmp_lt_u16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W32-REAL16: v_cmp_lt_u16_e64_dpp s104, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W32-FAKE16: v_cmp_lt_u16_e64_dpp s104, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W64-REAL16: v_cmp_lt_u16_e64_dpp s[104:105], v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W64-FAKE16: v_cmp_lt_u16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
 
 0x6a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01
-# W32: v_cmp_lt_u16_e64_dpp vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
-# W64: v_cmp_lt_u16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W32-REAL16: v_cmp_lt_u16_e64_dpp vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W32-FAKE16: v_cmp_lt_u16_e64_dpp vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W64-REAL16: v_cmp_lt_u16_e64_dpp vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W64-FAKE16: v_cmp_lt_u16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
 
 0x7a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13
-# W32: v_cmp_lt_u16_e64_dpp ttmp14, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
-# W64: v_cmp_lt_u16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W32-REAL16: v_cmp_lt_u16_e64_dpp ttmp14, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_lt_u16_e64_dpp ttmp14, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_lt_u16_e64_dpp ttmp[14:15], v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_lt_u16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
 
 0x7c,0x00,0x39,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30
-# GFX11: v_cmp_lt_u16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x39,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W32-REAL16: v_cmp_lt_u16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x39,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_lt_u16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x39,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_lt_u16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x39,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_lt_u16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x39,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+
+0x7a,0x08,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13
+# W32-REAL16: v_cmp_lt_u16_e64_dpp ttmp14, v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x08,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_lt_u16_e64_dpp ttmp14, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_lt_u16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x08,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_lt_u16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+
+0x7c,0x10,0x39,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30
+# W32-REAL16: v_cmp_lt_u16_e64_dpp null, v255.l, v255.h op_sel:[0,1] row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x10,0x39,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_lt_u16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x39,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_lt_u16_e64_dpp null, v255.l, v255.h op_sel:[0,1] row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x10,0x39,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_lt_u16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x39,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
 
 0x0a,0x00,0x49,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff
 # W32: v_cmp_lt_u32_e64_dpp s10, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x49,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
@@ -2136,59 +2546,100 @@
 # GFX11: v_cmp_lt_u32_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x49,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
 
 0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff
-# W32: v_cmp_ne_i16_e64_dpp s10, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
-# W64: v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W32-REAL16: v_cmp_ne_i16_e64_dpp s10, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W32-FAKE16: v_cmp_ne_i16_e64_dpp s10, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W64-REAL16: v_cmp_ne_i16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W64-FAKE16: v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
 
 0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff
-# W32: v_cmp_ne_i16_e64_dpp s10, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
-# W64: v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W32-REAL16: v_cmp_ne_i16_e64_dpp s10, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W32-FAKE16: v_cmp_ne_i16_e64_dpp s10, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W64-REAL16: v_cmp_ne_i16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W64-FAKE16: v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
 
 0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff
-# W32: v_cmp_ne_i16_e64_dpp s10, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
-# W64: v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W32-REAL16: v_cmp_ne_i16_e64_dpp s10, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W32-FAKE16: v_cmp_ne_i16_e64_dpp s10, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W64-REAL16: v_cmp_ne_i16_e64_dpp s[10:11], v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W64-FAKE16: v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
 
 0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff
-# W32: v_cmp_ne_i16_e64_dpp s10, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
-# W64: v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W32-REAL16: v_cmp_ne_i16_e64_dpp s10, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W32-FAKE16: v_cmp_ne_i16_e64_dpp s10, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W64-REAL16: v_cmp_ne_i16_e64_dpp s[10:11], v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W64-FAKE16: v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
 
 0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff
-# W32: v_cmp_ne_i16_e64_dpp s10, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
-# W64: v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W32-REAL16: v_cmp_ne_i16_e64_dpp s10, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W32-FAKE16: v_cmp_ne_i16_e64_dpp s10, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W64-REAL16: v_cmp_ne_i16_e64_dpp s[10:11], v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W64-FAKE16: v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
 
 0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff
-# W32: v_cmp_ne_i16_e64_dpp s10, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
-# W64: v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W32-REAL16: v_cmp_ne_i16_e64_dpp s10, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W32-FAKE16: v_cmp_ne_i16_e64_dpp s10, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W64-REAL16: v_cmp_ne_i16_e64_dpp s[10:11], v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W64-FAKE16: v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
 
 0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff
-# W32: v_cmp_ne_i16_e64_dpp s10, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
-# W64: v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W32-REAL16: v_cmp_ne_i16_e64_dpp s10, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W32-FAKE16: v_cmp_ne_i16_e64_dpp s10, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W64-REAL16: v_cmp_ne_i16_e64_dpp s[10:11], v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W64-FAKE16: v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
 
 0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff
-# W32: v_cmp_ne_i16_e64_dpp s10, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
-# W64: v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W32-REAL16: v_cmp_ne_i16_e64_dpp s10, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W32-FAKE16: v_cmp_ne_i16_e64_dpp s10, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W64-REAL16: v_cmp_ne_i16_e64_dpp s[10:11], v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W64-FAKE16: v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
 
 0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff
-# W32: v_cmp_ne_i16_e64_dpp s10, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
-# W64: v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W32-REAL16: v_cmp_ne_i16_e64_dpp s10, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W32-FAKE16: v_cmp_ne_i16_e64_dpp s10, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W64-REAL16: v_cmp_ne_i16_e64_dpp s[10:11], v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W64-FAKE16: v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
 
 0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff
-# W32: v_cmp_ne_i16_e64_dpp s10, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
-# W64: v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W32-REAL16: v_cmp_ne_i16_e64_dpp s10, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W32-FAKE16: v_cmp_ne_i16_e64_dpp s10, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W64-REAL16: v_cmp_ne_i16_e64_dpp s[10:11], v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W64-FAKE16: v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
 
 0x68,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff
-# W32: v_cmp_ne_i16_e64_dpp s104, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
-# W64: v_cmp_ne_i16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W32-REAL16: v_cmp_ne_i16_e64_dpp s104, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W32-FAKE16: v_cmp_ne_i16_e64_dpp s104, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W64-REAL16: v_cmp_ne_i16_e64_dpp s[104:105], v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W64-FAKE16: v_cmp_ne_i16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
 
 0x6a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01
-# W32: v_cmp_ne_i16_e64_dpp vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
-# W64: v_cmp_ne_i16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W32-REAL16: v_cmp_ne_i16_e64_dpp vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W32-FAKE16: v_cmp_ne_i16_e64_dpp vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W64-REAL16: v_cmp_ne_i16_e64_dpp vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W64-FAKE16: v_cmp_ne_i16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
 
 0x7a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13
-# W32: v_cmp_ne_i16_e64_dpp ttmp14, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
-# W64: v_cmp_ne_i16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W32-REAL16: v_cmp_ne_i16_e64_dpp ttmp14, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_ne_i16_e64_dpp ttmp14, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_ne_i16_e64_dpp ttmp[14:15], v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_ne_i16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
 
 0x7c,0x00,0x35,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30
-# GFX11: v_cmp_ne_i16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x35,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W32-REAL16: v_cmp_ne_i16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x35,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_ne_i16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x35,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_ne_i16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x35,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_ne_i16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x35,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+
+0x7a,0x08,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13
+# W32-REAL16: v_cmp_ne_i16_e64_dpp ttmp14, v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x08,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_ne_i16_e64_dpp ttmp14, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_ne_i16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x08,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_ne_i16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+
+0x7c,0x10,0x35,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30
+# W32-REAL16: v_cmp_ne_i16_e64_dpp null, v255.l, v255.h op_sel:[0,1] row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x10,0x35,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_ne_i16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x35,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_ne_i16_e64_dpp null, v255.l, v255.h op_sel:[0,1] row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x10,0x35,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_ne_i16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x35,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
 
 0x0a,0x00,0x45,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff
 # W32: v_cmp_ne_i32_e64_dpp s10, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x45,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
@@ -2246,59 +2697,100 @@
 # GFX11: v_cmp_ne_i32_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x45,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
 
 0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff
-# W32: v_cmp_ne_u16_e64_dpp s10, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
-# W64: v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W32-REAL16: v_cmp_ne_u16_e64_dpp s10, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W32-FAKE16: v_cmp_ne_u16_e64_dpp s10, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W64-REAL16: v_cmp_ne_u16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W64-FAKE16: v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
 
 0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff
-# W32: v_cmp_ne_u16_e64_dpp s10, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
-# W64: v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W32-REAL16: v_cmp_ne_u16_e64_dpp s10, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W32-FAKE16: v_cmp_ne_u16_e64_dpp s10, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W64-REAL16: v_cmp_ne_u16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W64-FAKE16: v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
 
 0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff
-# W32: v_cmp_ne_u16_e64_dpp s10, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
-# W64: v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W32-REAL16: v_cmp_ne_u16_e64_dpp s10, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W32-FAKE16: v_cmp_ne_u16_e64_dpp s10, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W64-REAL16: v_cmp_ne_u16_e64_dpp s[10:11], v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W64-FAKE16: v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
 
 0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff
-# W32: v_cmp_ne_u16_e64_dpp s10, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
-# W64: v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W32-REAL16: v_cmp_ne_u16_e64_dpp s10, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W32-FAKE16: v_cmp_ne_u16_e64_dpp s10, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W64-REAL16: v_cmp_ne_u16_e64_dpp s[10:11], v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W64-FAKE16: v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
 
 0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff
-# W32: v_cmp_ne_u16_e64_dpp s10, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
-# W64: v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W32-REAL16: v_cmp_ne_u16_e64_dpp s10, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W32-FAKE16: v_cmp_ne_u16_e64_dpp s10, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W64-REAL16: v_cmp_ne_u16_e64_dpp s[10:11], v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W64-FAKE16: v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
 
 0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff
-# W32: v_cmp_ne_u16_e64_dpp s10, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
-# W64: v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W32-REAL16: v_cmp_ne_u16_e64_dpp s10, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W32-FAKE16: v_cmp_ne_u16_e64_dpp s10, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W64-REAL16: v_cmp_ne_u16_e64_dpp s[10:11], v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W64-FAKE16: v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
 
 0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff
-# W32: v_cmp_ne_u16_e64_dpp s10, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
-# W64: v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W32-REAL16: v_cmp_ne_u16_e64_dpp s10, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W32-FAKE16: v_cmp_ne_u16_e64_dpp s10, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W64-REAL16: v_cmp_ne_u16_e64_dpp s[10:11], v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W64-FAKE16: v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
 
 0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff
-# W32: v_cmp_ne_u16_e64_dpp s10, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
-# W64: v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W32-REAL16: v_cmp_ne_u16_e64_dpp s10, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W32-FAKE16: v_cmp_ne_u16_e64_dpp s10, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W64-REAL16: v_cmp_ne_u16_e64_dpp s[10:11], v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W64-FAKE16: v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
 
 0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff
-# W32: v_cmp_ne_u16_e64_dpp s10, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
-# W64: v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W32-REAL16: v_cmp_ne_u16_e64_dpp s10, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W32-FAKE16: v_cmp_ne_u16_e64_dpp s10, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W64-REAL16: v_cmp_ne_u16_e64_dpp s[10:11], v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W64-FAKE16: v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
 
 0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff
-# W32: v_cmp_ne_u16_e64_dpp s10, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
-# W64: v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W32-REAL16: v_cmp_ne_u16_e64_dpp s10, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W32-FAKE16: v_cmp_ne_u16_e64_dpp s10, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W64-REAL16: v_cmp_ne_u16_e64_dpp s[10:11], v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W64-FAKE16: v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
 
 0x68,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff
-# W32: v_cmp_ne_u16_e64_dpp s104, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
-# W64: v_cmp_ne_u16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W32-REAL16: v_cmp_ne_u16_e64_dpp s104, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W32-FAKE16: v_cmp_ne_u16_e64_dpp s104, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W64-REAL16: v_cmp_ne_u16_e64_dpp s[104:105], v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W64-FAKE16: v_cmp_ne_u16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
 
 0x6a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01
-# W32: v_cmp_ne_u16_e64_dpp vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
-# W64: v_cmp_ne_u16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W32-REAL16: v_cmp_ne_u16_e64_dpp vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W32-FAKE16: v_cmp_ne_u16_e64_dpp vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W64-REAL16: v_cmp_ne_u16_e64_dpp vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W64-FAKE16: v_cmp_ne_u16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
 
 0x7a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13
-# W32: v_cmp_ne_u16_e64_dpp ttmp14, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
-# W64: v_cmp_ne_u16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W32-REAL16: v_cmp_ne_u16_e64_dpp ttmp14, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_ne_u16_e64_dpp ttmp14, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_ne_u16_e64_dpp ttmp[14:15], v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_ne_u16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
 
 0x7c,0x00,0x3d,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30
-# GFX11: v_cmp_ne_u16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x3d,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W32-REAL16: v_cmp_ne_u16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x3d,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_ne_u16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x3d,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_ne_u16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x3d,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_ne_u16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x3d,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+
+0x7a,0x08,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13
+# W32-REAL16: v_cmp_ne_u16_e64_dpp ttmp14, v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x08,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_ne_u16_e64_dpp ttmp14, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_ne_u16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x08,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_ne_u16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+
+0x7c,0x10,0x3d,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30
+# W32-REAL16: v_cmp_ne_u16_e64_dpp null, v255.l, v255.h op_sel:[0,1] row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x10,0x3d,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_ne_u16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x3d,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_ne_u16_e64_dpp null, v255.l, v255.h op_sel:[0,1] row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x10,0x3d,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_ne_u16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x3d,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
 
 0x0a,0x00,0x4d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff
 # W32: v_cmp_ne_u32_e64_dpp s10, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x4d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp8_from_vopc.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp8_from_vopc.txt
index f399fe7f0aef4d..8551e018b83000 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp8_from_vopc.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp8_from_vopc.txt
@@ -81,23 +81,46 @@
 # GFX11: v_cmp_eq_f32_e64_dpp null, -|v255|, -|v255| clamp dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x83,0x12,0xd4,0xea,0xfe,0x03,0x60,0xff,0x00,0x00,0x00]
 
 0x0a,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_eq_i16_e64_dpp s10, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_eq_i16_e64_dpp s10, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_eq_i16_e64_dpp s10, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_eq_i16_e64_dpp s[10:11], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x68,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_eq_i16_e64_dpp s104, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_eq_i16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_eq_i16_e64_dpp s104, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_eq_i16_e64_dpp s104, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_eq_i16_e64_dpp s[104:105], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_eq_i16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x6a,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_eq_i16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_eq_i16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_eq_i16_e64_dpp vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_eq_i16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_eq_i16_e64_dpp vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_eq_i16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x7a,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_eq_i16_e64_dpp ttmp14, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_eq_i16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_eq_i16_e64_dpp ttmp14, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_eq_i16_e64_dpp ttmp14, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_eq_i16_e64_dpp ttmp[14:15], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_eq_i16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x7c,0x00,0x32,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00
-# GFX11: v_cmp_eq_i16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x32,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W32-REAL16: v_cmp_eq_i16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x32,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_eq_i16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x32,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_eq_i16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x32,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_eq_i16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x32,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+
+0x7a,0x08,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
+# W32-REAL16: v_cmp_eq_i16_e64_dpp ttmp14, v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x08,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_eq_i16_e64_dpp ttmp14, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_eq_i16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x08,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_eq_i16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+
+0x7c,0x10,0x32,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00
+# W32-REAL16: v_cmp_eq_i16_e64_dpp null, v255.l, v255.h op_sel:[0,1] dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x10,0x32,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_eq_i16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x32,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_eq_i16_e64_dpp null, v255.l, v255.h op_sel:[0,1] dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x10,0x32,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_eq_i16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x32,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
 
 0x0a,0x00,0x42,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
 # W32: v_cmp_eq_i32_e64_dpp s10, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x42,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
@@ -119,23 +142,46 @@
 # GFX11: v_cmp_eq_i32_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x42,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
 
 0x0a,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_eq_u16_e64_dpp s10, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_eq_u16_e64_dpp s10, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_eq_u16_e64_dpp s10, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_eq_u16_e64_dpp s[10:11], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x68,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_eq_u16_e64_dpp s104, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_eq_u16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_eq_u16_e64_dpp s104, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_eq_u16_e64_dpp s104, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_eq_u16_e64_dpp s[104:105], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_eq_u16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x6a,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_eq_u16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_eq_u16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_eq_u16_e64_dpp vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_eq_u16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_eq_u16_e64_dpp vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_eq_u16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x7a,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_eq_u16_e64_dpp ttmp14, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_eq_u16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_eq_u16_e64_dpp ttmp14, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_eq_u16_e64_dpp ttmp14, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_eq_u16_e64_dpp ttmp[14:15], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_eq_u16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x7c,0x00,0x3a,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00
-# GFX11: v_cmp_eq_u16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x3a,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W32-REAL16: v_cmp_eq_u16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x3a,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_eq_u16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x3a,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_eq_u16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x3a,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_eq_u16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x3a,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+
+0x7a,0x08,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
+# W32-REAL16: v_cmp_eq_u16_e64_dpp ttmp14, v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x08,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_eq_u16_e64_dpp ttmp14, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_eq_u16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x08,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_eq_u16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+
+0x7c,0x10,0x3a,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00
+# W32-REAL16: v_cmp_eq_u16_e64_dpp null, v255.l, v255.h op_sel:[0,1] dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x10,0x3a,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_eq_u16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x3a,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_eq_u16_e64_dpp null, v255.l, v255.h op_sel:[0,1] dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x10,0x3a,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_eq_u16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x3a,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
 
 0x0a,0x00,0x4a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
 # W32: v_cmp_eq_u32_e64_dpp s10, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x4a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
@@ -271,23 +317,46 @@
 # GFX11: v_cmp_ge_f32_e64_dpp null, -|v255|, -|v255| clamp dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x83,0x16,0xd4,0xea,0xfe,0x03,0x60,0xff,0x00,0x00,0x00]
 
 0x0a,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_ge_i16_e64_dpp s10, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_ge_i16_e64_dpp s10, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_ge_i16_e64_dpp s10, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_ge_i16_e64_dpp s[10:11], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x68,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_ge_i16_e64_dpp s104, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_ge_i16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_ge_i16_e64_dpp s104, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_ge_i16_e64_dpp s104, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_ge_i16_e64_dpp s[104:105], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_ge_i16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x6a,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_ge_i16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_ge_i16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_ge_i16_e64_dpp vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_ge_i16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_ge_i16_e64_dpp vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_ge_i16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x7a,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_ge_i16_e64_dpp ttmp14, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_ge_i16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_ge_i16_e64_dpp ttmp14, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_ge_i16_e64_dpp ttmp14, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_ge_i16_e64_dpp ttmp[14:15], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_ge_i16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x7c,0x00,0x36,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00
-# GFX11: v_cmp_ge_i16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x36,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W32-REAL16: v_cmp_ge_i16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x36,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_ge_i16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x36,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_ge_i16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x36,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_ge_i16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x36,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+
+0x7a,0x08,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
+# W32-REAL16: v_cmp_ge_i16_e64_dpp ttmp14, v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x08,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_ge_i16_e64_dpp ttmp14, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_ge_i16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x08,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_ge_i16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+
+0x7c,0x10,0x36,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00
+# W32-REAL16: v_cmp_ge_i16_e64_dpp null, v255.l, v255.h op_sel:[0,1] dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x10,0x36,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_ge_i16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x36,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_ge_i16_e64_dpp null, v255.l, v255.h op_sel:[0,1] dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x10,0x36,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_ge_i16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x36,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
 
 0x0a,0x00,0x46,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
 # W32: v_cmp_ge_i32_e64_dpp s10, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x46,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
@@ -309,23 +378,46 @@
 # GFX11: v_cmp_ge_i32_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x46,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
 
 0x0a,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_ge_u16_e64_dpp s10, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_ge_u16_e64_dpp s10, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_ge_u16_e64_dpp s10, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_ge_u16_e64_dpp s[10:11], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x68,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_ge_u16_e64_dpp s104, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_ge_u16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_ge_u16_e64_dpp s104, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_ge_u16_e64_dpp s104, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_ge_u16_e64_dpp s[104:105], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_ge_u16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x6a,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_ge_u16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_ge_u16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_ge_u16_e64_dpp vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_ge_u16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_ge_u16_e64_dpp vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_ge_u16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x7a,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_ge_u16_e64_dpp ttmp14, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_ge_u16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_ge_u16_e64_dpp ttmp14, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_ge_u16_e64_dpp ttmp14, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_ge_u16_e64_dpp ttmp[14:15], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_ge_u16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x7c,0x00,0x3e,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00
-# GFX11: v_cmp_ge_u16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x3e,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W32-REAL16: v_cmp_ge_u16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x3e,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_ge_u16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x3e,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_ge_u16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x3e,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_ge_u16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x3e,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+
+0x7a,0x08,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
+# W32-REAL16: v_cmp_ge_u16_e64_dpp ttmp14, v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x08,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_ge_u16_e64_dpp ttmp14, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_ge_u16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x08,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_ge_u16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+
+0x7c,0x10,0x3e,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00
+# W32-REAL16: v_cmp_ge_u16_e64_dpp null, v255.l, v255.h op_sel:[0,1] dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x10,0x3e,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_ge_u16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x3e,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_ge_u16_e64_dpp null, v255.l, v255.h op_sel:[0,1] dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x10,0x3e,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_ge_u16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x3e,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
 
 0x0a,0x00,0x4e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
 # W32: v_cmp_ge_u32_e64_dpp s10, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x4e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
@@ -385,23 +477,46 @@
 # GFX11: v_cmp_gt_f32_e64_dpp null, -|v255|, -|v255| clamp dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x83,0x14,0xd4,0xea,0xfe,0x03,0x60,0xff,0x00,0x00,0x00]
 
 0x0a,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_gt_i16_e64_dpp s10, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_gt_i16_e64_dpp s10, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_gt_i16_e64_dpp s10, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_gt_i16_e64_dpp s[10:11], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x68,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_gt_i16_e64_dpp s104, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_gt_i16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_gt_i16_e64_dpp s104, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_gt_i16_e64_dpp s104, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_gt_i16_e64_dpp s[104:105], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_gt_i16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x6a,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_gt_i16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_gt_i16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_gt_i16_e64_dpp vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_gt_i16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_gt_i16_e64_dpp vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_gt_i16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x7a,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_gt_i16_e64_dpp ttmp14, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_gt_i16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_gt_i16_e64_dpp ttmp14, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_gt_i16_e64_dpp ttmp14, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_gt_i16_e64_dpp ttmp[14:15], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_gt_i16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x7c,0x00,0x34,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00
-# GFX11: v_cmp_gt_i16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x34,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W32-REAL16: v_cmp_gt_i16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x34,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_gt_i16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x34,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_gt_i16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x34,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_gt_i16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x34,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+
+0x7a,0x08,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
+# W32-REAL16: v_cmp_gt_i16_e64_dpp ttmp14, v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x08,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_gt_i16_e64_dpp ttmp14, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_gt_i16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x08,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_gt_i16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+
+0x7c,0x10,0x34,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00
+# W32-REAL16: v_cmp_gt_i16_e64_dpp null, v255.l, v255.h op_sel:[0,1] dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x10,0x34,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_gt_i16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x34,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_gt_i16_e64_dpp null, v255.l, v255.h op_sel:[0,1] dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x10,0x34,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_gt_i16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x34,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
 
 0x0a,0x00,0x44,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
 # W32: v_cmp_gt_i32_e64_dpp s10, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x44,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
@@ -423,23 +538,46 @@
 # GFX11: v_cmp_gt_i32_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x44,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
 
 0x0a,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_gt_u16_e64_dpp s10, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_gt_u16_e64_dpp s10, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_gt_u16_e64_dpp s10, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_gt_u16_e64_dpp s[10:11], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x68,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_gt_u16_e64_dpp s104, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_gt_u16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_gt_u16_e64_dpp s104, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_gt_u16_e64_dpp s104, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_gt_u16_e64_dpp s[104:105], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_gt_u16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x6a,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_gt_u16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_gt_u16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_gt_u16_e64_dpp vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_gt_u16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_gt_u16_e64_dpp vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_gt_u16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x7a,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_gt_u16_e64_dpp ttmp14, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_gt_u16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_gt_u16_e64_dpp ttmp14, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_gt_u16_e64_dpp ttmp14, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_gt_u16_e64_dpp ttmp[14:15], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_gt_u16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x7c,0x00,0x3c,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00
-# GFX11: v_cmp_gt_u16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x3c,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W32-REAL16: v_cmp_gt_u16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x3c,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_gt_u16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x3c,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_gt_u16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x3c,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_gt_u16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x3c,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+
+0x7a,0x08,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
+# W32-REAL16: v_cmp_gt_u16_e64_dpp ttmp14, v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x08,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_gt_u16_e64_dpp ttmp14, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_gt_u16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x08,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_gt_u16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+
+0x7c,0x10,0x3c,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00
+# W32-REAL16: v_cmp_gt_u16_e64_dpp null, v255.l, v255.h op_sel:[0,1] dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x10,0x3c,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_gt_u16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x3c,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_gt_u16_e64_dpp null, v255.l, v255.h op_sel:[0,1] dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x10,0x3c,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_gt_u16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x3c,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
 
 0x0a,0x00,0x4c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
 # W32: v_cmp_gt_u32_e64_dpp s10, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x4c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
@@ -499,23 +637,46 @@
 # GFX11: v_cmp_le_f32_e64_dpp null, -|v255|, -|v255| clamp dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x83,0x13,0xd4,0xea,0xfe,0x03,0x60,0xff,0x00,0x00,0x00]
 
 0x0a,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_le_i16_e64_dpp s10, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_le_i16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_le_i16_e64_dpp s10, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_le_i16_e64_dpp s10, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_le_i16_e64_dpp s[10:11], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_le_i16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x68,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_le_i16_e64_dpp s104, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_le_i16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_le_i16_e64_dpp s104, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_le_i16_e64_dpp s104, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_le_i16_e64_dpp s[104:105], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_le_i16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x6a,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_le_i16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_le_i16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_le_i16_e64_dpp vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_le_i16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_le_i16_e64_dpp vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_le_i16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x7a,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_le_i16_e64_dpp ttmp14, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_le_i16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_le_i16_e64_dpp ttmp14, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_le_i16_e64_dpp ttmp14, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_le_i16_e64_dpp ttmp[14:15], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_le_i16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x7c,0x00,0x33,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00
-# GFX11: v_cmp_le_i16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x33,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W32-REAL16: v_cmp_le_i16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x33,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_le_i16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x33,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_le_i16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x33,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_le_i16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x33,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+
+0x7a,0x08,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
+# W32-REAL16: v_cmp_le_i16_e64_dpp ttmp14, v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x08,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_le_i16_e64_dpp ttmp14, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_le_i16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x08,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_le_i16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+
+0x7c,0x10,0x33,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00
+# W32-REAL16: v_cmp_le_i16_e64_dpp null, v255.l, v255.h op_sel:[0,1] dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x10,0x33,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_le_i16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x33,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_le_i16_e64_dpp null, v255.l, v255.h op_sel:[0,1] dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x10,0x33,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_le_i16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x33,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
 
 0x0a,0x00,0x43,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
 # W32: v_cmp_le_i32_e64_dpp s10, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x43,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
@@ -537,23 +698,46 @@
 # GFX11: v_cmp_le_i32_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x43,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
 
 0x0a,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_le_u16_e64_dpp s10, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_le_u16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_le_u16_e64_dpp s10, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_le_u16_e64_dpp s10, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_le_u16_e64_dpp s[10:11], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_le_u16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x68,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_le_u16_e64_dpp s104, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_le_u16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_le_u16_e64_dpp s104, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_le_u16_e64_dpp s104, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_le_u16_e64_dpp s[104:105], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_le_u16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x6a,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_le_u16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_le_u16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_le_u16_e64_dpp vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_le_u16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_le_u16_e64_dpp vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_le_u16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x7a,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_le_u16_e64_dpp ttmp14, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_le_u16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_le_u16_e64_dpp ttmp14, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_le_u16_e64_dpp ttmp14, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_le_u16_e64_dpp ttmp[14:15], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_le_u16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x7c,0x00,0x3b,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00
-# GFX11: v_cmp_le_u16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x3b,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W32-REAL16: v_cmp_le_u16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x3b,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_le_u16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x3b,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_le_u16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x3b,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_le_u16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x3b,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+
+0x7a,0x08,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
+# W32-REAL16: v_cmp_le_u16_e64_dpp ttmp14, v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x08,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_le_u16_e64_dpp ttmp14, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_le_u16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x08,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_le_u16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+
+0x7c,0x10,0x3b,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00
+# W32-REAL16: v_cmp_le_u16_e64_dpp null, v255.l, v255.h op_sel:[0,1] dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x10,0x3b,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_le_u16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x3b,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_le_u16_e64_dpp null, v255.l, v255.h op_sel:[0,1] dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x10,0x3b,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_le_u16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x3b,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
 
 0x0a,0x00,0x4b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
 # W32: v_cmp_le_u32_e64_dpp s10, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x4b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
@@ -674,23 +858,46 @@
 # GFX11: v_cmp_lt_f32_e64_dpp null, -|v255|, -|v255| clamp dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x83,0x11,0xd4,0xea,0xfe,0x03,0x60,0xff,0x00,0x00,0x00]
 
 0x0a,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_lt_i16_e64_dpp s10, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_lt_i16_e64_dpp s10, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_lt_i16_e64_dpp s10, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_lt_i16_e64_dpp s[10:11], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x68,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_lt_i16_e64_dpp s104, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_lt_i16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_lt_i16_e64_dpp s104, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_lt_i16_e64_dpp s104, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_lt_i16_e64_dpp s[104:105], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_lt_i16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x6a,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_lt_i16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_lt_i16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_lt_i16_e64_dpp vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_lt_i16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_lt_i16_e64_dpp vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_lt_i16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x7a,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_lt_i16_e64_dpp ttmp14, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_lt_i16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_lt_i16_e64_dpp ttmp14, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_lt_i16_e64_dpp ttmp14, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_lt_i16_e64_dpp ttmp[14:15], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_lt_i16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x7c,0x00,0x31,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00
-# GFX11: v_cmp_lt_i16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x31,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W32-REAL16: v_cmp_lt_i16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x31,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_lt_i16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x31,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_lt_i16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x31,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_lt_i16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x31,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+
+0x7a,0x08,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
+# W32-REAL16: v_cmp_lt_i16_e64_dpp ttmp14, v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x08,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_lt_i16_e64_dpp ttmp14, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_lt_i16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x08,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_lt_i16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+
+0x7c,0x10,0x31,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00
+# W32-REAL16: v_cmp_lt_i16_e64_dpp null, v255.l, v255.h op_sel:[0,1] dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x10,0x31,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_lt_i16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x31,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_lt_i16_e64_dpp null, v255.l, v255.h op_sel:[0,1] dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x10,0x31,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_lt_i16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x31,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
 
 0x0a,0x00,0x41,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
 # W32: v_cmp_lt_i32_e64_dpp s10, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x41,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
@@ -712,23 +919,46 @@
 # GFX11: v_cmp_lt_i32_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x41,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
 
 0x0a,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_lt_u16_e64_dpp s10, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_lt_u16_e64_dpp s10, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_lt_u16_e64_dpp s10, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_lt_u16_e64_dpp s[10:11], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x68,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_lt_u16_e64_dpp s104, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_lt_u16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_lt_u16_e64_dpp s104, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_lt_u16_e64_dpp s104, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_lt_u16_e64_dpp s[104:105], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_lt_u16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x6a,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_lt_u16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_lt_u16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_lt_u16_e64_dpp vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_lt_u16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_lt_u16_e64_dpp vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_lt_u16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x7a,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_lt_u16_e64_dpp ttmp14, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_lt_u16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_lt_u16_e64_dpp ttmp14, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_lt_u16_e64_dpp ttmp14, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_lt_u16_e64_dpp ttmp[14:15], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_lt_u16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x7c,0x00,0x39,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00
-# GFX11: v_cmp_lt_u16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x39,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W32-REAL16: v_cmp_lt_u16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x39,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_lt_u16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x39,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_lt_u16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x39,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_lt_u16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x39,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+
+0x7a,0x08,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
+# W32-REAL16: v_cmp_lt_u16_e64_dpp ttmp14, v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x08,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_lt_u16_e64_dpp ttmp14, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_lt_u16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x08,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_lt_u16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+
+0x7c,0x10,0x39,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00
+# W32-REAL16: v_cmp_lt_u16_e64_dpp null, v255.l, v255.h op_sel:[0,1] dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x10,0x39,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_lt_u16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x39,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_lt_u16_e64_dpp null, v255.l, v255.h op_sel:[0,1] dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x10,0x39,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_lt_u16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x39,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
 
 0x0a,0x00,0x49,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
 # W32: v_cmp_lt_u32_e64_dpp s10, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x49,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
@@ -750,23 +980,46 @@
 # GFX11: v_cmp_lt_u32_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x49,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
 
 0x0a,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_ne_i16_e64_dpp s10, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_ne_i16_e64_dpp s10, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_ne_i16_e64_dpp s10, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_ne_i16_e64_dpp s[10:11], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x68,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_ne_i16_e64_dpp s104, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_ne_i16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_ne_i16_e64_dpp s104, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_ne_i16_e64_dpp s104, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_ne_i16_e64_dpp s[104:105], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_ne_i16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x6a,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_ne_i16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_ne_i16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_ne_i16_e64_dpp vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_ne_i16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_ne_i16_e64_dpp vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_ne_i16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x7a,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_ne_i16_e64_dpp ttmp14, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_ne_i16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_ne_i16_e64_dpp ttmp14, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_ne_i16_e64_dpp ttmp14, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_ne_i16_e64_dpp ttmp[14:15], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_ne_i16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x7c,0x00,0x35,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00
-# GFX11: v_cmp_ne_i16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x35,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W32-REAL16: v_cmp_ne_i16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x35,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_ne_i16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x35,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_ne_i16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x35,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_ne_i16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x35,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+
+0x7a,0x08,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
+# W32-REAL16: v_cmp_ne_i16_e64_dpp ttmp14, v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x08,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_ne_i16_e64_dpp ttmp14, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_ne_i16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x08,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_ne_i16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+
+0x7c,0x10,0x35,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00
+# W32-REAL16: v_cmp_ne_i16_e64_dpp null, v255.l, v255.h op_sel:[0,1] dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x10,0x35,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_ne_i16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x35,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_ne_i16_e64_dpp null, v255.l, v255.h op_sel:[0,1] dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x10,0x35,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_ne_i16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x35,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
 
 0x0a,0x00,0x45,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
 # W32: v_cmp_ne_i32_e64_dpp s10, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x45,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
@@ -788,23 +1041,46 @@
 # GFX11: v_cmp_ne_i32_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x45,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
 
 0x0a,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_ne_u16_e64_dpp s10, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_ne_u16_e64_dpp s10, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_ne_u16_e64_dpp s10, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_ne_u16_e64_dpp s[10:11], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x68,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_ne_u16_e64_dpp s104, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_ne_u16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_ne_u16_e64_dpp s104, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_ne_u16_e64_dpp s104, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_ne_u16_e64_dpp s[104:105], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_ne_u16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x6a,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_ne_u16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_ne_u16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_ne_u16_e64_dpp vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_ne_u16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_ne_u16_e64_dpp vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_ne_u16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x7a,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_ne_u16_e64_dpp ttmp14, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_ne_u16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_ne_u16_e64_dpp ttmp14, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_ne_u16_e64_dpp ttmp14, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_ne_u16_e64_dpp ttmp[14:15], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_ne_u16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x7c,0x00,0x3d,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00
-# GFX11: v_cmp_ne_u16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x3d,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W32-REAL16: v_cmp_ne_u16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x3d,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_ne_u16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x3d,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_ne_u16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x3d,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_ne_u16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x3d,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+
+0x7a,0x08,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
+# W32-REAL16: v_cmp_ne_u16_e64_dpp ttmp14, v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x08,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_ne_u16_e64_dpp ttmp14, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_ne_u16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x08,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_ne_u16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+
+0x7c,0x10,0x3d,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00
+# W32-REAL16: v_cmp_ne_u16_e64_dpp null, v255.l, v255.h op_sel:[0,1] dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x10,0x3d,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_ne_u16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x3d,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_ne_u16_e64_dpp null, v255.l, v255.h op_sel:[0,1] dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x10,0x3d,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_ne_u16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x3d,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
 
 0x0a,0x00,0x4d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
 # W32: v_cmp_ne_u32_e64_dpp s10, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x4d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vopc.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vopc.txt
index 350087218d3668..8b9b0a819676f7 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vopc.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vopc.txt
@@ -351,12 +351,16 @@
 # GFX11: v_cmp_eq_f64_e64 null, 0xaf123456, -|vcc| clamp ; encoding: [0x7c,0x82,0x22,0xd4,0xff,0xd4,0x00,0x40,0x56,0x34,0x12,0xaf]
 
 0x0a,0x00,0x32,0xd4,0x01,0x05,0x02,0x00
-# W32: v_cmp_eq_i16_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x32,0xd4,0x01,0x05,0x02,0x00]
-# W64: v_cmp_eq_i16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x32,0xd4,0x01,0x05,0x02,0x00]
+# W32-REAL16: v_cmp_eq_i16_e64 s10, v1.l, v2.l        ; encoding: [0x0a,0x00,0x32,0xd4,0x01,0x05,0x02,0x00]
+# W32-FAKE16: v_cmp_eq_i16_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x32,0xd4,0x01,0x05,0x02,0x00]
+# W64-REAL16: v_cmp_eq_i16_e64 s[10:11], v1.l, v2.l   ; encoding: [0x0a,0x00,0x32,0xd4,0x01,0x05,0x02,0x00]
+# W64-FAKE16: v_cmp_eq_i16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x32,0xd4,0x01,0x05,0x02,0x00]
 
 0x0a,0x00,0x32,0xd4,0xff,0xff,0x03,0x00
-# W32: v_cmp_eq_i16_e64 s10, v255, v255        ; encoding: [0x0a,0x00,0x32,0xd4,0xff,0xff,0x03,0x00]
-# W64: v_cmp_eq_i16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x32,0xd4,0xff,0xff,0x03,0x00]
+# W32-REAL16: v_cmp_eq_i16_e64 s10, v255.l, v255.l    ; encoding: [0x0a,0x00,0x32,0xd4,0xff,0xff,0x03,0x00]
+# W32-FAKE16: v_cmp_eq_i16_e64 s10, v255, v255        ; encoding: [0x0a,0x00,0x32,0xd4,0xff,0xff,0x03,0x00]
+# W64-REAL16: v_cmp_eq_i16_e64 s[10:11], v255.l, v255.l ; encoding: [0x0a,0x00,0x32,0xd4,0xff,0xff,0x03,0x00]
+# W64-FAKE16: v_cmp_eq_i16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x32,0xd4,0xff,0xff,0x03,0x00]
 
 0x0a,0x00,0x32,0xd4,0x01,0x04,0x00,0x00
 # W32: v_cmp_eq_i16_e64 s10, s1, s2            ; encoding: [0x0a,0x00,0x32,0xd4,0x01,0x04,0x00,0x00]
@@ -409,6 +413,18 @@
 0x7c,0x00,0x32,0xd4,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00
 # GFX11: v_cmp_eq_i16_e64 null, 0xfe0b, vcc_hi   ; encoding: [0x7c,0x00,0x32,0xd4,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00]
 
+0x0a,0x08,0x32,0xd4,0x01,0x05,0x02,0x00
+# W32-REAL16: v_cmp_eq_i16_e64 s10, v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x0a,0x08,0x32,0xd4,0x01,0x05,0x02,0x00]
+# W32-FAKE16: v_cmp_eq_i16_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x32,0xd4,0x01,0x05,0x02,0x00]
+# W64-REAL16: v_cmp_eq_i16_e64 s[10:11], v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x0a,0x08,0x32,0xd4,0x01,0x05,0x02,0x00]
+# W64-FAKE16: v_cmp_eq_i16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x32,0xd4,0x01,0x05,0x02,0x00]
+
+0x0a,0x10,0x32,0xd4,0xff,0xff,0x03,0x00
+# W32-REAL16: v_cmp_eq_i16_e64 s10, v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x0a,0x10,0x32,0xd4,0xff,0xff,0x03,0x00]
+# W32-FAKE16: v_cmp_eq_i16_e64 s10, v255, v255        ; encoding: [0x0a,0x00,0x32,0xd4,0xff,0xff,0x03,0x00]
+# W64-REAL16: v_cmp_eq_i16_e64 s[10:11], v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x0a,0x10,0x32,0xd4,0xff,0xff,0x03,0x00]
+# W64-FAKE16: v_cmp_eq_i16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x32,0xd4,0xff,0xff,0x03,0x00]
+
 0x0a,0x00,0x42,0xd4,0x01,0x05,0x02,0x00
 # W32: v_cmp_eq_i32_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x42,0xd4,0x01,0x05,0x02,0x00]
 # W64: v_cmp_eq_i32_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x42,0xd4,0x01,0x05,0x02,0x00]
@@ -516,12 +532,16 @@
 # GFX11: v_cmp_eq_i64_e64 null, 0xaf123456, vcc  ; encoding: [0x7c,0x00,0x52,0xd4,0xff,0xd4,0x00,0x00,0x56,0x34,0x12,0xaf]
 
 0x0a,0x00,0x3a,0xd4,0x01,0x05,0x02,0x00
-# W32: v_cmp_eq_u16_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x3a,0xd4,0x01,0x05,0x02,0x00]
-# W64: v_cmp_eq_u16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x3a,0xd4,0x01,0x05,0x02,0x00]
+# W32-REAL16: v_cmp_eq_u16_e64 s10, v1.l, v2.l        ; encoding: [0x0a,0x00,0x3a,0xd4,0x01,0x05,0x02,0x00]
+# W32-FAKE16: v_cmp_eq_u16_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x3a,0xd4,0x01,0x05,0x02,0x00]
+# W64-REAL16: v_cmp_eq_u16_e64 s[10:11], v1.l, v2.l   ; encoding: [0x0a,0x00,0x3a,0xd4,0x01,0x05,0x02,0x00]
+# W64-FAKE16: v_cmp_eq_u16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x3a,0xd4,0x01,0x05,0x02,0x00]
 
 0x0a,0x00,0x3a,0xd4,0xff,0xff,0x03,0x00
-# W32: v_cmp_eq_u16_e64 s10, v255, v255        ; encoding: [0x0a,0x00,0x3a,0xd4,0xff,0xff,0x03,0x00]
-# W64: v_cmp_eq_u16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x3a,0xd4,0xff,0xff,0x03,0x00]
+# W32-REAL16: v_cmp_eq_u16_e64 s10, v255.l, v255.l    ; encoding: [0x0a,0x00,0x3a,0xd4,0xff,0xff,0x03,0x00]
+# W32-FAKE16: v_cmp_eq_u16_e64 s10, v255, v255        ; encoding: [0x0a,0x00,0x3a,0xd4,0xff,0xff,0x03,0x00]
+# W64-REAL16: v_cmp_eq_u16_e64 s[10:11], v255.l, v255.l ; encoding: [0x0a,0x00,0x3a,0xd4,0xff,0xff,0x03,0x00]
+# W64-FAKE16: v_cmp_eq_u16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x3a,0xd4,0xff,0xff,0x03,0x00]
 
 0x0a,0x00,0x3a,0xd4,0x01,0x04,0x00,0x00
 # W32: v_cmp_eq_u16_e64 s10, s1, s2            ; encoding: [0x0a,0x00,0x3a,0xd4,0x01,0x04,0x00,0x00]
@@ -574,6 +594,18 @@
 0x7c,0x00,0x3a,0xd4,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00
 # GFX11: v_cmp_eq_u16_e64 null, 0xfe0b, vcc_hi   ; encoding: [0x7c,0x00,0x3a,0xd4,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00]
 
+0x0a,0x08,0x3a,0xd4,0x01,0x05,0x02,0x00
+# W32-REAL16: v_cmp_eq_u16_e64 s10, v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x0a,0x08,0x3a,0xd4,0x01,0x05,0x02,0x00]
+# W32-FAKE16: v_cmp_eq_u16_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x3a,0xd4,0x01,0x05,0x02,0x00]
+# W64-REAL16: v_cmp_eq_u16_e64 s[10:11], v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x0a,0x08,0x3a,0xd4,0x01,0x05,0x02,0x00]
+# W64-FAKE16: v_cmp_eq_u16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x3a,0xd4,0x01,0x05,0x02,0x00]
+
+0x0a,0x10,0x3a,0xd4,0xff,0xff,0x03,0x00
+# W32-REAL16: v_cmp_eq_u16_e64 s10, v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x0a,0x10,0x3a,0xd4,0xff,0xff,0x03,0x00]
+# W32-FAKE16: v_cmp_eq_u16_e64 s10, v255, v255        ; encoding: [0x0a,0x00,0x3a,0xd4,0xff,0xff,0x03,0x00]
+# W64-REAL16: v_cmp_eq_u16_e64 s[10:11], v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x0a,0x10,0x3a,0xd4,0xff,0xff,0x03,0x00]
+# W64-FAKE16: v_cmp_eq_u16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x3a,0xd4,0xff,0xff,0x03,0x00]
+
 0x0a,0x00,0x4a,0xd4,0x01,0x05,0x02,0x00
 # W32: v_cmp_eq_u32_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x4a,0xd4,0x01,0x05,0x02,0x00]
 # W64: v_cmp_eq_u32_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x4a,0xd4,0x01,0x05,0x02,0x00]
@@ -1223,12 +1255,16 @@
 # GFX11: v_cmp_ge_f64_e64 null, 0xaf123456, -|vcc| clamp ; encoding: [0x7c,0x82,0x26,0xd4,0xff,0xd4,0x00,0x40,0x56,0x34,0x12,0xaf]
 
 0x0a,0x00,0x36,0xd4,0x01,0x05,0x02,0x00
-# W32: v_cmp_ge_i16_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x36,0xd4,0x01,0x05,0x02,0x00]
-# W64: v_cmp_ge_i16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x36,0xd4,0x01,0x05,0x02,0x00]
+# W32-REAL16: v_cmp_ge_i16_e64 s10, v1.l, v2.l        ; encoding: [0x0a,0x00,0x36,0xd4,0x01,0x05,0x02,0x00]
+# W32-FAKE16: v_cmp_ge_i16_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x36,0xd4,0x01,0x05,0x02,0x00]
+# W64-REAL16: v_cmp_ge_i16_e64 s[10:11], v1.l, v2.l   ; encoding: [0x0a,0x00,0x36,0xd4,0x01,0x05,0x02,0x00]
+# W64-FAKE16: v_cmp_ge_i16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x36,0xd4,0x01,0x05,0x02,0x00]
 
 0x0a,0x00,0x36,0xd4,0xff,0xff,0x03,0x00
-# W32: v_cmp_ge_i16_e64 s10, v255, v255        ; encoding: [0x0a,0x00,0x36,0xd4,0xff,0xff,0x03,0x00]
-# W64: v_cmp_ge_i16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x36,0xd4,0xff,0xff,0x03,0x00]
+# W32-REAL16: v_cmp_ge_i16_e64 s10, v255.l, v255.l    ; encoding: [0x0a,0x00,0x36,0xd4,0xff,0xff,0x03,0x00]
+# W32-FAKE16: v_cmp_ge_i16_e64 s10, v255, v255        ; encoding: [0x0a,0x00,0x36,0xd4,0xff,0xff,0x03,0x00]
+# W64-REAL16: v_cmp_ge_i16_e64 s[10:11], v255.l, v255.l ; encoding: [0x0a,0x00,0x36,0xd4,0xff,0xff,0x03,0x00]
+# W64-FAKE16: v_cmp_ge_i16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x36,0xd4,0xff,0xff,0x03,0x00]
 
 0x0a,0x00,0x36,0xd4,0x01,0x04,0x00,0x00
 # W32: v_cmp_ge_i16_e64 s10, s1, s2            ; encoding: [0x0a,0x00,0x36,0xd4,0x01,0x04,0x00,0x00]
@@ -1281,6 +1317,18 @@
 0x7c,0x00,0x36,0xd4,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00
 # GFX11: v_cmp_ge_i16_e64 null, 0xfe0b, vcc_hi   ; encoding: [0x7c,0x00,0x36,0xd4,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00]
 
+0x0a,0x08,0x36,0xd4,0x01,0x05,0x02,0x00
+# W32-REAL16: v_cmp_ge_i16_e64 s10, v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x0a,0x08,0x36,0xd4,0x01,0x05,0x02,0x00]
+# W32-FAKE16: v_cmp_ge_i16_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x36,0xd4,0x01,0x05,0x02,0x00]
+# W64-REAL16: v_cmp_ge_i16_e64 s[10:11], v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x0a,0x08,0x36,0xd4,0x01,0x05,0x02,0x00]
+# W64-FAKE16: v_cmp_ge_i16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x36,0xd4,0x01,0x05,0x02,0x00]
+
+0x0a,0x10,0x36,0xd4,0xff,0xff,0x03,0x00
+# W32-REAL16: v_cmp_ge_i16_e64 s10, v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x0a,0x10,0x36,0xd4,0xff,0xff,0x03,0x00]
+# W32-FAKE16: v_cmp_ge_i16_e64 s10, v255, v255        ; encoding: [0x0a,0x00,0x36,0xd4,0xff,0xff,0x03,0x00]
+# W64-REAL16: v_cmp_ge_i16_e64 s[10:11], v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x0a,0x10,0x36,0xd4,0xff,0xff,0x03,0x00]
+# W64-FAKE16: v_cmp_ge_i16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x36,0xd4,0xff,0xff,0x03,0x00]
+
 0x0a,0x00,0x46,0xd4,0x01,0x05,0x02,0x00
 # W32: v_cmp_ge_i32_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x46,0xd4,0x01,0x05,0x02,0x00]
 # W64: v_cmp_ge_i32_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x46,0xd4,0x01,0x05,0x02,0x00]
@@ -1388,12 +1436,16 @@
 # GFX11: v_cmp_ge_i64_e64 null, 0xaf123456, vcc  ; encoding: [0x7c,0x00,0x56,0xd4,0xff,0xd4,0x00,0x00,0x56,0x34,0x12,0xaf]
 
 0x0a,0x00,0x3e,0xd4,0x01,0x05,0x02,0x00
-# W32: v_cmp_ge_u16_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x3e,0xd4,0x01,0x05,0x02,0x00]
-# W64: v_cmp_ge_u16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x3e,0xd4,0x01,0x05,0x02,0x00]
+# W32-REAL16: v_cmp_ge_u16_e64 s10, v1.l, v2.l        ; encoding: [0x0a,0x00,0x3e,0xd4,0x01,0x05,0x02,0x00]
+# W32-FAKE16: v_cmp_ge_u16_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x3e,0xd4,0x01,0x05,0x02,0x00]
+# W64-REAL16: v_cmp_ge_u16_e64 s[10:11], v1.l, v2.l   ; encoding: [0x0a,0x00,0x3e,0xd4,0x01,0x05,0x02,0x00]
+# W64-FAKE16: v_cmp_ge_u16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x3e,0xd4,0x01,0x05,0x02,0x00]
 
 0x0a,0x00,0x3e,0xd4,0xff,0xff,0x03,0x00
-# W32: v_cmp_ge_u16_e64 s10, v255, v255        ; encoding: [0x0a,0x00,0x3e,0xd4,0xff,0xff,0x03,0x00]
-# W64: v_cmp_ge_u16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x3e,0xd4,0xff,0xff,0x03,0x00]
+# W32-REAL16: v_cmp_ge_u16_e64 s10, v255.l, v255.l    ; encoding: [0x0a,0x00,0x3e,0xd4,0xff,0xff,0x03,0x00]
+# W32-FAKE16: v_cmp_ge_u16_e64 s10, v255, v255        ; encoding: [0x0a,0x00,0x3e,0xd4,0xff,0xff,0x03,0x00]
+# W64-REAL16: v_cmp_ge_u16_e64 s[10:11], v255.l, v255.l ; encoding: [0x0a,0x00,0x3e,0xd4,0xff,0xff,0x03,0x00]
+# W64-FAKE16: v_cmp_ge_u16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x3e,0xd4,0xff,0xff,0x03,0x00]
 
 0x0a,0x00,0x3e,0xd4,0x01,0x04,0x00,0x00
 # W32: v_cmp_ge_u16_e64 s10, s1, s2            ; encoding: [0x0a,0x00,0x3e,0xd4,0x01,0x04,0x00,0x00]
@@ -1446,6 +1498,18 @@
 0x7c,0x00,0x3e,0xd4,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00
 # GFX11: v_cmp_ge_u16_e64 null, 0xfe0b, vcc_hi   ; encoding: [0x7c,0x00,0x3e,0xd4,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00]
 
+0x0a,0x08,0x3e,0xd4,0x01,0x05,0x02,0x00
+# W32-REAL16: v_cmp_ge_u16_e64 s10, v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x0a,0x08,0x3e,0xd4,0x01,0x05,0x02,0x00]
+# W32-FAKE16: v_cmp_ge_u16_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x3e,0xd4,0x01,0x05,0x02,0x00]
+# W64-REAL16: v_cmp_ge_u16_e64 s[10:11], v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x0a,0x08,0x3e,0xd4,0x01,0x05,0x02,0x00]
+# W64-FAKE16: v_cmp_ge_u16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x3e,0xd4,0x01,0x05,0x02,0x00]
+
+0x0a,0x10,0x3e,0xd4,0xff,0xff,0x03,0x00
+# W32-REAL16: v_cmp_ge_u16_e64 s10, v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x0a,0x10,0x3e,0xd4,0xff,0xff,0x03,0x00]
+# W32-FAKE16: v_cmp_ge_u16_e64 s10, v255, v255        ; encoding: [0x0a,0x00,0x3e,0xd4,0xff,0xff,0x03,0x00]
+# W64-REAL16: v_cmp_ge_u16_e64 s[10:11], v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x0a,0x10,0x3e,0xd4,0xff,0xff,0x03,0x00]
+# W64-FAKE16: v_cmp_ge_u16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x3e,0xd4,0xff,0xff,0x03,0x00]
+
 0x0a,0x00,0x4e,0xd4,0x01,0x05,0x02,0x00
 # W32: v_cmp_ge_u32_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x4e,0xd4,0x01,0x05,0x02,0x00]
 # W64: v_cmp_ge_u32_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x4e,0xd4,0x01,0x05,0x02,0x00]
@@ -1718,12 +1782,16 @@
 # GFX11: v_cmp_gt_f64_e64 null, 0xaf123456, -|vcc| clamp ; encoding: [0x7c,0x82,0x24,0xd4,0xff,0xd4,0x00,0x40,0x56,0x34,0x12,0xaf]
 
 0x0a,0x00,0x34,0xd4,0x01,0x05,0x02,0x00
-# W32: v_cmp_gt_i16_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x34,0xd4,0x01,0x05,0x02,0x00]
-# W64: v_cmp_gt_i16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x34,0xd4,0x01,0x05,0x02,0x00]
+# W32-REAL16: v_cmp_gt_i16_e64 s10, v1.l, v2.l        ; encoding: [0x0a,0x00,0x34,0xd4,0x01,0x05,0x02,0x00]
+# W32-FAKE16: v_cmp_gt_i16_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x34,0xd4,0x01,0x05,0x02,0x00]
+# W64-REAL16: v_cmp_gt_i16_e64 s[10:11], v1.l, v2.l   ; encoding: [0x0a,0x00,0x34,0xd4,0x01,0x05,0x02,0x00]
+# W64-FAKE16: v_cmp_gt_i16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x34,0xd4,0x01,0x05,0x02,0x00]
 
 0x0a,0x00,0x34,0xd4,0xff,0xff,0x03,0x00
-# W32: v_cmp_gt_i16_e64 s10, v255, v255        ; encoding: [0x0a,0x00,0x34,0xd4,0xff,0xff,0x03,0x00]
-# W64: v_cmp_gt_i16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x34,0xd4,0xff,0xff,0x03,0x00]
+# W32-REAL16: v_cmp_gt_i16_e64 s10, v255.l, v255.l    ; encoding: [0x0a,0x00,0x34,0xd4,0xff,0xff,0x03,0x00]
+# W32-FAKE16: v_cmp_gt_i16_e64 s10, v255, v255        ; encoding: [0x0a,0x00,0x34,0xd4,0xff,0xff,0x03,0x00]
+# W64-REAL16: v_cmp_gt_i16_e64 s[10:11], v255.l, v255.l ; encoding: [0x0a,0x00,0x34,0xd4,0xff,0xff,0x03,0x00]
+# W64-FAKE16: v_cmp_gt_i16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x34,0xd4,0xff,0xff,0x03,0x00]
 
 0x0a,0x00,0x34,0xd4,0x01,0x04,0x00,0x00
 # W32: v_cmp_gt_i16_e64 s10, s1, s2            ; encoding: [0x0a,0x00,0x34,0xd4,0x01,0x04,0x00,0x00]
@@ -1776,6 +1844,18 @@
 0x7c,0x00,0x34,0xd4,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00
 # GFX11: v_cmp_gt_i16_e64 null, 0xfe0b, vcc_hi   ; encoding: [0x7c,0x00,0x34,0xd4,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00]
 
+0x0a,0x08,0x34,0xd4,0x01,0x05,0x02,0x00
+# W32-REAL16: v_cmp_gt_i16_e64 s10, v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x0a,0x08,0x34,0xd4,0x01,0x05,0x02,0x00]
+# W32-FAKE16: v_cmp_gt_i16_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x34,0xd4,0x01,0x05,0x02,0x00]
+# W64-REAL16: v_cmp_gt_i16_e64 s[10:11], v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x0a,0x08,0x34,0xd4,0x01,0x05,0x02,0x00]
+# W64-FAKE16: v_cmp_gt_i16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x34,0xd4,0x01,0x05,0x02,0x00]
+
+0x0a,0x10,0x34,0xd4,0xff,0xff,0x03,0x00
+# W32-REAL16: v_cmp_gt_i16_e64 s10, v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x0a,0x10,0x34,0xd4,0xff,0xff,0x03,0x00]
+# W32-FAKE16: v_cmp_gt_i16_e64 s10, v255, v255        ; encoding: [0x0a,0x00,0x34,0xd4,0xff,0xff,0x03,0x00]
+# W64-REAL16: v_cmp_gt_i16_e64 s[10:11], v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x0a,0x10,0x34,0xd4,0xff,0xff,0x03,0x00]
+# W64-FAKE16: v_cmp_gt_i16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x34,0xd4,0xff,0xff,0x03,0x00]
+
 0x0a,0x00,0x44,0xd4,0x01,0x05,0x02,0x00
 # W32: v_cmp_gt_i32_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x44,0xd4,0x01,0x05,0x02,0x00]
 # W64: v_cmp_gt_i32_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x44,0xd4,0x01,0x05,0x02,0x00]
@@ -1883,12 +1963,16 @@
 # GFX11: v_cmp_gt_i64_e64 null, 0xaf123456, vcc  ; encoding: [0x7c,0x00,0x54,0xd4,0xff,0xd4,0x00,0x00,0x56,0x34,0x12,0xaf]
 
 0x0a,0x00,0x3c,0xd4,0x01,0x05,0x02,0x00
-# W32: v_cmp_gt_u16_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x3c,0xd4,0x01,0x05,0x02,0x00]
-# W64: v_cmp_gt_u16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x3c,0xd4,0x01,0x05,0x02,0x00]
+# W32-REAL16: v_cmp_gt_u16_e64 s10, v1.l, v2.l        ; encoding: [0x0a,0x00,0x3c,0xd4,0x01,0x05,0x02,0x00]
+# W32-FAKE16: v_cmp_gt_u16_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x3c,0xd4,0x01,0x05,0x02,0x00]
+# W64-REAL16: v_cmp_gt_u16_e64 s[10:11], v1.l, v2.l   ; encoding: [0x0a,0x00,0x3c,0xd4,0x01,0x05,0x02,0x00]
+# W64-FAKE16: v_cmp_gt_u16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x3c,0xd4,0x01,0x05,0x02,0x00]
 
 0x0a,0x00,0x3c,0xd4,0xff,0xff,0x03,0x00
-# W32: v_cmp_gt_u16_e64 s10, v255, v255        ; encoding: [0x0a,0x00,0x3c,0xd4,0xff,0xff,0x03,0x00]
-# W64: v_cmp_gt_u16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x3c,0xd4,0xff,0xff,0x03,0x00]
+# W32-REAL16: v_cmp_gt_u16_e64 s10, v255.l, v255.l    ; encoding: [0x0a,0x00,0x3c,0xd4,0xff,0xff,0x03,0x00]
+# W32-FAKE16: v_cmp_gt_u16_e64 s10, v255, v255        ; encoding: [0x0a,0x00,0x3c,0xd4,0xff,0xff,0x03,0x00]
+# W64-REAL16: v_cmp_gt_u16_e64 s[10:11], v255.l, v255.l ; encoding: [0x0a,0x00,0x3c,0xd4,0xff,0xff,0x03,0x00]
+# W64-FAKE16: v_cmp_gt_u16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x3c,0xd4,0xff,0xff,0x03,0x00]
 
 0x0a,0x00,0x3c,0xd4,0x01,0x04,0x00,0x00
 # W32: v_cmp_gt_u16_e64 s10, s1, s2            ; encoding: [0x0a,0x00,0x3c,0xd4,0x01,0x04,0x00,0x00]
@@ -1941,6 +2025,18 @@
 0x7c,0x00,0x3c,0xd4,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00
 # GFX11: v_cmp_gt_u16_e64 null, 0xfe0b, vcc_hi   ; encoding: [0x7c,0x00,0x3c,0xd4,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00]
 
+0x0a,0x08,0x3c,0xd4,0x01,0x05,0x02,0x00
+# W32-REAL16: v_cmp_gt_u16_e64 s10, v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x0a,0x08,0x3c,0xd4,0x01,0x05,0x02,0x00]
+# W32-FAKE16: v_cmp_gt_u16_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x3c,0xd4,0x01,0x05,0x02,0x00]
+# W64-REAL16: v_cmp_gt_u16_e64 s[10:11], v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x0a,0x08,0x3c,0xd4,0x01,0x05,0x02,0x00]
+# W64-FAKE16: v_cmp_gt_u16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x3c,0xd4,0x01,0x05,0x02,0x00]
+
+0x0a,0x10,0x3c,0xd4,0xff,0xff,0x03,0x00
+# W32-REAL16: v_cmp_gt_u16_e64 s10, v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x0a,0x10,0x3c,0xd4,0xff,0xff,0x03,0x00]
+# W32-FAKE16: v_cmp_gt_u16_e64 s10, v255, v255        ; encoding: [0x0a,0x00,0x3c,0xd4,0xff,0xff,0x03,0x00]
+# W64-REAL16: v_cmp_gt_u16_e64 s[10:11], v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x0a,0x10,0x3c,0xd4,0xff,0xff,0x03,0x00]
+# W64-FAKE16: v_cmp_gt_u16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x3c,0xd4,0xff,0xff,0x03,0x00]
+
 0x0a,0x00,0x4c,0xd4,0x01,0x05,0x02,0x00
 # W32: v_cmp_gt_u32_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x4c,0xd4,0x01,0x05,0x02,0x00]
 # W64: v_cmp_gt_u32_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x4c,0xd4,0x01,0x05,0x02,0x00]
@@ -2213,12 +2309,16 @@
 # GFX11: v_cmp_le_f64_e64 null, 0xaf123456, -|vcc| clamp ; encoding: [0x7c,0x82,0x23,0xd4,0xff,0xd4,0x00,0x40,0x56,0x34,0x12,0xaf]
 
 0x0a,0x00,0x33,0xd4,0x01,0x05,0x02,0x00
-# W32: v_cmp_le_i16_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x33,0xd4,0x01,0x05,0x02,0x00]
-# W64: v_cmp_le_i16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x33,0xd4,0x01,0x05,0x02,0x00]
+# W32-REAL16: v_cmp_le_i16_e64 s10, v1.l, v2.l        ; encoding: [0x0a,0x00,0x33,0xd4,0x01,0x05,0x02,0x00]
+# W32-FAKE16: v_cmp_le_i16_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x33,0xd4,0x01,0x05,0x02,0x00]
+# W64-REAL16: v_cmp_le_i16_e64 s[10:11], v1.l, v2.l   ; encoding: [0x0a,0x00,0x33,0xd4,0x01,0x05,0x02,0x00]
+# W64-FAKE16: v_cmp_le_i16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x33,0xd4,0x01,0x05,0x02,0x00]
 
 0x0a,0x00,0x33,0xd4,0xff,0xff,0x03,0x00
-# W32: v_cmp_le_i16_e64 s10, v255, v255        ; encoding: [0x0a,0x00,0x33,0xd4,0xff,0xff,0x03,0x00]
-# W64: v_cmp_le_i16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x33,0xd4,0xff,0xff,0x03,0x00]
+# W32-REAL16: v_cmp_le_i16_e64 s10, v255.l, v255.l    ; encoding: [0x0a,0x00,0x33,0xd4,0xff,0xff,0x03,0x00]
+# W32-FAKE16: v_cmp_le_i16_e64 s10, v255, v255        ; encoding: [0x0a,0x00,0x33,0xd4,0xff,0xff,0x03,0x00]
+# W64-REAL16: v_cmp_le_i16_e64 s[10:11], v255.l, v255.l ; encoding: [0x0a,0x00,0x33,0xd4,0xff,0xff,0x03,0x00]
+# W64-FAKE16: v_cmp_le_i16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x33,0xd4,0xff,0xff,0x03,0x00]
 
 0x0a,0x00,0x33,0xd4,0x01,0x04,0x00,0x00
 # W32: v_cmp_le_i16_e64 s10, s1, s2            ; encoding: [0x0a,0x00,0x33,0xd4,0x01,0x04,0x00,0x00]
@@ -2271,6 +2371,18 @@
 0x7c,0x00,0x33,0xd4,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00
 # GFX11: v_cmp_le_i16_e64 null, 0xfe0b, vcc_hi   ; encoding: [0x7c,0x00,0x33,0xd4,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00]
 
+0x0a,0x08,0x33,0xd4,0x01,0x05,0x02,0x00
+# W32-REAL16: v_cmp_le_i16_e64 s10, v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x0a,0x08,0x33,0xd4,0x01,0x05,0x02,0x00]
+# W32-FAKE16: v_cmp_le_i16_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x33,0xd4,0x01,0x05,0x02,0x00]
+# W64-REAL16: v_cmp_le_i16_e64 s[10:11], v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x0a,0x08,0x33,0xd4,0x01,0x05,0x02,0x00]
+# W64-FAKE16: v_cmp_le_i16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x33,0xd4,0x01,0x05,0x02,0x00]
+
+0x0a,0x10,0x33,0xd4,0xff,0xff,0x03,0x00
+# W32-REAL16: v_cmp_le_i16_e64 s10, v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x0a,0x10,0x33,0xd4,0xff,0xff,0x03,0x00]
+# W32-FAKE16: v_cmp_le_i16_e64 s10, v255, v255        ; encoding: [0x0a,0x00,0x33,0xd4,0xff,0xff,0x03,0x00]
+# W64-REAL16: v_cmp_le_i16_e64 s[10:11], v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x0a,0x10,0x33,0xd4,0xff,0xff,0x03,0x00]
+# W64-FAKE16: v_cmp_le_i16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x33,0xd4,0xff,0xff,0x03,0x00]
+
 0x0a,0x00,0x43,0xd4,0x01,0x05,0x02,0x00
 # W32: v_cmp_le_i32_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x43,0xd4,0x01,0x05,0x02,0x00]
 # W64: v_cmp_le_i32_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x43,0xd4,0x01,0x05,0x02,0x00]
@@ -2378,12 +2490,16 @@
 # GFX11: v_cmp_le_i64_e64 null, 0xaf123456, vcc  ; encoding: [0x7c,0x00,0x53,0xd4,0xff,0xd4,0x00,0x00,0x56,0x34,0x12,0xaf]
 
 0x0a,0x00,0x3b,0xd4,0x01,0x05,0x02,0x00
-# W32: v_cmp_le_u16_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x3b,0xd4,0x01,0x05,0x02,0x00]
-# W64: v_cmp_le_u16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x3b,0xd4,0x01,0x05,0x02,0x00]
+# W32-REAL16: v_cmp_le_u16_e64 s10, v1.l, v2.l        ; encoding: [0x0a,0x00,0x3b,0xd4,0x01,0x05,0x02,0x00]
+# W32-FAKE16: v_cmp_le_u16_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x3b,0xd4,0x01,0x05,0x02,0x00]
+# W64-REAL16: v_cmp_le_u16_e64 s[10:11], v1.l, v2.l   ; encoding: [0x0a,0x00,0x3b,0xd4,0x01,0x05,0x02,0x00]
+# W64-FAKE16: v_cmp_le_u16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x3b,0xd4,0x01,0x05,0x02,0x00]
 
 0x0a,0x00,0x3b,0xd4,0xff,0xff,0x03,0x00
-# W32: v_cmp_le_u16_e64 s10, v255, v255        ; encoding: [0x0a,0x00,0x3b,0xd4,0xff,0xff,0x03,0x00]
-# W64: v_cmp_le_u16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x3b,0xd4,0xff,0xff,0x03,0x00]
+# W32-REAL16: v_cmp_le_u16_e64 s10, v255.l, v255.l    ; encoding: [0x0a,0x00,0x3b,0xd4,0xff,0xff,0x03,0x00]
+# W32-FAKE16: v_cmp_le_u16_e64 s10, v255, v255        ; encoding: [0x0a,0x00,0x3b,0xd4,0xff,0xff,0x03,0x00]
+# W64-REAL16: v_cmp_le_u16_e64 s[10:11], v255.l, v255.l ; encoding: [0x0a,0x00,0x3b,0xd4,0xff,0xff,0x03,0x00]
+# W64-FAKE16: v_cmp_le_u16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x3b,0xd4,0xff,0xff,0x03,0x00]
 
 0x0a,0x00,0x3b,0xd4,0x01,0x04,0x00,0x00
 # W32: v_cmp_le_u16_e64 s10, s1, s2            ; encoding: [0x0a,0x00,0x3b,0xd4,0x01,0x04,0x00,0x00]
@@ -2436,6 +2552,18 @@
 0x7c,0x00,0x3b,0xd4,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00
 # GFX11: v_cmp_le_u16_e64 null, 0xfe0b, vcc_hi   ; encoding: [0x7c,0x00,0x3b,0xd4,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00]
 
+0x0a,0x08,0x3b,0xd4,0x01,0x05,0x02,0x00
+# W32-REAL16: v_cmp_le_u16_e64 s10, v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x0a,0x08,0x3b,0xd4,0x01,0x05,0x02,0x00]
+# W32-FAKE16: v_cmp_le_u16_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x3b,0xd4,0x01,0x05,0x02,0x00]
+# W64-REAL16: v_cmp_le_u16_e64 s[10:11], v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x0a,0x08,0x3b,0xd4,0x01,0x05,0x02,0x00]
+# W64-FAKE16: v_cmp_le_u16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x3b,0xd4,0x01,0x05,0x02,0x00]
+
+0x0a,0x10,0x3b,0xd4,0xff,0xff,0x03,0x00
+# W32-REAL16: v_cmp_le_u16_e64 s10, v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x0a,0x10,0x3b,0xd4,0xff,0xff,0x03,0x00]
+# W32-FAKE16: v_cmp_le_u16_e64 s10, v255, v255        ; encoding: [0x0a,0x00,0x3b,0xd4,0xff,0xff,0x03,0x00]
+# W64-REAL16: v_cmp_le_u16_e64 s[10:11], v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x0a,0x10,0x3b,0xd4,0xff,0xff,0x03,0x00]
+# W64-FAKE16: v_cmp_le_u16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x3b,0xd4,0xff,0xff,0x03,0x00]
+
 0x0a,0x00,0x4b,0xd4,0x01,0x05,0x02,0x00
 # W32: v_cmp_le_u32_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x4b,0xd4,0x01,0x05,0x02,0x00]
 # W64: v_cmp_le_u32_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x4b,0xd4,0x01,0x05,0x02,0x00]
@@ -2889,12 +3017,16 @@
 # GFX11: v_cmp_lt_f64_e64 null, 0xaf123456, -|vcc| clamp ; encoding: [0x7c,0x82,0x21,0xd4,0xff,0xd4,0x00,0x40,0x56,0x34,0x12,0xaf]
 
 0x0a,0x00,0x31,0xd4,0x01,0x05,0x02,0x00
-# W32: v_cmp_lt_i16_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x31,0xd4,0x01,0x05,0x02,0x00]
-# W64: v_cmp_lt_i16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x31,0xd4,0x01,0x05,0x02,0x00]
+# W32-REAL16: v_cmp_lt_i16_e64 s10, v1.l, v2.l        ; encoding: [0x0a,0x00,0x31,0xd4,0x01,0x05,0x02,0x00]
+# W32-FAKE16: v_cmp_lt_i16_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x31,0xd4,0x01,0x05,0x02,0x00]
+# W64-REAL16: v_cmp_lt_i16_e64 s[10:11], v1.l, v2.l   ; encoding: [0x0a,0x00,0x31,0xd4,0x01,0x05,0x02,0x00]
+# W64-FAKE16: v_cmp_lt_i16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x31,0xd4,0x01,0x05,0x02,0x00]
 
 0x0a,0x00,0x31,0xd4,0xff,0xff,0x03,0x00
-# W32: v_cmp_lt_i16_e64 s10, v255, v255        ; encoding: [0x0a,0x00,0x31,0xd4,0xff,0xff,0x03,0x00]
-# W64: v_cmp_lt_i16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x31,0xd4,0xff,0xff,0x03,0x00]
+# W32-REAL16: v_cmp_lt_i16_e64 s10, v255.l, v255.l    ; encoding: [0x0a,0x00,0x31,0xd4,0xff,0xff,0x03,0x00]
+# W32-FAKE16: v_cmp_lt_i16_e64 s10, v255, v255        ; encoding: [0x0a,0x00,0x31,0xd4,0xff,0xff,0x03,0x00]
+# W64-REAL16: v_cmp_lt_i16_e64 s[10:11], v255.l, v255.l ; encoding: [0x0a,0x00,0x31,0xd4,0xff,0xff,0x03,0x00]
+# W64-FAKE16: v_cmp_lt_i16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x31,0xd4,0xff,0xff,0x03,0x00]
 
 0x0a,0x00,0x31,0xd4,0x01,0x04,0x00,0x00
 # W32: v_cmp_lt_i16_e64 s10, s1, s2            ; encoding: [0x0a,0x00,0x31,0xd4,0x01,0x04,0x00,0x00]
@@ -2947,6 +3079,18 @@
 0x7c,0x00,0x31,0xd4,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00
 # GFX11: v_cmp_lt_i16_e64 null, 0xfe0b, vcc_hi   ; encoding: [0x7c,0x00,0x31,0xd4,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00]
 
+0x0a,0x08,0x31,0xd4,0x01,0x05,0x02,0x00
+# W32-REAL16: v_cmp_lt_i16_e64 s10, v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x0a,0x08,0x31,0xd4,0x01,0x05,0x02,0x00]
+# W32-FAKE16: v_cmp_lt_i16_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x31,0xd4,0x01,0x05,0x02,0x00]
+# W64-REAL16: v_cmp_lt_i16_e64 s[10:11], v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x0a,0x08,0x31,0xd4,0x01,0x05,0x02,0x00]
+# W64-FAKE16: v_cmp_lt_i16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x31,0xd4,0x01,0x05,0x02,0x00]
+
+0x0a,0x10,0x31,0xd4,0xff,0xff,0x03,0x00
+# W32-REAL16: v_cmp_lt_i16_e64 s10, v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x0a,0x10,0x31,0xd4,0xff,0xff,0x03,0x00]
+# W32-FAKE16: v_cmp_lt_i16_e64 s10, v255, v255        ; encoding: [0x0a,0x00,0x31,0xd4,0xff,0xff,0x03,0x00]
+# W64-REAL16: v_cmp_lt_i16_e64 s[10:11], v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x0a,0x10,0x31,0xd4,0xff,0xff,0x03,0x00]
+# W64-FAKE16: v_cmp_lt_i16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x31,0xd4,0xff,0xff,0x03,0x00]
+
 0x0a,0x00,0x41,0xd4,0x01,0x05,0x02,0x00
 # W32: v_cmp_lt_i32_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x41,0xd4,0x01,0x05,0x02,0x00]
 # W64: v_cmp_lt_i32_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x41,0xd4,0x01,0x05,0x02,0x00]
@@ -3054,12 +3198,16 @@
 # GFX11: v_cmp_lt_i64_e64 null, 0xaf123456, vcc  ; encoding: [0x7c,0x00,0x51,0xd4,0xff,0xd4,0x00,0x00,0x56,0x34,0x12,0xaf]
 
 0x0a,0x00,0x39,0xd4,0x01,0x05,0x02,0x00
-# W32: v_cmp_lt_u16_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x39,0xd4,0x01,0x05,0x02,0x00]
-# W64: v_cmp_lt_u16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x39,0xd4,0x01,0x05,0x02,0x00]
+# W32-REAL16: v_cmp_lt_u16_e64 s10, v1.l, v2.l        ; encoding: [0x0a,0x00,0x39,0xd4,0x01,0x05,0x02,0x00]
+# W32-FAKE16: v_cmp_lt_u16_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x39,0xd4,0x01,0x05,0x02,0x00]
+# W64-REAL16: v_cmp_lt_u16_e64 s[10:11], v1.l, v2.l   ; encoding: [0x0a,0x00,0x39,0xd4,0x01,0x05,0x02,0x00]
+# W64-FAKE16: v_cmp_lt_u16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x39,0xd4,0x01,0x05,0x02,0x00]
 
 0x0a,0x00,0x39,0xd4,0xff,0xff,0x03,0x00
-# W32: v_cmp_lt_u16_e64 s10, v255, v255        ; encoding: [0x0a,0x00,0x39,0xd4,0xff,0xff,0x03,0x00]
-# W64: v_cmp_lt_u16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x39,0xd4,0xff,0xff,0x03,0x00]
+# W32-REAL16: v_cmp_lt_u16_e64 s10, v255.l, v255.l    ; encoding: [0x0a,0x00,0x39,0xd4,0xff,0xff,0x03,0x00]
+# W32-FAKE16: v_cmp_lt_u16_e64 s10, v255, v255        ; encoding: [0x0a,0x00,0x39,0xd4,0xff,0xff,0x03,0x00]
+# W64-REAL16: v_cmp_lt_u16_e64 s[10:11], v255.l, v255.l ; encoding: [0x0a,0x00,0x39,0xd4,0xff,0xff,0x03,0x00]
+# W64-FAKE16: v_cmp_lt_u16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x39,0xd4,0xff,0xff,0x03,0x00]
 
 0x0a,0x00,0x39,0xd4,0x01,0x04,0x00,0x00
 # W32: v_cmp_lt_u16_e64 s10, s1, s2            ; encoding: [0x0a,0x00,0x39,0xd4,0x01,0x04,0x00,0x00]
@@ -3112,6 +3260,18 @@
 0x7c,0x00,0x39,0xd4,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00
 # GFX11: v_cmp_lt_u16_e64 null, 0xfe0b, vcc_hi   ; encoding: [0x7c,0x00,0x39,0xd4,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00]
 
+0x0a,0x08,0x39,0xd4,0x01,0x05,0x02,0x00
+# W32-REAL16: v_cmp_lt_u16_e64 s10, v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x0a,0x08,0x39,0xd4,0x01,0x05,0x02,0x00]
+# W32-FAKE16: v_cmp_lt_u16_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x39,0xd4,0x01,0x05,0x02,0x00]
+# W64-REAL16: v_cmp_lt_u16_e64 s[10:11], v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x0a,0x08,0x39,0xd4,0x01,0x05,0x02,0x00]
+# W64-FAKE16: v_cmp_lt_u16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x39,0xd4,0x01,0x05,0x02,0x00]
+
+0x0a,0x10,0x39,0xd4,0xff,0xff,0x03,0x00
+# W32-REAL16: v_cmp_lt_u16_e64 s10, v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x0a,0x10,0x39,0xd4,0xff,0xff,0x03,0x00]
+# W32-FAKE16: v_cmp_lt_u16_e64 s10, v255, v255        ; encoding: [0x0a,0x00,0x39,0xd4,0xff,0xff,0x03,0x00]
+# W64-REAL16: v_cmp_lt_u16_e64 s[10:11], v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x0a,0x10,0x39,0xd4,0xff,0xff,0x03,0x00]
+# W64-FAKE16: v_cmp_lt_u16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x39,0xd4,0xff,0xff,0x03,0x00]
+
 0x0a,0x00,0x49,0xd4,0x01,0x05,0x02,0x00
 # W32: v_cmp_lt_u32_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x49,0xd4,0x01,0x05,0x02,0x00]
 # W64: v_cmp_lt_u32_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x49,0xd4,0x01,0x05,0x02,0x00]
@@ -3219,12 +3379,16 @@
 # GFX11: v_cmp_lt_u64_e64 null, 0xaf123456, vcc  ; encoding: [0x7c,0x00,0x59,0xd4,0xff,0xd4,0x00,0x00,0x56,0x34,0x12,0xaf]
 
 0x0a,0x00,0x35,0xd4,0x01,0x05,0x02,0x00
-# W32: v_cmp_ne_i16_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x35,0xd4,0x01,0x05,0x02,0x00]
-# W64: v_cmp_ne_i16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x35,0xd4,0x01,0x05,0x02,0x00]
+# W32-REAL16: v_cmp_ne_i16_e64 s10, v1.l, v2.l        ; encoding: [0x0a,0x00,0x35,0xd4,0x01,0x05,0x02,0x00]
+# W32-FAKE16: v_cmp_ne_i16_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x35,0xd4,0x01,0x05,0x02,0x00]
+# W64-REAL16: v_cmp_ne_i16_e64 s[10:11], v1.l, v2.l   ; encoding: [0x0a,0x00,0x35,0xd4,0x01,0x05,0x02,0x00]
+# W64-FAKE16: v_cmp_ne_i16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x35,0xd4,0x01,0x05,0x02,0x00]
 
 0x0a,0x00,0x35,0xd4,0xff,0xff,0x03,0x00
-# W32: v_cmp_ne_i16_e64 s10, v255, v255        ; encoding: [0x0a,0x00,0x35,0xd4,0xff,0xff,0x03,0x00]
-# W64: v_cmp_ne_i16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x35,0xd4,0xff,0xff,0x03,0x00]
+# W32-REAL16: v_cmp_ne_i16_e64 s10, v255.l, v255.l    ; encoding: [0x0a,0x00,0x35,0xd4,0xff,0xff,0x03,0x00]
+# W32-FAKE16: v_cmp_ne_i16_e64 s10, v255, v255        ; encoding: [0x0a,0x00,0x35,0xd4,0xff,0xff,0x03,0x00]
+# W64-REAL16: v_cmp_ne_i16_e64 s[10:11], v255.l, v255.l ; encoding: [0x0a,0x00,0x35,0xd4,0xff,0xff,0x03,0x00]
+# W64-FAKE16: v_cmp_ne_i16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x35,0xd4,0xff,0xff,0x03,0x00]
 
 0x0a,0x00,0x35,0xd4,0x01,0x04,0x00,0x00
 # W32: v_cmp_ne_i16_e64 s10, s1, s2            ; encoding: [0x0a,0x00,0x35,0xd4,0x01,0x04,0x00,0x00]
@@ -3277,6 +3441,18 @@
 0x7c,0x00,0x35,0xd4,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00
 # GFX11: v_cmp_ne_i16_e64 null, 0xfe0b, vcc_hi   ; encoding: [0x7c,0x00,0x35,0xd4,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00]
 
+0x0a,0x08,0x35,0xd4,0x01,0x05,0x02,0x00
+# W32-REAL16: v_cmp_ne_i16_e64 s10, v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x0a,0x08,0x35,0xd4,0x01,0x05,0x02,0x00]
+# W32-FAKE16: v_cmp_ne_i16_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x35,0xd4,0x01,0x05,0x02,0x00]
+# W64-REAL16: v_cmp_ne_i16_e64 s[10:11], v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x0a,0x08,0x35,0xd4,0x01,0x05,0x02,0x00]
+# W64-FAKE16: v_cmp_ne_i16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x35,0xd4,0x01,0x05,0x02,0x00]
+
+0x0a,0x10,0x35,0xd4,0xff,0xff,0x03,0x00
+# W32-REAL16: v_cmp_ne_i16_e64 s10, v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x0a,0x10,0x35,0xd4,0xff,0xff,0x03,0x00]
+# W32-FAKE16: v_cmp_ne_i16_e64 s10, v255, v255        ; encoding: [0x0a,0x00,0x35,0xd4,0xff,0xff,0x03,0x00]
+# W64-REAL16: v_cmp_ne_i16_e64 s[10:11], v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x0a,0x10,0x35,0xd4,0xff,0xff,0x03,0x00]
+# W64-FAKE16: v_cmp_ne_i16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x35,0xd4,0xff,0xff,0x03,0x00]
+
 0x0a,0x00,0x45,0xd4,0x01,0x05,0x02,0x00
 # W32: v_cmp_ne_i32_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x45,0xd4,0x01,0x05,0x02,0x00]
 # W64: v_cmp_ne_i32_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x45,0xd4,0x01,0x05,0x02,0x00]
@@ -3384,12 +3560,16 @@
 # GFX11: v_cmp_ne_i64_e64 null, 0xaf123456, vcc  ; encoding: [0x7c,0x00,0x55,0xd4,0xff,0xd4,0x00,0x00,0x56,0x34,0x12,0xaf]
 
 0x0a,0x00,0x3d,0xd4,0x01,0x05,0x02,0x00
-# W32: v_cmp_ne_u16_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x3d,0xd4,0x01,0x05,0x02,0x00]
-# W64: v_cmp_ne_u16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x3d,0xd4,0x01,0x05,0x02,0x00]
+# W32-REAL16: v_cmp_ne_u16_e64 s10, v1.l, v2.l        ; encoding: [0x0a,0x00,0x3d,0xd4,0x01,0x05,0x02,0x00]
+# W32-FAKE16: v_cmp_ne_u16_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x3d,0xd4,0x01,0x05,0x02,0x00]
+# W64-REAL16: v_cmp_ne_u16_e64 s[10:11], v1.l, v2.l   ; encoding: [0x0a,0x00,0x3d,0xd4,0x01,0x05,0x02,0x00]
+# W64-FAKE16: v_cmp_ne_u16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x3d,0xd4,0x01,0x05,0x02,0x00]
 
 0x0a,0x00,0x3d,0xd4,0xff,0xff,0x03,0x00
-# W32: v_cmp_ne_u16_e64 s10, v255, v255        ; encoding: [0x0a,0x00,0x3d,0xd4,0xff,0xff,0x03,0x00]
-# W64: v_cmp_ne_u16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x3d,0xd4,0xff,0xff,0x03,0x00]
+# W32-REAL16: v_cmp_ne_u16_e64 s10, v255.l, v255.l    ; encoding: [0x0a,0x00,0x3d,0xd4,0xff,0xff,0x03,0x00]
+# W32-FAKE16: v_cmp_ne_u16_e64 s10, v255, v255        ; encoding: [0x0a,0x00,0x3d,0xd4,0xff,0xff,0x03,0x00]
+# W64-REAL16: v_cmp_ne_u16_e64 s[10:11], v255.l, v255.l ; encoding: [0x0a,0x00,0x3d,0xd4,0xff,0xff,0x03,0x00]
+# W64-FAKE16: v_cmp_ne_u16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x3d,0xd4,0xff,0xff,0x03,0x00]
 
 0x0a,0x00,0x3d,0xd4,0x01,0x04,0x00,0x00
 # W32: v_cmp_ne_u16_e64 s10, s1, s2            ; encoding: [0x0a,0x00,0x3d,0xd4,0x01,0x04,0x00,0x00]
@@ -3442,6 +3622,18 @@
 0x7c,0x00,0x3d,0xd4,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00
 # GFX11: v_cmp_ne_u16_e64 null, 0xfe0b, vcc_hi   ; encoding: [0x7c,0x00,0x3d,0xd4,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00]
 
+0x0a,0x08,0x3d,0xd4,0x01,0x05,0x02,0x00
+# W32-REAL16: v_cmp_ne_u16_e64 s10, v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x0a,0x08,0x3d,0xd4,0x01,0x05,0x02,0x00]
+# W32-FAKE16: v_cmp_ne_u16_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x3d,0xd4,0x01,0x05,0x02,0x00]
+# W64-REAL16: v_cmp_ne_u16_e64 s[10:11], v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x0a,0x08,0x3d,0xd4,0x01,0x05,0x02,0x00]
+# W64-FAKE16: v_cmp_ne_u16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x3d,0xd4,0x01,0x05,0x02,0x00]
+
+0x0a,0x10,0x3d,0xd4,0xff,0xff,0x03,0x00
+# W32-REAL16: v_cmp_ne_u16_e64 s10, v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x0a,0x10,0x3d,0xd4,0xff,0xff,0x03,0x00]
+# W32-FAKE16: v_cmp_ne_u16_e64 s10, v255, v255        ; encoding: [0x0a,0x00,0x3d,0xd4,0xff,0xff,0x03,0x00]
+# W64-REAL16: v_cmp_ne_u16_e64 s[10:11], v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x0a,0x10,0x3d,0xd4,0xff,0xff,0x03,0x00]
+# W64-FAKE16: v_cmp_ne_u16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x3d,0xd4,0xff,0xff,0x03,0x00]
+
 0x0a,0x00,0x4d,0xd4,0x01,0x05,0x02,0x00
 # W32: v_cmp_ne_u32_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x4d,0xd4,0x01,0x05,0x02,0x00]
 # W64: v_cmp_ne_u32_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x4d,0xd4,0x01,0x05,0x02,0x00]
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopc.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopc.txt
index 7f2de110be37d0..06e83ebed92927 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopc.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopc.txt
@@ -341,64 +341,124 @@
 # W64: v_cmp_eq_f64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x45,0x7c,0x56,0x34,0x12,0xaf]
 
 0x01,0x05,0x64,0x7c
-# W32: v_cmp_eq_i16_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x64,0x7c]
-# W64: v_cmp_eq_i16_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x64,0x7c]
+# W32-REAL16: v_cmp_eq_i16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x64,0x7c]
+# W64-REAL16: v_cmp_eq_i16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x64,0x7c]
+# W32-FAKE16: v_cmp_eq_i16_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x64,0x7c]
+# W64-FAKE16: v_cmp_eq_i16_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x64,0x7c]
 
 0x7f,0x05,0x64,0x7c
-# W32: v_cmp_eq_i16_e32 vcc_lo, v127, v2       ; encoding: [0x7f,0x05,0x64,0x7c]
-# W64: v_cmp_eq_i16_e32 vcc, v127, v2          ; encoding: [0x7f,0x05,0x64,0x7c]
+# W32-REAL16: v_cmp_eq_i16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x64,0x7c]
+# W64-REAL16: v_cmp_eq_i16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x64,0x7c]
+# W32-FAKE16: v_cmp_eq_i16_e32 vcc_lo, v127, v2       ; encoding: [0x7f,0x05,0x64,0x7c]
+# W64-FAKE16: v_cmp_eq_i16_e32 vcc, v127, v2          ; encoding: [0x7f,0x05,0x64,0x7c]
 
 0x01,0x04,0x64,0x7c
-# W32: v_cmp_eq_i16_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x64,0x7c]
-# W64: v_cmp_eq_i16_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x64,0x7c]
+# W32-REAL16: v_cmp_eq_i16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x64,0x7c]
+# W64-REAL16: v_cmp_eq_i16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x64,0x7c]
+# W32-FAKE16: v_cmp_eq_i16_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x64,0x7c]
+# W64-FAKE16: v_cmp_eq_i16_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x64,0x7c]
 
 0x69,0x04,0x64,0x7c
-# W32: v_cmp_eq_i16_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x64,0x7c]
-# W64: v_cmp_eq_i16_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x64,0x7c]
+# W32-REAL16: v_cmp_eq_i16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x64,0x7c]
+# W64-REAL16: v_cmp_eq_i16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x64,0x7c]
+# W32-FAKE16: v_cmp_eq_i16_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x64,0x7c]
+# W64-FAKE16: v_cmp_eq_i16_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x64,0x7c]
 
 0x6a,0x04,0x64,0x7c
-# W32: v_cmp_eq_i16_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x64,0x7c]
-# W64: v_cmp_eq_i16_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x64,0x7c]
+# W32-REAL16: v_cmp_eq_i16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x64,0x7c]
+# W64-REAL16: v_cmp_eq_i16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x64,0x7c]
+# W32-FAKE16: v_cmp_eq_i16_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x64,0x7c]
+# W64-FAKE16: v_cmp_eq_i16_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x64,0x7c]
 
 0x6b,0x04,0x64,0x7c
-# W32: v_cmp_eq_i16_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x64,0x7c]
-# W64: v_cmp_eq_i16_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x64,0x7c]
+# W32-REAL16: v_cmp_eq_i16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x64,0x7c]
+# W64-REAL16: v_cmp_eq_i16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x64,0x7c]
+# W32-FAKE16: v_cmp_eq_i16_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x64,0x7c]
+# W64-FAKE16: v_cmp_eq_i16_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x64,0x7c]
 
 0x7b,0x04,0x64,0x7c
-# W32: v_cmp_eq_i16_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x64,0x7c]
-# W64: v_cmp_eq_i16_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x64,0x7c]
+# W32-REAL16: v_cmp_eq_i16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x64,0x7c]
+# W64-REAL16: v_cmp_eq_i16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x64,0x7c]
+# W32-FAKE16: v_cmp_eq_i16_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x64,0x7c]
+# W64-FAKE16: v_cmp_eq_i16_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x64,0x7c]
 
 0x7d,0x04,0x64,0x7c
-# W32: v_cmp_eq_i16_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x64,0x7c]
-# W64: v_cmp_eq_i16_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x64,0x7c]
+# W32-REAL16: v_cmp_eq_i16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x64,0x7c]
+# W64-REAL16: v_cmp_eq_i16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x64,0x7c]
+# W32-FAKE16: v_cmp_eq_i16_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x64,0x7c]
+# W64-FAKE16: v_cmp_eq_i16_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x64,0x7c]
 
 0x7e,0x04,0x64,0x7c
-# W32: v_cmp_eq_i16_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x64,0x7c]
-# W64: v_cmp_eq_i16_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x64,0x7c]
+# W32-REAL16: v_cmp_eq_i16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x64,0x7c]
+# W64-REAL16: v_cmp_eq_i16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x64,0x7c]
+# W32-FAKE16: v_cmp_eq_i16_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x64,0x7c]
+# W64-FAKE16: v_cmp_eq_i16_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x64,0x7c]
 
 0x7f,0x04,0x64,0x7c
-# W32: v_cmp_eq_i16_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x64,0x7c]
-# W64: v_cmp_eq_i16_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x64,0x7c]
+# W32-REAL16: v_cmp_eq_i16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x64,0x7c]
+# W64-REAL16: v_cmp_eq_i16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x64,0x7c]
+# W32-FAKE16: v_cmp_eq_i16_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x64,0x7c]
+# W64-FAKE16: v_cmp_eq_i16_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x64,0x7c]
 
 0x7c,0x04,0x64,0x7c
-# W32: v_cmp_eq_i16_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x64,0x7c]
-# W64: v_cmp_eq_i16_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x64,0x7c]
+# W32-REAL16: v_cmp_eq_i16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x64,0x7c]
+# W64-REAL16: v_cmp_eq_i16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x64,0x7c]
+# W32-FAKE16: v_cmp_eq_i16_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x64,0x7c]
+# W64-FAKE16: v_cmp_eq_i16_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x64,0x7c]
 
 0xc1,0x04,0x64,0x7c
-# W32: v_cmp_eq_i16_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x64,0x7c]
-# W64: v_cmp_eq_i16_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x64,0x7c]
+# W32-REAL16: v_cmp_eq_i16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x64,0x7c]
+# W64-REAL16: v_cmp_eq_i16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x64,0x7c]
+# W32-FAKE16: v_cmp_eq_i16_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x64,0x7c]
+# W64-FAKE16: v_cmp_eq_i16_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x64,0x7c]
 
 0xf0,0x04,0x64,0x7c
-# W32: v_cmp_eq_i16_e32 vcc_lo, 0x3800, v2     ; encoding: [0xff,0x04,0x64,0x7c,0x00,0x38,0x00,0x00]
-# W64: v_cmp_eq_i16_e32 vcc, 0x3800, v2        ; encoding: [0xff,0x04,0x64,0x7c,0x00,0x38,0x00,0x00]
+# W32-REAL16: v_cmp_eq_i16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x64,0x7c,0x00,0x38,0x00,0x00]
+# W64-REAL16: v_cmp_eq_i16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x64,0x7c,0x00,0x38,0x00,0x00]
+# W32-FAKE16: v_cmp_eq_i16_e32 vcc_lo, 0x3800, v2     ; encoding: [0xff,0x04,0x64,0x7c,0x00,0x38,0x00,0x00]
+# W64-FAKE16: v_cmp_eq_i16_e32 vcc, 0x3800, v2        ; encoding: [0xff,0x04,0x64,0x7c,0x00,0x38,0x00,0x00]
 
 0xfd,0x04,0x64,0x7c
-# W32: v_cmp_eq_i16_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x64,0x7c]
-# W64: v_cmp_eq_i16_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x64,0x7c]
+# W32-REAL16: v_cmp_eq_i16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x64,0x7c]
+# W64-REAL16: v_cmp_eq_i16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x64,0x7c]
+# W32-FAKE16: v_cmp_eq_i16_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x64,0x7c]
+# W64-FAKE16: v_cmp_eq_i16_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x64,0x7c]
 
 0xff,0xfe,0x64,0x7c,0x0b,0xfe,0x00,0x00
-# W32: v_cmp_eq_i16_e32 vcc_lo, 0xfe0b, v127   ; encoding: [0xff,0xfe,0x64,0x7c,0x0b,0xfe,0x00,0x00]
-# W64: v_cmp_eq_i16_e32 vcc, 0xfe0b, v127      ; encoding: [0xff,0xfe,0x64,0x7c,0x0b,0xfe,0x00,0x00]
+# W32-REAL16: v_cmp_eq_i16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x64,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-REAL16: v_cmp_eq_i16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x64,0x7c,0x0b,0xfe,0x00,0x00]
+# W32-FAKE16: v_cmp_eq_i16_e32 vcc_lo, 0xfe0b, v127   ; encoding: [0xff,0xfe,0x64,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-FAKE16: v_cmp_eq_i16_e32 vcc, 0xfe0b, v127      ; encoding: [0xff,0xfe,0x64,0x7c,0x0b,0xfe,0x00,0x00]
+
+0x81,0x05,0x64,0x7c
+# W32-REAL16: v_cmp_eq_i16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x64,0x7c]
+# W64-REAL16: v_cmp_eq_i16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x64,0x7c]
+# W32-FAKE16: v_cmp_eq_i16_e32 vcc_lo, v129/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0x81,0x05,0x64,0x7c]
+# W64-FAKE16: v_cmp_eq_i16_e32 vcc, v129/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0x81,0x05,0x64,0x7c]
+
+0xff,0x05,0x64,0x7c
+# W32-REAL16: v_cmp_eq_i16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x64,0x7c]
+# W64-REAL16: v_cmp_eq_i16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x64,0x7c]
+# W32-FAKE16: v_cmp_eq_i16_e32 vcc_lo, v255/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0xff,0x05,0x64,0x7c]
+# W64-FAKE16: v_cmp_eq_i16_e32 vcc, v255/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0xff,0x05,0x64,0x7c]
+
+0xf0,0xfe,0x64,0x7c
+# W32-REAL16: v_cmp_eq_i16_e32 vcc_lo, 0x3800, v127.l ; encoding: [0xff,0xfe,0x64,0x7c,0x00,0x38,0x00,0x00]
+# W64-REAL16: v_cmp_eq_i16_e32 vcc, 0x3800, v127.l    ; encoding: [0xff,0xfe,0x64,0x7c,0x00,0x38,0x00,0x00]
+# W32-FAKE16: v_cmp_eq_i16_e32 vcc_lo, 0x3800, v127   ; encoding: [0xff,0xfe,0x64,0x7c,0x00,0x38,0x00,0x00]
+# W64-FAKE16: v_cmp_eq_i16_e32 vcc, 0x3800, v127      ; encoding: [0xff,0xfe,0x64,0x7c,0x00,0x38,0x00,0x00]
+
+0xfd,0x04,0x65,0x7c
+# W32-REAL16: v_cmp_eq_i16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x65,0x7c]
+# W64-REAL16: v_cmp_eq_i16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x65,0x7c]
+# W32-FAKE16: v_cmp_eq_i16_e32 vcc_lo, src_scc, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xfd,0x04,0x65,0x7c]
+# W64-FAKE16: v_cmp_eq_i16_e32 vcc, src_scc, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xfd,0x04,0x65,0x7c]
+
+0xff,0xfe,0x65,0x7c,0x0b,0xfe,0x00,0x00
+# W32-REAL16: v_cmp_eq_i16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x65,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-REAL16: v_cmp_eq_i16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x65,0x7c,0x0b,0xfe,0x00,0x00]
+# W32-FAKE16: v_cmp_eq_i16_e32 vcc_lo, 0xfe0b, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xff,0xfe,0x65,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-FAKE16: v_cmp_eq_i16_e32 vcc, 0xfe0b, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xff,0xfe,0x65,0x7c,0x0b,0xfe,0x00,0x00]
 
 0x01,0x05,0x84,0x7c
 # W32: v_cmp_eq_i32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x84,0x7c]
@@ -509,64 +569,124 @@
 # W64: v_cmp_eq_i64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xa5,0x7c,0x56,0x34,0x12,0xaf]
 
 0x01,0x05,0x74,0x7c
-# W32: v_cmp_eq_u16_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x74,0x7c]
-# W64: v_cmp_eq_u16_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x74,0x7c]
+# W32-REAL16: v_cmp_eq_u16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x74,0x7c]
+# W64-REAL16: v_cmp_eq_u16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x74,0x7c]
+# W32-FAKE16: v_cmp_eq_u16_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x74,0x7c]
+# W64-FAKE16: v_cmp_eq_u16_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x74,0x7c]
 
 0x7f,0x05,0x74,0x7c
-# W32: v_cmp_eq_u16_e32 vcc_lo, v127, v2       ; encoding: [0x7f,0x05,0x74,0x7c]
-# W64: v_cmp_eq_u16_e32 vcc, v127, v2          ; encoding: [0x7f,0x05,0x74,0x7c]
+# W32-REAL16: v_cmp_eq_u16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x74,0x7c]
+# W64-REAL16: v_cmp_eq_u16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x74,0x7c]
+# W32-FAKE16: v_cmp_eq_u16_e32 vcc_lo, v127, v2       ; encoding: [0x7f,0x05,0x74,0x7c]
+# W64-FAKE16: v_cmp_eq_u16_e32 vcc, v127, v2          ; encoding: [0x7f,0x05,0x74,0x7c]
 
 0x01,0x04,0x74,0x7c
-# W32: v_cmp_eq_u16_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x74,0x7c]
-# W64: v_cmp_eq_u16_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x74,0x7c]
+# W32-REAL16: v_cmp_eq_u16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x74,0x7c]
+# W64-REAL16: v_cmp_eq_u16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x74,0x7c]
+# W32-FAKE16: v_cmp_eq_u16_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x74,0x7c]
+# W64-FAKE16: v_cmp_eq_u16_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x74,0x7c]
 
 0x69,0x04,0x74,0x7c
-# W32: v_cmp_eq_u16_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x74,0x7c]
-# W64: v_cmp_eq_u16_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x74,0x7c]
+# W32-REAL16: v_cmp_eq_u16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x74,0x7c]
+# W64-REAL16: v_cmp_eq_u16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x74,0x7c]
+# W32-FAKE16: v_cmp_eq_u16_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x74,0x7c]
+# W64-FAKE16: v_cmp_eq_u16_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x74,0x7c]
 
 0x6a,0x04,0x74,0x7c
-# W32: v_cmp_eq_u16_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x74,0x7c]
-# W64: v_cmp_eq_u16_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x74,0x7c]
+# W32-REAL16: v_cmp_eq_u16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x74,0x7c]
+# W64-REAL16: v_cmp_eq_u16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x74,0x7c]
+# W32-FAKE16: v_cmp_eq_u16_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x74,0x7c]
+# W64-FAKE16: v_cmp_eq_u16_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x74,0x7c]
 
 0x6b,0x04,0x74,0x7c
-# W32: v_cmp_eq_u16_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x74,0x7c]
-# W64: v_cmp_eq_u16_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x74,0x7c]
+# W32-REAL16: v_cmp_eq_u16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x74,0x7c]
+# W64-REAL16: v_cmp_eq_u16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x74,0x7c]
+# W32-FAKE16: v_cmp_eq_u16_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x74,0x7c]
+# W64-FAKE16: v_cmp_eq_u16_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x74,0x7c]
 
 0x7b,0x04,0x74,0x7c
-# W32: v_cmp_eq_u16_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x74,0x7c]
-# W64: v_cmp_eq_u16_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x74,0x7c]
+# W32-REAL16: v_cmp_eq_u16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x74,0x7c]
+# W64-REAL16: v_cmp_eq_u16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x74,0x7c]
+# W32-FAKE16: v_cmp_eq_u16_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x74,0x7c]
+# W64-FAKE16: v_cmp_eq_u16_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x74,0x7c]
 
 0x7d,0x04,0x74,0x7c
-# W32: v_cmp_eq_u16_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x74,0x7c]
-# W64: v_cmp_eq_u16_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x74,0x7c]
+# W32-REAL16: v_cmp_eq_u16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x74,0x7c]
+# W64-REAL16: v_cmp_eq_u16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x74,0x7c]
+# W32-FAKE16: v_cmp_eq_u16_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x74,0x7c]
+# W64-FAKE16: v_cmp_eq_u16_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x74,0x7c]
 
 0x7e,0x04,0x74,0x7c
-# W32: v_cmp_eq_u16_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x74,0x7c]
-# W64: v_cmp_eq_u16_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x74,0x7c]
+# W32-REAL16: v_cmp_eq_u16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x74,0x7c]
+# W64-REAL16: v_cmp_eq_u16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x74,0x7c]
+# W32-FAKE16: v_cmp_eq_u16_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x74,0x7c]
+# W64-FAKE16: v_cmp_eq_u16_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x74,0x7c]
 
 0x7f,0x04,0x74,0x7c
-# W32: v_cmp_eq_u16_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x74,0x7c]
-# W64: v_cmp_eq_u16_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x74,0x7c]
+# W32-REAL16: v_cmp_eq_u16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x74,0x7c]
+# W64-REAL16: v_cmp_eq_u16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x74,0x7c]
+# W32-FAKE16: v_cmp_eq_u16_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x74,0x7c]
+# W64-FAKE16: v_cmp_eq_u16_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x74,0x7c]
 
 0x7c,0x04,0x74,0x7c
-# W32: v_cmp_eq_u16_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x74,0x7c]
-# W64: v_cmp_eq_u16_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x74,0x7c]
+# W32-REAL16: v_cmp_eq_u16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x74,0x7c]
+# W64-REAL16: v_cmp_eq_u16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x74,0x7c]
+# W32-FAKE16: v_cmp_eq_u16_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x74,0x7c]
+# W64-FAKE16: v_cmp_eq_u16_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x74,0x7c]
 
 0xc1,0x04,0x74,0x7c
-# W32: v_cmp_eq_u16_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x74,0x7c]
-# W64: v_cmp_eq_u16_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x74,0x7c]
+# W32-REAL16: v_cmp_eq_u16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x74,0x7c]
+# W64-REAL16: v_cmp_eq_u16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x74,0x7c]
+# W32-FAKE16: v_cmp_eq_u16_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x74,0x7c]
+# W64-FAKE16: v_cmp_eq_u16_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x74,0x7c]
 
 0xf0,0x04,0x74,0x7c
-# W32: v_cmp_eq_u16_e32 vcc_lo, 0x3800, v2     ; encoding: [0xff,0x04,0x74,0x7c,0x00,0x38,0x00,0x00]
-# W64: v_cmp_eq_u16_e32 vcc, 0x3800, v2        ; encoding: [0xff,0x04,0x74,0x7c,0x00,0x38,0x00,0x00]
+# W32-REAL16: v_cmp_eq_u16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x74,0x7c,0x00,0x38,0x00,0x00]
+# W64-REAL16: v_cmp_eq_u16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x74,0x7c,0x00,0x38,0x00,0x00]
+# W32-FAKE16: v_cmp_eq_u16_e32 vcc_lo, 0x3800, v2     ; encoding: [0xff,0x04,0x74,0x7c,0x00,0x38,0x00,0x00]
+# W64-FAKE16: v_cmp_eq_u16_e32 vcc, 0x3800, v2        ; encoding: [0xff,0x04,0x74,0x7c,0x00,0x38,0x00,0x00]
 
 0xfd,0x04,0x74,0x7c
-# W32: v_cmp_eq_u16_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x74,0x7c]
-# W64: v_cmp_eq_u16_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x74,0x7c]
+# W32-REAL16: v_cmp_eq_u16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x74,0x7c]
+# W64-REAL16: v_cmp_eq_u16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x74,0x7c]
+# W32-FAKE16: v_cmp_eq_u16_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x74,0x7c]
+# W64-FAKE16: v_cmp_eq_u16_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x74,0x7c]
 
 0xff,0xfe,0x74,0x7c,0x0b,0xfe,0x00,0x00
-# W32: v_cmp_eq_u16_e32 vcc_lo, 0xfe0b, v127   ; encoding: [0xff,0xfe,0x74,0x7c,0x0b,0xfe,0x00,0x00]
-# W64: v_cmp_eq_u16_e32 vcc, 0xfe0b, v127      ; encoding: [0xff,0xfe,0x74,0x7c,0x0b,0xfe,0x00,0x00]
+# W32-REAL16: v_cmp_eq_u16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x74,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-REAL16: v_cmp_eq_u16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x74,0x7c,0x0b,0xfe,0x00,0x00]
+# W32-FAKE16: v_cmp_eq_u16_e32 vcc_lo, 0xfe0b, v127   ; encoding: [0xff,0xfe,0x74,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-FAKE16: v_cmp_eq_u16_e32 vcc, 0xfe0b, v127      ; encoding: [0xff,0xfe,0x74,0x7c,0x0b,0xfe,0x00,0x00]
+
+0x81,0x05,0x74,0x7c
+# W32-REAL16: v_cmp_eq_u16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x74,0x7c]
+# W64-REAL16: v_cmp_eq_u16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x74,0x7c]
+# W32-FAKE16: v_cmp_eq_u16_e32 vcc_lo, v129/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0x81,0x05,0x74,0x7c]
+# W64-FAKE16: v_cmp_eq_u16_e32 vcc, v129/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0x81,0x05,0x74,0x7c]
+
+0xff,0x05,0x74,0x7c
+# W32-REAL16: v_cmp_eq_u16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x74,0x7c]
+# W64-REAL16: v_cmp_eq_u16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x74,0x7c]
+# W32-FAKE16: v_cmp_eq_u16_e32 vcc_lo, v255/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0xff,0x05,0x74,0x7c]
+# W64-FAKE16: v_cmp_eq_u16_e32 vcc, v255/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0xff,0x05,0x74,0x7c]
+
+0xf0,0xfe,0x74,0x7c
+# W32-REAL16: v_cmp_eq_u16_e32 vcc_lo, 0x3800, v127.l ; encoding: [0xff,0xfe,0x74,0x7c,0x00,0x38,0x00,0x00]
+# W64-REAL16: v_cmp_eq_u16_e32 vcc, 0x3800, v127.l    ; encoding: [0xff,0xfe,0x74,0x7c,0x00,0x38,0x00,0x00]
+# W32-FAKE16: v_cmp_eq_u16_e32 vcc_lo, 0x3800, v127   ; encoding: [0xff,0xfe,0x74,0x7c,0x00,0x38,0x00,0x00]
+# W64-FAKE16: v_cmp_eq_u16_e32 vcc, 0x3800, v127      ; encoding: [0xff,0xfe,0x74,0x7c,0x00,0x38,0x00,0x00]
+
+0xfd,0x04,0x75,0x7c
+# W32-REAL16: v_cmp_eq_u16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x75,0x7c]
+# W64-REAL16: v_cmp_eq_u16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x75,0x7c]
+# W32-FAKE16: v_cmp_eq_u16_e32 vcc_lo, src_scc, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xfd,0x04,0x75,0x7c]
+# W64-FAKE16: v_cmp_eq_u16_e32 vcc, src_scc, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xfd,0x04,0x75,0x7c]
+
+0xff,0xfe,0x75,0x7c,0x0b,0xfe,0x00,0x00
+# W32-REAL16: v_cmp_eq_u16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x75,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-REAL16: v_cmp_eq_u16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x75,0x7c,0x0b,0xfe,0x00,0x00]
+# W32-FAKE16: v_cmp_eq_u16_e32 vcc_lo, 0xfe0b, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xff,0xfe,0x75,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-FAKE16: v_cmp_eq_u16_e32 vcc, 0xfe0b, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xff,0xfe,0x75,0x7c,0x0b,0xfe,0x00,0x00]
 
 0x01,0x05,0x94,0x7c
 # W32: v_cmp_eq_u32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x94,0x7c]
@@ -1229,64 +1349,124 @@
 # W64: v_cmp_ge_f64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x4d,0x7c,0x56,0x34,0x12,0xaf]
 
 0x01,0x05,0x6c,0x7c
-# W32: v_cmp_ge_i16_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x6c,0x7c]
-# W64: v_cmp_ge_i16_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x6c,0x7c]
+# W32-REAL16: v_cmp_ge_i16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x6c,0x7c]
+# W64-REAL16: v_cmp_ge_i16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x6c,0x7c]
+# W32-FAKE16: v_cmp_ge_i16_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x6c,0x7c]
+# W64-FAKE16: v_cmp_ge_i16_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x6c,0x7c]
 
 0x7f,0x05,0x6c,0x7c
-# W32: v_cmp_ge_i16_e32 vcc_lo, v127, v2       ; encoding: [0x7f,0x05,0x6c,0x7c]
-# W64: v_cmp_ge_i16_e32 vcc, v127, v2          ; encoding: [0x7f,0x05,0x6c,0x7c]
+# W32-REAL16: v_cmp_ge_i16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x6c,0x7c]
+# W64-REAL16: v_cmp_ge_i16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x6c,0x7c]
+# W32-FAKE16: v_cmp_ge_i16_e32 vcc_lo, v127, v2       ; encoding: [0x7f,0x05,0x6c,0x7c]
+# W64-FAKE16: v_cmp_ge_i16_e32 vcc, v127, v2          ; encoding: [0x7f,0x05,0x6c,0x7c]
 
 0x01,0x04,0x6c,0x7c
-# W32: v_cmp_ge_i16_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x6c,0x7c]
-# W64: v_cmp_ge_i16_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x6c,0x7c]
+# W32-REAL16: v_cmp_ge_i16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x6c,0x7c]
+# W64-REAL16: v_cmp_ge_i16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x6c,0x7c]
+# W32-FAKE16: v_cmp_ge_i16_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x6c,0x7c]
+# W64-FAKE16: v_cmp_ge_i16_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x6c,0x7c]
 
 0x69,0x04,0x6c,0x7c
-# W32: v_cmp_ge_i16_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x6c,0x7c]
-# W64: v_cmp_ge_i16_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x6c,0x7c]
+# W32-REAL16: v_cmp_ge_i16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x6c,0x7c]
+# W64-REAL16: v_cmp_ge_i16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x6c,0x7c]
+# W32-FAKE16: v_cmp_ge_i16_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x6c,0x7c]
+# W64-FAKE16: v_cmp_ge_i16_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x6c,0x7c]
 
 0x6a,0x04,0x6c,0x7c
-# W32: v_cmp_ge_i16_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x6c,0x7c]
-# W64: v_cmp_ge_i16_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x6c,0x7c]
+# W32-REAL16: v_cmp_ge_i16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x6c,0x7c]
+# W64-REAL16: v_cmp_ge_i16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x6c,0x7c]
+# W32-FAKE16: v_cmp_ge_i16_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x6c,0x7c]
+# W64-FAKE16: v_cmp_ge_i16_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x6c,0x7c]
 
 0x6b,0x04,0x6c,0x7c
-# W32: v_cmp_ge_i16_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x6c,0x7c]
-# W64: v_cmp_ge_i16_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x6c,0x7c]
+# W32-REAL16: v_cmp_ge_i16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x6c,0x7c]
+# W64-REAL16: v_cmp_ge_i16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x6c,0x7c]
+# W32-FAKE16: v_cmp_ge_i16_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x6c,0x7c]
+# W64-FAKE16: v_cmp_ge_i16_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x6c,0x7c]
 
 0x7b,0x04,0x6c,0x7c
-# W32: v_cmp_ge_i16_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x6c,0x7c]
-# W64: v_cmp_ge_i16_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x6c,0x7c]
+# W32-REAL16: v_cmp_ge_i16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x6c,0x7c]
+# W64-REAL16: v_cmp_ge_i16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x6c,0x7c]
+# W32-FAKE16: v_cmp_ge_i16_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x6c,0x7c]
+# W64-FAKE16: v_cmp_ge_i16_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x6c,0x7c]
 
 0x7d,0x04,0x6c,0x7c
-# W32: v_cmp_ge_i16_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x6c,0x7c]
-# W64: v_cmp_ge_i16_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x6c,0x7c]
+# W32-REAL16: v_cmp_ge_i16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x6c,0x7c]
+# W64-REAL16: v_cmp_ge_i16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x6c,0x7c]
+# W32-FAKE16: v_cmp_ge_i16_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x6c,0x7c]
+# W64-FAKE16: v_cmp_ge_i16_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x6c,0x7c]
 
 0x7e,0x04,0x6c,0x7c
-# W32: v_cmp_ge_i16_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x6c,0x7c]
-# W64: v_cmp_ge_i16_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x6c,0x7c]
+# W32-REAL16: v_cmp_ge_i16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x6c,0x7c]
+# W64-REAL16: v_cmp_ge_i16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x6c,0x7c]
+# W32-FAKE16: v_cmp_ge_i16_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x6c,0x7c]
+# W64-FAKE16: v_cmp_ge_i16_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x6c,0x7c]
 
 0x7f,0x04,0x6c,0x7c
-# W32: v_cmp_ge_i16_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x6c,0x7c]
-# W64: v_cmp_ge_i16_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x6c,0x7c]
+# W32-REAL16: v_cmp_ge_i16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x6c,0x7c]
+# W64-REAL16: v_cmp_ge_i16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x6c,0x7c]
+# W32-FAKE16: v_cmp_ge_i16_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x6c,0x7c]
+# W64-FAKE16: v_cmp_ge_i16_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x6c,0x7c]
 
 0x7c,0x04,0x6c,0x7c
-# W32: v_cmp_ge_i16_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x6c,0x7c]
-# W64: v_cmp_ge_i16_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x6c,0x7c]
+# W32-REAL16: v_cmp_ge_i16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x6c,0x7c]
+# W64-REAL16: v_cmp_ge_i16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x6c,0x7c]
+# W32-FAKE16: v_cmp_ge_i16_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x6c,0x7c]
+# W64-FAKE16: v_cmp_ge_i16_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x6c,0x7c]
 
 0xc1,0x04,0x6c,0x7c
-# W32: v_cmp_ge_i16_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x6c,0x7c]
-# W64: v_cmp_ge_i16_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x6c,0x7c]
+# W32-REAL16: v_cmp_ge_i16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x6c,0x7c]
+# W64-REAL16: v_cmp_ge_i16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x6c,0x7c]
+# W32-FAKE16: v_cmp_ge_i16_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x6c,0x7c]
+# W64-FAKE16: v_cmp_ge_i16_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x6c,0x7c]
 
 0xf0,0x04,0x6c,0x7c
-# W32: v_cmp_ge_i16_e32 vcc_lo, 0x3800, v2     ; encoding: [0xff,0x04,0x6c,0x7c,0x00,0x38,0x00,0x00]
-# W64: v_cmp_ge_i16_e32 vcc, 0x3800, v2        ; encoding: [0xff,0x04,0x6c,0x7c,0x00,0x38,0x00,0x00]
+# W32-REAL16: v_cmp_ge_i16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x6c,0x7c,0x00,0x38,0x00,0x00]
+# W64-REAL16: v_cmp_ge_i16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x6c,0x7c,0x00,0x38,0x00,0x00]
+# W32-FAKE16: v_cmp_ge_i16_e32 vcc_lo, 0x3800, v2     ; encoding: [0xff,0x04,0x6c,0x7c,0x00,0x38,0x00,0x00]
+# W64-FAKE16: v_cmp_ge_i16_e32 vcc, 0x3800, v2        ; encoding: [0xff,0x04,0x6c,0x7c,0x00,0x38,0x00,0x00]
 
 0xfd,0x04,0x6c,0x7c
-# W32: v_cmp_ge_i16_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x6c,0x7c]
-# W64: v_cmp_ge_i16_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x6c,0x7c]
+# W32-REAL16: v_cmp_ge_i16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x6c,0x7c]
+# W64-REAL16: v_cmp_ge_i16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x6c,0x7c]
+# W32-FAKE16: v_cmp_ge_i16_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x6c,0x7c]
+# W64-FAKE16: v_cmp_ge_i16_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x6c,0x7c]
 
 0xff,0xfe,0x6c,0x7c,0x0b,0xfe,0x00,0x00
-# W32: v_cmp_ge_i16_e32 vcc_lo, 0xfe0b, v127   ; encoding: [0xff,0xfe,0x6c,0x7c,0x0b,0xfe,0x00,0x00]
-# W64: v_cmp_ge_i16_e32 vcc, 0xfe0b, v127      ; encoding: [0xff,0xfe,0x6c,0x7c,0x0b,0xfe,0x00,0x00]
+# W32-REAL16: v_cmp_ge_i16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x6c,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-REAL16: v_cmp_ge_i16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x6c,0x7c,0x0b,0xfe,0x00,0x00]
+# W32-FAKE16: v_cmp_ge_i16_e32 vcc_lo, 0xfe0b, v127   ; encoding: [0xff,0xfe,0x6c,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-FAKE16: v_cmp_ge_i16_e32 vcc, 0xfe0b, v127      ; encoding: [0xff,0xfe,0x6c,0x7c,0x0b,0xfe,0x00,0x00]
+
+0x81,0x05,0x6c,0x7c
+# W32-REAL16: v_cmp_ge_i16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x6c,0x7c]
+# W64-REAL16: v_cmp_ge_i16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x6c,0x7c]
+# W32-FAKE16: v_cmp_ge_i16_e32 vcc_lo, v129/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0x81,0x05,0x6c,0x7c]
+# W64-FAKE16: v_cmp_ge_i16_e32 vcc, v129/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0x81,0x05,0x6c,0x7c]
+
+0xff,0x05,0x6c,0x7c
+# W32-REAL16: v_cmp_ge_i16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x6c,0x7c]
+# W64-REAL16: v_cmp_ge_i16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x6c,0x7c]
+# W32-FAKE16: v_cmp_ge_i16_e32 vcc_lo, v255/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0xff,0x05,0x6c,0x7c]
+# W64-FAKE16: v_cmp_ge_i16_e32 vcc, v255/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0xff,0x05,0x6c,0x7c]
+
+0xf0,0xfe,0x6c,0x7c
+# W32-REAL16: v_cmp_ge_i16_e32 vcc_lo, 0x3800, v127.l ; encoding: [0xff,0xfe,0x6c,0x7c,0x00,0x38,0x00,0x00]
+# W64-REAL16: v_cmp_ge_i16_e32 vcc, 0x3800, v127.l    ; encoding: [0xff,0xfe,0x6c,0x7c,0x00,0x38,0x00,0x00]
+# W32-FAKE16: v_cmp_ge_i16_e32 vcc_lo, 0x3800, v127   ; encoding: [0xff,0xfe,0x6c,0x7c,0x00,0x38,0x00,0x00]
+# W64-FAKE16: v_cmp_ge_i16_e32 vcc, 0x3800, v127      ; encoding: [0xff,0xfe,0x6c,0x7c,0x00,0x38,0x00,0x00]
+
+0xfd,0x04,0x6d,0x7c
+# W32-REAL16: v_cmp_ge_i16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x6d,0x7c]
+# W64-REAL16: v_cmp_ge_i16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x6d,0x7c]
+# W32-FAKE16: v_cmp_ge_i16_e32 vcc_lo, src_scc, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xfd,0x04,0x6d,0x7c]
+# W64-FAKE16: v_cmp_ge_i16_e32 vcc, src_scc, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xfd,0x04,0x6d,0x7c]
+
+0xff,0xfe,0x6d,0x7c,0x0b,0xfe,0x00,0x00
+# W32-REAL16: v_cmp_ge_i16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x6d,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-REAL16: v_cmp_ge_i16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x6d,0x7c,0x0b,0xfe,0x00,0x00]
+# W32-FAKE16: v_cmp_ge_i16_e32 vcc_lo, 0xfe0b, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xff,0xfe,0x6d,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-FAKE16: v_cmp_ge_i16_e32 vcc, 0xfe0b, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xff,0xfe,0x6d,0x7c,0x0b,0xfe,0x00,0x00]
 
 0x01,0x05,0x8c,0x7c
 # W32: v_cmp_ge_i32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x8c,0x7c]
@@ -1397,64 +1577,124 @@
 # W64: v_cmp_ge_i64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xad,0x7c,0x56,0x34,0x12,0xaf]
 
 0x01,0x05,0x7c,0x7c
-# W32: v_cmp_ge_u16_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x7c,0x7c]
-# W64: v_cmp_ge_u16_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x7c,0x7c]
+# W32-REAL16: v_cmp_ge_u16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x7c,0x7c]
+# W64-REAL16: v_cmp_ge_u16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x7c,0x7c]
+# W32-FAKE16: v_cmp_ge_u16_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x7c,0x7c]
+# W64-FAKE16: v_cmp_ge_u16_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x7c,0x7c]
 
 0x7f,0x05,0x7c,0x7c
-# W32: v_cmp_ge_u16_e32 vcc_lo, v127, v2       ; encoding: [0x7f,0x05,0x7c,0x7c]
-# W64: v_cmp_ge_u16_e32 vcc, v127, v2          ; encoding: [0x7f,0x05,0x7c,0x7c]
+# W32-REAL16: v_cmp_ge_u16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x7c,0x7c]
+# W64-REAL16: v_cmp_ge_u16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x7c,0x7c]
+# W32-FAKE16: v_cmp_ge_u16_e32 vcc_lo, v127, v2       ; encoding: [0x7f,0x05,0x7c,0x7c]
+# W64-FAKE16: v_cmp_ge_u16_e32 vcc, v127, v2          ; encoding: [0x7f,0x05,0x7c,0x7c]
 
 0x01,0x04,0x7c,0x7c
-# W32: v_cmp_ge_u16_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x7c,0x7c]
-# W64: v_cmp_ge_u16_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x7c,0x7c]
+# W32-REAL16: v_cmp_ge_u16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x7c,0x7c]
+# W64-REAL16: v_cmp_ge_u16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x7c,0x7c]
+# W32-FAKE16: v_cmp_ge_u16_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x7c,0x7c]
+# W64-FAKE16: v_cmp_ge_u16_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x7c,0x7c]
 
 0x69,0x04,0x7c,0x7c
-# W32: v_cmp_ge_u16_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x7c,0x7c]
-# W64: v_cmp_ge_u16_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x7c,0x7c]
+# W32-REAL16: v_cmp_ge_u16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x7c,0x7c]
+# W64-REAL16: v_cmp_ge_u16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x7c,0x7c]
+# W32-FAKE16: v_cmp_ge_u16_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x7c,0x7c]
+# W64-FAKE16: v_cmp_ge_u16_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x7c,0x7c]
 
 0x6a,0x04,0x7c,0x7c
-# W32: v_cmp_ge_u16_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x7c,0x7c]
-# W64: v_cmp_ge_u16_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x7c,0x7c]
+# W32-REAL16: v_cmp_ge_u16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x7c,0x7c]
+# W64-REAL16: v_cmp_ge_u16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x7c,0x7c]
+# W32-FAKE16: v_cmp_ge_u16_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x7c,0x7c]
+# W64-FAKE16: v_cmp_ge_u16_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x7c,0x7c]
 
 0x6b,0x04,0x7c,0x7c
-# W32: v_cmp_ge_u16_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x7c,0x7c]
-# W64: v_cmp_ge_u16_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x7c,0x7c]
+# W32-REAL16: v_cmp_ge_u16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x7c,0x7c]
+# W64-REAL16: v_cmp_ge_u16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x7c,0x7c]
+# W32-FAKE16: v_cmp_ge_u16_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x7c,0x7c]
+# W64-FAKE16: v_cmp_ge_u16_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x7c,0x7c]
 
 0x7b,0x04,0x7c,0x7c
-# W32: v_cmp_ge_u16_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x7c,0x7c]
-# W64: v_cmp_ge_u16_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x7c,0x7c]
+# W32-REAL16: v_cmp_ge_u16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x7c,0x7c]
+# W64-REAL16: v_cmp_ge_u16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x7c,0x7c]
+# W32-FAKE16: v_cmp_ge_u16_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x7c,0x7c]
+# W64-FAKE16: v_cmp_ge_u16_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x7c,0x7c]
 
 0x7d,0x04,0x7c,0x7c
-# W32: v_cmp_ge_u16_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x7c,0x7c]
-# W64: v_cmp_ge_u16_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x7c,0x7c]
+# W32-REAL16: v_cmp_ge_u16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x7c,0x7c]
+# W64-REAL16: v_cmp_ge_u16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x7c,0x7c]
+# W32-FAKE16: v_cmp_ge_u16_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x7c,0x7c]
+# W64-FAKE16: v_cmp_ge_u16_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x7c,0x7c]
 
 0x7e,0x04,0x7c,0x7c
-# W32: v_cmp_ge_u16_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x7c,0x7c]
-# W64: v_cmp_ge_u16_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x7c,0x7c]
+# W32-REAL16: v_cmp_ge_u16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x7c,0x7c]
+# W64-REAL16: v_cmp_ge_u16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x7c,0x7c]
+# W32-FAKE16: v_cmp_ge_u16_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x7c,0x7c]
+# W64-FAKE16: v_cmp_ge_u16_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x7c,0x7c]
 
 0x7f,0x04,0x7c,0x7c
-# W32: v_cmp_ge_u16_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x7c,0x7c]
-# W64: v_cmp_ge_u16_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x7c,0x7c]
+# W32-REAL16: v_cmp_ge_u16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x7c,0x7c]
+# W64-REAL16: v_cmp_ge_u16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x7c,0x7c]
+# W32-FAKE16: v_cmp_ge_u16_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x7c,0x7c]
+# W64-FAKE16: v_cmp_ge_u16_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x7c,0x7c]
 
 0x7c,0x04,0x7c,0x7c
-# W32: v_cmp_ge_u16_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x7c,0x7c]
-# W64: v_cmp_ge_u16_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x7c,0x7c]
+# W32-REAL16: v_cmp_ge_u16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x7c,0x7c]
+# W64-REAL16: v_cmp_ge_u16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x7c,0x7c]
+# W32-FAKE16: v_cmp_ge_u16_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x7c,0x7c]
+# W64-FAKE16: v_cmp_ge_u16_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x7c,0x7c]
 
 0xc1,0x04,0x7c,0x7c
-# W32: v_cmp_ge_u16_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x7c,0x7c]
-# W64: v_cmp_ge_u16_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x7c,0x7c]
+# W32-REAL16: v_cmp_ge_u16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x7c,0x7c]
+# W64-REAL16: v_cmp_ge_u16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x7c,0x7c]
+# W32-FAKE16: v_cmp_ge_u16_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x7c,0x7c]
+# W64-FAKE16: v_cmp_ge_u16_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x7c,0x7c]
 
 0xf0,0x04,0x7c,0x7c
-# W32: v_cmp_ge_u16_e32 vcc_lo, 0x3800, v2     ; encoding: [0xff,0x04,0x7c,0x7c,0x00,0x38,0x00,0x00]
-# W64: v_cmp_ge_u16_e32 vcc, 0x3800, v2        ; encoding: [0xff,0x04,0x7c,0x7c,0x00,0x38,0x00,0x00]
+# W32-REAL16: v_cmp_ge_u16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x7c,0x7c,0x00,0x38,0x00,0x00]
+# W64-REAL16: v_cmp_ge_u16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x7c,0x7c,0x00,0x38,0x00,0x00]
+# W32-FAKE16: v_cmp_ge_u16_e32 vcc_lo, 0x3800, v2     ; encoding: [0xff,0x04,0x7c,0x7c,0x00,0x38,0x00,0x00]
+# W64-FAKE16: v_cmp_ge_u16_e32 vcc, 0x3800, v2        ; encoding: [0xff,0x04,0x7c,0x7c,0x00,0x38,0x00,0x00]
 
 0xfd,0x04,0x7c,0x7c
-# W32: v_cmp_ge_u16_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x7c,0x7c]
-# W64: v_cmp_ge_u16_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x7c,0x7c]
+# W32-REAL16: v_cmp_ge_u16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x7c,0x7c]
+# W64-REAL16: v_cmp_ge_u16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x7c,0x7c]
+# W32-FAKE16: v_cmp_ge_u16_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x7c,0x7c]
+# W64-FAKE16: v_cmp_ge_u16_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x7c,0x7c]
 
 0xff,0xfe,0x7c,0x7c,0x0b,0xfe,0x00,0x00
-# W32: v_cmp_ge_u16_e32 vcc_lo, 0xfe0b, v127   ; encoding: [0xff,0xfe,0x7c,0x7c,0x0b,0xfe,0x00,0x00]
-# W64: v_cmp_ge_u16_e32 vcc, 0xfe0b, v127      ; encoding: [0xff,0xfe,0x7c,0x7c,0x0b,0xfe,0x00,0x00]
+# W32-REAL16: v_cmp_ge_u16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x7c,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-REAL16: v_cmp_ge_u16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x7c,0x7c,0x0b,0xfe,0x00,0x00]
+# W32-FAKE16: v_cmp_ge_u16_e32 vcc_lo, 0xfe0b, v127   ; encoding: [0xff,0xfe,0x7c,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-FAKE16: v_cmp_ge_u16_e32 vcc, 0xfe0b, v127      ; encoding: [0xff,0xfe,0x7c,0x7c,0x0b,0xfe,0x00,0x00]
+
+0x81,0x05,0x7c,0x7c
+# W32-REAL16: v_cmp_ge_u16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x7c,0x7c]
+# W64-REAL16: v_cmp_ge_u16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x7c,0x7c]
+# W32-FAKE16: v_cmp_ge_u16_e32 vcc_lo, v129/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0x81,0x05,0x7c,0x7c]
+# W64-FAKE16: v_cmp_ge_u16_e32 vcc, v129/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0x81,0x05,0x7c,0x7c]
+
+0xff,0x05,0x7c,0x7c
+# W32-REAL16: v_cmp_ge_u16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x7c,0x7c]
+# W64-REAL16: v_cmp_ge_u16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x7c,0x7c]
+# W32-FAKE16: v_cmp_ge_u16_e32 vcc_lo, v255/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0xff,0x05,0x7c,0x7c]
+# W64-FAKE16: v_cmp_ge_u16_e32 vcc, v255/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0xff,0x05,0x7c,0x7c]
+
+0xf0,0xfe,0x7c,0x7c
+# W32-REAL16: v_cmp_ge_u16_e32 vcc_lo, 0x3800, v127.l ; encoding: [0xff,0xfe,0x7c,0x7c,0x00,0x38,0x00,0x00]
+# W64-REAL16: v_cmp_ge_u16_e32 vcc, 0x3800, v127.l    ; encoding: [0xff,0xfe,0x7c,0x7c,0x00,0x38,0x00,0x00]
+# W32-FAKE16: v_cmp_ge_u16_e32 vcc_lo, 0x3800, v127   ; encoding: [0xff,0xfe,0x7c,0x7c,0x00,0x38,0x00,0x00]
+# W64-FAKE16: v_cmp_ge_u16_e32 vcc, 0x3800, v127      ; encoding: [0xff,0xfe,0x7c,0x7c,0x00,0x38,0x00,0x00]
+
+0xfd,0x04,0x7d,0x7c
+# W32-REAL16: v_cmp_ge_u16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x7d,0x7c]
+# W64-REAL16: v_cmp_ge_u16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x7d,0x7c]
+# W32-FAKE16: v_cmp_ge_u16_e32 vcc_lo, src_scc, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xfd,0x04,0x7d,0x7c]
+# W64-FAKE16: v_cmp_ge_u16_e32 vcc, src_scc, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xfd,0x04,0x7d,0x7c]
+
+0xff,0xfe,0x7d,0x7c,0x0b,0xfe,0x00,0x00
+# W32-REAL16: v_cmp_ge_u16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x7d,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-REAL16: v_cmp_ge_u16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x7d,0x7c,0x0b,0xfe,0x00,0x00]
+# W32-FAKE16: v_cmp_ge_u16_e32 vcc_lo, 0xfe0b, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xff,0xfe,0x7d,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-FAKE16: v_cmp_ge_u16_e32 vcc, 0xfe0b, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xff,0xfe,0x7d,0x7c,0x0b,0xfe,0x00,0x00]
 
 0x01,0x05,0x9c,0x7c
 # W32: v_cmp_ge_u32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x9c,0x7c]
@@ -1733,64 +1973,124 @@
 # W64: v_cmp_gt_f64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x49,0x7c,0x56,0x34,0x12,0xaf]
 
 0x01,0x05,0x68,0x7c
-# W32: v_cmp_gt_i16_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x68,0x7c]
-# W64: v_cmp_gt_i16_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x68,0x7c]
+# W32-REAL16: v_cmp_gt_i16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x68,0x7c]
+# W64-REAL16: v_cmp_gt_i16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x68,0x7c]
+# W32-FAKE16: v_cmp_gt_i16_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x68,0x7c]
+# W64-FAKE16: v_cmp_gt_i16_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x68,0x7c]
 
 0x7f,0x05,0x68,0x7c
-# W32: v_cmp_gt_i16_e32 vcc_lo, v127, v2       ; encoding: [0x7f,0x05,0x68,0x7c]
-# W64: v_cmp_gt_i16_e32 vcc, v127, v2          ; encoding: [0x7f,0x05,0x68,0x7c]
+# W32-REAL16: v_cmp_gt_i16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x68,0x7c]
+# W64-REAL16: v_cmp_gt_i16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x68,0x7c]
+# W32-FAKE16: v_cmp_gt_i16_e32 vcc_lo, v127, v2       ; encoding: [0x7f,0x05,0x68,0x7c]
+# W64-FAKE16: v_cmp_gt_i16_e32 vcc, v127, v2          ; encoding: [0x7f,0x05,0x68,0x7c]
 
 0x01,0x04,0x68,0x7c
-# W32: v_cmp_gt_i16_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x68,0x7c]
-# W64: v_cmp_gt_i16_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x68,0x7c]
+# W32-REAL16: v_cmp_gt_i16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x68,0x7c]
+# W64-REAL16: v_cmp_gt_i16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x68,0x7c]
+# W32-FAKE16: v_cmp_gt_i16_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x68,0x7c]
+# W64-FAKE16: v_cmp_gt_i16_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x68,0x7c]
 
 0x69,0x04,0x68,0x7c
-# W32: v_cmp_gt_i16_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x68,0x7c]
-# W64: v_cmp_gt_i16_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x68,0x7c]
+# W32-REAL16: v_cmp_gt_i16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x68,0x7c]
+# W64-REAL16: v_cmp_gt_i16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x68,0x7c]
+# W32-FAKE16: v_cmp_gt_i16_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x68,0x7c]
+# W64-FAKE16: v_cmp_gt_i16_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x68,0x7c]
 
 0x6a,0x04,0x68,0x7c
-# W32: v_cmp_gt_i16_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x68,0x7c]
-# W64: v_cmp_gt_i16_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x68,0x7c]
+# W32-REAL16: v_cmp_gt_i16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x68,0x7c]
+# W64-REAL16: v_cmp_gt_i16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x68,0x7c]
+# W32-FAKE16: v_cmp_gt_i16_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x68,0x7c]
+# W64-FAKE16: v_cmp_gt_i16_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x68,0x7c]
 
 0x6b,0x04,0x68,0x7c
-# W32: v_cmp_gt_i16_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x68,0x7c]
-# W64: v_cmp_gt_i16_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x68,0x7c]
+# W32-REAL16: v_cmp_gt_i16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x68,0x7c]
+# W64-REAL16: v_cmp_gt_i16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x68,0x7c]
+# W32-FAKE16: v_cmp_gt_i16_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x68,0x7c]
+# W64-FAKE16: v_cmp_gt_i16_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x68,0x7c]
 
 0x7b,0x04,0x68,0x7c
-# W32: v_cmp_gt_i16_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x68,0x7c]
-# W64: v_cmp_gt_i16_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x68,0x7c]
+# W32-REAL16: v_cmp_gt_i16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x68,0x7c]
+# W64-REAL16: v_cmp_gt_i16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x68,0x7c]
+# W32-FAKE16: v_cmp_gt_i16_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x68,0x7c]
+# W64-FAKE16: v_cmp_gt_i16_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x68,0x7c]
 
 0x7d,0x04,0x68,0x7c
-# W32: v_cmp_gt_i16_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x68,0x7c]
-# W64: v_cmp_gt_i16_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x68,0x7c]
+# W32-REAL16: v_cmp_gt_i16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x68,0x7c]
+# W64-REAL16: v_cmp_gt_i16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x68,0x7c]
+# W32-FAKE16: v_cmp_gt_i16_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x68,0x7c]
+# W64-FAKE16: v_cmp_gt_i16_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x68,0x7c]
 
 0x7e,0x04,0x68,0x7c
-# W32: v_cmp_gt_i16_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x68,0x7c]
-# W64: v_cmp_gt_i16_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x68,0x7c]
+# W32-REAL16: v_cmp_gt_i16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x68,0x7c]
+# W64-REAL16: v_cmp_gt_i16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x68,0x7c]
+# W32-FAKE16: v_cmp_gt_i16_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x68,0x7c]
+# W64-FAKE16: v_cmp_gt_i16_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x68,0x7c]
 
 0x7f,0x04,0x68,0x7c
-# W32: v_cmp_gt_i16_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x68,0x7c]
-# W64: v_cmp_gt_i16_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x68,0x7c]
+# W32-REAL16: v_cmp_gt_i16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x68,0x7c]
+# W64-REAL16: v_cmp_gt_i16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x68,0x7c]
+# W32-FAKE16: v_cmp_gt_i16_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x68,0x7c]
+# W64-FAKE16: v_cmp_gt_i16_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x68,0x7c]
 
 0x7c,0x04,0x68,0x7c
-# W32: v_cmp_gt_i16_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x68,0x7c]
-# W64: v_cmp_gt_i16_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x68,0x7c]
+# W32-REAL16: v_cmp_gt_i16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x68,0x7c]
+# W64-REAL16: v_cmp_gt_i16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x68,0x7c]
+# W32-FAKE16: v_cmp_gt_i16_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x68,0x7c]
+# W64-FAKE16: v_cmp_gt_i16_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x68,0x7c]
 
 0xc1,0x04,0x68,0x7c
-# W32: v_cmp_gt_i16_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x68,0x7c]
-# W64: v_cmp_gt_i16_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x68,0x7c]
+# W32-REAL16: v_cmp_gt_i16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x68,0x7c]
+# W64-REAL16: v_cmp_gt_i16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x68,0x7c]
+# W32-FAKE16: v_cmp_gt_i16_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x68,0x7c]
+# W64-FAKE16: v_cmp_gt_i16_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x68,0x7c]
 
 0xf0,0x04,0x68,0x7c
-# W32: v_cmp_gt_i16_e32 vcc_lo, 0x3800, v2     ; encoding: [0xff,0x04,0x68,0x7c,0x00,0x38,0x00,0x00]
-# W64: v_cmp_gt_i16_e32 vcc, 0x3800, v2        ; encoding: [0xff,0x04,0x68,0x7c,0x00,0x38,0x00,0x00]
+# W32-REAL16: v_cmp_gt_i16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x68,0x7c,0x00,0x38,0x00,0x00]
+# W64-REAL16: v_cmp_gt_i16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x68,0x7c,0x00,0x38,0x00,0x00]
+# W32-FAKE16: v_cmp_gt_i16_e32 vcc_lo, 0x3800, v2     ; encoding: [0xff,0x04,0x68,0x7c,0x00,0x38,0x00,0x00]
+# W64-FAKE16: v_cmp_gt_i16_e32 vcc, 0x3800, v2        ; encoding: [0xff,0x04,0x68,0x7c,0x00,0x38,0x00,0x00]
 
 0xfd,0x04,0x68,0x7c
-# W32: v_cmp_gt_i16_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x68,0x7c]
-# W64: v_cmp_gt_i16_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x68,0x7c]
+# W32-REAL16: v_cmp_gt_i16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x68,0x7c]
+# W64-REAL16: v_cmp_gt_i16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x68,0x7c]
+# W32-FAKE16: v_cmp_gt_i16_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x68,0x7c]
+# W64-FAKE16: v_cmp_gt_i16_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x68,0x7c]
 
 0xff,0xfe,0x68,0x7c,0x0b,0xfe,0x00,0x00
-# W32: v_cmp_gt_i16_e32 vcc_lo, 0xfe0b, v127   ; encoding: [0xff,0xfe,0x68,0x7c,0x0b,0xfe,0x00,0x00]
-# W64: v_cmp_gt_i16_e32 vcc, 0xfe0b, v127      ; encoding: [0xff,0xfe,0x68,0x7c,0x0b,0xfe,0x00,0x00]
+# W32-REAL16: v_cmp_gt_i16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x68,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-REAL16: v_cmp_gt_i16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x68,0x7c,0x0b,0xfe,0x00,0x00]
+# W32-FAKE16: v_cmp_gt_i16_e32 vcc_lo, 0xfe0b, v127   ; encoding: [0xff,0xfe,0x68,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-FAKE16: v_cmp_gt_i16_e32 vcc, 0xfe0b, v127      ; encoding: [0xff,0xfe,0x68,0x7c,0x0b,0xfe,0x00,0x00]
+
+0x81,0x05,0x68,0x7c
+# W32-REAL16: v_cmp_gt_i16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x68,0x7c]
+# W64-REAL16: v_cmp_gt_i16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x68,0x7c]
+# W32-FAKE16: v_cmp_gt_i16_e32 vcc_lo, v129/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0x81,0x05,0x68,0x7c]
+# W64-FAKE16: v_cmp_gt_i16_e32 vcc, v129/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0x81,0x05,0x68,0x7c]
+
+0xff,0x05,0x68,0x7c
+# W32-REAL16: v_cmp_gt_i16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x68,0x7c]
+# W64-REAL16: v_cmp_gt_i16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x68,0x7c]
+# W32-FAKE16: v_cmp_gt_i16_e32 vcc_lo, v255/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0xff,0x05,0x68,0x7c]
+# W64-FAKE16: v_cmp_gt_i16_e32 vcc, v255/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0xff,0x05,0x68,0x7c]
+
+0xf0,0xfe,0x68,0x7c
+# W32-REAL16: v_cmp_gt_i16_e32 vcc_lo, 0x3800, v127.l ; encoding: [0xff,0xfe,0x68,0x7c,0x00,0x38,0x00,0x00]
+# W64-REAL16: v_cmp_gt_i16_e32 vcc, 0x3800, v127.l    ; encoding: [0xff,0xfe,0x68,0x7c,0x00,0x38,0x00,0x00]
+# W32-FAKE16: v_cmp_gt_i16_e32 vcc_lo, 0x3800, v127   ; encoding: [0xff,0xfe,0x68,0x7c,0x00,0x38,0x00,0x00]
+# W64-FAKE16: v_cmp_gt_i16_e32 vcc, 0x3800, v127      ; encoding: [0xff,0xfe,0x68,0x7c,0x00,0x38,0x00,0x00]
+
+0xfd,0x04,0x69,0x7c
+# W32-REAL16: v_cmp_gt_i16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x69,0x7c]
+# W64-REAL16: v_cmp_gt_i16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x69,0x7c]
+# W32-FAKE16: v_cmp_gt_i16_e32 vcc_lo, src_scc, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xfd,0x04,0x69,0x7c]
+# W64-FAKE16: v_cmp_gt_i16_e32 vcc, src_scc, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xfd,0x04,0x69,0x7c]
+
+0xff,0xfe,0x69,0x7c,0x0b,0xfe,0x00,0x00
+# W32-REAL16: v_cmp_gt_i16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x69,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-REAL16: v_cmp_gt_i16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x69,0x7c,0x0b,0xfe,0x00,0x00]
+# W32-FAKE16: v_cmp_gt_i16_e32 vcc_lo, 0xfe0b, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xff,0xfe,0x69,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-FAKE16: v_cmp_gt_i16_e32 vcc, 0xfe0b, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xff,0xfe,0x69,0x7c,0x0b,0xfe,0x00,0x00]
 
 0x01,0x05,0x88,0x7c
 # W32: v_cmp_gt_i32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x88,0x7c]
@@ -1901,64 +2201,124 @@
 # W64: v_cmp_gt_i64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xa9,0x7c,0x56,0x34,0x12,0xaf]
 
 0x01,0x05,0x78,0x7c
-# W32: v_cmp_gt_u16_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x78,0x7c]
-# W64: v_cmp_gt_u16_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x78,0x7c]
+# W32-REAL16: v_cmp_gt_u16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x78,0x7c]
+# W64-REAL16: v_cmp_gt_u16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x78,0x7c]
+# W32-FAKE16: v_cmp_gt_u16_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x78,0x7c]
+# W64-FAKE16: v_cmp_gt_u16_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x78,0x7c]
 
 0x7f,0x05,0x78,0x7c
-# W32: v_cmp_gt_u16_e32 vcc_lo, v127, v2       ; encoding: [0x7f,0x05,0x78,0x7c]
-# W64: v_cmp_gt_u16_e32 vcc, v127, v2          ; encoding: [0x7f,0x05,0x78,0x7c]
+# W32-REAL16: v_cmp_gt_u16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x78,0x7c]
+# W64-REAL16: v_cmp_gt_u16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x78,0x7c]
+# W32-FAKE16: v_cmp_gt_u16_e32 vcc_lo, v127, v2       ; encoding: [0x7f,0x05,0x78,0x7c]
+# W64-FAKE16: v_cmp_gt_u16_e32 vcc, v127, v2          ; encoding: [0x7f,0x05,0x78,0x7c]
 
 0x01,0x04,0x78,0x7c
-# W32: v_cmp_gt_u16_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x78,0x7c]
-# W64: v_cmp_gt_u16_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x78,0x7c]
+# W32-REAL16: v_cmp_gt_u16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x78,0x7c]
+# W64-REAL16: v_cmp_gt_u16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x78,0x7c]
+# W32-FAKE16: v_cmp_gt_u16_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x78,0x7c]
+# W64-FAKE16: v_cmp_gt_u16_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x78,0x7c]
 
 0x69,0x04,0x78,0x7c
-# W32: v_cmp_gt_u16_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x78,0x7c]
-# W64: v_cmp_gt_u16_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x78,0x7c]
+# W32-REAL16: v_cmp_gt_u16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x78,0x7c]
+# W64-REAL16: v_cmp_gt_u16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x78,0x7c]
+# W32-FAKE16: v_cmp_gt_u16_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x78,0x7c]
+# W64-FAKE16: v_cmp_gt_u16_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x78,0x7c]
 
 0x6a,0x04,0x78,0x7c
-# W32: v_cmp_gt_u16_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x78,0x7c]
-# W64: v_cmp_gt_u16_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x78,0x7c]
+# W32-REAL16: v_cmp_gt_u16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x78,0x7c]
+# W64-REAL16: v_cmp_gt_u16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x78,0x7c]
+# W32-FAKE16: v_cmp_gt_u16_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x78,0x7c]
+# W64-FAKE16: v_cmp_gt_u16_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x78,0x7c]
 
 0x6b,0x04,0x78,0x7c
-# W32: v_cmp_gt_u16_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x78,0x7c]
-# W64: v_cmp_gt_u16_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x78,0x7c]
+# W32-REAL16: v_cmp_gt_u16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x78,0x7c]
+# W64-REAL16: v_cmp_gt_u16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x78,0x7c]
+# W32-FAKE16: v_cmp_gt_u16_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x78,0x7c]
+# W64-FAKE16: v_cmp_gt_u16_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x78,0x7c]
 
 0x7b,0x04,0x78,0x7c
-# W32: v_cmp_gt_u16_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x78,0x7c]
-# W64: v_cmp_gt_u16_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x78,0x7c]
+# W32-REAL16: v_cmp_gt_u16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x78,0x7c]
+# W64-REAL16: v_cmp_gt_u16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x78,0x7c]
+# W32-FAKE16: v_cmp_gt_u16_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x78,0x7c]
+# W64-FAKE16: v_cmp_gt_u16_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x78,0x7c]
 
 0x7d,0x04,0x78,0x7c
-# W32: v_cmp_gt_u16_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x78,0x7c]
-# W64: v_cmp_gt_u16_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x78,0x7c]
+# W32-REAL16: v_cmp_gt_u16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x78,0x7c]
+# W64-REAL16: v_cmp_gt_u16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x78,0x7c]
+# W32-FAKE16: v_cmp_gt_u16_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x78,0x7c]
+# W64-FAKE16: v_cmp_gt_u16_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x78,0x7c]
 
 0x7e,0x04,0x78,0x7c
-# W32: v_cmp_gt_u16_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x78,0x7c]
-# W64: v_cmp_gt_u16_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x78,0x7c]
+# W32-REAL16: v_cmp_gt_u16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x78,0x7c]
+# W64-REAL16: v_cmp_gt_u16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x78,0x7c]
+# W32-FAKE16: v_cmp_gt_u16_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x78,0x7c]
+# W64-FAKE16: v_cmp_gt_u16_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x78,0x7c]
 
 0x7f,0x04,0x78,0x7c
-# W32: v_cmp_gt_u16_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x78,0x7c]
-# W64: v_cmp_gt_u16_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x78,0x7c]
+# W32-REAL16: v_cmp_gt_u16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x78,0x7c]
+# W64-REAL16: v_cmp_gt_u16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x78,0x7c]
+# W32-FAKE16: v_cmp_gt_u16_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x78,0x7c]
+# W64-FAKE16: v_cmp_gt_u16_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x78,0x7c]
 
 0x7c,0x04,0x78,0x7c
-# W32: v_cmp_gt_u16_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x78,0x7c]
-# W64: v_cmp_gt_u16_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x78,0x7c]
+# W32-REAL16: v_cmp_gt_u16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x78,0x7c]
+# W64-REAL16: v_cmp_gt_u16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x78,0x7c]
+# W32-FAKE16: v_cmp_gt_u16_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x78,0x7c]
+# W64-FAKE16: v_cmp_gt_u16_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x78,0x7c]
 
 0xc1,0x04,0x78,0x7c
-# W32: v_cmp_gt_u16_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x78,0x7c]
-# W64: v_cmp_gt_u16_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x78,0x7c]
+# W32-REAL16: v_cmp_gt_u16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x78,0x7c]
+# W64-REAL16: v_cmp_gt_u16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x78,0x7c]
+# W32-FAKE16: v_cmp_gt_u16_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x78,0x7c]
+# W64-FAKE16: v_cmp_gt_u16_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x78,0x7c]
 
 0xf0,0x04,0x78,0x7c
-# W32: v_cmp_gt_u16_e32 vcc_lo, 0x3800, v2     ; encoding: [0xff,0x04,0x78,0x7c,0x00,0x38,0x00,0x00]
-# W64: v_cmp_gt_u16_e32 vcc, 0x3800, v2        ; encoding: [0xff,0x04,0x78,0x7c,0x00,0x38,0x00,0x00]
+# W32-REAL16: v_cmp_gt_u16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x78,0x7c,0x00,0x38,0x00,0x00]
+# W64-REAL16: v_cmp_gt_u16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x78,0x7c,0x00,0x38,0x00,0x00]
+# W32-FAKE16: v_cmp_gt_u16_e32 vcc_lo, 0x3800, v2     ; encoding: [0xff,0x04,0x78,0x7c,0x00,0x38,0x00,0x00]
+# W64-FAKE16: v_cmp_gt_u16_e32 vcc, 0x3800, v2        ; encoding: [0xff,0x04,0x78,0x7c,0x00,0x38,0x00,0x00]
 
 0xfd,0x04,0x78,0x7c
-# W32: v_cmp_gt_u16_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x78,0x7c]
-# W64: v_cmp_gt_u16_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x78,0x7c]
+# W32-REAL16: v_cmp_gt_u16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x78,0x7c]
+# W64-REAL16: v_cmp_gt_u16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x78,0x7c]
+# W32-FAKE16: v_cmp_gt_u16_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x78,0x7c]
+# W64-FAKE16: v_cmp_gt_u16_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x78,0x7c]
 
 0xff,0xfe,0x78,0x7c,0x0b,0xfe,0x00,0x00
-# W32: v_cmp_gt_u16_e32 vcc_lo, 0xfe0b, v127   ; encoding: [0xff,0xfe,0x78,0x7c,0x0b,0xfe,0x00,0x00]
-# W64: v_cmp_gt_u16_e32 vcc, 0xfe0b, v127      ; encoding: [0xff,0xfe,0x78,0x7c,0x0b,0xfe,0x00,0x00]
+# W32-REAL16: v_cmp_gt_u16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x78,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-REAL16: v_cmp_gt_u16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x78,0x7c,0x0b,0xfe,0x00,0x00]
+# W32-FAKE16: v_cmp_gt_u16_e32 vcc_lo, 0xfe0b, v127   ; encoding: [0xff,0xfe,0x78,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-FAKE16: v_cmp_gt_u16_e32 vcc, 0xfe0b, v127      ; encoding: [0xff,0xfe,0x78,0x7c,0x0b,0xfe,0x00,0x00]
+
+0x81,0x05,0x78,0x7c
+# W32-REAL16: v_cmp_gt_u16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x78,0x7c]
+# W64-REAL16: v_cmp_gt_u16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x78,0x7c]
+# W32-FAKE16: v_cmp_gt_u16_e32 vcc_lo, v129/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0x81,0x05,0x78,0x7c]
+# W64-FAKE16: v_cmp_gt_u16_e32 vcc, v129/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0x81,0x05,0x78,0x7c]
+
+0xff,0x05,0x78,0x7c
+# W32-REAL16: v_cmp_gt_u16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x78,0x7c]
+# W64-REAL16: v_cmp_gt_u16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x78,0x7c]
+# W32-FAKE16: v_cmp_gt_u16_e32 vcc_lo, v255/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0xff,0x05,0x78,0x7c]
+# W64-FAKE16: v_cmp_gt_u16_e32 vcc, v255/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0xff,0x05,0x78,0x7c]
+
+0xf0,0xfe,0x78,0x7c
+# W32-REAL16: v_cmp_gt_u16_e32 vcc_lo, 0x3800, v127.l ; encoding: [0xff,0xfe,0x78,0x7c,0x00,0x38,0x00,0x00]
+# W64-REAL16: v_cmp_gt_u16_e32 vcc, 0x3800, v127.l    ; encoding: [0xff,0xfe,0x78,0x7c,0x00,0x38,0x00,0x00]
+# W32-FAKE16: v_cmp_gt_u16_e32 vcc_lo, 0x3800, v127   ; encoding: [0xff,0xfe,0x78,0x7c,0x00,0x38,0x00,0x00]
+# W64-FAKE16: v_cmp_gt_u16_e32 vcc, 0x3800, v127      ; encoding: [0xff,0xfe,0x78,0x7c,0x00,0x38,0x00,0x00]
+
+0xfd,0x04,0x79,0x7c
+# W32-REAL16: v_cmp_gt_u16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x79,0x7c]
+# W64-REAL16: v_cmp_gt_u16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x79,0x7c]
+# W32-FAKE16: v_cmp_gt_u16_e32 vcc_lo, src_scc, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xfd,0x04,0x79,0x7c]
+# W64-FAKE16: v_cmp_gt_u16_e32 vcc, src_scc, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xfd,0x04,0x79,0x7c]
+
+0xff,0xfe,0x79,0x7c,0x0b,0xfe,0x00,0x00
+# W32-REAL16: v_cmp_gt_u16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x79,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-REAL16: v_cmp_gt_u16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x79,0x7c,0x0b,0xfe,0x00,0x00]
+# W32-FAKE16: v_cmp_gt_u16_e32 vcc_lo, 0xfe0b, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xff,0xfe,0x79,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-FAKE16: v_cmp_gt_u16_e32 vcc, 0xfe0b, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xff,0xfe,0x79,0x7c,0x0b,0xfe,0x00,0x00]
 
 0x01,0x05,0x98,0x7c
 # W32: v_cmp_gt_u32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x98,0x7c]
@@ -2237,64 +2597,124 @@
 # W64: v_cmp_le_f64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x47,0x7c,0x56,0x34,0x12,0xaf]
 
 0x01,0x05,0x66,0x7c
-# W32: v_cmp_le_i16_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x66,0x7c]
-# W64: v_cmp_le_i16_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x66,0x7c]
+# W32-REAL16: v_cmp_le_i16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x66,0x7c]
+# W64-REAL16: v_cmp_le_i16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x66,0x7c]
+# W32-FAKE16: v_cmp_le_i16_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x66,0x7c]
+# W64-FAKE16: v_cmp_le_i16_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x66,0x7c]
 
 0x7f,0x05,0x66,0x7c
-# W32: v_cmp_le_i16_e32 vcc_lo, v127, v2       ; encoding: [0x7f,0x05,0x66,0x7c]
-# W64: v_cmp_le_i16_e32 vcc, v127, v2          ; encoding: [0x7f,0x05,0x66,0x7c]
+# W32-REAL16: v_cmp_le_i16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x66,0x7c]
+# W64-REAL16: v_cmp_le_i16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x66,0x7c]
+# W32-FAKE16: v_cmp_le_i16_e32 vcc_lo, v127, v2       ; encoding: [0x7f,0x05,0x66,0x7c]
+# W64-FAKE16: v_cmp_le_i16_e32 vcc, v127, v2          ; encoding: [0x7f,0x05,0x66,0x7c]
 
 0x01,0x04,0x66,0x7c
-# W32: v_cmp_le_i16_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x66,0x7c]
-# W64: v_cmp_le_i16_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x66,0x7c]
+# W32-REAL16: v_cmp_le_i16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x66,0x7c]
+# W64-REAL16: v_cmp_le_i16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x66,0x7c]
+# W32-FAKE16: v_cmp_le_i16_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x66,0x7c]
+# W64-FAKE16: v_cmp_le_i16_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x66,0x7c]
 
 0x69,0x04,0x66,0x7c
-# W32: v_cmp_le_i16_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x66,0x7c]
-# W64: v_cmp_le_i16_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x66,0x7c]
+# W32-REAL16: v_cmp_le_i16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x66,0x7c]
+# W64-REAL16: v_cmp_le_i16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x66,0x7c]
+# W32-FAKE16: v_cmp_le_i16_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x66,0x7c]
+# W64-FAKE16: v_cmp_le_i16_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x66,0x7c]
 
 0x6a,0x04,0x66,0x7c
-# W32: v_cmp_le_i16_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x66,0x7c]
-# W64: v_cmp_le_i16_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x66,0x7c]
+# W32-REAL16: v_cmp_le_i16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x66,0x7c]
+# W64-REAL16: v_cmp_le_i16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x66,0x7c]
+# W32-FAKE16: v_cmp_le_i16_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x66,0x7c]
+# W64-FAKE16: v_cmp_le_i16_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x66,0x7c]
 
 0x6b,0x04,0x66,0x7c
-# W32: v_cmp_le_i16_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x66,0x7c]
-# W64: v_cmp_le_i16_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x66,0x7c]
+# W32-REAL16: v_cmp_le_i16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x66,0x7c]
+# W64-REAL16: v_cmp_le_i16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x66,0x7c]
+# W32-FAKE16: v_cmp_le_i16_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x66,0x7c]
+# W64-FAKE16: v_cmp_le_i16_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x66,0x7c]
 
 0x7b,0x04,0x66,0x7c
-# W32: v_cmp_le_i16_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x66,0x7c]
-# W64: v_cmp_le_i16_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x66,0x7c]
+# W32-REAL16: v_cmp_le_i16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x66,0x7c]
+# W64-REAL16: v_cmp_le_i16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x66,0x7c]
+# W32-FAKE16: v_cmp_le_i16_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x66,0x7c]
+# W64-FAKE16: v_cmp_le_i16_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x66,0x7c]
 
 0x7d,0x04,0x66,0x7c
-# W32: v_cmp_le_i16_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x66,0x7c]
-# W64: v_cmp_le_i16_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x66,0x7c]
+# W32-REAL16: v_cmp_le_i16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x66,0x7c]
+# W64-REAL16: v_cmp_le_i16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x66,0x7c]
+# W32-FAKE16: v_cmp_le_i16_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x66,0x7c]
+# W64-FAKE16: v_cmp_le_i16_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x66,0x7c]
 
 0x7e,0x04,0x66,0x7c
-# W32: v_cmp_le_i16_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x66,0x7c]
-# W64: v_cmp_le_i16_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x66,0x7c]
+# W32-REAL16: v_cmp_le_i16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x66,0x7c]
+# W64-REAL16: v_cmp_le_i16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x66,0x7c]
+# W32-FAKE16: v_cmp_le_i16_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x66,0x7c]
+# W64-FAKE16: v_cmp_le_i16_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x66,0x7c]
 
 0x7f,0x04,0x66,0x7c
-# W32: v_cmp_le_i16_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x66,0x7c]
-# W64: v_cmp_le_i16_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x66,0x7c]
+# W32-REAL16: v_cmp_le_i16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x66,0x7c]
+# W64-REAL16: v_cmp_le_i16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x66,0x7c]
+# W32-FAKE16: v_cmp_le_i16_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x66,0x7c]
+# W64-FAKE16: v_cmp_le_i16_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x66,0x7c]
 
 0x7c,0x04,0x66,0x7c
-# W32: v_cmp_le_i16_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x66,0x7c]
-# W64: v_cmp_le_i16_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x66,0x7c]
+# W32-REAL16: v_cmp_le_i16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x66,0x7c]
+# W64-REAL16: v_cmp_le_i16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x66,0x7c]
+# W32-FAKE16: v_cmp_le_i16_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x66,0x7c]
+# W64-FAKE16: v_cmp_le_i16_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x66,0x7c]
 
 0xc1,0x04,0x66,0x7c
-# W32: v_cmp_le_i16_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x66,0x7c]
-# W64: v_cmp_le_i16_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x66,0x7c]
+# W32-REAL16: v_cmp_le_i16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x66,0x7c]
+# W64-REAL16: v_cmp_le_i16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x66,0x7c]
+# W32-FAKE16: v_cmp_le_i16_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x66,0x7c]
+# W64-FAKE16: v_cmp_le_i16_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x66,0x7c]
 
 0xf0,0x04,0x66,0x7c
-# W32: v_cmp_le_i16_e32 vcc_lo, 0x3800, v2     ; encoding: [0xff,0x04,0x66,0x7c,0x00,0x38,0x00,0x00]
-# W64: v_cmp_le_i16_e32 vcc, 0x3800, v2        ; encoding: [0xff,0x04,0x66,0x7c,0x00,0x38,0x00,0x00]
+# W32-REAL16: v_cmp_le_i16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x66,0x7c,0x00,0x38,0x00,0x00]
+# W64-REAL16: v_cmp_le_i16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x66,0x7c,0x00,0x38,0x00,0x00]
+# W32-FAKE16: v_cmp_le_i16_e32 vcc_lo, 0x3800, v2     ; encoding: [0xff,0x04,0x66,0x7c,0x00,0x38,0x00,0x00]
+# W64-FAKE16: v_cmp_le_i16_e32 vcc, 0x3800, v2        ; encoding: [0xff,0x04,0x66,0x7c,0x00,0x38,0x00,0x00]
 
 0xfd,0x04,0x66,0x7c
-# W32: v_cmp_le_i16_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x66,0x7c]
-# W64: v_cmp_le_i16_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x66,0x7c]
+# W32-REAL16: v_cmp_le_i16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x66,0x7c]
+# W64-REAL16: v_cmp_le_i16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x66,0x7c]
+# W32-FAKE16: v_cmp_le_i16_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x66,0x7c]
+# W64-FAKE16: v_cmp_le_i16_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x66,0x7c]
 
 0xff,0xfe,0x66,0x7c,0x0b,0xfe,0x00,0x00
-# W32: v_cmp_le_i16_e32 vcc_lo, 0xfe0b, v127   ; encoding: [0xff,0xfe,0x66,0x7c,0x0b,0xfe,0x00,0x00]
-# W64: v_cmp_le_i16_e32 vcc, 0xfe0b, v127      ; encoding: [0xff,0xfe,0x66,0x7c,0x0b,0xfe,0x00,0x00]
+# W32-REAL16: v_cmp_le_i16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x66,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-REAL16: v_cmp_le_i16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x66,0x7c,0x0b,0xfe,0x00,0x00]
+# W32-FAKE16: v_cmp_le_i16_e32 vcc_lo, 0xfe0b, v127   ; encoding: [0xff,0xfe,0x66,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-FAKE16: v_cmp_le_i16_e32 vcc, 0xfe0b, v127      ; encoding: [0xff,0xfe,0x66,0x7c,0x0b,0xfe,0x00,0x00]
+
+0x81,0x05,0x66,0x7c
+# W32-REAL16: v_cmp_le_i16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x66,0x7c]
+# W64-REAL16: v_cmp_le_i16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x66,0x7c]
+# W32-FAKE16: v_cmp_le_i16_e32 vcc_lo, v129/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0x81,0x05,0x66,0x7c]
+# W64-FAKE16: v_cmp_le_i16_e32 vcc, v129/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0x81,0x05,0x66,0x7c]
+
+0xff,0x05,0x66,0x7c
+# W32-REAL16: v_cmp_le_i16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x66,0x7c]
+# W64-REAL16: v_cmp_le_i16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x66,0x7c]
+# W32-FAKE16: v_cmp_le_i16_e32 vcc_lo, v255/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0xff,0x05,0x66,0x7c]
+# W64-FAKE16: v_cmp_le_i16_e32 vcc, v255/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0xff,0x05,0x66,0x7c]
+
+0xf0,0xfe,0x66,0x7c
+# W32-REAL16: v_cmp_le_i16_e32 vcc_lo, 0x3800, v127.l ; encoding: [0xff,0xfe,0x66,0x7c,0x00,0x38,0x00,0x00]
+# W64-REAL16: v_cmp_le_i16_e32 vcc, 0x3800, v127.l    ; encoding: [0xff,0xfe,0x66,0x7c,0x00,0x38,0x00,0x00]
+# W32-FAKE16: v_cmp_le_i16_e32 vcc_lo, 0x3800, v127   ; encoding: [0xff,0xfe,0x66,0x7c,0x00,0x38,0x00,0x00]
+# W64-FAKE16: v_cmp_le_i16_e32 vcc, 0x3800, v127      ; encoding: [0xff,0xfe,0x66,0x7c,0x00,0x38,0x00,0x00]
+
+0xfd,0x04,0x67,0x7c
+# W32-REAL16: v_cmp_le_i16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x67,0x7c]
+# W64-REAL16: v_cmp_le_i16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x67,0x7c]
+# W32-FAKE16: v_cmp_le_i16_e32 vcc_lo, src_scc, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xfd,0x04,0x67,0x7c]
+# W64-FAKE16: v_cmp_le_i16_e32 vcc, src_scc, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xfd,0x04,0x67,0x7c]
+
+0xff,0xfe,0x67,0x7c,0x0b,0xfe,0x00,0x00
+# W32-REAL16: v_cmp_le_i16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x67,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-REAL16: v_cmp_le_i16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x67,0x7c,0x0b,0xfe,0x00,0x00]
+# W32-FAKE16: v_cmp_le_i16_e32 vcc_lo, 0xfe0b, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xff,0xfe,0x67,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-FAKE16: v_cmp_le_i16_e32 vcc, 0xfe0b, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xff,0xfe,0x67,0x7c,0x0b,0xfe,0x00,0x00]
 
 0x01,0x05,0x86,0x7c
 # W32: v_cmp_le_i32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x86,0x7c]
@@ -2405,64 +2825,124 @@
 # W64: v_cmp_le_i64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xa7,0x7c,0x56,0x34,0x12,0xaf]
 
 0x01,0x05,0x76,0x7c
-# W32: v_cmp_le_u16_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x76,0x7c]
-# W64: v_cmp_le_u16_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x76,0x7c]
+# W32-REAL16: v_cmp_le_u16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x76,0x7c]
+# W64-REAL16: v_cmp_le_u16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x76,0x7c]
+# W32-FAKE16: v_cmp_le_u16_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x76,0x7c]
+# W64-FAKE16: v_cmp_le_u16_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x76,0x7c]
 
 0x7f,0x05,0x76,0x7c
-# W32: v_cmp_le_u16_e32 vcc_lo, v127, v2       ; encoding: [0x7f,0x05,0x76,0x7c]
-# W64: v_cmp_le_u16_e32 vcc, v127, v2          ; encoding: [0x7f,0x05,0x76,0x7c]
+# W32-REAL16: v_cmp_le_u16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x76,0x7c]
+# W64-REAL16: v_cmp_le_u16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x76,0x7c]
+# W32-FAKE16: v_cmp_le_u16_e32 vcc_lo, v127, v2       ; encoding: [0x7f,0x05,0x76,0x7c]
+# W64-FAKE16: v_cmp_le_u16_e32 vcc, v127, v2          ; encoding: [0x7f,0x05,0x76,0x7c]
 
 0x01,0x04,0x76,0x7c
-# W32: v_cmp_le_u16_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x76,0x7c]
-# W64: v_cmp_le_u16_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x76,0x7c]
+# W32-REAL16: v_cmp_le_u16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x76,0x7c]
+# W64-REAL16: v_cmp_le_u16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x76,0x7c]
+# W32-FAKE16: v_cmp_le_u16_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x76,0x7c]
+# W64-FAKE16: v_cmp_le_u16_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x76,0x7c]
 
 0x69,0x04,0x76,0x7c
-# W32: v_cmp_le_u16_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x76,0x7c]
-# W64: v_cmp_le_u16_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x76,0x7c]
+# W32-REAL16: v_cmp_le_u16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x76,0x7c]
+# W64-REAL16: v_cmp_le_u16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x76,0x7c]
+# W32-FAKE16: v_cmp_le_u16_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x76,0x7c]
+# W64-FAKE16: v_cmp_le_u16_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x76,0x7c]
 
 0x6a,0x04,0x76,0x7c
-# W32: v_cmp_le_u16_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x76,0x7c]
-# W64: v_cmp_le_u16_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x76,0x7c]
+# W32-REAL16: v_cmp_le_u16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x76,0x7c]
+# W64-REAL16: v_cmp_le_u16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x76,0x7c]
+# W32-FAKE16: v_cmp_le_u16_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x76,0x7c]
+# W64-FAKE16: v_cmp_le_u16_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x76,0x7c]
 
 0x6b,0x04,0x76,0x7c
-# W32: v_cmp_le_u16_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x76,0x7c]
-# W64: v_cmp_le_u16_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x76,0x7c]
+# W32-REAL16: v_cmp_le_u16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x76,0x7c]
+# W64-REAL16: v_cmp_le_u16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x76,0x7c]
+# W32-FAKE16: v_cmp_le_u16_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x76,0x7c]
+# W64-FAKE16: v_cmp_le_u16_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x76,0x7c]
 
 0x7b,0x04,0x76,0x7c
-# W32: v_cmp_le_u16_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x76,0x7c]
-# W64: v_cmp_le_u16_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x76,0x7c]
+# W32-REAL16: v_cmp_le_u16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x76,0x7c]
+# W64-REAL16: v_cmp_le_u16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x76,0x7c]
+# W32-FAKE16: v_cmp_le_u16_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x76,0x7c]
+# W64-FAKE16: v_cmp_le_u16_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x76,0x7c]
 
 0x7d,0x04,0x76,0x7c
-# W32: v_cmp_le_u16_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x76,0x7c]
-# W64: v_cmp_le_u16_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x76,0x7c]
+# W32-REAL16: v_cmp_le_u16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x76,0x7c]
+# W64-REAL16: v_cmp_le_u16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x76,0x7c]
+# W32-FAKE16: v_cmp_le_u16_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x76,0x7c]
+# W64-FAKE16: v_cmp_le_u16_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x76,0x7c]
 
 0x7e,0x04,0x76,0x7c
-# W32: v_cmp_le_u16_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x76,0x7c]
-# W64: v_cmp_le_u16_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x76,0x7c]
+# W32-REAL16: v_cmp_le_u16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x76,0x7c]
+# W64-REAL16: v_cmp_le_u16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x76,0x7c]
+# W32-FAKE16: v_cmp_le_u16_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x76,0x7c]
+# W64-FAKE16: v_cmp_le_u16_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x76,0x7c]
 
 0x7f,0x04,0x76,0x7c
-# W32: v_cmp_le_u16_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x76,0x7c]
-# W64: v_cmp_le_u16_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x76,0x7c]
+# W32-REAL16: v_cmp_le_u16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x76,0x7c]
+# W64-REAL16: v_cmp_le_u16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x76,0x7c]
+# W32-FAKE16: v_cmp_le_u16_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x76,0x7c]
+# W64-FAKE16: v_cmp_le_u16_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x76,0x7c]
 
 0x7c,0x04,0x76,0x7c
-# W32: v_cmp_le_u16_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x76,0x7c]
-# W64: v_cmp_le_u16_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x76,0x7c]
+# W32-REAL16: v_cmp_le_u16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x76,0x7c]
+# W64-REAL16: v_cmp_le_u16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x76,0x7c]
+# W32-FAKE16: v_cmp_le_u16_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x76,0x7c]
+# W64-FAKE16: v_cmp_le_u16_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x76,0x7c]
 
 0xc1,0x04,0x76,0x7c
-# W32: v_cmp_le_u16_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x76,0x7c]
-# W64: v_cmp_le_u16_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x76,0x7c]
+# W32-REAL16: v_cmp_le_u16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x76,0x7c]
+# W64-REAL16: v_cmp_le_u16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x76,0x7c]
+# W32-FAKE16: v_cmp_le_u16_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x76,0x7c]
+# W64-FAKE16: v_cmp_le_u16_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x76,0x7c]
 
 0xf0,0x04,0x76,0x7c
-# W32: v_cmp_le_u16_e32 vcc_lo, 0x3800, v2     ; encoding: [0xff,0x04,0x76,0x7c,0x00,0x38,0x00,0x00]
-# W64: v_cmp_le_u16_e32 vcc, 0x3800, v2        ; encoding: [0xff,0x04,0x76,0x7c,0x00,0x38,0x00,0x00]
+# W32-REAL16: v_cmp_le_u16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x76,0x7c,0x00,0x38,0x00,0x00]
+# W64-REAL16: v_cmp_le_u16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x76,0x7c,0x00,0x38,0x00,0x00]
+# W32-FAKE16: v_cmp_le_u16_e32 vcc_lo, 0x3800, v2     ; encoding: [0xff,0x04,0x76,0x7c,0x00,0x38,0x00,0x00]
+# W64-FAKE16: v_cmp_le_u16_e32 vcc, 0x3800, v2        ; encoding: [0xff,0x04,0x76,0x7c,0x00,0x38,0x00,0x00]
 
 0xfd,0x04,0x76,0x7c
-# W32: v_cmp_le_u16_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x76,0x7c]
-# W64: v_cmp_le_u16_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x76,0x7c]
+# W32-REAL16: v_cmp_le_u16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x76,0x7c]
+# W64-REAL16: v_cmp_le_u16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x76,0x7c]
+# W32-FAKE16: v_cmp_le_u16_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x76,0x7c]
+# W64-FAKE16: v_cmp_le_u16_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x76,0x7c]
 
 0xff,0xfe,0x76,0x7c,0x0b,0xfe,0x00,0x00
-# W32: v_cmp_le_u16_e32 vcc_lo, 0xfe0b, v127   ; encoding: [0xff,0xfe,0x76,0x7c,0x0b,0xfe,0x00,0x00]
-# W64: v_cmp_le_u16_e32 vcc, 0xfe0b, v127      ; encoding: [0xff,0xfe,0x76,0x7c,0x0b,0xfe,0x00,0x00]
+# W32-REAL16: v_cmp_le_u16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x76,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-REAL16: v_cmp_le_u16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x76,0x7c,0x0b,0xfe,0x00,0x00]
+# W32-FAKE16: v_cmp_le_u16_e32 vcc_lo, 0xfe0b, v127   ; encoding: [0xff,0xfe,0x76,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-FAKE16: v_cmp_le_u16_e32 vcc, 0xfe0b, v127      ; encoding: [0xff,0xfe,0x76,0x7c,0x0b,0xfe,0x00,0x00]
+
+0x81,0x05,0x76,0x7c
+# W32-REAL16: v_cmp_le_u16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x76,0x7c]
+# W64-REAL16: v_cmp_le_u16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x76,0x7c]
+# W32-FAKE16: v_cmp_le_u16_e32 vcc_lo, v129/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0x81,0x05,0x76,0x7c]
+# W64-FAKE16: v_cmp_le_u16_e32 vcc, v129/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0x81,0x05,0x76,0x7c]
+
+0xff,0x05,0x76,0x7c
+# W32-REAL16: v_cmp_le_u16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x76,0x7c]
+# W64-REAL16: v_cmp_le_u16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x76,0x7c]
+# W32-FAKE16: v_cmp_le_u16_e32 vcc_lo, v255/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0xff,0x05,0x76,0x7c]
+# W64-FAKE16: v_cmp_le_u16_e32 vcc, v255/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0xff,0x05,0x76,0x7c]
+
+0xf0,0xfe,0x76,0x7c
+# W32-REAL16: v_cmp_le_u16_e32 vcc_lo, 0x3800, v127.l ; encoding: [0xff,0xfe,0x76,0x7c,0x00,0x38,0x00,0x00]
+# W64-REAL16: v_cmp_le_u16_e32 vcc, 0x3800, v127.l    ; encoding: [0xff,0xfe,0x76,0x7c,0x00,0x38,0x00,0x00]
+# W32-FAKE16: v_cmp_le_u16_e32 vcc_lo, 0x3800, v127   ; encoding: [0xff,0xfe,0x76,0x7c,0x00,0x38,0x00,0x00]
+# W64-FAKE16: v_cmp_le_u16_e32 vcc, 0x3800, v127      ; encoding: [0xff,0xfe,0x76,0x7c,0x00,0x38,0x00,0x00]
+
+0xfd,0x04,0x77,0x7c
+# W32-REAL16: v_cmp_le_u16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x77,0x7c]
+# W64-REAL16: v_cmp_le_u16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x77,0x7c]
+# W32-FAKE16: v_cmp_le_u16_e32 vcc_lo, src_scc, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xfd,0x04,0x77,0x7c]
+# W64-FAKE16: v_cmp_le_u16_e32 vcc, src_scc, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xfd,0x04,0x77,0x7c]
+
+0xff,0xfe,0x77,0x7c,0x0b,0xfe,0x00,0x00
+# W32-REAL16: v_cmp_le_u16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x77,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-REAL16: v_cmp_le_u16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x77,0x7c,0x0b,0xfe,0x00,0x00]
+# W32-FAKE16: v_cmp_le_u16_e32 vcc_lo, 0xfe0b, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xff,0xfe,0x77,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-FAKE16: v_cmp_le_u16_e32 vcc, 0xfe0b, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xff,0xfe,0x77,0x7c,0x0b,0xfe,0x00,0x00]
 
 0x01,0x05,0x96,0x7c
 # W32: v_cmp_le_u32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x96,0x7c]
@@ -2989,64 +3469,124 @@
 # W64: v_cmp_lt_f64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x43,0x7c,0x56,0x34,0x12,0xaf]
 
 0x01,0x05,0x62,0x7c
-# W32: v_cmp_lt_i16_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x62,0x7c]
-# W64: v_cmp_lt_i16_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x62,0x7c]
+# W32-REAL16: v_cmp_lt_i16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x62,0x7c]
+# W64-REAL16: v_cmp_lt_i16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x62,0x7c]
+# W32-FAKE16: v_cmp_lt_i16_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x62,0x7c]
+# W64-FAKE16: v_cmp_lt_i16_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x62,0x7c]
 
 0x7f,0x05,0x62,0x7c
-# W32: v_cmp_lt_i16_e32 vcc_lo, v127, v2       ; encoding: [0x7f,0x05,0x62,0x7c]
-# W64: v_cmp_lt_i16_e32 vcc, v127, v2          ; encoding: [0x7f,0x05,0x62,0x7c]
+# W32-REAL16: v_cmp_lt_i16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x62,0x7c]
+# W64-REAL16: v_cmp_lt_i16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x62,0x7c]
+# W32-FAKE16: v_cmp_lt_i16_e32 vcc_lo, v127, v2       ; encoding: [0x7f,0x05,0x62,0x7c]
+# W64-FAKE16: v_cmp_lt_i16_e32 vcc, v127, v2          ; encoding: [0x7f,0x05,0x62,0x7c]
 
 0x01,0x04,0x62,0x7c
-# W32: v_cmp_lt_i16_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x62,0x7c]
-# W64: v_cmp_lt_i16_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x62,0x7c]
+# W32-REAL16: v_cmp_lt_i16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x62,0x7c]
+# W64-REAL16: v_cmp_lt_i16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x62,0x7c]
+# W32-FAKE16: v_cmp_lt_i16_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x62,0x7c]
+# W64-FAKE16: v_cmp_lt_i16_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x62,0x7c]
 
 0x69,0x04,0x62,0x7c
-# W32: v_cmp_lt_i16_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x62,0x7c]
-# W64: v_cmp_lt_i16_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x62,0x7c]
+# W32-REAL16: v_cmp_lt_i16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x62,0x7c]
+# W64-REAL16: v_cmp_lt_i16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x62,0x7c]
+# W32-FAKE16: v_cmp_lt_i16_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x62,0x7c]
+# W64-FAKE16: v_cmp_lt_i16_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x62,0x7c]
 
 0x6a,0x04,0x62,0x7c
-# W32: v_cmp_lt_i16_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x62,0x7c]
-# W64: v_cmp_lt_i16_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x62,0x7c]
+# W32-REAL16: v_cmp_lt_i16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x62,0x7c]
+# W64-REAL16: v_cmp_lt_i16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x62,0x7c]
+# W32-FAKE16: v_cmp_lt_i16_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x62,0x7c]
+# W64-FAKE16: v_cmp_lt_i16_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x62,0x7c]
 
 0x6b,0x04,0x62,0x7c
-# W32: v_cmp_lt_i16_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x62,0x7c]
-# W64: v_cmp_lt_i16_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x62,0x7c]
+# W32-REAL16: v_cmp_lt_i16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x62,0x7c]
+# W64-REAL16: v_cmp_lt_i16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x62,0x7c]
+# W32-FAKE16: v_cmp_lt_i16_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x62,0x7c]
+# W64-FAKE16: v_cmp_lt_i16_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x62,0x7c]
 
 0x7b,0x04,0x62,0x7c
-# W32: v_cmp_lt_i16_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x62,0x7c]
-# W64: v_cmp_lt_i16_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x62,0x7c]
+# W32-REAL16: v_cmp_lt_i16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x62,0x7c]
+# W64-REAL16: v_cmp_lt_i16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x62,0x7c]
+# W32-FAKE16: v_cmp_lt_i16_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x62,0x7c]
+# W64-FAKE16: v_cmp_lt_i16_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x62,0x7c]
 
 0x7d,0x04,0x62,0x7c
-# W32: v_cmp_lt_i16_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x62,0x7c]
-# W64: v_cmp_lt_i16_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x62,0x7c]
+# W32-REAL16: v_cmp_lt_i16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x62,0x7c]
+# W64-REAL16: v_cmp_lt_i16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x62,0x7c]
+# W32-FAKE16: v_cmp_lt_i16_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x62,0x7c]
+# W64-FAKE16: v_cmp_lt_i16_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x62,0x7c]
 
 0x7e,0x04,0x62,0x7c
-# W32: v_cmp_lt_i16_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x62,0x7c]
-# W64: v_cmp_lt_i16_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x62,0x7c]
+# W32-REAL16: v_cmp_lt_i16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x62,0x7c]
+# W64-REAL16: v_cmp_lt_i16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x62,0x7c]
+# W32-FAKE16: v_cmp_lt_i16_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x62,0x7c]
+# W64-FAKE16: v_cmp_lt_i16_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x62,0x7c]
 
 0x7f,0x04,0x62,0x7c
-# W32: v_cmp_lt_i16_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x62,0x7c]
-# W64: v_cmp_lt_i16_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x62,0x7c]
+# W32-REAL16: v_cmp_lt_i16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x62,0x7c]
+# W64-REAL16: v_cmp_lt_i16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x62,0x7c]
+# W32-FAKE16: v_cmp_lt_i16_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x62,0x7c]
+# W64-FAKE16: v_cmp_lt_i16_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x62,0x7c]
 
 0x7c,0x04,0x62,0x7c
-# W32: v_cmp_lt_i16_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x62,0x7c]
-# W64: v_cmp_lt_i16_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x62,0x7c]
+# W32-REAL16: v_cmp_lt_i16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x62,0x7c]
+# W64-REAL16: v_cmp_lt_i16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x62,0x7c]
+# W32-FAKE16: v_cmp_lt_i16_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x62,0x7c]
+# W64-FAKE16: v_cmp_lt_i16_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x62,0x7c]
 
 0xc1,0x04,0x62,0x7c
-# W32: v_cmp_lt_i16_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x62,0x7c]
-# W64: v_cmp_lt_i16_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x62,0x7c]
+# W32-REAL16: v_cmp_lt_i16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x62,0x7c]
+# W64-REAL16: v_cmp_lt_i16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x62,0x7c]
+# W32-FAKE16: v_cmp_lt_i16_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x62,0x7c]
+# W64-FAKE16: v_cmp_lt_i16_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x62,0x7c]
 
 0xf0,0x04,0x62,0x7c
-# W32: v_cmp_lt_i16_e32 vcc_lo, 0x3800, v2     ; encoding: [0xff,0x04,0x62,0x7c,0x00,0x38,0x00,0x00]
-# W64: v_cmp_lt_i16_e32 vcc, 0x3800, v2        ; encoding: [0xff,0x04,0x62,0x7c,0x00,0x38,0x00,0x00]
+# W32-REAL16: v_cmp_lt_i16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x62,0x7c,0x00,0x38,0x00,0x00]
+# W64-REAL16: v_cmp_lt_i16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x62,0x7c,0x00,0x38,0x00,0x00]
+# W32-FAKE16: v_cmp_lt_i16_e32 vcc_lo, 0x3800, v2     ; encoding: [0xff,0x04,0x62,0x7c,0x00,0x38,0x00,0x00]
+# W64-FAKE16: v_cmp_lt_i16_e32 vcc, 0x3800, v2        ; encoding: [0xff,0x04,0x62,0x7c,0x00,0x38,0x00,0x00]
 
 0xfd,0x04,0x62,0x7c
-# W32: v_cmp_lt_i16_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x62,0x7c]
-# W64: v_cmp_lt_i16_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x62,0x7c]
+# W32-REAL16: v_cmp_lt_i16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x62,0x7c]
+# W64-REAL16: v_cmp_lt_i16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x62,0x7c]
+# W32-FAKE16: v_cmp_lt_i16_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x62,0x7c]
+# W64-FAKE16: v_cmp_lt_i16_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x62,0x7c]
 
 0xff,0xfe,0x62,0x7c,0x0b,0xfe,0x00,0x00
-# W32: v_cmp_lt_i16_e32 vcc_lo, 0xfe0b, v127   ; encoding: [0xff,0xfe,0x62,0x7c,0x0b,0xfe,0x00,0x00]
-# W64: v_cmp_lt_i16_e32 vcc, 0xfe0b, v127      ; encoding: [0xff,0xfe,0x62,0x7c,0x0b,0xfe,0x00,0x00]
+# W32-REAL16: v_cmp_lt_i16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x62,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-REAL16: v_cmp_lt_i16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x62,0x7c,0x0b,0xfe,0x00,0x00]
+# W32-FAKE16: v_cmp_lt_i16_e32 vcc_lo, 0xfe0b, v127   ; encoding: [0xff,0xfe,0x62,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-FAKE16: v_cmp_lt_i16_e32 vcc, 0xfe0b, v127      ; encoding: [0xff,0xfe,0x62,0x7c,0x0b,0xfe,0x00,0x00]
+
+0x81,0x05,0x62,0x7c
+# W32-REAL16: v_cmp_lt_i16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x62,0x7c]
+# W64-REAL16: v_cmp_lt_i16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x62,0x7c]
+# W32-FAKE16: v_cmp_lt_i16_e32 vcc_lo, v129/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0x81,0x05,0x62,0x7c]
+# W64-FAKE16: v_cmp_lt_i16_e32 vcc, v129/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0x81,0x05,0x62,0x7c]
+
+0xff,0x05,0x62,0x7c
+# W32-REAL16: v_cmp_lt_i16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x62,0x7c]
+# W64-REAL16: v_cmp_lt_i16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x62,0x7c]
+# W32-FAKE16: v_cmp_lt_i16_e32 vcc_lo, v255/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0xff,0x05,0x62,0x7c]
+# W64-FAKE16: v_cmp_lt_i16_e32 vcc, v255/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0xff,0x05,0x62,0x7c]
+
+0xf0,0xfe,0x62,0x7c
+# W32-REAL16: v_cmp_lt_i16_e32 vcc_lo, 0x3800, v127.l ; encoding: [0xff,0xfe,0x62,0x7c,0x00,0x38,0x00,0x00]
+# W64-REAL16: v_cmp_lt_i16_e32 vcc, 0x3800, v127.l    ; encoding: [0xff,0xfe,0x62,0x7c,0x00,0x38,0x00,0x00]
+# W32-FAKE16: v_cmp_lt_i16_e32 vcc_lo, 0x3800, v127   ; encoding: [0xff,0xfe,0x62,0x7c,0x00,0x38,0x00,0x00]
+# W64-FAKE16: v_cmp_lt_i16_e32 vcc, 0x3800, v127      ; encoding: [0xff,0xfe,0x62,0x7c,0x00,0x38,0x00,0x00]
+
+0xfd,0x04,0x63,0x7c
+# W32-REAL16: v_cmp_lt_i16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x63,0x7c]
+# W64-REAL16: v_cmp_lt_i16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x63,0x7c]
+# W32-FAKE16: v_cmp_lt_i16_e32 vcc_lo, src_scc, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xfd,0x04,0x63,0x7c]
+# W64-FAKE16: v_cmp_lt_i16_e32 vcc, src_scc, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xfd,0x04,0x63,0x7c]
+
+0xff,0xfe,0x63,0x7c,0x0b,0xfe,0x00,0x00
+# W32-REAL16: v_cmp_lt_i16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x63,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-REAL16: v_cmp_lt_i16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x63,0x7c,0x0b,0xfe,0x00,0x00]
+# W32-FAKE16: v_cmp_lt_i16_e32 vcc_lo, 0xfe0b, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xff,0xfe,0x63,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-FAKE16: v_cmp_lt_i16_e32 vcc, 0xfe0b, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xff,0xfe,0x63,0x7c,0x0b,0xfe,0x00,0x00]
 
 0x01,0x05,0x82,0x7c
 # W32: v_cmp_lt_i32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x82,0x7c]
@@ -3157,64 +3697,124 @@
 # W64: v_cmp_lt_i64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xa3,0x7c,0x56,0x34,0x12,0xaf]
 
 0x01,0x05,0x72,0x7c
-# W32: v_cmp_lt_u16_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x72,0x7c]
-# W64: v_cmp_lt_u16_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x72,0x7c]
+# W32-REAL16: v_cmp_lt_u16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x72,0x7c]
+# W64-REAL16: v_cmp_lt_u16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x72,0x7c]
+# W32-FAKE16: v_cmp_lt_u16_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x72,0x7c]
+# W64-FAKE16: v_cmp_lt_u16_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x72,0x7c]
 
 0x7f,0x05,0x72,0x7c
-# W32: v_cmp_lt_u16_e32 vcc_lo, v127, v2       ; encoding: [0x7f,0x05,0x72,0x7c]
-# W64: v_cmp_lt_u16_e32 vcc, v127, v2          ; encoding: [0x7f,0x05,0x72,0x7c]
+# W32-REAL16: v_cmp_lt_u16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x72,0x7c]
+# W64-REAL16: v_cmp_lt_u16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x72,0x7c]
+# W32-FAKE16: v_cmp_lt_u16_e32 vcc_lo, v127, v2       ; encoding: [0x7f,0x05,0x72,0x7c]
+# W64-FAKE16: v_cmp_lt_u16_e32 vcc, v127, v2          ; encoding: [0x7f,0x05,0x72,0x7c]
 
 0x01,0x04,0x72,0x7c
-# W32: v_cmp_lt_u16_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x72,0x7c]
-# W64: v_cmp_lt_u16_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x72,0x7c]
+# W32-REAL16: v_cmp_lt_u16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x72,0x7c]
+# W64-REAL16: v_cmp_lt_u16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x72,0x7c]
+# W32-FAKE16: v_cmp_lt_u16_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x72,0x7c]
+# W64-FAKE16: v_cmp_lt_u16_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x72,0x7c]
 
 0x69,0x04,0x72,0x7c
-# W32: v_cmp_lt_u16_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x72,0x7c]
-# W64: v_cmp_lt_u16_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x72,0x7c]
+# W32-REAL16: v_cmp_lt_u16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x72,0x7c]
+# W64-REAL16: v_cmp_lt_u16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x72,0x7c]
+# W32-FAKE16: v_cmp_lt_u16_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x72,0x7c]
+# W64-FAKE16: v_cmp_lt_u16_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x72,0x7c]
 
 0x6a,0x04,0x72,0x7c
-# W32: v_cmp_lt_u16_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x72,0x7c]
-# W64: v_cmp_lt_u16_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x72,0x7c]
+# W32-REAL16: v_cmp_lt_u16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x72,0x7c]
+# W64-REAL16: v_cmp_lt_u16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x72,0x7c]
+# W32-FAKE16: v_cmp_lt_u16_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x72,0x7c]
+# W64-FAKE16: v_cmp_lt_u16_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x72,0x7c]
 
 0x6b,0x04,0x72,0x7c
-# W32: v_cmp_lt_u16_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x72,0x7c]
-# W64: v_cmp_lt_u16_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x72,0x7c]
+# W32-REAL16: v_cmp_lt_u16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x72,0x7c]
+# W64-REAL16: v_cmp_lt_u16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x72,0x7c]
+# W32-FAKE16: v_cmp_lt_u16_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x72,0x7c]
+# W64-FAKE16: v_cmp_lt_u16_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x72,0x7c]
 
 0x7b,0x04,0x72,0x7c
-# W32: v_cmp_lt_u16_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x72,0x7c]
-# W64: v_cmp_lt_u16_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x72,0x7c]
+# W32-REAL16: v_cmp_lt_u16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x72,0x7c]
+# W64-REAL16: v_cmp_lt_u16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x72,0x7c]
+# W32-FAKE16: v_cmp_lt_u16_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x72,0x7c]
+# W64-FAKE16: v_cmp_lt_u16_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x72,0x7c]
 
 0x7d,0x04,0x72,0x7c
-# W32: v_cmp_lt_u16_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x72,0x7c]
-# W64: v_cmp_lt_u16_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x72,0x7c]
+# W32-REAL16: v_cmp_lt_u16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x72,0x7c]
+# W64-REAL16: v_cmp_lt_u16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x72,0x7c]
+# W32-FAKE16: v_cmp_lt_u16_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x72,0x7c]
+# W64-FAKE16: v_cmp_lt_u16_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x72,0x7c]
 
 0x7e,0x04,0x72,0x7c
-# W32: v_cmp_lt_u16_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x72,0x7c]
-# W64: v_cmp_lt_u16_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x72,0x7c]
+# W32-REAL16: v_cmp_lt_u16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x72,0x7c]
+# W64-REAL16: v_cmp_lt_u16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x72,0x7c]
+# W32-FAKE16: v_cmp_lt_u16_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x72,0x7c]
+# W64-FAKE16: v_cmp_lt_u16_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x72,0x7c]
 
 0x7f,0x04,0x72,0x7c
-# W32: v_cmp_lt_u16_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x72,0x7c]
-# W64: v_cmp_lt_u16_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x72,0x7c]
+# W32-REAL16: v_cmp_lt_u16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x72,0x7c]
+# W64-REAL16: v_cmp_lt_u16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x72,0x7c]
+# W32-FAKE16: v_cmp_lt_u16_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x72,0x7c]
+# W64-FAKE16: v_cmp_lt_u16_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x72,0x7c]
 
 0x7c,0x04,0x72,0x7c
-# W32: v_cmp_lt_u16_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x72,0x7c]
-# W64: v_cmp_lt_u16_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x72,0x7c]
+# W32-REAL16: v_cmp_lt_u16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x72,0x7c]
+# W64-REAL16: v_cmp_lt_u16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x72,0x7c]
+# W32-FAKE16: v_cmp_lt_u16_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x72,0x7c]
+# W64-FAKE16: v_cmp_lt_u16_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x72,0x7c]
 
 0xc1,0x04,0x72,0x7c
-# W32: v_cmp_lt_u16_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x72,0x7c]
-# W64: v_cmp_lt_u16_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x72,0x7c]
+# W32-REAL16: v_cmp_lt_u16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x72,0x7c]
+# W64-REAL16: v_cmp_lt_u16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x72,0x7c]
+# W32-FAKE16: v_cmp_lt_u16_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x72,0x7c]
+# W64-FAKE16: v_cmp_lt_u16_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x72,0x7c]
 
 0xf0,0x04,0x72,0x7c
-# W32: v_cmp_lt_u16_e32 vcc_lo, 0x3800, v2     ; encoding: [0xff,0x04,0x72,0x7c,0x00,0x38,0x00,0x00]
-# W64: v_cmp_lt_u16_e32 vcc, 0x3800, v2        ; encoding: [0xff,0x04,0x72,0x7c,0x00,0x38,0x00,0x00]
+# W32-REAL16: v_cmp_lt_u16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x72,0x7c,0x00,0x38,0x00,0x00]
+# W64-REAL16: v_cmp_lt_u16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x72,0x7c,0x00,0x38,0x00,0x00]
+# W32-FAKE16: v_cmp_lt_u16_e32 vcc_lo, 0x3800, v2     ; encoding: [0xff,0x04,0x72,0x7c,0x00,0x38,0x00,0x00]
+# W64-FAKE16: v_cmp_lt_u16_e32 vcc, 0x3800, v2        ; encoding: [0xff,0x04,0x72,0x7c,0x00,0x38,0x00,0x00]
 
 0xfd,0x04,0x72,0x7c
-# W32: v_cmp_lt_u16_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x72,0x7c]
-# W64: v_cmp_lt_u16_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x72,0x7c]
+# W32-REAL16: v_cmp_lt_u16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x72,0x7c]
+# W64-REAL16: v_cmp_lt_u16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x72,0x7c]
+# W32-FAKE16: v_cmp_lt_u16_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x72,0x7c]
+# W64-FAKE16: v_cmp_lt_u16_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x72,0x7c]
 
 0xff,0xfe,0x72,0x7c,0x0b,0xfe,0x00,0x00
-# W32: v_cmp_lt_u16_e32 vcc_lo, 0xfe0b, v127   ; encoding: [0xff,0xfe,0x72,0x7c,0x0b,0xfe,0x00,0x00]
-# W64: v_cmp_lt_u16_e32 vcc, 0xfe0b, v127      ; encoding: [0xff,0xfe,0x72,0x7c,0x0b,0xfe,0x00,0x00]
+# W32-REAL16: v_cmp_lt_u16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x72,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-REAL16: v_cmp_lt_u16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x72,0x7c,0x0b,0xfe,0x00,0x00]
+# W32-FAKE16: v_cmp_lt_u16_e32 vcc_lo, 0xfe0b, v127   ; encoding: [0xff,0xfe,0x72,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-FAKE16: v_cmp_lt_u16_e32 vcc, 0xfe0b, v127      ; encoding: [0xff,0xfe,0x72,0x7c,0x0b,0xfe,0x00,0x00]
+
+0x81,0x05,0x72,0x7c
+# W32-REAL16: v_cmp_lt_u16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x72,0x7c]
+# W64-REAL16: v_cmp_lt_u16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x72,0x7c]
+# W32-FAKE16: v_cmp_lt_u16_e32 vcc_lo, v129/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0x81,0x05,0x72,0x7c]
+# W64-FAKE16: v_cmp_lt_u16_e32 vcc, v129/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0x81,0x05,0x72,0x7c]
+
+0xff,0x05,0x72,0x7c
+# W32-REAL16: v_cmp_lt_u16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x72,0x7c]
+# W64-REAL16: v_cmp_lt_u16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x72,0x7c]
+# W32-FAKE16: v_cmp_lt_u16_e32 vcc_lo, v255/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0xff,0x05,0x72,0x7c]
+# W64-FAKE16: v_cmp_lt_u16_e32 vcc, v255/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0xff,0x05,0x72,0x7c]
+
+0xf0,0xfe,0x72,0x7c
+# W32-REAL16: v_cmp_lt_u16_e32 vcc_lo, 0x3800, v127.l ; encoding: [0xff,0xfe,0x72,0x7c,0x00,0x38,0x00,0x00]
+# W64-REAL16: v_cmp_lt_u16_e32 vcc, 0x3800, v127.l    ; encoding: [0xff,0xfe,0x72,0x7c,0x00,0x38,0x00,0x00]
+# W32-FAKE16: v_cmp_lt_u16_e32 vcc_lo, 0x3800, v127   ; encoding: [0xff,0xfe,0x72,0x7c,0x00,0x38,0x00,0x00]
+# W64-FAKE16: v_cmp_lt_u16_e32 vcc, 0x3800, v127      ; encoding: [0xff,0xfe,0x72,0x7c,0x00,0x38,0x00,0x00]
+
+0xfd,0x04,0x73,0x7c
+# W32-REAL16: v_cmp_lt_u16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x73,0x7c]
+# W64-REAL16: v_cmp_lt_u16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x73,0x7c]
+# W32-FAKE16: v_cmp_lt_u16_e32 vcc_lo, src_scc, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xfd,0x04,0x73,0x7c]
+# W64-FAKE16: v_cmp_lt_u16_e32 vcc, src_scc, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xfd,0x04,0x73,0x7c]
+
+0xff,0xfe,0x73,0x7c,0x0b,0xfe,0x00,0x00
+# W32-REAL16: v_cmp_lt_u16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x73,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-REAL16: v_cmp_lt_u16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x73,0x7c,0x0b,0xfe,0x00,0x00]
+# W32-FAKE16: v_cmp_lt_u16_e32 vcc_lo, 0xfe0b, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xff,0xfe,0x73,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-FAKE16: v_cmp_lt_u16_e32 vcc, 0xfe0b, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xff,0xfe,0x73,0x7c,0x0b,0xfe,0x00,0x00]
 
 0x01,0x05,0x92,0x7c
 # W32: v_cmp_lt_u32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x92,0x7c]
@@ -3325,64 +3925,124 @@
 # W64: v_cmp_lt_u64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xb3,0x7c,0x56,0x34,0x12,0xaf]
 
 0x01,0x05,0x6a,0x7c
-# W32: v_cmp_ne_i16_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x6a,0x7c]
-# W64: v_cmp_ne_i16_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x6a,0x7c]
+# W32-REAL16: v_cmp_ne_i16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x6a,0x7c]
+# W64-REAL16: v_cmp_ne_i16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x6a,0x7c]
+# W32-FAKE16: v_cmp_ne_i16_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x6a,0x7c]
+# W64-FAKE16: v_cmp_ne_i16_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x6a,0x7c]
 
 0x7f,0x05,0x6a,0x7c
-# W32: v_cmp_ne_i16_e32 vcc_lo, v127, v2       ; encoding: [0x7f,0x05,0x6a,0x7c]
-# W64: v_cmp_ne_i16_e32 vcc, v127, v2          ; encoding: [0x7f,0x05,0x6a,0x7c]
+# W32-REAL16: v_cmp_ne_i16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x6a,0x7c]
+# W64-REAL16: v_cmp_ne_i16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x6a,0x7c]
+# W32-FAKE16: v_cmp_ne_i16_e32 vcc_lo, v127, v2       ; encoding: [0x7f,0x05,0x6a,0x7c]
+# W64-FAKE16: v_cmp_ne_i16_e32 vcc, v127, v2          ; encoding: [0x7f,0x05,0x6a,0x7c]
 
 0x01,0x04,0x6a,0x7c
-# W32: v_cmp_ne_i16_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x6a,0x7c]
-# W64: v_cmp_ne_i16_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x6a,0x7c]
+# W32-REAL16: v_cmp_ne_i16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x6a,0x7c]
+# W64-REAL16: v_cmp_ne_i16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x6a,0x7c]
+# W32-FAKE16: v_cmp_ne_i16_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x6a,0x7c]
+# W64-FAKE16: v_cmp_ne_i16_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x6a,0x7c]
 
 0x69,0x04,0x6a,0x7c
-# W32: v_cmp_ne_i16_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x6a,0x7c]
-# W64: v_cmp_ne_i16_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x6a,0x7c]
+# W32-REAL16: v_cmp_ne_i16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x6a,0x7c]
+# W64-REAL16: v_cmp_ne_i16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x6a,0x7c]
+# W32-FAKE16: v_cmp_ne_i16_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x6a,0x7c]
+# W64-FAKE16: v_cmp_ne_i16_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x6a,0x7c]
 
 0x6a,0x04,0x6a,0x7c
-# W32: v_cmp_ne_i16_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x6a,0x7c]
-# W64: v_cmp_ne_i16_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x6a,0x7c]
+# W32-REAL16: v_cmp_ne_i16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x6a,0x7c]
+# W64-REAL16: v_cmp_ne_i16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x6a,0x7c]
+# W32-FAKE16: v_cmp_ne_i16_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x6a,0x7c]
+# W64-FAKE16: v_cmp_ne_i16_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x6a,0x7c]
 
 0x6b,0x04,0x6a,0x7c
-# W32: v_cmp_ne_i16_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x6a,0x7c]
-# W64: v_cmp_ne_i16_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x6a,0x7c]
+# W32-REAL16: v_cmp_ne_i16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x6a,0x7c]
+# W64-REAL16: v_cmp_ne_i16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x6a,0x7c]
+# W32-FAKE16: v_cmp_ne_i16_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x6a,0x7c]
+# W64-FAKE16: v_cmp_ne_i16_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x6a,0x7c]
 
 0x7b,0x04,0x6a,0x7c
-# W32: v_cmp_ne_i16_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x6a,0x7c]
-# W64: v_cmp_ne_i16_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x6a,0x7c]
+# W32-REAL16: v_cmp_ne_i16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x6a,0x7c]
+# W64-REAL16: v_cmp_ne_i16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x6a,0x7c]
+# W32-FAKE16: v_cmp_ne_i16_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x6a,0x7c]
+# W64-FAKE16: v_cmp_ne_i16_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x6a,0x7c]
 
 0x7d,0x04,0x6a,0x7c
-# W32: v_cmp_ne_i16_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x6a,0x7c]
-# W64: v_cmp_ne_i16_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x6a,0x7c]
+# W32-REAL16: v_cmp_ne_i16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x6a,0x7c]
+# W64-REAL16: v_cmp_ne_i16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x6a,0x7c]
+# W32-FAKE16: v_cmp_ne_i16_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x6a,0x7c]
+# W64-FAKE16: v_cmp_ne_i16_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x6a,0x7c]
 
 0x7e,0x04,0x6a,0x7c
-# W32: v_cmp_ne_i16_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x6a,0x7c]
-# W64: v_cmp_ne_i16_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x6a,0x7c]
+# W32-REAL16: v_cmp_ne_i16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x6a,0x7c]
+# W64-REAL16: v_cmp_ne_i16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x6a,0x7c]
+# W32-FAKE16: v_cmp_ne_i16_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x6a,0x7c]
+# W64-FAKE16: v_cmp_ne_i16_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x6a,0x7c]
 
 0x7f,0x04,0x6a,0x7c
-# W32: v_cmp_ne_i16_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x6a,0x7c]
-# W64: v_cmp_ne_i16_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x6a,0x7c]
+# W32-REAL16: v_cmp_ne_i16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x6a,0x7c]
+# W64-REAL16: v_cmp_ne_i16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x6a,0x7c]
+# W32-FAKE16: v_cmp_ne_i16_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x6a,0x7c]
+# W64-FAKE16: v_cmp_ne_i16_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x6a,0x7c]
 
 0x7c,0x04,0x6a,0x7c
-# W32: v_cmp_ne_i16_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x6a,0x7c]
-# W64: v_cmp_ne_i16_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x6a,0x7c]
+# W32-REAL16: v_cmp_ne_i16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x6a,0x7c]
+# W64-REAL16: v_cmp_ne_i16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x6a,0x7c]
+# W32-FAKE16: v_cmp_ne_i16_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x6a,0x7c]
+# W64-FAKE16: v_cmp_ne_i16_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x6a,0x7c]
 
 0xc1,0x04,0x6a,0x7c
-# W32: v_cmp_ne_i16_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x6a,0x7c]
-# W64: v_cmp_ne_i16_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x6a,0x7c]
+# W32-REAL16: v_cmp_ne_i16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x6a,0x7c]
+# W64-REAL16: v_cmp_ne_i16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x6a,0x7c]
+# W32-FAKE16: v_cmp_ne_i16_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x6a,0x7c]
+# W64-FAKE16: v_cmp_ne_i16_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x6a,0x7c]
 
 0xf0,0x04,0x6a,0x7c
-# W32: v_cmp_ne_i16_e32 vcc_lo, 0x3800, v2     ; encoding: [0xff,0x04,0x6a,0x7c,0x00,0x38,0x00,0x00]
-# W64: v_cmp_ne_i16_e32 vcc, 0x3800, v2        ; encoding: [0xff,0x04,0x6a,0x7c,0x00,0x38,0x00,0x00]
+# W32-REAL16: v_cmp_ne_i16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x6a,0x7c,0x00,0x38,0x00,0x00]
+# W64-REAL16: v_cmp_ne_i16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x6a,0x7c,0x00,0x38,0x00,0x00]
+# W32-FAKE16: v_cmp_ne_i16_e32 vcc_lo, 0x3800, v2     ; encoding: [0xff,0x04,0x6a,0x7c,0x00,0x38,0x00,0x00]
+# W64-FAKE16: v_cmp_ne_i16_e32 vcc, 0x3800, v2        ; encoding: [0xff,0x04,0x6a,0x7c,0x00,0x38,0x00,0x00]
 
 0xfd,0x04,0x6a,0x7c
-# W32: v_cmp_ne_i16_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x6a,0x7c]
-# W64: v_cmp_ne_i16_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x6a,0x7c]
+# W32-REAL16: v_cmp_ne_i16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x6a,0x7c]
+# W64-REAL16: v_cmp_ne_i16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x6a,0x7c]
+# W32-FAKE16: v_cmp_ne_i16_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x6a,0x7c]
+# W64-FAKE16: v_cmp_ne_i16_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x6a,0x7c]
 
 0xff,0xfe,0x6a,0x7c,0x0b,0xfe,0x00,0x00
-# W32: v_cmp_ne_i16_e32 vcc_lo, 0xfe0b, v127   ; encoding: [0xff,0xfe,0x6a,0x7c,0x0b,0xfe,0x00,0x00]
-# W64: v_cmp_ne_i16_e32 vcc, 0xfe0b, v127      ; encoding: [0xff,0xfe,0x6a,0x7c,0x0b,0xfe,0x00,0x00]
+# W32-REAL16: v_cmp_ne_i16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x6a,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-REAL16: v_cmp_ne_i16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x6a,0x7c,0x0b,0xfe,0x00,0x00]
+# W32-FAKE16: v_cmp_ne_i16_e32 vcc_lo, 0xfe0b, v127   ; encoding: [0xff,0xfe,0x6a,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-FAKE16: v_cmp_ne_i16_e32 vcc, 0xfe0b, v127      ; encoding: [0xff,0xfe,0x6a,0x7c,0x0b,0xfe,0x00,0x00]
+
+0x81,0x05,0x6a,0x7c
+# W32-REAL16: v_cmp_ne_i16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x6a,0x7c]
+# W64-REAL16: v_cmp_ne_i16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x6a,0x7c]
+# W32-FAKE16: v_cmp_ne_i16_e32 vcc_lo, v129/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0x81,0x05,0x6a,0x7c]
+# W64-FAKE16: v_cmp_ne_i16_e32 vcc, v129/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0x81,0x05,0x6a,0x7c]
+
+0xff,0x05,0x6a,0x7c
+# W32-REAL16: v_cmp_ne_i16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x6a,0x7c]
+# W64-REAL16: v_cmp_ne_i16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x6a,0x7c]
+# W32-FAKE16: v_cmp_ne_i16_e32 vcc_lo, v255/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0xff,0x05,0x6a,0x7c]
+# W64-FAKE16: v_cmp_ne_i16_e32 vcc, v255/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0xff,0x05,0x6a,0x7c]
+
+0xf0,0xfe,0x6a,0x7c
+# W32-REAL16: v_cmp_ne_i16_e32 vcc_lo, 0x3800, v127.l ; encoding: [0xff,0xfe,0x6a,0x7c,0x00,0x38,0x00,0x00]
+# W64-REAL16: v_cmp_ne_i16_e32 vcc, 0x3800, v127.l    ; encoding: [0xff,0xfe,0x6a,0x7c,0x00,0x38,0x00,0x00]
+# W32-FAKE16: v_cmp_ne_i16_e32 vcc_lo, 0x3800, v127   ; encoding: [0xff,0xfe,0x6a,0x7c,0x00,0x38,0x00,0x00]
+# W64-FAKE16: v_cmp_ne_i16_e32 vcc, 0x3800, v127      ; encoding: [0xff,0xfe,0x6a,0x7c,0x00,0x38,0x00,0x00]
+
+0xfd,0x04,0x6b,0x7c
+# W32-REAL16: v_cmp_ne_i16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x6b,0x7c]
+# W64-REAL16: v_cmp_ne_i16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x6b,0x7c]
+# W32-FAKE16: v_cmp_ne_i16_e32 vcc_lo, src_scc, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xfd,0x04,0x6b,0x7c]
+# W64-FAKE16: v_cmp_ne_i16_e32 vcc, src_scc, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xfd,0x04,0x6b,0x7c]
+
+0xff,0xfe,0x6b,0x7c,0x0b,0xfe,0x00,0x00
+# W32-REAL16: v_cmp_ne_i16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x6b,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-REAL16: v_cmp_ne_i16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x6b,0x7c,0x0b,0xfe,0x00,0x00]
+# W32-FAKE16: v_cmp_ne_i16_e32 vcc_lo, 0xfe0b, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xff,0xfe,0x6b,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-FAKE16: v_cmp_ne_i16_e32 vcc, 0xfe0b, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xff,0xfe,0x6b,0x7c,0x0b,0xfe,0x00,0x00]
 
 0x01,0x05,0x8a,0x7c
 # W32: v_cmp_ne_i32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x8a,0x7c]
@@ -3493,64 +4153,124 @@
 # W64: v_cmp_ne_i64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xab,0x7c,0x56,0x34,0x12,0xaf]
 
 0x01,0x05,0x7a,0x7c
-# W32: v_cmp_ne_u16_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x7a,0x7c]
-# W64: v_cmp_ne_u16_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x7a,0x7c]
+# W32-REAL16: v_cmp_ne_u16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x7a,0x7c]
+# W64-REAL16: v_cmp_ne_u16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x7a,0x7c]
+# W32-FAKE16: v_cmp_ne_u16_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x7a,0x7c]
+# W64-FAKE16: v_cmp_ne_u16_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x7a,0x7c]
 
 0x7f,0x05,0x7a,0x7c
-# W32: v_cmp_ne_u16_e32 vcc_lo, v127, v2       ; encoding: [0x7f,0x05,0x7a,0x7c]
-# W64: v_cmp_ne_u16_e32 vcc, v127, v2          ; encoding: [0x7f,0x05,0x7a,0x7c]
+# W32-REAL16: v_cmp_ne_u16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x7a,0x7c]
+# W64-REAL16: v_cmp_ne_u16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x7a,0x7c]
+# W32-FAKE16: v_cmp_ne_u16_e32 vcc_lo, v127, v2       ; encoding: [0x7f,0x05,0x7a,0x7c]
+# W64-FAKE16: v_cmp_ne_u16_e32 vcc, v127, v2          ; encoding: [0x7f,0x05,0x7a,0x7c]
 
 0x01,0x04,0x7a,0x7c
-# W32: v_cmp_ne_u16_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x7a,0x7c]
-# W64: v_cmp_ne_u16_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x7a,0x7c]
+# W32-REAL16: v_cmp_ne_u16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x7a,0x7c]
+# W64-REAL16: v_cmp_ne_u16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x7a,0x7c]
+# W32-FAKE16: v_cmp_ne_u16_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x7a,0x7c]
+# W64-FAKE16: v_cmp_ne_u16_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x7a,0x7c]
 
 0x69,0x04,0x7a,0x7c
-# W32: v_cmp_ne_u16_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x7a,0x7c]
-# W64: v_cmp_ne_u16_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x7a,0x7c]
+# W32-REAL16: v_cmp_ne_u16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x7a,0x7c]
+# W64-REAL16: v_cmp_ne_u16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x7a,0x7c]
+# W32-FAKE16: v_cmp_ne_u16_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x7a,0x7c]
+# W64-FAKE16: v_cmp_ne_u16_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x7a,0x7c]
 
 0x6a,0x04,0x7a,0x7c
-# W32: v_cmp_ne_u16_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x7a,0x7c]
-# W64: v_cmp_ne_u16_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x7a,0x7c]
+# W32-REAL16: v_cmp_ne_u16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x7a,0x7c]
+# W64-REAL16: v_cmp_ne_u16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x7a,0x7c]
+# W32-FAKE16: v_cmp_ne_u16_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x7a,0x7c]
+# W64-FAKE16: v_cmp_ne_u16_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x7a,0x7c]
 
 0x6b,0x04,0x7a,0x7c
-# W32: v_cmp_ne_u16_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x7a,0x7c]
-# W64: v_cmp_ne_u16_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x7a,0x7c]
+# W32-REAL16: v_cmp_ne_u16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x7a,0x7c]
+# W64-REAL16: v_cmp_ne_u16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x7a,0x7c]
+# W32-FAKE16: v_cmp_ne_u16_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x7a,0x7c]
+# W64-FAKE16: v_cmp_ne_u16_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x7a,0x7c]
 
 0x7b,0x04,0x7a,0x7c
-# W32: v_cmp_ne_u16_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x7a,0x7c]
-# W64: v_cmp_ne_u16_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x7a,0x7c]
+# W32-REAL16: v_cmp_ne_u16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x7a,0x7c]
+# W64-REAL16: v_cmp_ne_u16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x7a,0x7c]
+# W32-FAKE16: v_cmp_ne_u16_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x7a,0x7c]
+# W64-FAKE16: v_cmp_ne_u16_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x7a,0x7c]
 
 0x7d,0x04,0x7a,0x7c
-# W32: v_cmp_ne_u16_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x7a,0x7c]
-# W64: v_cmp_ne_u16_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x7a,0x7c]
+# W32-REAL16: v_cmp_ne_u16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x7a,0x7c]
+# W64-REAL16: v_cmp_ne_u16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x7a,0x7c]
+# W32-FAKE16: v_cmp_ne_u16_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x7a,0x7c]
+# W64-FAKE16: v_cmp_ne_u16_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x7a,0x7c]
 
 0x7e,0x04,0x7a,0x7c
-# W32: v_cmp_ne_u16_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x7a,0x7c]
-# W64: v_cmp_ne_u16_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x7a,0x7c]
+# W32-REAL16: v_cmp_ne_u16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x7a,0x7c]
+# W64-REAL16: v_cmp_ne_u16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x7a,0x7c]
+# W32-FAKE16: v_cmp_ne_u16_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x7a,0x7c]
+# W64-FAKE16: v_cmp_ne_u16_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x7a,0x7c]
 
 0x7f,0x04,0x7a,0x7c
-# W32: v_cmp_ne_u16_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x7a,0x7c]
-# W64: v_cmp_ne_u16_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x7a,0x7c]
+# W32-REAL16: v_cmp_ne_u16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x7a,0x7c]
+# W64-REAL16: v_cmp_ne_u16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x7a,0x7c]
+# W32-FAKE16: v_cmp_ne_u16_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x7a,0x7c]
+# W64-FAKE16: v_cmp_ne_u16_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x7a,0x7c]
 
 0x7c,0x04,0x7a,0x7c
-# W32: v_cmp_ne_u16_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x7a,0x7c]
-# W64: v_cmp_ne_u16_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x7a,0x7c]
+# W32-REAL16: v_cmp_ne_u16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x7a,0x7c]
+# W64-REAL16: v_cmp_ne_u16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x7a,0x7c]
+# W32-FAKE16: v_cmp_ne_u16_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x7a,0x7c]
+# W64-FAKE16: v_cmp_ne_u16_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x7a,0x7c]
 
 0xc1,0x04,0x7a,0x7c
-# W32: v_cmp_ne_u16_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x7a,0x7c]
-# W64: v_cmp_ne_u16_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x7a,0x7c]
+# W32-REAL16: v_cmp_ne_u16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x7a,0x7c]
+# W64-REAL16: v_cmp_ne_u16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x7a,0x7c]
+# W32-FAKE16: v_cmp_ne_u16_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x7a,0x7c]
+# W64-FAKE16: v_cmp_ne_u16_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x7a,0x7c]
 
 0xf0,0x04,0x7a,0x7c
-# W32: v_cmp_ne_u16_e32 vcc_lo, 0x3800, v2     ; encoding: [0xff,0x04,0x7a,0x7c,0x00,0x38,0x00,0x00]
-# W64: v_cmp_ne_u16_e32 vcc, 0x3800, v2        ; encoding: [0xff,0x04,0x7a,0x7c,0x00,0x38,0x00,0x00]
+# W32-REAL16: v_cmp_ne_u16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x7a,0x7c,0x00,0x38,0x00,0x00]
+# W64-REAL16: v_cmp_ne_u16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x7a,0x7c,0x00,0x38,0x00,0x00]
+# W32-FAKE16: v_cmp_ne_u16_e32 vcc_lo, 0x3800, v2     ; encoding: [0xff,0x04,0x7a,0x7c,0x00,0x38,0x00,0x00]
+# W64-FAKE16: v_cmp_ne_u16_e32 vcc, 0x3800, v2        ; encoding: [0xff,0x04,0x7a,0x7c,0x00,0x38,0x00,0x00]
 
 0xfd,0x04,0x7a,0x7c
-# W32: v_cmp_ne_u16_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x7a,0x7c]
-# W64: v_cmp_ne_u16_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x7a,0x7c]
+# W32-REAL16: v_cmp_ne_u16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x7a,0x7c]
+# W64-REAL16: v_cmp_ne_u16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x7a,0x7c]
+# W32-FAKE16: v_cmp_ne_u16_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x7a,0x7c]
+# W64-FAKE16: v_cmp_ne_u16_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x7a,0x7c]
 
 0xff,0xfe,0x7a,0x7c,0x0b,0xfe,0x00,0x00
-# W32: v_cmp_ne_u16_e32 vcc_lo, 0xfe0b, v127   ; encoding: [0xff,0xfe,0x7a,0x7c,0x0b,0xfe,0x00,0x00]
-# W64: v_cmp_ne_u16_e32 vcc, 0xfe0b, v127      ; encoding: [0xff,0xfe,0x7a,0x7c,0x0b,0xfe,0x00,0x00]
+# W32-REAL16: v_cmp_ne_u16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x7a,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-REAL16: v_cmp_ne_u16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x7a,0x7c,0x0b,0xfe,0x00,0x00]
+# W32-FAKE16: v_cmp_ne_u16_e32 vcc_lo, 0xfe0b, v127   ; encoding: [0xff,0xfe,0x7a,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-FAKE16: v_cmp_ne_u16_e32 vcc, 0xfe0b, v127      ; encoding: [0xff,0xfe,0x7a,0x7c,0x0b,0xfe,0x00,0x00]
+
+0x81,0x05,0x7a,0x7c
+# W32-REAL16: v_cmp_ne_u16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x7a,0x7c]
+# W64-REAL16: v_cmp_ne_u16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x7a,0x7c]
+# W32-FAKE16: v_cmp_ne_u16_e32 vcc_lo, v129/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0x81,0x05,0x7a,0x7c]
+# W64-FAKE16: v_cmp_ne_u16_e32 vcc, v129/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0x81,0x05,0x7a,0x7c]
+
+0xff,0x05,0x7a,0x7c
+# W32-REAL16: v_cmp_ne_u16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x7a,0x7c]
+# W64-REAL16: v_cmp_ne_u16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x7a,0x7c]
+# W32-FAKE16: v_cmp_ne_u16_e32 vcc_lo, v255/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0xff,0x05,0x7a,0x7c]
+# W64-FAKE16: v_cmp_ne_u16_e32 vcc, v255/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0xff,0x05,0x7a,0x7c]
+
+0xf0,0xfe,0x7a,0x7c
+# W32-REAL16: v_cmp_ne_u16_e32 vcc_lo, 0x3800, v127.l ; encoding: [0xff,0xfe,0x7a,0x7c,0x00,0x38,0x00,0x00]
+# W64-REAL16: v_cmp_ne_u16_e32 vcc, 0x3800, v127.l    ; encoding: [0xff,0xfe,0x7a,0x7c,0x00,0x38,0x00,0x00]
+# W32-FAKE16: v_cmp_ne_u16_e32 vcc_lo, 0x3800, v127   ; encoding: [0xff,0xfe,0x7a,0x7c,0x00,0x38,0x00,0x00]
+# W64-FAKE16: v_cmp_ne_u16_e32 vcc, 0x3800, v127      ; encoding: [0xff,0xfe,0x7a,0x7c,0x00,0x38,0x00,0x00]
+
+0xfd,0x04,0x7b,0x7c
+# W32-REAL16: v_cmp_ne_u16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x7b,0x7c]
+# W64-REAL16: v_cmp_ne_u16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x7b,0x7c]
+# W32-FAKE16: v_cmp_ne_u16_e32 vcc_lo, src_scc, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xfd,0x04,0x7b,0x7c]
+# W64-FAKE16: v_cmp_ne_u16_e32 vcc, src_scc, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xfd,0x04,0x7b,0x7c]
+
+0xff,0xfe,0x7b,0x7c,0x0b,0xfe,0x00,0x00
+# W32-REAL16: v_cmp_ne_u16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x7b,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-REAL16: v_cmp_ne_u16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x7b,0x7c,0x0b,0xfe,0x00,0x00]
+# W32-FAKE16: v_cmp_ne_u16_e32 vcc_lo, 0xfe0b, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xff,0xfe,0x7b,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-FAKE16: v_cmp_ne_u16_e32 vcc, 0xfe0b, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xff,0xfe,0x7b,0x7c,0x0b,0xfe,0x00,0x00]
 
 0x01,0x05,0x9a,0x7c
 # W32: v_cmp_ne_u32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x9a,0x7c]
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopc_dpp16.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopc_dpp16.txt
index da691eebd06c47..7983c2258599a6 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopc_dpp16.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopc_dpp16.txt
@@ -229,60 +229,106 @@
 # W64: v_cmp_eq_f32 vcc, -|v255|, -|v255| row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x25,0x7c,0xff,0x6f,0xfd,0x30]
 
 0xfa,0x04,0x64,0x7c,0x01,0x1b,0x00,0xff
-# W32: v_cmp_eq_i16 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x1b,0x00,0xff]
-# W64: v_cmp_eq_i16 vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x1b,0x00,0xff]
+# W32-REAL16: v_cmp_eq_i16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x1b,0x00,0xff]
+# W64-REAL16: v_cmp_eq_i16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x1b,0x00,0xff]
+# W32-FAKE16: v_cmp_eq_i16 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x1b,0x00,0xff]
+# W64-FAKE16: v_cmp_eq_i16 vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x1b,0x00,0xff]
 
 0xfa,0x04,0x64,0x7c,0x01,0xe4,0x00,0xff
-# W32: v_cmp_eq_i16 vcc_lo, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0xe4,0x00,0xff]
-# W64: v_cmp_eq_i16 vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0xe4,0x00,0xff]
+# W32-REAL16: v_cmp_eq_i16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0xe4,0x00,0xff]
+# W64-REAL16: v_cmp_eq_i16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0xe4,0x00,0xff]
+# W32-FAKE16: v_cmp_eq_i16 vcc_lo, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0xe4,0x00,0xff]
+# W64-FAKE16: v_cmp_eq_i16 vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0xe4,0x00,0xff]
 
 0xfa,0x04,0x64,0x7c,0x01,0x40,0x01,0xff
-# W32: v_cmp_eq_i16 vcc_lo, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x40,0x01,0xff]
-# W64: v_cmp_eq_i16 vcc, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x40,0x01,0xff]
+# W32-REAL16: v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x40,0x01,0xff]
+# W64-REAL16: v_cmp_eq_i16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x40,0x01,0xff]
+# W32-FAKE16: v_cmp_eq_i16 vcc_lo, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x40,0x01,0xff]
+# W64-FAKE16: v_cmp_eq_i16 vcc, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x40,0x01,0xff]
 
 0xfa,0x04,0x64,0x7c,0x01,0x41,0x01,0xff
-# W32: v_cmp_eq_i16 vcc_lo, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x41,0x01,0xff]
-# W64: v_cmp_eq_i16 vcc, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x41,0x01,0xff]
+# W32-REAL16: v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x41,0x01,0xff]
+# W64-REAL16: v_cmp_eq_i16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x41,0x01,0xff]
+# W32-FAKE16: v_cmp_eq_i16 vcc_lo, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x41,0x01,0xff]
+# W64-FAKE16: v_cmp_eq_i16 vcc, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x41,0x01,0xff]
 
 0xfa,0x04,0x64,0x7c,0x01,0x01,0x01,0xff
-# W32: v_cmp_eq_i16 vcc_lo, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x01,0x01,0xff]
-# W64: v_cmp_eq_i16 vcc, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x01,0x01,0xff]
+# W32-REAL16: v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x01,0x01,0xff]
+# W64-REAL16: v_cmp_eq_i16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x01,0x01,0xff]
+# W32-FAKE16: v_cmp_eq_i16 vcc_lo, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x01,0x01,0xff]
+# W64-FAKE16: v_cmp_eq_i16 vcc, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x01,0x01,0xff]
 
 0xfa,0x04,0x64,0x7c,0x01,0x0f,0x01,0xff
-# W32: v_cmp_eq_i16 vcc_lo, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x0f,0x01,0xff]
-# W64: v_cmp_eq_i16 vcc, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x0f,0x01,0xff]
+# W32-REAL16: v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x0f,0x01,0xff]
+# W64-REAL16: v_cmp_eq_i16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x0f,0x01,0xff]
+# W32-FAKE16: v_cmp_eq_i16 vcc_lo, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x0f,0x01,0xff]
+# W64-FAKE16: v_cmp_eq_i16 vcc, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x0f,0x01,0xff]
 
 0xfa,0x04,0x64,0x7c,0x01,0x11,0x01,0xff
-# W32: v_cmp_eq_i16 vcc_lo, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x11,0x01,0xff]
-# W64: v_cmp_eq_i16 vcc, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x11,0x01,0xff]
+# W32-REAL16: v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x11,0x01,0xff]
+# W64-REAL16: v_cmp_eq_i16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x11,0x01,0xff]
+# W32-FAKE16: v_cmp_eq_i16 vcc_lo, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x11,0x01,0xff]
+# W64-FAKE16: v_cmp_eq_i16 vcc, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x11,0x01,0xff]
 
 0xfa,0x04,0x64,0x7c,0x01,0x1f,0x01,0xff
-# W32: v_cmp_eq_i16 vcc_lo, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x1f,0x01,0xff]
-# W64: v_cmp_eq_i16 vcc, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x1f,0x01,0xff]
+# W32-REAL16: v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x1f,0x01,0xff]
+# W64-REAL16: v_cmp_eq_i16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x1f,0x01,0xff]
+# W32-FAKE16: v_cmp_eq_i16 vcc_lo, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x1f,0x01,0xff]
+# W64-FAKE16: v_cmp_eq_i16 vcc, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x1f,0x01,0xff]
 
 0xfa,0x04,0x64,0x7c,0x01,0x21,0x01,0xff
-# W32: v_cmp_eq_i16 vcc_lo, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x21,0x01,0xff]
-# W64: v_cmp_eq_i16 vcc, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x21,0x01,0xff]
+# W32-REAL16: v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x21,0x01,0xff]
+# W64-REAL16: v_cmp_eq_i16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x21,0x01,0xff]
+# W32-FAKE16: v_cmp_eq_i16 vcc_lo, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x21,0x01,0xff]
+# W64-FAKE16: v_cmp_eq_i16 vcc, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x21,0x01,0xff]
 
 0xfa,0x04,0x64,0x7c,0x01,0x2f,0x01,0xff
-# W32: v_cmp_eq_i16 vcc_lo, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x2f,0x01,0xff]
-# W64: v_cmp_eq_i16 vcc, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x2f,0x01,0xff]
+# W32-REAL16: v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x2f,0x01,0xff]
+# W64-REAL16: v_cmp_eq_i16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x2f,0x01,0xff]
+# W32-FAKE16: v_cmp_eq_i16 vcc_lo, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x2f,0x01,0xff]
+# W64-FAKE16: v_cmp_eq_i16 vcc, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x2f,0x01,0xff]
 
 0xfa,0x04,0x64,0x7c,0x01,0x50,0x01,0xff
-# W32: v_cmp_eq_i16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x50,0x01,0xff]
-# W64: v_cmp_eq_i16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x50,0x01,0xff]
+# W32-REAL16: v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x50,0x01,0xff]
+# W64-REAL16: v_cmp_eq_i16 vcc, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x50,0x01,0xff]
+# W32-FAKE16: v_cmp_eq_i16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x50,0x01,0xff]
+# W64-FAKE16: v_cmp_eq_i16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x50,0x01,0xff]
 
 0xfa,0x04,0x64,0x7c,0x01,0x5f,0x01,0x01
-# W32: v_cmp_eq_i16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x5f,0x01,0x01]
-# W64: v_cmp_eq_i16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x5f,0x01,0x01]
+# W32-REAL16: v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x5f,0x01,0x01]
+# W64-REAL16: v_cmp_eq_i16 vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x5f,0x01,0x01]
+# W32-FAKE16: v_cmp_eq_i16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x5f,0x01,0x01]
+# W64-FAKE16: v_cmp_eq_i16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x5f,0x01,0x01]
 
 0xfa,0x04,0x64,0x7c,0x01,0x60,0x01,0x13
-# W32: v_cmp_eq_i16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x60,0x01,0x13]
-# W64: v_cmp_eq_i16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x60,0x01,0x13]
+# W32-REAL16: v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_eq_i16 vcc, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_eq_i16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_eq_i16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x60,0x01,0x13]
 
 0xfa,0xfe,0x64,0x7c,0x7f,0x6f,0x0d,0x30
-# W32: v_cmp_eq_i16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x64,0x7c,0x7f,0x6f,0x0d,0x30]
-# W64: v_cmp_eq_i16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x64,0x7c,0x7f,0x6f,0x0d,0x30]
+# W32-REAL16: v_cmp_eq_i16 vcc_lo, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x64,0x7c,0x7f,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_eq_i16 vcc, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x64,0x7c,0x7f,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_eq_i16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x64,0x7c,0x7f,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_eq_i16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x64,0x7c,0x7f,0x6f,0x0d,0x30]
+
+0xfa,0xfe,0x64,0x7c,0x7f,0x5f,0x01,0x01
+# W32-REAL16: v_cmp_eq_i16 vcc_lo, v127.l, v127.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0xfe,0x64,0x7c,0x7f,0x5f,0x01,0x01]
+# W64-REAL16: v_cmp_eq_i16 vcc, v127.l, v127.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0xfe,0x64,0x7c,0x7f,0x5f,0x01,0x01]
+# W32-FAKE16: v_cmp_eq_i16 vcc_lo, v127, v127 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0xfe,0x64,0x7c,0x7f,0x5f,0x01,0x01]
+# W64-FAKE16: v_cmp_eq_i16 vcc, v127, v127 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0xfe,0x64,0x7c,0x7f,0x5f,0x01,0x01]
+
+0xfa,0x04,0x65,0x7c,0x81,0x60,0x01,0x13
+# W32-REAL16: v_cmp_eq_i16 vcc_lo, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x65,0x7c,0x81,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_eq_i16 vcc, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x65,0x7c,0x81,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_eq_i16 vcc_lo, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x65,0x7c,0x81,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_eq_i16 vcc, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x65,0x7c,0x81,0x60,0x01,0x13]
+
+0xfa,0xfe,0x65,0x7c,0xff,0x6f,0x0d,0x30
+# W32-REAL16: v_cmp_eq_i16 vcc_lo, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x65,0x7c,0xff,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_eq_i16 vcc, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x65,0x7c,0xff,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_eq_i16 vcc_lo, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x65,0x7c,0xff,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_eq_i16 vcc, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x65,0x7c,0xff,0x6f,0x0d,0x30]
 
 0xfa,0x04,0x84,0x7c,0x01,0x1b,0x00,0xff
 # W32: v_cmp_eq_i32 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x84,0x7c,0x01,0x1b,0x00,0xff]
@@ -341,60 +387,106 @@
 # W64: v_cmp_eq_i32 vcc, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x85,0x7c,0xff,0x6f,0x0d,0x30]
 
 0xfa,0x04,0x74,0x7c,0x01,0x1b,0x00,0xff
-# W32: v_cmp_eq_u16 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x1b,0x00,0xff]
-# W64: v_cmp_eq_u16 vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x1b,0x00,0xff]
+# W32-REAL16: v_cmp_eq_u16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x1b,0x00,0xff]
+# W64-REAL16: v_cmp_eq_u16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x1b,0x00,0xff]
+# W32-FAKE16: v_cmp_eq_u16 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x1b,0x00,0xff]
+# W64-FAKE16: v_cmp_eq_u16 vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x1b,0x00,0xff]
 
 0xfa,0x04,0x74,0x7c,0x01,0xe4,0x00,0xff
-# W32: v_cmp_eq_u16 vcc_lo, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0xe4,0x00,0xff]
-# W64: v_cmp_eq_u16 vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0xe4,0x00,0xff]
+# W32-REAL16: v_cmp_eq_u16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0xe4,0x00,0xff]
+# W64-REAL16: v_cmp_eq_u16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0xe4,0x00,0xff]
+# W32-FAKE16: v_cmp_eq_u16 vcc_lo, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0xe4,0x00,0xff]
+# W64-FAKE16: v_cmp_eq_u16 vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0xe4,0x00,0xff]
 
 0xfa,0x04,0x74,0x7c,0x01,0x40,0x01,0xff
-# W32: v_cmp_eq_u16 vcc_lo, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x40,0x01,0xff]
-# W64: v_cmp_eq_u16 vcc, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x40,0x01,0xff]
+# W32-REAL16: v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x40,0x01,0xff]
+# W64-REAL16: v_cmp_eq_u16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x40,0x01,0xff]
+# W32-FAKE16: v_cmp_eq_u16 vcc_lo, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x40,0x01,0xff]
+# W64-FAKE16: v_cmp_eq_u16 vcc, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x40,0x01,0xff]
 
 0xfa,0x04,0x74,0x7c,0x01,0x41,0x01,0xff
-# W32: v_cmp_eq_u16 vcc_lo, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x41,0x01,0xff]
-# W64: v_cmp_eq_u16 vcc, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x41,0x01,0xff]
+# W32-REAL16: v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x41,0x01,0xff]
+# W64-REAL16: v_cmp_eq_u16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x41,0x01,0xff]
+# W32-FAKE16: v_cmp_eq_u16 vcc_lo, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x41,0x01,0xff]
+# W64-FAKE16: v_cmp_eq_u16 vcc, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x41,0x01,0xff]
 
 0xfa,0x04,0x74,0x7c,0x01,0x01,0x01,0xff
-# W32: v_cmp_eq_u16 vcc_lo, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x01,0x01,0xff]
-# W64: v_cmp_eq_u16 vcc, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x01,0x01,0xff]
+# W32-REAL16: v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x01,0x01,0xff]
+# W64-REAL16: v_cmp_eq_u16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x01,0x01,0xff]
+# W32-FAKE16: v_cmp_eq_u16 vcc_lo, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x01,0x01,0xff]
+# W64-FAKE16: v_cmp_eq_u16 vcc, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x01,0x01,0xff]
 
 0xfa,0x04,0x74,0x7c,0x01,0x0f,0x01,0xff
-# W32: v_cmp_eq_u16 vcc_lo, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x0f,0x01,0xff]
-# W64: v_cmp_eq_u16 vcc, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x0f,0x01,0xff]
+# W32-REAL16: v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x0f,0x01,0xff]
+# W64-REAL16: v_cmp_eq_u16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x0f,0x01,0xff]
+# W32-FAKE16: v_cmp_eq_u16 vcc_lo, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x0f,0x01,0xff]
+# W64-FAKE16: v_cmp_eq_u16 vcc, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x0f,0x01,0xff]
 
 0xfa,0x04,0x74,0x7c,0x01,0x11,0x01,0xff
-# W32: v_cmp_eq_u16 vcc_lo, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x11,0x01,0xff]
-# W64: v_cmp_eq_u16 vcc, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x11,0x01,0xff]
+# W32-REAL16: v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x11,0x01,0xff]
+# W64-REAL16: v_cmp_eq_u16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x11,0x01,0xff]
+# W32-FAKE16: v_cmp_eq_u16 vcc_lo, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x11,0x01,0xff]
+# W64-FAKE16: v_cmp_eq_u16 vcc, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x11,0x01,0xff]
 
 0xfa,0x04,0x74,0x7c,0x01,0x1f,0x01,0xff
-# W32: v_cmp_eq_u16 vcc_lo, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x1f,0x01,0xff]
-# W64: v_cmp_eq_u16 vcc, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x1f,0x01,0xff]
+# W32-REAL16: v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x1f,0x01,0xff]
+# W64-REAL16: v_cmp_eq_u16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x1f,0x01,0xff]
+# W32-FAKE16: v_cmp_eq_u16 vcc_lo, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x1f,0x01,0xff]
+# W64-FAKE16: v_cmp_eq_u16 vcc, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x1f,0x01,0xff]
 
 0xfa,0x04,0x74,0x7c,0x01,0x21,0x01,0xff
-# W32: v_cmp_eq_u16 vcc_lo, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x21,0x01,0xff]
-# W64: v_cmp_eq_u16 vcc, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x21,0x01,0xff]
+# W32-REAL16: v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x21,0x01,0xff]
+# W64-REAL16: v_cmp_eq_u16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x21,0x01,0xff]
+# W32-FAKE16: v_cmp_eq_u16 vcc_lo, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x21,0x01,0xff]
+# W64-FAKE16: v_cmp_eq_u16 vcc, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x21,0x01,0xff]
 
 0xfa,0x04,0x74,0x7c,0x01,0x2f,0x01,0xff
-# W32: v_cmp_eq_u16 vcc_lo, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x2f,0x01,0xff]
-# W64: v_cmp_eq_u16 vcc, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x2f,0x01,0xff]
+# W32-REAL16: v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x2f,0x01,0xff]
+# W64-REAL16: v_cmp_eq_u16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x2f,0x01,0xff]
+# W32-FAKE16: v_cmp_eq_u16 vcc_lo, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x2f,0x01,0xff]
+# W64-FAKE16: v_cmp_eq_u16 vcc, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x2f,0x01,0xff]
 
 0xfa,0x04,0x74,0x7c,0x01,0x50,0x01,0xff
-# W32: v_cmp_eq_u16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x50,0x01,0xff]
-# W64: v_cmp_eq_u16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x50,0x01,0xff]
+# W32-REAL16: v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x50,0x01,0xff]
+# W64-REAL16: v_cmp_eq_u16 vcc, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x50,0x01,0xff]
+# W32-FAKE16: v_cmp_eq_u16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x50,0x01,0xff]
+# W64-FAKE16: v_cmp_eq_u16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x50,0x01,0xff]
 
 0xfa,0x04,0x74,0x7c,0x01,0x5f,0x01,0x01
-# W32: v_cmp_eq_u16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x5f,0x01,0x01]
-# W64: v_cmp_eq_u16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x5f,0x01,0x01]
+# W32-REAL16: v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x5f,0x01,0x01]
+# W64-REAL16: v_cmp_eq_u16 vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x5f,0x01,0x01]
+# W32-FAKE16: v_cmp_eq_u16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x5f,0x01,0x01]
+# W64-FAKE16: v_cmp_eq_u16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x5f,0x01,0x01]
 
 0xfa,0x04,0x74,0x7c,0x01,0x60,0x01,0x13
-# W32: v_cmp_eq_u16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x60,0x01,0x13]
-# W64: v_cmp_eq_u16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x60,0x01,0x13]
+# W32-REAL16: v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_eq_u16 vcc, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_eq_u16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_eq_u16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x60,0x01,0x13]
 
 0xfa,0xfe,0x74,0x7c,0x7f,0x6f,0x0d,0x30
-# W32: v_cmp_eq_u16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x74,0x7c,0x7f,0x6f,0x0d,0x30]
-# W64: v_cmp_eq_u16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x74,0x7c,0x7f,0x6f,0x0d,0x30]
+# W32-REAL16: v_cmp_eq_u16 vcc_lo, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x74,0x7c,0x7f,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_eq_u16 vcc, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x74,0x7c,0x7f,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_eq_u16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x74,0x7c,0x7f,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_eq_u16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x74,0x7c,0x7f,0x6f,0x0d,0x30]
+
+0xfa,0xfe,0x74,0x7c,0x7f,0x5f,0x01,0x01
+# W32-REAL16: v_cmp_eq_u16 vcc_lo, v127.l, v127.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0xfe,0x74,0x7c,0x7f,0x5f,0x01,0x01]
+# W64-REAL16: v_cmp_eq_u16 vcc, v127.l, v127.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0xfe,0x74,0x7c,0x7f,0x5f,0x01,0x01]
+# W32-FAKE16: v_cmp_eq_u16 vcc_lo, v127, v127 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0xfe,0x74,0x7c,0x7f,0x5f,0x01,0x01]
+# W64-FAKE16: v_cmp_eq_u16 vcc, v127, v127 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0xfe,0x74,0x7c,0x7f,0x5f,0x01,0x01]
+
+0xfa,0x04,0x75,0x7c,0x81,0x60,0x01,0x13
+# W32-REAL16: v_cmp_eq_u16 vcc_lo, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x75,0x7c,0x81,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_eq_u16 vcc, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x75,0x7c,0x81,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_eq_u16 vcc_lo, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x75,0x7c,0x81,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_eq_u16 vcc, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x75,0x7c,0x81,0x60,0x01,0x13]
+
+0xfa,0xfe,0x75,0x7c,0xff,0x6f,0x0d,0x30
+# W32-REAL16: v_cmp_eq_u16 vcc_lo, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x75,0x7c,0xff,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_eq_u16 vcc, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x75,0x7c,0xff,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_eq_u16 vcc_lo, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x75,0x7c,0xff,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_eq_u16 vcc, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x75,0x7c,0xff,0x6f,0x0d,0x30]
 
 0xfa,0x04,0x94,0x7c,0x01,0x1b,0x00,0xff
 # W32: v_cmp_eq_u32 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x94,0x7c,0x01,0x1b,0x00,0xff]
@@ -789,60 +881,106 @@
 # W64: v_cmp_ge_f32 vcc, -|v255|, -|v255| row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x2d,0x7c,0xff,0x6f,0xfd,0x30]
 
 0xfa,0x04,0x6c,0x7c,0x01,0x1b,0x00,0xff
-# W32: v_cmp_ge_i16 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x1b,0x00,0xff]
-# W64: v_cmp_ge_i16 vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x1b,0x00,0xff]
+# W32-REAL16: v_cmp_ge_i16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x1b,0x00,0xff]
+# W64-REAL16: v_cmp_ge_i16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x1b,0x00,0xff]
+# W32-FAKE16: v_cmp_ge_i16 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x1b,0x00,0xff]
+# W64-FAKE16: v_cmp_ge_i16 vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x1b,0x00,0xff]
 
 0xfa,0x04,0x6c,0x7c,0x01,0xe4,0x00,0xff
-# W32: v_cmp_ge_i16 vcc_lo, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0xe4,0x00,0xff]
-# W64: v_cmp_ge_i16 vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0xe4,0x00,0xff]
+# W32-REAL16: v_cmp_ge_i16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0xe4,0x00,0xff]
+# W64-REAL16: v_cmp_ge_i16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0xe4,0x00,0xff]
+# W32-FAKE16: v_cmp_ge_i16 vcc_lo, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0xe4,0x00,0xff]
+# W64-FAKE16: v_cmp_ge_i16 vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0xe4,0x00,0xff]
 
 0xfa,0x04,0x6c,0x7c,0x01,0x40,0x01,0xff
-# W32: v_cmp_ge_i16 vcc_lo, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x40,0x01,0xff]
-# W64: v_cmp_ge_i16 vcc, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x40,0x01,0xff]
+# W32-REAL16: v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x40,0x01,0xff]
+# W64-REAL16: v_cmp_ge_i16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x40,0x01,0xff]
+# W32-FAKE16: v_cmp_ge_i16 vcc_lo, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x40,0x01,0xff]
+# W64-FAKE16: v_cmp_ge_i16 vcc, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x40,0x01,0xff]
 
 0xfa,0x04,0x6c,0x7c,0x01,0x41,0x01,0xff
-# W32: v_cmp_ge_i16 vcc_lo, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x41,0x01,0xff]
-# W64: v_cmp_ge_i16 vcc, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x41,0x01,0xff]
+# W32-REAL16: v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x41,0x01,0xff]
+# W64-REAL16: v_cmp_ge_i16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x41,0x01,0xff]
+# W32-FAKE16: v_cmp_ge_i16 vcc_lo, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x41,0x01,0xff]
+# W64-FAKE16: v_cmp_ge_i16 vcc, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x41,0x01,0xff]
 
 0xfa,0x04,0x6c,0x7c,0x01,0x01,0x01,0xff
-# W32: v_cmp_ge_i16 vcc_lo, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x01,0x01,0xff]
-# W64: v_cmp_ge_i16 vcc, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x01,0x01,0xff]
+# W32-REAL16: v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x01,0x01,0xff]
+# W64-REAL16: v_cmp_ge_i16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x01,0x01,0xff]
+# W32-FAKE16: v_cmp_ge_i16 vcc_lo, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x01,0x01,0xff]
+# W64-FAKE16: v_cmp_ge_i16 vcc, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x01,0x01,0xff]
 
 0xfa,0x04,0x6c,0x7c,0x01,0x0f,0x01,0xff
-# W32: v_cmp_ge_i16 vcc_lo, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x0f,0x01,0xff]
-# W64: v_cmp_ge_i16 vcc, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x0f,0x01,0xff]
+# W32-REAL16: v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x0f,0x01,0xff]
+# W64-REAL16: v_cmp_ge_i16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x0f,0x01,0xff]
+# W32-FAKE16: v_cmp_ge_i16 vcc_lo, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x0f,0x01,0xff]
+# W64-FAKE16: v_cmp_ge_i16 vcc, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x0f,0x01,0xff]
 
 0xfa,0x04,0x6c,0x7c,0x01,0x11,0x01,0xff
-# W32: v_cmp_ge_i16 vcc_lo, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x11,0x01,0xff]
-# W64: v_cmp_ge_i16 vcc, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x11,0x01,0xff]
+# W32-REAL16: v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x11,0x01,0xff]
+# W64-REAL16: v_cmp_ge_i16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x11,0x01,0xff]
+# W32-FAKE16: v_cmp_ge_i16 vcc_lo, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x11,0x01,0xff]
+# W64-FAKE16: v_cmp_ge_i16 vcc, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x11,0x01,0xff]
 
 0xfa,0x04,0x6c,0x7c,0x01,0x1f,0x01,0xff
-# W32: v_cmp_ge_i16 vcc_lo, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x1f,0x01,0xff]
-# W64: v_cmp_ge_i16 vcc, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x1f,0x01,0xff]
+# W32-REAL16: v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x1f,0x01,0xff]
+# W64-REAL16: v_cmp_ge_i16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x1f,0x01,0xff]
+# W32-FAKE16: v_cmp_ge_i16 vcc_lo, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x1f,0x01,0xff]
+# W64-FAKE16: v_cmp_ge_i16 vcc, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x1f,0x01,0xff]
 
 0xfa,0x04,0x6c,0x7c,0x01,0x21,0x01,0xff
-# W32: v_cmp_ge_i16 vcc_lo, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x21,0x01,0xff]
-# W64: v_cmp_ge_i16 vcc, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x21,0x01,0xff]
+# W32-REAL16: v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x21,0x01,0xff]
+# W64-REAL16: v_cmp_ge_i16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x21,0x01,0xff]
+# W32-FAKE16: v_cmp_ge_i16 vcc_lo, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x21,0x01,0xff]
+# W64-FAKE16: v_cmp_ge_i16 vcc, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x21,0x01,0xff]
 
 0xfa,0x04,0x6c,0x7c,0x01,0x2f,0x01,0xff
-# W32: v_cmp_ge_i16 vcc_lo, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x2f,0x01,0xff]
-# W64: v_cmp_ge_i16 vcc, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x2f,0x01,0xff]
+# W32-REAL16: v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x2f,0x01,0xff]
+# W64-REAL16: v_cmp_ge_i16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x2f,0x01,0xff]
+# W32-FAKE16: v_cmp_ge_i16 vcc_lo, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x2f,0x01,0xff]
+# W64-FAKE16: v_cmp_ge_i16 vcc, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x2f,0x01,0xff]
 
 0xfa,0x04,0x6c,0x7c,0x01,0x50,0x01,0xff
-# W32: v_cmp_ge_i16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x50,0x01,0xff]
-# W64: v_cmp_ge_i16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x50,0x01,0xff]
+# W32-REAL16: v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x50,0x01,0xff]
+# W64-REAL16: v_cmp_ge_i16 vcc, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x50,0x01,0xff]
+# W32-FAKE16: v_cmp_ge_i16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x50,0x01,0xff]
+# W64-FAKE16: v_cmp_ge_i16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x50,0x01,0xff]
 
 0xfa,0x04,0x6c,0x7c,0x01,0x5f,0x01,0x01
-# W32: v_cmp_ge_i16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x5f,0x01,0x01]
-# W64: v_cmp_ge_i16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x5f,0x01,0x01]
+# W32-REAL16: v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x5f,0x01,0x01]
+# W64-REAL16: v_cmp_ge_i16 vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x5f,0x01,0x01]
+# W32-FAKE16: v_cmp_ge_i16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x5f,0x01,0x01]
+# W64-FAKE16: v_cmp_ge_i16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x5f,0x01,0x01]
 
 0xfa,0x04,0x6c,0x7c,0x01,0x60,0x01,0x13
-# W32: v_cmp_ge_i16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x60,0x01,0x13]
-# W64: v_cmp_ge_i16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x60,0x01,0x13]
+# W32-REAL16: v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_ge_i16 vcc, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_ge_i16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_ge_i16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x60,0x01,0x13]
 
 0xfa,0xfe,0x6c,0x7c,0x7f,0x6f,0x0d,0x30
-# W32: v_cmp_ge_i16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x6c,0x7c,0x7f,0x6f,0x0d,0x30]
-# W64: v_cmp_ge_i16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x6c,0x7c,0x7f,0x6f,0x0d,0x30]
+# W32-REAL16: v_cmp_ge_i16 vcc_lo, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x6c,0x7c,0x7f,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_ge_i16 vcc, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x6c,0x7c,0x7f,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_ge_i16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x6c,0x7c,0x7f,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_ge_i16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x6c,0x7c,0x7f,0x6f,0x0d,0x30]
+
+0xfa,0xfe,0x6c,0x7c,0x7f,0x5f,0x01,0x01
+# W32-REAL16: v_cmp_ge_i16 vcc_lo, v127.l, v127.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0xfe,0x6c,0x7c,0x7f,0x5f,0x01,0x01]
+# W64-REAL16: v_cmp_ge_i16 vcc, v127.l, v127.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0xfe,0x6c,0x7c,0x7f,0x5f,0x01,0x01]
+# W32-FAKE16: v_cmp_ge_i16 vcc_lo, v127, v127 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0xfe,0x6c,0x7c,0x7f,0x5f,0x01,0x01]
+# W64-FAKE16: v_cmp_ge_i16 vcc, v127, v127 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0xfe,0x6c,0x7c,0x7f,0x5f,0x01,0x01]
+
+0xfa,0x04,0x6d,0x7c,0x81,0x60,0x01,0x13
+# W32-REAL16: v_cmp_ge_i16 vcc_lo, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x6d,0x7c,0x81,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_ge_i16 vcc, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x6d,0x7c,0x81,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_ge_i16 vcc_lo, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x6d,0x7c,0x81,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_ge_i16 vcc, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x6d,0x7c,0x81,0x60,0x01,0x13]
+
+0xfa,0xfe,0x6d,0x7c,0xff,0x6f,0x0d,0x30
+# W32-REAL16: v_cmp_ge_i16 vcc_lo, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x6d,0x7c,0xff,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_ge_i16 vcc, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x6d,0x7c,0xff,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_ge_i16 vcc_lo, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x6d,0x7c,0xff,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_ge_i16 vcc, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x6d,0x7c,0xff,0x6f,0x0d,0x30]
 
 0xfa,0x04,0x8c,0x7c,0x01,0x1b,0x00,0xff
 # W32: v_cmp_ge_i32 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x8c,0x7c,0x01,0x1b,0x00,0xff]
@@ -901,60 +1039,106 @@
 # W64: v_cmp_ge_i32 vcc, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x8d,0x7c,0xff,0x6f,0x0d,0x30]
 
 0xfa,0x04,0x7c,0x7c,0x01,0x1b,0x00,0xff
-# W32: v_cmp_ge_u16 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x1b,0x00,0xff]
-# W64: v_cmp_ge_u16 vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x1b,0x00,0xff]
+# W32-REAL16: v_cmp_ge_u16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x1b,0x00,0xff]
+# W64-REAL16: v_cmp_ge_u16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x1b,0x00,0xff]
+# W32-FAKE16: v_cmp_ge_u16 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x1b,0x00,0xff]
+# W64-FAKE16: v_cmp_ge_u16 vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x1b,0x00,0xff]
 
 0xfa,0x04,0x7c,0x7c,0x01,0xe4,0x00,0xff
-# W32: v_cmp_ge_u16 vcc_lo, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0xe4,0x00,0xff]
-# W64: v_cmp_ge_u16 vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0xe4,0x00,0xff]
+# W32-REAL16: v_cmp_ge_u16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0xe4,0x00,0xff]
+# W64-REAL16: v_cmp_ge_u16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0xe4,0x00,0xff]
+# W32-FAKE16: v_cmp_ge_u16 vcc_lo, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0xe4,0x00,0xff]
+# W64-FAKE16: v_cmp_ge_u16 vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0xe4,0x00,0xff]
 
 0xfa,0x04,0x7c,0x7c,0x01,0x40,0x01,0xff
-# W32: v_cmp_ge_u16 vcc_lo, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x40,0x01,0xff]
-# W64: v_cmp_ge_u16 vcc, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x40,0x01,0xff]
+# W32-REAL16: v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x40,0x01,0xff]
+# W64-REAL16: v_cmp_ge_u16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x40,0x01,0xff]
+# W32-FAKE16: v_cmp_ge_u16 vcc_lo, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x40,0x01,0xff]
+# W64-FAKE16: v_cmp_ge_u16 vcc, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x40,0x01,0xff]
 
 0xfa,0x04,0x7c,0x7c,0x01,0x41,0x01,0xff
-# W32: v_cmp_ge_u16 vcc_lo, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x41,0x01,0xff]
-# W64: v_cmp_ge_u16 vcc, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x41,0x01,0xff]
+# W32-REAL16: v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x41,0x01,0xff]
+# W64-REAL16: v_cmp_ge_u16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x41,0x01,0xff]
+# W32-FAKE16: v_cmp_ge_u16 vcc_lo, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x41,0x01,0xff]
+# W64-FAKE16: v_cmp_ge_u16 vcc, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x41,0x01,0xff]
 
 0xfa,0x04,0x7c,0x7c,0x01,0x01,0x01,0xff
-# W32: v_cmp_ge_u16 vcc_lo, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x01,0x01,0xff]
-# W64: v_cmp_ge_u16 vcc, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x01,0x01,0xff]
+# W32-REAL16: v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x01,0x01,0xff]
+# W64-REAL16: v_cmp_ge_u16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x01,0x01,0xff]
+# W32-FAKE16: v_cmp_ge_u16 vcc_lo, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x01,0x01,0xff]
+# W64-FAKE16: v_cmp_ge_u16 vcc, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x01,0x01,0xff]
 
 0xfa,0x04,0x7c,0x7c,0x01,0x0f,0x01,0xff
-# W32: v_cmp_ge_u16 vcc_lo, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x0f,0x01,0xff]
-# W64: v_cmp_ge_u16 vcc, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x0f,0x01,0xff]
+# W32-REAL16: v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x0f,0x01,0xff]
+# W64-REAL16: v_cmp_ge_u16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x0f,0x01,0xff]
+# W32-FAKE16: v_cmp_ge_u16 vcc_lo, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x0f,0x01,0xff]
+# W64-FAKE16: v_cmp_ge_u16 vcc, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x0f,0x01,0xff]
 
 0xfa,0x04,0x7c,0x7c,0x01,0x11,0x01,0xff
-# W32: v_cmp_ge_u16 vcc_lo, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x11,0x01,0xff]
-# W64: v_cmp_ge_u16 vcc, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x11,0x01,0xff]
+# W32-REAL16: v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x11,0x01,0xff]
+# W64-REAL16: v_cmp_ge_u16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x11,0x01,0xff]
+# W32-FAKE16: v_cmp_ge_u16 vcc_lo, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x11,0x01,0xff]
+# W64-FAKE16: v_cmp_ge_u16 vcc, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x11,0x01,0xff]
 
 0xfa,0x04,0x7c,0x7c,0x01,0x1f,0x01,0xff
-# W32: v_cmp_ge_u16 vcc_lo, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x1f,0x01,0xff]
-# W64: v_cmp_ge_u16 vcc, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x1f,0x01,0xff]
+# W32-REAL16: v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x1f,0x01,0xff]
+# W64-REAL16: v_cmp_ge_u16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x1f,0x01,0xff]
+# W32-FAKE16: v_cmp_ge_u16 vcc_lo, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x1f,0x01,0xff]
+# W64-FAKE16: v_cmp_ge_u16 vcc, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x1f,0x01,0xff]
 
 0xfa,0x04,0x7c,0x7c,0x01,0x21,0x01,0xff
-# W32: v_cmp_ge_u16 vcc_lo, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x21,0x01,0xff]
-# W64: v_cmp_ge_u16 vcc, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x21,0x01,0xff]
+# W32-REAL16: v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x21,0x01,0xff]
+# W64-REAL16: v_cmp_ge_u16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x21,0x01,0xff]
+# W32-FAKE16: v_cmp_ge_u16 vcc_lo, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x21,0x01,0xff]
+# W64-FAKE16: v_cmp_ge_u16 vcc, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x21,0x01,0xff]
 
 0xfa,0x04,0x7c,0x7c,0x01,0x2f,0x01,0xff
-# W32: v_cmp_ge_u16 vcc_lo, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x2f,0x01,0xff]
-# W64: v_cmp_ge_u16 vcc, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x2f,0x01,0xff]
+# W32-REAL16: v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x2f,0x01,0xff]
+# W64-REAL16: v_cmp_ge_u16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x2f,0x01,0xff]
+# W32-FAKE16: v_cmp_ge_u16 vcc_lo, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x2f,0x01,0xff]
+# W64-FAKE16: v_cmp_ge_u16 vcc, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x2f,0x01,0xff]
 
 0xfa,0x04,0x7c,0x7c,0x01,0x50,0x01,0xff
-# W32: v_cmp_ge_u16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x50,0x01,0xff]
-# W64: v_cmp_ge_u16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x50,0x01,0xff]
+# W32-REAL16: v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x50,0x01,0xff]
+# W64-REAL16: v_cmp_ge_u16 vcc, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x50,0x01,0xff]
+# W32-FAKE16: v_cmp_ge_u16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x50,0x01,0xff]
+# W64-FAKE16: v_cmp_ge_u16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x50,0x01,0xff]
 
 0xfa,0x04,0x7c,0x7c,0x01,0x5f,0x01,0x01
-# W32: v_cmp_ge_u16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x5f,0x01,0x01]
-# W64: v_cmp_ge_u16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x5f,0x01,0x01]
+# W32-REAL16: v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x5f,0x01,0x01]
+# W64-REAL16: v_cmp_ge_u16 vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x5f,0x01,0x01]
+# W32-FAKE16: v_cmp_ge_u16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x5f,0x01,0x01]
+# W64-FAKE16: v_cmp_ge_u16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x5f,0x01,0x01]
 
 0xfa,0x04,0x7c,0x7c,0x01,0x60,0x01,0x13
-# W32: v_cmp_ge_u16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x60,0x01,0x13]
-# W64: v_cmp_ge_u16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x60,0x01,0x13]
+# W32-REAL16: v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_ge_u16 vcc, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_ge_u16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_ge_u16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x60,0x01,0x13]
 
 0xfa,0xfe,0x7c,0x7c,0x7f,0x6f,0x0d,0x30
-# W32: v_cmp_ge_u16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x7c,0x7c,0x7f,0x6f,0x0d,0x30]
-# W64: v_cmp_ge_u16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x7c,0x7c,0x7f,0x6f,0x0d,0x30]
+# W32-REAL16: v_cmp_ge_u16 vcc_lo, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x7c,0x7c,0x7f,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_ge_u16 vcc, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x7c,0x7c,0x7f,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_ge_u16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x7c,0x7c,0x7f,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_ge_u16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x7c,0x7c,0x7f,0x6f,0x0d,0x30]
+
+0xfa,0xfe,0x7c,0x7c,0x7f,0x5f,0x01,0x01
+# W32-REAL16: v_cmp_ge_u16 vcc_lo, v127.l, v127.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0xfe,0x7c,0x7c,0x7f,0x5f,0x01,0x01]
+# W64-REAL16: v_cmp_ge_u16 vcc, v127.l, v127.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0xfe,0x7c,0x7c,0x7f,0x5f,0x01,0x01]
+# W32-FAKE16: v_cmp_ge_u16 vcc_lo, v127, v127 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0xfe,0x7c,0x7c,0x7f,0x5f,0x01,0x01]
+# W64-FAKE16: v_cmp_ge_u16 vcc, v127, v127 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0xfe,0x7c,0x7c,0x7f,0x5f,0x01,0x01]
+
+0xfa,0x04,0x7d,0x7c,0x81,0x60,0x01,0x13
+# W32-REAL16: v_cmp_ge_u16 vcc_lo, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x7d,0x7c,0x81,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_ge_u16 vcc, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x7d,0x7c,0x81,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_ge_u16 vcc_lo, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x7d,0x7c,0x81,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_ge_u16 vcc, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x7d,0x7c,0x81,0x60,0x01,0x13]
+
+0xfa,0xfe,0x7d,0x7c,0xff,0x6f,0x0d,0x30
+# W32-REAL16: v_cmp_ge_u16 vcc_lo, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x7d,0x7c,0xff,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_ge_u16 vcc, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x7d,0x7c,0xff,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_ge_u16 vcc_lo, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x7d,0x7c,0xff,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_ge_u16 vcc, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x7d,0x7c,0xff,0x6f,0x0d,0x30]
 
 0xfa,0x04,0x9c,0x7c,0x01,0x1b,0x00,0xff
 # W32: v_cmp_ge_u32 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x9c,0x7c,0x01,0x1b,0x00,0xff]
@@ -1125,60 +1309,106 @@
 # W64: v_cmp_gt_f32 vcc, -|v255|, -|v255| row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x29,0x7c,0xff,0x6f,0xfd,0x30]
 
 0xfa,0x04,0x68,0x7c,0x01,0x1b,0x00,0xff
-# W32: v_cmp_gt_i16 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x1b,0x00,0xff]
-# W64: v_cmp_gt_i16 vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x1b,0x00,0xff]
+# W32-REAL16: v_cmp_gt_i16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x1b,0x00,0xff]
+# W64-REAL16: v_cmp_gt_i16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x1b,0x00,0xff]
+# W32-FAKE16: v_cmp_gt_i16 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x1b,0x00,0xff]
+# W64-FAKE16: v_cmp_gt_i16 vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x1b,0x00,0xff]
 
 0xfa,0x04,0x68,0x7c,0x01,0xe4,0x00,0xff
-# W32: v_cmp_gt_i16 vcc_lo, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0xe4,0x00,0xff]
-# W64: v_cmp_gt_i16 vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0xe4,0x00,0xff]
+# W32-REAL16: v_cmp_gt_i16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0xe4,0x00,0xff]
+# W64-REAL16: v_cmp_gt_i16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0xe4,0x00,0xff]
+# W32-FAKE16: v_cmp_gt_i16 vcc_lo, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0xe4,0x00,0xff]
+# W64-FAKE16: v_cmp_gt_i16 vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0xe4,0x00,0xff]
 
 0xfa,0x04,0x68,0x7c,0x01,0x40,0x01,0xff
-# W32: v_cmp_gt_i16 vcc_lo, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x40,0x01,0xff]
-# W64: v_cmp_gt_i16 vcc, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x40,0x01,0xff]
+# W32-REAL16: v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x40,0x01,0xff]
+# W64-REAL16: v_cmp_gt_i16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x40,0x01,0xff]
+# W32-FAKE16: v_cmp_gt_i16 vcc_lo, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x40,0x01,0xff]
+# W64-FAKE16: v_cmp_gt_i16 vcc, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x40,0x01,0xff]
 
 0xfa,0x04,0x68,0x7c,0x01,0x41,0x01,0xff
-# W32: v_cmp_gt_i16 vcc_lo, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x41,0x01,0xff]
-# W64: v_cmp_gt_i16 vcc, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x41,0x01,0xff]
+# W32-REAL16: v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x41,0x01,0xff]
+# W64-REAL16: v_cmp_gt_i16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x41,0x01,0xff]
+# W32-FAKE16: v_cmp_gt_i16 vcc_lo, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x41,0x01,0xff]
+# W64-FAKE16: v_cmp_gt_i16 vcc, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x41,0x01,0xff]
 
 0xfa,0x04,0x68,0x7c,0x01,0x01,0x01,0xff
-# W32: v_cmp_gt_i16 vcc_lo, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x01,0x01,0xff]
-# W64: v_cmp_gt_i16 vcc, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x01,0x01,0xff]
+# W32-REAL16: v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x01,0x01,0xff]
+# W64-REAL16: v_cmp_gt_i16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x01,0x01,0xff]
+# W32-FAKE16: v_cmp_gt_i16 vcc_lo, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x01,0x01,0xff]
+# W64-FAKE16: v_cmp_gt_i16 vcc, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x01,0x01,0xff]
 
 0xfa,0x04,0x68,0x7c,0x01,0x0f,0x01,0xff
-# W32: v_cmp_gt_i16 vcc_lo, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x0f,0x01,0xff]
-# W64: v_cmp_gt_i16 vcc, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x0f,0x01,0xff]
+# W32-REAL16: v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x0f,0x01,0xff]
+# W64-REAL16: v_cmp_gt_i16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x0f,0x01,0xff]
+# W32-FAKE16: v_cmp_gt_i16 vcc_lo, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x0f,0x01,0xff]
+# W64-FAKE16: v_cmp_gt_i16 vcc, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x0f,0x01,0xff]
 
 0xfa,0x04,0x68,0x7c,0x01,0x11,0x01,0xff
-# W32: v_cmp_gt_i16 vcc_lo, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x11,0x01,0xff]
-# W64: v_cmp_gt_i16 vcc, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x11,0x01,0xff]
+# W32-REAL16: v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x11,0x01,0xff]
+# W64-REAL16: v_cmp_gt_i16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x11,0x01,0xff]
+# W32-FAKE16: v_cmp_gt_i16 vcc_lo, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x11,0x01,0xff]
+# W64-FAKE16: v_cmp_gt_i16 vcc, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x11,0x01,0xff]
 
 0xfa,0x04,0x68,0x7c,0x01,0x1f,0x01,0xff
-# W32: v_cmp_gt_i16 vcc_lo, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x1f,0x01,0xff]
-# W64: v_cmp_gt_i16 vcc, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x1f,0x01,0xff]
+# W32-REAL16: v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x1f,0x01,0xff]
+# W64-REAL16: v_cmp_gt_i16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x1f,0x01,0xff]
+# W32-FAKE16: v_cmp_gt_i16 vcc_lo, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x1f,0x01,0xff]
+# W64-FAKE16: v_cmp_gt_i16 vcc, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x1f,0x01,0xff]
 
 0xfa,0x04,0x68,0x7c,0x01,0x21,0x01,0xff
-# W32: v_cmp_gt_i16 vcc_lo, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x21,0x01,0xff]
-# W64: v_cmp_gt_i16 vcc, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x21,0x01,0xff]
+# W32-REAL16: v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x21,0x01,0xff]
+# W64-REAL16: v_cmp_gt_i16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x21,0x01,0xff]
+# W32-FAKE16: v_cmp_gt_i16 vcc_lo, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x21,0x01,0xff]
+# W64-FAKE16: v_cmp_gt_i16 vcc, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x21,0x01,0xff]
 
 0xfa,0x04,0x68,0x7c,0x01,0x2f,0x01,0xff
-# W32: v_cmp_gt_i16 vcc_lo, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x2f,0x01,0xff]
-# W64: v_cmp_gt_i16 vcc, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x2f,0x01,0xff]
+# W32-REAL16: v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x2f,0x01,0xff]
+# W64-REAL16: v_cmp_gt_i16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x2f,0x01,0xff]
+# W32-FAKE16: v_cmp_gt_i16 vcc_lo, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x2f,0x01,0xff]
+# W64-FAKE16: v_cmp_gt_i16 vcc, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x2f,0x01,0xff]
 
 0xfa,0x04,0x68,0x7c,0x01,0x50,0x01,0xff
-# W32: v_cmp_gt_i16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x50,0x01,0xff]
-# W64: v_cmp_gt_i16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x50,0x01,0xff]
+# W32-REAL16: v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x50,0x01,0xff]
+# W64-REAL16: v_cmp_gt_i16 vcc, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x50,0x01,0xff]
+# W32-FAKE16: v_cmp_gt_i16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x50,0x01,0xff]
+# W64-FAKE16: v_cmp_gt_i16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x50,0x01,0xff]
 
 0xfa,0x04,0x68,0x7c,0x01,0x5f,0x01,0x01
-# W32: v_cmp_gt_i16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x5f,0x01,0x01]
-# W64: v_cmp_gt_i16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x5f,0x01,0x01]
+# W32-REAL16: v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x5f,0x01,0x01]
+# W64-REAL16: v_cmp_gt_i16 vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x5f,0x01,0x01]
+# W32-FAKE16: v_cmp_gt_i16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x5f,0x01,0x01]
+# W64-FAKE16: v_cmp_gt_i16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x5f,0x01,0x01]
 
 0xfa,0x04,0x68,0x7c,0x01,0x60,0x01,0x13
-# W32: v_cmp_gt_i16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x60,0x01,0x13]
-# W64: v_cmp_gt_i16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x60,0x01,0x13]
+# W32-REAL16: v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_gt_i16 vcc, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_gt_i16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_gt_i16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x60,0x01,0x13]
 
 0xfa,0xfe,0x68,0x7c,0x7f,0x6f,0x0d,0x30
-# W32: v_cmp_gt_i16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x68,0x7c,0x7f,0x6f,0x0d,0x30]
-# W64: v_cmp_gt_i16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x68,0x7c,0x7f,0x6f,0x0d,0x30]
+# W32-REAL16: v_cmp_gt_i16 vcc_lo, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x68,0x7c,0x7f,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_gt_i16 vcc, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x68,0x7c,0x7f,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_gt_i16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x68,0x7c,0x7f,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_gt_i16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x68,0x7c,0x7f,0x6f,0x0d,0x30]
+
+0xfa,0xfe,0x68,0x7c,0x7f,0x5f,0x01,0x01
+# W32-REAL16: v_cmp_gt_i16 vcc_lo, v127.l, v127.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0xfe,0x68,0x7c,0x7f,0x5f,0x01,0x01]
+# W64-REAL16: v_cmp_gt_i16 vcc, v127.l, v127.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0xfe,0x68,0x7c,0x7f,0x5f,0x01,0x01]
+# W32-FAKE16: v_cmp_gt_i16 vcc_lo, v127, v127 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0xfe,0x68,0x7c,0x7f,0x5f,0x01,0x01]
+# W64-FAKE16: v_cmp_gt_i16 vcc, v127, v127 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0xfe,0x68,0x7c,0x7f,0x5f,0x01,0x01]
+
+0xfa,0x04,0x69,0x7c,0x81,0x60,0x01,0x13
+# W32-REAL16: v_cmp_gt_i16 vcc_lo, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x69,0x7c,0x81,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_gt_i16 vcc, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x69,0x7c,0x81,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_gt_i16 vcc_lo, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x69,0x7c,0x81,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_gt_i16 vcc, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x69,0x7c,0x81,0x60,0x01,0x13]
+
+0xfa,0xfe,0x69,0x7c,0xff,0x6f,0x0d,0x30
+# W32-REAL16: v_cmp_gt_i16 vcc_lo, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x69,0x7c,0xff,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_gt_i16 vcc, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x69,0x7c,0xff,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_gt_i16 vcc_lo, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x69,0x7c,0xff,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_gt_i16 vcc, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x69,0x7c,0xff,0x6f,0x0d,0x30]
 
 0xfa,0x04,0x88,0x7c,0x01,0x1b,0x00,0xff
 # W32: v_cmp_gt_i32 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x88,0x7c,0x01,0x1b,0x00,0xff]
@@ -1237,60 +1467,106 @@
 # W64: v_cmp_gt_i32 vcc, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x89,0x7c,0xff,0x6f,0x0d,0x30]
 
 0xfa,0x04,0x78,0x7c,0x01,0x1b,0x00,0xff
-# W32: v_cmp_gt_u16 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x1b,0x00,0xff]
-# W64: v_cmp_gt_u16 vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x1b,0x00,0xff]
+# W32-REAL16: v_cmp_gt_u16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x1b,0x00,0xff]
+# W64-REAL16: v_cmp_gt_u16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x1b,0x00,0xff]
+# W32-FAKE16: v_cmp_gt_u16 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x1b,0x00,0xff]
+# W64-FAKE16: v_cmp_gt_u16 vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x1b,0x00,0xff]
 
 0xfa,0x04,0x78,0x7c,0x01,0xe4,0x00,0xff
-# W32: v_cmp_gt_u16 vcc_lo, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0xe4,0x00,0xff]
-# W64: v_cmp_gt_u16 vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0xe4,0x00,0xff]
+# W32-REAL16: v_cmp_gt_u16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0xe4,0x00,0xff]
+# W64-REAL16: v_cmp_gt_u16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0xe4,0x00,0xff]
+# W32-FAKE16: v_cmp_gt_u16 vcc_lo, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0xe4,0x00,0xff]
+# W64-FAKE16: v_cmp_gt_u16 vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0xe4,0x00,0xff]
 
 0xfa,0x04,0x78,0x7c,0x01,0x40,0x01,0xff
-# W32: v_cmp_gt_u16 vcc_lo, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x40,0x01,0xff]
-# W64: v_cmp_gt_u16 vcc, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x40,0x01,0xff]
+# W32-REAL16: v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x40,0x01,0xff]
+# W64-REAL16: v_cmp_gt_u16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x40,0x01,0xff]
+# W32-FAKE16: v_cmp_gt_u16 vcc_lo, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x40,0x01,0xff]
+# W64-FAKE16: v_cmp_gt_u16 vcc, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x40,0x01,0xff]
 
 0xfa,0x04,0x78,0x7c,0x01,0x41,0x01,0xff
-# W32: v_cmp_gt_u16 vcc_lo, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x41,0x01,0xff]
-# W64: v_cmp_gt_u16 vcc, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x41,0x01,0xff]
+# W32-REAL16: v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x41,0x01,0xff]
+# W64-REAL16: v_cmp_gt_u16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x41,0x01,0xff]
+# W32-FAKE16: v_cmp_gt_u16 vcc_lo, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x41,0x01,0xff]
+# W64-FAKE16: v_cmp_gt_u16 vcc, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x41,0x01,0xff]
 
 0xfa,0x04,0x78,0x7c,0x01,0x01,0x01,0xff
-# W32: v_cmp_gt_u16 vcc_lo, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x01,0x01,0xff]
-# W64: v_cmp_gt_u16 vcc, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x01,0x01,0xff]
+# W32-REAL16: v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x01,0x01,0xff]
+# W64-REAL16: v_cmp_gt_u16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x01,0x01,0xff]
+# W32-FAKE16: v_cmp_gt_u16 vcc_lo, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x01,0x01,0xff]
+# W64-FAKE16: v_cmp_gt_u16 vcc, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x01,0x01,0xff]
 
 0xfa,0x04,0x78,0x7c,0x01,0x0f,0x01,0xff
-# W32: v_cmp_gt_u16 vcc_lo, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x0f,0x01,0xff]
-# W64: v_cmp_gt_u16 vcc, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x0f,0x01,0xff]
+# W32-REAL16: v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x0f,0x01,0xff]
+# W64-REAL16: v_cmp_gt_u16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x0f,0x01,0xff]
+# W32-FAKE16: v_cmp_gt_u16 vcc_lo, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x0f,0x01,0xff]
+# W64-FAKE16: v_cmp_gt_u16 vcc, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x0f,0x01,0xff]
 
 0xfa,0x04,0x78,0x7c,0x01,0x11,0x01,0xff
-# W32: v_cmp_gt_u16 vcc_lo, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x11,0x01,0xff]
-# W64: v_cmp_gt_u16 vcc, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x11,0x01,0xff]
+# W32-REAL16: v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x11,0x01,0xff]
+# W64-REAL16: v_cmp_gt_u16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x11,0x01,0xff]
+# W32-FAKE16: v_cmp_gt_u16 vcc_lo, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x11,0x01,0xff]
+# W64-FAKE16: v_cmp_gt_u16 vcc, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x11,0x01,0xff]
 
 0xfa,0x04,0x78,0x7c,0x01,0x1f,0x01,0xff
-# W32: v_cmp_gt_u16 vcc_lo, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x1f,0x01,0xff]
-# W64: v_cmp_gt_u16 vcc, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x1f,0x01,0xff]
+# W32-REAL16: v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x1f,0x01,0xff]
+# W64-REAL16: v_cmp_gt_u16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x1f,0x01,0xff]
+# W32-FAKE16: v_cmp_gt_u16 vcc_lo, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x1f,0x01,0xff]
+# W64-FAKE16: v_cmp_gt_u16 vcc, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x1f,0x01,0xff]
 
 0xfa,0x04,0x78,0x7c,0x01,0x21,0x01,0xff
-# W32: v_cmp_gt_u16 vcc_lo, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x21,0x01,0xff]
-# W64: v_cmp_gt_u16 vcc, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x21,0x01,0xff]
+# W32-REAL16: v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x21,0x01,0xff]
+# W64-REAL16: v_cmp_gt_u16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x21,0x01,0xff]
+# W32-FAKE16: v_cmp_gt_u16 vcc_lo, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x21,0x01,0xff]
+# W64-FAKE16: v_cmp_gt_u16 vcc, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x21,0x01,0xff]
 
 0xfa,0x04,0x78,0x7c,0x01,0x2f,0x01,0xff
-# W32: v_cmp_gt_u16 vcc_lo, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x2f,0x01,0xff]
-# W64: v_cmp_gt_u16 vcc, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x2f,0x01,0xff]
+# W32-REAL16: v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x2f,0x01,0xff]
+# W64-REAL16: v_cmp_gt_u16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x2f,0x01,0xff]
+# W32-FAKE16: v_cmp_gt_u16 vcc_lo, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x2f,0x01,0xff]
+# W64-FAKE16: v_cmp_gt_u16 vcc, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x2f,0x01,0xff]
 
 0xfa,0x04,0x78,0x7c,0x01,0x50,0x01,0xff
-# W32: v_cmp_gt_u16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x50,0x01,0xff]
-# W64: v_cmp_gt_u16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x50,0x01,0xff]
+# W32-REAL16: v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x50,0x01,0xff]
+# W64-REAL16: v_cmp_gt_u16 vcc, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x50,0x01,0xff]
+# W32-FAKE16: v_cmp_gt_u16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x50,0x01,0xff]
+# W64-FAKE16: v_cmp_gt_u16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x50,0x01,0xff]
 
 0xfa,0x04,0x78,0x7c,0x01,0x5f,0x01,0x01
-# W32: v_cmp_gt_u16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x5f,0x01,0x01]
-# W64: v_cmp_gt_u16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x5f,0x01,0x01]
+# W32-REAL16: v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x5f,0x01,0x01]
+# W64-REAL16: v_cmp_gt_u16 vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x5f,0x01,0x01]
+# W32-FAKE16: v_cmp_gt_u16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x5f,0x01,0x01]
+# W64-FAKE16: v_cmp_gt_u16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x5f,0x01,0x01]
 
 0xfa,0x04,0x78,0x7c,0x01,0x60,0x01,0x13
-# W32: v_cmp_gt_u16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x60,0x01,0x13]
-# W64: v_cmp_gt_u16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x60,0x01,0x13]
+# W32-REAL16: v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_gt_u16 vcc, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_gt_u16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_gt_u16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x60,0x01,0x13]
 
 0xfa,0xfe,0x78,0x7c,0x7f,0x6f,0x0d,0x30
-# W32: v_cmp_gt_u16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x78,0x7c,0x7f,0x6f,0x0d,0x30]
-# W64: v_cmp_gt_u16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x78,0x7c,0x7f,0x6f,0x0d,0x30]
+# W32-REAL16: v_cmp_gt_u16 vcc_lo, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x78,0x7c,0x7f,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_gt_u16 vcc, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x78,0x7c,0x7f,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_gt_u16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x78,0x7c,0x7f,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_gt_u16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x78,0x7c,0x7f,0x6f,0x0d,0x30]
+
+0xfa,0xfe,0x78,0x7c,0x7f,0x5f,0x01,0x01
+# W32-REAL16: v_cmp_gt_u16 vcc_lo, v127.l, v127.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0xfe,0x78,0x7c,0x7f,0x5f,0x01,0x01]
+# W64-REAL16: v_cmp_gt_u16 vcc, v127.l, v127.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0xfe,0x78,0x7c,0x7f,0x5f,0x01,0x01]
+# W32-FAKE16: v_cmp_gt_u16 vcc_lo, v127, v127 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0xfe,0x78,0x7c,0x7f,0x5f,0x01,0x01]
+# W64-FAKE16: v_cmp_gt_u16 vcc, v127, v127 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0xfe,0x78,0x7c,0x7f,0x5f,0x01,0x01]
+
+0xfa,0x04,0x79,0x7c,0x81,0x60,0x01,0x13
+# W32-REAL16: v_cmp_gt_u16 vcc_lo, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x79,0x7c,0x81,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_gt_u16 vcc, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x79,0x7c,0x81,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_gt_u16 vcc_lo, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x79,0x7c,0x81,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_gt_u16 vcc, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x79,0x7c,0x81,0x60,0x01,0x13]
+
+0xfa,0xfe,0x79,0x7c,0xff,0x6f,0x0d,0x30
+# W32-REAL16: v_cmp_gt_u16 vcc_lo, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x79,0x7c,0xff,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_gt_u16 vcc, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x79,0x7c,0xff,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_gt_u16 vcc_lo, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x79,0x7c,0xff,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_gt_u16 vcc, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x79,0x7c,0xff,0x6f,0x0d,0x30]
 
 0xfa,0x04,0x98,0x7c,0x01,0x1b,0x00,0xff
 # W32: v_cmp_gt_u32 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x98,0x7c,0x01,0x1b,0x00,0xff]
@@ -1461,60 +1737,106 @@
 # W64: v_cmp_le_f32 vcc, -|v255|, -|v255| row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x27,0x7c,0xff,0x6f,0xfd,0x30]
 
 0xfa,0x04,0x66,0x7c,0x01,0x1b,0x00,0xff
-# W32: v_cmp_le_i16 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x1b,0x00,0xff]
-# W64: v_cmp_le_i16 vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x1b,0x00,0xff]
+# W32-REAL16: v_cmp_le_i16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x1b,0x00,0xff]
+# W64-REAL16: v_cmp_le_i16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x1b,0x00,0xff]
+# W32-FAKE16: v_cmp_le_i16 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x1b,0x00,0xff]
+# W64-FAKE16: v_cmp_le_i16 vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x1b,0x00,0xff]
 
 0xfa,0x04,0x66,0x7c,0x01,0xe4,0x00,0xff
-# W32: v_cmp_le_i16 vcc_lo, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0xe4,0x00,0xff]
-# W64: v_cmp_le_i16 vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0xe4,0x00,0xff]
+# W32-REAL16: v_cmp_le_i16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0xe4,0x00,0xff]
+# W64-REAL16: v_cmp_le_i16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0xe4,0x00,0xff]
+# W32-FAKE16: v_cmp_le_i16 vcc_lo, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0xe4,0x00,0xff]
+# W64-FAKE16: v_cmp_le_i16 vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0xe4,0x00,0xff]
 
 0xfa,0x04,0x66,0x7c,0x01,0x40,0x01,0xff
-# W32: v_cmp_le_i16 vcc_lo, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x40,0x01,0xff]
-# W64: v_cmp_le_i16 vcc, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x40,0x01,0xff]
+# W32-REAL16: v_cmp_le_i16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x40,0x01,0xff]
+# W64-REAL16: v_cmp_le_i16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x40,0x01,0xff]
+# W32-FAKE16: v_cmp_le_i16 vcc_lo, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x40,0x01,0xff]
+# W64-FAKE16: v_cmp_le_i16 vcc, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x40,0x01,0xff]
 
 0xfa,0x04,0x66,0x7c,0x01,0x41,0x01,0xff
-# W32: v_cmp_le_i16 vcc_lo, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x41,0x01,0xff]
-# W64: v_cmp_le_i16 vcc, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x41,0x01,0xff]
+# W32-REAL16: v_cmp_le_i16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x41,0x01,0xff]
+# W64-REAL16: v_cmp_le_i16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x41,0x01,0xff]
+# W32-FAKE16: v_cmp_le_i16 vcc_lo, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x41,0x01,0xff]
+# W64-FAKE16: v_cmp_le_i16 vcc, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x41,0x01,0xff]
 
 0xfa,0x04,0x66,0x7c,0x01,0x01,0x01,0xff
-# W32: v_cmp_le_i16 vcc_lo, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x01,0x01,0xff]
-# W64: v_cmp_le_i16 vcc, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x01,0x01,0xff]
+# W32-REAL16: v_cmp_le_i16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x01,0x01,0xff]
+# W64-REAL16: v_cmp_le_i16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x01,0x01,0xff]
+# W32-FAKE16: v_cmp_le_i16 vcc_lo, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x01,0x01,0xff]
+# W64-FAKE16: v_cmp_le_i16 vcc, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x01,0x01,0xff]
 
 0xfa,0x04,0x66,0x7c,0x01,0x0f,0x01,0xff
-# W32: v_cmp_le_i16 vcc_lo, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x0f,0x01,0xff]
-# W64: v_cmp_le_i16 vcc, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x0f,0x01,0xff]
+# W32-REAL16: v_cmp_le_i16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x0f,0x01,0xff]
+# W64-REAL16: v_cmp_le_i16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x0f,0x01,0xff]
+# W32-FAKE16: v_cmp_le_i16 vcc_lo, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x0f,0x01,0xff]
+# W64-FAKE16: v_cmp_le_i16 vcc, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x0f,0x01,0xff]
 
 0xfa,0x04,0x66,0x7c,0x01,0x11,0x01,0xff
-# W32: v_cmp_le_i16 vcc_lo, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x11,0x01,0xff]
-# W64: v_cmp_le_i16 vcc, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x11,0x01,0xff]
+# W32-REAL16: v_cmp_le_i16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x11,0x01,0xff]
+# W64-REAL16: v_cmp_le_i16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x11,0x01,0xff]
+# W32-FAKE16: v_cmp_le_i16 vcc_lo, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x11,0x01,0xff]
+# W64-FAKE16: v_cmp_le_i16 vcc, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x11,0x01,0xff]
 
 0xfa,0x04,0x66,0x7c,0x01,0x1f,0x01,0xff
-# W32: v_cmp_le_i16 vcc_lo, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x1f,0x01,0xff]
-# W64: v_cmp_le_i16 vcc, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x1f,0x01,0xff]
+# W32-REAL16: v_cmp_le_i16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x1f,0x01,0xff]
+# W64-REAL16: v_cmp_le_i16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x1f,0x01,0xff]
+# W32-FAKE16: v_cmp_le_i16 vcc_lo, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x1f,0x01,0xff]
+# W64-FAKE16: v_cmp_le_i16 vcc, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x1f,0x01,0xff]
 
 0xfa,0x04,0x66,0x7c,0x01,0x21,0x01,0xff
-# W32: v_cmp_le_i16 vcc_lo, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x21,0x01,0xff]
-# W64: v_cmp_le_i16 vcc, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x21,0x01,0xff]
+# W32-REAL16: v_cmp_le_i16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x21,0x01,0xff]
+# W64-REAL16: v_cmp_le_i16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x21,0x01,0xff]
+# W32-FAKE16: v_cmp_le_i16 vcc_lo, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x21,0x01,0xff]
+# W64-FAKE16: v_cmp_le_i16 vcc, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x21,0x01,0xff]
 
 0xfa,0x04,0x66,0x7c,0x01,0x2f,0x01,0xff
-# W32: v_cmp_le_i16 vcc_lo, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x2f,0x01,0xff]
-# W64: v_cmp_le_i16 vcc, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x2f,0x01,0xff]
+# W32-REAL16: v_cmp_le_i16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x2f,0x01,0xff]
+# W64-REAL16: v_cmp_le_i16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x2f,0x01,0xff]
+# W32-FAKE16: v_cmp_le_i16 vcc_lo, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x2f,0x01,0xff]
+# W64-FAKE16: v_cmp_le_i16 vcc, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x2f,0x01,0xff]
 
 0xfa,0x04,0x66,0x7c,0x01,0x50,0x01,0xff
-# W32: v_cmp_le_i16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x50,0x01,0xff]
-# W64: v_cmp_le_i16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x50,0x01,0xff]
+# W32-REAL16: v_cmp_le_i16 vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x50,0x01,0xff]
+# W64-REAL16: v_cmp_le_i16 vcc, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x50,0x01,0xff]
+# W32-FAKE16: v_cmp_le_i16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x50,0x01,0xff]
+# W64-FAKE16: v_cmp_le_i16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x50,0x01,0xff]
 
 0xfa,0x04,0x66,0x7c,0x01,0x5f,0x01,0x01
-# W32: v_cmp_le_i16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x5f,0x01,0x01]
-# W64: v_cmp_le_i16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x5f,0x01,0x01]
+# W32-REAL16: v_cmp_le_i16 vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x5f,0x01,0x01]
+# W64-REAL16: v_cmp_le_i16 vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x5f,0x01,0x01]
+# W32-FAKE16: v_cmp_le_i16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x5f,0x01,0x01]
+# W64-FAKE16: v_cmp_le_i16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x5f,0x01,0x01]
 
 0xfa,0x04,0x66,0x7c,0x01,0x60,0x01,0x13
-# W32: v_cmp_le_i16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x60,0x01,0x13]
-# W64: v_cmp_le_i16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x60,0x01,0x13]
+# W32-REAL16: v_cmp_le_i16 vcc_lo, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_le_i16 vcc, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_le_i16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_le_i16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x60,0x01,0x13]
 
 0xfa,0xfe,0x66,0x7c,0x7f,0x6f,0x0d,0x30
-# W32: v_cmp_le_i16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x66,0x7c,0x7f,0x6f,0x0d,0x30]
-# W64: v_cmp_le_i16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x66,0x7c,0x7f,0x6f,0x0d,0x30]
+# W32-REAL16: v_cmp_le_i16 vcc_lo, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x66,0x7c,0x7f,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_le_i16 vcc, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x66,0x7c,0x7f,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_le_i16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x66,0x7c,0x7f,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_le_i16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x66,0x7c,0x7f,0x6f,0x0d,0x30]
+
+0xfa,0xfe,0x66,0x7c,0x7f,0x5f,0x01,0x01
+# W32-REAL16: v_cmp_le_i16 vcc_lo, v127.l, v127.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0xfe,0x66,0x7c,0x7f,0x5f,0x01,0x01]
+# W64-REAL16: v_cmp_le_i16 vcc, v127.l, v127.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0xfe,0x66,0x7c,0x7f,0x5f,0x01,0x01]
+# W32-FAKE16: v_cmp_le_i16 vcc_lo, v127, v127 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0xfe,0x66,0x7c,0x7f,0x5f,0x01,0x01]
+# W64-FAKE16: v_cmp_le_i16 vcc, v127, v127 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0xfe,0x66,0x7c,0x7f,0x5f,0x01,0x01]
+
+0xfa,0x04,0x67,0x7c,0x81,0x60,0x01,0x13
+# W32-REAL16: v_cmp_le_i16 vcc_lo, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x67,0x7c,0x81,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_le_i16 vcc, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x67,0x7c,0x81,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_le_i16 vcc_lo, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x67,0x7c,0x81,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_le_i16 vcc, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x67,0x7c,0x81,0x60,0x01,0x13]
+
+0xfa,0xfe,0x67,0x7c,0xff,0x6f,0x0d,0x30
+# W32-REAL16: v_cmp_le_i16 vcc_lo, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x67,0x7c,0xff,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_le_i16 vcc, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x67,0x7c,0xff,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_le_i16 vcc_lo, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x67,0x7c,0xff,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_le_i16 vcc, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x67,0x7c,0xff,0x6f,0x0d,0x30]
 
 0xfa,0x04,0x86,0x7c,0x01,0x1b,0x00,0xff
 # W32: v_cmp_le_i32 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x86,0x7c,0x01,0x1b,0x00,0xff]
@@ -1573,60 +1895,106 @@
 # W64: v_cmp_le_i32 vcc, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x87,0x7c,0xff,0x6f,0x0d,0x30]
 
 0xfa,0x04,0x76,0x7c,0x01,0x1b,0x00,0xff
-# W32: v_cmp_le_u16 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x1b,0x00,0xff]
-# W64: v_cmp_le_u16 vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x1b,0x00,0xff]
+# W32-REAL16: v_cmp_le_u16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x1b,0x00,0xff]
+# W64-REAL16: v_cmp_le_u16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x1b,0x00,0xff]
+# W32-FAKE16: v_cmp_le_u16 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x1b,0x00,0xff]
+# W64-FAKE16: v_cmp_le_u16 vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x1b,0x00,0xff]
 
 0xfa,0x04,0x76,0x7c,0x01,0xe4,0x00,0xff
-# W32: v_cmp_le_u16 vcc_lo, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0xe4,0x00,0xff]
-# W64: v_cmp_le_u16 vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0xe4,0x00,0xff]
+# W32-REAL16: v_cmp_le_u16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0xe4,0x00,0xff]
+# W64-REAL16: v_cmp_le_u16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0xe4,0x00,0xff]
+# W32-FAKE16: v_cmp_le_u16 vcc_lo, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0xe4,0x00,0xff]
+# W64-FAKE16: v_cmp_le_u16 vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0xe4,0x00,0xff]
 
 0xfa,0x04,0x76,0x7c,0x01,0x40,0x01,0xff
-# W32: v_cmp_le_u16 vcc_lo, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x40,0x01,0xff]
-# W64: v_cmp_le_u16 vcc, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x40,0x01,0xff]
+# W32-REAL16: v_cmp_le_u16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x40,0x01,0xff]
+# W64-REAL16: v_cmp_le_u16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x40,0x01,0xff]
+# W32-FAKE16: v_cmp_le_u16 vcc_lo, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x40,0x01,0xff]
+# W64-FAKE16: v_cmp_le_u16 vcc, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x40,0x01,0xff]
 
 0xfa,0x04,0x76,0x7c,0x01,0x41,0x01,0xff
-# W32: v_cmp_le_u16 vcc_lo, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x41,0x01,0xff]
-# W64: v_cmp_le_u16 vcc, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x41,0x01,0xff]
+# W32-REAL16: v_cmp_le_u16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x41,0x01,0xff]
+# W64-REAL16: v_cmp_le_u16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x41,0x01,0xff]
+# W32-FAKE16: v_cmp_le_u16 vcc_lo, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x41,0x01,0xff]
+# W64-FAKE16: v_cmp_le_u16 vcc, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x41,0x01,0xff]
 
 0xfa,0x04,0x76,0x7c,0x01,0x01,0x01,0xff
-# W32: v_cmp_le_u16 vcc_lo, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x01,0x01,0xff]
-# W64: v_cmp_le_u16 vcc, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x01,0x01,0xff]
+# W32-REAL16: v_cmp_le_u16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x01,0x01,0xff]
+# W64-REAL16: v_cmp_le_u16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x01,0x01,0xff]
+# W32-FAKE16: v_cmp_le_u16 vcc_lo, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x01,0x01,0xff]
+# W64-FAKE16: v_cmp_le_u16 vcc, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x01,0x01,0xff]
 
 0xfa,0x04,0x76,0x7c,0x01,0x0f,0x01,0xff
-# W32: v_cmp_le_u16 vcc_lo, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x0f,0x01,0xff]
-# W64: v_cmp_le_u16 vcc, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x0f,0x01,0xff]
+# W32-REAL16: v_cmp_le_u16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x0f,0x01,0xff]
+# W64-REAL16: v_cmp_le_u16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x0f,0x01,0xff]
+# W32-FAKE16: v_cmp_le_u16 vcc_lo, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x0f,0x01,0xff]
+# W64-FAKE16: v_cmp_le_u16 vcc, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x0f,0x01,0xff]
 
 0xfa,0x04,0x76,0x7c,0x01,0x11,0x01,0xff
-# W32: v_cmp_le_u16 vcc_lo, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x11,0x01,0xff]
-# W64: v_cmp_le_u16 vcc, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x11,0x01,0xff]
+# W32-REAL16: v_cmp_le_u16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x11,0x01,0xff]
+# W64-REAL16: v_cmp_le_u16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x11,0x01,0xff]
+# W32-FAKE16: v_cmp_le_u16 vcc_lo, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x11,0x01,0xff]
+# W64-FAKE16: v_cmp_le_u16 vcc, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x11,0x01,0xff]
 
 0xfa,0x04,0x76,0x7c,0x01,0x1f,0x01,0xff
-# W32: v_cmp_le_u16 vcc_lo, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x1f,0x01,0xff]
-# W64: v_cmp_le_u16 vcc, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x1f,0x01,0xff]
+# W32-REAL16: v_cmp_le_u16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x1f,0x01,0xff]
+# W64-REAL16: v_cmp_le_u16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x1f,0x01,0xff]
+# W32-FAKE16: v_cmp_le_u16 vcc_lo, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x1f,0x01,0xff]
+# W64-FAKE16: v_cmp_le_u16 vcc, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x1f,0x01,0xff]
 
 0xfa,0x04,0x76,0x7c,0x01,0x21,0x01,0xff
-# W32: v_cmp_le_u16 vcc_lo, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x21,0x01,0xff]
-# W64: v_cmp_le_u16 vcc, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x21,0x01,0xff]
+# W32-REAL16: v_cmp_le_u16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x21,0x01,0xff]
+# W64-REAL16: v_cmp_le_u16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x21,0x01,0xff]
+# W32-FAKE16: v_cmp_le_u16 vcc_lo, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x21,0x01,0xff]
+# W64-FAKE16: v_cmp_le_u16 vcc, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x21,0x01,0xff]
 
 0xfa,0x04,0x76,0x7c,0x01,0x2f,0x01,0xff
-# W32: v_cmp_le_u16 vcc_lo, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x2f,0x01,0xff]
-# W64: v_cmp_le_u16 vcc, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x2f,0x01,0xff]
+# W32-REAL16: v_cmp_le_u16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x2f,0x01,0xff]
+# W64-REAL16: v_cmp_le_u16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x2f,0x01,0xff]
+# W32-FAKE16: v_cmp_le_u16 vcc_lo, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x2f,0x01,0xff]
+# W64-FAKE16: v_cmp_le_u16 vcc, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x2f,0x01,0xff]
 
 0xfa,0x04,0x76,0x7c,0x01,0x50,0x01,0xff
-# W32: v_cmp_le_u16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x50,0x01,0xff]
-# W64: v_cmp_le_u16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x50,0x01,0xff]
+# W32-REAL16: v_cmp_le_u16 vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x50,0x01,0xff]
+# W64-REAL16: v_cmp_le_u16 vcc, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x50,0x01,0xff]
+# W32-FAKE16: v_cmp_le_u16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x50,0x01,0xff]
+# W64-FAKE16: v_cmp_le_u16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x50,0x01,0xff]
 
 0xfa,0x04,0x76,0x7c,0x01,0x5f,0x01,0x01
-# W32: v_cmp_le_u16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x5f,0x01,0x01]
-# W64: v_cmp_le_u16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x5f,0x01,0x01]
+# W32-REAL16: v_cmp_le_u16 vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x5f,0x01,0x01]
+# W64-REAL16: v_cmp_le_u16 vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x5f,0x01,0x01]
+# W32-FAKE16: v_cmp_le_u16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x5f,0x01,0x01]
+# W64-FAKE16: v_cmp_le_u16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x5f,0x01,0x01]
 
 0xfa,0x04,0x76,0x7c,0x01,0x60,0x01,0x13
-# W32: v_cmp_le_u16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x60,0x01,0x13]
-# W64: v_cmp_le_u16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x60,0x01,0x13]
+# W32-REAL16: v_cmp_le_u16 vcc_lo, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_le_u16 vcc, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_le_u16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_le_u16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x60,0x01,0x13]
 
 0xfa,0xfe,0x76,0x7c,0x7f,0x6f,0x0d,0x30
-# W32: v_cmp_le_u16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x76,0x7c,0x7f,0x6f,0x0d,0x30]
-# W64: v_cmp_le_u16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x76,0x7c,0x7f,0x6f,0x0d,0x30]
+# W32-REAL16: v_cmp_le_u16 vcc_lo, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x76,0x7c,0x7f,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_le_u16 vcc, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x76,0x7c,0x7f,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_le_u16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x76,0x7c,0x7f,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_le_u16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x76,0x7c,0x7f,0x6f,0x0d,0x30]
+
+0xfa,0xfe,0x76,0x7c,0x7f,0x5f,0x01,0x01
+# W32-REAL16: v_cmp_le_u16 vcc_lo, v127.l, v127.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0xfe,0x76,0x7c,0x7f,0x5f,0x01,0x01]
+# W64-REAL16: v_cmp_le_u16 vcc, v127.l, v127.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0xfe,0x76,0x7c,0x7f,0x5f,0x01,0x01]
+# W32-FAKE16: v_cmp_le_u16 vcc_lo, v127, v127 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0xfe,0x76,0x7c,0x7f,0x5f,0x01,0x01]
+# W64-FAKE16: v_cmp_le_u16 vcc, v127, v127 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0xfe,0x76,0x7c,0x7f,0x5f,0x01,0x01]
+
+0xfa,0x04,0x77,0x7c,0x81,0x60,0x01,0x13
+# W32-REAL16: v_cmp_le_u16 vcc_lo, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x77,0x7c,0x81,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_le_u16 vcc, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x77,0x7c,0x81,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_le_u16 vcc_lo, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x77,0x7c,0x81,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_le_u16 vcc, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x77,0x7c,0x81,0x60,0x01,0x13]
+
+0xfa,0xfe,0x77,0x7c,0xff,0x6f,0x0d,0x30
+# W32-REAL16: v_cmp_le_u16 vcc_lo, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x77,0x7c,0xff,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_le_u16 vcc, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x77,0x7c,0xff,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_le_u16 vcc_lo, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x77,0x7c,0xff,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_le_u16 vcc, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x77,0x7c,0xff,0x6f,0x0d,0x30]
 
 0xfa,0x04,0x96,0x7c,0x01,0x1b,0x00,0xff
 # W32: v_cmp_le_u32 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x96,0x7c,0x01,0x1b,0x00,0xff]
@@ -1955,60 +2323,106 @@
 # W64: v_cmp_lt_f32 vcc, -|v255|, -|v255| row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x23,0x7c,0xff,0x6f,0xfd,0x30]
 
 0xfa,0x04,0x62,0x7c,0x01,0x1b,0x00,0xff
-# W32: v_cmp_lt_i16 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x1b,0x00,0xff]
-# W64: v_cmp_lt_i16 vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x1b,0x00,0xff]
+# W32-REAL16: v_cmp_lt_i16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x1b,0x00,0xff]
+# W64-REAL16: v_cmp_lt_i16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x1b,0x00,0xff]
+# W32-FAKE16: v_cmp_lt_i16 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x1b,0x00,0xff]
+# W64-FAKE16: v_cmp_lt_i16 vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x1b,0x00,0xff]
 
 0xfa,0x04,0x62,0x7c,0x01,0xe4,0x00,0xff
-# W32: v_cmp_lt_i16 vcc_lo, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0xe4,0x00,0xff]
-# W64: v_cmp_lt_i16 vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0xe4,0x00,0xff]
+# W32-REAL16: v_cmp_lt_i16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0xe4,0x00,0xff]
+# W64-REAL16: v_cmp_lt_i16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0xe4,0x00,0xff]
+# W32-FAKE16: v_cmp_lt_i16 vcc_lo, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0xe4,0x00,0xff]
+# W64-FAKE16: v_cmp_lt_i16 vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0xe4,0x00,0xff]
 
 0xfa,0x04,0x62,0x7c,0x01,0x40,0x01,0xff
-# W32: v_cmp_lt_i16 vcc_lo, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x40,0x01,0xff]
-# W64: v_cmp_lt_i16 vcc, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x40,0x01,0xff]
+# W32-REAL16: v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x40,0x01,0xff]
+# W64-REAL16: v_cmp_lt_i16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x40,0x01,0xff]
+# W32-FAKE16: v_cmp_lt_i16 vcc_lo, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x40,0x01,0xff]
+# W64-FAKE16: v_cmp_lt_i16 vcc, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x40,0x01,0xff]
 
 0xfa,0x04,0x62,0x7c,0x01,0x41,0x01,0xff
-# W32: v_cmp_lt_i16 vcc_lo, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x41,0x01,0xff]
-# W64: v_cmp_lt_i16 vcc, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x41,0x01,0xff]
+# W32-REAL16: v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x41,0x01,0xff]
+# W64-REAL16: v_cmp_lt_i16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x41,0x01,0xff]
+# W32-FAKE16: v_cmp_lt_i16 vcc_lo, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x41,0x01,0xff]
+# W64-FAKE16: v_cmp_lt_i16 vcc, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x41,0x01,0xff]
 
 0xfa,0x04,0x62,0x7c,0x01,0x01,0x01,0xff
-# W32: v_cmp_lt_i16 vcc_lo, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x01,0x01,0xff]
-# W64: v_cmp_lt_i16 vcc, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x01,0x01,0xff]
+# W32-REAL16: v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x01,0x01,0xff]
+# W64-REAL16: v_cmp_lt_i16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x01,0x01,0xff]
+# W32-FAKE16: v_cmp_lt_i16 vcc_lo, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x01,0x01,0xff]
+# W64-FAKE16: v_cmp_lt_i16 vcc, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x01,0x01,0xff]
 
 0xfa,0x04,0x62,0x7c,0x01,0x0f,0x01,0xff
-# W32: v_cmp_lt_i16 vcc_lo, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x0f,0x01,0xff]
-# W64: v_cmp_lt_i16 vcc, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x0f,0x01,0xff]
+# W32-REAL16: v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x0f,0x01,0xff]
+# W64-REAL16: v_cmp_lt_i16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x0f,0x01,0xff]
+# W32-FAKE16: v_cmp_lt_i16 vcc_lo, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x0f,0x01,0xff]
+# W64-FAKE16: v_cmp_lt_i16 vcc, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x0f,0x01,0xff]
 
 0xfa,0x04,0x62,0x7c,0x01,0x11,0x01,0xff
-# W32: v_cmp_lt_i16 vcc_lo, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x11,0x01,0xff]
-# W64: v_cmp_lt_i16 vcc, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x11,0x01,0xff]
+# W32-REAL16: v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x11,0x01,0xff]
+# W64-REAL16: v_cmp_lt_i16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x11,0x01,0xff]
+# W32-FAKE16: v_cmp_lt_i16 vcc_lo, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x11,0x01,0xff]
+# W64-FAKE16: v_cmp_lt_i16 vcc, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x11,0x01,0xff]
 
 0xfa,0x04,0x62,0x7c,0x01,0x1f,0x01,0xff
-# W32: v_cmp_lt_i16 vcc_lo, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x1f,0x01,0xff]
-# W64: v_cmp_lt_i16 vcc, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x1f,0x01,0xff]
+# W32-REAL16: v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x1f,0x01,0xff]
+# W64-REAL16: v_cmp_lt_i16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x1f,0x01,0xff]
+# W32-FAKE16: v_cmp_lt_i16 vcc_lo, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x1f,0x01,0xff]
+# W64-FAKE16: v_cmp_lt_i16 vcc, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x1f,0x01,0xff]
 
 0xfa,0x04,0x62,0x7c,0x01,0x21,0x01,0xff
-# W32: v_cmp_lt_i16 vcc_lo, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x21,0x01,0xff]
-# W64: v_cmp_lt_i16 vcc, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x21,0x01,0xff]
+# W32-REAL16: v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x21,0x01,0xff]
+# W64-REAL16: v_cmp_lt_i16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x21,0x01,0xff]
+# W32-FAKE16: v_cmp_lt_i16 vcc_lo, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x21,0x01,0xff]
+# W64-FAKE16: v_cmp_lt_i16 vcc, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x21,0x01,0xff]
 
 0xfa,0x04,0x62,0x7c,0x01,0x2f,0x01,0xff
-# W32: v_cmp_lt_i16 vcc_lo, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x2f,0x01,0xff]
-# W64: v_cmp_lt_i16 vcc, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x2f,0x01,0xff]
+# W32-REAL16: v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x2f,0x01,0xff]
+# W64-REAL16: v_cmp_lt_i16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x2f,0x01,0xff]
+# W32-FAKE16: v_cmp_lt_i16 vcc_lo, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x2f,0x01,0xff]
+# W64-FAKE16: v_cmp_lt_i16 vcc, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x2f,0x01,0xff]
 
 0xfa,0x04,0x62,0x7c,0x01,0x50,0x01,0xff
-# W32: v_cmp_lt_i16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x50,0x01,0xff]
-# W64: v_cmp_lt_i16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x50,0x01,0xff]
+# W32-REAL16: v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x50,0x01,0xff]
+# W64-REAL16: v_cmp_lt_i16 vcc, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x50,0x01,0xff]
+# W32-FAKE16: v_cmp_lt_i16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x50,0x01,0xff]
+# W64-FAKE16: v_cmp_lt_i16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x50,0x01,0xff]
 
 0xfa,0x04,0x62,0x7c,0x01,0x5f,0x01,0x01
-# W32: v_cmp_lt_i16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x5f,0x01,0x01]
-# W64: v_cmp_lt_i16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x5f,0x01,0x01]
+# W32-REAL16: v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x5f,0x01,0x01]
+# W64-REAL16: v_cmp_lt_i16 vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x5f,0x01,0x01]
+# W32-FAKE16: v_cmp_lt_i16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x5f,0x01,0x01]
+# W64-FAKE16: v_cmp_lt_i16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x5f,0x01,0x01]
 
 0xfa,0x04,0x62,0x7c,0x01,0x60,0x01,0x13
-# W32: v_cmp_lt_i16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x60,0x01,0x13]
-# W64: v_cmp_lt_i16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x60,0x01,0x13]
+# W32-REAL16: v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_lt_i16 vcc, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_lt_i16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_lt_i16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x60,0x01,0x13]
 
 0xfa,0xfe,0x62,0x7c,0x7f,0x6f,0x0d,0x30
-# W32: v_cmp_lt_i16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x62,0x7c,0x7f,0x6f,0x0d,0x30]
-# W64: v_cmp_lt_i16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x62,0x7c,0x7f,0x6f,0x0d,0x30]
+# W32-REAL16: v_cmp_lt_i16 vcc_lo, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x62,0x7c,0x7f,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_lt_i16 vcc, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x62,0x7c,0x7f,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_lt_i16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x62,0x7c,0x7f,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_lt_i16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x62,0x7c,0x7f,0x6f,0x0d,0x30]
+
+0xfa,0xfe,0x62,0x7c,0x7f,0x5f,0x01,0x01
+# W32-REAL16: v_cmp_lt_i16 vcc_lo, v127.l, v127.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0xfe,0x62,0x7c,0x7f,0x5f,0x01,0x01]
+# W64-REAL16: v_cmp_lt_i16 vcc, v127.l, v127.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0xfe,0x62,0x7c,0x7f,0x5f,0x01,0x01]
+# W32-FAKE16: v_cmp_lt_i16 vcc_lo, v127, v127 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0xfe,0x62,0x7c,0x7f,0x5f,0x01,0x01]
+# W64-FAKE16: v_cmp_lt_i16 vcc, v127, v127 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0xfe,0x62,0x7c,0x7f,0x5f,0x01,0x01]
+
+0xfa,0x04,0x63,0x7c,0x81,0x60,0x01,0x13
+# W32-REAL16: v_cmp_lt_i16 vcc_lo, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x63,0x7c,0x81,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_lt_i16 vcc, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x63,0x7c,0x81,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_lt_i16 vcc_lo, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x63,0x7c,0x81,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_lt_i16 vcc, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x63,0x7c,0x81,0x60,0x01,0x13]
+
+0xfa,0xfe,0x63,0x7c,0xff,0x6f,0x0d,0x30
+# W32-REAL16: v_cmp_lt_i16 vcc_lo, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x63,0x7c,0xff,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_lt_i16 vcc, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x63,0x7c,0xff,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_lt_i16 vcc_lo, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x63,0x7c,0xff,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_lt_i16 vcc, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x63,0x7c,0xff,0x6f,0x0d,0x30]
 
 0xfa,0x04,0x82,0x7c,0x01,0x1b,0x00,0xff
 # W32: v_cmp_lt_i32 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x82,0x7c,0x01,0x1b,0x00,0xff]
@@ -2067,60 +2481,106 @@
 # W64: v_cmp_lt_i32 vcc, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x83,0x7c,0xff,0x6f,0x0d,0x30]
 
 0xfa,0x04,0x72,0x7c,0x01,0x1b,0x00,0xff
-# W32: v_cmp_lt_u16 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x1b,0x00,0xff]
-# W64: v_cmp_lt_u16 vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x1b,0x00,0xff]
+# W32-REAL16: v_cmp_lt_u16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x1b,0x00,0xff]
+# W64-REAL16: v_cmp_lt_u16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x1b,0x00,0xff]
+# W32-FAKE16: v_cmp_lt_u16 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x1b,0x00,0xff]
+# W64-FAKE16: v_cmp_lt_u16 vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x1b,0x00,0xff]
 
 0xfa,0x04,0x72,0x7c,0x01,0xe4,0x00,0xff
-# W32: v_cmp_lt_u16 vcc_lo, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0xe4,0x00,0xff]
-# W64: v_cmp_lt_u16 vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0xe4,0x00,0xff]
+# W32-REAL16: v_cmp_lt_u16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0xe4,0x00,0xff]
+# W64-REAL16: v_cmp_lt_u16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0xe4,0x00,0xff]
+# W32-FAKE16: v_cmp_lt_u16 vcc_lo, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0xe4,0x00,0xff]
+# W64-FAKE16: v_cmp_lt_u16 vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0xe4,0x00,0xff]
 
 0xfa,0x04,0x72,0x7c,0x01,0x40,0x01,0xff
-# W32: v_cmp_lt_u16 vcc_lo, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x40,0x01,0xff]
-# W64: v_cmp_lt_u16 vcc, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x40,0x01,0xff]
+# W32-REAL16: v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x40,0x01,0xff]
+# W64-REAL16: v_cmp_lt_u16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x40,0x01,0xff]
+# W32-FAKE16: v_cmp_lt_u16 vcc_lo, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x40,0x01,0xff]
+# W64-FAKE16: v_cmp_lt_u16 vcc, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x40,0x01,0xff]
 
 0xfa,0x04,0x72,0x7c,0x01,0x41,0x01,0xff
-# W32: v_cmp_lt_u16 vcc_lo, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x41,0x01,0xff]
-# W64: v_cmp_lt_u16 vcc, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x41,0x01,0xff]
+# W32-REAL16: v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x41,0x01,0xff]
+# W64-REAL16: v_cmp_lt_u16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x41,0x01,0xff]
+# W32-FAKE16: v_cmp_lt_u16 vcc_lo, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x41,0x01,0xff]
+# W64-FAKE16: v_cmp_lt_u16 vcc, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x41,0x01,0xff]
 
 0xfa,0x04,0x72,0x7c,0x01,0x01,0x01,0xff
-# W32: v_cmp_lt_u16 vcc_lo, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x01,0x01,0xff]
-# W64: v_cmp_lt_u16 vcc, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x01,0x01,0xff]
+# W32-REAL16: v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x01,0x01,0xff]
+# W64-REAL16: v_cmp_lt_u16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x01,0x01,0xff]
+# W32-FAKE16: v_cmp_lt_u16 vcc_lo, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x01,0x01,0xff]
+# W64-FAKE16: v_cmp_lt_u16 vcc, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x01,0x01,0xff]
 
 0xfa,0x04,0x72,0x7c,0x01,0x0f,0x01,0xff
-# W32: v_cmp_lt_u16 vcc_lo, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x0f,0x01,0xff]
-# W64: v_cmp_lt_u16 vcc, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x0f,0x01,0xff]
+# W32-REAL16: v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x0f,0x01,0xff]
+# W64-REAL16: v_cmp_lt_u16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x0f,0x01,0xff]
+# W32-FAKE16: v_cmp_lt_u16 vcc_lo, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x0f,0x01,0xff]
+# W64-FAKE16: v_cmp_lt_u16 vcc, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x0f,0x01,0xff]
 
 0xfa,0x04,0x72,0x7c,0x01,0x11,0x01,0xff
-# W32: v_cmp_lt_u16 vcc_lo, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x11,0x01,0xff]
-# W64: v_cmp_lt_u16 vcc, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x11,0x01,0xff]
+# W32-REAL16: v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x11,0x01,0xff]
+# W64-REAL16: v_cmp_lt_u16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x11,0x01,0xff]
+# W32-FAKE16: v_cmp_lt_u16 vcc_lo, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x11,0x01,0xff]
+# W64-FAKE16: v_cmp_lt_u16 vcc, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x11,0x01,0xff]
 
 0xfa,0x04,0x72,0x7c,0x01,0x1f,0x01,0xff
-# W32: v_cmp_lt_u16 vcc_lo, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x1f,0x01,0xff]
-# W64: v_cmp_lt_u16 vcc, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x1f,0x01,0xff]
+# W32-REAL16: v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x1f,0x01,0xff]
+# W64-REAL16: v_cmp_lt_u16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x1f,0x01,0xff]
+# W32-FAKE16: v_cmp_lt_u16 vcc_lo, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x1f,0x01,0xff]
+# W64-FAKE16: v_cmp_lt_u16 vcc, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x1f,0x01,0xff]
 
 0xfa,0x04,0x72,0x7c,0x01,0x21,0x01,0xff
-# W32: v_cmp_lt_u16 vcc_lo, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x21,0x01,0xff]
-# W64: v_cmp_lt_u16 vcc, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x21,0x01,0xff]
+# W32-REAL16: v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x21,0x01,0xff]
+# W64-REAL16: v_cmp_lt_u16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x21,0x01,0xff]
+# W32-FAKE16: v_cmp_lt_u16 vcc_lo, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x21,0x01,0xff]
+# W64-FAKE16: v_cmp_lt_u16 vcc, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x21,0x01,0xff]
 
 0xfa,0x04,0x72,0x7c,0x01,0x2f,0x01,0xff
-# W32: v_cmp_lt_u16 vcc_lo, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x2f,0x01,0xff]
-# W64: v_cmp_lt_u16 vcc, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x2f,0x01,0xff]
+# W32-REAL16: v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x2f,0x01,0xff]
+# W64-REAL16: v_cmp_lt_u16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x2f,0x01,0xff]
+# W32-FAKE16: v_cmp_lt_u16 vcc_lo, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x2f,0x01,0xff]
+# W64-FAKE16: v_cmp_lt_u16 vcc, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x2f,0x01,0xff]
 
 0xfa,0x04,0x72,0x7c,0x01,0x50,0x01,0xff
-# W32: v_cmp_lt_u16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x50,0x01,0xff]
-# W64: v_cmp_lt_u16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x50,0x01,0xff]
+# W32-REAL16: v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x50,0x01,0xff]
+# W64-REAL16: v_cmp_lt_u16 vcc, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x50,0x01,0xff]
+# W32-FAKE16: v_cmp_lt_u16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x50,0x01,0xff]
+# W64-FAKE16: v_cmp_lt_u16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x50,0x01,0xff]
 
 0xfa,0x04,0x72,0x7c,0x01,0x5f,0x01,0x01
-# W32: v_cmp_lt_u16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x5f,0x01,0x01]
-# W64: v_cmp_lt_u16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x5f,0x01,0x01]
+# W32-REAL16: v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x5f,0x01,0x01]
+# W64-REAL16: v_cmp_lt_u16 vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x5f,0x01,0x01]
+# W32-FAKE16: v_cmp_lt_u16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x5f,0x01,0x01]
+# W64-FAKE16: v_cmp_lt_u16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x5f,0x01,0x01]
 
 0xfa,0x04,0x72,0x7c,0x01,0x60,0x01,0x13
-# W32: v_cmp_lt_u16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x60,0x01,0x13]
-# W64: v_cmp_lt_u16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x60,0x01,0x13]
+# W32-REAL16: v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_lt_u16 vcc, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_lt_u16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_lt_u16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x60,0x01,0x13]
 
 0xfa,0xfe,0x72,0x7c,0x7f,0x6f,0x0d,0x30
-# W32: v_cmp_lt_u16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x72,0x7c,0x7f,0x6f,0x0d,0x30]
-# W64: v_cmp_lt_u16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x72,0x7c,0x7f,0x6f,0x0d,0x30]
+# W32-REAL16: v_cmp_lt_u16 vcc_lo, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x72,0x7c,0x7f,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_lt_u16 vcc, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x72,0x7c,0x7f,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_lt_u16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x72,0x7c,0x7f,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_lt_u16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x72,0x7c,0x7f,0x6f,0x0d,0x30]
+
+0xfa,0xfe,0x72,0x7c,0x7f,0x5f,0x01,0x01
+# W32-REAL16: v_cmp_lt_u16 vcc_lo, v127.l, v127.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0xfe,0x72,0x7c,0x7f,0x5f,0x01,0x01]
+# W64-REAL16: v_cmp_lt_u16 vcc, v127.l, v127.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0xfe,0x72,0x7c,0x7f,0x5f,0x01,0x01]
+# W32-FAKE16: v_cmp_lt_u16 vcc_lo, v127, v127 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0xfe,0x72,0x7c,0x7f,0x5f,0x01,0x01]
+# W64-FAKE16: v_cmp_lt_u16 vcc, v127, v127 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0xfe,0x72,0x7c,0x7f,0x5f,0x01,0x01]
+
+0xfa,0x04,0x73,0x7c,0x81,0x60,0x01,0x13
+# W32-REAL16: v_cmp_lt_u16 vcc_lo, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x73,0x7c,0x81,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_lt_u16 vcc, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x73,0x7c,0x81,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_lt_u16 vcc_lo, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x73,0x7c,0x81,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_lt_u16 vcc, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x73,0x7c,0x81,0x60,0x01,0x13]
+
+0xfa,0xfe,0x73,0x7c,0xff,0x6f,0x0d,0x30
+# W32-REAL16: v_cmp_lt_u16 vcc_lo, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x73,0x7c,0xff,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_lt_u16 vcc, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x73,0x7c,0xff,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_lt_u16 vcc_lo, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x73,0x7c,0xff,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_lt_u16 vcc, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x73,0x7c,0xff,0x6f,0x0d,0x30]
 
 0xfa,0x04,0x92,0x7c,0x01,0x1b,0x00,0xff
 # W32: v_cmp_lt_u32 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x92,0x7c,0x01,0x1b,0x00,0xff]
@@ -2179,60 +2639,106 @@
 # W64: v_cmp_lt_u32 vcc, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x93,0x7c,0xff,0x6f,0x0d,0x30]
 
 0xfa,0x04,0x6a,0x7c,0x01,0x1b,0x00,0xff
-# W32: v_cmp_ne_i16 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x1b,0x00,0xff]
-# W64: v_cmp_ne_i16 vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x1b,0x00,0xff]
+# W32-REAL16: v_cmp_ne_i16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x1b,0x00,0xff]
+# W64-REAL16: v_cmp_ne_i16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x1b,0x00,0xff]
+# W32-FAKE16: v_cmp_ne_i16 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x1b,0x00,0xff]
+# W64-FAKE16: v_cmp_ne_i16 vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x1b,0x00,0xff]
 
 0xfa,0x04,0x6a,0x7c,0x01,0xe4,0x00,0xff
-# W32: v_cmp_ne_i16 vcc_lo, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0xe4,0x00,0xff]
-# W64: v_cmp_ne_i16 vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0xe4,0x00,0xff]
+# W32-REAL16: v_cmp_ne_i16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0xe4,0x00,0xff]
+# W64-REAL16: v_cmp_ne_i16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0xe4,0x00,0xff]
+# W32-FAKE16: v_cmp_ne_i16 vcc_lo, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0xe4,0x00,0xff]
+# W64-FAKE16: v_cmp_ne_i16 vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0xe4,0x00,0xff]
 
 0xfa,0x04,0x6a,0x7c,0x01,0x40,0x01,0xff
-# W32: v_cmp_ne_i16 vcc_lo, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x40,0x01,0xff]
-# W64: v_cmp_ne_i16 vcc, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x40,0x01,0xff]
+# W32-REAL16: v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x40,0x01,0xff]
+# W64-REAL16: v_cmp_ne_i16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x40,0x01,0xff]
+# W32-FAKE16: v_cmp_ne_i16 vcc_lo, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x40,0x01,0xff]
+# W64-FAKE16: v_cmp_ne_i16 vcc, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x40,0x01,0xff]
 
 0xfa,0x04,0x6a,0x7c,0x01,0x41,0x01,0xff
-# W32: v_cmp_ne_i16 vcc_lo, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x41,0x01,0xff]
-# W64: v_cmp_ne_i16 vcc, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x41,0x01,0xff]
+# W32-REAL16: v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x41,0x01,0xff]
+# W64-REAL16: v_cmp_ne_i16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x41,0x01,0xff]
+# W32-FAKE16: v_cmp_ne_i16 vcc_lo, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x41,0x01,0xff]
+# W64-FAKE16: v_cmp_ne_i16 vcc, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x41,0x01,0xff]
 
 0xfa,0x04,0x6a,0x7c,0x01,0x01,0x01,0xff
-# W32: v_cmp_ne_i16 vcc_lo, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x01,0x01,0xff]
-# W64: v_cmp_ne_i16 vcc, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x01,0x01,0xff]
+# W32-REAL16: v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x01,0x01,0xff]
+# W64-REAL16: v_cmp_ne_i16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x01,0x01,0xff]
+# W32-FAKE16: v_cmp_ne_i16 vcc_lo, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x01,0x01,0xff]
+# W64-FAKE16: v_cmp_ne_i16 vcc, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x01,0x01,0xff]
 
 0xfa,0x04,0x6a,0x7c,0x01,0x0f,0x01,0xff
-# W32: v_cmp_ne_i16 vcc_lo, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x0f,0x01,0xff]
-# W64: v_cmp_ne_i16 vcc, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x0f,0x01,0xff]
+# W32-REAL16: v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x0f,0x01,0xff]
+# W64-REAL16: v_cmp_ne_i16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x0f,0x01,0xff]
+# W32-FAKE16: v_cmp_ne_i16 vcc_lo, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x0f,0x01,0xff]
+# W64-FAKE16: v_cmp_ne_i16 vcc, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x0f,0x01,0xff]
 
 0xfa,0x04,0x6a,0x7c,0x01,0x11,0x01,0xff
-# W32: v_cmp_ne_i16 vcc_lo, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x11,0x01,0xff]
-# W64: v_cmp_ne_i16 vcc, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x11,0x01,0xff]
+# W32-REAL16: v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x11,0x01,0xff]
+# W64-REAL16: v_cmp_ne_i16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x11,0x01,0xff]
+# W32-FAKE16: v_cmp_ne_i16 vcc_lo, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x11,0x01,0xff]
+# W64-FAKE16: v_cmp_ne_i16 vcc, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x11,0x01,0xff]
 
 0xfa,0x04,0x6a,0x7c,0x01,0x1f,0x01,0xff
-# W32: v_cmp_ne_i16 vcc_lo, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x1f,0x01,0xff]
-# W64: v_cmp_ne_i16 vcc, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x1f,0x01,0xff]
+# W32-REAL16: v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x1f,0x01,0xff]
+# W64-REAL16: v_cmp_ne_i16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x1f,0x01,0xff]
+# W32-FAKE16: v_cmp_ne_i16 vcc_lo, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x1f,0x01,0xff]
+# W64-FAKE16: v_cmp_ne_i16 vcc, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x1f,0x01,0xff]
 
 0xfa,0x04,0x6a,0x7c,0x01,0x21,0x01,0xff
-# W32: v_cmp_ne_i16 vcc_lo, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x21,0x01,0xff]
-# W64: v_cmp_ne_i16 vcc, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x21,0x01,0xff]
+# W32-REAL16: v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x21,0x01,0xff]
+# W64-REAL16: v_cmp_ne_i16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x21,0x01,0xff]
+# W32-FAKE16: v_cmp_ne_i16 vcc_lo, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x21,0x01,0xff]
+# W64-FAKE16: v_cmp_ne_i16 vcc, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x21,0x01,0xff]
 
 0xfa,0x04,0x6a,0x7c,0x01,0x2f,0x01,0xff
-# W32: v_cmp_ne_i16 vcc_lo, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x2f,0x01,0xff]
-# W64: v_cmp_ne_i16 vcc, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x2f,0x01,0xff]
+# W32-REAL16: v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x2f,0x01,0xff]
+# W64-REAL16: v_cmp_ne_i16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x2f,0x01,0xff]
+# W32-FAKE16: v_cmp_ne_i16 vcc_lo, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x2f,0x01,0xff]
+# W64-FAKE16: v_cmp_ne_i16 vcc, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x2f,0x01,0xff]
 
 0xfa,0x04,0x6a,0x7c,0x01,0x50,0x01,0xff
-# W32: v_cmp_ne_i16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x50,0x01,0xff]
-# W64: v_cmp_ne_i16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x50,0x01,0xff]
+# W32-REAL16: v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x50,0x01,0xff]
+# W64-REAL16: v_cmp_ne_i16 vcc, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x50,0x01,0xff]
+# W32-FAKE16: v_cmp_ne_i16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x50,0x01,0xff]
+# W64-FAKE16: v_cmp_ne_i16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x50,0x01,0xff]
 
 0xfa,0x04,0x6a,0x7c,0x01,0x5f,0x01,0x01
-# W32: v_cmp_ne_i16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x5f,0x01,0x01]
-# W64: v_cmp_ne_i16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x5f,0x01,0x01]
+# W32-REAL16: v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x5f,0x01,0x01]
+# W64-REAL16: v_cmp_ne_i16 vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x5f,0x01,0x01]
+# W32-FAKE16: v_cmp_ne_i16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x5f,0x01,0x01]
+# W64-FAKE16: v_cmp_ne_i16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x5f,0x01,0x01]
 
 0xfa,0x04,0x6a,0x7c,0x01,0x60,0x01,0x13
-# W32: v_cmp_ne_i16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x60,0x01,0x13]
-# W64: v_cmp_ne_i16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x60,0x01,0x13]
+# W32-REAL16: v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_ne_i16 vcc, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_ne_i16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_ne_i16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x60,0x01,0x13]
 
 0xfa,0xfe,0x6a,0x7c,0x7f,0x6f,0x0d,0x30
-# W32: v_cmp_ne_i16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x6a,0x7c,0x7f,0x6f,0x0d,0x30]
-# W64: v_cmp_ne_i16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x6a,0x7c,0x7f,0x6f,0x0d,0x30]
+# W32-REAL16: v_cmp_ne_i16 vcc_lo, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x6a,0x7c,0x7f,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_ne_i16 vcc, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x6a,0x7c,0x7f,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_ne_i16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x6a,0x7c,0x7f,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_ne_i16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x6a,0x7c,0x7f,0x6f,0x0d,0x30]
+
+0xfa,0xfe,0x6a,0x7c,0x7f,0x5f,0x01,0x01
+# W32-REAL16: v_cmp_ne_i16 vcc_lo, v127.l, v127.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0xfe,0x6a,0x7c,0x7f,0x5f,0x01,0x01]
+# W64-REAL16: v_cmp_ne_i16 vcc, v127.l, v127.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0xfe,0x6a,0x7c,0x7f,0x5f,0x01,0x01]
+# W32-FAKE16: v_cmp_ne_i16 vcc_lo, v127, v127 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0xfe,0x6a,0x7c,0x7f,0x5f,0x01,0x01]
+# W64-FAKE16: v_cmp_ne_i16 vcc, v127, v127 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0xfe,0x6a,0x7c,0x7f,0x5f,0x01,0x01]
+
+0xfa,0x04,0x6b,0x7c,0x81,0x60,0x01,0x13
+# W32-REAL16: v_cmp_ne_i16 vcc_lo, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x6b,0x7c,0x81,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_ne_i16 vcc, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x6b,0x7c,0x81,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_ne_i16 vcc_lo, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x6b,0x7c,0x81,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_ne_i16 vcc, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x6b,0x7c,0x81,0x60,0x01,0x13]
+
+0xfa,0xfe,0x6b,0x7c,0xff,0x6f,0x0d,0x30
+# W32-REAL16: v_cmp_ne_i16 vcc_lo, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x6b,0x7c,0xff,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_ne_i16 vcc, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x6b,0x7c,0xff,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_ne_i16 vcc_lo, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x6b,0x7c,0xff,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_ne_i16 vcc, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x6b,0x7c,0xff,0x6f,0x0d,0x30]
 
 0xfa,0x04,0x8a,0x7c,0x01,0x1b,0x00,0xff
 # W32: v_cmp_ne_i32 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x8a,0x7c,0x01,0x1b,0x00,0xff]
@@ -2291,60 +2797,106 @@
 # W64: v_cmp_ne_i32 vcc, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x8b,0x7c,0xff,0x6f,0x0d,0x30]
 
 0xfa,0x04,0x7a,0x7c,0x01,0x1b,0x00,0xff
-# W32: v_cmp_ne_u16 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x1b,0x00,0xff]
-# W64: v_cmp_ne_u16 vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x1b,0x00,0xff]
+# W32-REAL16: v_cmp_ne_u16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x1b,0x00,0xff]
+# W64-REAL16: v_cmp_ne_u16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x1b,0x00,0xff]
+# W32-FAKE16: v_cmp_ne_u16 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x1b,0x00,0xff]
+# W64-FAKE16: v_cmp_ne_u16 vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x1b,0x00,0xff]
 
 0xfa,0x04,0x7a,0x7c,0x01,0xe4,0x00,0xff
-# W32: v_cmp_ne_u16 vcc_lo, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0xe4,0x00,0xff]
-# W64: v_cmp_ne_u16 vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0xe4,0x00,0xff]
+# W32-REAL16: v_cmp_ne_u16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0xe4,0x00,0xff]
+# W64-REAL16: v_cmp_ne_u16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0xe4,0x00,0xff]
+# W32-FAKE16: v_cmp_ne_u16 vcc_lo, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0xe4,0x00,0xff]
+# W64-FAKE16: v_cmp_ne_u16 vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0xe4,0x00,0xff]
 
 0xfa,0x04,0x7a,0x7c,0x01,0x40,0x01,0xff
-# W32: v_cmp_ne_u16 vcc_lo, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x40,0x01,0xff]
-# W64: v_cmp_ne_u16 vcc, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x40,0x01,0xff]
+# W32-REAL16: v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x40,0x01,0xff]
+# W64-REAL16: v_cmp_ne_u16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x40,0x01,0xff]
+# W32-FAKE16: v_cmp_ne_u16 vcc_lo, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x40,0x01,0xff]
+# W64-FAKE16: v_cmp_ne_u16 vcc, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x40,0x01,0xff]
 
 0xfa,0x04,0x7a,0x7c,0x01,0x41,0x01,0xff
-# W32: v_cmp_ne_u16 vcc_lo, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x41,0x01,0xff]
-# W64: v_cmp_ne_u16 vcc, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x41,0x01,0xff]
+# W32-REAL16: v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x41,0x01,0xff]
+# W64-REAL16: v_cmp_ne_u16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x41,0x01,0xff]
+# W32-FAKE16: v_cmp_ne_u16 vcc_lo, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x41,0x01,0xff]
+# W64-FAKE16: v_cmp_ne_u16 vcc, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x41,0x01,0xff]
 
 0xfa,0x04,0x7a,0x7c,0x01,0x01,0x01,0xff
-# W32: v_cmp_ne_u16 vcc_lo, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x01,0x01,0xff]
-# W64: v_cmp_ne_u16 vcc, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x01,0x01,0xff]
+# W32-REAL16: v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x01,0x01,0xff]
+# W64-REAL16: v_cmp_ne_u16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x01,0x01,0xff]
+# W32-FAKE16: v_cmp_ne_u16 vcc_lo, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x01,0x01,0xff]
+# W64-FAKE16: v_cmp_ne_u16 vcc, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x01,0x01,0xff]
 
 0xfa,0x04,0x7a,0x7c,0x01,0x0f,0x01,0xff
-# W32: v_cmp_ne_u16 vcc_lo, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x0f,0x01,0xff]
-# W64: v_cmp_ne_u16 vcc, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x0f,0x01,0xff]
+# W32-REAL16: v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x0f,0x01,0xff]
+# W64-REAL16: v_cmp_ne_u16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x0f,0x01,0xff]
+# W32-FAKE16: v_cmp_ne_u16 vcc_lo, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x0f,0x01,0xff]
+# W64-FAKE16: v_cmp_ne_u16 vcc, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x0f,0x01,0xff]
 
 0xfa,0x04,0x7a,0x7c,0x01,0x11,0x01,0xff
-# W32: v_cmp_ne_u16 vcc_lo, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x11,0x01,0xff]
-# W64: v_cmp_ne_u16 vcc, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x11,0x01,0xff]
+# W32-REAL16: v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x11,0x01,0xff]
+# W64-REAL16: v_cmp_ne_u16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x11,0x01,0xff]
+# W32-FAKE16: v_cmp_ne_u16 vcc_lo, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x11,0x01,0xff]
+# W64-FAKE16: v_cmp_ne_u16 vcc, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x11,0x01,0xff]
 
 0xfa,0x04,0x7a,0x7c,0x01,0x1f,0x01,0xff
-# W32: v_cmp_ne_u16 vcc_lo, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x1f,0x01,0xff]
-# W64: v_cmp_ne_u16 vcc, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x1f,0x01,0xff]
+# W32-REAL16: v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x1f,0x01,0xff]
+# W64-REAL16: v_cmp_ne_u16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x1f,0x01,0xff]
+# W32-FAKE16: v_cmp_ne_u16 vcc_lo, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x1f,0x01,0xff]
+# W64-FAKE16: v_cmp_ne_u16 vcc, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x1f,0x01,0xff]
 
 0xfa,0x04,0x7a,0x7c,0x01,0x21,0x01,0xff
-# W32: v_cmp_ne_u16 vcc_lo, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x21,0x01,0xff]
-# W64: v_cmp_ne_u16 vcc, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x21,0x01,0xff]
+# W32-REAL16: v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x21,0x01,0xff]
+# W64-REAL16: v_cmp_ne_u16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x21,0x01,0xff]
+# W32-FAKE16: v_cmp_ne_u16 vcc_lo, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x21,0x01,0xff]
+# W64-FAKE16: v_cmp_ne_u16 vcc, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x21,0x01,0xff]
 
 0xfa,0x04,0x7a,0x7c,0x01,0x2f,0x01,0xff
-# W32: v_cmp_ne_u16 vcc_lo, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x2f,0x01,0xff]
-# W64: v_cmp_ne_u16 vcc, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x2f,0x01,0xff]
+# W32-REAL16: v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x2f,0x01,0xff]
+# W64-REAL16: v_cmp_ne_u16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x2f,0x01,0xff]
+# W32-FAKE16: v_cmp_ne_u16 vcc_lo, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x2f,0x01,0xff]
+# W64-FAKE16: v_cmp_ne_u16 vcc, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x2f,0x01,0xff]
 
 0xfa,0x04,0x7a,0x7c,0x01,0x50,0x01,0xff
-# W32: v_cmp_ne_u16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x50,0x01,0xff]
-# W64: v_cmp_ne_u16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x50,0x01,0xff]
+# W32-REAL16: v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x50,0x01,0xff]
+# W64-REAL16: v_cmp_ne_u16 vcc, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x50,0x01,0xff]
+# W32-FAKE16: v_cmp_ne_u16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x50,0x01,0xff]
+# W64-FAKE16: v_cmp_ne_u16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x50,0x01,0xff]
 
 0xfa,0x04,0x7a,0x7c,0x01,0x5f,0x01,0x01
-# W32: v_cmp_ne_u16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x5f,0x01,0x01]
-# W64: v_cmp_ne_u16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x5f,0x01,0x01]
+# W32-REAL16: v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x5f,0x01,0x01]
+# W64-REAL16: v_cmp_ne_u16 vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x5f,0x01,0x01]
+# W32-FAKE16: v_cmp_ne_u16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x5f,0x01,0x01]
+# W64-FAKE16: v_cmp_ne_u16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x5f,0x01,0x01]
 
 0xfa,0x04,0x7a,0x7c,0x01,0x60,0x01,0x13
-# W32: v_cmp_ne_u16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x60,0x01,0x13]
-# W64: v_cmp_ne_u16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x60,0x01,0x13]
+# W32-REAL16: v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_ne_u16 vcc, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_ne_u16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_ne_u16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x60,0x01,0x13]
 
 0xfa,0xfe,0x7a,0x7c,0x7f,0x6f,0x0d,0x30
-# W32: v_cmp_ne_u16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x7a,0x7c,0x7f,0x6f,0x0d,0x30]
-# W64: v_cmp_ne_u16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x7a,0x7c,0x7f,0x6f,0x0d,0x30]
+# W32-REAL16: v_cmp_ne_u16 vcc_lo, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x7a,0x7c,0x7f,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_ne_u16 vcc, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x7a,0x7c,0x7f,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_ne_u16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x7a,0x7c,0x7f,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_ne_u16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x7a,0x7c,0x7f,0x6f,0x0d,0x30]
+
+0xfa,0xfe,0x7a,0x7c,0x7f,0x5f,0x01,0x01
+# W32-REAL16: v_cmp_ne_u16 vcc_lo, v127.l, v127.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0xfe,0x7a,0x7c,0x7f,0x5f,0x01,0x01]
+# W64-REAL16: v_cmp_ne_u16 vcc, v127.l, v127.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0xfe,0x7a,0x7c,0x7f,0x5f,0x01,0x01]
+# W32-FAKE16: v_cmp_ne_u16 vcc_lo, v127, v127 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0xfe,0x7a,0x7c,0x7f,0x5f,0x01,0x01]
+# W64-FAKE16: v_cmp_ne_u16 vcc, v127, v127 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0xfe,0x7a,0x7c,0x7f,0x5f,0x01,0x01]
+
+0xfa,0x04,0x7b,0x7c,0x81,0x60,0x01,0x13
+# W32-REAL16: v_cmp_ne_u16 vcc_lo, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x7b,0x7c,0x81,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_ne_u16 vcc, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x7b,0x7c,0x81,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_ne_u16 vcc_lo, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x7b,0x7c,0x81,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_ne_u16 vcc, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x7b,0x7c,0x81,0x60,0x01,0x13]
+
+0xfa,0xfe,0x7b,0x7c,0xff,0x6f,0x0d,0x30
+# W32-REAL16: v_cmp_ne_u16 vcc_lo, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x7b,0x7c,0xff,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_ne_u16 vcc, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x7b,0x7c,0xff,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_ne_u16 vcc_lo, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x7b,0x7c,0xff,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_ne_u16 vcc, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x7b,0x7c,0xff,0x6f,0x0d,0x30]
 
 0xfa,0x04,0x9a,0x7c,0x01,0x1b,0x00,0xff
 # W32: v_cmp_ne_u32 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x9a,0x7c,0x01,0x1b,0x00,0xff]
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopc_dpp8.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopc_dpp8.txt
index 998f8ea6618ca6..4830bec554afcc 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopc_dpp8.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopc_dpp8.txt
@@ -37,12 +37,34 @@
 # W64: v_cmp_eq_f32 vcc, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x25,0x7c,0xff,0x00,0x00,0x00]
 
 0xe9,0x04,0x64,0x7c,0x01,0x77,0x39,0x05
-# W32: v_cmp_eq_i16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x64,0x7c,0x01,0x77,0x39,0x05]
-# W64: v_cmp_eq_i16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x64,0x7c,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_eq_i16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x64,0x7c,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_eq_i16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x64,0x7c,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_eq_i16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x64,0x7c,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_eq_i16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x64,0x7c,0x01,0x77,0x39,0x05]
 
 0xea,0xfe,0x64,0x7c,0x7f,0x00,0x00,0x00
-# W32: v_cmp_eq_i16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x64,0x7c,0x7f,0x00,0x00,0x00]
-# W64: v_cmp_eq_i16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x64,0x7c,0x7f,0x00,0x00,0x00]
+# W32-REAL16: v_cmp_eq_i16 vcc_lo, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x64,0x7c,0x7f,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_eq_i16 vcc, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x64,0x7c,0x7f,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_eq_i16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x64,0x7c,0x7f,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_eq_i16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x64,0x7c,0x7f,0x00,0x00,0x00]
+
+0xe9,0xfe,0x64,0x7c,0x7f,0x77,0x39,0x05
+# W32-REAL16: v_cmp_eq_i16 vcc_lo, v127.l, v127.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0xfe,0x64,0x7c,0x7f,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_eq_i16 vcc, v127.l, v127.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0xfe,0x64,0x7c,0x7f,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_eq_i16 vcc_lo, v127, v127 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0xfe,0x64,0x7c,0x7f,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_eq_i16 vcc, v127, v127 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0xfe,0x64,0x7c,0x7f,0x77,0x39,0x05]
+
+0xe9,0x04,0x65,0x7c,0x81,0x77,0x39,0x05
+# W32-REAL16: v_cmp_eq_i16 vcc_lo, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x65,0x7c,0x81,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_eq_i16 vcc, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x65,0x7c,0x81,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_eq_i16 vcc_lo, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x65,0x7c,0x81,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_eq_i16 vcc, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x65,0x7c,0x81,0x77,0x39,0x05]
+
+0xea,0xfe,0x65,0x7c,0xff,0x00,0x00,0x00
+# W32-REAL16: v_cmp_eq_i16 vcc_lo, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x65,0x7c,0xff,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_eq_i16 vcc, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x65,0x7c,0xff,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_eq_i16 vcc_lo, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x65,0x7c,0xff,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_eq_i16 vcc, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x65,0x7c,0xff,0x00,0x00,0x00]
 
 0xe9,0x04,0x84,0x7c,0x01,0x77,0x39,0x05
 # W32: v_cmp_eq_i32 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x84,0x7c,0x01,0x77,0x39,0x05]
@@ -53,12 +75,34 @@
 # W64: v_cmp_eq_i32 vcc, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x85,0x7c,0xff,0x00,0x00,0x00]
 
 0xe9,0x04,0x74,0x7c,0x01,0x77,0x39,0x05
-# W32: v_cmp_eq_u16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x74,0x7c,0x01,0x77,0x39,0x05]
-# W64: v_cmp_eq_u16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x74,0x7c,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_eq_u16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x74,0x7c,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_eq_u16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x74,0x7c,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_eq_u16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x74,0x7c,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_eq_u16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x74,0x7c,0x01,0x77,0x39,0x05]
 
 0xea,0xfe,0x74,0x7c,0x7f,0x00,0x00,0x00
-# W32: v_cmp_eq_u16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x74,0x7c,0x7f,0x00,0x00,0x00]
-# W64: v_cmp_eq_u16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x74,0x7c,0x7f,0x00,0x00,0x00]
+# W32-REAL16: v_cmp_eq_u16 vcc_lo, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x74,0x7c,0x7f,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_eq_u16 vcc, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x74,0x7c,0x7f,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_eq_u16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x74,0x7c,0x7f,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_eq_u16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x74,0x7c,0x7f,0x00,0x00,0x00]
+
+0xe9,0xfe,0x74,0x7c,0x7f,0x77,0x39,0x05
+# W32-REAL16: v_cmp_eq_u16 vcc_lo, v127.l, v127.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0xfe,0x74,0x7c,0x7f,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_eq_u16 vcc, v127.l, v127.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0xfe,0x74,0x7c,0x7f,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_eq_u16 vcc_lo, v127, v127 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0xfe,0x74,0x7c,0x7f,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_eq_u16 vcc, v127, v127 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0xfe,0x74,0x7c,0x7f,0x77,0x39,0x05]
+
+0xe9,0x04,0x75,0x7c,0x81,0x77,0x39,0x05
+# W32-REAL16: v_cmp_eq_u16 vcc_lo, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x75,0x7c,0x81,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_eq_u16 vcc, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x75,0x7c,0x81,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_eq_u16 vcc_lo, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x75,0x7c,0x81,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_eq_u16 vcc, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x75,0x7c,0x81,0x77,0x39,0x05]
+
+0xea,0xfe,0x75,0x7c,0xff,0x00,0x00,0x00
+# W32-REAL16: v_cmp_eq_u16 vcc_lo, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x75,0x7c,0xff,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_eq_u16 vcc, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x75,0x7c,0xff,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_eq_u16 vcc_lo, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x75,0x7c,0xff,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_eq_u16 vcc, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x75,0x7c,0xff,0x00,0x00,0x00]
 
 0xe9,0x04,0x94,0x7c,0x01,0x77,0x39,0x05
 # W32: v_cmp_eq_u32 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x94,0x7c,0x01,0x77,0x39,0x05]
@@ -117,12 +161,34 @@
 # W64: v_cmp_ge_f32 vcc, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x2d,0x7c,0xff,0x00,0x00,0x00]
 
 0xe9,0x04,0x6c,0x7c,0x01,0x77,0x39,0x05
-# W32: v_cmp_ge_i16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x6c,0x7c,0x01,0x77,0x39,0x05]
-# W64: v_cmp_ge_i16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x6c,0x7c,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_ge_i16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x6c,0x7c,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_ge_i16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x6c,0x7c,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_ge_i16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x6c,0x7c,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_ge_i16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x6c,0x7c,0x01,0x77,0x39,0x05]
 
 0xea,0xfe,0x6c,0x7c,0x7f,0x00,0x00,0x00
-# W32: v_cmp_ge_i16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x6c,0x7c,0x7f,0x00,0x00,0x00]
-# W64: v_cmp_ge_i16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x6c,0x7c,0x7f,0x00,0x00,0x00]
+# W32-REAL16: v_cmp_ge_i16 vcc_lo, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x6c,0x7c,0x7f,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_ge_i16 vcc, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x6c,0x7c,0x7f,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_ge_i16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x6c,0x7c,0x7f,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_ge_i16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x6c,0x7c,0x7f,0x00,0x00,0x00]
+
+0xe9,0xfe,0x6c,0x7c,0x7f,0x77,0x39,0x05
+# W32-REAL16: v_cmp_ge_i16 vcc_lo, v127.l, v127.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0xfe,0x6c,0x7c,0x7f,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_ge_i16 vcc, v127.l, v127.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0xfe,0x6c,0x7c,0x7f,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_ge_i16 vcc_lo, v127, v127 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0xfe,0x6c,0x7c,0x7f,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_ge_i16 vcc, v127, v127 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0xfe,0x6c,0x7c,0x7f,0x77,0x39,0x05]
+
+0xe9,0x04,0x6d,0x7c,0x81,0x77,0x39,0x05
+# W32-REAL16: v_cmp_ge_i16 vcc_lo, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x6d,0x7c,0x81,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_ge_i16 vcc, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x6d,0x7c,0x81,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_ge_i16 vcc_lo, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x6d,0x7c,0x81,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_ge_i16 vcc, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x6d,0x7c,0x81,0x77,0x39,0x05]
+
+0xea,0xfe,0x6d,0x7c,0xff,0x00,0x00,0x00
+# W32-REAL16: v_cmp_ge_i16 vcc_lo, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x6d,0x7c,0xff,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_ge_i16 vcc, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x6d,0x7c,0xff,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_ge_i16 vcc_lo, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x6d,0x7c,0xff,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_ge_i16 vcc, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x6d,0x7c,0xff,0x00,0x00,0x00]
 
 0xe9,0x04,0x8c,0x7c,0x01,0x77,0x39,0x05
 # W32: v_cmp_ge_i32 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x8c,0x7c,0x01,0x77,0x39,0x05]
@@ -133,12 +199,34 @@
 # W64: v_cmp_ge_i32 vcc, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x8d,0x7c,0xff,0x00,0x00,0x00]
 
 0xe9,0x04,0x7c,0x7c,0x01,0x77,0x39,0x05
-# W32: v_cmp_ge_u16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x7c,0x7c,0x01,0x77,0x39,0x05]
-# W64: v_cmp_ge_u16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x7c,0x7c,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_ge_u16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x7c,0x7c,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_ge_u16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x7c,0x7c,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_ge_u16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x7c,0x7c,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_ge_u16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x7c,0x7c,0x01,0x77,0x39,0x05]
 
 0xea,0xfe,0x7c,0x7c,0x7f,0x00,0x00,0x00
-# W32: v_cmp_ge_u16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x7c,0x7c,0x7f,0x00,0x00,0x00]
-# W64: v_cmp_ge_u16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x7c,0x7c,0x7f,0x00,0x00,0x00]
+# W32-REAL16: v_cmp_ge_u16 vcc_lo, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x7c,0x7c,0x7f,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_ge_u16 vcc, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x7c,0x7c,0x7f,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_ge_u16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x7c,0x7c,0x7f,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_ge_u16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x7c,0x7c,0x7f,0x00,0x00,0x00]
+
+0xe9,0xfe,0x7c,0x7c,0x7f,0x77,0x39,0x05
+# W32-REAL16: v_cmp_ge_u16 vcc_lo, v127.l, v127.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0xfe,0x7c,0x7c,0x7f,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_ge_u16 vcc, v127.l, v127.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0xfe,0x7c,0x7c,0x7f,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_ge_u16 vcc_lo, v127, v127 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0xfe,0x7c,0x7c,0x7f,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_ge_u16 vcc, v127, v127 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0xfe,0x7c,0x7c,0x7f,0x77,0x39,0x05]
+
+0xe9,0x04,0x7d,0x7c,0x81,0x77,0x39,0x05
+# W32-REAL16: v_cmp_ge_u16 vcc_lo, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x7d,0x7c,0x81,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_ge_u16 vcc, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x7d,0x7c,0x81,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_ge_u16 vcc_lo, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x7d,0x7c,0x81,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_ge_u16 vcc, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x7d,0x7c,0x81,0x77,0x39,0x05]
+
+0xea,0xfe,0x7d,0x7c,0xff,0x00,0x00,0x00
+# W32-REAL16: v_cmp_ge_u16 vcc_lo, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x7d,0x7c,0xff,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_ge_u16 vcc, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x7d,0x7c,0xff,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_ge_u16 vcc_lo, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x7d,0x7c,0xff,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_ge_u16 vcc, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x7d,0x7c,0xff,0x00,0x00,0x00]
 
 0xe9,0x04,0x9c,0x7c,0x01,0x77,0x39,0x05
 # W32: v_cmp_ge_u32 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x9c,0x7c,0x01,0x77,0x39,0x05]
@@ -165,12 +253,34 @@
 # W64: v_cmp_gt_f32 vcc, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x29,0x7c,0xff,0x00,0x00,0x00]
 
 0xe9,0x04,0x68,0x7c,0x01,0x77,0x39,0x05
-# W32: v_cmp_gt_i16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x68,0x7c,0x01,0x77,0x39,0x05]
-# W64: v_cmp_gt_i16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x68,0x7c,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_gt_i16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x68,0x7c,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_gt_i16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x68,0x7c,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_gt_i16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x68,0x7c,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_gt_i16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x68,0x7c,0x01,0x77,0x39,0x05]
 
 0xea,0xfe,0x68,0x7c,0x7f,0x00,0x00,0x00
-# W32: v_cmp_gt_i16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x68,0x7c,0x7f,0x00,0x00,0x00]
-# W64: v_cmp_gt_i16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x68,0x7c,0x7f,0x00,0x00,0x00]
+# W32-REAL16: v_cmp_gt_i16 vcc_lo, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x68,0x7c,0x7f,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_gt_i16 vcc, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x68,0x7c,0x7f,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_gt_i16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x68,0x7c,0x7f,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_gt_i16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x68,0x7c,0x7f,0x00,0x00,0x00]
+
+0xe9,0xfe,0x68,0x7c,0x7f,0x77,0x39,0x05
+# W32-REAL16: v_cmp_gt_i16 vcc_lo, v127.l, v127.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0xfe,0x68,0x7c,0x7f,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_gt_i16 vcc, v127.l, v127.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0xfe,0x68,0x7c,0x7f,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_gt_i16 vcc_lo, v127, v127 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0xfe,0x68,0x7c,0x7f,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_gt_i16 vcc, v127, v127 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0xfe,0x68,0x7c,0x7f,0x77,0x39,0x05]
+
+0xe9,0x04,0x69,0x7c,0x81,0x77,0x39,0x05
+# W32-REAL16: v_cmp_gt_i16 vcc_lo, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x69,0x7c,0x81,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_gt_i16 vcc, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x69,0x7c,0x81,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_gt_i16 vcc_lo, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x69,0x7c,0x81,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_gt_i16 vcc, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x69,0x7c,0x81,0x77,0x39,0x05]
+
+0xea,0xfe,0x69,0x7c,0xff,0x00,0x00,0x00
+# W32-REAL16: v_cmp_gt_i16 vcc_lo, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x69,0x7c,0xff,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_gt_i16 vcc, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x69,0x7c,0xff,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_gt_i16 vcc_lo, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x69,0x7c,0xff,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_gt_i16 vcc, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x69,0x7c,0xff,0x00,0x00,0x00]
 
 0xe9,0x04,0x88,0x7c,0x01,0x77,0x39,0x05
 # W32: v_cmp_gt_i32 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x88,0x7c,0x01,0x77,0x39,0x05]
@@ -181,12 +291,34 @@
 # W64: v_cmp_gt_i32 vcc, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x89,0x7c,0xff,0x00,0x00,0x00]
 
 0xe9,0x04,0x78,0x7c,0x01,0x77,0x39,0x05
-# W32: v_cmp_gt_u16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x78,0x7c,0x01,0x77,0x39,0x05]
-# W64: v_cmp_gt_u16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x78,0x7c,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_gt_u16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x78,0x7c,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_gt_u16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x78,0x7c,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_gt_u16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x78,0x7c,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_gt_u16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x78,0x7c,0x01,0x77,0x39,0x05]
 
 0xea,0xfe,0x78,0x7c,0x7f,0x00,0x00,0x00
-# W32: v_cmp_gt_u16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x78,0x7c,0x7f,0x00,0x00,0x00]
-# W64: v_cmp_gt_u16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x78,0x7c,0x7f,0x00,0x00,0x00]
+# W32-REAL16: v_cmp_gt_u16 vcc_lo, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x78,0x7c,0x7f,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_gt_u16 vcc, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x78,0x7c,0x7f,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_gt_u16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x78,0x7c,0x7f,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_gt_u16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x78,0x7c,0x7f,0x00,0x00,0x00]
+
+0xe9,0xfe,0x78,0x7c,0x7f,0x77,0x39,0x05
+# W32-REAL16: v_cmp_gt_u16 vcc_lo, v127.l, v127.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0xfe,0x78,0x7c,0x7f,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_gt_u16 vcc, v127.l, v127.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0xfe,0x78,0x7c,0x7f,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_gt_u16 vcc_lo, v127, v127 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0xfe,0x78,0x7c,0x7f,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_gt_u16 vcc, v127, v127 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0xfe,0x78,0x7c,0x7f,0x77,0x39,0x05]
+
+0xe9,0x04,0x79,0x7c,0x81,0x77,0x39,0x05
+# W32-REAL16: v_cmp_gt_u16 vcc_lo, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x79,0x7c,0x81,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_gt_u16 vcc, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x79,0x7c,0x81,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_gt_u16 vcc_lo, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x79,0x7c,0x81,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_gt_u16 vcc, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x79,0x7c,0x81,0x77,0x39,0x05]
+
+0xea,0xfe,0x79,0x7c,0xff,0x00,0x00,0x00
+# W32-REAL16: v_cmp_gt_u16 vcc_lo, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x79,0x7c,0xff,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_gt_u16 vcc, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x79,0x7c,0xff,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_gt_u16 vcc_lo, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x79,0x7c,0xff,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_gt_u16 vcc, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x79,0x7c,0xff,0x00,0x00,0x00]
 
 0xe9,0x04,0x98,0x7c,0x01,0x77,0x39,0x05
 # W32: v_cmp_gt_u32 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x98,0x7c,0x01,0x77,0x39,0x05]
@@ -213,12 +345,34 @@
 # W64: v_cmp_le_f32 vcc, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x27,0x7c,0xff,0x00,0x00,0x00]
 
 0xe9,0x04,0x66,0x7c,0x01,0x77,0x39,0x05
-# W32: v_cmp_le_i16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x66,0x7c,0x01,0x77,0x39,0x05]
-# W64: v_cmp_le_i16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x66,0x7c,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_le_i16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x66,0x7c,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_le_i16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x66,0x7c,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_le_i16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x66,0x7c,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_le_i16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x66,0x7c,0x01,0x77,0x39,0x05]
 
 0xea,0xfe,0x66,0x7c,0x7f,0x00,0x00,0x00
-# W32: v_cmp_le_i16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x66,0x7c,0x7f,0x00,0x00,0x00]
-# W64: v_cmp_le_i16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x66,0x7c,0x7f,0x00,0x00,0x00]
+# W32-REAL16: v_cmp_le_i16 vcc_lo, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x66,0x7c,0x7f,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_le_i16 vcc, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x66,0x7c,0x7f,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_le_i16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x66,0x7c,0x7f,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_le_i16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x66,0x7c,0x7f,0x00,0x00,0x00]
+
+0xe9,0xfe,0x66,0x7c,0x7f,0x77,0x39,0x05
+# W32-REAL16: v_cmp_le_i16 vcc_lo, v127.l, v127.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0xfe,0x66,0x7c,0x7f,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_le_i16 vcc, v127.l, v127.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0xfe,0x66,0x7c,0x7f,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_le_i16 vcc_lo, v127, v127 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0xfe,0x66,0x7c,0x7f,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_le_i16 vcc, v127, v127 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0xfe,0x66,0x7c,0x7f,0x77,0x39,0x05]
+
+0xe9,0x04,0x67,0x7c,0x81,0x77,0x39,0x05
+# W32-REAL16: v_cmp_le_i16 vcc_lo, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x67,0x7c,0x81,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_le_i16 vcc, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x67,0x7c,0x81,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_le_i16 vcc_lo, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x67,0x7c,0x81,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_le_i16 vcc, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x67,0x7c,0x81,0x77,0x39,0x05]
+
+0xea,0xfe,0x67,0x7c,0xff,0x00,0x00,0x00
+# W32-REAL16: v_cmp_le_i16 vcc_lo, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x67,0x7c,0xff,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_le_i16 vcc, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x67,0x7c,0xff,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_le_i16 vcc_lo, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x67,0x7c,0xff,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_le_i16 vcc, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x67,0x7c,0xff,0x00,0x00,0x00]
 
 0xe9,0x04,0x86,0x7c,0x01,0x77,0x39,0x05
 # W32: v_cmp_le_i32 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x86,0x7c,0x01,0x77,0x39,0x05]
@@ -229,12 +383,34 @@
 # W64: v_cmp_le_i32 vcc, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x87,0x7c,0xff,0x00,0x00,0x00]
 
 0xe9,0x04,0x76,0x7c,0x01,0x77,0x39,0x05
-# W32: v_cmp_le_u16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x76,0x7c,0x01,0x77,0x39,0x05]
-# W64: v_cmp_le_u16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x76,0x7c,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_le_u16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x76,0x7c,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_le_u16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x76,0x7c,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_le_u16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x76,0x7c,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_le_u16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x76,0x7c,0x01,0x77,0x39,0x05]
 
 0xea,0xfe,0x76,0x7c,0x7f,0x00,0x00,0x00
-# W32: v_cmp_le_u16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x76,0x7c,0x7f,0x00,0x00,0x00]
-# W64: v_cmp_le_u16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x76,0x7c,0x7f,0x00,0x00,0x00]
+# W32-REAL16: v_cmp_le_u16 vcc_lo, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x76,0x7c,0x7f,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_le_u16 vcc, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x76,0x7c,0x7f,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_le_u16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x76,0x7c,0x7f,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_le_u16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x76,0x7c,0x7f,0x00,0x00,0x00]
+
+0xe9,0xfe,0x76,0x7c,0x7f,0x77,0x39,0x05
+# W32-REAL16: v_cmp_le_u16 vcc_lo, v127.l, v127.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0xfe,0x76,0x7c,0x7f,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_le_u16 vcc, v127.l, v127.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0xfe,0x76,0x7c,0x7f,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_le_u16 vcc_lo, v127, v127 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0xfe,0x76,0x7c,0x7f,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_le_u16 vcc, v127, v127 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0xfe,0x76,0x7c,0x7f,0x77,0x39,0x05]
+
+0xe9,0x04,0x77,0x7c,0x81,0x77,0x39,0x05
+# W32-REAL16: v_cmp_le_u16 vcc_lo, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x77,0x7c,0x81,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_le_u16 vcc, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x77,0x7c,0x81,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_le_u16 vcc_lo, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x77,0x7c,0x81,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_le_u16 vcc, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x77,0x7c,0x81,0x77,0x39,0x05]
+
+0xea,0xfe,0x77,0x7c,0xff,0x00,0x00,0x00
+# W32-REAL16: v_cmp_le_u16 vcc_lo, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x77,0x7c,0xff,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_le_u16 vcc, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x77,0x7c,0xff,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_le_u16 vcc_lo, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x77,0x7c,0xff,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_le_u16 vcc, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x77,0x7c,0xff,0x00,0x00,0x00]
 
 0xe9,0x04,0x96,0x7c,0x01,0x77,0x39,0x05
 # W32: v_cmp_le_u32 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x96,0x7c,0x01,0x77,0x39,0x05]
@@ -299,12 +475,34 @@
 # W64: v_cmp_lt_f32 vcc, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x23,0x7c,0xff,0x00,0x00,0x00]
 
 0xe9,0x04,0x62,0x7c,0x01,0x77,0x39,0x05
-# W32: v_cmp_lt_i16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x62,0x7c,0x01,0x77,0x39,0x05]
-# W64: v_cmp_lt_i16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x62,0x7c,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_lt_i16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x62,0x7c,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_lt_i16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x62,0x7c,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_lt_i16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x62,0x7c,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_lt_i16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x62,0x7c,0x01,0x77,0x39,0x05]
 
 0xea,0xfe,0x62,0x7c,0x7f,0x00,0x00,0x00
-# W32: v_cmp_lt_i16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x62,0x7c,0x7f,0x00,0x00,0x00]
-# W64: v_cmp_lt_i16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x62,0x7c,0x7f,0x00,0x00,0x00]
+# W32-REAL16: v_cmp_lt_i16 vcc_lo, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x62,0x7c,0x7f,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_lt_i16 vcc, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x62,0x7c,0x7f,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_lt_i16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x62,0x7c,0x7f,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_lt_i16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x62,0x7c,0x7f,0x00,0x00,0x00]
+
+0xe9,0xfe,0x62,0x7c,0x7f,0x77,0x39,0x05
+# W32-REAL16: v_cmp_lt_i16 vcc_lo, v127.l, v127.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0xfe,0x62,0x7c,0x7f,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_lt_i16 vcc, v127.l, v127.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0xfe,0x62,0x7c,0x7f,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_lt_i16 vcc_lo, v127, v127 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0xfe,0x62,0x7c,0x7f,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_lt_i16 vcc, v127, v127 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0xfe,0x62,0x7c,0x7f,0x77,0x39,0x05]
+
+0xe9,0x04,0x63,0x7c,0x81,0x77,0x39,0x05
+# W32-REAL16: v_cmp_lt_i16 vcc_lo, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x63,0x7c,0x81,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_lt_i16 vcc, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x63,0x7c,0x81,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_lt_i16 vcc_lo, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x63,0x7c,0x81,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_lt_i16 vcc, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x63,0x7c,0x81,0x77,0x39,0x05]
+
+0xea,0xfe,0x63,0x7c,0xff,0x00,0x00,0x00
+# W32-REAL16: v_cmp_lt_i16 vcc_lo, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x63,0x7c,0xff,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_lt_i16 vcc, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x63,0x7c,0xff,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_lt_i16 vcc_lo, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x63,0x7c,0xff,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_lt_i16 vcc, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x63,0x7c,0xff,0x00,0x00,0x00]
 
 0xe9,0x04,0x82,0x7c,0x01,0x77,0x39,0x05
 # W32: v_cmp_lt_i32 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x82,0x7c,0x01,0x77,0x39,0x05]
@@ -315,12 +513,34 @@
 # W64: v_cmp_lt_i32 vcc, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x83,0x7c,0xff,0x00,0x00,0x00]
 
 0xe9,0x04,0x72,0x7c,0x01,0x77,0x39,0x05
-# W32: v_cmp_lt_u16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x72,0x7c,0x01,0x77,0x39,0x05]
-# W64: v_cmp_lt_u16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x72,0x7c,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_lt_u16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x72,0x7c,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_lt_u16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x72,0x7c,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_lt_u16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x72,0x7c,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_lt_u16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x72,0x7c,0x01,0x77,0x39,0x05]
 
 0xea,0xfe,0x72,0x7c,0x7f,0x00,0x00,0x00
-# W32: v_cmp_lt_u16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x72,0x7c,0x7f,0x00,0x00,0x00]
-# W64: v_cmp_lt_u16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x72,0x7c,0x7f,0x00,0x00,0x00]
+# W32-REAL16: v_cmp_lt_u16 vcc_lo, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x72,0x7c,0x7f,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_lt_u16 vcc, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x72,0x7c,0x7f,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_lt_u16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x72,0x7c,0x7f,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_lt_u16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x72,0x7c,0x7f,0x00,0x00,0x00]
+
+0xe9,0xfe,0x72,0x7c,0x7f,0x77,0x39,0x05
+# W32-REAL16: v_cmp_lt_u16 vcc_lo, v127.l, v127.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0xfe,0x72,0x7c,0x7f,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_lt_u16 vcc, v127.l, v127.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0xfe,0x72,0x7c,0x7f,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_lt_u16 vcc_lo, v127, v127 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0xfe,0x72,0x7c,0x7f,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_lt_u16 vcc, v127, v127 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0xfe,0x72,0x7c,0x7f,0x77,0x39,0x05]
+
+0xe9,0x04,0x73,0x7c,0x81,0x77,0x39,0x05
+# W32-REAL16: v_cmp_lt_u16 vcc_lo, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x73,0x7c,0x81,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_lt_u16 vcc, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x73,0x7c,0x81,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_lt_u16 vcc_lo, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x73,0x7c,0x81,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_lt_u16 vcc, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x73,0x7c,0x81,0x77,0x39,0x05]
+
+0xea,0xfe,0x73,0x7c,0xff,0x00,0x00,0x00
+# W32-REAL16: v_cmp_lt_u16 vcc_lo, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x73,0x7c,0xff,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_lt_u16 vcc, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x73,0x7c,0xff,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_lt_u16 vcc_lo, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x73,0x7c,0xff,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_lt_u16 vcc, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x73,0x7c,0xff,0x00,0x00,0x00]
 
 0xe9,0x04,0x92,0x7c,0x01,0x77,0x39,0x05
 # W32: v_cmp_lt_u32 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x92,0x7c,0x01,0x77,0x39,0x05]
@@ -331,12 +551,34 @@
 # W64: v_cmp_lt_u32 vcc, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x93,0x7c,0xff,0x00,0x00,0x00]
 
 0xe9,0x04,0x6a,0x7c,0x01,0x77,0x39,0x05
-# W32: v_cmp_ne_i16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x6a,0x7c,0x01,0x77,0x39,0x05]
-# W64: v_cmp_ne_i16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x6a,0x7c,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_ne_i16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x6a,0x7c,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_ne_i16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x6a,0x7c,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_ne_i16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x6a,0x7c,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_ne_i16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x6a,0x7c,0x01,0x77,0x39,0x05]
 
 0xea,0xfe,0x6a,0x7c,0x7f,0x00,0x00,0x00
-# W32: v_cmp_ne_i16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x6a,0x7c,0x7f,0x00,0x00,0x00]
-# W64: v_cmp_ne_i16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x6a,0x7c,0x7f,0x00,0x00,0x00]
+# W32-REAL16: v_cmp_ne_i16 vcc_lo, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x6a,0x7c,0x7f,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_ne_i16 vcc, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x6a,0x7c,0x7f,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_ne_i16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x6a,0x7c,0x7f,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_ne_i16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x6a,0x7c,0x7f,0x00,0x00,0x00]
+
+0xe9,0xfe,0x6a,0x7c,0x7f,0x77,0x39,0x05
+# W32-REAL16: v_cmp_ne_i16 vcc_lo, v127.l, v127.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0xfe,0x6a,0x7c,0x7f,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_ne_i16 vcc, v127.l, v127.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0xfe,0x6a,0x7c,0x7f,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_ne_i16 vcc_lo, v127, v127 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0xfe,0x6a,0x7c,0x7f,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_ne_i16 vcc, v127, v127 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0xfe,0x6a,0x7c,0x7f,0x77,0x39,0x05]
+
+0xe9,0x04,0x6b,0x7c,0x81,0x77,0x39,0x05
+# W32-REAL16: v_cmp_ne_i16 vcc_lo, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x6b,0x7c,0x81,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_ne_i16 vcc, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x6b,0x7c,0x81,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_ne_i16 vcc_lo, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x6b,0x7c,0x81,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_ne_i16 vcc, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x6b,0x7c,0x81,0x77,0x39,0x05]
+
+0xea,0xfe,0x6b,0x7c,0xff,0x00,0x00,0x00
+# W32-REAL16: v_cmp_ne_i16 vcc_lo, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x6b,0x7c,0xff,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_ne_i16 vcc, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x6b,0x7c,0xff,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_ne_i16 vcc_lo, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x6b,0x7c,0xff,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_ne_i16 vcc, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x6b,0x7c,0xff,0x00,0x00,0x00]
 
 0xe9,0x04,0x8a,0x7c,0x01,0x77,0x39,0x05
 # W32: v_cmp_ne_i32 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x8a,0x7c,0x01,0x77,0x39,0x05]
@@ -347,12 +589,34 @@
 # W64: v_cmp_ne_i32 vcc, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x8b,0x7c,0xff,0x00,0x00,0x00]
 
 0xe9,0x04,0x7a,0x7c,0x01,0x77,0x39,0x05
-# W32: v_cmp_ne_u16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x7a,0x7c,0x01,0x77,0x39,0x05]
-# W64: v_cmp_ne_u16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x7a,0x7c,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_ne_u16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x7a,0x7c,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_ne_u16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x7a,0x7c,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_ne_u16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x7a,0x7c,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_ne_u16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x7a,0x7c,0x01,0x77,0x39,0x05]
 
 0xea,0xfe,0x7a,0x7c,0x7f,0x00,0x00,0x00
-# W32: v_cmp_ne_u16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x7a,0x7c,0x7f,0x00,0x00,0x00]
-# W64: v_cmp_ne_u16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x7a,0x7c,0x7f,0x00,0x00,0x00]
+# W32-REAL16: v_cmp_ne_u16 vcc_lo, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x7a,0x7c,0x7f,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_ne_u16 vcc, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x7a,0x7c,0x7f,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_ne_u16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x7a,0x7c,0x7f,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_ne_u16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x7a,0x7c,0x7f,0x00,0x00,0x00]
+
+0xe9,0xfe,0x7a,0x7c,0x7f,0x77,0x39,0x05
+# W32-REAL16: v_cmp_ne_u16 vcc_lo, v127.l, v127.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0xfe,0x7a,0x7c,0x7f,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_ne_u16 vcc, v127.l, v127.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0xfe,0x7a,0x7c,0x7f,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_ne_u16 vcc_lo, v127, v127 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0xfe,0x7a,0x7c,0x7f,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_ne_u16 vcc, v127, v127 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0xfe,0x7a,0x7c,0x7f,0x77,0x39,0x05]
+
+0xe9,0x04,0x7b,0x7c,0x81,0x77,0x39,0x05
+# W32-REAL16: v_cmp_ne_u16 vcc_lo, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x7b,0x7c,0x81,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_ne_u16 vcc, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x7b,0x7c,0x81,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_ne_u16 vcc_lo, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x7b,0x7c,0x81,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_ne_u16 vcc, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x7b,0x7c,0x81,0x77,0x39,0x05]
+
+0xea,0xfe,0x7b,0x7c,0xff,0x00,0x00,0x00
+# W32-REAL16: v_cmp_ne_u16 vcc_lo, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x7b,0x7c,0xff,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_ne_u16 vcc, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x7b,0x7c,0xff,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_ne_u16 vcc_lo, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x7b,0x7c,0xff,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_ne_u16 vcc, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x7b,0x7c,0xff,0x00,0x00,0x00]
 
 0xe9,0x04,0x9a,0x7c,0x01,0x77,0x39,0x05
 # W32: v_cmp_ne_u32 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x9a,0x7c,0x01,0x77,0x39,0x05]
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3c.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3c.txt
index aa3d3501344241..6899016177365c 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3c.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3c.txt
@@ -347,12 +347,16 @@
 # GFX12: v_cmp_eq_f64_e64 null, 0xaf123456, -|vcc| clamp ; encoding: [0x7c,0x82,0x22,0xd4,0xff,0xd4,0x00,0x40,0x56,0x34,0x12,0xaf]
 
 0x0a,0x00,0x32,0xd4,0x01,0x05,0x02,0x00
-# W32: v_cmp_eq_i16_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x32,0xd4,0x01,0x05,0x02,0x00]
-# W64: v_cmp_eq_i16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x32,0xd4,0x01,0x05,0x02,0x00]
+# W32-REAL16: v_cmp_eq_i16_e64 s10, v1.l, v2.l        ; encoding: [0x0a,0x00,0x32,0xd4,0x01,0x05,0x02,0x00]
+# W32-FAKE16: v_cmp_eq_i16_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x32,0xd4,0x01,0x05,0x02,0x00]
+# W64-REAL16: v_cmp_eq_i16_e64 s[10:11], v1.l, v2.l   ; encoding: [0x0a,0x00,0x32,0xd4,0x01,0x05,0x02,0x00]
+# W64-FAKE16: v_cmp_eq_i16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x32,0xd4,0x01,0x05,0x02,0x00]
 
 0x0a,0x00,0x32,0xd4,0xff,0xff,0x03,0x00
-# W32: v_cmp_eq_i16_e64 s10, v255, v255        ; encoding: [0x0a,0x00,0x32,0xd4,0xff,0xff,0x03,0x00]
-# W64: v_cmp_eq_i16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x32,0xd4,0xff,0xff,0x03,0x00]
+# W32-REAL16: v_cmp_eq_i16_e64 s10, v255.l, v255.l    ; encoding: [0x0a,0x00,0x32,0xd4,0xff,0xff,0x03,0x00]
+# W32-FAKE16: v_cmp_eq_i16_e64 s10, v255, v255        ; encoding: [0x0a,0x00,0x32,0xd4,0xff,0xff,0x03,0x00]
+# W64-REAL16: v_cmp_eq_i16_e64 s[10:11], v255.l, v255.l ; encoding: [0x0a,0x00,0x32,0xd4,0xff,0xff,0x03,0x00]
+# W64-FAKE16: v_cmp_eq_i16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x32,0xd4,0xff,0xff,0x03,0x00]
 
 0x0a,0x00,0x32,0xd4,0x01,0x04,0x00,0x00
 # W32: v_cmp_eq_i16_e64 s10, s1, s2            ; encoding: [0x0a,0x00,0x32,0xd4,0x01,0x04,0x00,0x00]
@@ -405,6 +409,19 @@
 0x7c,0x00,0x32,0xd4,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00
 # GFX12: v_cmp_eq_i16_e64 null, 0xfe0b, vcc_hi   ; encoding: [0x7c,0x00,0x32,0xd4,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00]
 
+0x0a,0x08,0x32,0xd4,0x01,0x05,0x02,0x00
+# W32-REAL16: v_cmp_eq_i16_e64 s10, v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x0a,0x08,0x32,0xd4,0x01,0x05,0x02,0x00]
+# W32-FAKE16: v_cmp_eq_i16_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x32,0xd4,0x01,0x05,0x02,0x00]
+# W64-REAL16: v_cmp_eq_i16_e64 s[10:11], v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x0a,0x08,0x32,0xd4,0x01,0x05,0x02,0x00]
+# W64-FAKE16: v_cmp_eq_i16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x32,0xd4,0x01,0x05,0x02,0x00]
+
+0x0a,0x10,0x32,0xd4,0xff,0xff,0x03,0x00
+# W32-REAL16: v_cmp_eq_i16_e64 s10, v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x0a,0x10,0x32,0xd4,0xff,0xff,0x03,0x00]
+# W32-FAKE16: v_cmp_eq_i16_e64 s10, v255, v255        ; encoding: [0x0a,0x00,0x32,0xd4,0xff,0xff,0x03,0x00]
+# W64-REAL16: v_cmp_eq_i16_e64 s[10:11], v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x0a,0x10,0x32,0xd4,0xff,0xff,0x03,0x00]
+# W64-FAKE16: v_cmp_eq_i16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x32,0xd4,0xff,0xff,0x03,0x00]
+
+
 0x0a,0x00,0x42,0xd4,0x01,0x05,0x02,0x00
 # W32: v_cmp_eq_i32_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x42,0xd4,0x01,0x05,0x02,0x00]
 # W64: v_cmp_eq_i32_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x42,0xd4,0x01,0x05,0x02,0x00]
@@ -512,12 +529,16 @@
 # GFX12: v_cmp_eq_i64_e64 null, 0xaf123456, vcc  ; encoding: [0x7c,0x00,0x52,0xd4,0xff,0xd4,0x00,0x00,0x56,0x34,0x12,0xaf]
 
 0x0a,0x00,0x3a,0xd4,0x01,0x05,0x02,0x00
-# W32: v_cmp_eq_u16_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x3a,0xd4,0x01,0x05,0x02,0x00]
-# W64: v_cmp_eq_u16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x3a,0xd4,0x01,0x05,0x02,0x00]
+# W32-REAL16: v_cmp_eq_u16_e64 s10, v1.l, v2.l        ; encoding: [0x0a,0x00,0x3a,0xd4,0x01,0x05,0x02,0x00]
+# W32-FAKE16: v_cmp_eq_u16_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x3a,0xd4,0x01,0x05,0x02,0x00]
+# W64-REAL16: v_cmp_eq_u16_e64 s[10:11], v1.l, v2.l   ; encoding: [0x0a,0x00,0x3a,0xd4,0x01,0x05,0x02,0x00]
+# W64-FAKE16: v_cmp_eq_u16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x3a,0xd4,0x01,0x05,0x02,0x00]
 
 0x0a,0x00,0x3a,0xd4,0xff,0xff,0x03,0x00
-# W32: v_cmp_eq_u16_e64 s10, v255, v255        ; encoding: [0x0a,0x00,0x3a,0xd4,0xff,0xff,0x03,0x00]
-# W64: v_cmp_eq_u16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x3a,0xd4,0xff,0xff,0x03,0x00]
+# W32-REAL16: v_cmp_eq_u16_e64 s10, v255.l, v255.l    ; encoding: [0x0a,0x00,0x3a,0xd4,0xff,0xff,0x03,0x00]
+# W32-FAKE16: v_cmp_eq_u16_e64 s10, v255, v255        ; encoding: [0x0a,0x00,0x3a,0xd4,0xff,0xff,0x03,0x00]
+# W64-REAL16: v_cmp_eq_u16_e64 s[10:11], v255.l, v255.l ; encoding: [0x0a,0x00,0x3a,0xd4,0xff,0xff,0x03,0x00]
+# W64-FAKE16: v_cmp_eq_u16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x3a,0xd4,0xff,0xff,0x03,0x00]
 
 0x0a,0x00,0x3a,0xd4,0x01,0x04,0x00,0x00
 # W32: v_cmp_eq_u16_e64 s10, s1, s2            ; encoding: [0x0a,0x00,0x3a,0xd4,0x01,0x04,0x00,0x00]
@@ -570,6 +591,19 @@
 0x7c,0x00,0x3a,0xd4,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00
 # GFX12: v_cmp_eq_u16_e64 null, 0xfe0b, vcc_hi   ; encoding: [0x7c,0x00,0x3a,0xd4,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00]
 
+0x0a,0x08,0x3a,0xd4,0x01,0x05,0x02,0x00
+# W32-REAL16: v_cmp_eq_u16_e64 s10, v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x0a,0x08,0x3a,0xd4,0x01,0x05,0x02,0x00]
+# W32-FAKE16: v_cmp_eq_u16_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x3a,0xd4,0x01,0x05,0x02,0x00]
+# W64-REAL16: v_cmp_eq_u16_e64 s[10:11], v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x0a,0x08,0x3a,0xd4,0x01,0x05,0x02,0x00]
+# W64-FAKE16: v_cmp_eq_u16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x3a,0xd4,0x01,0x05,0x02,0x00]
+
+0x0a,0x10,0x3a,0xd4,0xff,0xff,0x03,0x00
+# W32-REAL16: v_cmp_eq_u16_e64 s10, v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x0a,0x10,0x3a,0xd4,0xff,0xff,0x03,0x00]
+# W32-FAKE16: v_cmp_eq_u16_e64 s10, v255, v255        ; encoding: [0x0a,0x00,0x3a,0xd4,0xff,0xff,0x03,0x00]
+# W64-REAL16: v_cmp_eq_u16_e64 s[10:11], v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x0a,0x10,0x3a,0xd4,0xff,0xff,0x03,0x00]
+# W64-FAKE16: v_cmp_eq_u16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x3a,0xd4,0xff,0xff,0x03,0x00]
+
+
 0x0a,0x00,0x4a,0xd4,0x01,0x05,0x02,0x00
 # W32: v_cmp_eq_u32_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x4a,0xd4,0x01,0x05,0x02,0x00]
 # W64: v_cmp_eq_u32_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x4a,0xd4,0x01,0x05,0x02,0x00]
@@ -842,12 +876,16 @@
 # GFX12: v_cmp_ge_f64_e64 null, 0xaf123456, -|vcc| clamp ; encoding: [0x7c,0x82,0x26,0xd4,0xff,0xd4,0x00,0x40,0x56,0x34,0x12,0xaf]
 
 0x0a,0x00,0x36,0xd4,0x01,0x05,0x02,0x00
-# W32: v_cmp_ge_i16_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x36,0xd4,0x01,0x05,0x02,0x00]
-# W64: v_cmp_ge_i16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x36,0xd4,0x01,0x05,0x02,0x00]
+# W32-REAL16: v_cmp_ge_i16_e64 s10, v1.l, v2.l        ; encoding: [0x0a,0x00,0x36,0xd4,0x01,0x05,0x02,0x00]
+# W32-FAKE16: v_cmp_ge_i16_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x36,0xd4,0x01,0x05,0x02,0x00]
+# W64-REAL16: v_cmp_ge_i16_e64 s[10:11], v1.l, v2.l   ; encoding: [0x0a,0x00,0x36,0xd4,0x01,0x05,0x02,0x00]
+# W64-FAKE16: v_cmp_ge_i16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x36,0xd4,0x01,0x05,0x02,0x00]
 
 0x0a,0x00,0x36,0xd4,0xff,0xff,0x03,0x00
-# W32: v_cmp_ge_i16_e64 s10, v255, v255        ; encoding: [0x0a,0x00,0x36,0xd4,0xff,0xff,0x03,0x00]
-# W64: v_cmp_ge_i16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x36,0xd4,0xff,0xff,0x03,0x00]
+# W32-REAL16: v_cmp_ge_i16_e64 s10, v255.l, v255.l    ; encoding: [0x0a,0x00,0x36,0xd4,0xff,0xff,0x03,0x00]
+# W32-FAKE16: v_cmp_ge_i16_e64 s10, v255, v255        ; encoding: [0x0a,0x00,0x36,0xd4,0xff,0xff,0x03,0x00]
+# W64-REAL16: v_cmp_ge_i16_e64 s[10:11], v255.l, v255.l ; encoding: [0x0a,0x00,0x36,0xd4,0xff,0xff,0x03,0x00]
+# W64-FAKE16: v_cmp_ge_i16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x36,0xd4,0xff,0xff,0x03,0x00]
 
 0x0a,0x00,0x36,0xd4,0x01,0x04,0x00,0x00
 # W32: v_cmp_ge_i16_e64 s10, s1, s2            ; encoding: [0x0a,0x00,0x36,0xd4,0x01,0x04,0x00,0x00]
@@ -900,6 +938,19 @@
 0x7c,0x00,0x36,0xd4,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00
 # GFX12: v_cmp_ge_i16_e64 null, 0xfe0b, vcc_hi   ; encoding: [0x7c,0x00,0x36,0xd4,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00]
 
+0x0a,0x08,0x36,0xd4,0x01,0x05,0x02,0x00
+# W32-REAL16: v_cmp_ge_i16_e64 s10, v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x0a,0x08,0x36,0xd4,0x01,0x05,0x02,0x00]
+# W32-FAKE16: v_cmp_ge_i16_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x36,0xd4,0x01,0x05,0x02,0x00]
+# W64-REAL16: v_cmp_ge_i16_e64 s[10:11], v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x0a,0x08,0x36,0xd4,0x01,0x05,0x02,0x00]
+# W64-FAKE16: v_cmp_ge_i16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x36,0xd4,0x01,0x05,0x02,0x00]
+
+0x0a,0x10,0x36,0xd4,0xff,0xff,0x03,0x00
+# W32-REAL16: v_cmp_ge_i16_e64 s10, v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x0a,0x10,0x36,0xd4,0xff,0xff,0x03,0x00]
+# W32-FAKE16: v_cmp_ge_i16_e64 s10, v255, v255        ; encoding: [0x0a,0x00,0x36,0xd4,0xff,0xff,0x03,0x00]
+# W64-REAL16: v_cmp_ge_i16_e64 s[10:11], v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x0a,0x10,0x36,0xd4,0xff,0xff,0x03,0x00]
+# W64-FAKE16: v_cmp_ge_i16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x36,0xd4,0xff,0xff,0x03,0x00]
+
+
 0x0a,0x00,0x46,0xd4,0x01,0x05,0x02,0x00
 # W32: v_cmp_ge_i32_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x46,0xd4,0x01,0x05,0x02,0x00]
 # W64: v_cmp_ge_i32_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x46,0xd4,0x01,0x05,0x02,0x00]
@@ -1007,12 +1058,16 @@
 # GFX12: v_cmp_ge_i64_e64 null, 0xaf123456, vcc  ; encoding: [0x7c,0x00,0x56,0xd4,0xff,0xd4,0x00,0x00,0x56,0x34,0x12,0xaf]
 
 0x0a,0x00,0x3e,0xd4,0x01,0x05,0x02,0x00
-# W32: v_cmp_ge_u16_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x3e,0xd4,0x01,0x05,0x02,0x00]
-# W64: v_cmp_ge_u16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x3e,0xd4,0x01,0x05,0x02,0x00]
+# W32-REAL16: v_cmp_ge_u16_e64 s10, v1.l, v2.l        ; encoding: [0x0a,0x00,0x3e,0xd4,0x01,0x05,0x02,0x00]
+# W32-FAKE16: v_cmp_ge_u16_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x3e,0xd4,0x01,0x05,0x02,0x00]
+# W64-REAL16: v_cmp_ge_u16_e64 s[10:11], v1.l, v2.l   ; encoding: [0x0a,0x00,0x3e,0xd4,0x01,0x05,0x02,0x00]
+# W64-FAKE16: v_cmp_ge_u16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x3e,0xd4,0x01,0x05,0x02,0x00]
 
 0x0a,0x00,0x3e,0xd4,0xff,0xff,0x03,0x00
-# W32: v_cmp_ge_u16_e64 s10, v255, v255        ; encoding: [0x0a,0x00,0x3e,0xd4,0xff,0xff,0x03,0x00]
-# W64: v_cmp_ge_u16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x3e,0xd4,0xff,0xff,0x03,0x00]
+# W32-REAL16: v_cmp_ge_u16_e64 s10, v255.l, v255.l    ; encoding: [0x0a,0x00,0x3e,0xd4,0xff,0xff,0x03,0x00]
+# W32-FAKE16: v_cmp_ge_u16_e64 s10, v255, v255        ; encoding: [0x0a,0x00,0x3e,0xd4,0xff,0xff,0x03,0x00]
+# W64-REAL16: v_cmp_ge_u16_e64 s[10:11], v255.l, v255.l ; encoding: [0x0a,0x00,0x3e,0xd4,0xff,0xff,0x03,0x00]
+# W64-FAKE16: v_cmp_ge_u16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x3e,0xd4,0xff,0xff,0x03,0x00]
 
 0x0a,0x00,0x3e,0xd4,0x01,0x04,0x00,0x00
 # W32: v_cmp_ge_u16_e64 s10, s1, s2            ; encoding: [0x0a,0x00,0x3e,0xd4,0x01,0x04,0x00,0x00]
@@ -1065,6 +1120,19 @@
 0x7c,0x00,0x3e,0xd4,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00
 # GFX12: v_cmp_ge_u16_e64 null, 0xfe0b, vcc_hi   ; encoding: [0x7c,0x00,0x3e,0xd4,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00]
 
+0x0a,0x08,0x3e,0xd4,0x01,0x05,0x02,0x00
+# W32-REAL16: v_cmp_ge_u16_e64 s10, v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x0a,0x08,0x3e,0xd4,0x01,0x05,0x02,0x00]
+# W32-FAKE16: v_cmp_ge_u16_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x3e,0xd4,0x01,0x05,0x02,0x00]
+# W64-REAL16: v_cmp_ge_u16_e64 s[10:11], v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x0a,0x08,0x3e,0xd4,0x01,0x05,0x02,0x00]
+# W64-FAKE16: v_cmp_ge_u16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x3e,0xd4,0x01,0x05,0x02,0x00]
+
+0x0a,0x10,0x3e,0xd4,0xff,0xff,0x03,0x00
+# W32-REAL16: v_cmp_ge_u16_e64 s10, v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x0a,0x10,0x3e,0xd4,0xff,0xff,0x03,0x00]
+# W32-FAKE16: v_cmp_ge_u16_e64 s10, v255, v255        ; encoding: [0x0a,0x00,0x3e,0xd4,0xff,0xff,0x03,0x00]
+# W64-REAL16: v_cmp_ge_u16_e64 s[10:11], v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x0a,0x10,0x3e,0xd4,0xff,0xff,0x03,0x00]
+# W64-FAKE16: v_cmp_ge_u16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x3e,0xd4,0xff,0xff,0x03,0x00]
+
+
 0x0a,0x00,0x4e,0xd4,0x01,0x05,0x02,0x00
 # W32: v_cmp_ge_u32_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x4e,0xd4,0x01,0x05,0x02,0x00]
 # W64: v_cmp_ge_u32_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x4e,0xd4,0x01,0x05,0x02,0x00]
@@ -1337,12 +1405,16 @@
 # GFX12: v_cmp_gt_f64_e64 null, 0xaf123456, -|vcc| clamp ; encoding: [0x7c,0x82,0x24,0xd4,0xff,0xd4,0x00,0x40,0x56,0x34,0x12,0xaf]
 
 0x0a,0x00,0x34,0xd4,0x01,0x05,0x02,0x00
-# W32: v_cmp_gt_i16_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x34,0xd4,0x01,0x05,0x02,0x00]
-# W64: v_cmp_gt_i16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x34,0xd4,0x01,0x05,0x02,0x00]
+# W32-REAL16: v_cmp_gt_i16_e64 s10, v1.l, v2.l        ; encoding: [0x0a,0x00,0x34,0xd4,0x01,0x05,0x02,0x00]
+# W32-FAKE16: v_cmp_gt_i16_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x34,0xd4,0x01,0x05,0x02,0x00]
+# W64-REAL16: v_cmp_gt_i16_e64 s[10:11], v1.l, v2.l   ; encoding: [0x0a,0x00,0x34,0xd4,0x01,0x05,0x02,0x00]
+# W64-FAKE16: v_cmp_gt_i16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x34,0xd4,0x01,0x05,0x02,0x00]
 
 0x0a,0x00,0x34,0xd4,0xff,0xff,0x03,0x00
-# W32: v_cmp_gt_i16_e64 s10, v255, v255        ; encoding: [0x0a,0x00,0x34,0xd4,0xff,0xff,0x03,0x00]
-# W64: v_cmp_gt_i16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x34,0xd4,0xff,0xff,0x03,0x00]
+# W32-REAL16: v_cmp_gt_i16_e64 s10, v255.l, v255.l    ; encoding: [0x0a,0x00,0x34,0xd4,0xff,0xff,0x03,0x00]
+# W32-FAKE16: v_cmp_gt_i16_e64 s10, v255, v255        ; encoding: [0x0a,0x00,0x34,0xd4,0xff,0xff,0x03,0x00]
+# W64-REAL16: v_cmp_gt_i16_e64 s[10:11], v255.l, v255.l ; encoding: [0x0a,0x00,0x34,0xd4,0xff,0xff,0x03,0x00]
+# W64-FAKE16: v_cmp_gt_i16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x34,0xd4,0xff,0xff,0x03,0x00]
 
 0x0a,0x00,0x34,0xd4,0x01,0x04,0x00,0x00
 # W32: v_cmp_gt_i16_e64 s10, s1, s2            ; encoding: [0x0a,0x00,0x34,0xd4,0x01,0x04,0x00,0x00]
@@ -1395,6 +1467,19 @@
 0x7c,0x00,0x34,0xd4,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00
 # GFX12: v_cmp_gt_i16_e64 null, 0xfe0b, vcc_hi   ; encoding: [0x7c,0x00,0x34,0xd4,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00]
 
+0x0a,0x08,0x34,0xd4,0x01,0x05,0x02,0x00
+# W32-REAL16: v_cmp_gt_i16_e64 s10, v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x0a,0x08,0x34,0xd4,0x01,0x05,0x02,0x00]
+# W32-FAKE16: v_cmp_gt_i16_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x34,0xd4,0x01,0x05,0x02,0x00]
+# W64-REAL16: v_cmp_gt_i16_e64 s[10:11], v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x0a,0x08,0x34,0xd4,0x01,0x05,0x02,0x00]
+# W64-FAKE16: v_cmp_gt_i16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x34,0xd4,0x01,0x05,0x02,0x00]
+
+0x0a,0x10,0x34,0xd4,0xff,0xff,0x03,0x00
+# W32-REAL16: v_cmp_gt_i16_e64 s10, v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x0a,0x10,0x34,0xd4,0xff,0xff,0x03,0x00]
+# W32-FAKE16: v_cmp_gt_i16_e64 s10, v255, v255        ; encoding: [0x0a,0x00,0x34,0xd4,0xff,0xff,0x03,0x00]
+# W64-REAL16: v_cmp_gt_i16_e64 s[10:11], v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x0a,0x10,0x34,0xd4,0xff,0xff,0x03,0x00]
+# W64-FAKE16: v_cmp_gt_i16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x34,0xd4,0xff,0xff,0x03,0x00]
+
+
 0x0a,0x00,0x44,0xd4,0x01,0x05,0x02,0x00
 # W32: v_cmp_gt_i32_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x44,0xd4,0x01,0x05,0x02,0x00]
 # W64: v_cmp_gt_i32_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x44,0xd4,0x01,0x05,0x02,0x00]
@@ -1502,12 +1587,16 @@
 # GFX12: v_cmp_gt_i64_e64 null, 0xaf123456, vcc  ; encoding: [0x7c,0x00,0x54,0xd4,0xff,0xd4,0x00,0x00,0x56,0x34,0x12,0xaf]
 
 0x0a,0x00,0x3c,0xd4,0x01,0x05,0x02,0x00
-# W32: v_cmp_gt_u16_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x3c,0xd4,0x01,0x05,0x02,0x00]
-# W64: v_cmp_gt_u16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x3c,0xd4,0x01,0x05,0x02,0x00]
+# W32-REAL16: v_cmp_gt_u16_e64 s10, v1.l, v2.l        ; encoding: [0x0a,0x00,0x3c,0xd4,0x01,0x05,0x02,0x00]
+# W32-FAKE16: v_cmp_gt_u16_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x3c,0xd4,0x01,0x05,0x02,0x00]
+# W64-REAL16: v_cmp_gt_u16_e64 s[10:11], v1.l, v2.l   ; encoding: [0x0a,0x00,0x3c,0xd4,0x01,0x05,0x02,0x00]
+# W64-FAKE16: v_cmp_gt_u16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x3c,0xd4,0x01,0x05,0x02,0x00]
 
 0x0a,0x00,0x3c,0xd4,0xff,0xff,0x03,0x00
-# W32: v_cmp_gt_u16_e64 s10, v255, v255        ; encoding: [0x0a,0x00,0x3c,0xd4,0xff,0xff,0x03,0x00]
-# W64: v_cmp_gt_u16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x3c,0xd4,0xff,0xff,0x03,0x00]
+# W32-REAL16: v_cmp_gt_u16_e64 s10, v255.l, v255.l    ; encoding: [0x0a,0x00,0x3c,0xd4,0xff,0xff,0x03,0x00]
+# W32-FAKE16: v_cmp_gt_u16_e64 s10, v255, v255        ; encoding: [0x0a,0x00,0x3c,0xd4,0xff,0xff,0x03,0x00]
+# W64-REAL16: v_cmp_gt_u16_e64 s[10:11], v255.l, v255.l ; encoding: [0x0a,0x00,0x3c,0xd4,0xff,0xff,0x03,0x00]
+# W64-FAKE16: v_cmp_gt_u16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x3c,0xd4,0xff,0xff,0x03,0x00]
 
 0x0a,0x00,0x3c,0xd4,0x01,0x04,0x00,0x00
 # W32: v_cmp_gt_u16_e64 s10, s1, s2            ; encoding: [0x0a,0x00,0x3c,0xd4,0x01,0x04,0x00,0x00]
@@ -1560,6 +1649,19 @@
 0x7c,0x00,0x3c,0xd4,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00
 # GFX12: v_cmp_gt_u16_e64 null, 0xfe0b, vcc_hi   ; encoding: [0x7c,0x00,0x3c,0xd4,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00]
 
+0x0a,0x08,0x3c,0xd4,0x01,0x05,0x02,0x00
+# W32-REAL16: v_cmp_gt_u16_e64 s10, v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x0a,0x08,0x3c,0xd4,0x01,0x05,0x02,0x00]
+# W32-FAKE16: v_cmp_gt_u16_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x3c,0xd4,0x01,0x05,0x02,0x00]
+# W64-REAL16: v_cmp_gt_u16_e64 s[10:11], v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x0a,0x08,0x3c,0xd4,0x01,0x05,0x02,0x00]
+# W64-FAKE16: v_cmp_gt_u16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x3c,0xd4,0x01,0x05,0x02,0x00]
+
+0x0a,0x10,0x3c,0xd4,0xff,0xff,0x03,0x00
+# W32-REAL16: v_cmp_gt_u16_e64 s10, v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x0a,0x10,0x3c,0xd4,0xff,0xff,0x03,0x00]
+# W32-FAKE16: v_cmp_gt_u16_e64 s10, v255, v255        ; encoding: [0x0a,0x00,0x3c,0xd4,0xff,0xff,0x03,0x00]
+# W64-REAL16: v_cmp_gt_u16_e64 s[10:11], v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x0a,0x10,0x3c,0xd4,0xff,0xff,0x03,0x00]
+# W64-FAKE16: v_cmp_gt_u16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x3c,0xd4,0xff,0xff,0x03,0x00]
+
+
 0x0a,0x00,0x4c,0xd4,0x01,0x05,0x02,0x00
 # W32: v_cmp_gt_u32_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x4c,0xd4,0x01,0x05,0x02,0x00]
 # W64: v_cmp_gt_u32_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x4c,0xd4,0x01,0x05,0x02,0x00]
@@ -1832,12 +1934,16 @@
 # GFX12: v_cmp_le_f64_e64 null, 0xaf123456, -|vcc| clamp ; encoding: [0x7c,0x82,0x23,0xd4,0xff,0xd4,0x00,0x40,0x56,0x34,0x12,0xaf]
 
 0x0a,0x00,0x33,0xd4,0x01,0x05,0x02,0x00
-# W32: v_cmp_le_i16_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x33,0xd4,0x01,0x05,0x02,0x00]
-# W64: v_cmp_le_i16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x33,0xd4,0x01,0x05,0x02,0x00]
+# W32-REAL16: v_cmp_le_i16_e64 s10, v1.l, v2.l        ; encoding: [0x0a,0x00,0x33,0xd4,0x01,0x05,0x02,0x00]
+# W32-FAKE16: v_cmp_le_i16_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x33,0xd4,0x01,0x05,0x02,0x00]
+# W64-REAL16: v_cmp_le_i16_e64 s[10:11], v1.l, v2.l   ; encoding: [0x0a,0x00,0x33,0xd4,0x01,0x05,0x02,0x00]
+# W64-FAKE16: v_cmp_le_i16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x33,0xd4,0x01,0x05,0x02,0x00]
 
 0x0a,0x00,0x33,0xd4,0xff,0xff,0x03,0x00
-# W32: v_cmp_le_i16_e64 s10, v255, v255        ; encoding: [0x0a,0x00,0x33,0xd4,0xff,0xff,0x03,0x00]
-# W64: v_cmp_le_i16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x33,0xd4,0xff,0xff,0x03,0x00]
+# W32-REAL16: v_cmp_le_i16_e64 s10, v255.l, v255.l    ; encoding: [0x0a,0x00,0x33,0xd4,0xff,0xff,0x03,0x00]
+# W32-FAKE16: v_cmp_le_i16_e64 s10, v255, v255        ; encoding: [0x0a,0x00,0x33,0xd4,0xff,0xff,0x03,0x00]
+# W64-REAL16: v_cmp_le_i16_e64 s[10:11], v255.l, v255.l ; encoding: [0x0a,0x00,0x33,0xd4,0xff,0xff,0x03,0x00]
+# W64-FAKE16: v_cmp_le_i16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x33,0xd4,0xff,0xff,0x03,0x00]
 
 0x0a,0x00,0x33,0xd4,0x01,0x04,0x00,0x00
 # W32: v_cmp_le_i16_e64 s10, s1, s2            ; encoding: [0x0a,0x00,0x33,0xd4,0x01,0x04,0x00,0x00]
@@ -1890,6 +1996,19 @@
 0x7c,0x00,0x33,0xd4,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00
 # GFX12: v_cmp_le_i16_e64 null, 0xfe0b, vcc_hi   ; encoding: [0x7c,0x00,0x33,0xd4,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00]
 
+0x0a,0x08,0x33,0xd4,0x01,0x05,0x02,0x00
+# W32-REAL16: v_cmp_le_i16_e64 s10, v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x0a,0x08,0x33,0xd4,0x01,0x05,0x02,0x00]
+# W32-FAKE16: v_cmp_le_i16_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x33,0xd4,0x01,0x05,0x02,0x00]
+# W64-REAL16: v_cmp_le_i16_e64 s[10:11], v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x0a,0x08,0x33,0xd4,0x01,0x05,0x02,0x00]
+# W64-FAKE16: v_cmp_le_i16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x33,0xd4,0x01,0x05,0x02,0x00]
+
+0x0a,0x10,0x33,0xd4,0xff,0xff,0x03,0x00
+# W32-REAL16: v_cmp_le_i16_e64 s10, v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x0a,0x10,0x33,0xd4,0xff,0xff,0x03,0x00]
+# W32-FAKE16: v_cmp_le_i16_e64 s10, v255, v255        ; encoding: [0x0a,0x00,0x33,0xd4,0xff,0xff,0x03,0x00]
+# W64-REAL16: v_cmp_le_i16_e64 s[10:11], v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x0a,0x10,0x33,0xd4,0xff,0xff,0x03,0x00]
+# W64-FAKE16: v_cmp_le_i16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x33,0xd4,0xff,0xff,0x03,0x00]
+
+
 0x0a,0x00,0x43,0xd4,0x01,0x05,0x02,0x00
 # W32: v_cmp_le_i32_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x43,0xd4,0x01,0x05,0x02,0x00]
 # W64: v_cmp_le_i32_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x43,0xd4,0x01,0x05,0x02,0x00]
@@ -1997,12 +2116,16 @@
 # GFX12: v_cmp_le_i64_e64 null, 0xaf123456, vcc  ; encoding: [0x7c,0x00,0x53,0xd4,0xff,0xd4,0x00,0x00,0x56,0x34,0x12,0xaf]
 
 0x0a,0x00,0x3b,0xd4,0x01,0x05,0x02,0x00
-# W32: v_cmp_le_u16_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x3b,0xd4,0x01,0x05,0x02,0x00]
-# W64: v_cmp_le_u16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x3b,0xd4,0x01,0x05,0x02,0x00]
+# W32-REAL16: v_cmp_le_u16_e64 s10, v1.l, v2.l        ; encoding: [0x0a,0x00,0x3b,0xd4,0x01,0x05,0x02,0x00]
+# W32-FAKE16: v_cmp_le_u16_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x3b,0xd4,0x01,0x05,0x02,0x00]
+# W64-REAL16: v_cmp_le_u16_e64 s[10:11], v1.l, v2.l   ; encoding: [0x0a,0x00,0x3b,0xd4,0x01,0x05,0x02,0x00]
+# W64-FAKE16: v_cmp_le_u16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x3b,0xd4,0x01,0x05,0x02,0x00]
 
 0x0a,0x00,0x3b,0xd4,0xff,0xff,0x03,0x00
-# W32: v_cmp_le_u16_e64 s10, v255, v255        ; encoding: [0x0a,0x00,0x3b,0xd4,0xff,0xff,0x03,0x00]
-# W64: v_cmp_le_u16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x3b,0xd4,0xff,0xff,0x03,0x00]
+# W32-REAL16: v_cmp_le_u16_e64 s10, v255.l, v255.l    ; encoding: [0x0a,0x00,0x3b,0xd4,0xff,0xff,0x03,0x00]
+# W32-FAKE16: v_cmp_le_u16_e64 s10, v255, v255        ; encoding: [0x0a,0x00,0x3b,0xd4,0xff,0xff,0x03,0x00]
+# W64-REAL16: v_cmp_le_u16_e64 s[10:11], v255.l, v255.l ; encoding: [0x0a,0x00,0x3b,0xd4,0xff,0xff,0x03,0x00]
+# W64-FAKE16: v_cmp_le_u16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x3b,0xd4,0xff,0xff,0x03,0x00]
 
 0x0a,0x00,0x3b,0xd4,0x01,0x04,0x00,0x00
 # W32: v_cmp_le_u16_e64 s10, s1, s2            ; encoding: [0x0a,0x00,0x3b,0xd4,0x01,0x04,0x00,0x00]
@@ -2055,6 +2178,19 @@
 0x7c,0x00,0x3b,0xd4,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00
 # GFX12: v_cmp_le_u16_e64 null, 0xfe0b, vcc_hi   ; encoding: [0x7c,0x00,0x3b,0xd4,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00]
 
+0x0a,0x08,0x3b,0xd4,0x01,0x05,0x02,0x00
+# W32-REAL16: v_cmp_le_u16_e64 s10, v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x0a,0x08,0x3b,0xd4,0x01,0x05,0x02,0x00]
+# W32-FAKE16: v_cmp_le_u16_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x3b,0xd4,0x01,0x05,0x02,0x00]
+# W64-REAL16: v_cmp_le_u16_e64 s[10:11], v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x0a,0x08,0x3b,0xd4,0x01,0x05,0x02,0x00]
+# W64-FAKE16: v_cmp_le_u16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x3b,0xd4,0x01,0x05,0x02,0x00]
+
+0x0a,0x10,0x3b,0xd4,0xff,0xff,0x03,0x00
+# W32-REAL16: v_cmp_le_u16_e64 s10, v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x0a,0x10,0x3b,0xd4,0xff,0xff,0x03,0x00]
+# W32-FAKE16: v_cmp_le_u16_e64 s10, v255, v255        ; encoding: [0x0a,0x00,0x3b,0xd4,0xff,0xff,0x03,0x00]
+# W64-REAL16: v_cmp_le_u16_e64 s[10:11], v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x0a,0x10,0x3b,0xd4,0xff,0xff,0x03,0x00]
+# W64-FAKE16: v_cmp_le_u16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x3b,0xd4,0xff,0xff,0x03,0x00]
+
+
 0x0a,0x00,0x4b,0xd4,0x01,0x05,0x02,0x00
 # W32: v_cmp_le_u32_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x4b,0xd4,0x01,0x05,0x02,0x00]
 # W64: v_cmp_le_u32_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x4b,0xd4,0x01,0x05,0x02,0x00]
@@ -2509,12 +2645,16 @@
 # GFX12: v_cmp_lt_f64_e64 null, 0xaf123456, -|vcc| clamp ; encoding: [0x7c,0x82,0x21,0xd4,0xff,0xd4,0x00,0x40,0x56,0x34,0x12,0xaf]
 
 0x0a,0x00,0x31,0xd4,0x01,0x05,0x02,0x00
-# W32: v_cmp_lt_i16_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x31,0xd4,0x01,0x05,0x02,0x00]
-# W64: v_cmp_lt_i16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x31,0xd4,0x01,0x05,0x02,0x00]
+# W32-REAL16: v_cmp_lt_i16_e64 s10, v1.l, v2.l        ; encoding: [0x0a,0x00,0x31,0xd4,0x01,0x05,0x02,0x00]
+# W32-FAKE16: v_cmp_lt_i16_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x31,0xd4,0x01,0x05,0x02,0x00]
+# W64-REAL16: v_cmp_lt_i16_e64 s[10:11], v1.l, v2.l   ; encoding: [0x0a,0x00,0x31,0xd4,0x01,0x05,0x02,0x00]
+# W64-FAKE16: v_cmp_lt_i16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x31,0xd4,0x01,0x05,0x02,0x00]
 
 0x0a,0x00,0x31,0xd4,0xff,0xff,0x03,0x00
-# W32: v_cmp_lt_i16_e64 s10, v255, v255        ; encoding: [0x0a,0x00,0x31,0xd4,0xff,0xff,0x03,0x00]
-# W64: v_cmp_lt_i16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x31,0xd4,0xff,0xff,0x03,0x00]
+# W32-REAL16: v_cmp_lt_i16_e64 s10, v255.l, v255.l    ; encoding: [0x0a,0x00,0x31,0xd4,0xff,0xff,0x03,0x00]
+# W32-FAKE16: v_cmp_lt_i16_e64 s10, v255, v255        ; encoding: [0x0a,0x00,0x31,0xd4,0xff,0xff,0x03,0x00]
+# W64-REAL16: v_cmp_lt_i16_e64 s[10:11], v255.l, v255.l ; encoding: [0x0a,0x00,0x31,0xd4,0xff,0xff,0x03,0x00]
+# W64-FAKE16: v_cmp_lt_i16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x31,0xd4,0xff,0xff,0x03,0x00]
 
 0x0a,0x00,0x31,0xd4,0x01,0x04,0x00,0x00
 # W32: v_cmp_lt_i16_e64 s10, s1, s2            ; encoding: [0x0a,0x00,0x31,0xd4,0x01,0x04,0x00,0x00]
@@ -2567,6 +2707,19 @@
 0x7c,0x00,0x31,0xd4,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00
 # GFX12: v_cmp_lt_i16_e64 null, 0xfe0b, vcc_hi   ; encoding: [0x7c,0x00,0x31,0xd4,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00]
 
+0x0a,0x08,0x31,0xd4,0x01,0x05,0x02,0x00
+# W32-REAL16: v_cmp_lt_i16_e64 s10, v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x0a,0x08,0x31,0xd4,0x01,0x05,0x02,0x00]
+# W32-FAKE16: v_cmp_lt_i16_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x31,0xd4,0x01,0x05,0x02,0x00]
+# W64-REAL16: v_cmp_lt_i16_e64 s[10:11], v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x0a,0x08,0x31,0xd4,0x01,0x05,0x02,0x00]
+# W64-FAKE16: v_cmp_lt_i16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x31,0xd4,0x01,0x05,0x02,0x00]
+
+0x0a,0x10,0x31,0xd4,0xff,0xff,0x03,0x00
+# W32-REAL16: v_cmp_lt_i16_e64 s10, v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x0a,0x10,0x31,0xd4,0xff,0xff,0x03,0x00]
+# W32-FAKE16: v_cmp_lt_i16_e64 s10, v255, v255        ; encoding: [0x0a,0x00,0x31,0xd4,0xff,0xff,0x03,0x00]
+# W64-REAL16: v_cmp_lt_i16_e64 s[10:11], v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x0a,0x10,0x31,0xd4,0xff,0xff,0x03,0x00]
+# W64-FAKE16: v_cmp_lt_i16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x31,0xd4,0xff,0xff,0x03,0x00]
+
+
 0x0a,0x00,0x41,0xd4,0x01,0x05,0x02,0x00
 # W32: v_cmp_lt_i32_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x41,0xd4,0x01,0x05,0x02,0x00]
 # W64: v_cmp_lt_i32_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x41,0xd4,0x01,0x05,0x02,0x00]
@@ -2674,12 +2827,16 @@
 # GFX12: v_cmp_lt_i64_e64 null, 0xaf123456, vcc  ; encoding: [0x7c,0x00,0x51,0xd4,0xff,0xd4,0x00,0x00,0x56,0x34,0x12,0xaf]
 
 0x0a,0x00,0x39,0xd4,0x01,0x05,0x02,0x00
-# W32: v_cmp_lt_u16_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x39,0xd4,0x01,0x05,0x02,0x00]
-# W64: v_cmp_lt_u16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x39,0xd4,0x01,0x05,0x02,0x00]
+# W32-REAL16: v_cmp_lt_u16_e64 s10, v1.l, v2.l        ; encoding: [0x0a,0x00,0x39,0xd4,0x01,0x05,0x02,0x00]
+# W32-FAKE16: v_cmp_lt_u16_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x39,0xd4,0x01,0x05,0x02,0x00]
+# W64-REAL16: v_cmp_lt_u16_e64 s[10:11], v1.l, v2.l   ; encoding: [0x0a,0x00,0x39,0xd4,0x01,0x05,0x02,0x00]
+# W64-FAKE16: v_cmp_lt_u16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x39,0xd4,0x01,0x05,0x02,0x00]
 
 0x0a,0x00,0x39,0xd4,0xff,0xff,0x03,0x00
-# W32: v_cmp_lt_u16_e64 s10, v255, v255        ; encoding: [0x0a,0x00,0x39,0xd4,0xff,0xff,0x03,0x00]
-# W64: v_cmp_lt_u16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x39,0xd4,0xff,0xff,0x03,0x00]
+# W32-REAL16: v_cmp_lt_u16_e64 s10, v255.l, v255.l    ; encoding: [0x0a,0x00,0x39,0xd4,0xff,0xff,0x03,0x00]
+# W32-FAKE16: v_cmp_lt_u16_e64 s10, v255, v255        ; encoding: [0x0a,0x00,0x39,0xd4,0xff,0xff,0x03,0x00]
+# W64-REAL16: v_cmp_lt_u16_e64 s[10:11], v255.l, v255.l ; encoding: [0x0a,0x00,0x39,0xd4,0xff,0xff,0x03,0x00]
+# W64-FAKE16: v_cmp_lt_u16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x39,0xd4,0xff,0xff,0x03,0x00]
 
 0x0a,0x00,0x39,0xd4,0x01,0x04,0x00,0x00
 # W32: v_cmp_lt_u16_e64 s10, s1, s2            ; encoding: [0x0a,0x00,0x39,0xd4,0x01,0x04,0x00,0x00]
@@ -2732,6 +2889,19 @@
 0x7c,0x00,0x39,0xd4,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00
 # GFX12: v_cmp_lt_u16_e64 null, 0xfe0b, vcc_hi   ; encoding: [0x7c,0x00,0x39,0xd4,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00]
 
+0x0a,0x08,0x39,0xd4,0x01,0x05,0x02,0x00
+# W32-REAL16: v_cmp_lt_u16_e64 s10, v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x0a,0x08,0x39,0xd4,0x01,0x05,0x02,0x00]
+# W32-FAKE16: v_cmp_lt_u16_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x39,0xd4,0x01,0x05,0x02,0x00]
+# W64-REAL16: v_cmp_lt_u16_e64 s[10:11], v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x0a,0x08,0x39,0xd4,0x01,0x05,0x02,0x00]
+# W64-FAKE16: v_cmp_lt_u16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x39,0xd4,0x01,0x05,0x02,0x00]
+
+0x0a,0x10,0x39,0xd4,0xff,0xff,0x03,0x00
+# W32-REAL16: v_cmp_lt_u16_e64 s10, v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x0a,0x10,0x39,0xd4,0xff,0xff,0x03,0x00]
+# W32-FAKE16: v_cmp_lt_u16_e64 s10, v255, v255        ; encoding: [0x0a,0x00,0x39,0xd4,0xff,0xff,0x03,0x00]
+# W64-REAL16: v_cmp_lt_u16_e64 s[10:11], v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x0a,0x10,0x39,0xd4,0xff,0xff,0x03,0x00]
+# W64-FAKE16: v_cmp_lt_u16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x39,0xd4,0xff,0xff,0x03,0x00]
+
+
 0x0a,0x00,0x49,0xd4,0x01,0x05,0x02,0x00
 # W32: v_cmp_lt_u32_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x49,0xd4,0x01,0x05,0x02,0x00]
 # W64: v_cmp_lt_u32_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x49,0xd4,0x01,0x05,0x02,0x00]
@@ -2839,12 +3009,16 @@
 # GFX12: v_cmp_lt_u64_e64 null, 0xaf123456, vcc  ; encoding: [0x7c,0x00,0x59,0xd4,0xff,0xd4,0x00,0x00,0x56,0x34,0x12,0xaf]
 
 0x0a,0x00,0x35,0xd4,0x01,0x05,0x02,0x00
-# W32: v_cmp_ne_i16_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x35,0xd4,0x01,0x05,0x02,0x00]
-# W64: v_cmp_ne_i16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x35,0xd4,0x01,0x05,0x02,0x00]
+# W32-REAL16: v_cmp_ne_i16_e64 s10, v1.l, v2.l        ; encoding: [0x0a,0x00,0x35,0xd4,0x01,0x05,0x02,0x00]
+# W32-FAKE16: v_cmp_ne_i16_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x35,0xd4,0x01,0x05,0x02,0x00]
+# W64-REAL16: v_cmp_ne_i16_e64 s[10:11], v1.l, v2.l   ; encoding: [0x0a,0x00,0x35,0xd4,0x01,0x05,0x02,0x00]
+# W64-FAKE16: v_cmp_ne_i16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x35,0xd4,0x01,0x05,0x02,0x00]
 
 0x0a,0x00,0x35,0xd4,0xff,0xff,0x03,0x00
-# W32: v_cmp_ne_i16_e64 s10, v255, v255        ; encoding: [0x0a,0x00,0x35,0xd4,0xff,0xff,0x03,0x00]
-# W64: v_cmp_ne_i16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x35,0xd4,0xff,0xff,0x03,0x00]
+# W32-REAL16: v_cmp_ne_i16_e64 s10, v255.l, v255.l    ; encoding: [0x0a,0x00,0x35,0xd4,0xff,0xff,0x03,0x00]
+# W32-FAKE16: v_cmp_ne_i16_e64 s10, v255, v255        ; encoding: [0x0a,0x00,0x35,0xd4,0xff,0xff,0x03,0x00]
+# W64-REAL16: v_cmp_ne_i16_e64 s[10:11], v255.l, v255.l ; encoding: [0x0a,0x00,0x35,0xd4,0xff,0xff,0x03,0x00]
+# W64-FAKE16: v_cmp_ne_i16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x35,0xd4,0xff,0xff,0x03,0x00]
 
 0x0a,0x00,0x35,0xd4,0x01,0x04,0x00,0x00
 # W32: v_cmp_ne_i16_e64 s10, s1, s2            ; encoding: [0x0a,0x00,0x35,0xd4,0x01,0x04,0x00,0x00]
@@ -2897,6 +3071,19 @@
 0x7c,0x00,0x35,0xd4,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00
 # GFX12: v_cmp_ne_i16_e64 null, 0xfe0b, vcc_hi   ; encoding: [0x7c,0x00,0x35,0xd4,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00]
 
+0x0a,0x08,0x35,0xd4,0x01,0x05,0x02,0x00
+# W32-REAL16: v_cmp_ne_i16_e64 s10, v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x0a,0x08,0x35,0xd4,0x01,0x05,0x02,0x00]
+# W32-FAKE16: v_cmp_ne_i16_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x35,0xd4,0x01,0x05,0x02,0x00]
+# W64-REAL16: v_cmp_ne_i16_e64 s[10:11], v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x0a,0x08,0x35,0xd4,0x01,0x05,0x02,0x00]
+# W64-FAKE16: v_cmp_ne_i16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x35,0xd4,0x01,0x05,0x02,0x00]
+
+0x0a,0x10,0x35,0xd4,0xff,0xff,0x03,0x00
+# W32-REAL16: v_cmp_ne_i16_e64 s10, v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x0a,0x10,0x35,0xd4,0xff,0xff,0x03,0x00]
+# W32-FAKE16: v_cmp_ne_i16_e64 s10, v255, v255        ; encoding: [0x0a,0x00,0x35,0xd4,0xff,0xff,0x03,0x00]
+# W64-REAL16: v_cmp_ne_i16_e64 s[10:11], v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x0a,0x10,0x35,0xd4,0xff,0xff,0x03,0x00]
+# W64-FAKE16: v_cmp_ne_i16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x35,0xd4,0xff,0xff,0x03,0x00]
+
+
 0x0a,0x00,0x45,0xd4,0x01,0x05,0x02,0x00
 # W32: v_cmp_ne_i32_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x45,0xd4,0x01,0x05,0x02,0x00]
 # W64: v_cmp_ne_i32_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x45,0xd4,0x01,0x05,0x02,0x00]
@@ -3004,12 +3191,16 @@
 # GFX12: v_cmp_ne_i64_e64 null, 0xaf123456, vcc  ; encoding: [0x7c,0x00,0x55,0xd4,0xff,0xd4,0x00,0x00,0x56,0x34,0x12,0xaf]
 
 0x0a,0x00,0x3d,0xd4,0x01,0x05,0x02,0x00
-# W32: v_cmp_ne_u16_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x3d,0xd4,0x01,0x05,0x02,0x00]
-# W64: v_cmp_ne_u16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x3d,0xd4,0x01,0x05,0x02,0x00]
+# W32-REAL16: v_cmp_ne_u16_e64 s10, v1.l, v2.l        ; encoding: [0x0a,0x00,0x3d,0xd4,0x01,0x05,0x02,0x00]
+# W32-FAKE16: v_cmp_ne_u16_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x3d,0xd4,0x01,0x05,0x02,0x00]
+# W64-REAL16: v_cmp_ne_u16_e64 s[10:11], v1.l, v2.l   ; encoding: [0x0a,0x00,0x3d,0xd4,0x01,0x05,0x02,0x00]
+# W64-FAKE16: v_cmp_ne_u16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x3d,0xd4,0x01,0x05,0x02,0x00]
 
 0x0a,0x00,0x3d,0xd4,0xff,0xff,0x03,0x00
-# W32: v_cmp_ne_u16_e64 s10, v255, v255        ; encoding: [0x0a,0x00,0x3d,0xd4,0xff,0xff,0x03,0x00]
-# W64: v_cmp_ne_u16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x3d,0xd4,0xff,0xff,0x03,0x00]
+# W32-REAL16: v_cmp_ne_u16_e64 s10, v255.l, v255.l    ; encoding: [0x0a,0x00,0x3d,0xd4,0xff,0xff,0x03,0x00]
+# W32-FAKE16: v_cmp_ne_u16_e64 s10, v255, v255        ; encoding: [0x0a,0x00,0x3d,0xd4,0xff,0xff,0x03,0x00]
+# W64-REAL16: v_cmp_ne_u16_e64 s[10:11], v255.l, v255.l ; encoding: [0x0a,0x00,0x3d,0xd4,0xff,0xff,0x03,0x00]
+# W64-FAKE16: v_cmp_ne_u16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x3d,0xd4,0xff,0xff,0x03,0x00]
 
 0x0a,0x00,0x3d,0xd4,0x01,0x04,0x00,0x00
 # W32: v_cmp_ne_u16_e64 s10, s1, s2            ; encoding: [0x0a,0x00,0x3d,0xd4,0x01,0x04,0x00,0x00]
@@ -3062,6 +3253,19 @@
 0x7c,0x00,0x3d,0xd4,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00
 # GFX12: v_cmp_ne_u16_e64 null, 0xfe0b, vcc_hi   ; encoding: [0x7c,0x00,0x3d,0xd4,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00]
 
+0x0a,0x08,0x3d,0xd4,0x01,0x05,0x02,0x00
+# W32-REAL16: v_cmp_ne_u16_e64 s10, v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x0a,0x08,0x3d,0xd4,0x01,0x05,0x02,0x00]
+# W32-FAKE16: v_cmp_ne_u16_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x3d,0xd4,0x01,0x05,0x02,0x00]
+# W64-REAL16: v_cmp_ne_u16_e64 s[10:11], v1.h, v2.l op_sel:[1,0,0] ; encoding: [0x0a,0x08,0x3d,0xd4,0x01,0x05,0x02,0x00]
+# W64-FAKE16: v_cmp_ne_u16_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x3d,0xd4,0x01,0x05,0x02,0x00]
+
+0x0a,0x10,0x3d,0xd4,0xff,0xff,0x03,0x00
+# W32-REAL16: v_cmp_ne_u16_e64 s10, v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x0a,0x10,0x3d,0xd4,0xff,0xff,0x03,0x00]
+# W32-FAKE16: v_cmp_ne_u16_e64 s10, v255, v255        ; encoding: [0x0a,0x00,0x3d,0xd4,0xff,0xff,0x03,0x00]
+# W64-REAL16: v_cmp_ne_u16_e64 s[10:11], v255.l, v255.h op_sel:[0,1,0] ; encoding: [0x0a,0x10,0x3d,0xd4,0xff,0xff,0x03,0x00]
+# W64-FAKE16: v_cmp_ne_u16_e64 s[10:11], v255, v255   ; encoding: [0x0a,0x00,0x3d,0xd4,0xff,0xff,0x03,0x00]
+
+
 0x0a,0x00,0x4d,0xd4,0x01,0x05,0x02,0x00
 # W32: v_cmp_ne_u32_e64 s10, v1, v2            ; encoding: [0x0a,0x00,0x4d,0xd4,0x01,0x05,0x02,0x00]
 # W64: v_cmp_ne_u32_e64 s[10:11], v1, v2       ; encoding: [0x0a,0x00,0x4d,0xd4,0x01,0x05,0x02,0x00]
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3c_dpp16.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3c_dpp16.txt
index 487a71d59e273d..59637e1e0416ae 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3c_dpp16.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3c_dpp16.txt
@@ -241,63 +241,106 @@
 # GFX12: v_cmp_eq_f32_e64_dpp null, -|v255|, -|v255| clamp row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x83,0x12,0xd4,0xfa,0xfe,0x03,0x60,0xff,0x6f,0x0d,0x30]
 
 0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff
-# W32: v_cmp_eq_i16_e64_dpp s10, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
-# W64: v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W32-REAL16: v_cmp_eq_i16_e64_dpp s10, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W32-FAKE16: v_cmp_eq_i16_e64_dpp s10, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W64-REAL16: v_cmp_eq_i16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W64-FAKE16: v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
 
 0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff
-# W32: v_cmp_eq_i16_e64_dpp s10, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
-# W64: v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W32-REAL16: v_cmp_eq_i16_e64_dpp s10, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W32-FAKE16: v_cmp_eq_i16_e64_dpp s10, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W64-REAL16: v_cmp_eq_i16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W64-FAKE16: v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
 
 0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff
-# W32: v_cmp_eq_i16_e64_dpp s10, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
-# W64: v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W32-REAL16: v_cmp_eq_i16_e64_dpp s10, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W32-FAKE16: v_cmp_eq_i16_e64_dpp s10, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W64-REAL16: v_cmp_eq_i16_e64_dpp s[10:11], v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W64-FAKE16: v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
 
 0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff
-# W32: v_cmp_eq_i16_e64_dpp s10, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
-# W64: v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W32-REAL16: v_cmp_eq_i16_e64_dpp s10, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W32-FAKE16: v_cmp_eq_i16_e64_dpp s10, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W64-REAL16: v_cmp_eq_i16_e64_dpp s[10:11], v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W64-FAKE16: v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
 
 0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff
-# W32: v_cmp_eq_i16_e64_dpp s10, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
-# W64: v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W32-REAL16: v_cmp_eq_i16_e64_dpp s10, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W32-FAKE16: v_cmp_eq_i16_e64_dpp s10, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W64-REAL16: v_cmp_eq_i16_e64_dpp s[10:11], v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W64-FAKE16: v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
 
 0x0a,0x00,0x32,0xd4,0xfa,0x06,0x00,0x00,0x01,0x01,0x01,0xff
-# W32: v_cmp_eq_i16_e64_dpp s10, v1, s3 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x06,0x00,0x00,0x01,0x01,0x01,0xff]
-# W64: v_cmp_eq_i16_e64_dpp s[10:11], v1, s3 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x06,0x00,0x00,0x01,0x01,0x01,0xff]
+# W32-REAL16: v_cmp_eq_i16_e64_dpp s10, v1.l, s3 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x06,0x00,0x00,0x01,0x01,0x01,0xff]
+# W32-FAKE16: v_cmp_eq_i16_e64_dpp s10, v1, s3 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x06,0x00,0x00,0x01,0x01,0x01,0xff]
+# W64-REAL16: v_cmp_eq_i16_e64_dpp s[10:11], v1.l, s3 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x06,0x00,0x00,0x01,0x01,0x01,0xff]
+# W64-FAKE16: v_cmp_eq_i16_e64_dpp s[10:11], v1, s3 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x06,0x00,0x00,0x01,0x01,0x01,0xff]
 
 0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff
-# W32: v_cmp_eq_i16_e64_dpp s10, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
-# W64: v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W32-REAL16: v_cmp_eq_i16_e64_dpp s10, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W32-FAKE16: v_cmp_eq_i16_e64_dpp s10, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W64-REAL16: v_cmp_eq_i16_e64_dpp s[10:11], v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W64-FAKE16: v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
 
 0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff
-# W32: v_cmp_eq_i16_e64_dpp s10, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
-# W64: v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W32-REAL16: v_cmp_eq_i16_e64_dpp s10, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W32-FAKE16: v_cmp_eq_i16_e64_dpp s10, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W64-REAL16: v_cmp_eq_i16_e64_dpp s[10:11], v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W64-FAKE16: v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
 
 0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff
-# W32: v_cmp_eq_i16_e64_dpp s10, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
-# W64: v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W32-REAL16: v_cmp_eq_i16_e64_dpp s10, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W32-FAKE16: v_cmp_eq_i16_e64_dpp s10, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W64-REAL16: v_cmp_eq_i16_e64_dpp s[10:11], v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W64-FAKE16: v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
 
 0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff
-# W32: v_cmp_eq_i16_e64_dpp s10, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
-# W64: v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W32-REAL16: v_cmp_eq_i16_e64_dpp s10, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W32-FAKE16: v_cmp_eq_i16_e64_dpp s10, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W64-REAL16: v_cmp_eq_i16_e64_dpp s[10:11], v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W64-FAKE16: v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
 
 0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff
-# W32: v_cmp_eq_i16_e64_dpp s10, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
-# W64: v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W32-REAL16: v_cmp_eq_i16_e64_dpp s10, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W32-FAKE16: v_cmp_eq_i16_e64_dpp s10, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W64-REAL16: v_cmp_eq_i16_e64_dpp s[10:11], v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W64-FAKE16: v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
 
 0x68,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff
-# W32: v_cmp_eq_i16_e64_dpp s104, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
-# W64: v_cmp_eq_i16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W32-REAL16: v_cmp_eq_i16_e64_dpp s104, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W32-FAKE16: v_cmp_eq_i16_e64_dpp s104, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W64-REAL16: v_cmp_eq_i16_e64_dpp s[104:105], v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W64-FAKE16: v_cmp_eq_i16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
 
 0x6a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01
-# W32: v_cmp_eq_i16_e64_dpp vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
-# W64: v_cmp_eq_i16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W32-REAL16: v_cmp_eq_i16_e64_dpp vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W32-FAKE16: v_cmp_eq_i16_e64_dpp vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W64-REAL16: v_cmp_eq_i16_e64_dpp vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W64-FAKE16: v_cmp_eq_i16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
 
 0x7a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13
-# W32: v_cmp_eq_i16_e64_dpp ttmp14, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
-# W64: v_cmp_eq_i16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W32-REAL16: v_cmp_eq_i16_e64_dpp ttmp14, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_eq_i16_e64_dpp ttmp14, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_eq_i16_e64_dpp ttmp[14:15], v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_eq_i16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
 
 0x7c,0x00,0x32,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30
-# GFX12: v_cmp_eq_i16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x32,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W32-REAL16: v_cmp_eq_i16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x32,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_eq_i16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x32,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_eq_i16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x32,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_eq_i16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x32,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+
+0x7a,0x08,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13
+# W32-REAL16: v_cmp_eq_i16_e64_dpp ttmp14, v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x08,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_eq_i16_e64_dpp ttmp14, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_eq_i16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x08,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_eq_i16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x32,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+
+0x7c,0x10,0x32,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30
+# W32-REAL16: v_cmp_eq_i16_e64_dpp null, v255.l, v255.h op_sel:[0,1] row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x10,0x32,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_eq_i16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x32,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_eq_i16_e64_dpp null, v255.l, v255.h op_sel:[0,1] row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x10,0x32,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_eq_i16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x32,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
 
 0x0a,0x00,0x42,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff
 # W32: v_cmp_eq_i32_e64_dpp s10, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x42,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
@@ -359,63 +402,106 @@
 # GFX12: v_cmp_eq_i32_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x42,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
 
 0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff
-# W32: v_cmp_eq_u16_e64_dpp s10, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
-# W64: v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W32-REAL16: v_cmp_eq_u16_e64_dpp s10, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W32-FAKE16: v_cmp_eq_u16_e64_dpp s10, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W64-REAL16: v_cmp_eq_u16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W64-FAKE16: v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
 
 0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff
-# W32: v_cmp_eq_u16_e64_dpp s10, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
-# W64: v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W32-REAL16: v_cmp_eq_u16_e64_dpp s10, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W32-FAKE16: v_cmp_eq_u16_e64_dpp s10, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W64-REAL16: v_cmp_eq_u16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W64-FAKE16: v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
 
 0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff
-# W32: v_cmp_eq_u16_e64_dpp s10, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
-# W64: v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W32-REAL16: v_cmp_eq_u16_e64_dpp s10, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W32-FAKE16: v_cmp_eq_u16_e64_dpp s10, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W64-REAL16: v_cmp_eq_u16_e64_dpp s[10:11], v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W64-FAKE16: v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
 
 0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff
-# W32: v_cmp_eq_u16_e64_dpp s10, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
-# W64: v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W32-REAL16: v_cmp_eq_u16_e64_dpp s10, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W32-FAKE16: v_cmp_eq_u16_e64_dpp s10, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W64-REAL16: v_cmp_eq_u16_e64_dpp s[10:11], v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W64-FAKE16: v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
 
 0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff
-# W32: v_cmp_eq_u16_e64_dpp s10, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
-# W64: v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W32-REAL16: v_cmp_eq_u16_e64_dpp s10, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W32-FAKE16: v_cmp_eq_u16_e64_dpp s10, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W64-REAL16: v_cmp_eq_u16_e64_dpp s[10:11], v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W64-FAKE16: v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
 
 0x0a,0x00,0x3a,0xd4,0xfa,0x06,0x00,0x00,0x01,0x01,0x01,0xff
-# W32: v_cmp_eq_u16_e64_dpp s10, v1, s3 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x06,0x00,0x00,0x01,0x01,0x01,0xff]
-# W64: v_cmp_eq_u16_e64_dpp s[10:11], v1, s3 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x06,0x00,0x00,0x01,0x01,0x01,0xff]
+# W32-REAL16: v_cmp_eq_u16_e64_dpp s10, v1.l, s3 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x06,0x00,0x00,0x01,0x01,0x01,0xff]
+# W32-FAKE16: v_cmp_eq_u16_e64_dpp s10, v1, s3 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x06,0x00,0x00,0x01,0x01,0x01,0xff]
+# W64-REAL16: v_cmp_eq_u16_e64_dpp s[10:11], v1.l, s3 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x06,0x00,0x00,0x01,0x01,0x01,0xff]
+# W64-FAKE16: v_cmp_eq_u16_e64_dpp s[10:11], v1, s3 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x06,0x00,0x00,0x01,0x01,0x01,0xff]
 
 0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff
-# W32: v_cmp_eq_u16_e64_dpp s10, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
-# W64: v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W32-REAL16: v_cmp_eq_u16_e64_dpp s10, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W32-FAKE16: v_cmp_eq_u16_e64_dpp s10, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W64-REAL16: v_cmp_eq_u16_e64_dpp s[10:11], v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W64-FAKE16: v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
 
 0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff
-# W32: v_cmp_eq_u16_e64_dpp s10, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
-# W64: v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W32-REAL16: v_cmp_eq_u16_e64_dpp s10, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W32-FAKE16: v_cmp_eq_u16_e64_dpp s10, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W64-REAL16: v_cmp_eq_u16_e64_dpp s[10:11], v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W64-FAKE16: v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
 
 0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff
-# W32: v_cmp_eq_u16_e64_dpp s10, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
-# W64: v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W32-REAL16: v_cmp_eq_u16_e64_dpp s10, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W32-FAKE16: v_cmp_eq_u16_e64_dpp s10, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W64-REAL16: v_cmp_eq_u16_e64_dpp s[10:11], v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W64-FAKE16: v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
 
 0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff
-# W32: v_cmp_eq_u16_e64_dpp s10, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
-# W64: v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W32-REAL16: v_cmp_eq_u16_e64_dpp s10, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W32-FAKE16: v_cmp_eq_u16_e64_dpp s10, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W64-REAL16: v_cmp_eq_u16_e64_dpp s[10:11], v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W64-FAKE16: v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
 
 0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff
-# W32: v_cmp_eq_u16_e64_dpp s10, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
-# W64: v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W32-REAL16: v_cmp_eq_u16_e64_dpp s10, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W32-FAKE16: v_cmp_eq_u16_e64_dpp s10, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W64-REAL16: v_cmp_eq_u16_e64_dpp s[10:11], v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W64-FAKE16: v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
 
 0x68,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff
-# W32: v_cmp_eq_u16_e64_dpp s104, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
-# W64: v_cmp_eq_u16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W32-REAL16: v_cmp_eq_u16_e64_dpp s104, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W32-FAKE16: v_cmp_eq_u16_e64_dpp s104, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W64-REAL16: v_cmp_eq_u16_e64_dpp s[104:105], v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W64-FAKE16: v_cmp_eq_u16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
 
 0x6a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01
-# W32: v_cmp_eq_u16_e64_dpp vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
-# W64: v_cmp_eq_u16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W32-REAL16: v_cmp_eq_u16_e64_dpp vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W32-FAKE16: v_cmp_eq_u16_e64_dpp vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W64-REAL16: v_cmp_eq_u16_e64_dpp vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W64-FAKE16: v_cmp_eq_u16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
 
 0x7a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13
-# W32: v_cmp_eq_u16_e64_dpp ttmp14, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
-# W64: v_cmp_eq_u16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W32-REAL16: v_cmp_eq_u16_e64_dpp ttmp14, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_eq_u16_e64_dpp ttmp14, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_eq_u16_e64_dpp ttmp[14:15], v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_eq_u16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
 
 0x7c,0x00,0x3a,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30
-# GFX12: v_cmp_eq_u16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x3a,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W32-REAL16: v_cmp_eq_u16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x3a,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_eq_u16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x3a,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_eq_u16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x3a,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_eq_u16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x3a,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+
+0x7a,0x08,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13
+# W32-REAL16: v_cmp_eq_u16_e64_dpp ttmp14, v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x08,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_eq_u16_e64_dpp ttmp14, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_eq_u16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x08,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_eq_u16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x3a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+
+0x7c,0x10,0x3a,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30
+# W32-REAL16: v_cmp_eq_u16_e64_dpp null, v255.l, v255.h op_sel:[0,1] row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x10,0x3a,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_eq_u16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x3a,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_eq_u16_e64_dpp null, v255.l, v255.h op_sel:[0,1] row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x10,0x3a,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_eq_u16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x3a,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
 
 0x0a,0x00,0x4a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff
 # W32: v_cmp_eq_u32_e64_dpp s10, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x4a,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
@@ -595,66 +681,112 @@
 # GFX12: v_cmp_ge_f32_e64_dpp null, -|v255|, -|v255| clamp row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x83,0x16,0xd4,0xfa,0xfe,0x03,0x60,0xff,0x6f,0x0d,0x30]
 
 0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff
-# W32: v_cmp_ge_i16_e64_dpp s10, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
-# W64: v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W32-REAL16: v_cmp_ge_i16_e64_dpp s10, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W32-FAKE16: v_cmp_ge_i16_e64_dpp s10, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W64-REAL16: v_cmp_ge_i16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W64-FAKE16: v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
 
 0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff
-# W32: v_cmp_ge_i16_e64_dpp s10, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
-# W64: v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W32-REAL16: v_cmp_ge_i16_e64_dpp s10, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W32-FAKE16: v_cmp_ge_i16_e64_dpp s10, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W64-REAL16: v_cmp_ge_i16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W64-FAKE16: v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
 
 0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff
-# W32: v_cmp_ge_i16_e64_dpp s10, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
-# W64: v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W32-REAL16: v_cmp_ge_i16_e64_dpp s10, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W32-FAKE16: v_cmp_ge_i16_e64_dpp s10, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W64-REAL16: v_cmp_ge_i16_e64_dpp s[10:11], v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W64-FAKE16: v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
 
 0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff
-# W32: v_cmp_ge_i16_e64_dpp s10, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
-# W64: v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W32-REAL16: v_cmp_ge_i16_e64_dpp s10, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W32-FAKE16: v_cmp_ge_i16_e64_dpp s10, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W64-REAL16: v_cmp_ge_i16_e64_dpp s[10:11], v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W64-FAKE16: v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
 
 0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff
-# W32: v_cmp_ge_i16_e64_dpp s10, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
-# W64: v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W32-REAL16: v_cmp_ge_i16_e64_dpp s10, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W32-FAKE16: v_cmp_ge_i16_e64_dpp s10, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W64-REAL16: v_cmp_ge_i16_e64_dpp s[10:11], v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W64-FAKE16: v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
 
 0x0a,0x00,0x36,0xd4,0xfa,0x06,0x00,0x00,0x01,0x01,0x01,0xff
-# W32: v_cmp_ge_i16_e64_dpp s10, v1, s3 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x06,0x00,0x00,0x01,0x01,0x01,0xff]
-# W64: v_cmp_ge_i16_e64_dpp s[10:11], v1, s3 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x06,0x00,0x00,0x01,0x01,0x01,0xff]
+# W32-REAL16: v_cmp_ge_i16_e64_dpp s10, v1.l, s3 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x06,0x00,0x00,0x01,0x01,0x01,0xff]
+# W32-FAKE16: v_cmp_ge_i16_e64_dpp s10, v1, s3 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x06,0x00,0x00,0x01,0x01,0x01,0xff]
+# W64-REAL16: v_cmp_ge_i16_e64_dpp s[10:11], v1.l, s3 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x06,0x00,0x00,0x01,0x01,0x01,0xff]
+# W64-FAKE16: v_cmp_ge_i16_e64_dpp s[10:11], v1, s3 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x06,0x00,0x00,0x01,0x01,0x01,0xff]
 
 0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff
-# W32: v_cmp_ge_i16_e64_dpp s10, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
-# W64: v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W32-REAL16: v_cmp_ge_i16_e64_dpp s10, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W32-FAKE16: v_cmp_ge_i16_e64_dpp s10, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W64-REAL16: v_cmp_ge_i16_e64_dpp s[10:11], v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W64-FAKE16: v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
 
 0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff
-# W32: v_cmp_ge_i16_e64_dpp s10, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
-# W64: v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W32-REAL16: v_cmp_ge_i16_e64_dpp s10, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W32-FAKE16: v_cmp_ge_i16_e64_dpp s10, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W64-REAL16: v_cmp_ge_i16_e64_dpp s[10:11], v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W64-FAKE16: v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
 
 0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff
-# W32: v_cmp_ge_i16_e64_dpp s10, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
-# W64: v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W32-REAL16: v_cmp_ge_i16_e64_dpp s10, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W32-FAKE16: v_cmp_ge_i16_e64_dpp s10, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W64-REAL16: v_cmp_ge_i16_e64_dpp s[10:11], v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W64-FAKE16: v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
 
 0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff
-# W32: v_cmp_ge_i16_e64_dpp s10, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
-# W64: v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W32-REAL16: v_cmp_ge_i16_e64_dpp s10, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W32-FAKE16: v_cmp_ge_i16_e64_dpp s10, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W64-REAL16: v_cmp_ge_i16_e64_dpp s[10:11], v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W64-FAKE16: v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
 
 0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff
-# W32: v_cmp_ge_i16_e64_dpp s10, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
-# W64: v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W32-REAL16: v_cmp_ge_i16_e64_dpp s10, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W32-FAKE16: v_cmp_ge_i16_e64_dpp s10, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W64-REAL16: v_cmp_ge_i16_e64_dpp s[10:11], v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W64-FAKE16: v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
 
 0x68,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff
-# W32: v_cmp_ge_i16_e64_dpp s104, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
-# W64: v_cmp_ge_i16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W32-REAL16: v_cmp_ge_i16_e64_dpp s104, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W32-FAKE16: v_cmp_ge_i16_e64_dpp s104, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W64-REAL16: v_cmp_ge_i16_e64_dpp s[104:105], v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W64-FAKE16: v_cmp_ge_i16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
 
 0x6a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01
-# W32: v_cmp_ge_i16_e64_dpp vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
-# W64: v_cmp_ge_i16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W32-REAL16: v_cmp_ge_i16_e64_dpp vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W32-FAKE16: v_cmp_ge_i16_e64_dpp vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W64-REAL16: v_cmp_ge_i16_e64_dpp vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W64-FAKE16: v_cmp_ge_i16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
 
 0x7a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13
-# W32: v_cmp_ge_i16_e64_dpp ttmp14, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
-# W64: v_cmp_ge_i16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W32-REAL16: v_cmp_ge_i16_e64_dpp ttmp14, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_ge_i16_e64_dpp ttmp14, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_ge_i16_e64_dpp ttmp[14:15], v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_ge_i16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
 
 0x7c,0x00,0x36,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30
-# GFX12: v_cmp_ge_i16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x36,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W32-REAL16: v_cmp_ge_i16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x36,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_ge_i16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x36,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_ge_i16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x36,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_ge_i16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x36,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
 
 0x7c,0x00,0x36,0xd4,0xfa,0x14,0x01,0x00,0xff,0x6f,0x0d,0x30
-# GFX12: v_cmp_ge_i16_e64_dpp null, v255, 10 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x36,0xd4,0xfa,0x14,0x01,0x00,0xff,0x6f,0x0d,0x30]
+# W32-REAL16: v_cmp_ge_i16_e64_dpp null, v255.l, 10 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x36,0xd4,0xfa,0x14,0x01,0x00,0xff,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_ge_i16_e64_dpp null, v255, 10 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x36,0xd4,0xfa,0x14,0x01,0x00,0xff,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_ge_i16_e64_dpp null, v255.l, 10 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x36,0xd4,0xfa,0x14,0x01,0x00,0xff,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_ge_i16_e64_dpp null, v255, 10 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x36,0xd4,0xfa,0x14,0x01,0x00,0xff,0x6f,0x0d,0x30]
+
+0x7a,0x08,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13
+# W32-REAL16: v_cmp_ge_i16_e64_dpp ttmp14, v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x08,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_ge_i16_e64_dpp ttmp14, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_ge_i16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x08,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_ge_i16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x36,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+
+0x7c,0x10,0x36,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30
+# W32-REAL16: v_cmp_ge_i16_e64_dpp null, v255.l, v255.h op_sel:[0,1] row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x10,0x36,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_ge_i16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x36,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_ge_i16_e64_dpp null, v255.l, v255.h op_sel:[0,1] row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x10,0x36,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_ge_i16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x36,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
 
 0x0a,0x00,0x46,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff
 # W32: v_cmp_ge_i32_e64_dpp s10, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x46,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
@@ -716,63 +848,106 @@
 # GFX12: v_cmp_ge_i32_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x46,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
 
 0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff
-# W32: v_cmp_ge_u16_e64_dpp s10, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
-# W64: v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W32-REAL16: v_cmp_ge_u16_e64_dpp s10, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W32-FAKE16: v_cmp_ge_u16_e64_dpp s10, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W64-REAL16: v_cmp_ge_u16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W64-FAKE16: v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
 
 0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff
-# W32: v_cmp_ge_u16_e64_dpp s10, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
-# W64: v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W32-REAL16: v_cmp_ge_u16_e64_dpp s10, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W32-FAKE16: v_cmp_ge_u16_e64_dpp s10, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W64-REAL16: v_cmp_ge_u16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W64-FAKE16: v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
 
 0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff
-# W32: v_cmp_ge_u16_e64_dpp s10, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
-# W64: v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W32-REAL16: v_cmp_ge_u16_e64_dpp s10, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W32-FAKE16: v_cmp_ge_u16_e64_dpp s10, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W64-REAL16: v_cmp_ge_u16_e64_dpp s[10:11], v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W64-FAKE16: v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
 
 0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff
-# W32: v_cmp_ge_u16_e64_dpp s10, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
-# W64: v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W32-REAL16: v_cmp_ge_u16_e64_dpp s10, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W32-FAKE16: v_cmp_ge_u16_e64_dpp s10, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W64-REAL16: v_cmp_ge_u16_e64_dpp s[10:11], v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W64-FAKE16: v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
 
 0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff
-# W32: v_cmp_ge_u16_e64_dpp s10, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
-# W64: v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W32-REAL16: v_cmp_ge_u16_e64_dpp s10, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W32-FAKE16: v_cmp_ge_u16_e64_dpp s10, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W64-REAL16: v_cmp_ge_u16_e64_dpp s[10:11], v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W64-FAKE16: v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
 
 0x0a,0x00,0x3e,0xd4,0xfa,0x06,0x00,0x00,0x01,0x01,0x01,0xff
-# W32: v_cmp_ge_u16_e64_dpp s10, v1, s3 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x06,0x00,0x00,0x01,0x01,0x01,0xff]
-# W64: v_cmp_ge_u16_e64_dpp s[10:11], v1, s3 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x06,0x00,0x00,0x01,0x01,0x01,0xff]
+# W32-REAL16: v_cmp_ge_u16_e64_dpp s10, v1.l, s3 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x06,0x00,0x00,0x01,0x01,0x01,0xff]
+# W32-FAKE16: v_cmp_ge_u16_e64_dpp s10, v1, s3 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x06,0x00,0x00,0x01,0x01,0x01,0xff]
+# W64-REAL16: v_cmp_ge_u16_e64_dpp s[10:11], v1.l, s3 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x06,0x00,0x00,0x01,0x01,0x01,0xff]
+# W64-FAKE16: v_cmp_ge_u16_e64_dpp s[10:11], v1, s3 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x06,0x00,0x00,0x01,0x01,0x01,0xff]
 
 0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff
-# W32: v_cmp_ge_u16_e64_dpp s10, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
-# W64: v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W32-REAL16: v_cmp_ge_u16_e64_dpp s10, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W32-FAKE16: v_cmp_ge_u16_e64_dpp s10, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W64-REAL16: v_cmp_ge_u16_e64_dpp s[10:11], v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W64-FAKE16: v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
 
 0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff
-# W32: v_cmp_ge_u16_e64_dpp s10, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
-# W64: v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W32-REAL16: v_cmp_ge_u16_e64_dpp s10, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W32-FAKE16: v_cmp_ge_u16_e64_dpp s10, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W64-REAL16: v_cmp_ge_u16_e64_dpp s[10:11], v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W64-FAKE16: v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
 
 0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff
-# W32: v_cmp_ge_u16_e64_dpp s10, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
-# W64: v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W32-REAL16: v_cmp_ge_u16_e64_dpp s10, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W32-FAKE16: v_cmp_ge_u16_e64_dpp s10, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W64-REAL16: v_cmp_ge_u16_e64_dpp s[10:11], v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W64-FAKE16: v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
 
 0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff
-# W32: v_cmp_ge_u16_e64_dpp s10, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
-# W64: v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W32-REAL16: v_cmp_ge_u16_e64_dpp s10, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W32-FAKE16: v_cmp_ge_u16_e64_dpp s10, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W64-REAL16: v_cmp_ge_u16_e64_dpp s[10:11], v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W64-FAKE16: v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
 
 0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff
-# W32: v_cmp_ge_u16_e64_dpp s10, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
-# W64: v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W32-REAL16: v_cmp_ge_u16_e64_dpp s10, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W32-FAKE16: v_cmp_ge_u16_e64_dpp s10, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W64-REAL16: v_cmp_ge_u16_e64_dpp s[10:11], v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W64-FAKE16: v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
 
 0x68,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff
-# W32: v_cmp_ge_u16_e64_dpp s104, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
-# W64: v_cmp_ge_u16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W32-REAL16: v_cmp_ge_u16_e64_dpp s104, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W32-FAKE16: v_cmp_ge_u16_e64_dpp s104, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W64-REAL16: v_cmp_ge_u16_e64_dpp s[104:105], v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W64-FAKE16: v_cmp_ge_u16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
 
 0x6a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01
-# W32: v_cmp_ge_u16_e64_dpp vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
-# W64: v_cmp_ge_u16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W32-REAL16: v_cmp_ge_u16_e64_dpp vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W32-FAKE16: v_cmp_ge_u16_e64_dpp vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W64-REAL16: v_cmp_ge_u16_e64_dpp vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W64-FAKE16: v_cmp_ge_u16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
 
 0x7a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13
-# W32: v_cmp_ge_u16_e64_dpp ttmp14, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
-# W64: v_cmp_ge_u16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W32-REAL16: v_cmp_ge_u16_e64_dpp ttmp14, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_ge_u16_e64_dpp ttmp14, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_ge_u16_e64_dpp ttmp[14:15], v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_ge_u16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
 
 0x7c,0x00,0x3e,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30
-# GFX12: v_cmp_ge_u16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x3e,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W32-REAL16: v_cmp_ge_u16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x3e,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_ge_u16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x3e,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_ge_u16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x3e,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_ge_u16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x3e,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+
+0x7a,0x08,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13
+# W32-REAL16: v_cmp_ge_u16_e64_dpp ttmp14, v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x08,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_ge_u16_e64_dpp ttmp14, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_ge_u16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x08,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_ge_u16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x3e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+
+0x7c,0x10,0x3e,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30
+# W32-REAL16: v_cmp_ge_u16_e64_dpp null, v255.l, v255.h op_sel:[0,1] row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x10,0x3e,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_ge_u16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x3e,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_ge_u16_e64_dpp null, v255.l, v255.h op_sel:[0,1] row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x10,0x3e,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_ge_u16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x3e,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
 
 0x0a,0x00,0x4e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff
 # W32: v_cmp_ge_u32_e64_dpp s10, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x4e,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
@@ -952,63 +1127,106 @@
 # GFX12: v_cmp_gt_f32_e64_dpp null, -|v255|, -|v255| clamp row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x83,0x14,0xd4,0xfa,0xfe,0x03,0x60,0xff,0x6f,0x0d,0x30]
 
 0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff
-# W32: v_cmp_gt_i16_e64_dpp s10, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
-# W64: v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W32-REAL16: v_cmp_gt_i16_e64_dpp s10, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W32-FAKE16: v_cmp_gt_i16_e64_dpp s10, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W64-REAL16: v_cmp_gt_i16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W64-FAKE16: v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
 
 0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff
-# W32: v_cmp_gt_i16_e64_dpp s10, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
-# W64: v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W32-REAL16: v_cmp_gt_i16_e64_dpp s10, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W32-FAKE16: v_cmp_gt_i16_e64_dpp s10, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W64-REAL16: v_cmp_gt_i16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W64-FAKE16: v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
 
 0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff
-# W32: v_cmp_gt_i16_e64_dpp s10, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
-# W64: v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W32-REAL16: v_cmp_gt_i16_e64_dpp s10, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W32-FAKE16: v_cmp_gt_i16_e64_dpp s10, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W64-REAL16: v_cmp_gt_i16_e64_dpp s[10:11], v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W64-FAKE16: v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
 
 0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff
-# W32: v_cmp_gt_i16_e64_dpp s10, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
-# W64: v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W32-REAL16: v_cmp_gt_i16_e64_dpp s10, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W32-FAKE16: v_cmp_gt_i16_e64_dpp s10, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W64-REAL16: v_cmp_gt_i16_e64_dpp s[10:11], v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W64-FAKE16: v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
 
 0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff
-# W32: v_cmp_gt_i16_e64_dpp s10, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
-# W64: v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W32-REAL16: v_cmp_gt_i16_e64_dpp s10, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W32-FAKE16: v_cmp_gt_i16_e64_dpp s10, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W64-REAL16: v_cmp_gt_i16_e64_dpp s[10:11], v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W64-FAKE16: v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
 
 0x0a,0x00,0x34,0xd4,0xfa,0x06,0x00,0x00,0x01,0x01,0x01,0xff
-# W32: v_cmp_gt_i16_e64_dpp s10, v1, s3 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x06,0x00,0x00,0x01,0x01,0x01,0xff]
-# W64: v_cmp_gt_i16_e64_dpp s[10:11], v1, s3 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x06,0x00,0x00,0x01,0x01,0x01,0xff]
+# W32-REAL16: v_cmp_gt_i16_e64_dpp s10, v1.l, s3 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x06,0x00,0x00,0x01,0x01,0x01,0xff]
+# W32-FAKE16: v_cmp_gt_i16_e64_dpp s10, v1, s3 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x06,0x00,0x00,0x01,0x01,0x01,0xff]
+# W64-REAL16: v_cmp_gt_i16_e64_dpp s[10:11], v1.l, s3 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x06,0x00,0x00,0x01,0x01,0x01,0xff]
+# W64-FAKE16: v_cmp_gt_i16_e64_dpp s[10:11], v1, s3 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x06,0x00,0x00,0x01,0x01,0x01,0xff]
 
 0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff
-# W32: v_cmp_gt_i16_e64_dpp s10, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
-# W64: v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W32-REAL16: v_cmp_gt_i16_e64_dpp s10, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W32-FAKE16: v_cmp_gt_i16_e64_dpp s10, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W64-REAL16: v_cmp_gt_i16_e64_dpp s[10:11], v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W64-FAKE16: v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
 
 0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff
-# W32: v_cmp_gt_i16_e64_dpp s10, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
-# W64: v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W32-REAL16: v_cmp_gt_i16_e64_dpp s10, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W32-FAKE16: v_cmp_gt_i16_e64_dpp s10, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W64-REAL16: v_cmp_gt_i16_e64_dpp s[10:11], v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W64-FAKE16: v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
 
 0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff
-# W32: v_cmp_gt_i16_e64_dpp s10, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
-# W64: v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W32-REAL16: v_cmp_gt_i16_e64_dpp s10, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W32-FAKE16: v_cmp_gt_i16_e64_dpp s10, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W64-REAL16: v_cmp_gt_i16_e64_dpp s[10:11], v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W64-FAKE16: v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
 
 0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff
-# W32: v_cmp_gt_i16_e64_dpp s10, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
-# W64: v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W32-REAL16: v_cmp_gt_i16_e64_dpp s10, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W32-FAKE16: v_cmp_gt_i16_e64_dpp s10, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W64-REAL16: v_cmp_gt_i16_e64_dpp s[10:11], v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W64-FAKE16: v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
 
 0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff
-# W32: v_cmp_gt_i16_e64_dpp s10, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
-# W64: v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W32-REAL16: v_cmp_gt_i16_e64_dpp s10, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W32-FAKE16: v_cmp_gt_i16_e64_dpp s10, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W64-REAL16: v_cmp_gt_i16_e64_dpp s[10:11], v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W64-FAKE16: v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
 
 0x68,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff
-# W32: v_cmp_gt_i16_e64_dpp s104, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
-# W64: v_cmp_gt_i16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W32-REAL16: v_cmp_gt_i16_e64_dpp s104, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W32-FAKE16: v_cmp_gt_i16_e64_dpp s104, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W64-REAL16: v_cmp_gt_i16_e64_dpp s[104:105], v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W64-FAKE16: v_cmp_gt_i16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
 
 0x6a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01
-# W32: v_cmp_gt_i16_e64_dpp vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
-# W64: v_cmp_gt_i16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W32-REAL16: v_cmp_gt_i16_e64_dpp vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W32-FAKE16: v_cmp_gt_i16_e64_dpp vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W64-REAL16: v_cmp_gt_i16_e64_dpp vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W64-FAKE16: v_cmp_gt_i16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
 
 0x7a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13
-# W32: v_cmp_gt_i16_e64_dpp ttmp14, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
-# W64: v_cmp_gt_i16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W32-REAL16: v_cmp_gt_i16_e64_dpp ttmp14, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_gt_i16_e64_dpp ttmp14, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_gt_i16_e64_dpp ttmp[14:15], v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_gt_i16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
 
 0x7c,0x00,0x34,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30
-# GFX12: v_cmp_gt_i16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x34,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W32-REAL16: v_cmp_gt_i16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x34,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_gt_i16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x34,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_gt_i16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x34,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_gt_i16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x34,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+
+0x7a,0x08,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13
+# W32-REAL16: v_cmp_gt_i16_e64_dpp ttmp14, v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x08,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_gt_i16_e64_dpp ttmp14, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_gt_i16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x08,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_gt_i16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x34,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+
+0x7c,0x10,0x34,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30
+# W32-REAL16: v_cmp_gt_i16_e64_dpp null, v255.l, v255.h op_sel:[0,1] row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x10,0x34,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_gt_i16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x34,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_gt_i16_e64_dpp null, v255.l, v255.h op_sel:[0,1] row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x10,0x34,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_gt_i16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x34,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
 
 0x0a,0x00,0x44,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff
 # W32: v_cmp_gt_i32_e64_dpp s10, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x44,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
@@ -1070,63 +1288,106 @@
 # GFX12: v_cmp_gt_i32_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x44,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
 
 0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff
-# W32: v_cmp_gt_u16_e64_dpp s10, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
-# W64: v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W32-REAL16: v_cmp_gt_u16_e64_dpp s10, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W32-FAKE16: v_cmp_gt_u16_e64_dpp s10, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W64-REAL16: v_cmp_gt_u16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W64-FAKE16: v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
 
 0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff
-# W32: v_cmp_gt_u16_e64_dpp s10, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
-# W64: v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W32-REAL16: v_cmp_gt_u16_e64_dpp s10, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W32-FAKE16: v_cmp_gt_u16_e64_dpp s10, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W64-REAL16: v_cmp_gt_u16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W64-FAKE16: v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
 
 0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff
-# W32: v_cmp_gt_u16_e64_dpp s10, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
-# W64: v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W32-REAL16: v_cmp_gt_u16_e64_dpp s10, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W32-FAKE16: v_cmp_gt_u16_e64_dpp s10, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W64-REAL16: v_cmp_gt_u16_e64_dpp s[10:11], v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W64-FAKE16: v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
 
 0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff
-# W32: v_cmp_gt_u16_e64_dpp s10, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
-# W64: v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W32-REAL16: v_cmp_gt_u16_e64_dpp s10, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W32-FAKE16: v_cmp_gt_u16_e64_dpp s10, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W64-REAL16: v_cmp_gt_u16_e64_dpp s[10:11], v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W64-FAKE16: v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
 
 0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff
-# W32: v_cmp_gt_u16_e64_dpp s10, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
-# W64: v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W32-REAL16: v_cmp_gt_u16_e64_dpp s10, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W32-FAKE16: v_cmp_gt_u16_e64_dpp s10, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W64-REAL16: v_cmp_gt_u16_e64_dpp s[10:11], v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W64-FAKE16: v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
 
 0x0a,0x00,0x3c,0xd4,0xfa,0x06,0x00,0x00,0x01,0x01,0x01,0xff
-# W32: v_cmp_gt_u16_e64_dpp s10, v1, s3 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x06,0x00,0x00,0x01,0x01,0x01,0xff]
-# W64: v_cmp_gt_u16_e64_dpp s[10:11], v1, s3 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x06,0x00,0x00,0x01,0x01,0x01,0xff]
+# W32-REAL16: v_cmp_gt_u16_e64_dpp s10, v1.l, s3 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x06,0x00,0x00,0x01,0x01,0x01,0xff]
+# W32-FAKE16: v_cmp_gt_u16_e64_dpp s10, v1, s3 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x06,0x00,0x00,0x01,0x01,0x01,0xff]
+# W64-REAL16: v_cmp_gt_u16_e64_dpp s[10:11], v1.l, s3 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x06,0x00,0x00,0x01,0x01,0x01,0xff]
+# W64-FAKE16: v_cmp_gt_u16_e64_dpp s[10:11], v1, s3 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x06,0x00,0x00,0x01,0x01,0x01,0xff]
 
 0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff
-# W32: v_cmp_gt_u16_e64_dpp s10, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
-# W64: v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W32-REAL16: v_cmp_gt_u16_e64_dpp s10, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W32-FAKE16: v_cmp_gt_u16_e64_dpp s10, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W64-REAL16: v_cmp_gt_u16_e64_dpp s[10:11], v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W64-FAKE16: v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
 
 0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff
-# W32: v_cmp_gt_u16_e64_dpp s10, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
-# W64: v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W32-REAL16: v_cmp_gt_u16_e64_dpp s10, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W32-FAKE16: v_cmp_gt_u16_e64_dpp s10, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W64-REAL16: v_cmp_gt_u16_e64_dpp s[10:11], v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W64-FAKE16: v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
 
 0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff
-# W32: v_cmp_gt_u16_e64_dpp s10, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
-# W64: v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W32-REAL16: v_cmp_gt_u16_e64_dpp s10, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W32-FAKE16: v_cmp_gt_u16_e64_dpp s10, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W64-REAL16: v_cmp_gt_u16_e64_dpp s[10:11], v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W64-FAKE16: v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
 
 0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff
-# W32: v_cmp_gt_u16_e64_dpp s10, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
-# W64: v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W32-REAL16: v_cmp_gt_u16_e64_dpp s10, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W32-FAKE16: v_cmp_gt_u16_e64_dpp s10, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W64-REAL16: v_cmp_gt_u16_e64_dpp s[10:11], v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W64-FAKE16: v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
 
 0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff
-# W32: v_cmp_gt_u16_e64_dpp s10, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
-# W64: v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W32-REAL16: v_cmp_gt_u16_e64_dpp s10, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W32-FAKE16: v_cmp_gt_u16_e64_dpp s10, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W64-REAL16: v_cmp_gt_u16_e64_dpp s[10:11], v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W64-FAKE16: v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
 
 0x68,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff
-# W32: v_cmp_gt_u16_e64_dpp s104, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
-# W64: v_cmp_gt_u16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W32-REAL16: v_cmp_gt_u16_e64_dpp s104, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W32-FAKE16: v_cmp_gt_u16_e64_dpp s104, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W64-REAL16: v_cmp_gt_u16_e64_dpp s[104:105], v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W64-FAKE16: v_cmp_gt_u16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
 
 0x6a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01
-# W32: v_cmp_gt_u16_e64_dpp vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
-# W64: v_cmp_gt_u16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W32-REAL16: v_cmp_gt_u16_e64_dpp vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W32-FAKE16: v_cmp_gt_u16_e64_dpp vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W64-REAL16: v_cmp_gt_u16_e64_dpp vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W64-FAKE16: v_cmp_gt_u16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
 
 0x7a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13
-# W32: v_cmp_gt_u16_e64_dpp ttmp14, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
-# W64: v_cmp_gt_u16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W32-REAL16: v_cmp_gt_u16_e64_dpp ttmp14, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_gt_u16_e64_dpp ttmp14, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_gt_u16_e64_dpp ttmp[14:15], v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_gt_u16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
 
 0x7c,0x00,0x3c,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30
-# GFX12: v_cmp_gt_u16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x3c,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W32-REAL16: v_cmp_gt_u16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x3c,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_gt_u16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x3c,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_gt_u16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x3c,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_gt_u16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x3c,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+
+0x7a,0x08,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13
+# W32-REAL16: v_cmp_gt_u16_e64_dpp ttmp14, v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x08,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_gt_u16_e64_dpp ttmp14, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_gt_u16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x08,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_gt_u16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x3c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+
+0x7c,0x10,0x3c,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30
+# W32-REAL16: v_cmp_gt_u16_e64_dpp null, v255.l, v255.h op_sel:[0,1] row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x10,0x3c,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_gt_u16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x3c,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_gt_u16_e64_dpp null, v255.l, v255.h op_sel:[0,1] row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x10,0x3c,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_gt_u16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x3c,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
 
 0x0a,0x00,0x4c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff
 # W32: v_cmp_gt_u32_e64_dpp s10, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x4c,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
@@ -1306,63 +1567,106 @@
 # GFX12: v_cmp_le_f32_e64_dpp null, -|v255|, -|v255| clamp row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x83,0x13,0xd4,0xfa,0xfe,0x03,0x60,0xff,0x6f,0x0d,0x30]
 
 0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff
-# W32: v_cmp_le_i16_e64_dpp s10, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
-# W64: v_cmp_le_i16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W32-REAL16: v_cmp_le_i16_e64_dpp s10, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W32-FAKE16: v_cmp_le_i16_e64_dpp s10, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W64-REAL16: v_cmp_le_i16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W64-FAKE16: v_cmp_le_i16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
 
 0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff
-# W32: v_cmp_le_i16_e64_dpp s10, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
-# W64: v_cmp_le_i16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W32-REAL16: v_cmp_le_i16_e64_dpp s10, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W32-FAKE16: v_cmp_le_i16_e64_dpp s10, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W64-REAL16: v_cmp_le_i16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W64-FAKE16: v_cmp_le_i16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
 
 0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff
-# W32: v_cmp_le_i16_e64_dpp s10, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
-# W64: v_cmp_le_i16_e64_dpp s[10:11], v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W32-REAL16: v_cmp_le_i16_e64_dpp s10, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W32-FAKE16: v_cmp_le_i16_e64_dpp s10, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W64-REAL16: v_cmp_le_i16_e64_dpp s[10:11], v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W64-FAKE16: v_cmp_le_i16_e64_dpp s[10:11], v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
 
 0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff
-# W32: v_cmp_le_i16_e64_dpp s10, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
-# W64: v_cmp_le_i16_e64_dpp s[10:11], v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W32-REAL16: v_cmp_le_i16_e64_dpp s10, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W32-FAKE16: v_cmp_le_i16_e64_dpp s10, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W64-REAL16: v_cmp_le_i16_e64_dpp s[10:11], v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W64-FAKE16: v_cmp_le_i16_e64_dpp s[10:11], v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
 
 0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff
-# W32: v_cmp_le_i16_e64_dpp s10, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
-# W64: v_cmp_le_i16_e64_dpp s[10:11], v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W32-REAL16: v_cmp_le_i16_e64_dpp s10, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W32-FAKE16: v_cmp_le_i16_e64_dpp s10, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W64-REAL16: v_cmp_le_i16_e64_dpp s[10:11], v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W64-FAKE16: v_cmp_le_i16_e64_dpp s[10:11], v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
 
 0x0a,0x00,0x33,0xd4,0xfa,0x06,0x00,0x00,0x01,0x01,0x01,0xff
-# W32: v_cmp_le_i16_e64_dpp s10, v1, s3 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x06,0x00,0x00,0x01,0x01,0x01,0xff]
-# W64: v_cmp_le_i16_e64_dpp s[10:11], v1, s3 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x06,0x00,0x00,0x01,0x01,0x01,0xff]
+# W32-REAL16: v_cmp_le_i16_e64_dpp s10, v1.l, s3 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x06,0x00,0x00,0x01,0x01,0x01,0xff]
+# W32-FAKE16: v_cmp_le_i16_e64_dpp s10, v1, s3 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x06,0x00,0x00,0x01,0x01,0x01,0xff]
+# W64-REAL16: v_cmp_le_i16_e64_dpp s[10:11], v1.l, s3 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x06,0x00,0x00,0x01,0x01,0x01,0xff]
+# W64-FAKE16: v_cmp_le_i16_e64_dpp s[10:11], v1, s3 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x06,0x00,0x00,0x01,0x01,0x01,0xff]
 
 0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff
-# W32: v_cmp_le_i16_e64_dpp s10, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
-# W64: v_cmp_le_i16_e64_dpp s[10:11], v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W32-REAL16: v_cmp_le_i16_e64_dpp s10, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W32-FAKE16: v_cmp_le_i16_e64_dpp s10, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W64-REAL16: v_cmp_le_i16_e64_dpp s[10:11], v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W64-FAKE16: v_cmp_le_i16_e64_dpp s[10:11], v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
 
 0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff
-# W32: v_cmp_le_i16_e64_dpp s10, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
-# W64: v_cmp_le_i16_e64_dpp s[10:11], v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W32-REAL16: v_cmp_le_i16_e64_dpp s10, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W32-FAKE16: v_cmp_le_i16_e64_dpp s10, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W64-REAL16: v_cmp_le_i16_e64_dpp s[10:11], v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W64-FAKE16: v_cmp_le_i16_e64_dpp s[10:11], v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
 
 0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff
-# W32: v_cmp_le_i16_e64_dpp s10, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
-# W64: v_cmp_le_i16_e64_dpp s[10:11], v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W32-REAL16: v_cmp_le_i16_e64_dpp s10, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W32-FAKE16: v_cmp_le_i16_e64_dpp s10, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W64-REAL16: v_cmp_le_i16_e64_dpp s[10:11], v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W64-FAKE16: v_cmp_le_i16_e64_dpp s[10:11], v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
 
 0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff
-# W32: v_cmp_le_i16_e64_dpp s10, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
-# W64: v_cmp_le_i16_e64_dpp s[10:11], v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W32-REAL16: v_cmp_le_i16_e64_dpp s10, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W32-FAKE16: v_cmp_le_i16_e64_dpp s10, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W64-REAL16: v_cmp_le_i16_e64_dpp s[10:11], v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W64-FAKE16: v_cmp_le_i16_e64_dpp s[10:11], v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
 
 0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff
-# W32: v_cmp_le_i16_e64_dpp s10, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
-# W64: v_cmp_le_i16_e64_dpp s[10:11], v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W32-REAL16: v_cmp_le_i16_e64_dpp s10, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W32-FAKE16: v_cmp_le_i16_e64_dpp s10, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W64-REAL16: v_cmp_le_i16_e64_dpp s[10:11], v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W64-FAKE16: v_cmp_le_i16_e64_dpp s[10:11], v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
 
 0x68,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff
-# W32: v_cmp_le_i16_e64_dpp s104, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
-# W64: v_cmp_le_i16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W32-REAL16: v_cmp_le_i16_e64_dpp s104, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W32-FAKE16: v_cmp_le_i16_e64_dpp s104, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W64-REAL16: v_cmp_le_i16_e64_dpp s[104:105], v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W64-FAKE16: v_cmp_le_i16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
 
 0x6a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01
-# W32: v_cmp_le_i16_e64_dpp vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
-# W64: v_cmp_le_i16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W32-REAL16: v_cmp_le_i16_e64_dpp vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W32-FAKE16: v_cmp_le_i16_e64_dpp vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W64-REAL16: v_cmp_le_i16_e64_dpp vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W64-FAKE16: v_cmp_le_i16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
 
 0x7a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13
-# W32: v_cmp_le_i16_e64_dpp ttmp14, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
-# W64: v_cmp_le_i16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W32-REAL16: v_cmp_le_i16_e64_dpp ttmp14, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_le_i16_e64_dpp ttmp14, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_le_i16_e64_dpp ttmp[14:15], v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_le_i16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
 
 0x7c,0x00,0x33,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30
-# GFX12: v_cmp_le_i16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x33,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W32-REAL16: v_cmp_le_i16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x33,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_le_i16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x33,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_le_i16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x33,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_le_i16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x33,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+
+0x7a,0x08,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13
+# W32-REAL16: v_cmp_le_i16_e64_dpp ttmp14, v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x08,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_le_i16_e64_dpp ttmp14, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_le_i16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x08,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_le_i16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x33,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+
+0x7c,0x10,0x33,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30
+# W32-REAL16: v_cmp_le_i16_e64_dpp null, v255.l, v255.h op_sel:[0,1] row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x10,0x33,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_le_i16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x33,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_le_i16_e64_dpp null, v255.l, v255.h op_sel:[0,1] row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x10,0x33,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_le_i16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x33,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
 
 0x0a,0x00,0x43,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff
 # W32: v_cmp_le_i32_e64_dpp s10, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x43,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
@@ -1424,63 +1728,106 @@
 # GFX12: v_cmp_le_i32_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x43,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
 
 0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff
-# W32: v_cmp_le_u16_e64_dpp s10, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
-# W64: v_cmp_le_u16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W32-REAL16: v_cmp_le_u16_e64_dpp s10, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W32-FAKE16: v_cmp_le_u16_e64_dpp s10, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W64-REAL16: v_cmp_le_u16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W64-FAKE16: v_cmp_le_u16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
 
 0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff
-# W32: v_cmp_le_u16_e64_dpp s10, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
-# W64: v_cmp_le_u16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W32-REAL16: v_cmp_le_u16_e64_dpp s10, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W32-FAKE16: v_cmp_le_u16_e64_dpp s10, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W64-REAL16: v_cmp_le_u16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W64-FAKE16: v_cmp_le_u16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
 
 0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff
-# W32: v_cmp_le_u16_e64_dpp s10, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
-# W64: v_cmp_le_u16_e64_dpp s[10:11], v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W32-REAL16: v_cmp_le_u16_e64_dpp s10, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W32-FAKE16: v_cmp_le_u16_e64_dpp s10, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W64-REAL16: v_cmp_le_u16_e64_dpp s[10:11], v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W64-FAKE16: v_cmp_le_u16_e64_dpp s[10:11], v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
 
 0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff
-# W32: v_cmp_le_u16_e64_dpp s10, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
-# W64: v_cmp_le_u16_e64_dpp s[10:11], v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W32-REAL16: v_cmp_le_u16_e64_dpp s10, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W32-FAKE16: v_cmp_le_u16_e64_dpp s10, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W64-REAL16: v_cmp_le_u16_e64_dpp s[10:11], v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W64-FAKE16: v_cmp_le_u16_e64_dpp s[10:11], v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
 
 0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff
-# W32: v_cmp_le_u16_e64_dpp s10, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
-# W64: v_cmp_le_u16_e64_dpp s[10:11], v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W32-REAL16: v_cmp_le_u16_e64_dpp s10, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W32-FAKE16: v_cmp_le_u16_e64_dpp s10, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W64-REAL16: v_cmp_le_u16_e64_dpp s[10:11], v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W64-FAKE16: v_cmp_le_u16_e64_dpp s[10:11], v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
 
 0x0a,0x00,0x3b,0xd4,0xfa,0x06,0x00,0x00,0x01,0x01,0x01,0xff
-# W32: v_cmp_le_u16_e64_dpp s10, v1, s3 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x06,0x00,0x00,0x01,0x01,0x01,0xff]
-# W64: v_cmp_le_u16_e64_dpp s[10:11], v1, s3 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x06,0x00,0x00,0x01,0x01,0x01,0xff]
+# W32-REAL16: v_cmp_le_u16_e64_dpp s10, v1.l, s3 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x06,0x00,0x00,0x01,0x01,0x01,0xff]
+# W32-FAKE16: v_cmp_le_u16_e64_dpp s10, v1, s3 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x06,0x00,0x00,0x01,0x01,0x01,0xff]
+# W64-REAL16: v_cmp_le_u16_e64_dpp s[10:11], v1.l, s3 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x06,0x00,0x00,0x01,0x01,0x01,0xff]
+# W64-FAKE16: v_cmp_le_u16_e64_dpp s[10:11], v1, s3 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x06,0x00,0x00,0x01,0x01,0x01,0xff]
 
 0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff
-# W32: v_cmp_le_u16_e64_dpp s10, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
-# W64: v_cmp_le_u16_e64_dpp s[10:11], v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W32-REAL16: v_cmp_le_u16_e64_dpp s10, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W32-FAKE16: v_cmp_le_u16_e64_dpp s10, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W64-REAL16: v_cmp_le_u16_e64_dpp s[10:11], v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W64-FAKE16: v_cmp_le_u16_e64_dpp s[10:11], v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
 
 0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff
-# W32: v_cmp_le_u16_e64_dpp s10, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
-# W64: v_cmp_le_u16_e64_dpp s[10:11], v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W32-REAL16: v_cmp_le_u16_e64_dpp s10, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W32-FAKE16: v_cmp_le_u16_e64_dpp s10, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W64-REAL16: v_cmp_le_u16_e64_dpp s[10:11], v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W64-FAKE16: v_cmp_le_u16_e64_dpp s[10:11], v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
 
 0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff
-# W32: v_cmp_le_u16_e64_dpp s10, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
-# W64: v_cmp_le_u16_e64_dpp s[10:11], v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W32-REAL16: v_cmp_le_u16_e64_dpp s10, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W32-FAKE16: v_cmp_le_u16_e64_dpp s10, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W64-REAL16: v_cmp_le_u16_e64_dpp s[10:11], v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W64-FAKE16: v_cmp_le_u16_e64_dpp s[10:11], v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
 
 0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff
-# W32: v_cmp_le_u16_e64_dpp s10, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
-# W64: v_cmp_le_u16_e64_dpp s[10:11], v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W32-REAL16: v_cmp_le_u16_e64_dpp s10, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W32-FAKE16: v_cmp_le_u16_e64_dpp s10, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W64-REAL16: v_cmp_le_u16_e64_dpp s[10:11], v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W64-FAKE16: v_cmp_le_u16_e64_dpp s[10:11], v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
 
 0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff
-# W32: v_cmp_le_u16_e64_dpp s10, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
-# W64: v_cmp_le_u16_e64_dpp s[10:11], v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W32-REAL16: v_cmp_le_u16_e64_dpp s10, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W32-FAKE16: v_cmp_le_u16_e64_dpp s10, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W64-REAL16: v_cmp_le_u16_e64_dpp s[10:11], v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W64-FAKE16: v_cmp_le_u16_e64_dpp s[10:11], v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
 
 0x68,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff
-# W32: v_cmp_le_u16_e64_dpp s104, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
-# W64: v_cmp_le_u16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W32-REAL16: v_cmp_le_u16_e64_dpp s104, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W32-FAKE16: v_cmp_le_u16_e64_dpp s104, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W64-REAL16: v_cmp_le_u16_e64_dpp s[104:105], v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W64-FAKE16: v_cmp_le_u16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
 
 0x6a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01
-# W32: v_cmp_le_u16_e64_dpp vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
-# W64: v_cmp_le_u16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W32-REAL16: v_cmp_le_u16_e64_dpp vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W32-FAKE16: v_cmp_le_u16_e64_dpp vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W64-REAL16: v_cmp_le_u16_e64_dpp vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W64-FAKE16: v_cmp_le_u16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
 
 0x7a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13
-# W32: v_cmp_le_u16_e64_dpp ttmp14, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
-# W64: v_cmp_le_u16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W32-REAL16: v_cmp_le_u16_e64_dpp ttmp14, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_le_u16_e64_dpp ttmp14, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_le_u16_e64_dpp ttmp[14:15], v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_le_u16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
 
 0x7c,0x00,0x3b,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30
-# GFX12: v_cmp_le_u16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x3b,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W32-REAL16: v_cmp_le_u16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x3b,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_le_u16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x3b,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_le_u16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x3b,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_le_u16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x3b,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+
+0x7a,0x08,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13
+# W32-REAL16: v_cmp_le_u16_e64_dpp ttmp14, v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x08,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_le_u16_e64_dpp ttmp14, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_le_u16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x08,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_le_u16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x3b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+
+0x7c,0x10,0x3b,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30
+# W32-REAL16: v_cmp_le_u16_e64_dpp null, v255.l, v255.h op_sel:[0,1] row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x10,0x3b,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_le_u16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x3b,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_le_u16_e64_dpp null, v255.l, v255.h op_sel:[0,1] row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x10,0x3b,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_le_u16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x3b,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
 
 0x0a,0x00,0x4b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff
 # W32: v_cmp_le_u32_e64_dpp s10, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x4b,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
@@ -1821,63 +2168,106 @@
 # GFX12: v_cmp_lt_f32_e64_dpp null, -|v255|, -|v255| clamp row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x83,0x11,0xd4,0xfa,0xfe,0x03,0x60,0xff,0x6f,0x0d,0x30]
 
 0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff
-# W32: v_cmp_lt_i16_e64_dpp s10, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
-# W64: v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W32-REAL16: v_cmp_lt_i16_e64_dpp s10, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W32-FAKE16: v_cmp_lt_i16_e64_dpp s10, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W64-REAL16: v_cmp_lt_i16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W64-FAKE16: v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
 
 0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff
-# W32: v_cmp_lt_i16_e64_dpp s10, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
-# W64: v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W32-REAL16: v_cmp_lt_i16_e64_dpp s10, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W32-FAKE16: v_cmp_lt_i16_e64_dpp s10, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W64-REAL16: v_cmp_lt_i16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W64-FAKE16: v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
 
 0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff
-# W32: v_cmp_lt_i16_e64_dpp s10, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
-# W64: v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W32-REAL16: v_cmp_lt_i16_e64_dpp s10, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W32-FAKE16: v_cmp_lt_i16_e64_dpp s10, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W64-REAL16: v_cmp_lt_i16_e64_dpp s[10:11], v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W64-FAKE16: v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
 
 0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff
-# W32: v_cmp_lt_i16_e64_dpp s10, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
-# W64: v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W32-REAL16: v_cmp_lt_i16_e64_dpp s10, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W32-FAKE16: v_cmp_lt_i16_e64_dpp s10, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W64-REAL16: v_cmp_lt_i16_e64_dpp s[10:11], v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W64-FAKE16: v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
 
 0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff
-# W32: v_cmp_lt_i16_e64_dpp s10, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
-# W64: v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W32-REAL16: v_cmp_lt_i16_e64_dpp s10, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W32-FAKE16: v_cmp_lt_i16_e64_dpp s10, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W64-REAL16: v_cmp_lt_i16_e64_dpp s[10:11], v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W64-FAKE16: v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
 
 0x0a,0x00,0x31,0xd4,0xfa,0x06,0x00,0x00,0x01,0x01,0x01,0xff
-# W32: v_cmp_lt_i16_e64_dpp s10, v1, s3 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x06,0x00,0x00,0x01,0x01,0x01,0xff]
-# W64: v_cmp_lt_i16_e64_dpp s[10:11], v1, s3 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x06,0x00,0x00,0x01,0x01,0x01,0xff]
+# W32-REAL16: v_cmp_lt_i16_e64_dpp s10, v1.l, s3 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x06,0x00,0x00,0x01,0x01,0x01,0xff]
+# W32-FAKE16: v_cmp_lt_i16_e64_dpp s10, v1, s3 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x06,0x00,0x00,0x01,0x01,0x01,0xff]
+# W64-REAL16: v_cmp_lt_i16_e64_dpp s[10:11], v1.l, s3 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x06,0x00,0x00,0x01,0x01,0x01,0xff]
+# W64-FAKE16: v_cmp_lt_i16_e64_dpp s[10:11], v1, s3 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x06,0x00,0x00,0x01,0x01,0x01,0xff]
 
 0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff
-# W32: v_cmp_lt_i16_e64_dpp s10, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
-# W64: v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W32-REAL16: v_cmp_lt_i16_e64_dpp s10, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W32-FAKE16: v_cmp_lt_i16_e64_dpp s10, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W64-REAL16: v_cmp_lt_i16_e64_dpp s[10:11], v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W64-FAKE16: v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
 
 0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff
-# W32: v_cmp_lt_i16_e64_dpp s10, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
-# W64: v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W32-REAL16: v_cmp_lt_i16_e64_dpp s10, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W32-FAKE16: v_cmp_lt_i16_e64_dpp s10, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W64-REAL16: v_cmp_lt_i16_e64_dpp s[10:11], v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W64-FAKE16: v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
 
 0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff
-# W32: v_cmp_lt_i16_e64_dpp s10, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
-# W64: v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W32-REAL16: v_cmp_lt_i16_e64_dpp s10, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W32-FAKE16: v_cmp_lt_i16_e64_dpp s10, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W64-REAL16: v_cmp_lt_i16_e64_dpp s[10:11], v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W64-FAKE16: v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
 
 0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff
-# W32: v_cmp_lt_i16_e64_dpp s10, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
-# W64: v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W32-REAL16: v_cmp_lt_i16_e64_dpp s10, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W32-FAKE16: v_cmp_lt_i16_e64_dpp s10, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W64-REAL16: v_cmp_lt_i16_e64_dpp s[10:11], v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W64-FAKE16: v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
 
 0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff
-# W32: v_cmp_lt_i16_e64_dpp s10, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
-# W64: v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W32-REAL16: v_cmp_lt_i16_e64_dpp s10, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W32-FAKE16: v_cmp_lt_i16_e64_dpp s10, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W64-REAL16: v_cmp_lt_i16_e64_dpp s[10:11], v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W64-FAKE16: v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
 
 0x68,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff
-# W32: v_cmp_lt_i16_e64_dpp s104, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
-# W64: v_cmp_lt_i16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W32-REAL16: v_cmp_lt_i16_e64_dpp s104, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W32-FAKE16: v_cmp_lt_i16_e64_dpp s104, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W64-REAL16: v_cmp_lt_i16_e64_dpp s[104:105], v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W64-FAKE16: v_cmp_lt_i16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
 
 0x6a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01
-# W32: v_cmp_lt_i16_e64_dpp vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
-# W64: v_cmp_lt_i16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W32-REAL16: v_cmp_lt_i16_e64_dpp vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W32-FAKE16: v_cmp_lt_i16_e64_dpp vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W64-REAL16: v_cmp_lt_i16_e64_dpp vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W64-FAKE16: v_cmp_lt_i16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
 
 0x7a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13
-# W32: v_cmp_lt_i16_e64_dpp ttmp14, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
-# W64: v_cmp_lt_i16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W32-REAL16: v_cmp_lt_i16_e64_dpp ttmp14, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_lt_i16_e64_dpp ttmp14, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_lt_i16_e64_dpp ttmp[14:15], v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_lt_i16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
 
 0x7c,0x00,0x31,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30
-# GFX12: v_cmp_lt_i16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x31,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W32-REAL16: v_cmp_lt_i16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x31,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_lt_i16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x31,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_lt_i16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x31,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_lt_i16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x31,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+
+0x7a,0x08,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13
+# W32-REAL16: v_cmp_lt_i16_e64_dpp ttmp14, v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x08,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_lt_i16_e64_dpp ttmp14, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_lt_i16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x08,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_lt_i16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x31,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+
+0x7c,0x10,0x31,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30
+# W32-REAL16: v_cmp_lt_i16_e64_dpp null, v255.l, v255.h op_sel:[0,1] row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x10,0x31,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_lt_i16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x31,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_lt_i16_e64_dpp null, v255.l, v255.h op_sel:[0,1] row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x10,0x31,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_lt_i16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x31,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
 
 0x0a,0x00,0x41,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff
 # W32: v_cmp_lt_i32_e64_dpp s10, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x41,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
@@ -1939,63 +2329,106 @@
 # GFX12: v_cmp_lt_i32_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x41,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
 
 0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff
-# W32: v_cmp_lt_u16_e64_dpp s10, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
-# W64: v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W32-REAL16: v_cmp_lt_u16_e64_dpp s10, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W32-FAKE16: v_cmp_lt_u16_e64_dpp s10, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W64-REAL16: v_cmp_lt_u16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W64-FAKE16: v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
 
 0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff
-# W32: v_cmp_lt_u16_e64_dpp s10, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
-# W64: v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W32-REAL16: v_cmp_lt_u16_e64_dpp s10, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W32-FAKE16: v_cmp_lt_u16_e64_dpp s10, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W64-REAL16: v_cmp_lt_u16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W64-FAKE16: v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
 
 0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff
-# W32: v_cmp_lt_u16_e64_dpp s10, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
-# W64: v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W32-REAL16: v_cmp_lt_u16_e64_dpp s10, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W32-FAKE16: v_cmp_lt_u16_e64_dpp s10, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W64-REAL16: v_cmp_lt_u16_e64_dpp s[10:11], v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W64-FAKE16: v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
 
 0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff
-# W32: v_cmp_lt_u16_e64_dpp s10, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
-# W64: v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W32-REAL16: v_cmp_lt_u16_e64_dpp s10, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W32-FAKE16: v_cmp_lt_u16_e64_dpp s10, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W64-REAL16: v_cmp_lt_u16_e64_dpp s[10:11], v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W64-FAKE16: v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
 
 0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff
-# W32: v_cmp_lt_u16_e64_dpp s10, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
-# W64: v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W32-REAL16: v_cmp_lt_u16_e64_dpp s10, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W32-FAKE16: v_cmp_lt_u16_e64_dpp s10, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W64-REAL16: v_cmp_lt_u16_e64_dpp s[10:11], v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W64-FAKE16: v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
 
 0x0a,0x00,0x39,0xd4,0xfa,0x06,0x00,0x00,0x01,0x01,0x01,0xff
-# W32: v_cmp_lt_u16_e64_dpp s10, v1, s3 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x06,0x00,0x00,0x01,0x01,0x01,0xff]
-# W64: v_cmp_lt_u16_e64_dpp s[10:11], v1, s3 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x06,0x00,0x00,0x01,0x01,0x01,0xff]
+# W32-REAL16: v_cmp_lt_u16_e64_dpp s10, v1.l, s3 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x06,0x00,0x00,0x01,0x01,0x01,0xff]
+# W32-FAKE16: v_cmp_lt_u16_e64_dpp s10, v1, s3 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x06,0x00,0x00,0x01,0x01,0x01,0xff]
+# W64-REAL16: v_cmp_lt_u16_e64_dpp s[10:11], v1.l, s3 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x06,0x00,0x00,0x01,0x01,0x01,0xff]
+# W64-FAKE16: v_cmp_lt_u16_e64_dpp s[10:11], v1, s3 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x06,0x00,0x00,0x01,0x01,0x01,0xff]
 
 0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff
-# W32: v_cmp_lt_u16_e64_dpp s10, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
-# W64: v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W32-REAL16: v_cmp_lt_u16_e64_dpp s10, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W32-FAKE16: v_cmp_lt_u16_e64_dpp s10, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W64-REAL16: v_cmp_lt_u16_e64_dpp s[10:11], v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W64-FAKE16: v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
 
 0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff
-# W32: v_cmp_lt_u16_e64_dpp s10, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
-# W64: v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W32-REAL16: v_cmp_lt_u16_e64_dpp s10, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W32-FAKE16: v_cmp_lt_u16_e64_dpp s10, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W64-REAL16: v_cmp_lt_u16_e64_dpp s[10:11], v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W64-FAKE16: v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
 
 0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff
-# W32: v_cmp_lt_u16_e64_dpp s10, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
-# W64: v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W32-REAL16: v_cmp_lt_u16_e64_dpp s10, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W32-FAKE16: v_cmp_lt_u16_e64_dpp s10, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W64-REAL16: v_cmp_lt_u16_e64_dpp s[10:11], v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W64-FAKE16: v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
 
 0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff
-# W32: v_cmp_lt_u16_e64_dpp s10, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
-# W64: v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W32-REAL16: v_cmp_lt_u16_e64_dpp s10, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W32-FAKE16: v_cmp_lt_u16_e64_dpp s10, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W64-REAL16: v_cmp_lt_u16_e64_dpp s[10:11], v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W64-FAKE16: v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
 
 0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff
-# W32: v_cmp_lt_u16_e64_dpp s10, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
-# W64: v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W32-REAL16: v_cmp_lt_u16_e64_dpp s10, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W32-FAKE16: v_cmp_lt_u16_e64_dpp s10, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W64-REAL16: v_cmp_lt_u16_e64_dpp s[10:11], v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W64-FAKE16: v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
 
 0x68,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff
-# W32: v_cmp_lt_u16_e64_dpp s104, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
-# W64: v_cmp_lt_u16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W32-REAL16: v_cmp_lt_u16_e64_dpp s104, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W32-FAKE16: v_cmp_lt_u16_e64_dpp s104, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W64-REAL16: v_cmp_lt_u16_e64_dpp s[104:105], v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W64-FAKE16: v_cmp_lt_u16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
 
 0x6a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01
-# W32: v_cmp_lt_u16_e64_dpp vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
-# W64: v_cmp_lt_u16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W32-REAL16: v_cmp_lt_u16_e64_dpp vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W32-FAKE16: v_cmp_lt_u16_e64_dpp vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W64-REAL16: v_cmp_lt_u16_e64_dpp vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W64-FAKE16: v_cmp_lt_u16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
 
 0x7a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13
-# W32: v_cmp_lt_u16_e64_dpp ttmp14, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
-# W64: v_cmp_lt_u16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W32-REAL16: v_cmp_lt_u16_e64_dpp ttmp14, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_lt_u16_e64_dpp ttmp14, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_lt_u16_e64_dpp ttmp[14:15], v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_lt_u16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
 
 0x7c,0x00,0x39,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30
-# GFX12: v_cmp_lt_u16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x39,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W32-REAL16: v_cmp_lt_u16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x39,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_lt_u16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x39,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_lt_u16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x39,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_lt_u16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x39,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+
+0x7a,0x08,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13
+# W32-REAL16: v_cmp_lt_u16_e64_dpp ttmp14, v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x08,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_lt_u16_e64_dpp ttmp14, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_lt_u16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x08,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_lt_u16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x39,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+
+0x7c,0x10,0x39,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30
+# W32-REAL16: v_cmp_lt_u16_e64_dpp null, v255.l, v255.h op_sel:[0,1] row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x10,0x39,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_lt_u16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x39,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_lt_u16_e64_dpp null, v255.l, v255.h op_sel:[0,1] row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x10,0x39,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_lt_u16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x39,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
 
 0x0a,0x00,0x49,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff
 # W32: v_cmp_lt_u32_e64_dpp s10, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x49,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
@@ -2057,63 +2490,106 @@
 # GFX12: v_cmp_lt_u32_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x49,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
 
 0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff
-# W32: v_cmp_ne_i16_e64_dpp s10, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
-# W64: v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W32-REAL16: v_cmp_ne_i16_e64_dpp s10, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W32-FAKE16: v_cmp_ne_i16_e64_dpp s10, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W64-REAL16: v_cmp_ne_i16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W64-FAKE16: v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
 
 0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff
-# W32: v_cmp_ne_i16_e64_dpp s10, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
-# W64: v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W32-REAL16: v_cmp_ne_i16_e64_dpp s10, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W32-FAKE16: v_cmp_ne_i16_e64_dpp s10, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W64-REAL16: v_cmp_ne_i16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W64-FAKE16: v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
 
 0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff
-# W32: v_cmp_ne_i16_e64_dpp s10, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
-# W64: v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W32-REAL16: v_cmp_ne_i16_e64_dpp s10, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W32-FAKE16: v_cmp_ne_i16_e64_dpp s10, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W64-REAL16: v_cmp_ne_i16_e64_dpp s[10:11], v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W64-FAKE16: v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
 
 0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff
-# W32: v_cmp_ne_i16_e64_dpp s10, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
-# W64: v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W32-REAL16: v_cmp_ne_i16_e64_dpp s10, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W32-FAKE16: v_cmp_ne_i16_e64_dpp s10, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W64-REAL16: v_cmp_ne_i16_e64_dpp s[10:11], v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W64-FAKE16: v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
 
 0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff
-# W32: v_cmp_ne_i16_e64_dpp s10, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
-# W64: v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W32-REAL16: v_cmp_ne_i16_e64_dpp s10, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W32-FAKE16: v_cmp_ne_i16_e64_dpp s10, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W64-REAL16: v_cmp_ne_i16_e64_dpp s[10:11], v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W64-FAKE16: v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
 
 0x0a,0x00,0x35,0xd4,0xfa,0x06,0x00,0x00,0x01,0x01,0x01,0xff
-# W32: v_cmp_ne_i16_e64_dpp s10, v1, s3 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x06,0x00,0x00,0x01,0x01,0x01,0xff]
-# W64: v_cmp_ne_i16_e64_dpp s[10:11], v1, s3 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x06,0x00,0x00,0x01,0x01,0x01,0xff]
+# W32-REAL16: v_cmp_ne_i16_e64_dpp s10, v1.l, s3 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x06,0x00,0x00,0x01,0x01,0x01,0xff]
+# W32-FAKE16: v_cmp_ne_i16_e64_dpp s10, v1, s3 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x06,0x00,0x00,0x01,0x01,0x01,0xff]
+# W64-REAL16: v_cmp_ne_i16_e64_dpp s[10:11], v1.l, s3 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x06,0x00,0x00,0x01,0x01,0x01,0xff]
+# W64-FAKE16: v_cmp_ne_i16_e64_dpp s[10:11], v1, s3 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x06,0x00,0x00,0x01,0x01,0x01,0xff]
 
 0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff
-# W32: v_cmp_ne_i16_e64_dpp s10, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
-# W64: v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W32-REAL16: v_cmp_ne_i16_e64_dpp s10, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W32-FAKE16: v_cmp_ne_i16_e64_dpp s10, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W64-REAL16: v_cmp_ne_i16_e64_dpp s[10:11], v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W64-FAKE16: v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
 
 0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff
-# W32: v_cmp_ne_i16_e64_dpp s10, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
-# W64: v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W32-REAL16: v_cmp_ne_i16_e64_dpp s10, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W32-FAKE16: v_cmp_ne_i16_e64_dpp s10, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W64-REAL16: v_cmp_ne_i16_e64_dpp s[10:11], v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W64-FAKE16: v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
 
 0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff
-# W32: v_cmp_ne_i16_e64_dpp s10, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
-# W64: v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W32-REAL16: v_cmp_ne_i16_e64_dpp s10, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W32-FAKE16: v_cmp_ne_i16_e64_dpp s10, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W64-REAL16: v_cmp_ne_i16_e64_dpp s[10:11], v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W64-FAKE16: v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
 
 0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff
-# W32: v_cmp_ne_i16_e64_dpp s10, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
-# W64: v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W32-REAL16: v_cmp_ne_i16_e64_dpp s10, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W32-FAKE16: v_cmp_ne_i16_e64_dpp s10, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W64-REAL16: v_cmp_ne_i16_e64_dpp s[10:11], v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W64-FAKE16: v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
 
 0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff
-# W32: v_cmp_ne_i16_e64_dpp s10, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
-# W64: v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W32-REAL16: v_cmp_ne_i16_e64_dpp s10, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W32-FAKE16: v_cmp_ne_i16_e64_dpp s10, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W64-REAL16: v_cmp_ne_i16_e64_dpp s[10:11], v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W64-FAKE16: v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
 
 0x68,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff
-# W32: v_cmp_ne_i16_e64_dpp s104, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
-# W64: v_cmp_ne_i16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W32-REAL16: v_cmp_ne_i16_e64_dpp s104, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W32-FAKE16: v_cmp_ne_i16_e64_dpp s104, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W64-REAL16: v_cmp_ne_i16_e64_dpp s[104:105], v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W64-FAKE16: v_cmp_ne_i16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
 
 0x6a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01
-# W32: v_cmp_ne_i16_e64_dpp vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
-# W64: v_cmp_ne_i16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W32-REAL16: v_cmp_ne_i16_e64_dpp vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W32-FAKE16: v_cmp_ne_i16_e64_dpp vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W64-REAL16: v_cmp_ne_i16_e64_dpp vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W64-FAKE16: v_cmp_ne_i16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
 
 0x7a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13
-# W32: v_cmp_ne_i16_e64_dpp ttmp14, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
-# W64: v_cmp_ne_i16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W32-REAL16: v_cmp_ne_i16_e64_dpp ttmp14, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_ne_i16_e64_dpp ttmp14, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_ne_i16_e64_dpp ttmp[14:15], v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_ne_i16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
 
 0x7c,0x00,0x35,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30
-# GFX12: v_cmp_ne_i16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x35,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W32-REAL16: v_cmp_ne_i16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x35,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_ne_i16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x35,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_ne_i16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x35,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_ne_i16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x35,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+
+0x7a,0x08,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13
+# W32-REAL16: v_cmp_ne_i16_e64_dpp ttmp14, v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x08,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_ne_i16_e64_dpp ttmp14, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_ne_i16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x08,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_ne_i16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x35,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+
+0x7c,0x10,0x35,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30
+# W32-REAL16: v_cmp_ne_i16_e64_dpp null, v255.l, v255.h op_sel:[0,1] row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x10,0x35,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_ne_i16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x35,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_ne_i16_e64_dpp null, v255.l, v255.h op_sel:[0,1] row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x10,0x35,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_ne_i16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x35,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
 
 0x0a,0x00,0x45,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff
 # W32: v_cmp_ne_i32_e64_dpp s10, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x45,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
@@ -2175,63 +2651,106 @@
 # GFX12: v_cmp_ne_i32_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x45,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
 
 0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff
-# W32: v_cmp_ne_u16_e64_dpp s10, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
-# W64: v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W32-REAL16: v_cmp_ne_u16_e64_dpp s10, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W32-FAKE16: v_cmp_ne_u16_e64_dpp s10, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W64-REAL16: v_cmp_ne_u16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+# W64-FAKE16: v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
 
 0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff
-# W32: v_cmp_ne_u16_e64_dpp s10, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
-# W64: v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W32-REAL16: v_cmp_ne_u16_e64_dpp s10, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W32-FAKE16: v_cmp_ne_u16_e64_dpp s10, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W64-REAL16: v_cmp_ne_u16_e64_dpp s[10:11], v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+# W64-FAKE16: v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
 
 0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff
-# W32: v_cmp_ne_u16_e64_dpp s10, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
-# W64: v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W32-REAL16: v_cmp_ne_u16_e64_dpp s10, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W32-FAKE16: v_cmp_ne_u16_e64_dpp s10, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W64-REAL16: v_cmp_ne_u16_e64_dpp s[10:11], v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+# W64-FAKE16: v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
 
 0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff
-# W32: v_cmp_ne_u16_e64_dpp s10, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
-# W64: v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W32-REAL16: v_cmp_ne_u16_e64_dpp s10, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W32-FAKE16: v_cmp_ne_u16_e64_dpp s10, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W64-REAL16: v_cmp_ne_u16_e64_dpp s[10:11], v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+# W64-FAKE16: v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
 
 0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff
-# W32: v_cmp_ne_u16_e64_dpp s10, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
-# W64: v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W32-REAL16: v_cmp_ne_u16_e64_dpp s10, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W32-FAKE16: v_cmp_ne_u16_e64_dpp s10, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W64-REAL16: v_cmp_ne_u16_e64_dpp s[10:11], v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+# W64-FAKE16: v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
 
 0x0a,0x00,0x3d,0xd4,0xfa,0x06,0x00,0x00,0x01,0x01,0x01,0xff
-# W32: v_cmp_ne_u16_e64_dpp s10, v1, s3 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x06,0x00,0x00,0x01,0x01,0x01,0xff]
-# W64: v_cmp_ne_u16_e64_dpp s[10:11], v1, s3 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x06,0x00,0x00,0x01,0x01,0x01,0xff]
+# W32-REAL16: v_cmp_ne_u16_e64_dpp s10, v1.l, s3 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x06,0x00,0x00,0x01,0x01,0x01,0xff]
+# W32-FAKE16: v_cmp_ne_u16_e64_dpp s10, v1, s3 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x06,0x00,0x00,0x01,0x01,0x01,0xff]
+# W64-REAL16: v_cmp_ne_u16_e64_dpp s[10:11], v1.l, s3 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x06,0x00,0x00,0x01,0x01,0x01,0xff]
+# W64-FAKE16: v_cmp_ne_u16_e64_dpp s[10:11], v1, s3 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x06,0x00,0x00,0x01,0x01,0x01,0xff]
 
 0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff
-# W32: v_cmp_ne_u16_e64_dpp s10, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
-# W64: v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W32-REAL16: v_cmp_ne_u16_e64_dpp s10, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W32-FAKE16: v_cmp_ne_u16_e64_dpp s10, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W64-REAL16: v_cmp_ne_u16_e64_dpp s[10:11], v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+# W64-FAKE16: v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
 
 0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff
-# W32: v_cmp_ne_u16_e64_dpp s10, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
-# W64: v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W32-REAL16: v_cmp_ne_u16_e64_dpp s10, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W32-FAKE16: v_cmp_ne_u16_e64_dpp s10, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W64-REAL16: v_cmp_ne_u16_e64_dpp s[10:11], v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+# W64-FAKE16: v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
 
 0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff
-# W32: v_cmp_ne_u16_e64_dpp s10, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
-# W64: v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W32-REAL16: v_cmp_ne_u16_e64_dpp s10, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W32-FAKE16: v_cmp_ne_u16_e64_dpp s10, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W64-REAL16: v_cmp_ne_u16_e64_dpp s[10:11], v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+# W64-FAKE16: v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
 
 0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff
-# W32: v_cmp_ne_u16_e64_dpp s10, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
-# W64: v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W32-REAL16: v_cmp_ne_u16_e64_dpp s10, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W32-FAKE16: v_cmp_ne_u16_e64_dpp s10, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W64-REAL16: v_cmp_ne_u16_e64_dpp s[10:11], v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+# W64-FAKE16: v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
 
 0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff
-# W32: v_cmp_ne_u16_e64_dpp s10, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
-# W64: v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W32-REAL16: v_cmp_ne_u16_e64_dpp s10, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W32-FAKE16: v_cmp_ne_u16_e64_dpp s10, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W64-REAL16: v_cmp_ne_u16_e64_dpp s[10:11], v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+# W64-FAKE16: v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
 
 0x68,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff
-# W32: v_cmp_ne_u16_e64_dpp s104, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
-# W64: v_cmp_ne_u16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W32-REAL16: v_cmp_ne_u16_e64_dpp s104, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W32-FAKE16: v_cmp_ne_u16_e64_dpp s104, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W64-REAL16: v_cmp_ne_u16_e64_dpp s[104:105], v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
+# W64-FAKE16: v_cmp_ne_u16_e64_dpp s[104:105], v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x68,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x50,0x01,0xff]
 
 0x6a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01
-# W32: v_cmp_ne_u16_e64_dpp vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
-# W64: v_cmp_ne_u16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W32-REAL16: v_cmp_ne_u16_e64_dpp vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W32-FAKE16: v_cmp_ne_u16_e64_dpp vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W64-REAL16: v_cmp_ne_u16_e64_dpp vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
+# W64-FAKE16: v_cmp_ne_u16_e64_dpp vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x6a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x5f,0x01,0x01]
 
 0x7a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13
-# W32: v_cmp_ne_u16_e64_dpp ttmp14, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
-# W64: v_cmp_ne_u16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W32-REAL16: v_cmp_ne_u16_e64_dpp ttmp14, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_ne_u16_e64_dpp ttmp14, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_ne_u16_e64_dpp ttmp[14:15], v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_ne_u16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
 
 0x7c,0x00,0x3d,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30
-# GFX12: v_cmp_ne_u16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x3d,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W32-REAL16: v_cmp_ne_u16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x3d,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_ne_u16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x3d,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_ne_u16_e64_dpp null, v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x3d,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_ne_u16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x3d,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+
+0x7a,0x08,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13
+# W32-REAL16: v_cmp_ne_u16_e64_dpp ttmp14, v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x08,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_ne_u16_e64_dpp ttmp14, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_ne_u16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x08,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_ne_u16_e64_dpp ttmp[14:15], v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0x7a,0x00,0x3d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x60,0x01,0x13]
+
+0x7c,0x10,0x3d,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30
+# W32-REAL16: v_cmp_ne_u16_e64_dpp null, v255.l, v255.h op_sel:[0,1] row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x10,0x3d,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_ne_u16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x3d,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_ne_u16_e64_dpp null, v255.l, v255.h op_sel:[0,1] row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x10,0x3d,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_ne_u16_e64_dpp null, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0x7c,0x00,0x3d,0xd4,0xfa,0xfe,0x03,0x00,0xff,0x6f,0x0d,0x30]
 
 0x0a,0x00,0x4d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff
 # W32: v_cmp_ne_u32_e64_dpp s10, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x0a,0x00,0x4d,0xd4,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3c_dpp8.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3c_dpp8.txt
index 3fc6cbf4e3cd4d..bc380f2f312cb2 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3c_dpp8.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3c_dpp8.txt
@@ -101,27 +101,52 @@
 # GFX12: v_cmp_eq_f32_e64_dpp null, -|v255|, -|v255| clamp dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x83,0x12,0xd4,0xea,0xfe,0x03,0x60,0xff,0x00,0x00,0x00]
 
 0x0a,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_eq_i16_e64_dpp s10, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_eq_i16_e64_dpp s10, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_eq_i16_e64_dpp s10, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_eq_i16_e64_dpp s[10:11], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_eq_i16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x0a,0x00,0x32,0xd4,0xe9,0x06,0x00,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_eq_i16_e64_dpp s10, v1, s3 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x32,0xd4,0xe9,0x06,0x00,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_eq_i16_e64_dpp s[10:11], v1, s3 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x32,0xd4,0xe9,0x06,0x00,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_eq_i16_e64_dpp s10, v1.l, s3 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x32,0xd4,0xe9,0x06,0x00,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_eq_i16_e64_dpp s10, v1, s3 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x32,0xd4,0xe9,0x06,0x00,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_eq_i16_e64_dpp s[10:11], v1.l, s3 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x32,0xd4,0xe9,0x06,0x00,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_eq_i16_e64_dpp s[10:11], v1, s3 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x32,0xd4,0xe9,0x06,0x00,0x00,0x01,0x77,0x39,0x05]
 
 0x68,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_eq_i16_e64_dpp s104, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_eq_i16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_eq_i16_e64_dpp s104, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_eq_i16_e64_dpp s104, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_eq_i16_e64_dpp s[104:105], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_eq_i16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x6a,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_eq_i16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_eq_i16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_eq_i16_e64_dpp vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_eq_i16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_eq_i16_e64_dpp vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_eq_i16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x7a,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_eq_i16_e64_dpp ttmp14, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_eq_i16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_eq_i16_e64_dpp ttmp14, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_eq_i16_e64_dpp ttmp14, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_eq_i16_e64_dpp ttmp[14:15], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_eq_i16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x7c,0x00,0x32,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00
-# GFX12: v_cmp_eq_i16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x32,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W32-REAL16: v_cmp_eq_i16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x32,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_eq_i16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x32,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_eq_i16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x32,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_eq_i16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x32,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+
+0x7a,0x08,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
+# W32-REAL16: v_cmp_eq_i16_e64_dpp ttmp14, v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x08,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_eq_i16_e64_dpp ttmp14, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_eq_i16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x08,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_eq_i16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x32,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+
+0x7c,0x10,0x32,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00
+# W32-REAL16: v_cmp_eq_i16_e64_dpp null, v255.l, v255.h op_sel:[0,1] dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x10,0x32,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_eq_i16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x32,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_eq_i16_e64_dpp null, v255.l, v255.h op_sel:[0,1] dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x10,0x32,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_eq_i16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x32,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
 
 0x0a,0x00,0x42,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
 # W32: v_cmp_eq_i32_e64_dpp s10, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x42,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
@@ -147,27 +172,52 @@
 # GFX12: v_cmp_eq_i32_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x42,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
 
 0x0a,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_eq_u16_e64_dpp s10, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_eq_u16_e64_dpp s10, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_eq_u16_e64_dpp s10, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_eq_u16_e64_dpp s[10:11], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_eq_u16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x0a,0x00,0x3a,0xd4,0xe9,0x06,0x00,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_eq_u16_e64_dpp s10, v1, s3 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3a,0xd4,0xe9,0x06,0x00,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_eq_u16_e64_dpp s[10:11], v1, s3 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3a,0xd4,0xe9,0x06,0x00,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_eq_u16_e64_dpp s10, v1.l, s3 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3a,0xd4,0xe9,0x06,0x00,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_eq_u16_e64_dpp s10, v1, s3 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3a,0xd4,0xe9,0x06,0x00,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_eq_u16_e64_dpp s[10:11], v1.l, s3 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3a,0xd4,0xe9,0x06,0x00,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_eq_u16_e64_dpp s[10:11], v1, s3 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3a,0xd4,0xe9,0x06,0x00,0x00,0x01,0x77,0x39,0x05]
 
 0x68,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_eq_u16_e64_dpp s104, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_eq_u16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_eq_u16_e64_dpp s104, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_eq_u16_e64_dpp s104, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_eq_u16_e64_dpp s[104:105], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_eq_u16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x6a,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_eq_u16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_eq_u16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_eq_u16_e64_dpp vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_eq_u16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_eq_u16_e64_dpp vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_eq_u16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x7a,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_eq_u16_e64_dpp ttmp14, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_eq_u16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_eq_u16_e64_dpp ttmp14, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_eq_u16_e64_dpp ttmp14, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_eq_u16_e64_dpp ttmp[14:15], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_eq_u16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x7c,0x00,0x3a,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00
-# GFX12: v_cmp_eq_u16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x3a,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W32-REAL16: v_cmp_eq_u16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x3a,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_eq_u16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x3a,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_eq_u16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x3a,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_eq_u16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x3a,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+
+0x7a,0x08,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
+# W32-REAL16: v_cmp_eq_u16_e64_dpp ttmp14, v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x08,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_eq_u16_e64_dpp ttmp14, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_eq_u16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x08,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_eq_u16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x3a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+
+0x7c,0x10,0x3a,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00
+# W32-REAL16: v_cmp_eq_u16_e64_dpp null, v255.l, v255.h op_sel:[0,1] dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x10,0x3a,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_eq_u16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x3a,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_eq_u16_e64_dpp null, v255.l, v255.h op_sel:[0,1] dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x10,0x3a,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_eq_u16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x3a,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
 
 0x0a,0x00,0x4a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
 # W32: v_cmp_eq_u32_e64_dpp s10, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x4a,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
@@ -243,27 +293,52 @@
 # GFX12: v_cmp_ge_f32_e64_dpp null, -|v255|, -|v255| clamp dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x83,0x16,0xd4,0xea,0xfe,0x03,0x60,0xff,0x00,0x00,0x00]
 
 0x0a,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_ge_i16_e64_dpp s10, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_ge_i16_e64_dpp s10, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_ge_i16_e64_dpp s10, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_ge_i16_e64_dpp s[10:11], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_ge_i16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x0a,0x00,0x36,0xd4,0xe9,0x06,0x00,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_ge_i16_e64_dpp s10, v1, s3 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x36,0xd4,0xe9,0x06,0x00,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_ge_i16_e64_dpp s[10:11], v1, s3 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x36,0xd4,0xe9,0x06,0x00,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_ge_i16_e64_dpp s10, v1.l, s3 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x36,0xd4,0xe9,0x06,0x00,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_ge_i16_e64_dpp s10, v1, s3 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x36,0xd4,0xe9,0x06,0x00,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_ge_i16_e64_dpp s[10:11], v1.l, s3 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x36,0xd4,0xe9,0x06,0x00,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_ge_i16_e64_dpp s[10:11], v1, s3 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x36,0xd4,0xe9,0x06,0x00,0x00,0x01,0x77,0x39,0x05]
 
 0x68,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_ge_i16_e64_dpp s104, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_ge_i16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_ge_i16_e64_dpp s104, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_ge_i16_e64_dpp s104, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_ge_i16_e64_dpp s[104:105], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_ge_i16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x6a,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_ge_i16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_ge_i16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_ge_i16_e64_dpp vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_ge_i16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_ge_i16_e64_dpp vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_ge_i16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x7a,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_ge_i16_e64_dpp ttmp14, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_ge_i16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_ge_i16_e64_dpp ttmp14, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_ge_i16_e64_dpp ttmp14, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_ge_i16_e64_dpp ttmp[14:15], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_ge_i16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x7c,0x00,0x36,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00
-# GFX12: v_cmp_ge_i16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x36,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W32-REAL16: v_cmp_ge_i16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x36,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_ge_i16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x36,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_ge_i16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x36,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_ge_i16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x36,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+
+0x7a,0x08,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
+# W32-REAL16: v_cmp_ge_i16_e64_dpp ttmp14, v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x08,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_ge_i16_e64_dpp ttmp14, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_ge_i16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x08,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_ge_i16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x36,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+
+0x7c,0x10,0x36,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00
+# W32-REAL16: v_cmp_ge_i16_e64_dpp null, v255.l, v255.h op_sel:[0,1] dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x10,0x36,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_ge_i16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x36,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_ge_i16_e64_dpp null, v255.l, v255.h op_sel:[0,1] dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x10,0x36,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_ge_i16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x36,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
 
 0x0a,0x00,0x46,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
 # W32: v_cmp_ge_i32_e64_dpp s10, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x46,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
@@ -289,27 +364,52 @@
 # GFX12: v_cmp_ge_i32_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x46,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
 
 0x0a,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_ge_u16_e64_dpp s10, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_ge_u16_e64_dpp s10, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_ge_u16_e64_dpp s10, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_ge_u16_e64_dpp s[10:11], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_ge_u16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x0a,0x00,0x3e,0xd4,0xe9,0x06,0x00,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_ge_u16_e64_dpp s10, v1, s3 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3e,0xd4,0xe9,0x06,0x00,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_ge_u16_e64_dpp s[10:11], v1, s3 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3e,0xd4,0xe9,0x06,0x00,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_ge_u16_e64_dpp s10, v1.l, s3 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3e,0xd4,0xe9,0x06,0x00,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_ge_u16_e64_dpp s10, v1, s3 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3e,0xd4,0xe9,0x06,0x00,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_ge_u16_e64_dpp s[10:11], v1.l, s3 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3e,0xd4,0xe9,0x06,0x00,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_ge_u16_e64_dpp s[10:11], v1, s3 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3e,0xd4,0xe9,0x06,0x00,0x00,0x01,0x77,0x39,0x05]
 
 0x68,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_ge_u16_e64_dpp s104, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_ge_u16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_ge_u16_e64_dpp s104, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_ge_u16_e64_dpp s104, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_ge_u16_e64_dpp s[104:105], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_ge_u16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x6a,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_ge_u16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_ge_u16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_ge_u16_e64_dpp vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_ge_u16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_ge_u16_e64_dpp vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_ge_u16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x7a,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_ge_u16_e64_dpp ttmp14, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_ge_u16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_ge_u16_e64_dpp ttmp14, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_ge_u16_e64_dpp ttmp14, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_ge_u16_e64_dpp ttmp[14:15], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_ge_u16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x7c,0x00,0x3e,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00
-# GFX12: v_cmp_ge_u16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x3e,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W32-REAL16: v_cmp_ge_u16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x3e,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_ge_u16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x3e,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_ge_u16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x3e,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_ge_u16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x3e,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+
+0x7a,0x08,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
+# W32-REAL16: v_cmp_ge_u16_e64_dpp ttmp14, v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x08,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_ge_u16_e64_dpp ttmp14, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_ge_u16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x08,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_ge_u16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x3e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+
+0x7c,0x10,0x3e,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00
+# W32-REAL16: v_cmp_ge_u16_e64_dpp null, v255.l, v255.h op_sel:[0,1] dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x10,0x3e,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_ge_u16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x3e,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_ge_u16_e64_dpp null, v255.l, v255.h op_sel:[0,1] dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x10,0x3e,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_ge_u16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x3e,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
 
 0x0a,0x00,0x4e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
 # W32: v_cmp_ge_u32_e64_dpp s10, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x4e,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
@@ -385,27 +485,52 @@
 # GFX12: v_cmp_gt_f32_e64_dpp null, -|v255|, -|v255| clamp dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x83,0x14,0xd4,0xea,0xfe,0x03,0x60,0xff,0x00,0x00,0x00]
 
 0x0a,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_gt_i16_e64_dpp s10, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_gt_i16_e64_dpp s10, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_gt_i16_e64_dpp s10, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_gt_i16_e64_dpp s[10:11], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_gt_i16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x0a,0x00,0x34,0xd4,0xe9,0x06,0x00,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_gt_i16_e64_dpp s10, v1, s3 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x34,0xd4,0xe9,0x06,0x00,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_gt_i16_e64_dpp s[10:11], v1, s3 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x34,0xd4,0xe9,0x06,0x00,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_gt_i16_e64_dpp s10, v1.l, s3 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x34,0xd4,0xe9,0x06,0x00,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_gt_i16_e64_dpp s10, v1, s3 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x34,0xd4,0xe9,0x06,0x00,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_gt_i16_e64_dpp s[10:11], v1.l, s3 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x34,0xd4,0xe9,0x06,0x00,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_gt_i16_e64_dpp s[10:11], v1, s3 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x34,0xd4,0xe9,0x06,0x00,0x00,0x01,0x77,0x39,0x05]
 
 0x68,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_gt_i16_e64_dpp s104, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_gt_i16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_gt_i16_e64_dpp s104, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_gt_i16_e64_dpp s104, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_gt_i16_e64_dpp s[104:105], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_gt_i16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x6a,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_gt_i16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_gt_i16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_gt_i16_e64_dpp vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_gt_i16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_gt_i16_e64_dpp vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_gt_i16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x7a,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_gt_i16_e64_dpp ttmp14, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_gt_i16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_gt_i16_e64_dpp ttmp14, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_gt_i16_e64_dpp ttmp14, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_gt_i16_e64_dpp ttmp[14:15], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_gt_i16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x7c,0x00,0x34,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00
-# GFX12: v_cmp_gt_i16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x34,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W32-REAL16: v_cmp_gt_i16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x34,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_gt_i16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x34,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_gt_i16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x34,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_gt_i16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x34,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+
+0x7a,0x08,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
+# W32-REAL16: v_cmp_gt_i16_e64_dpp ttmp14, v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x08,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_gt_i16_e64_dpp ttmp14, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_gt_i16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x08,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_gt_i16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x34,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+
+0x7c,0x10,0x34,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00
+# W32-REAL16: v_cmp_gt_i16_e64_dpp null, v255.l, v255.h op_sel:[0,1] dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x10,0x34,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_gt_i16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x34,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_gt_i16_e64_dpp null, v255.l, v255.h op_sel:[0,1] dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x10,0x34,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_gt_i16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x34,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
 
 0x0a,0x00,0x44,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
 # W32: v_cmp_gt_i32_e64_dpp s10, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x44,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
@@ -431,27 +556,52 @@
 # GFX12: v_cmp_gt_i32_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x44,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
 
 0x0a,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_gt_u16_e64_dpp s10, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_gt_u16_e64_dpp s10, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_gt_u16_e64_dpp s10, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_gt_u16_e64_dpp s[10:11], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_gt_u16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x0a,0x00,0x3c,0xd4,0xe9,0x06,0x00,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_gt_u16_e64_dpp s10, v1, s3 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3c,0xd4,0xe9,0x06,0x00,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_gt_u16_e64_dpp s[10:11], v1, s3 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3c,0xd4,0xe9,0x06,0x00,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_gt_u16_e64_dpp s10, v1.l, s3 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3c,0xd4,0xe9,0x06,0x00,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_gt_u16_e64_dpp s10, v1, s3 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3c,0xd4,0xe9,0x06,0x00,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_gt_u16_e64_dpp s[10:11], v1.l, s3 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3c,0xd4,0xe9,0x06,0x00,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_gt_u16_e64_dpp s[10:11], v1, s3 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3c,0xd4,0xe9,0x06,0x00,0x00,0x01,0x77,0x39,0x05]
 
 0x68,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_gt_u16_e64_dpp s104, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_gt_u16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_gt_u16_e64_dpp s104, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_gt_u16_e64_dpp s104, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_gt_u16_e64_dpp s[104:105], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_gt_u16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x6a,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_gt_u16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_gt_u16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_gt_u16_e64_dpp vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_gt_u16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_gt_u16_e64_dpp vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_gt_u16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x7a,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_gt_u16_e64_dpp ttmp14, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_gt_u16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_gt_u16_e64_dpp ttmp14, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_gt_u16_e64_dpp ttmp14, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_gt_u16_e64_dpp ttmp[14:15], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_gt_u16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x7c,0x00,0x3c,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00
-# GFX12: v_cmp_gt_u16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x3c,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W32-REAL16: v_cmp_gt_u16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x3c,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_gt_u16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x3c,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_gt_u16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x3c,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_gt_u16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x3c,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+
+0x7a,0x08,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
+# W32-REAL16: v_cmp_gt_u16_e64_dpp ttmp14, v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x08,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_gt_u16_e64_dpp ttmp14, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_gt_u16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x08,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_gt_u16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x3c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+
+0x7c,0x10,0x3c,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00
+# W32-REAL16: v_cmp_gt_u16_e64_dpp null, v255.l, v255.h op_sel:[0,1] dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x10,0x3c,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_gt_u16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x3c,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_gt_u16_e64_dpp null, v255.l, v255.h op_sel:[0,1] dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x10,0x3c,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_gt_u16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x3c,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
 
 0x0a,0x00,0x4c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
 # W32: v_cmp_gt_u32_e64_dpp s10, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x4c,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
@@ -523,27 +673,52 @@
 # GFX12: v_cmp_le_f32_e64_dpp null, -|v255|, -|v255| clamp dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x83,0x13,0xd4,0xea,0xfe,0x03,0x60,0xff,0x00,0x00,0x00]
 
 0x0a,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_le_i16_e64_dpp s10, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_le_i16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_le_i16_e64_dpp s10, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_le_i16_e64_dpp s10, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_le_i16_e64_dpp s[10:11], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_le_i16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x0a,0x00,0x33,0xd4,0xe9,0x06,0x00,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_le_i16_e64_dpp s10, v1, s3 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x33,0xd4,0xe9,0x06,0x00,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_le_i16_e64_dpp s[10:11], v1, s3 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x33,0xd4,0xe9,0x06,0x00,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_le_i16_e64_dpp s10, v1.l, s3 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x33,0xd4,0xe9,0x06,0x00,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_le_i16_e64_dpp s10, v1, s3 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x33,0xd4,0xe9,0x06,0x00,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_le_i16_e64_dpp s[10:11], v1.l, s3 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x33,0xd4,0xe9,0x06,0x00,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_le_i16_e64_dpp s[10:11], v1, s3 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x33,0xd4,0xe9,0x06,0x00,0x00,0x01,0x77,0x39,0x05]
 
 0x68,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_le_i16_e64_dpp s104, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_le_i16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_le_i16_e64_dpp s104, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_le_i16_e64_dpp s104, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_le_i16_e64_dpp s[104:105], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_le_i16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x6a,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_le_i16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_le_i16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_le_i16_e64_dpp vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_le_i16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_le_i16_e64_dpp vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_le_i16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x7a,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_le_i16_e64_dpp ttmp14, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_le_i16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_le_i16_e64_dpp ttmp14, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_le_i16_e64_dpp ttmp14, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_le_i16_e64_dpp ttmp[14:15], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_le_i16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x7c,0x00,0x33,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00
-# GFX12: v_cmp_le_i16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x33,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W32-REAL16: v_cmp_le_i16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x33,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_le_i16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x33,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_le_i16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x33,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_le_i16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x33,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+
+0x7a,0x08,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
+# W32-REAL16: v_cmp_le_i16_e64_dpp ttmp14, v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x08,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_le_i16_e64_dpp ttmp14, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_le_i16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x08,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_le_i16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x33,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+
+0x7c,0x10,0x33,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00
+# W32-REAL16: v_cmp_le_i16_e64_dpp null, v255.l, v255.h op_sel:[0,1] dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x10,0x33,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_le_i16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x33,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_le_i16_e64_dpp null, v255.l, v255.h op_sel:[0,1] dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x10,0x33,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_le_i16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x33,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
 
 0x0a,0x00,0x43,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
 # W32: v_cmp_le_i32_e64_dpp s10, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x43,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
@@ -569,27 +744,52 @@
 # GFX12: v_cmp_le_i32_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x43,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
 
 0x0a,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_le_u16_e64_dpp s10, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_le_u16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_le_u16_e64_dpp s10, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_le_u16_e64_dpp s10, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_le_u16_e64_dpp s[10:11], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_le_u16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x0a,0x00,0x3b,0xd4,0xe9,0x06,0x00,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_le_u16_e64_dpp s10, v1, s3 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3b,0xd4,0xe9,0x06,0x00,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_le_u16_e64_dpp s[10:11], v1, s3 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3b,0xd4,0xe9,0x06,0x00,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_le_u16_e64_dpp s10, v1.l, s3 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3b,0xd4,0xe9,0x06,0x00,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_le_u16_e64_dpp s10, v1, s3 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3b,0xd4,0xe9,0x06,0x00,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_le_u16_e64_dpp s[10:11], v1.l, s3 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3b,0xd4,0xe9,0x06,0x00,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_le_u16_e64_dpp s[10:11], v1, s3 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3b,0xd4,0xe9,0x06,0x00,0x00,0x01,0x77,0x39,0x05]
 
 0x68,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_le_u16_e64_dpp s104, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_le_u16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_le_u16_e64_dpp s104, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_le_u16_e64_dpp s104, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_le_u16_e64_dpp s[104:105], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_le_u16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x6a,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_le_u16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_le_u16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_le_u16_e64_dpp vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_le_u16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_le_u16_e64_dpp vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_le_u16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x7a,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_le_u16_e64_dpp ttmp14, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_le_u16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_le_u16_e64_dpp ttmp14, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_le_u16_e64_dpp ttmp14, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_le_u16_e64_dpp ttmp[14:15], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_le_u16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x7c,0x00,0x3b,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00
-# GFX12: v_cmp_le_u16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x3b,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W32-REAL16: v_cmp_le_u16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x3b,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_le_u16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x3b,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_le_u16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x3b,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_le_u16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x3b,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+
+0x7a,0x08,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
+# W32-REAL16: v_cmp_le_u16_e64_dpp ttmp14, v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x08,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_le_u16_e64_dpp ttmp14, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_le_u16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x08,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_le_u16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x3b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+
+0x7c,0x10,0x3b,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00
+# W32-REAL16: v_cmp_le_u16_e64_dpp null, v255.l, v255.h op_sel:[0,1] dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x10,0x3b,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_le_u16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x3b,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_le_u16_e64_dpp null, v255.l, v255.h op_sel:[0,1] dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x10,0x3b,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_le_u16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x3b,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
 
 0x0a,0x00,0x4b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
 # W32: v_cmp_le_u32_e64_dpp s10, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x4b,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
@@ -732,27 +932,52 @@
 # GFX12: v_cmp_lt_f32_e64_dpp null, -|v255|, -|v255| clamp dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x83,0x11,0xd4,0xea,0xfe,0x03,0x60,0xff,0x00,0x00,0x00]
 
 0x0a,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_lt_i16_e64_dpp s10, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_lt_i16_e64_dpp s10, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_lt_i16_e64_dpp s10, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_lt_i16_e64_dpp s[10:11], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_lt_i16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x0a,0x00,0x31,0xd4,0xe9,0x06,0x00,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_lt_i16_e64_dpp s10, v1, s3 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x31,0xd4,0xe9,0x06,0x00,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_lt_i16_e64_dpp s[10:11], v1, s3 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x31,0xd4,0xe9,0x06,0x00,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_lt_i16_e64_dpp s10, v1.l, s3 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x31,0xd4,0xe9,0x06,0x00,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_lt_i16_e64_dpp s10, v1, s3 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x31,0xd4,0xe9,0x06,0x00,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_lt_i16_e64_dpp s[10:11], v1.l, s3 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x31,0xd4,0xe9,0x06,0x00,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_lt_i16_e64_dpp s[10:11], v1, s3 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x31,0xd4,0xe9,0x06,0x00,0x00,0x01,0x77,0x39,0x05]
 
 0x68,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_lt_i16_e64_dpp s104, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_lt_i16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_lt_i16_e64_dpp s104, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_lt_i16_e64_dpp s104, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_lt_i16_e64_dpp s[104:105], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_lt_i16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x6a,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_lt_i16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_lt_i16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_lt_i16_e64_dpp vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_lt_i16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_lt_i16_e64_dpp vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_lt_i16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x7a,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_lt_i16_e64_dpp ttmp14, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_lt_i16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_lt_i16_e64_dpp ttmp14, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_lt_i16_e64_dpp ttmp14, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_lt_i16_e64_dpp ttmp[14:15], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_lt_i16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x7c,0x00,0x31,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00
-# GFX12: v_cmp_lt_i16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x31,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W32-REAL16: v_cmp_lt_i16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x31,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_lt_i16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x31,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_lt_i16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x31,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_lt_i16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x31,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+
+0x7a,0x08,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
+# W32-REAL16: v_cmp_lt_i16_e64_dpp ttmp14, v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x08,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_lt_i16_e64_dpp ttmp14, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_lt_i16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x08,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_lt_i16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x31,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+
+0x7c,0x10,0x31,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00
+# W32-REAL16: v_cmp_lt_i16_e64_dpp null, v255.l, v255.h op_sel:[0,1] dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x10,0x31,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_lt_i16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x31,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_lt_i16_e64_dpp null, v255.l, v255.h op_sel:[0,1] dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x10,0x31,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_lt_i16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x31,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
 
 0x0a,0x00,0x41,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
 # W32: v_cmp_lt_i32_e64_dpp s10, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x41,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
@@ -778,27 +1003,52 @@
 # GFX12: v_cmp_lt_i32_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x41,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
 
 0x0a,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_lt_u16_e64_dpp s10, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_lt_u16_e64_dpp s10, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_lt_u16_e64_dpp s10, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_lt_u16_e64_dpp s[10:11], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_lt_u16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x0a,0x00,0x39,0xd4,0xe9,0x06,0x00,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_lt_u16_e64_dpp s10, v1, s3 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x39,0xd4,0xe9,0x06,0x00,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_lt_u16_e64_dpp s[10:11], v1, s3 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x39,0xd4,0xe9,0x06,0x00,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_lt_u16_e64_dpp s10, v1.l, s3 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x39,0xd4,0xe9,0x06,0x00,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_lt_u16_e64_dpp s10, v1, s3 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x39,0xd4,0xe9,0x06,0x00,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_lt_u16_e64_dpp s[10:11], v1.l, s3 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x39,0xd4,0xe9,0x06,0x00,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_lt_u16_e64_dpp s[10:11], v1, s3 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x39,0xd4,0xe9,0x06,0x00,0x00,0x01,0x77,0x39,0x05]
 
 0x68,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_lt_u16_e64_dpp s104, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_lt_u16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_lt_u16_e64_dpp s104, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_lt_u16_e64_dpp s104, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_lt_u16_e64_dpp s[104:105], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_lt_u16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x6a,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_lt_u16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_lt_u16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_lt_u16_e64_dpp vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_lt_u16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_lt_u16_e64_dpp vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_lt_u16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x7a,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_lt_u16_e64_dpp ttmp14, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_lt_u16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_lt_u16_e64_dpp ttmp14, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_lt_u16_e64_dpp ttmp14, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_lt_u16_e64_dpp ttmp[14:15], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_lt_u16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x7c,0x00,0x39,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00
-# GFX12: v_cmp_lt_u16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x39,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W32-REAL16: v_cmp_lt_u16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x39,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_lt_u16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x39,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_lt_u16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x39,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_lt_u16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x39,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+
+0x7a,0x08,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
+# W32-REAL16: v_cmp_lt_u16_e64_dpp ttmp14, v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x08,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_lt_u16_e64_dpp ttmp14, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_lt_u16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x08,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_lt_u16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x39,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+
+0x7c,0x10,0x39,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00
+# W32-REAL16: v_cmp_lt_u16_e64_dpp null, v255.l, v255.h op_sel:[0,1] dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x10,0x39,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_lt_u16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x39,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_lt_u16_e64_dpp null, v255.l, v255.h op_sel:[0,1] dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x10,0x39,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_lt_u16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x39,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
 
 0x0a,0x00,0x49,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
 # W32: v_cmp_lt_u32_e64_dpp s10, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x49,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
@@ -824,27 +1074,52 @@
 # GFX12: v_cmp_lt_u32_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x49,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
 
 0x0a,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_ne_i16_e64_dpp s10, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_ne_i16_e64_dpp s10, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_ne_i16_e64_dpp s10, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_ne_i16_e64_dpp s[10:11], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_ne_i16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x0a,0x00,0x35,0xd4,0xe9,0x06,0x00,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_ne_i16_e64_dpp s10, v1, s3 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x35,0xd4,0xe9,0x06,0x00,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_ne_i16_e64_dpp s[10:11], v1, s3 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x35,0xd4,0xe9,0x06,0x00,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_ne_i16_e64_dpp s10, v1.l, s3 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x35,0xd4,0xe9,0x06,0x00,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_ne_i16_e64_dpp s10, v1, s3 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x35,0xd4,0xe9,0x06,0x00,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_ne_i16_e64_dpp s[10:11], v1.l, s3 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x35,0xd4,0xe9,0x06,0x00,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_ne_i16_e64_dpp s[10:11], v1, s3 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x35,0xd4,0xe9,0x06,0x00,0x00,0x01,0x77,0x39,0x05]
 
 0x68,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_ne_i16_e64_dpp s104, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_ne_i16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_ne_i16_e64_dpp s104, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_ne_i16_e64_dpp s104, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_ne_i16_e64_dpp s[104:105], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_ne_i16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x6a,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_ne_i16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_ne_i16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_ne_i16_e64_dpp vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_ne_i16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_ne_i16_e64_dpp vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_ne_i16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x7a,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_ne_i16_e64_dpp ttmp14, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_ne_i16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_ne_i16_e64_dpp ttmp14, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_ne_i16_e64_dpp ttmp14, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_ne_i16_e64_dpp ttmp[14:15], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_ne_i16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x7c,0x00,0x35,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00
-# GFX12: v_cmp_ne_i16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x35,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W32-REAL16: v_cmp_ne_i16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x35,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_ne_i16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x35,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_ne_i16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x35,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_ne_i16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x35,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+
+0x7a,0x08,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
+# W32-REAL16: v_cmp_ne_i16_e64_dpp ttmp14, v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x08,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_ne_i16_e64_dpp ttmp14, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_ne_i16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x08,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_ne_i16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x35,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+
+0x7c,0x10,0x35,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00
+# W32-REAL16: v_cmp_ne_i16_e64_dpp null, v255.l, v255.h op_sel:[0,1] dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x10,0x35,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_ne_i16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x35,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_ne_i16_e64_dpp null, v255.l, v255.h op_sel:[0,1] dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x10,0x35,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_ne_i16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x35,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
 
 0x0a,0x00,0x45,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
 # W32: v_cmp_ne_i32_e64_dpp s10, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x45,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
@@ -870,27 +1145,52 @@
 # GFX12: v_cmp_ne_i32_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x45,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
 
 0x0a,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_ne_u16_e64_dpp s10, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_ne_u16_e64_dpp s10, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_ne_u16_e64_dpp s10, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_ne_u16_e64_dpp s[10:11], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_ne_u16_e64_dpp s[10:11], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x0a,0x00,0x3d,0xd4,0xe9,0x06,0x00,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_ne_u16_e64_dpp s10, v1, s3 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3d,0xd4,0xe9,0x06,0x00,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_ne_u16_e64_dpp s[10:11], v1, s3 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3d,0xd4,0xe9,0x06,0x00,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_ne_u16_e64_dpp s10, v1.l, s3 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3d,0xd4,0xe9,0x06,0x00,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_ne_u16_e64_dpp s10, v1, s3 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3d,0xd4,0xe9,0x06,0x00,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_ne_u16_e64_dpp s[10:11], v1.l, s3 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3d,0xd4,0xe9,0x06,0x00,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_ne_u16_e64_dpp s[10:11], v1, s3 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x3d,0xd4,0xe9,0x06,0x00,0x00,0x01,0x77,0x39,0x05]
 
 0x68,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_ne_u16_e64_dpp s104, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_ne_u16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_ne_u16_e64_dpp s104, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_ne_u16_e64_dpp s104, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_ne_u16_e64_dpp s[104:105], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_ne_u16_e64_dpp s[104:105], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x68,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x6a,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_ne_u16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_ne_u16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_ne_u16_e64_dpp vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_ne_u16_e64_dpp vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_ne_u16_e64_dpp vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_ne_u16_e64_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x6a,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x7a,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
-# W32: v_cmp_ne_u16_e64_dpp ttmp14, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
-# W64: v_cmp_ne_u16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_ne_u16_e64_dpp ttmp14, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_ne_u16_e64_dpp ttmp14, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_ne_u16_e64_dpp ttmp[14:15], v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_ne_u16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
 
 0x7c,0x00,0x3d,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00
-# GFX12: v_cmp_ne_u16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x3d,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W32-REAL16: v_cmp_ne_u16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x3d,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_ne_u16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x3d,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_ne_u16_e64_dpp null, v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x3d,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_ne_u16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x3d,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+
+0x7a,0x08,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
+# W32-REAL16: v_cmp_ne_u16_e64_dpp ttmp14, v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x08,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_ne_u16_e64_dpp ttmp14, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_ne_u16_e64_dpp ttmp[14:15], v1.h, v2.l op_sel:[1,0] dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x08,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_ne_u16_e64_dpp ttmp[14:15], v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x7a,0x00,0x3d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
+
+0x7c,0x10,0x3d,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00
+# W32-REAL16: v_cmp_ne_u16_e64_dpp null, v255.l, v255.h op_sel:[0,1] dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x10,0x3d,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_ne_u16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x3d,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_ne_u16_e64_dpp null, v255.l, v255.h op_sel:[0,1] dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x10,0x3d,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_ne_u16_e64_dpp null, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0x7c,0x00,0x3d,0xd4,0xea,0xfe,0x03,0x00,0xff,0x00,0x00,0x00]
 
 0x0a,0x00,0x4d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05
 # W32: v_cmp_ne_u32_e64_dpp s10, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x0a,0x00,0x4d,0xd4,0xe9,0x04,0x02,0x00,0x01,0x77,0x39,0x05]
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopc.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopc.txt
index 3048b8553c7ec4..12c26963c67917 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopc.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopc.txt
@@ -341,64 +341,118 @@
 # W64: v_cmp_eq_f64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x45,0x7c,0x56,0x34,0x12,0xaf]
 
 0x01,0x05,0x64,0x7c
-# W32: v_cmp_eq_i16_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x64,0x7c]
-# W64: v_cmp_eq_i16_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x64,0x7c]
+# W32-REAL16: v_cmp_eq_i16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x64,0x7c]
+# W64-REAL16: v_cmp_eq_i16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x64,0x7c]
+# W32-FAKE16: v_cmp_eq_i16_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x64,0x7c]
+# W64-FAKE16: v_cmp_eq_i16_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x64,0x7c]
 
 0x7f,0x05,0x64,0x7c
-# W32: v_cmp_eq_i16_e32 vcc_lo, v127, v2       ; encoding: [0x7f,0x05,0x64,0x7c]
-# W64: v_cmp_eq_i16_e32 vcc, v127, v2          ; encoding: [0x7f,0x05,0x64,0x7c]
+# W32-REAL16: v_cmp_eq_i16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x64,0x7c]
+# W64-REAL16: v_cmp_eq_i16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x64,0x7c]
+# W32-FAKE16: v_cmp_eq_i16_e32 vcc_lo, v127, v2       ; encoding: [0x7f,0x05,0x64,0x7c]
+# W64-FAKE16: v_cmp_eq_i16_e32 vcc, v127, v2          ; encoding: [0x7f,0x05,0x64,0x7c]
 
 0x01,0x04,0x64,0x7c
-# W32: v_cmp_eq_i16_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x64,0x7c]
-# W64: v_cmp_eq_i16_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x64,0x7c]
+# W32-REAL16: v_cmp_eq_i16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x64,0x7c]
+# W64-REAL16: v_cmp_eq_i16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x64,0x7c]
+# W32-FAKE16: v_cmp_eq_i16_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x64,0x7c]
+# W64-FAKE16: v_cmp_eq_i16_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x64,0x7c]
 
 0x69,0x04,0x64,0x7c
-# W32: v_cmp_eq_i16_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x64,0x7c]
-# W64: v_cmp_eq_i16_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x64,0x7c]
+# W32-REAL16: v_cmp_eq_i16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x64,0x7c]
+# W64-REAL16: v_cmp_eq_i16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x64,0x7c]
+# W32-FAKE16: v_cmp_eq_i16_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x64,0x7c]
+# W64-FAKE16: v_cmp_eq_i16_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x64,0x7c]
 
 0x6a,0x04,0x64,0x7c
-# W32: v_cmp_eq_i16_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x64,0x7c]
-# W64: v_cmp_eq_i16_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x64,0x7c]
+# W32-REAL16: v_cmp_eq_i16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x64,0x7c]
+# W64-REAL16: v_cmp_eq_i16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x64,0x7c]
+# W32-FAKE16: v_cmp_eq_i16_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x64,0x7c]
+# W64-FAKE16: v_cmp_eq_i16_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x64,0x7c]
 
 0x6b,0x04,0x64,0x7c
-# W32: v_cmp_eq_i16_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x64,0x7c]
-# W64: v_cmp_eq_i16_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x64,0x7c]
+# W32-REAL16: v_cmp_eq_i16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x64,0x7c]
+# W64-REAL16: v_cmp_eq_i16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x64,0x7c]
+# W32-FAKE16: v_cmp_eq_i16_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x64,0x7c]
+# W64-FAKE16: v_cmp_eq_i16_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x64,0x7c]
 
 0x7b,0x04,0x64,0x7c
-# W32: v_cmp_eq_i16_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x64,0x7c]
-# W64: v_cmp_eq_i16_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x64,0x7c]
+# W32-REAL16: v_cmp_eq_i16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x64,0x7c]
+# W64-REAL16: v_cmp_eq_i16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x64,0x7c]
+# W32-FAKE16: v_cmp_eq_i16_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x64,0x7c]
+# W64-FAKE16: v_cmp_eq_i16_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x64,0x7c]
 
 0x7d,0x04,0x64,0x7c
-# W32: v_cmp_eq_i16_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x64,0x7c]
-# W64: v_cmp_eq_i16_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x64,0x7c]
+# W32-REAL16: v_cmp_eq_i16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x64,0x7c]
+# W64-REAL16: v_cmp_eq_i16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x64,0x7c]
+# W32-FAKE16: v_cmp_eq_i16_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x64,0x7c]
+# W64-FAKE16: v_cmp_eq_i16_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x64,0x7c]
 
 0x7e,0x04,0x64,0x7c
-# W32: v_cmp_eq_i16_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x64,0x7c]
-# W64: v_cmp_eq_i16_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x64,0x7c]
+# W32-REAL16: v_cmp_eq_i16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x64,0x7c]
+# W64-REAL16: v_cmp_eq_i16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x64,0x7c]
+# W32-FAKE16: v_cmp_eq_i16_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x64,0x7c]
+# W64-FAKE16: v_cmp_eq_i16_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x64,0x7c]
 
 0x7f,0x04,0x64,0x7c
-# W32: v_cmp_eq_i16_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x64,0x7c]
-# W64: v_cmp_eq_i16_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x64,0x7c]
+# W32-REAL16: v_cmp_eq_i16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x64,0x7c]
+# W64-REAL16: v_cmp_eq_i16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x64,0x7c]
+# W32-FAKE16: v_cmp_eq_i16_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x64,0x7c]
+# W64-FAKE16: v_cmp_eq_i16_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x64,0x7c]
 
 0x7c,0x04,0x64,0x7c
-# W32: v_cmp_eq_i16_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x64,0x7c]
-# W64: v_cmp_eq_i16_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x64,0x7c]
+# W32-REAL16: v_cmp_eq_i16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x64,0x7c]
+# W64-REAL16: v_cmp_eq_i16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x64,0x7c]
+# W32-FAKE16: v_cmp_eq_i16_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x64,0x7c]
+# W64-FAKE16: v_cmp_eq_i16_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x64,0x7c]
 
 0xc1,0x04,0x64,0x7c
-# W32: v_cmp_eq_i16_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x64,0x7c]
-# W64: v_cmp_eq_i16_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x64,0x7c]
+# W32-REAL16: v_cmp_eq_i16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x64,0x7c]
+# W64-REAL16: v_cmp_eq_i16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x64,0x7c]
+# W32-FAKE16: v_cmp_eq_i16_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x64,0x7c]
+# W64-FAKE16: v_cmp_eq_i16_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x64,0x7c]
 
 0xf0,0x04,0x64,0x7c
-# W32: v_cmp_eq_i16_e32 vcc_lo, 0x3800, v2     ; encoding: [0xff,0x04,0x64,0x7c,0x00,0x38,0x00,0x00]
-# W64: v_cmp_eq_i16_e32 vcc, 0x3800, v2        ; encoding: [0xff,0x04,0x64,0x7c,0x00,0x38,0x00,0x00]
+# W32-REAL16: v_cmp_eq_i16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x64,0x7c,0x00,0x38,0x00,0x00]
+# W64-REAL16: v_cmp_eq_i16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x64,0x7c,0x00,0x38,0x00,0x00]
+# W32-FAKE16: v_cmp_eq_i16_e32 vcc_lo, 0x3800, v2     ; encoding: [0xff,0x04,0x64,0x7c,0x00,0x38,0x00,0x00]
+# W64-FAKE16: v_cmp_eq_i16_e32 vcc, 0x3800, v2        ; encoding: [0xff,0x04,0x64,0x7c,0x00,0x38,0x00,0x00]
 
 0xfd,0x04,0x64,0x7c
-# W32: v_cmp_eq_i16_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x64,0x7c]
-# W64: v_cmp_eq_i16_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x64,0x7c]
+# W32-REAL16: v_cmp_eq_i16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x64,0x7c]
+# W64-REAL16: v_cmp_eq_i16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x64,0x7c]
+# W32-FAKE16: v_cmp_eq_i16_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x64,0x7c]
+# W64-FAKE16: v_cmp_eq_i16_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x64,0x7c]
 
 0xff,0xfe,0x64,0x7c,0x0b,0xfe,0x00,0x00
-# W32: v_cmp_eq_i16_e32 vcc_lo, 0xfe0b, v127   ; encoding: [0xff,0xfe,0x64,0x7c,0x0b,0xfe,0x00,0x00]
-# W64: v_cmp_eq_i16_e32 vcc, 0xfe0b, v127      ; encoding: [0xff,0xfe,0x64,0x7c,0x0b,0xfe,0x00,0x00]
+# W32-REAL16: v_cmp_eq_i16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x64,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-REAL16: v_cmp_eq_i16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x64,0x7c,0x0b,0xfe,0x00,0x00]
+# W32-FAKE16: v_cmp_eq_i16_e32 vcc_lo, 0xfe0b, v127   ; encoding: [0xff,0xfe,0x64,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-FAKE16: v_cmp_eq_i16_e32 vcc, 0xfe0b, v127      ; encoding: [0xff,0xfe,0x64,0x7c,0x0b,0xfe,0x00,0x00]
+
+0x81,0x05,0x64,0x7c
+# W32-REAL16: v_cmp_eq_i16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x64,0x7c]
+# W64-REAL16: v_cmp_eq_i16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x64,0x7c]
+# W32-FAKE16: v_cmp_eq_i16_e32 vcc_lo, v129/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0x81,0x05,0x64,0x7c]
+# W64-FAKE16: v_cmp_eq_i16_e32 vcc, v129/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0x81,0x05,0x64,0x7c]
+
+0xff,0x05,0x64,0x7c
+# W32-REAL16: v_cmp_eq_i16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x64,0x7c]
+# W64-REAL16: v_cmp_eq_i16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x64,0x7c]
+# W32-FAKE16: v_cmp_eq_i16_e32 vcc_lo, v255/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0xff,0x05,0x64,0x7c]
+# W64-FAKE16: v_cmp_eq_i16_e32 vcc, v255/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0xff,0x05,0x64,0x7c]
+
+0xfd,0x04,0x65,0x7c
+# W32-REAL16: v_cmp_eq_i16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x65,0x7c]
+# W64-REAL16: v_cmp_eq_i16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x65,0x7c]
+# W32-FAKE16: v_cmp_eq_i16_e32 vcc_lo, src_scc, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xfd,0x04,0x65,0x7c]
+# W64-FAKE16: v_cmp_eq_i16_e32 vcc, src_scc, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xfd,0x04,0x65,0x7c]
+
+0xff,0xfe,0x65,0x7c,0x0b,0xfe,0x00,0x00
+# W32-REAL16: v_cmp_eq_i16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x65,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-REAL16: v_cmp_eq_i16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x65,0x7c,0x0b,0xfe,0x00,0x00]
+# W32-FAKE16: v_cmp_eq_i16_e32 vcc_lo, 0xfe0b, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xff,0xfe,0x65,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-FAKE16: v_cmp_eq_i16_e32 vcc, 0xfe0b, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xff,0xfe,0x65,0x7c,0x0b,0xfe,0x00,0x00]
 
 0x01,0x05,0x84,0x7c
 # W32: v_cmp_eq_i32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x84,0x7c]
@@ -509,64 +563,118 @@
 # W64: v_cmp_eq_i64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xa5,0x7c,0x56,0x34,0x12,0xaf]
 
 0x01,0x05,0x74,0x7c
-# W32: v_cmp_eq_u16_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x74,0x7c]
-# W64: v_cmp_eq_u16_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x74,0x7c]
+# W32-REAL16: v_cmp_eq_u16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x74,0x7c]
+# W64-REAL16: v_cmp_eq_u16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x74,0x7c]
+# W32-FAKE16: v_cmp_eq_u16_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x74,0x7c]
+# W64-FAKE16: v_cmp_eq_u16_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x74,0x7c]
 
 0x7f,0x05,0x74,0x7c
-# W32: v_cmp_eq_u16_e32 vcc_lo, v127, v2       ; encoding: [0x7f,0x05,0x74,0x7c]
-# W64: v_cmp_eq_u16_e32 vcc, v127, v2          ; encoding: [0x7f,0x05,0x74,0x7c]
+# W32-REAL16: v_cmp_eq_u16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x74,0x7c]
+# W64-REAL16: v_cmp_eq_u16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x74,0x7c]
+# W32-FAKE16: v_cmp_eq_u16_e32 vcc_lo, v127, v2       ; encoding: [0x7f,0x05,0x74,0x7c]
+# W64-FAKE16: v_cmp_eq_u16_e32 vcc, v127, v2          ; encoding: [0x7f,0x05,0x74,0x7c]
 
 0x01,0x04,0x74,0x7c
-# W32: v_cmp_eq_u16_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x74,0x7c]
-# W64: v_cmp_eq_u16_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x74,0x7c]
+# W32-REAL16: v_cmp_eq_u16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x74,0x7c]
+# W64-REAL16: v_cmp_eq_u16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x74,0x7c]
+# W32-FAKE16: v_cmp_eq_u16_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x74,0x7c]
+# W64-FAKE16: v_cmp_eq_u16_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x74,0x7c]
 
 0x69,0x04,0x74,0x7c
-# W32: v_cmp_eq_u16_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x74,0x7c]
-# W64: v_cmp_eq_u16_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x74,0x7c]
+# W32-REAL16: v_cmp_eq_u16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x74,0x7c]
+# W64-REAL16: v_cmp_eq_u16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x74,0x7c]
+# W32-FAKE16: v_cmp_eq_u16_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x74,0x7c]
+# W64-FAKE16: v_cmp_eq_u16_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x74,0x7c]
 
 0x6a,0x04,0x74,0x7c
-# W32: v_cmp_eq_u16_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x74,0x7c]
-# W64: v_cmp_eq_u16_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x74,0x7c]
+# W32-REAL16: v_cmp_eq_u16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x74,0x7c]
+# W64-REAL16: v_cmp_eq_u16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x74,0x7c]
+# W32-FAKE16: v_cmp_eq_u16_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x74,0x7c]
+# W64-FAKE16: v_cmp_eq_u16_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x74,0x7c]
 
 0x6b,0x04,0x74,0x7c
-# W32: v_cmp_eq_u16_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x74,0x7c]
-# W64: v_cmp_eq_u16_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x74,0x7c]
+# W32-REAL16: v_cmp_eq_u16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x74,0x7c]
+# W64-REAL16: v_cmp_eq_u16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x74,0x7c]
+# W32-FAKE16: v_cmp_eq_u16_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x74,0x7c]
+# W64-FAKE16: v_cmp_eq_u16_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x74,0x7c]
 
 0x7b,0x04,0x74,0x7c
-# W32: v_cmp_eq_u16_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x74,0x7c]
-# W64: v_cmp_eq_u16_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x74,0x7c]
+# W32-REAL16: v_cmp_eq_u16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x74,0x7c]
+# W64-REAL16: v_cmp_eq_u16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x74,0x7c]
+# W32-FAKE16: v_cmp_eq_u16_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x74,0x7c]
+# W64-FAKE16: v_cmp_eq_u16_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x74,0x7c]
 
 0x7d,0x04,0x74,0x7c
-# W32: v_cmp_eq_u16_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x74,0x7c]
-# W64: v_cmp_eq_u16_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x74,0x7c]
+# W32-REAL16: v_cmp_eq_u16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x74,0x7c]
+# W64-REAL16: v_cmp_eq_u16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x74,0x7c]
+# W32-FAKE16: v_cmp_eq_u16_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x74,0x7c]
+# W64-FAKE16: v_cmp_eq_u16_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x74,0x7c]
 
 0x7e,0x04,0x74,0x7c
-# W32: v_cmp_eq_u16_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x74,0x7c]
-# W64: v_cmp_eq_u16_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x74,0x7c]
+# W32-REAL16: v_cmp_eq_u16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x74,0x7c]
+# W64-REAL16: v_cmp_eq_u16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x74,0x7c]
+# W32-FAKE16: v_cmp_eq_u16_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x74,0x7c]
+# W64-FAKE16: v_cmp_eq_u16_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x74,0x7c]
 
 0x7f,0x04,0x74,0x7c
-# W32: v_cmp_eq_u16_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x74,0x7c]
-# W64: v_cmp_eq_u16_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x74,0x7c]
+# W32-REAL16: v_cmp_eq_u16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x74,0x7c]
+# W64-REAL16: v_cmp_eq_u16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x74,0x7c]
+# W32-FAKE16: v_cmp_eq_u16_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x74,0x7c]
+# W64-FAKE16: v_cmp_eq_u16_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x74,0x7c]
 
 0x7c,0x04,0x74,0x7c
-# W32: v_cmp_eq_u16_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x74,0x7c]
-# W64: v_cmp_eq_u16_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x74,0x7c]
+# W32-REAL16: v_cmp_eq_u16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x74,0x7c]
+# W64-REAL16: v_cmp_eq_u16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x74,0x7c]
+# W32-FAKE16: v_cmp_eq_u16_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x74,0x7c]
+# W64-FAKE16: v_cmp_eq_u16_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x74,0x7c]
 
 0xc1,0x04,0x74,0x7c
-# W32: v_cmp_eq_u16_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x74,0x7c]
-# W64: v_cmp_eq_u16_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x74,0x7c]
+# W32-REAL16: v_cmp_eq_u16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x74,0x7c]
+# W64-REAL16: v_cmp_eq_u16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x74,0x7c]
+# W32-FAKE16: v_cmp_eq_u16_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x74,0x7c]
+# W64-FAKE16: v_cmp_eq_u16_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x74,0x7c]
 
 0xf0,0x04,0x74,0x7c
-# W32: v_cmp_eq_u16_e32 vcc_lo, 0x3800, v2     ; encoding: [0xff,0x04,0x74,0x7c,0x00,0x38,0x00,0x00]
-# W64: v_cmp_eq_u16_e32 vcc, 0x3800, v2        ; encoding: [0xff,0x04,0x74,0x7c,0x00,0x38,0x00,0x00]
+# W32-REAL16: v_cmp_eq_u16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x74,0x7c,0x00,0x38,0x00,0x00]
+# W64-REAL16: v_cmp_eq_u16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x74,0x7c,0x00,0x38,0x00,0x00]
+# W32-FAKE16: v_cmp_eq_u16_e32 vcc_lo, 0x3800, v2     ; encoding: [0xff,0x04,0x74,0x7c,0x00,0x38,0x00,0x00]
+# W64-FAKE16: v_cmp_eq_u16_e32 vcc, 0x3800, v2        ; encoding: [0xff,0x04,0x74,0x7c,0x00,0x38,0x00,0x00]
 
 0xfd,0x04,0x74,0x7c
-# W32: v_cmp_eq_u16_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x74,0x7c]
-# W64: v_cmp_eq_u16_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x74,0x7c]
+# W32-REAL16: v_cmp_eq_u16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x74,0x7c]
+# W64-REAL16: v_cmp_eq_u16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x74,0x7c]
+# W32-FAKE16: v_cmp_eq_u16_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x74,0x7c]
+# W64-FAKE16: v_cmp_eq_u16_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x74,0x7c]
 
 0xff,0xfe,0x74,0x7c,0x0b,0xfe,0x00,0x00
-# W32: v_cmp_eq_u16_e32 vcc_lo, 0xfe0b, v127   ; encoding: [0xff,0xfe,0x74,0x7c,0x0b,0xfe,0x00,0x00]
-# W64: v_cmp_eq_u16_e32 vcc, 0xfe0b, v127      ; encoding: [0xff,0xfe,0x74,0x7c,0x0b,0xfe,0x00,0x00]
+# W32-REAL16: v_cmp_eq_u16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x74,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-REAL16: v_cmp_eq_u16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x74,0x7c,0x0b,0xfe,0x00,0x00]
+# W32-FAKE16: v_cmp_eq_u16_e32 vcc_lo, 0xfe0b, v127   ; encoding: [0xff,0xfe,0x74,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-FAKE16: v_cmp_eq_u16_e32 vcc, 0xfe0b, v127      ; encoding: [0xff,0xfe,0x74,0x7c,0x0b,0xfe,0x00,0x00]
+
+0x81,0x05,0x74,0x7c
+# W32-REAL16: v_cmp_eq_u16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x74,0x7c]
+# W64-REAL16: v_cmp_eq_u16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x74,0x7c]
+# W32-FAKE16: v_cmp_eq_u16_e32 vcc_lo, v129/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0x81,0x05,0x74,0x7c]
+# W64-FAKE16: v_cmp_eq_u16_e32 vcc, v129/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0x81,0x05,0x74,0x7c]
+
+0xff,0x05,0x74,0x7c
+# W32-REAL16: v_cmp_eq_u16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x74,0x7c]
+# W64-REAL16: v_cmp_eq_u16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x74,0x7c]
+# W32-FAKE16: v_cmp_eq_u16_e32 vcc_lo, v255/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0xff,0x05,0x74,0x7c]
+# W64-FAKE16: v_cmp_eq_u16_e32 vcc, v255/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0xff,0x05,0x74,0x7c]
+
+0xfd,0x04,0x75,0x7c
+# W32-REAL16: v_cmp_eq_u16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x75,0x7c]
+# W64-REAL16: v_cmp_eq_u16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x75,0x7c]
+# W32-FAKE16: v_cmp_eq_u16_e32 vcc_lo, src_scc, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xfd,0x04,0x75,0x7c]
+# W64-FAKE16: v_cmp_eq_u16_e32 vcc, src_scc, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xfd,0x04,0x75,0x7c]
+
+0xff,0xfe,0x75,0x7c,0x0b,0xfe,0x00,0x00
+# W32-REAL16: v_cmp_eq_u16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x75,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-REAL16: v_cmp_eq_u16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x75,0x7c,0x0b,0xfe,0x00,0x00]
+# W32-FAKE16: v_cmp_eq_u16_e32 vcc_lo, 0xfe0b, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xff,0xfe,0x75,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-FAKE16: v_cmp_eq_u16_e32 vcc, 0xfe0b, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xff,0xfe,0x75,0x7c,0x0b,0xfe,0x00,0x00]
 
 0x01,0x05,0x94,0x7c
 # W32: v_cmp_eq_u32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x94,0x7c]
@@ -845,64 +953,118 @@
 # W64: v_cmp_ge_f64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x4d,0x7c,0x56,0x34,0x12,0xaf]
 
 0x01,0x05,0x6c,0x7c
-# W32: v_cmp_ge_i16_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x6c,0x7c]
-# W64: v_cmp_ge_i16_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x6c,0x7c]
+# W32-REAL16: v_cmp_ge_i16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x6c,0x7c]
+# W64-REAL16: v_cmp_ge_i16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x6c,0x7c]
+# W32-FAKE16: v_cmp_ge_i16_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x6c,0x7c]
+# W64-FAKE16: v_cmp_ge_i16_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x6c,0x7c]
 
 0x7f,0x05,0x6c,0x7c
-# W32: v_cmp_ge_i16_e32 vcc_lo, v127, v2       ; encoding: [0x7f,0x05,0x6c,0x7c]
-# W64: v_cmp_ge_i16_e32 vcc, v127, v2          ; encoding: [0x7f,0x05,0x6c,0x7c]
+# W32-REAL16: v_cmp_ge_i16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x6c,0x7c]
+# W64-REAL16: v_cmp_ge_i16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x6c,0x7c]
+# W32-FAKE16: v_cmp_ge_i16_e32 vcc_lo, v127, v2       ; encoding: [0x7f,0x05,0x6c,0x7c]
+# W64-FAKE16: v_cmp_ge_i16_e32 vcc, v127, v2          ; encoding: [0x7f,0x05,0x6c,0x7c]
 
 0x01,0x04,0x6c,0x7c
-# W32: v_cmp_ge_i16_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x6c,0x7c]
-# W64: v_cmp_ge_i16_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x6c,0x7c]
+# W32-REAL16: v_cmp_ge_i16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x6c,0x7c]
+# W64-REAL16: v_cmp_ge_i16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x6c,0x7c]
+# W32-FAKE16: v_cmp_ge_i16_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x6c,0x7c]
+# W64-FAKE16: v_cmp_ge_i16_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x6c,0x7c]
 
 0x69,0x04,0x6c,0x7c
-# W32: v_cmp_ge_i16_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x6c,0x7c]
-# W64: v_cmp_ge_i16_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x6c,0x7c]
+# W32-REAL16: v_cmp_ge_i16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x6c,0x7c]
+# W64-REAL16: v_cmp_ge_i16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x6c,0x7c]
+# W32-FAKE16: v_cmp_ge_i16_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x6c,0x7c]
+# W64-FAKE16: v_cmp_ge_i16_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x6c,0x7c]
 
 0x6a,0x04,0x6c,0x7c
-# W32: v_cmp_ge_i16_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x6c,0x7c]
-# W64: v_cmp_ge_i16_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x6c,0x7c]
+# W32-REAL16: v_cmp_ge_i16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x6c,0x7c]
+# W64-REAL16: v_cmp_ge_i16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x6c,0x7c]
+# W32-FAKE16: v_cmp_ge_i16_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x6c,0x7c]
+# W64-FAKE16: v_cmp_ge_i16_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x6c,0x7c]
 
 0x6b,0x04,0x6c,0x7c
-# W32: v_cmp_ge_i16_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x6c,0x7c]
-# W64: v_cmp_ge_i16_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x6c,0x7c]
+# W32-REAL16: v_cmp_ge_i16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x6c,0x7c]
+# W64-REAL16: v_cmp_ge_i16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x6c,0x7c]
+# W32-FAKE16: v_cmp_ge_i16_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x6c,0x7c]
+# W64-FAKE16: v_cmp_ge_i16_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x6c,0x7c]
 
 0x7b,0x04,0x6c,0x7c
-# W32: v_cmp_ge_i16_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x6c,0x7c]
-# W64: v_cmp_ge_i16_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x6c,0x7c]
+# W32-REAL16: v_cmp_ge_i16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x6c,0x7c]
+# W64-REAL16: v_cmp_ge_i16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x6c,0x7c]
+# W32-FAKE16: v_cmp_ge_i16_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x6c,0x7c]
+# W64-FAKE16: v_cmp_ge_i16_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x6c,0x7c]
 
 0x7d,0x04,0x6c,0x7c
-# W32: v_cmp_ge_i16_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x6c,0x7c]
-# W64: v_cmp_ge_i16_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x6c,0x7c]
+# W32-REAL16: v_cmp_ge_i16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x6c,0x7c]
+# W64-REAL16: v_cmp_ge_i16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x6c,0x7c]
+# W32-FAKE16: v_cmp_ge_i16_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x6c,0x7c]
+# W64-FAKE16: v_cmp_ge_i16_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x6c,0x7c]
 
 0x7e,0x04,0x6c,0x7c
-# W32: v_cmp_ge_i16_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x6c,0x7c]
-# W64: v_cmp_ge_i16_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x6c,0x7c]
+# W32-REAL16: v_cmp_ge_i16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x6c,0x7c]
+# W64-REAL16: v_cmp_ge_i16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x6c,0x7c]
+# W32-FAKE16: v_cmp_ge_i16_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x6c,0x7c]
+# W64-FAKE16: v_cmp_ge_i16_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x6c,0x7c]
 
 0x7f,0x04,0x6c,0x7c
-# W32: v_cmp_ge_i16_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x6c,0x7c]
-# W64: v_cmp_ge_i16_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x6c,0x7c]
+# W32-REAL16: v_cmp_ge_i16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x6c,0x7c]
+# W64-REAL16: v_cmp_ge_i16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x6c,0x7c]
+# W32-FAKE16: v_cmp_ge_i16_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x6c,0x7c]
+# W64-FAKE16: v_cmp_ge_i16_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x6c,0x7c]
 
 0x7c,0x04,0x6c,0x7c
-# W32: v_cmp_ge_i16_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x6c,0x7c]
-# W64: v_cmp_ge_i16_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x6c,0x7c]
+# W32-REAL16: v_cmp_ge_i16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x6c,0x7c]
+# W64-REAL16: v_cmp_ge_i16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x6c,0x7c]
+# W32-FAKE16: v_cmp_ge_i16_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x6c,0x7c]
+# W64-FAKE16: v_cmp_ge_i16_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x6c,0x7c]
 
 0xc1,0x04,0x6c,0x7c
-# W32: v_cmp_ge_i16_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x6c,0x7c]
-# W64: v_cmp_ge_i16_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x6c,0x7c]
+# W32-REAL16: v_cmp_ge_i16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x6c,0x7c]
+# W64-REAL16: v_cmp_ge_i16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x6c,0x7c]
+# W32-FAKE16: v_cmp_ge_i16_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x6c,0x7c]
+# W64-FAKE16: v_cmp_ge_i16_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x6c,0x7c]
 
 0xf0,0x04,0x6c,0x7c
-# W32: v_cmp_ge_i16_e32 vcc_lo, 0x3800, v2     ; encoding: [0xff,0x04,0x6c,0x7c,0x00,0x38,0x00,0x00]
-# W64: v_cmp_ge_i16_e32 vcc, 0x3800, v2        ; encoding: [0xff,0x04,0x6c,0x7c,0x00,0x38,0x00,0x00]
+# W32-REAL16: v_cmp_ge_i16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x6c,0x7c,0x00,0x38,0x00,0x00]
+# W64-REAL16: v_cmp_ge_i16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x6c,0x7c,0x00,0x38,0x00,0x00]
+# W32-FAKE16: v_cmp_ge_i16_e32 vcc_lo, 0x3800, v2     ; encoding: [0xff,0x04,0x6c,0x7c,0x00,0x38,0x00,0x00]
+# W64-FAKE16: v_cmp_ge_i16_e32 vcc, 0x3800, v2        ; encoding: [0xff,0x04,0x6c,0x7c,0x00,0x38,0x00,0x00]
 
 0xfd,0x04,0x6c,0x7c
-# W32: v_cmp_ge_i16_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x6c,0x7c]
-# W64: v_cmp_ge_i16_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x6c,0x7c]
+# W32-REAL16: v_cmp_ge_i16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x6c,0x7c]
+# W64-REAL16: v_cmp_ge_i16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x6c,0x7c]
+# W32-FAKE16: v_cmp_ge_i16_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x6c,0x7c]
+# W64-FAKE16: v_cmp_ge_i16_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x6c,0x7c]
 
 0xff,0xfe,0x6c,0x7c,0x0b,0xfe,0x00,0x00
-# W32: v_cmp_ge_i16_e32 vcc_lo, 0xfe0b, v127   ; encoding: [0xff,0xfe,0x6c,0x7c,0x0b,0xfe,0x00,0x00]
-# W64: v_cmp_ge_i16_e32 vcc, 0xfe0b, v127      ; encoding: [0xff,0xfe,0x6c,0x7c,0x0b,0xfe,0x00,0x00]
+# W32-REAL16: v_cmp_ge_i16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x6c,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-REAL16: v_cmp_ge_i16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x6c,0x7c,0x0b,0xfe,0x00,0x00]
+# W32-FAKE16: v_cmp_ge_i16_e32 vcc_lo, 0xfe0b, v127   ; encoding: [0xff,0xfe,0x6c,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-FAKE16: v_cmp_ge_i16_e32 vcc, 0xfe0b, v127      ; encoding: [0xff,0xfe,0x6c,0x7c,0x0b,0xfe,0x00,0x00]
+
+0x81,0x05,0x6c,0x7c
+# W32-REAL16: v_cmp_ge_i16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x6c,0x7c]
+# W64-REAL16: v_cmp_ge_i16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x6c,0x7c]
+# W32-FAKE16: v_cmp_ge_i16_e32 vcc_lo, v129/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0x81,0x05,0x6c,0x7c]
+# W64-FAKE16: v_cmp_ge_i16_e32 vcc, v129/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0x81,0x05,0x6c,0x7c]
+
+0xff,0x05,0x6c,0x7c
+# W32-REAL16: v_cmp_ge_i16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x6c,0x7c]
+# W64-REAL16: v_cmp_ge_i16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x6c,0x7c]
+# W32-FAKE16: v_cmp_ge_i16_e32 vcc_lo, v255/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0xff,0x05,0x6c,0x7c]
+# W64-FAKE16: v_cmp_ge_i16_e32 vcc, v255/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0xff,0x05,0x6c,0x7c]
+
+0xfd,0x04,0x6d,0x7c
+# W32-REAL16: v_cmp_ge_i16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x6d,0x7c]
+# W64-REAL16: v_cmp_ge_i16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x6d,0x7c]
+# W32-FAKE16: v_cmp_ge_i16_e32 vcc_lo, src_scc, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xfd,0x04,0x6d,0x7c]
+# W64-FAKE16: v_cmp_ge_i16_e32 vcc, src_scc, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xfd,0x04,0x6d,0x7c]
+
+0xff,0xfe,0x6d,0x7c,0x0b,0xfe,0x00,0x00
+# W32-REAL16: v_cmp_ge_i16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x6d,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-REAL16: v_cmp_ge_i16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x6d,0x7c,0x0b,0xfe,0x00,0x00]
+# W32-FAKE16: v_cmp_ge_i16_e32 vcc_lo, 0xfe0b, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xff,0xfe,0x6d,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-FAKE16: v_cmp_ge_i16_e32 vcc, 0xfe0b, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xff,0xfe,0x6d,0x7c,0x0b,0xfe,0x00,0x00]
 
 0x01,0x05,0x8c,0x7c
 # W32: v_cmp_ge_i32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x8c,0x7c]
@@ -1013,64 +1175,118 @@
 # W64: v_cmp_ge_i64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xad,0x7c,0x56,0x34,0x12,0xaf]
 
 0x01,0x05,0x7c,0x7c
-# W32: v_cmp_ge_u16_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x7c,0x7c]
-# W64: v_cmp_ge_u16_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x7c,0x7c]
+# W32-REAL16: v_cmp_ge_u16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x7c,0x7c]
+# W64-REAL16: v_cmp_ge_u16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x7c,0x7c]
+# W32-FAKE16: v_cmp_ge_u16_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x7c,0x7c]
+# W64-FAKE16: v_cmp_ge_u16_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x7c,0x7c]
 
 0x7f,0x05,0x7c,0x7c
-# W32: v_cmp_ge_u16_e32 vcc_lo, v127, v2       ; encoding: [0x7f,0x05,0x7c,0x7c]
-# W64: v_cmp_ge_u16_e32 vcc, v127, v2          ; encoding: [0x7f,0x05,0x7c,0x7c]
+# W32-REAL16: v_cmp_ge_u16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x7c,0x7c]
+# W64-REAL16: v_cmp_ge_u16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x7c,0x7c]
+# W32-FAKE16: v_cmp_ge_u16_e32 vcc_lo, v127, v2       ; encoding: [0x7f,0x05,0x7c,0x7c]
+# W64-FAKE16: v_cmp_ge_u16_e32 vcc, v127, v2          ; encoding: [0x7f,0x05,0x7c,0x7c]
 
 0x01,0x04,0x7c,0x7c
-# W32: v_cmp_ge_u16_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x7c,0x7c]
-# W64: v_cmp_ge_u16_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x7c,0x7c]
+# W32-REAL16: v_cmp_ge_u16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x7c,0x7c]
+# W64-REAL16: v_cmp_ge_u16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x7c,0x7c]
+# W32-FAKE16: v_cmp_ge_u16_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x7c,0x7c]
+# W64-FAKE16: v_cmp_ge_u16_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x7c,0x7c]
 
 0x69,0x04,0x7c,0x7c
-# W32: v_cmp_ge_u16_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x7c,0x7c]
-# W64: v_cmp_ge_u16_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x7c,0x7c]
+# W32-REAL16: v_cmp_ge_u16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x7c,0x7c]
+# W64-REAL16: v_cmp_ge_u16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x7c,0x7c]
+# W32-FAKE16: v_cmp_ge_u16_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x7c,0x7c]
+# W64-FAKE16: v_cmp_ge_u16_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x7c,0x7c]
 
 0x6a,0x04,0x7c,0x7c
-# W32: v_cmp_ge_u16_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x7c,0x7c]
-# W64: v_cmp_ge_u16_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x7c,0x7c]
+# W32-REAL16: v_cmp_ge_u16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x7c,0x7c]
+# W64-REAL16: v_cmp_ge_u16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x7c,0x7c]
+# W32-FAKE16: v_cmp_ge_u16_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x7c,0x7c]
+# W64-FAKE16: v_cmp_ge_u16_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x7c,0x7c]
 
 0x6b,0x04,0x7c,0x7c
-# W32: v_cmp_ge_u16_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x7c,0x7c]
-# W64: v_cmp_ge_u16_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x7c,0x7c]
+# W32-REAL16: v_cmp_ge_u16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x7c,0x7c]
+# W64-REAL16: v_cmp_ge_u16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x7c,0x7c]
+# W32-FAKE16: v_cmp_ge_u16_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x7c,0x7c]
+# W64-FAKE16: v_cmp_ge_u16_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x7c,0x7c]
 
 0x7b,0x04,0x7c,0x7c
-# W32: v_cmp_ge_u16_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x7c,0x7c]
-# W64: v_cmp_ge_u16_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x7c,0x7c]
+# W32-REAL16: v_cmp_ge_u16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x7c,0x7c]
+# W64-REAL16: v_cmp_ge_u16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x7c,0x7c]
+# W32-FAKE16: v_cmp_ge_u16_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x7c,0x7c]
+# W64-FAKE16: v_cmp_ge_u16_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x7c,0x7c]
 
 0x7d,0x04,0x7c,0x7c
-# W32: v_cmp_ge_u16_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x7c,0x7c]
-# W64: v_cmp_ge_u16_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x7c,0x7c]
+# W32-REAL16: v_cmp_ge_u16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x7c,0x7c]
+# W64-REAL16: v_cmp_ge_u16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x7c,0x7c]
+# W32-FAKE16: v_cmp_ge_u16_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x7c,0x7c]
+# W64-FAKE16: v_cmp_ge_u16_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x7c,0x7c]
 
 0x7e,0x04,0x7c,0x7c
-# W32: v_cmp_ge_u16_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x7c,0x7c]
-# W64: v_cmp_ge_u16_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x7c,0x7c]
+# W32-REAL16: v_cmp_ge_u16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x7c,0x7c]
+# W64-REAL16: v_cmp_ge_u16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x7c,0x7c]
+# W32-FAKE16: v_cmp_ge_u16_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x7c,0x7c]
+# W64-FAKE16: v_cmp_ge_u16_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x7c,0x7c]
 
 0x7f,0x04,0x7c,0x7c
-# W32: v_cmp_ge_u16_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x7c,0x7c]
-# W64: v_cmp_ge_u16_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x7c,0x7c]
+# W32-REAL16: v_cmp_ge_u16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x7c,0x7c]
+# W64-REAL16: v_cmp_ge_u16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x7c,0x7c]
+# W32-FAKE16: v_cmp_ge_u16_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x7c,0x7c]
+# W64-FAKE16: v_cmp_ge_u16_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x7c,0x7c]
 
 0x7c,0x04,0x7c,0x7c
-# W32: v_cmp_ge_u16_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x7c,0x7c]
-# W64: v_cmp_ge_u16_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x7c,0x7c]
+# W32-REAL16: v_cmp_ge_u16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x7c,0x7c]
+# W64-REAL16: v_cmp_ge_u16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x7c,0x7c]
+# W32-FAKE16: v_cmp_ge_u16_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x7c,0x7c]
+# W64-FAKE16: v_cmp_ge_u16_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x7c,0x7c]
 
 0xc1,0x04,0x7c,0x7c
-# W32: v_cmp_ge_u16_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x7c,0x7c]
-# W64: v_cmp_ge_u16_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x7c,0x7c]
+# W32-REAL16: v_cmp_ge_u16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x7c,0x7c]
+# W64-REAL16: v_cmp_ge_u16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x7c,0x7c]
+# W32-FAKE16: v_cmp_ge_u16_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x7c,0x7c]
+# W64-FAKE16: v_cmp_ge_u16_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x7c,0x7c]
 
 0xf0,0x04,0x7c,0x7c
-# W32: v_cmp_ge_u16_e32 vcc_lo, 0x3800, v2     ; encoding: [0xff,0x04,0x7c,0x7c,0x00,0x38,0x00,0x00]
-# W64: v_cmp_ge_u16_e32 vcc, 0x3800, v2        ; encoding: [0xff,0x04,0x7c,0x7c,0x00,0x38,0x00,0x00]
+# W32-REAL16: v_cmp_ge_u16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x7c,0x7c,0x00,0x38,0x00,0x00]
+# W64-REAL16: v_cmp_ge_u16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x7c,0x7c,0x00,0x38,0x00,0x00]
+# W32-FAKE16: v_cmp_ge_u16_e32 vcc_lo, 0x3800, v2     ; encoding: [0xff,0x04,0x7c,0x7c,0x00,0x38,0x00,0x00]
+# W64-FAKE16: v_cmp_ge_u16_e32 vcc, 0x3800, v2        ; encoding: [0xff,0x04,0x7c,0x7c,0x00,0x38,0x00,0x00]
 
 0xfd,0x04,0x7c,0x7c
-# W32: v_cmp_ge_u16_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x7c,0x7c]
-# W64: v_cmp_ge_u16_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x7c,0x7c]
+# W32-REAL16: v_cmp_ge_u16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x7c,0x7c]
+# W64-REAL16: v_cmp_ge_u16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x7c,0x7c]
+# W32-FAKE16: v_cmp_ge_u16_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x7c,0x7c]
+# W64-FAKE16: v_cmp_ge_u16_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x7c,0x7c]
 
 0xff,0xfe,0x7c,0x7c,0x0b,0xfe,0x00,0x00
-# W32: v_cmp_ge_u16_e32 vcc_lo, 0xfe0b, v127   ; encoding: [0xff,0xfe,0x7c,0x7c,0x0b,0xfe,0x00,0x00]
-# W64: v_cmp_ge_u16_e32 vcc, 0xfe0b, v127      ; encoding: [0xff,0xfe,0x7c,0x7c,0x0b,0xfe,0x00,0x00]
+# W32-REAL16: v_cmp_ge_u16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x7c,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-REAL16: v_cmp_ge_u16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x7c,0x7c,0x0b,0xfe,0x00,0x00]
+# W32-FAKE16: v_cmp_ge_u16_e32 vcc_lo, 0xfe0b, v127   ; encoding: [0xff,0xfe,0x7c,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-FAKE16: v_cmp_ge_u16_e32 vcc, 0xfe0b, v127      ; encoding: [0xff,0xfe,0x7c,0x7c,0x0b,0xfe,0x00,0x00]
+
+0x81,0x05,0x7c,0x7c
+# W32-REAL16: v_cmp_ge_u16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x7c,0x7c]
+# W64-REAL16: v_cmp_ge_u16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x7c,0x7c]
+# W32-FAKE16: v_cmp_ge_u16_e32 vcc_lo, v129/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0x81,0x05,0x7c,0x7c]
+# W64-FAKE16: v_cmp_ge_u16_e32 vcc, v129/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0x81,0x05,0x7c,0x7c]
+
+0xff,0x05,0x7c,0x7c
+# W32-REAL16: v_cmp_ge_u16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x7c,0x7c]
+# W64-REAL16: v_cmp_ge_u16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x7c,0x7c]
+# W32-FAKE16: v_cmp_ge_u16_e32 vcc_lo, v255/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0xff,0x05,0x7c,0x7c]
+# W64-FAKE16: v_cmp_ge_u16_e32 vcc, v255/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0xff,0x05,0x7c,0x7c]
+
+0xfd,0x04,0x7d,0x7c
+# W32-REAL16: v_cmp_ge_u16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x7d,0x7c]
+# W64-REAL16: v_cmp_ge_u16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x7d,0x7c]
+# W32-FAKE16: v_cmp_ge_u16_e32 vcc_lo, src_scc, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xfd,0x04,0x7d,0x7c]
+# W64-FAKE16: v_cmp_ge_u16_e32 vcc, src_scc, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xfd,0x04,0x7d,0x7c]
+
+0xff,0xfe,0x7d,0x7c,0x0b,0xfe,0x00,0x00
+# W32-REAL16: v_cmp_ge_u16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x7d,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-REAL16: v_cmp_ge_u16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x7d,0x7c,0x0b,0xfe,0x00,0x00]
+# W32-FAKE16: v_cmp_ge_u16_e32 vcc_lo, 0xfe0b, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xff,0xfe,0x7d,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-FAKE16: v_cmp_ge_u16_e32 vcc, 0xfe0b, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xff,0xfe,0x7d,0x7c,0x0b,0xfe,0x00,0x00]
 
 0x01,0x05,0x9c,0x7c
 # W32: v_cmp_ge_u32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x9c,0x7c]
@@ -1349,64 +1565,118 @@
 # W64: v_cmp_gt_f64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x49,0x7c,0x56,0x34,0x12,0xaf]
 
 0x01,0x05,0x68,0x7c
-# W32: v_cmp_gt_i16_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x68,0x7c]
-# W64: v_cmp_gt_i16_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x68,0x7c]
+# W32-REAL16: v_cmp_gt_i16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x68,0x7c]
+# W64-REAL16: v_cmp_gt_i16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x68,0x7c]
+# W32-FAKE16: v_cmp_gt_i16_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x68,0x7c]
+# W64-FAKE16: v_cmp_gt_i16_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x68,0x7c]
 
 0x7f,0x05,0x68,0x7c
-# W32: v_cmp_gt_i16_e32 vcc_lo, v127, v2       ; encoding: [0x7f,0x05,0x68,0x7c]
-# W64: v_cmp_gt_i16_e32 vcc, v127, v2          ; encoding: [0x7f,0x05,0x68,0x7c]
+# W32-REAL16: v_cmp_gt_i16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x68,0x7c]
+# W64-REAL16: v_cmp_gt_i16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x68,0x7c]
+# W32-FAKE16: v_cmp_gt_i16_e32 vcc_lo, v127, v2       ; encoding: [0x7f,0x05,0x68,0x7c]
+# W64-FAKE16: v_cmp_gt_i16_e32 vcc, v127, v2          ; encoding: [0x7f,0x05,0x68,0x7c]
 
 0x01,0x04,0x68,0x7c
-# W32: v_cmp_gt_i16_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x68,0x7c]
-# W64: v_cmp_gt_i16_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x68,0x7c]
+# W32-REAL16: v_cmp_gt_i16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x68,0x7c]
+# W64-REAL16: v_cmp_gt_i16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x68,0x7c]
+# W32-FAKE16: v_cmp_gt_i16_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x68,0x7c]
+# W64-FAKE16: v_cmp_gt_i16_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x68,0x7c]
 
 0x69,0x04,0x68,0x7c
-# W32: v_cmp_gt_i16_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x68,0x7c]
-# W64: v_cmp_gt_i16_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x68,0x7c]
+# W32-REAL16: v_cmp_gt_i16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x68,0x7c]
+# W64-REAL16: v_cmp_gt_i16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x68,0x7c]
+# W32-FAKE16: v_cmp_gt_i16_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x68,0x7c]
+# W64-FAKE16: v_cmp_gt_i16_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x68,0x7c]
 
 0x6a,0x04,0x68,0x7c
-# W32: v_cmp_gt_i16_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x68,0x7c]
-# W64: v_cmp_gt_i16_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x68,0x7c]
+# W32-REAL16: v_cmp_gt_i16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x68,0x7c]
+# W64-REAL16: v_cmp_gt_i16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x68,0x7c]
+# W32-FAKE16: v_cmp_gt_i16_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x68,0x7c]
+# W64-FAKE16: v_cmp_gt_i16_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x68,0x7c]
 
 0x6b,0x04,0x68,0x7c
-# W32: v_cmp_gt_i16_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x68,0x7c]
-# W64: v_cmp_gt_i16_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x68,0x7c]
+# W32-REAL16: v_cmp_gt_i16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x68,0x7c]
+# W64-REAL16: v_cmp_gt_i16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x68,0x7c]
+# W32-FAKE16: v_cmp_gt_i16_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x68,0x7c]
+# W64-FAKE16: v_cmp_gt_i16_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x68,0x7c]
 
 0x7b,0x04,0x68,0x7c
-# W32: v_cmp_gt_i16_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x68,0x7c]
-# W64: v_cmp_gt_i16_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x68,0x7c]
+# W32-REAL16: v_cmp_gt_i16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x68,0x7c]
+# W64-REAL16: v_cmp_gt_i16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x68,0x7c]
+# W32-FAKE16: v_cmp_gt_i16_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x68,0x7c]
+# W64-FAKE16: v_cmp_gt_i16_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x68,0x7c]
 
 0x7d,0x04,0x68,0x7c
-# W32: v_cmp_gt_i16_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x68,0x7c]
-# W64: v_cmp_gt_i16_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x68,0x7c]
+# W32-REAL16: v_cmp_gt_i16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x68,0x7c]
+# W64-REAL16: v_cmp_gt_i16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x68,0x7c]
+# W32-FAKE16: v_cmp_gt_i16_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x68,0x7c]
+# W64-FAKE16: v_cmp_gt_i16_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x68,0x7c]
 
 0x7e,0x04,0x68,0x7c
-# W32: v_cmp_gt_i16_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x68,0x7c]
-# W64: v_cmp_gt_i16_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x68,0x7c]
+# W32-REAL16: v_cmp_gt_i16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x68,0x7c]
+# W64-REAL16: v_cmp_gt_i16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x68,0x7c]
+# W32-FAKE16: v_cmp_gt_i16_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x68,0x7c]
+# W64-FAKE16: v_cmp_gt_i16_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x68,0x7c]
 
 0x7f,0x04,0x68,0x7c
-# W32: v_cmp_gt_i16_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x68,0x7c]
-# W64: v_cmp_gt_i16_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x68,0x7c]
+# W32-REAL16: v_cmp_gt_i16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x68,0x7c]
+# W64-REAL16: v_cmp_gt_i16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x68,0x7c]
+# W32-FAKE16: v_cmp_gt_i16_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x68,0x7c]
+# W64-FAKE16: v_cmp_gt_i16_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x68,0x7c]
 
 0x7c,0x04,0x68,0x7c
-# W32: v_cmp_gt_i16_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x68,0x7c]
-# W64: v_cmp_gt_i16_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x68,0x7c]
+# W32-REAL16: v_cmp_gt_i16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x68,0x7c]
+# W64-REAL16: v_cmp_gt_i16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x68,0x7c]
+# W32-FAKE16: v_cmp_gt_i16_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x68,0x7c]
+# W64-FAKE16: v_cmp_gt_i16_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x68,0x7c]
 
 0xc1,0x04,0x68,0x7c
-# W32: v_cmp_gt_i16_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x68,0x7c]
-# W64: v_cmp_gt_i16_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x68,0x7c]
+# W32-REAL16: v_cmp_gt_i16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x68,0x7c]
+# W64-REAL16: v_cmp_gt_i16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x68,0x7c]
+# W32-FAKE16: v_cmp_gt_i16_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x68,0x7c]
+# W64-FAKE16: v_cmp_gt_i16_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x68,0x7c]
 
 0xf0,0x04,0x68,0x7c
-# W32: v_cmp_gt_i16_e32 vcc_lo, 0x3800, v2     ; encoding: [0xff,0x04,0x68,0x7c,0x00,0x38,0x00,0x00]
-# W64: v_cmp_gt_i16_e32 vcc, 0x3800, v2        ; encoding: [0xff,0x04,0x68,0x7c,0x00,0x38,0x00,0x00]
+# W32-REAL16: v_cmp_gt_i16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x68,0x7c,0x00,0x38,0x00,0x00]
+# W64-REAL16: v_cmp_gt_i16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x68,0x7c,0x00,0x38,0x00,0x00]
+# W32-FAKE16: v_cmp_gt_i16_e32 vcc_lo, 0x3800, v2     ; encoding: [0xff,0x04,0x68,0x7c,0x00,0x38,0x00,0x00]
+# W64-FAKE16: v_cmp_gt_i16_e32 vcc, 0x3800, v2        ; encoding: [0xff,0x04,0x68,0x7c,0x00,0x38,0x00,0x00]
 
 0xfd,0x04,0x68,0x7c
-# W32: v_cmp_gt_i16_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x68,0x7c]
-# W64: v_cmp_gt_i16_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x68,0x7c]
+# W32-REAL16: v_cmp_gt_i16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x68,0x7c]
+# W64-REAL16: v_cmp_gt_i16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x68,0x7c]
+# W32-FAKE16: v_cmp_gt_i16_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x68,0x7c]
+# W64-FAKE16: v_cmp_gt_i16_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x68,0x7c]
 
 0xff,0xfe,0x68,0x7c,0x0b,0xfe,0x00,0x00
-# W32: v_cmp_gt_i16_e32 vcc_lo, 0xfe0b, v127   ; encoding: [0xff,0xfe,0x68,0x7c,0x0b,0xfe,0x00,0x00]
-# W64: v_cmp_gt_i16_e32 vcc, 0xfe0b, v127      ; encoding: [0xff,0xfe,0x68,0x7c,0x0b,0xfe,0x00,0x00]
+# W32-REAL16: v_cmp_gt_i16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x68,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-REAL16: v_cmp_gt_i16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x68,0x7c,0x0b,0xfe,0x00,0x00]
+# W32-FAKE16: v_cmp_gt_i16_e32 vcc_lo, 0xfe0b, v127   ; encoding: [0xff,0xfe,0x68,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-FAKE16: v_cmp_gt_i16_e32 vcc, 0xfe0b, v127      ; encoding: [0xff,0xfe,0x68,0x7c,0x0b,0xfe,0x00,0x00]
+
+0x81,0x05,0x68,0x7c
+# W32-REAL16: v_cmp_gt_i16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x68,0x7c]
+# W64-REAL16: v_cmp_gt_i16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x68,0x7c]
+# W32-FAKE16: v_cmp_gt_i16_e32 vcc_lo, v129/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0x81,0x05,0x68,0x7c]
+# W64-FAKE16: v_cmp_gt_i16_e32 vcc, v129/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0x81,0x05,0x68,0x7c]
+
+0xff,0x05,0x68,0x7c
+# W32-REAL16: v_cmp_gt_i16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x68,0x7c]
+# W64-REAL16: v_cmp_gt_i16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x68,0x7c]
+# W32-FAKE16: v_cmp_gt_i16_e32 vcc_lo, v255/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0xff,0x05,0x68,0x7c]
+# W64-FAKE16: v_cmp_gt_i16_e32 vcc, v255/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0xff,0x05,0x68,0x7c]
+
+0xfd,0x04,0x69,0x7c
+# W32-REAL16: v_cmp_gt_i16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x69,0x7c]
+# W64-REAL16: v_cmp_gt_i16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x69,0x7c]
+# W32-FAKE16: v_cmp_gt_i16_e32 vcc_lo, src_scc, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xfd,0x04,0x69,0x7c]
+# W64-FAKE16: v_cmp_gt_i16_e32 vcc, src_scc, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xfd,0x04,0x69,0x7c]
+
+0xff,0xfe,0x69,0x7c,0x0b,0xfe,0x00,0x00
+# W32-REAL16: v_cmp_gt_i16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x69,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-REAL16: v_cmp_gt_i16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x69,0x7c,0x0b,0xfe,0x00,0x00]
+# W32-FAKE16: v_cmp_gt_i16_e32 vcc_lo, 0xfe0b, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xff,0xfe,0x69,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-FAKE16: v_cmp_gt_i16_e32 vcc, 0xfe0b, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xff,0xfe,0x69,0x7c,0x0b,0xfe,0x00,0x00]
 
 0x01,0x05,0x88,0x7c
 # W32: v_cmp_gt_i32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x88,0x7c]
@@ -1517,64 +1787,118 @@
 # W64: v_cmp_gt_i64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xa9,0x7c,0x56,0x34,0x12,0xaf]
 
 0x01,0x05,0x78,0x7c
-# W32: v_cmp_gt_u16_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x78,0x7c]
-# W64: v_cmp_gt_u16_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x78,0x7c]
+# W32-REAL16: v_cmp_gt_u16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x78,0x7c]
+# W64-REAL16: v_cmp_gt_u16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x78,0x7c]
+# W32-FAKE16: v_cmp_gt_u16_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x78,0x7c]
+# W64-FAKE16: v_cmp_gt_u16_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x78,0x7c]
 
 0x7f,0x05,0x78,0x7c
-# W32: v_cmp_gt_u16_e32 vcc_lo, v127, v2       ; encoding: [0x7f,0x05,0x78,0x7c]
-# W64: v_cmp_gt_u16_e32 vcc, v127, v2          ; encoding: [0x7f,0x05,0x78,0x7c]
+# W32-REAL16: v_cmp_gt_u16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x78,0x7c]
+# W64-REAL16: v_cmp_gt_u16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x78,0x7c]
+# W32-FAKE16: v_cmp_gt_u16_e32 vcc_lo, v127, v2       ; encoding: [0x7f,0x05,0x78,0x7c]
+# W64-FAKE16: v_cmp_gt_u16_e32 vcc, v127, v2          ; encoding: [0x7f,0x05,0x78,0x7c]
 
 0x01,0x04,0x78,0x7c
-# W32: v_cmp_gt_u16_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x78,0x7c]
-# W64: v_cmp_gt_u16_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x78,0x7c]
+# W32-REAL16: v_cmp_gt_u16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x78,0x7c]
+# W64-REAL16: v_cmp_gt_u16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x78,0x7c]
+# W32-FAKE16: v_cmp_gt_u16_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x78,0x7c]
+# W64-FAKE16: v_cmp_gt_u16_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x78,0x7c]
 
 0x69,0x04,0x78,0x7c
-# W32: v_cmp_gt_u16_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x78,0x7c]
-# W64: v_cmp_gt_u16_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x78,0x7c]
+# W32-REAL16: v_cmp_gt_u16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x78,0x7c]
+# W64-REAL16: v_cmp_gt_u16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x78,0x7c]
+# W32-FAKE16: v_cmp_gt_u16_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x78,0x7c]
+# W64-FAKE16: v_cmp_gt_u16_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x78,0x7c]
 
 0x6a,0x04,0x78,0x7c
-# W32: v_cmp_gt_u16_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x78,0x7c]
-# W64: v_cmp_gt_u16_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x78,0x7c]
+# W32-REAL16: v_cmp_gt_u16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x78,0x7c]
+# W64-REAL16: v_cmp_gt_u16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x78,0x7c]
+# W32-FAKE16: v_cmp_gt_u16_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x78,0x7c]
+# W64-FAKE16: v_cmp_gt_u16_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x78,0x7c]
 
 0x6b,0x04,0x78,0x7c
-# W32: v_cmp_gt_u16_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x78,0x7c]
-# W64: v_cmp_gt_u16_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x78,0x7c]
+# W32-REAL16: v_cmp_gt_u16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x78,0x7c]
+# W64-REAL16: v_cmp_gt_u16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x78,0x7c]
+# W32-FAKE16: v_cmp_gt_u16_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x78,0x7c]
+# W64-FAKE16: v_cmp_gt_u16_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x78,0x7c]
 
 0x7b,0x04,0x78,0x7c
-# W32: v_cmp_gt_u16_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x78,0x7c]
-# W64: v_cmp_gt_u16_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x78,0x7c]
+# W32-REAL16: v_cmp_gt_u16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x78,0x7c]
+# W64-REAL16: v_cmp_gt_u16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x78,0x7c]
+# W32-FAKE16: v_cmp_gt_u16_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x78,0x7c]
+# W64-FAKE16: v_cmp_gt_u16_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x78,0x7c]
 
 0x7d,0x04,0x78,0x7c
-# W32: v_cmp_gt_u16_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x78,0x7c]
-# W64: v_cmp_gt_u16_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x78,0x7c]
+# W32-REAL16: v_cmp_gt_u16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x78,0x7c]
+# W64-REAL16: v_cmp_gt_u16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x78,0x7c]
+# W32-FAKE16: v_cmp_gt_u16_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x78,0x7c]
+# W64-FAKE16: v_cmp_gt_u16_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x78,0x7c]
 
 0x7e,0x04,0x78,0x7c
-# W32: v_cmp_gt_u16_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x78,0x7c]
-# W64: v_cmp_gt_u16_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x78,0x7c]
+# W32-REAL16: v_cmp_gt_u16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x78,0x7c]
+# W64-REAL16: v_cmp_gt_u16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x78,0x7c]
+# W32-FAKE16: v_cmp_gt_u16_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x78,0x7c]
+# W64-FAKE16: v_cmp_gt_u16_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x78,0x7c]
 
 0x7f,0x04,0x78,0x7c
-# W32: v_cmp_gt_u16_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x78,0x7c]
-# W64: v_cmp_gt_u16_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x78,0x7c]
+# W32-REAL16: v_cmp_gt_u16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x78,0x7c]
+# W64-REAL16: v_cmp_gt_u16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x78,0x7c]
+# W32-FAKE16: v_cmp_gt_u16_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x78,0x7c]
+# W64-FAKE16: v_cmp_gt_u16_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x78,0x7c]
 
 0x7c,0x04,0x78,0x7c
-# W32: v_cmp_gt_u16_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x78,0x7c]
-# W64: v_cmp_gt_u16_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x78,0x7c]
+# W32-REAL16: v_cmp_gt_u16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x78,0x7c]
+# W64-REAL16: v_cmp_gt_u16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x78,0x7c]
+# W32-FAKE16: v_cmp_gt_u16_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x78,0x7c]
+# W64-FAKE16: v_cmp_gt_u16_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x78,0x7c]
 
 0xc1,0x04,0x78,0x7c
-# W32: v_cmp_gt_u16_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x78,0x7c]
-# W64: v_cmp_gt_u16_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x78,0x7c]
+# W32-REAL16: v_cmp_gt_u16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x78,0x7c]
+# W64-REAL16: v_cmp_gt_u16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x78,0x7c]
+# W32-FAKE16: v_cmp_gt_u16_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x78,0x7c]
+# W64-FAKE16: v_cmp_gt_u16_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x78,0x7c]
 
 0xf0,0x04,0x78,0x7c
-# W32: v_cmp_gt_u16_e32 vcc_lo, 0x3800, v2     ; encoding: [0xff,0x04,0x78,0x7c,0x00,0x38,0x00,0x00]
-# W64: v_cmp_gt_u16_e32 vcc, 0x3800, v2        ; encoding: [0xff,0x04,0x78,0x7c,0x00,0x38,0x00,0x00]
+# W32-REAL16: v_cmp_gt_u16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x78,0x7c,0x00,0x38,0x00,0x00]
+# W64-REAL16: v_cmp_gt_u16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x78,0x7c,0x00,0x38,0x00,0x00]
+# W32-FAKE16: v_cmp_gt_u16_e32 vcc_lo, 0x3800, v2     ; encoding: [0xff,0x04,0x78,0x7c,0x00,0x38,0x00,0x00]
+# W64-FAKE16: v_cmp_gt_u16_e32 vcc, 0x3800, v2        ; encoding: [0xff,0x04,0x78,0x7c,0x00,0x38,0x00,0x00]
 
 0xfd,0x04,0x78,0x7c
-# W32: v_cmp_gt_u16_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x78,0x7c]
-# W64: v_cmp_gt_u16_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x78,0x7c]
+# W32-REAL16: v_cmp_gt_u16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x78,0x7c]
+# W64-REAL16: v_cmp_gt_u16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x78,0x7c]
+# W32-FAKE16: v_cmp_gt_u16_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x78,0x7c]
+# W64-FAKE16: v_cmp_gt_u16_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x78,0x7c]
 
 0xff,0xfe,0x78,0x7c,0x0b,0xfe,0x00,0x00
-# W32: v_cmp_gt_u16_e32 vcc_lo, 0xfe0b, v127   ; encoding: [0xff,0xfe,0x78,0x7c,0x0b,0xfe,0x00,0x00]
-# W64: v_cmp_gt_u16_e32 vcc, 0xfe0b, v127      ; encoding: [0xff,0xfe,0x78,0x7c,0x0b,0xfe,0x00,0x00]
+# W32-REAL16: v_cmp_gt_u16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x78,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-REAL16: v_cmp_gt_u16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x78,0x7c,0x0b,0xfe,0x00,0x00]
+# W32-FAKE16: v_cmp_gt_u16_e32 vcc_lo, 0xfe0b, v127   ; encoding: [0xff,0xfe,0x78,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-FAKE16: v_cmp_gt_u16_e32 vcc, 0xfe0b, v127      ; encoding: [0xff,0xfe,0x78,0x7c,0x0b,0xfe,0x00,0x00]
+
+0x81,0x05,0x78,0x7c
+# W32-REAL16: v_cmp_gt_u16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x78,0x7c]
+# W64-REAL16: v_cmp_gt_u16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x78,0x7c]
+# W32-FAKE16: v_cmp_gt_u16_e32 vcc_lo, v129/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0x81,0x05,0x78,0x7c]
+# W64-FAKE16: v_cmp_gt_u16_e32 vcc, v129/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0x81,0x05,0x78,0x7c]
+
+0xff,0x05,0x78,0x7c
+# W32-REAL16: v_cmp_gt_u16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x78,0x7c]
+# W64-REAL16: v_cmp_gt_u16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x78,0x7c]
+# W32-FAKE16: v_cmp_gt_u16_e32 vcc_lo, v255/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0xff,0x05,0x78,0x7c]
+# W64-FAKE16: v_cmp_gt_u16_e32 vcc, v255/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0xff,0x05,0x78,0x7c]
+
+0xfd,0x04,0x79,0x7c
+# W32-REAL16: v_cmp_gt_u16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x79,0x7c]
+# W64-REAL16: v_cmp_gt_u16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x79,0x7c]
+# W32-FAKE16: v_cmp_gt_u16_e32 vcc_lo, src_scc, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xfd,0x04,0x79,0x7c]
+# W64-FAKE16: v_cmp_gt_u16_e32 vcc, src_scc, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xfd,0x04,0x79,0x7c]
+
+0xff,0xfe,0x79,0x7c,0x0b,0xfe,0x00,0x00
+# W32-REAL16: v_cmp_gt_u16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x79,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-REAL16: v_cmp_gt_u16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x79,0x7c,0x0b,0xfe,0x00,0x00]
+# W32-FAKE16: v_cmp_gt_u16_e32 vcc_lo, 0xfe0b, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xff,0xfe,0x79,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-FAKE16: v_cmp_gt_u16_e32 vcc, 0xfe0b, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xff,0xfe,0x79,0x7c,0x0b,0xfe,0x00,0x00]
 
 0x01,0x05,0x98,0x7c
 # W32: v_cmp_gt_u32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x98,0x7c]
@@ -1853,64 +2177,118 @@
 # W64: v_cmp_le_f64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x47,0x7c,0x56,0x34,0x12,0xaf]
 
 0x01,0x05,0x66,0x7c
-# W32: v_cmp_le_i16_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x66,0x7c]
-# W64: v_cmp_le_i16_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x66,0x7c]
+# W32-REAL16: v_cmp_le_i16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x66,0x7c]
+# W64-REAL16: v_cmp_le_i16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x66,0x7c]
+# W32-FAKE16: v_cmp_le_i16_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x66,0x7c]
+# W64-FAKE16: v_cmp_le_i16_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x66,0x7c]
 
 0x7f,0x05,0x66,0x7c
-# W32: v_cmp_le_i16_e32 vcc_lo, v127, v2       ; encoding: [0x7f,0x05,0x66,0x7c]
-# W64: v_cmp_le_i16_e32 vcc, v127, v2          ; encoding: [0x7f,0x05,0x66,0x7c]
+# W32-REAL16: v_cmp_le_i16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x66,0x7c]
+# W64-REAL16: v_cmp_le_i16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x66,0x7c]
+# W32-FAKE16: v_cmp_le_i16_e32 vcc_lo, v127, v2       ; encoding: [0x7f,0x05,0x66,0x7c]
+# W64-FAKE16: v_cmp_le_i16_e32 vcc, v127, v2          ; encoding: [0x7f,0x05,0x66,0x7c]
 
 0x01,0x04,0x66,0x7c
-# W32: v_cmp_le_i16_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x66,0x7c]
-# W64: v_cmp_le_i16_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x66,0x7c]
+# W32-REAL16: v_cmp_le_i16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x66,0x7c]
+# W64-REAL16: v_cmp_le_i16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x66,0x7c]
+# W32-FAKE16: v_cmp_le_i16_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x66,0x7c]
+# W64-FAKE16: v_cmp_le_i16_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x66,0x7c]
 
 0x69,0x04,0x66,0x7c
-# W32: v_cmp_le_i16_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x66,0x7c]
-# W64: v_cmp_le_i16_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x66,0x7c]
+# W32-REAL16: v_cmp_le_i16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x66,0x7c]
+# W64-REAL16: v_cmp_le_i16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x66,0x7c]
+# W32-FAKE16: v_cmp_le_i16_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x66,0x7c]
+# W64-FAKE16: v_cmp_le_i16_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x66,0x7c]
 
 0x6a,0x04,0x66,0x7c
-# W32: v_cmp_le_i16_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x66,0x7c]
-# W64: v_cmp_le_i16_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x66,0x7c]
+# W32-REAL16: v_cmp_le_i16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x66,0x7c]
+# W64-REAL16: v_cmp_le_i16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x66,0x7c]
+# W32-FAKE16: v_cmp_le_i16_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x66,0x7c]
+# W64-FAKE16: v_cmp_le_i16_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x66,0x7c]
 
 0x6b,0x04,0x66,0x7c
-# W32: v_cmp_le_i16_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x66,0x7c]
-# W64: v_cmp_le_i16_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x66,0x7c]
+# W32-REAL16: v_cmp_le_i16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x66,0x7c]
+# W64-REAL16: v_cmp_le_i16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x66,0x7c]
+# W32-FAKE16: v_cmp_le_i16_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x66,0x7c]
+# W64-FAKE16: v_cmp_le_i16_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x66,0x7c]
 
 0x7b,0x04,0x66,0x7c
-# W32: v_cmp_le_i16_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x66,0x7c]
-# W64: v_cmp_le_i16_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x66,0x7c]
+# W32-REAL16: v_cmp_le_i16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x66,0x7c]
+# W64-REAL16: v_cmp_le_i16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x66,0x7c]
+# W32-FAKE16: v_cmp_le_i16_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x66,0x7c]
+# W64-FAKE16: v_cmp_le_i16_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x66,0x7c]
 
 0x7d,0x04,0x66,0x7c
-# W32: v_cmp_le_i16_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x66,0x7c]
-# W64: v_cmp_le_i16_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x66,0x7c]
+# W32-REAL16: v_cmp_le_i16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x66,0x7c]
+# W64-REAL16: v_cmp_le_i16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x66,0x7c]
+# W32-FAKE16: v_cmp_le_i16_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x66,0x7c]
+# W64-FAKE16: v_cmp_le_i16_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x66,0x7c]
 
 0x7e,0x04,0x66,0x7c
-# W32: v_cmp_le_i16_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x66,0x7c]
-# W64: v_cmp_le_i16_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x66,0x7c]
+# W32-REAL16: v_cmp_le_i16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x66,0x7c]
+# W64-REAL16: v_cmp_le_i16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x66,0x7c]
+# W32-FAKE16: v_cmp_le_i16_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x66,0x7c]
+# W64-FAKE16: v_cmp_le_i16_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x66,0x7c]
 
 0x7f,0x04,0x66,0x7c
-# W32: v_cmp_le_i16_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x66,0x7c]
-# W64: v_cmp_le_i16_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x66,0x7c]
+# W32-REAL16: v_cmp_le_i16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x66,0x7c]
+# W64-REAL16: v_cmp_le_i16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x66,0x7c]
+# W32-FAKE16: v_cmp_le_i16_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x66,0x7c]
+# W64-FAKE16: v_cmp_le_i16_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x66,0x7c]
 
 0x7c,0x04,0x66,0x7c
-# W32: v_cmp_le_i16_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x66,0x7c]
-# W64: v_cmp_le_i16_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x66,0x7c]
+# W32-REAL16: v_cmp_le_i16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x66,0x7c]
+# W64-REAL16: v_cmp_le_i16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x66,0x7c]
+# W32-FAKE16: v_cmp_le_i16_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x66,0x7c]
+# W64-FAKE16: v_cmp_le_i16_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x66,0x7c]
 
 0xc1,0x04,0x66,0x7c
-# W32: v_cmp_le_i16_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x66,0x7c]
-# W64: v_cmp_le_i16_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x66,0x7c]
+# W32-REAL16: v_cmp_le_i16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x66,0x7c]
+# W64-REAL16: v_cmp_le_i16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x66,0x7c]
+# W32-FAKE16: v_cmp_le_i16_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x66,0x7c]
+# W64-FAKE16: v_cmp_le_i16_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x66,0x7c]
 
 0xf0,0x04,0x66,0x7c
-# W32: v_cmp_le_i16_e32 vcc_lo, 0x3800, v2     ; encoding: [0xff,0x04,0x66,0x7c,0x00,0x38,0x00,0x00]
-# W64: v_cmp_le_i16_e32 vcc, 0x3800, v2        ; encoding: [0xff,0x04,0x66,0x7c,0x00,0x38,0x00,0x00]
+# W32-REAL16: v_cmp_le_i16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x66,0x7c,0x00,0x38,0x00,0x00]
+# W64-REAL16: v_cmp_le_i16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x66,0x7c,0x00,0x38,0x00,0x00]
+# W32-FAKE16: v_cmp_le_i16_e32 vcc_lo, 0x3800, v2     ; encoding: [0xff,0x04,0x66,0x7c,0x00,0x38,0x00,0x00]
+# W64-FAKE16: v_cmp_le_i16_e32 vcc, 0x3800, v2        ; encoding: [0xff,0x04,0x66,0x7c,0x00,0x38,0x00,0x00]
 
 0xfd,0x04,0x66,0x7c
-# W32: v_cmp_le_i16_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x66,0x7c]
-# W64: v_cmp_le_i16_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x66,0x7c]
+# W32-REAL16: v_cmp_le_i16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x66,0x7c]
+# W64-REAL16: v_cmp_le_i16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x66,0x7c]
+# W32-FAKE16: v_cmp_le_i16_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x66,0x7c]
+# W64-FAKE16: v_cmp_le_i16_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x66,0x7c]
 
 0xff,0xfe,0x66,0x7c,0x0b,0xfe,0x00,0x00
-# W32: v_cmp_le_i16_e32 vcc_lo, 0xfe0b, v127   ; encoding: [0xff,0xfe,0x66,0x7c,0x0b,0xfe,0x00,0x00]
-# W64: v_cmp_le_i16_e32 vcc, 0xfe0b, v127      ; encoding: [0xff,0xfe,0x66,0x7c,0x0b,0xfe,0x00,0x00]
+# W32-REAL16: v_cmp_le_i16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x66,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-REAL16: v_cmp_le_i16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x66,0x7c,0x0b,0xfe,0x00,0x00]
+# W32-FAKE16: v_cmp_le_i16_e32 vcc_lo, 0xfe0b, v127   ; encoding: [0xff,0xfe,0x66,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-FAKE16: v_cmp_le_i16_e32 vcc, 0xfe0b, v127      ; encoding: [0xff,0xfe,0x66,0x7c,0x0b,0xfe,0x00,0x00]
+
+0x81,0x05,0x66,0x7c
+# W32-REAL16: v_cmp_le_i16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x66,0x7c]
+# W64-REAL16: v_cmp_le_i16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x66,0x7c]
+# W32-FAKE16: v_cmp_le_i16_e32 vcc_lo, v129/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0x81,0x05,0x66,0x7c]
+# W64-FAKE16: v_cmp_le_i16_e32 vcc, v129/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0x81,0x05,0x66,0x7c]
+
+0xff,0x05,0x66,0x7c
+# W32-REAL16: v_cmp_le_i16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x66,0x7c]
+# W64-REAL16: v_cmp_le_i16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x66,0x7c]
+# W32-FAKE16: v_cmp_le_i16_e32 vcc_lo, v255/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0xff,0x05,0x66,0x7c]
+# W64-FAKE16: v_cmp_le_i16_e32 vcc, v255/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0xff,0x05,0x66,0x7c]
+
+0xfd,0x04,0x67,0x7c
+# W32-REAL16: v_cmp_le_i16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x67,0x7c]
+# W64-REAL16: v_cmp_le_i16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x67,0x7c]
+# W32-FAKE16: v_cmp_le_i16_e32 vcc_lo, src_scc, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xfd,0x04,0x67,0x7c]
+# W64-FAKE16: v_cmp_le_i16_e32 vcc, src_scc, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xfd,0x04,0x67,0x7c]
+
+0xff,0xfe,0x67,0x7c,0x0b,0xfe,0x00,0x00
+# W32-REAL16: v_cmp_le_i16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x67,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-REAL16: v_cmp_le_i16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x67,0x7c,0x0b,0xfe,0x00,0x00]
+# W32-FAKE16: v_cmp_le_i16_e32 vcc_lo, 0xfe0b, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xff,0xfe,0x67,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-FAKE16: v_cmp_le_i16_e32 vcc, 0xfe0b, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xff,0xfe,0x67,0x7c,0x0b,0xfe,0x00,0x00]
 
 0x01,0x05,0x86,0x7c
 # W32: v_cmp_le_i32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x86,0x7c]
@@ -2021,64 +2399,118 @@
 # W64: v_cmp_le_i64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xa7,0x7c,0x56,0x34,0x12,0xaf]
 
 0x01,0x05,0x76,0x7c
-# W32: v_cmp_le_u16_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x76,0x7c]
-# W64: v_cmp_le_u16_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x76,0x7c]
+# W32-REAL16: v_cmp_le_u16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x76,0x7c]
+# W64-REAL16: v_cmp_le_u16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x76,0x7c]
+# W32-FAKE16: v_cmp_le_u16_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x76,0x7c]
+# W64-FAKE16: v_cmp_le_u16_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x76,0x7c]
 
 0x7f,0x05,0x76,0x7c
-# W32: v_cmp_le_u16_e32 vcc_lo, v127, v2       ; encoding: [0x7f,0x05,0x76,0x7c]
-# W64: v_cmp_le_u16_e32 vcc, v127, v2          ; encoding: [0x7f,0x05,0x76,0x7c]
+# W32-REAL16: v_cmp_le_u16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x76,0x7c]
+# W64-REAL16: v_cmp_le_u16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x76,0x7c]
+# W32-FAKE16: v_cmp_le_u16_e32 vcc_lo, v127, v2       ; encoding: [0x7f,0x05,0x76,0x7c]
+# W64-FAKE16: v_cmp_le_u16_e32 vcc, v127, v2          ; encoding: [0x7f,0x05,0x76,0x7c]
 
 0x01,0x04,0x76,0x7c
-# W32: v_cmp_le_u16_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x76,0x7c]
-# W64: v_cmp_le_u16_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x76,0x7c]
+# W32-REAL16: v_cmp_le_u16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x76,0x7c]
+# W64-REAL16: v_cmp_le_u16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x76,0x7c]
+# W32-FAKE16: v_cmp_le_u16_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x76,0x7c]
+# W64-FAKE16: v_cmp_le_u16_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x76,0x7c]
 
 0x69,0x04,0x76,0x7c
-# W32: v_cmp_le_u16_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x76,0x7c]
-# W64: v_cmp_le_u16_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x76,0x7c]
+# W32-REAL16: v_cmp_le_u16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x76,0x7c]
+# W64-REAL16: v_cmp_le_u16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x76,0x7c]
+# W32-FAKE16: v_cmp_le_u16_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x76,0x7c]
+# W64-FAKE16: v_cmp_le_u16_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x76,0x7c]
 
 0x6a,0x04,0x76,0x7c
-# W32: v_cmp_le_u16_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x76,0x7c]
-# W64: v_cmp_le_u16_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x76,0x7c]
+# W32-REAL16: v_cmp_le_u16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x76,0x7c]
+# W64-REAL16: v_cmp_le_u16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x76,0x7c]
+# W32-FAKE16: v_cmp_le_u16_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x76,0x7c]
+# W64-FAKE16: v_cmp_le_u16_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x76,0x7c]
 
 0x6b,0x04,0x76,0x7c
-# W32: v_cmp_le_u16_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x76,0x7c]
-# W64: v_cmp_le_u16_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x76,0x7c]
+# W32-REAL16: v_cmp_le_u16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x76,0x7c]
+# W64-REAL16: v_cmp_le_u16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x76,0x7c]
+# W32-FAKE16: v_cmp_le_u16_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x76,0x7c]
+# W64-FAKE16: v_cmp_le_u16_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x76,0x7c]
 
 0x7b,0x04,0x76,0x7c
-# W32: v_cmp_le_u16_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x76,0x7c]
-# W64: v_cmp_le_u16_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x76,0x7c]
+# W32-REAL16: v_cmp_le_u16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x76,0x7c]
+# W64-REAL16: v_cmp_le_u16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x76,0x7c]
+# W32-FAKE16: v_cmp_le_u16_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x76,0x7c]
+# W64-FAKE16: v_cmp_le_u16_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x76,0x7c]
 
 0x7d,0x04,0x76,0x7c
-# W32: v_cmp_le_u16_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x76,0x7c]
-# W64: v_cmp_le_u16_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x76,0x7c]
+# W32-REAL16: v_cmp_le_u16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x76,0x7c]
+# W64-REAL16: v_cmp_le_u16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x76,0x7c]
+# W32-FAKE16: v_cmp_le_u16_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x76,0x7c]
+# W64-FAKE16: v_cmp_le_u16_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x76,0x7c]
 
 0x7e,0x04,0x76,0x7c
-# W32: v_cmp_le_u16_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x76,0x7c]
-# W64: v_cmp_le_u16_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x76,0x7c]
+# W32-REAL16: v_cmp_le_u16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x76,0x7c]
+# W64-REAL16: v_cmp_le_u16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x76,0x7c]
+# W32-FAKE16: v_cmp_le_u16_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x76,0x7c]
+# W64-FAKE16: v_cmp_le_u16_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x76,0x7c]
 
 0x7f,0x04,0x76,0x7c
-# W32: v_cmp_le_u16_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x76,0x7c]
-# W64: v_cmp_le_u16_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x76,0x7c]
+# W32-REAL16: v_cmp_le_u16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x76,0x7c]
+# W64-REAL16: v_cmp_le_u16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x76,0x7c]
+# W32-FAKE16: v_cmp_le_u16_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x76,0x7c]
+# W64-FAKE16: v_cmp_le_u16_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x76,0x7c]
 
 0x7c,0x04,0x76,0x7c
-# W32: v_cmp_le_u16_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x76,0x7c]
-# W64: v_cmp_le_u16_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x76,0x7c]
+# W32-REAL16: v_cmp_le_u16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x76,0x7c]
+# W64-REAL16: v_cmp_le_u16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x76,0x7c]
+# W32-FAKE16: v_cmp_le_u16_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x76,0x7c]
+# W64-FAKE16: v_cmp_le_u16_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x76,0x7c]
 
 0xc1,0x04,0x76,0x7c
-# W32: v_cmp_le_u16_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x76,0x7c]
-# W64: v_cmp_le_u16_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x76,0x7c]
+# W32-REAL16: v_cmp_le_u16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x76,0x7c]
+# W64-REAL16: v_cmp_le_u16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x76,0x7c]
+# W32-FAKE16: v_cmp_le_u16_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x76,0x7c]
+# W64-FAKE16: v_cmp_le_u16_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x76,0x7c]
 
 0xf0,0x04,0x76,0x7c
-# W32: v_cmp_le_u16_e32 vcc_lo, 0x3800, v2     ; encoding: [0xff,0x04,0x76,0x7c,0x00,0x38,0x00,0x00]
-# W64: v_cmp_le_u16_e32 vcc, 0x3800, v2        ; encoding: [0xff,0x04,0x76,0x7c,0x00,0x38,0x00,0x00]
+# W32-REAL16: v_cmp_le_u16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x76,0x7c,0x00,0x38,0x00,0x00]
+# W64-REAL16: v_cmp_le_u16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x76,0x7c,0x00,0x38,0x00,0x00]
+# W32-FAKE16: v_cmp_le_u16_e32 vcc_lo, 0x3800, v2     ; encoding: [0xff,0x04,0x76,0x7c,0x00,0x38,0x00,0x00]
+# W64-FAKE16: v_cmp_le_u16_e32 vcc, 0x3800, v2        ; encoding: [0xff,0x04,0x76,0x7c,0x00,0x38,0x00,0x00]
 
 0xfd,0x04,0x76,0x7c
-# W32: v_cmp_le_u16_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x76,0x7c]
-# W64: v_cmp_le_u16_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x76,0x7c]
+# W32-REAL16: v_cmp_le_u16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x76,0x7c]
+# W64-REAL16: v_cmp_le_u16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x76,0x7c]
+# W32-FAKE16: v_cmp_le_u16_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x76,0x7c]
+# W64-FAKE16: v_cmp_le_u16_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x76,0x7c]
 
 0xff,0xfe,0x76,0x7c,0x0b,0xfe,0x00,0x00
-# W32: v_cmp_le_u16_e32 vcc_lo, 0xfe0b, v127   ; encoding: [0xff,0xfe,0x76,0x7c,0x0b,0xfe,0x00,0x00]
-# W64: v_cmp_le_u16_e32 vcc, 0xfe0b, v127      ; encoding: [0xff,0xfe,0x76,0x7c,0x0b,0xfe,0x00,0x00]
+# W32-REAL16: v_cmp_le_u16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x76,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-REAL16: v_cmp_le_u16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x76,0x7c,0x0b,0xfe,0x00,0x00]
+# W32-FAKE16: v_cmp_le_u16_e32 vcc_lo, 0xfe0b, v127   ; encoding: [0xff,0xfe,0x76,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-FAKE16: v_cmp_le_u16_e32 vcc, 0xfe0b, v127      ; encoding: [0xff,0xfe,0x76,0x7c,0x0b,0xfe,0x00,0x00]
+
+0x81,0x05,0x76,0x7c
+# W32-REAL16: v_cmp_le_u16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x76,0x7c]
+# W64-REAL16: v_cmp_le_u16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x76,0x7c]
+# W32-FAKE16: v_cmp_le_u16_e32 vcc_lo, v129/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0x81,0x05,0x76,0x7c]
+# W64-FAKE16: v_cmp_le_u16_e32 vcc, v129/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0x81,0x05,0x76,0x7c]
+
+0xff,0x05,0x76,0x7c
+# W32-REAL16: v_cmp_le_u16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x76,0x7c]
+# W64-REAL16: v_cmp_le_u16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x76,0x7c]
+# W32-FAKE16: v_cmp_le_u16_e32 vcc_lo, v255/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0xff,0x05,0x76,0x7c]
+# W64-FAKE16: v_cmp_le_u16_e32 vcc, v255/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0xff,0x05,0x76,0x7c]
+
+0xfd,0x04,0x77,0x7c
+# W32-REAL16: v_cmp_le_u16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x77,0x7c]
+# W64-REAL16: v_cmp_le_u16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x77,0x7c]
+# W32-FAKE16: v_cmp_le_u16_e32 vcc_lo, src_scc, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xfd,0x04,0x77,0x7c]
+# W64-FAKE16: v_cmp_le_u16_e32 vcc, src_scc, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xfd,0x04,0x77,0x7c]
+
+0xff,0xfe,0x77,0x7c,0x0b,0xfe,0x00,0x00
+# W32-REAL16: v_cmp_le_u16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x77,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-REAL16: v_cmp_le_u16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x77,0x7c,0x0b,0xfe,0x00,0x00]
+# W32-FAKE16: v_cmp_le_u16_e32 vcc_lo, 0xfe0b, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xff,0xfe,0x77,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-FAKE16: v_cmp_le_u16_e32 vcc, 0xfe0b, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xff,0xfe,0x77,0x7c,0x0b,0xfe,0x00,0x00]
 
 0x01,0x05,0x96,0x7c
 # W32: v_cmp_le_u32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x96,0x7c]
@@ -2579,64 +3011,118 @@
 # W64: v_cmp_lt_f64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0x43,0x7c,0x56,0x34,0x12,0xaf]
 
 0x01,0x05,0x62,0x7c
-# W32: v_cmp_lt_i16_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x62,0x7c]
-# W64: v_cmp_lt_i16_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x62,0x7c]
+# W32-REAL16: v_cmp_lt_i16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x62,0x7c]
+# W64-REAL16: v_cmp_lt_i16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x62,0x7c]
+# W32-FAKE16: v_cmp_lt_i16_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x62,0x7c]
+# W64-FAKE16: v_cmp_lt_i16_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x62,0x7c]
 
 0x7f,0x05,0x62,0x7c
-# W32: v_cmp_lt_i16_e32 vcc_lo, v127, v2       ; encoding: [0x7f,0x05,0x62,0x7c]
-# W64: v_cmp_lt_i16_e32 vcc, v127, v2          ; encoding: [0x7f,0x05,0x62,0x7c]
+# W32-REAL16: v_cmp_lt_i16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x62,0x7c]
+# W64-REAL16: v_cmp_lt_i16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x62,0x7c]
+# W32-FAKE16: v_cmp_lt_i16_e32 vcc_lo, v127, v2       ; encoding: [0x7f,0x05,0x62,0x7c]
+# W64-FAKE16: v_cmp_lt_i16_e32 vcc, v127, v2          ; encoding: [0x7f,0x05,0x62,0x7c]
 
 0x01,0x04,0x62,0x7c
-# W32: v_cmp_lt_i16_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x62,0x7c]
-# W64: v_cmp_lt_i16_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x62,0x7c]
+# W32-REAL16: v_cmp_lt_i16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x62,0x7c]
+# W64-REAL16: v_cmp_lt_i16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x62,0x7c]
+# W32-FAKE16: v_cmp_lt_i16_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x62,0x7c]
+# W64-FAKE16: v_cmp_lt_i16_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x62,0x7c]
 
 0x69,0x04,0x62,0x7c
-# W32: v_cmp_lt_i16_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x62,0x7c]
-# W64: v_cmp_lt_i16_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x62,0x7c]
+# W32-REAL16: v_cmp_lt_i16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x62,0x7c]
+# W64-REAL16: v_cmp_lt_i16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x62,0x7c]
+# W32-FAKE16: v_cmp_lt_i16_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x62,0x7c]
+# W64-FAKE16: v_cmp_lt_i16_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x62,0x7c]
 
 0x6a,0x04,0x62,0x7c
-# W32: v_cmp_lt_i16_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x62,0x7c]
-# W64: v_cmp_lt_i16_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x62,0x7c]
+# W32-REAL16: v_cmp_lt_i16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x62,0x7c]
+# W64-REAL16: v_cmp_lt_i16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x62,0x7c]
+# W32-FAKE16: v_cmp_lt_i16_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x62,0x7c]
+# W64-FAKE16: v_cmp_lt_i16_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x62,0x7c]
 
 0x6b,0x04,0x62,0x7c
-# W32: v_cmp_lt_i16_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x62,0x7c]
-# W64: v_cmp_lt_i16_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x62,0x7c]
+# W32-REAL16: v_cmp_lt_i16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x62,0x7c]
+# W64-REAL16: v_cmp_lt_i16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x62,0x7c]
+# W32-FAKE16: v_cmp_lt_i16_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x62,0x7c]
+# W64-FAKE16: v_cmp_lt_i16_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x62,0x7c]
 
 0x7b,0x04,0x62,0x7c
-# W32: v_cmp_lt_i16_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x62,0x7c]
-# W64: v_cmp_lt_i16_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x62,0x7c]
+# W32-REAL16: v_cmp_lt_i16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x62,0x7c]
+# W64-REAL16: v_cmp_lt_i16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x62,0x7c]
+# W32-FAKE16: v_cmp_lt_i16_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x62,0x7c]
+# W64-FAKE16: v_cmp_lt_i16_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x62,0x7c]
 
 0x7d,0x04,0x62,0x7c
-# W32: v_cmp_lt_i16_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x62,0x7c]
-# W64: v_cmp_lt_i16_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x62,0x7c]
+# W32-REAL16: v_cmp_lt_i16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x62,0x7c]
+# W64-REAL16: v_cmp_lt_i16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x62,0x7c]
+# W32-FAKE16: v_cmp_lt_i16_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x62,0x7c]
+# W64-FAKE16: v_cmp_lt_i16_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x62,0x7c]
 
 0x7e,0x04,0x62,0x7c
-# W32: v_cmp_lt_i16_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x62,0x7c]
-# W64: v_cmp_lt_i16_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x62,0x7c]
+# W32-REAL16: v_cmp_lt_i16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x62,0x7c]
+# W64-REAL16: v_cmp_lt_i16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x62,0x7c]
+# W32-FAKE16: v_cmp_lt_i16_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x62,0x7c]
+# W64-FAKE16: v_cmp_lt_i16_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x62,0x7c]
 
 0x7f,0x04,0x62,0x7c
-# W32: v_cmp_lt_i16_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x62,0x7c]
-# W64: v_cmp_lt_i16_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x62,0x7c]
+# W32-REAL16: v_cmp_lt_i16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x62,0x7c]
+# W64-REAL16: v_cmp_lt_i16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x62,0x7c]
+# W32-FAKE16: v_cmp_lt_i16_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x62,0x7c]
+# W64-FAKE16: v_cmp_lt_i16_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x62,0x7c]
 
 0x7c,0x04,0x62,0x7c
-# W32: v_cmp_lt_i16_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x62,0x7c]
-# W64: v_cmp_lt_i16_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x62,0x7c]
+# W32-REAL16: v_cmp_lt_i16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x62,0x7c]
+# W64-REAL16: v_cmp_lt_i16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x62,0x7c]
+# W32-FAKE16: v_cmp_lt_i16_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x62,0x7c]
+# W64-FAKE16: v_cmp_lt_i16_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x62,0x7c]
 
 0xc1,0x04,0x62,0x7c
-# W32: v_cmp_lt_i16_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x62,0x7c]
-# W64: v_cmp_lt_i16_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x62,0x7c]
+# W32-REAL16: v_cmp_lt_i16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x62,0x7c]
+# W64-REAL16: v_cmp_lt_i16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x62,0x7c]
+# W32-FAKE16: v_cmp_lt_i16_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x62,0x7c]
+# W64-FAKE16: v_cmp_lt_i16_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x62,0x7c]
 
 0xf0,0x04,0x62,0x7c
-# W32: v_cmp_lt_i16_e32 vcc_lo, 0x3800, v2     ; encoding: [0xff,0x04,0x62,0x7c,0x00,0x38,0x00,0x00]
-# W64: v_cmp_lt_i16_e32 vcc, 0x3800, v2        ; encoding: [0xff,0x04,0x62,0x7c,0x00,0x38,0x00,0x00]
+# W32-REAL16: v_cmp_lt_i16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x62,0x7c,0x00,0x38,0x00,0x00]
+# W64-REAL16: v_cmp_lt_i16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x62,0x7c,0x00,0x38,0x00,0x00]
+# W32-FAKE16: v_cmp_lt_i16_e32 vcc_lo, 0x3800, v2     ; encoding: [0xff,0x04,0x62,0x7c,0x00,0x38,0x00,0x00]
+# W64-FAKE16: v_cmp_lt_i16_e32 vcc, 0x3800, v2        ; encoding: [0xff,0x04,0x62,0x7c,0x00,0x38,0x00,0x00]
 
 0xfd,0x04,0x62,0x7c
-# W32: v_cmp_lt_i16_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x62,0x7c]
-# W64: v_cmp_lt_i16_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x62,0x7c]
+# W32-REAL16: v_cmp_lt_i16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x62,0x7c]
+# W64-REAL16: v_cmp_lt_i16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x62,0x7c]
+# W32-FAKE16: v_cmp_lt_i16_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x62,0x7c]
+# W64-FAKE16: v_cmp_lt_i16_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x62,0x7c]
 
 0xff,0xfe,0x62,0x7c,0x0b,0xfe,0x00,0x00
-# W32: v_cmp_lt_i16_e32 vcc_lo, 0xfe0b, v127   ; encoding: [0xff,0xfe,0x62,0x7c,0x0b,0xfe,0x00,0x00]
-# W64: v_cmp_lt_i16_e32 vcc, 0xfe0b, v127      ; encoding: [0xff,0xfe,0x62,0x7c,0x0b,0xfe,0x00,0x00]
+# W32-REAL16: v_cmp_lt_i16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x62,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-REAL16: v_cmp_lt_i16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x62,0x7c,0x0b,0xfe,0x00,0x00]
+# W32-FAKE16: v_cmp_lt_i16_e32 vcc_lo, 0xfe0b, v127   ; encoding: [0xff,0xfe,0x62,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-FAKE16: v_cmp_lt_i16_e32 vcc, 0xfe0b, v127      ; encoding: [0xff,0xfe,0x62,0x7c,0x0b,0xfe,0x00,0x00]
+
+0x81,0x05,0x62,0x7c
+# W32-REAL16: v_cmp_lt_i16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x62,0x7c]
+# W64-REAL16: v_cmp_lt_i16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x62,0x7c]
+# W32-FAKE16: v_cmp_lt_i16_e32 vcc_lo, v129/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0x81,0x05,0x62,0x7c]
+# W64-FAKE16: v_cmp_lt_i16_e32 vcc, v129/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0x81,0x05,0x62,0x7c]
+
+0xff,0x05,0x62,0x7c
+# W32-REAL16: v_cmp_lt_i16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x62,0x7c]
+# W64-REAL16: v_cmp_lt_i16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x62,0x7c]
+# W32-FAKE16: v_cmp_lt_i16_e32 vcc_lo, v255/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0xff,0x05,0x62,0x7c]
+# W64-FAKE16: v_cmp_lt_i16_e32 vcc, v255/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0xff,0x05,0x62,0x7c]
+
+0xfd,0x04,0x63,0x7c
+# W32-REAL16: v_cmp_lt_i16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x63,0x7c]
+# W64-REAL16: v_cmp_lt_i16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x63,0x7c]
+# W32-FAKE16: v_cmp_lt_i16_e32 vcc_lo, src_scc, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xfd,0x04,0x63,0x7c]
+# W64-FAKE16: v_cmp_lt_i16_e32 vcc, src_scc, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xfd,0x04,0x63,0x7c]
+
+0xff,0xfe,0x63,0x7c,0x0b,0xfe,0x00,0x00
+# W32-REAL16: v_cmp_lt_i16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x63,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-REAL16: v_cmp_lt_i16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x63,0x7c,0x0b,0xfe,0x00,0x00]
+# W32-FAKE16: v_cmp_lt_i16_e32 vcc_lo, 0xfe0b, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xff,0xfe,0x63,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-FAKE16: v_cmp_lt_i16_e32 vcc, 0xfe0b, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xff,0xfe,0x63,0x7c,0x0b,0xfe,0x00,0x00]
 
 0x01,0x05,0x82,0x7c
 # W32: v_cmp_lt_i32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x82,0x7c]
@@ -2747,64 +3233,118 @@
 # W64: v_cmp_lt_i64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xa3,0x7c,0x56,0x34,0x12,0xaf]
 
 0x01,0x05,0x72,0x7c
-# W32: v_cmp_lt_u16_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x72,0x7c]
-# W64: v_cmp_lt_u16_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x72,0x7c]
+# W32-REAL16: v_cmp_lt_u16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x72,0x7c]
+# W64-REAL16: v_cmp_lt_u16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x72,0x7c]
+# W32-FAKE16: v_cmp_lt_u16_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x72,0x7c]
+# W64-FAKE16: v_cmp_lt_u16_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x72,0x7c]
 
 0x7f,0x05,0x72,0x7c
-# W32: v_cmp_lt_u16_e32 vcc_lo, v127, v2       ; encoding: [0x7f,0x05,0x72,0x7c]
-# W64: v_cmp_lt_u16_e32 vcc, v127, v2          ; encoding: [0x7f,0x05,0x72,0x7c]
+# W32-REAL16: v_cmp_lt_u16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x72,0x7c]
+# W64-REAL16: v_cmp_lt_u16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x72,0x7c]
+# W32-FAKE16: v_cmp_lt_u16_e32 vcc_lo, v127, v2       ; encoding: [0x7f,0x05,0x72,0x7c]
+# W64-FAKE16: v_cmp_lt_u16_e32 vcc, v127, v2          ; encoding: [0x7f,0x05,0x72,0x7c]
 
 0x01,0x04,0x72,0x7c
-# W32: v_cmp_lt_u16_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x72,0x7c]
-# W64: v_cmp_lt_u16_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x72,0x7c]
+# W32-REAL16: v_cmp_lt_u16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x72,0x7c]
+# W64-REAL16: v_cmp_lt_u16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x72,0x7c]
+# W32-FAKE16: v_cmp_lt_u16_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x72,0x7c]
+# W64-FAKE16: v_cmp_lt_u16_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x72,0x7c]
 
 0x69,0x04,0x72,0x7c
-# W32: v_cmp_lt_u16_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x72,0x7c]
-# W64: v_cmp_lt_u16_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x72,0x7c]
+# W32-REAL16: v_cmp_lt_u16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x72,0x7c]
+# W64-REAL16: v_cmp_lt_u16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x72,0x7c]
+# W32-FAKE16: v_cmp_lt_u16_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x72,0x7c]
+# W64-FAKE16: v_cmp_lt_u16_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x72,0x7c]
 
 0x6a,0x04,0x72,0x7c
-# W32: v_cmp_lt_u16_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x72,0x7c]
-# W64: v_cmp_lt_u16_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x72,0x7c]
+# W32-REAL16: v_cmp_lt_u16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x72,0x7c]
+# W64-REAL16: v_cmp_lt_u16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x72,0x7c]
+# W32-FAKE16: v_cmp_lt_u16_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x72,0x7c]
+# W64-FAKE16: v_cmp_lt_u16_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x72,0x7c]
 
 0x6b,0x04,0x72,0x7c
-# W32: v_cmp_lt_u16_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x72,0x7c]
-# W64: v_cmp_lt_u16_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x72,0x7c]
+# W32-REAL16: v_cmp_lt_u16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x72,0x7c]
+# W64-REAL16: v_cmp_lt_u16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x72,0x7c]
+# W32-FAKE16: v_cmp_lt_u16_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x72,0x7c]
+# W64-FAKE16: v_cmp_lt_u16_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x72,0x7c]
 
 0x7b,0x04,0x72,0x7c
-# W32: v_cmp_lt_u16_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x72,0x7c]
-# W64: v_cmp_lt_u16_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x72,0x7c]
+# W32-REAL16: v_cmp_lt_u16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x72,0x7c]
+# W64-REAL16: v_cmp_lt_u16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x72,0x7c]
+# W32-FAKE16: v_cmp_lt_u16_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x72,0x7c]
+# W64-FAKE16: v_cmp_lt_u16_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x72,0x7c]
 
 0x7d,0x04,0x72,0x7c
-# W32: v_cmp_lt_u16_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x72,0x7c]
-# W64: v_cmp_lt_u16_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x72,0x7c]
+# W32-REAL16: v_cmp_lt_u16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x72,0x7c]
+# W64-REAL16: v_cmp_lt_u16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x72,0x7c]
+# W32-FAKE16: v_cmp_lt_u16_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x72,0x7c]
+# W64-FAKE16: v_cmp_lt_u16_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x72,0x7c]
 
 0x7e,0x04,0x72,0x7c
-# W32: v_cmp_lt_u16_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x72,0x7c]
-# W64: v_cmp_lt_u16_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x72,0x7c]
+# W32-REAL16: v_cmp_lt_u16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x72,0x7c]
+# W64-REAL16: v_cmp_lt_u16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x72,0x7c]
+# W32-FAKE16: v_cmp_lt_u16_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x72,0x7c]
+# W64-FAKE16: v_cmp_lt_u16_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x72,0x7c]
 
 0x7f,0x04,0x72,0x7c
-# W32: v_cmp_lt_u16_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x72,0x7c]
-# W64: v_cmp_lt_u16_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x72,0x7c]
+# W32-REAL16: v_cmp_lt_u16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x72,0x7c]
+# W64-REAL16: v_cmp_lt_u16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x72,0x7c]
+# W32-FAKE16: v_cmp_lt_u16_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x72,0x7c]
+# W64-FAKE16: v_cmp_lt_u16_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x72,0x7c]
 
 0x7c,0x04,0x72,0x7c
-# W32: v_cmp_lt_u16_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x72,0x7c]
-# W64: v_cmp_lt_u16_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x72,0x7c]
+# W32-REAL16: v_cmp_lt_u16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x72,0x7c]
+# W64-REAL16: v_cmp_lt_u16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x72,0x7c]
+# W32-FAKE16: v_cmp_lt_u16_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x72,0x7c]
+# W64-FAKE16: v_cmp_lt_u16_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x72,0x7c]
 
 0xc1,0x04,0x72,0x7c
-# W32: v_cmp_lt_u16_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x72,0x7c]
-# W64: v_cmp_lt_u16_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x72,0x7c]
+# W32-REAL16: v_cmp_lt_u16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x72,0x7c]
+# W64-REAL16: v_cmp_lt_u16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x72,0x7c]
+# W32-FAKE16: v_cmp_lt_u16_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x72,0x7c]
+# W64-FAKE16: v_cmp_lt_u16_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x72,0x7c]
 
 0xf0,0x04,0x72,0x7c
-# W32: v_cmp_lt_u16_e32 vcc_lo, 0x3800, v2     ; encoding: [0xff,0x04,0x72,0x7c,0x00,0x38,0x00,0x00]
-# W64: v_cmp_lt_u16_e32 vcc, 0x3800, v2        ; encoding: [0xff,0x04,0x72,0x7c,0x00,0x38,0x00,0x00]
+# W32-REAL16: v_cmp_lt_u16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x72,0x7c,0x00,0x38,0x00,0x00]
+# W64-REAL16: v_cmp_lt_u16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x72,0x7c,0x00,0x38,0x00,0x00]
+# W32-FAKE16: v_cmp_lt_u16_e32 vcc_lo, 0x3800, v2     ; encoding: [0xff,0x04,0x72,0x7c,0x00,0x38,0x00,0x00]
+# W64-FAKE16: v_cmp_lt_u16_e32 vcc, 0x3800, v2        ; encoding: [0xff,0x04,0x72,0x7c,0x00,0x38,0x00,0x00]
 
 0xfd,0x04,0x72,0x7c
-# W32: v_cmp_lt_u16_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x72,0x7c]
-# W64: v_cmp_lt_u16_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x72,0x7c]
+# W32-REAL16: v_cmp_lt_u16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x72,0x7c]
+# W64-REAL16: v_cmp_lt_u16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x72,0x7c]
+# W32-FAKE16: v_cmp_lt_u16_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x72,0x7c]
+# W64-FAKE16: v_cmp_lt_u16_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x72,0x7c]
 
 0xff,0xfe,0x72,0x7c,0x0b,0xfe,0x00,0x00
-# W32: v_cmp_lt_u16_e32 vcc_lo, 0xfe0b, v127   ; encoding: [0xff,0xfe,0x72,0x7c,0x0b,0xfe,0x00,0x00]
-# W64: v_cmp_lt_u16_e32 vcc, 0xfe0b, v127      ; encoding: [0xff,0xfe,0x72,0x7c,0x0b,0xfe,0x00,0x00]
+# W32-REAL16: v_cmp_lt_u16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x72,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-REAL16: v_cmp_lt_u16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x72,0x7c,0x0b,0xfe,0x00,0x00]
+# W32-FAKE16: v_cmp_lt_u16_e32 vcc_lo, 0xfe0b, v127   ; encoding: [0xff,0xfe,0x72,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-FAKE16: v_cmp_lt_u16_e32 vcc, 0xfe0b, v127      ; encoding: [0xff,0xfe,0x72,0x7c,0x0b,0xfe,0x00,0x00]
+
+0x81,0x05,0x72,0x7c
+# W32-REAL16: v_cmp_lt_u16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x72,0x7c]
+# W64-REAL16: v_cmp_lt_u16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x72,0x7c]
+# W32-FAKE16: v_cmp_lt_u16_e32 vcc_lo, v129/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0x81,0x05,0x72,0x7c]
+# W64-FAKE16: v_cmp_lt_u16_e32 vcc, v129/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0x81,0x05,0x72,0x7c]
+
+0xff,0x05,0x72,0x7c
+# W32-REAL16: v_cmp_lt_u16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x72,0x7c]
+# W64-REAL16: v_cmp_lt_u16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x72,0x7c]
+# W32-FAKE16: v_cmp_lt_u16_e32 vcc_lo, v255/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0xff,0x05,0x72,0x7c]
+# W64-FAKE16: v_cmp_lt_u16_e32 vcc, v255/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0xff,0x05,0x72,0x7c]
+
+0xfd,0x04,0x73,0x7c
+# W32-REAL16: v_cmp_lt_u16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x73,0x7c]
+# W64-REAL16: v_cmp_lt_u16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x73,0x7c]
+# W32-FAKE16: v_cmp_lt_u16_e32 vcc_lo, src_scc, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xfd,0x04,0x73,0x7c]
+# W64-FAKE16: v_cmp_lt_u16_e32 vcc, src_scc, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xfd,0x04,0x73,0x7c]
+
+0xff,0xfe,0x73,0x7c,0x0b,0xfe,0x00,0x00
+# W32-REAL16: v_cmp_lt_u16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x73,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-REAL16: v_cmp_lt_u16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x73,0x7c,0x0b,0xfe,0x00,0x00]
+# W32-FAKE16: v_cmp_lt_u16_e32 vcc_lo, 0xfe0b, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xff,0xfe,0x73,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-FAKE16: v_cmp_lt_u16_e32 vcc, 0xfe0b, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xff,0xfe,0x73,0x7c,0x0b,0xfe,0x00,0x00]
 
 0x01,0x05,0x92,0x7c
 # W32: v_cmp_lt_u32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x92,0x7c]
@@ -2915,64 +3455,118 @@
 # W64: v_cmp_lt_u64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xb3,0x7c,0x56,0x34,0x12,0xaf]
 
 0x01,0x05,0x6a,0x7c
-# W32: v_cmp_ne_i16_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x6a,0x7c]
-# W64: v_cmp_ne_i16_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x6a,0x7c]
+# W32-REAL16: v_cmp_ne_i16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x6a,0x7c]
+# W64-REAL16: v_cmp_ne_i16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x6a,0x7c]
+# W32-FAKE16: v_cmp_ne_i16_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x6a,0x7c]
+# W64-FAKE16: v_cmp_ne_i16_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x6a,0x7c]
 
 0x7f,0x05,0x6a,0x7c
-# W32: v_cmp_ne_i16_e32 vcc_lo, v127, v2       ; encoding: [0x7f,0x05,0x6a,0x7c]
-# W64: v_cmp_ne_i16_e32 vcc, v127, v2          ; encoding: [0x7f,0x05,0x6a,0x7c]
+# W32-REAL16: v_cmp_ne_i16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x6a,0x7c]
+# W64-REAL16: v_cmp_ne_i16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x6a,0x7c]
+# W32-FAKE16: v_cmp_ne_i16_e32 vcc_lo, v127, v2       ; encoding: [0x7f,0x05,0x6a,0x7c]
+# W64-FAKE16: v_cmp_ne_i16_e32 vcc, v127, v2          ; encoding: [0x7f,0x05,0x6a,0x7c]
 
 0x01,0x04,0x6a,0x7c
-# W32: v_cmp_ne_i16_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x6a,0x7c]
-# W64: v_cmp_ne_i16_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x6a,0x7c]
+# W32-REAL16: v_cmp_ne_i16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x6a,0x7c]
+# W64-REAL16: v_cmp_ne_i16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x6a,0x7c]
+# W32-FAKE16: v_cmp_ne_i16_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x6a,0x7c]
+# W64-FAKE16: v_cmp_ne_i16_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x6a,0x7c]
 
 0x69,0x04,0x6a,0x7c
-# W32: v_cmp_ne_i16_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x6a,0x7c]
-# W64: v_cmp_ne_i16_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x6a,0x7c]
+# W32-REAL16: v_cmp_ne_i16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x6a,0x7c]
+# W64-REAL16: v_cmp_ne_i16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x6a,0x7c]
+# W32-FAKE16: v_cmp_ne_i16_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x6a,0x7c]
+# W64-FAKE16: v_cmp_ne_i16_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x6a,0x7c]
 
 0x6a,0x04,0x6a,0x7c
-# W32: v_cmp_ne_i16_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x6a,0x7c]
-# W64: v_cmp_ne_i16_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x6a,0x7c]
+# W32-REAL16: v_cmp_ne_i16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x6a,0x7c]
+# W64-REAL16: v_cmp_ne_i16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x6a,0x7c]
+# W32-FAKE16: v_cmp_ne_i16_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x6a,0x7c]
+# W64-FAKE16: v_cmp_ne_i16_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x6a,0x7c]
 
 0x6b,0x04,0x6a,0x7c
-# W32: v_cmp_ne_i16_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x6a,0x7c]
-# W64: v_cmp_ne_i16_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x6a,0x7c]
+# W32-REAL16: v_cmp_ne_i16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x6a,0x7c]
+# W64-REAL16: v_cmp_ne_i16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x6a,0x7c]
+# W32-FAKE16: v_cmp_ne_i16_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x6a,0x7c]
+# W64-FAKE16: v_cmp_ne_i16_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x6a,0x7c]
 
 0x7b,0x04,0x6a,0x7c
-# W32: v_cmp_ne_i16_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x6a,0x7c]
-# W64: v_cmp_ne_i16_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x6a,0x7c]
+# W32-REAL16: v_cmp_ne_i16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x6a,0x7c]
+# W64-REAL16: v_cmp_ne_i16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x6a,0x7c]
+# W32-FAKE16: v_cmp_ne_i16_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x6a,0x7c]
+# W64-FAKE16: v_cmp_ne_i16_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x6a,0x7c]
 
 0x7d,0x04,0x6a,0x7c
-# W32: v_cmp_ne_i16_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x6a,0x7c]
-# W64: v_cmp_ne_i16_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x6a,0x7c]
+# W32-REAL16: v_cmp_ne_i16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x6a,0x7c]
+# W64-REAL16: v_cmp_ne_i16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x6a,0x7c]
+# W32-FAKE16: v_cmp_ne_i16_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x6a,0x7c]
+# W64-FAKE16: v_cmp_ne_i16_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x6a,0x7c]
 
 0x7e,0x04,0x6a,0x7c
-# W32: v_cmp_ne_i16_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x6a,0x7c]
-# W64: v_cmp_ne_i16_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x6a,0x7c]
+# W32-REAL16: v_cmp_ne_i16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x6a,0x7c]
+# W64-REAL16: v_cmp_ne_i16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x6a,0x7c]
+# W32-FAKE16: v_cmp_ne_i16_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x6a,0x7c]
+# W64-FAKE16: v_cmp_ne_i16_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x6a,0x7c]
 
 0x7f,0x04,0x6a,0x7c
-# W32: v_cmp_ne_i16_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x6a,0x7c]
-# W64: v_cmp_ne_i16_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x6a,0x7c]
+# W32-REAL16: v_cmp_ne_i16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x6a,0x7c]
+# W64-REAL16: v_cmp_ne_i16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x6a,0x7c]
+# W32-FAKE16: v_cmp_ne_i16_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x6a,0x7c]
+# W64-FAKE16: v_cmp_ne_i16_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x6a,0x7c]
 
 0x7c,0x04,0x6a,0x7c
-# W32: v_cmp_ne_i16_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x6a,0x7c]
-# W64: v_cmp_ne_i16_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x6a,0x7c]
+# W32-REAL16: v_cmp_ne_i16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x6a,0x7c]
+# W64-REAL16: v_cmp_ne_i16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x6a,0x7c]
+# W32-FAKE16: v_cmp_ne_i16_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x6a,0x7c]
+# W64-FAKE16: v_cmp_ne_i16_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x6a,0x7c]
 
 0xc1,0x04,0x6a,0x7c
-# W32: v_cmp_ne_i16_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x6a,0x7c]
-# W64: v_cmp_ne_i16_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x6a,0x7c]
+# W32-REAL16: v_cmp_ne_i16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x6a,0x7c]
+# W64-REAL16: v_cmp_ne_i16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x6a,0x7c]
+# W32-FAKE16: v_cmp_ne_i16_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x6a,0x7c]
+# W64-FAKE16: v_cmp_ne_i16_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x6a,0x7c]
 
 0xf0,0x04,0x6a,0x7c
-# W32: v_cmp_ne_i16_e32 vcc_lo, 0x3800, v2     ; encoding: [0xff,0x04,0x6a,0x7c,0x00,0x38,0x00,0x00]
-# W64: v_cmp_ne_i16_e32 vcc, 0x3800, v2        ; encoding: [0xff,0x04,0x6a,0x7c,0x00,0x38,0x00,0x00]
+# W32-REAL16: v_cmp_ne_i16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x6a,0x7c,0x00,0x38,0x00,0x00]
+# W64-REAL16: v_cmp_ne_i16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x6a,0x7c,0x00,0x38,0x00,0x00]
+# W32-FAKE16: v_cmp_ne_i16_e32 vcc_lo, 0x3800, v2     ; encoding: [0xff,0x04,0x6a,0x7c,0x00,0x38,0x00,0x00]
+# W64-FAKE16: v_cmp_ne_i16_e32 vcc, 0x3800, v2        ; encoding: [0xff,0x04,0x6a,0x7c,0x00,0x38,0x00,0x00]
 
 0xfd,0x04,0x6a,0x7c
-# W32: v_cmp_ne_i16_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x6a,0x7c]
-# W64: v_cmp_ne_i16_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x6a,0x7c]
+# W32-REAL16: v_cmp_ne_i16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x6a,0x7c]
+# W64-REAL16: v_cmp_ne_i16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x6a,0x7c]
+# W32-FAKE16: v_cmp_ne_i16_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x6a,0x7c]
+# W64-FAKE16: v_cmp_ne_i16_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x6a,0x7c]
 
 0xff,0xfe,0x6a,0x7c,0x0b,0xfe,0x00,0x00
-# W32: v_cmp_ne_i16_e32 vcc_lo, 0xfe0b, v127   ; encoding: [0xff,0xfe,0x6a,0x7c,0x0b,0xfe,0x00,0x00]
-# W64: v_cmp_ne_i16_e32 vcc, 0xfe0b, v127      ; encoding: [0xff,0xfe,0x6a,0x7c,0x0b,0xfe,0x00,0x00]
+# W32-REAL16: v_cmp_ne_i16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x6a,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-REAL16: v_cmp_ne_i16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x6a,0x7c,0x0b,0xfe,0x00,0x00]
+# W32-FAKE16: v_cmp_ne_i16_e32 vcc_lo, 0xfe0b, v127   ; encoding: [0xff,0xfe,0x6a,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-FAKE16: v_cmp_ne_i16_e32 vcc, 0xfe0b, v127      ; encoding: [0xff,0xfe,0x6a,0x7c,0x0b,0xfe,0x00,0x00]
+
+0x81,0x05,0x6a,0x7c
+# W32-REAL16: v_cmp_ne_i16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x6a,0x7c]
+# W64-REAL16: v_cmp_ne_i16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x6a,0x7c]
+# W32-FAKE16: v_cmp_ne_i16_e32 vcc_lo, v129/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0x81,0x05,0x6a,0x7c]
+# W64-FAKE16: v_cmp_ne_i16_e32 vcc, v129/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0x81,0x05,0x6a,0x7c]
+
+0xff,0x05,0x6a,0x7c
+# W32-REAL16: v_cmp_ne_i16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x6a,0x7c]
+# W64-REAL16: v_cmp_ne_i16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x6a,0x7c]
+# W32-FAKE16: v_cmp_ne_i16_e32 vcc_lo, v255/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0xff,0x05,0x6a,0x7c]
+# W64-FAKE16: v_cmp_ne_i16_e32 vcc, v255/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0xff,0x05,0x6a,0x7c]
+
+0xfd,0x04,0x6b,0x7c
+# W32-REAL16: v_cmp_ne_i16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x6b,0x7c]
+# W64-REAL16: v_cmp_ne_i16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x6b,0x7c]
+# W32-FAKE16: v_cmp_ne_i16_e32 vcc_lo, src_scc, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xfd,0x04,0x6b,0x7c]
+# W64-FAKE16: v_cmp_ne_i16_e32 vcc, src_scc, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xfd,0x04,0x6b,0x7c]
+
+0xff,0xfe,0x6b,0x7c,0x0b,0xfe,0x00,0x00
+# W32-REAL16: v_cmp_ne_i16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x6b,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-REAL16: v_cmp_ne_i16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x6b,0x7c,0x0b,0xfe,0x00,0x00]
+# W32-FAKE16: v_cmp_ne_i16_e32 vcc_lo, 0xfe0b, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xff,0xfe,0x6b,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-FAKE16: v_cmp_ne_i16_e32 vcc, 0xfe0b, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xff,0xfe,0x6b,0x7c,0x0b,0xfe,0x00,0x00]
 
 0x01,0x05,0x8a,0x7c
 # W32: v_cmp_ne_i32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x8a,0x7c]
@@ -3083,64 +3677,118 @@
 # W64: v_cmp_ne_i64_e32 vcc, 0xaf123456, v[254:255] ; encoding: [0xff,0xfc,0xab,0x7c,0x56,0x34,0x12,0xaf]
 
 0x01,0x05,0x7a,0x7c
-# W32: v_cmp_ne_u16_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x7a,0x7c]
-# W64: v_cmp_ne_u16_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x7a,0x7c]
+# W32-REAL16: v_cmp_ne_u16_e32 vcc_lo, v1.l, v2.l     ; encoding: [0x01,0x05,0x7a,0x7c]
+# W64-REAL16: v_cmp_ne_u16_e32 vcc, v1.l, v2.l        ; encoding: [0x01,0x05,0x7a,0x7c]
+# W32-FAKE16: v_cmp_ne_u16_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x7a,0x7c]
+# W64-FAKE16: v_cmp_ne_u16_e32 vcc, v1, v2            ; encoding: [0x01,0x05,0x7a,0x7c]
 
 0x7f,0x05,0x7a,0x7c
-# W32: v_cmp_ne_u16_e32 vcc_lo, v127, v2       ; encoding: [0x7f,0x05,0x7a,0x7c]
-# W64: v_cmp_ne_u16_e32 vcc, v127, v2          ; encoding: [0x7f,0x05,0x7a,0x7c]
+# W32-REAL16: v_cmp_ne_u16_e32 vcc_lo, v127.l, v2.l   ; encoding: [0x7f,0x05,0x7a,0x7c]
+# W64-REAL16: v_cmp_ne_u16_e32 vcc, v127.l, v2.l      ; encoding: [0x7f,0x05,0x7a,0x7c]
+# W32-FAKE16: v_cmp_ne_u16_e32 vcc_lo, v127, v2       ; encoding: [0x7f,0x05,0x7a,0x7c]
+# W64-FAKE16: v_cmp_ne_u16_e32 vcc, v127, v2          ; encoding: [0x7f,0x05,0x7a,0x7c]
 
 0x01,0x04,0x7a,0x7c
-# W32: v_cmp_ne_u16_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x7a,0x7c]
-# W64: v_cmp_ne_u16_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x7a,0x7c]
+# W32-REAL16: v_cmp_ne_u16_e32 vcc_lo, s1, v2.l       ; encoding: [0x01,0x04,0x7a,0x7c]
+# W64-REAL16: v_cmp_ne_u16_e32 vcc, s1, v2.l          ; encoding: [0x01,0x04,0x7a,0x7c]
+# W32-FAKE16: v_cmp_ne_u16_e32 vcc_lo, s1, v2         ; encoding: [0x01,0x04,0x7a,0x7c]
+# W64-FAKE16: v_cmp_ne_u16_e32 vcc, s1, v2            ; encoding: [0x01,0x04,0x7a,0x7c]
 
 0x69,0x04,0x7a,0x7c
-# W32: v_cmp_ne_u16_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x7a,0x7c]
-# W64: v_cmp_ne_u16_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x7a,0x7c]
+# W32-REAL16: v_cmp_ne_u16_e32 vcc_lo, s105, v2.l     ; encoding: [0x69,0x04,0x7a,0x7c]
+# W64-REAL16: v_cmp_ne_u16_e32 vcc, s105, v2.l        ; encoding: [0x69,0x04,0x7a,0x7c]
+# W32-FAKE16: v_cmp_ne_u16_e32 vcc_lo, s105, v2       ; encoding: [0x69,0x04,0x7a,0x7c]
+# W64-FAKE16: v_cmp_ne_u16_e32 vcc, s105, v2          ; encoding: [0x69,0x04,0x7a,0x7c]
 
 0x6a,0x04,0x7a,0x7c
-# W32: v_cmp_ne_u16_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x7a,0x7c]
-# W64: v_cmp_ne_u16_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x7a,0x7c]
+# W32-REAL16: v_cmp_ne_u16_e32 vcc_lo, vcc_lo, v2.l   ; encoding: [0x6a,0x04,0x7a,0x7c]
+# W64-REAL16: v_cmp_ne_u16_e32 vcc, vcc_lo, v2.l      ; encoding: [0x6a,0x04,0x7a,0x7c]
+# W32-FAKE16: v_cmp_ne_u16_e32 vcc_lo, vcc_lo, v2     ; encoding: [0x6a,0x04,0x7a,0x7c]
+# W64-FAKE16: v_cmp_ne_u16_e32 vcc, vcc_lo, v2        ; encoding: [0x6a,0x04,0x7a,0x7c]
 
 0x6b,0x04,0x7a,0x7c
-# W32: v_cmp_ne_u16_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x7a,0x7c]
-# W64: v_cmp_ne_u16_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x7a,0x7c]
+# W32-REAL16: v_cmp_ne_u16_e32 vcc_lo, vcc_hi, v2.l   ; encoding: [0x6b,0x04,0x7a,0x7c]
+# W64-REAL16: v_cmp_ne_u16_e32 vcc, vcc_hi, v2.l      ; encoding: [0x6b,0x04,0x7a,0x7c]
+# W32-FAKE16: v_cmp_ne_u16_e32 vcc_lo, vcc_hi, v2     ; encoding: [0x6b,0x04,0x7a,0x7c]
+# W64-FAKE16: v_cmp_ne_u16_e32 vcc, vcc_hi, v2        ; encoding: [0x6b,0x04,0x7a,0x7c]
 
 0x7b,0x04,0x7a,0x7c
-# W32: v_cmp_ne_u16_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x7a,0x7c]
-# W64: v_cmp_ne_u16_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x7a,0x7c]
+# W32-REAL16: v_cmp_ne_u16_e32 vcc_lo, ttmp15, v2.l   ; encoding: [0x7b,0x04,0x7a,0x7c]
+# W64-REAL16: v_cmp_ne_u16_e32 vcc, ttmp15, v2.l      ; encoding: [0x7b,0x04,0x7a,0x7c]
+# W32-FAKE16: v_cmp_ne_u16_e32 vcc_lo, ttmp15, v2     ; encoding: [0x7b,0x04,0x7a,0x7c]
+# W64-FAKE16: v_cmp_ne_u16_e32 vcc, ttmp15, v2        ; encoding: [0x7b,0x04,0x7a,0x7c]
 
 0x7d,0x04,0x7a,0x7c
-# W32: v_cmp_ne_u16_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x7a,0x7c]
-# W64: v_cmp_ne_u16_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x7a,0x7c]
+# W32-REAL16: v_cmp_ne_u16_e32 vcc_lo, m0, v2.l       ; encoding: [0x7d,0x04,0x7a,0x7c]
+# W64-REAL16: v_cmp_ne_u16_e32 vcc, m0, v2.l          ; encoding: [0x7d,0x04,0x7a,0x7c]
+# W32-FAKE16: v_cmp_ne_u16_e32 vcc_lo, m0, v2         ; encoding: [0x7d,0x04,0x7a,0x7c]
+# W64-FAKE16: v_cmp_ne_u16_e32 vcc, m0, v2            ; encoding: [0x7d,0x04,0x7a,0x7c]
 
 0x7e,0x04,0x7a,0x7c
-# W32: v_cmp_ne_u16_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x7a,0x7c]
-# W64: v_cmp_ne_u16_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x7a,0x7c]
+# W32-REAL16: v_cmp_ne_u16_e32 vcc_lo, exec_lo, v2.l  ; encoding: [0x7e,0x04,0x7a,0x7c]
+# W64-REAL16: v_cmp_ne_u16_e32 vcc, exec_lo, v2.l     ; encoding: [0x7e,0x04,0x7a,0x7c]
+# W32-FAKE16: v_cmp_ne_u16_e32 vcc_lo, exec_lo, v2    ; encoding: [0x7e,0x04,0x7a,0x7c]
+# W64-FAKE16: v_cmp_ne_u16_e32 vcc, exec_lo, v2       ; encoding: [0x7e,0x04,0x7a,0x7c]
 
 0x7f,0x04,0x7a,0x7c
-# W32: v_cmp_ne_u16_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x7a,0x7c]
-# W64: v_cmp_ne_u16_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x7a,0x7c]
+# W32-REAL16: v_cmp_ne_u16_e32 vcc_lo, exec_hi, v2.l  ; encoding: [0x7f,0x04,0x7a,0x7c]
+# W64-REAL16: v_cmp_ne_u16_e32 vcc, exec_hi, v2.l     ; encoding: [0x7f,0x04,0x7a,0x7c]
+# W32-FAKE16: v_cmp_ne_u16_e32 vcc_lo, exec_hi, v2    ; encoding: [0x7f,0x04,0x7a,0x7c]
+# W64-FAKE16: v_cmp_ne_u16_e32 vcc, exec_hi, v2       ; encoding: [0x7f,0x04,0x7a,0x7c]
 
 0x7c,0x04,0x7a,0x7c
-# W32: v_cmp_ne_u16_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x7a,0x7c]
-# W64: v_cmp_ne_u16_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x7a,0x7c]
+# W32-REAL16: v_cmp_ne_u16_e32 vcc_lo, null, v2.l     ; encoding: [0x7c,0x04,0x7a,0x7c]
+# W64-REAL16: v_cmp_ne_u16_e32 vcc, null, v2.l        ; encoding: [0x7c,0x04,0x7a,0x7c]
+# W32-FAKE16: v_cmp_ne_u16_e32 vcc_lo, null, v2       ; encoding: [0x7c,0x04,0x7a,0x7c]
+# W64-FAKE16: v_cmp_ne_u16_e32 vcc, null, v2          ; encoding: [0x7c,0x04,0x7a,0x7c]
 
 0xc1,0x04,0x7a,0x7c
-# W32: v_cmp_ne_u16_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x7a,0x7c]
-# W64: v_cmp_ne_u16_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x7a,0x7c]
+# W32-REAL16: v_cmp_ne_u16_e32 vcc_lo, -1, v2.l       ; encoding: [0xc1,0x04,0x7a,0x7c]
+# W64-REAL16: v_cmp_ne_u16_e32 vcc, -1, v2.l          ; encoding: [0xc1,0x04,0x7a,0x7c]
+# W32-FAKE16: v_cmp_ne_u16_e32 vcc_lo, -1, v2         ; encoding: [0xc1,0x04,0x7a,0x7c]
+# W64-FAKE16: v_cmp_ne_u16_e32 vcc, -1, v2            ; encoding: [0xc1,0x04,0x7a,0x7c]
 
 0xf0,0x04,0x7a,0x7c
-# W32: v_cmp_ne_u16_e32 vcc_lo, 0x3800, v2     ; encoding: [0xff,0x04,0x7a,0x7c,0x00,0x38,0x00,0x00]
-# W64: v_cmp_ne_u16_e32 vcc, 0x3800, v2        ; encoding: [0xff,0x04,0x7a,0x7c,0x00,0x38,0x00,0x00]
+# W32-REAL16: v_cmp_ne_u16_e32 vcc_lo, 0x3800, v2.l   ; encoding: [0xff,0x04,0x7a,0x7c,0x00,0x38,0x00,0x00]
+# W64-REAL16: v_cmp_ne_u16_e32 vcc, 0x3800, v2.l      ; encoding: [0xff,0x04,0x7a,0x7c,0x00,0x38,0x00,0x00]
+# W32-FAKE16: v_cmp_ne_u16_e32 vcc_lo, 0x3800, v2     ; encoding: [0xff,0x04,0x7a,0x7c,0x00,0x38,0x00,0x00]
+# W64-FAKE16: v_cmp_ne_u16_e32 vcc, 0x3800, v2        ; encoding: [0xff,0x04,0x7a,0x7c,0x00,0x38,0x00,0x00]
 
 0xfd,0x04,0x7a,0x7c
-# W32: v_cmp_ne_u16_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x7a,0x7c]
-# W64: v_cmp_ne_u16_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x7a,0x7c]
+# W32-REAL16: v_cmp_ne_u16_e32 vcc_lo, src_scc, v2.l  ; encoding: [0xfd,0x04,0x7a,0x7c]
+# W64-REAL16: v_cmp_ne_u16_e32 vcc, src_scc, v2.l     ; encoding: [0xfd,0x04,0x7a,0x7c]
+# W32-FAKE16: v_cmp_ne_u16_e32 vcc_lo, src_scc, v2    ; encoding: [0xfd,0x04,0x7a,0x7c]
+# W64-FAKE16: v_cmp_ne_u16_e32 vcc, src_scc, v2       ; encoding: [0xfd,0x04,0x7a,0x7c]
 
 0xff,0xfe,0x7a,0x7c,0x0b,0xfe,0x00,0x00
-# W32: v_cmp_ne_u16_e32 vcc_lo, 0xfe0b, v127   ; encoding: [0xff,0xfe,0x7a,0x7c,0x0b,0xfe,0x00,0x00]
-# W64: v_cmp_ne_u16_e32 vcc, 0xfe0b, v127      ; encoding: [0xff,0xfe,0x7a,0x7c,0x0b,0xfe,0x00,0x00]
+# W32-REAL16: v_cmp_ne_u16_e32 vcc_lo, 0xfe0b, v127.l ; encoding: [0xff,0xfe,0x7a,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-REAL16: v_cmp_ne_u16_e32 vcc, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0x7a,0x7c,0x0b,0xfe,0x00,0x00]
+# W32-FAKE16: v_cmp_ne_u16_e32 vcc_lo, 0xfe0b, v127   ; encoding: [0xff,0xfe,0x7a,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-FAKE16: v_cmp_ne_u16_e32 vcc, 0xfe0b, v127      ; encoding: [0xff,0xfe,0x7a,0x7c,0x0b,0xfe,0x00,0x00]
+
+0x81,0x05,0x7a,0x7c
+# W32-REAL16: v_cmp_ne_u16_e32 vcc_lo, v1.h, v2.l     ; encoding: [0x81,0x05,0x7a,0x7c]
+# W64-REAL16: v_cmp_ne_u16_e32 vcc, v1.h, v2.l        ; encoding: [0x81,0x05,0x7a,0x7c]
+# W32-FAKE16: v_cmp_ne_u16_e32 vcc_lo, v129/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0x81,0x05,0x7a,0x7c]
+# W64-FAKE16: v_cmp_ne_u16_e32 vcc, v129/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0x81,0x05,0x7a,0x7c]
+
+0xff,0x05,0x7a,0x7c
+# W32-REAL16: v_cmp_ne_u16_e32 vcc_lo, v127.h, v2.l   ; encoding: [0xff,0x05,0x7a,0x7c]
+# W64-REAL16: v_cmp_ne_u16_e32 vcc, v127.h, v2.l      ; encoding: [0xff,0x05,0x7a,0x7c]
+# W32-FAKE16: v_cmp_ne_u16_e32 vcc_lo, v255/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0xff,0x05,0x7a,0x7c]
+# W64-FAKE16: v_cmp_ne_u16_e32 vcc, v255/*Invalid register, operand has 'VS_32_Lo128' register class*/, v2 ; encoding: [0xff,0x05,0x7a,0x7c]
+
+0xfd,0x04,0x7b,0x7c
+# W32-REAL16: v_cmp_ne_u16_e32 vcc_lo, src_scc, v2.h  ; encoding: [0xfd,0x04,0x7b,0x7c]
+# W64-REAL16: v_cmp_ne_u16_e32 vcc, src_scc, v2.h     ; encoding: [0xfd,0x04,0x7b,0x7c]
+# W32-FAKE16: v_cmp_ne_u16_e32 vcc_lo, src_scc, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xfd,0x04,0x7b,0x7c]
+# W64-FAKE16: v_cmp_ne_u16_e32 vcc, src_scc, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xfd,0x04,0x7b,0x7c]
+
+0xff,0xfe,0x7b,0x7c,0x0b,0xfe,0x00,0x00
+# W32-REAL16: v_cmp_ne_u16_e32 vcc_lo, 0xfe0b, v127.h ; encoding: [0xff,0xfe,0x7b,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-REAL16: v_cmp_ne_u16_e32 vcc, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0x7b,0x7c,0x0b,0xfe,0x00,0x00]
+# W32-FAKE16: v_cmp_ne_u16_e32 vcc_lo, 0xfe0b, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xff,0xfe,0x7b,0x7c,0x0b,0xfe,0x00,0x00]
+# W64-FAKE16: v_cmp_ne_u16_e32 vcc, 0xfe0b, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ ; encoding: [0xff,0xfe,0x7b,0x7c,0x0b,0xfe,0x00,0x00]
 
 0x01,0x05,0x9a,0x7c
 # W32: v_cmp_ne_u32_e32 vcc_lo, v1, v2         ; encoding: [0x01,0x05,0x9a,0x7c]
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopc_dpp16.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopc_dpp16.txt
index 213a79fdc8ed45..e3f25d24d9d52d 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopc_dpp16.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopc_dpp16.txt
@@ -229,60 +229,100 @@
 # W64: v_cmp_eq_f32 vcc, -|v255|, -|v255| row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x25,0x7c,0xff,0x6f,0xfd,0x30]
 
 0xfa,0x04,0x64,0x7c,0x01,0x1b,0x00,0xff
-# W32: v_cmp_eq_i16 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x1b,0x00,0xff]
-# W64: v_cmp_eq_i16 vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x1b,0x00,0xff]
+# W32-REAL16: v_cmp_eq_i16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x1b,0x00,0xff]
+# W64-REAL16: v_cmp_eq_i16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x1b,0x00,0xff]
+# W32-FAKE16: v_cmp_eq_i16 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x1b,0x00,0xff]
+# W64-FAKE16: v_cmp_eq_i16 vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x1b,0x00,0xff]
 
 0xfa,0x04,0x64,0x7c,0x01,0xe4,0x00,0xff
-# W32: v_cmp_eq_i16 vcc_lo, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0xe4,0x00,0xff]
-# W64: v_cmp_eq_i16 vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0xe4,0x00,0xff]
+# W32-REAL16: v_cmp_eq_i16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0xe4,0x00,0xff]
+# W64-REAL16: v_cmp_eq_i16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0xe4,0x00,0xff]
+# W32-FAKE16: v_cmp_eq_i16 vcc_lo, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0xe4,0x00,0xff]
+# W64-FAKE16: v_cmp_eq_i16 vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0xe4,0x00,0xff]
 
 0xfa,0x04,0x64,0x7c,0x01,0x40,0x01,0xff
-# W32: v_cmp_eq_i16 vcc_lo, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x40,0x01,0xff]
-# W64: v_cmp_eq_i16 vcc, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x40,0x01,0xff]
+# W32-REAL16: v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x40,0x01,0xff]
+# W64-REAL16: v_cmp_eq_i16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x40,0x01,0xff]
+# W32-FAKE16: v_cmp_eq_i16 vcc_lo, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x40,0x01,0xff]
+# W64-FAKE16: v_cmp_eq_i16 vcc, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x40,0x01,0xff]
 
 0xfa,0x04,0x64,0x7c,0x01,0x41,0x01,0xff
-# W32: v_cmp_eq_i16 vcc_lo, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x41,0x01,0xff]
-# W64: v_cmp_eq_i16 vcc, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x41,0x01,0xff]
+# W32-REAL16: v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x41,0x01,0xff]
+# W64-REAL16: v_cmp_eq_i16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x41,0x01,0xff]
+# W32-FAKE16: v_cmp_eq_i16 vcc_lo, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x41,0x01,0xff]
+# W64-FAKE16: v_cmp_eq_i16 vcc, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x41,0x01,0xff]
 
 0xfa,0x04,0x64,0x7c,0x01,0x01,0x01,0xff
-# W32: v_cmp_eq_i16 vcc_lo, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x01,0x01,0xff]
-# W64: v_cmp_eq_i16 vcc, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x01,0x01,0xff]
+# W32-REAL16: v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x01,0x01,0xff]
+# W64-REAL16: v_cmp_eq_i16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x01,0x01,0xff]
+# W32-FAKE16: v_cmp_eq_i16 vcc_lo, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x01,0x01,0xff]
+# W64-FAKE16: v_cmp_eq_i16 vcc, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x01,0x01,0xff]
 
 0xfa,0x04,0x64,0x7c,0x01,0x0f,0x01,0xff
-# W32: v_cmp_eq_i16 vcc_lo, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x0f,0x01,0xff]
-# W64: v_cmp_eq_i16 vcc, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x0f,0x01,0xff]
+# W32-REAL16: v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x0f,0x01,0xff]
+# W64-REAL16: v_cmp_eq_i16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x0f,0x01,0xff]
+# W32-FAKE16: v_cmp_eq_i16 vcc_lo, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x0f,0x01,0xff]
+# W64-FAKE16: v_cmp_eq_i16 vcc, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x0f,0x01,0xff]
 
 0xfa,0x04,0x64,0x7c,0x01,0x11,0x01,0xff
-# W32: v_cmp_eq_i16 vcc_lo, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x11,0x01,0xff]
-# W64: v_cmp_eq_i16 vcc, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x11,0x01,0xff]
+# W32-REAL16: v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x11,0x01,0xff]
+# W64-REAL16: v_cmp_eq_i16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x11,0x01,0xff]
+# W32-FAKE16: v_cmp_eq_i16 vcc_lo, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x11,0x01,0xff]
+# W64-FAKE16: v_cmp_eq_i16 vcc, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x11,0x01,0xff]
 
 0xfa,0x04,0x64,0x7c,0x01,0x1f,0x01,0xff
-# W32: v_cmp_eq_i16 vcc_lo, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x1f,0x01,0xff]
-# W64: v_cmp_eq_i16 vcc, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x1f,0x01,0xff]
+# W32-REAL16: v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x1f,0x01,0xff]
+# W64-REAL16: v_cmp_eq_i16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x1f,0x01,0xff]
+# W32-FAKE16: v_cmp_eq_i16 vcc_lo, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x1f,0x01,0xff]
+# W64-FAKE16: v_cmp_eq_i16 vcc, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x1f,0x01,0xff]
 
 0xfa,0x04,0x64,0x7c,0x01,0x21,0x01,0xff
-# W32: v_cmp_eq_i16 vcc_lo, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x21,0x01,0xff]
-# W64: v_cmp_eq_i16 vcc, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x21,0x01,0xff]
+# W32-REAL16: v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x21,0x01,0xff]
+# W64-REAL16: v_cmp_eq_i16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x21,0x01,0xff]
+# W32-FAKE16: v_cmp_eq_i16 vcc_lo, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x21,0x01,0xff]
+# W64-FAKE16: v_cmp_eq_i16 vcc, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x21,0x01,0xff]
 
 0xfa,0x04,0x64,0x7c,0x01,0x2f,0x01,0xff
-# W32: v_cmp_eq_i16 vcc_lo, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x2f,0x01,0xff]
-# W64: v_cmp_eq_i16 vcc, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x2f,0x01,0xff]
+# W32-REAL16: v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x2f,0x01,0xff]
+# W64-REAL16: v_cmp_eq_i16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x2f,0x01,0xff]
+# W32-FAKE16: v_cmp_eq_i16 vcc_lo, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x2f,0x01,0xff]
+# W64-FAKE16: v_cmp_eq_i16 vcc, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x2f,0x01,0xff]
 
 0xfa,0x04,0x64,0x7c,0x01,0x50,0x01,0xff
-# W32: v_cmp_eq_i16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x50,0x01,0xff]
-# W64: v_cmp_eq_i16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x50,0x01,0xff]
+# W32-REAL16: v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x50,0x01,0xff]
+# W64-REAL16: v_cmp_eq_i16 vcc, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x50,0x01,0xff]
+# W32-FAKE16: v_cmp_eq_i16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x50,0x01,0xff]
+# W64-FAKE16: v_cmp_eq_i16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x50,0x01,0xff]
 
 0xfa,0x04,0x64,0x7c,0x01,0x5f,0x01,0x01
-# W32: v_cmp_eq_i16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x5f,0x01,0x01]
-# W64: v_cmp_eq_i16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x5f,0x01,0x01]
+# W32-REAL16: v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x5f,0x01,0x01]
+# W64-REAL16: v_cmp_eq_i16 vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x5f,0x01,0x01]
+# W32-FAKE16: v_cmp_eq_i16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x5f,0x01,0x01]
+# W64-FAKE16: v_cmp_eq_i16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x5f,0x01,0x01]
 
 0xfa,0x04,0x64,0x7c,0x01,0x60,0x01,0x13
-# W32: v_cmp_eq_i16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x60,0x01,0x13]
-# W64: v_cmp_eq_i16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x60,0x01,0x13]
+# W32-REAL16: v_cmp_eq_i16 vcc_lo, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_eq_i16 vcc, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_eq_i16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_eq_i16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x64,0x7c,0x01,0x60,0x01,0x13]
 
 0xfa,0xfe,0x64,0x7c,0x7f,0x6f,0x0d,0x30
-# W32: v_cmp_eq_i16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x64,0x7c,0x7f,0x6f,0x0d,0x30]
-# W64: v_cmp_eq_i16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x64,0x7c,0x7f,0x6f,0x0d,0x30]
+# W32-REAL16: v_cmp_eq_i16 vcc_lo, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x64,0x7c,0x7f,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_eq_i16 vcc, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x64,0x7c,0x7f,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_eq_i16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x64,0x7c,0x7f,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_eq_i16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x64,0x7c,0x7f,0x6f,0x0d,0x30]
+
+0xfa,0x04,0x65,0x7c,0x81,0x60,0x01,0x13
+# W32-REAL16: v_cmp_eq_i16 vcc_lo, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x65,0x7c,0x81,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_eq_i16 vcc, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x65,0x7c,0x81,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_eq_i16 vcc_lo, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x65,0x7c,0x81,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_eq_i16 vcc, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x65,0x7c,0x81,0x60,0x01,0x13]
+
+0xfa,0xfe,0x65,0x7c,0xff,0x6f,0x0d,0x30
+# W32-REAL16: v_cmp_eq_i16 vcc_lo, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x65,0x7c,0xff,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_eq_i16 vcc, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x65,0x7c,0xff,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_eq_i16 vcc_lo, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x65,0x7c,0xff,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_eq_i16 vcc, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x65,0x7c,0xff,0x6f,0x0d,0x30]
 
 0xfa,0x04,0x84,0x7c,0x01,0x1b,0x00,0xff
 # W32: v_cmp_eq_i32 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x84,0x7c,0x01,0x1b,0x00,0xff]
@@ -341,60 +381,100 @@
 # W64: v_cmp_eq_i32 vcc, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x85,0x7c,0xff,0x6f,0x0d,0x30]
 
 0xfa,0x04,0x74,0x7c,0x01,0x1b,0x00,0xff
-# W32: v_cmp_eq_u16 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x1b,0x00,0xff]
-# W64: v_cmp_eq_u16 vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x1b,0x00,0xff]
+# W32-REAL16: v_cmp_eq_u16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x1b,0x00,0xff]
+# W64-REAL16: v_cmp_eq_u16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x1b,0x00,0xff]
+# W32-FAKE16: v_cmp_eq_u16 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x1b,0x00,0xff]
+# W64-FAKE16: v_cmp_eq_u16 vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x1b,0x00,0xff]
 
 0xfa,0x04,0x74,0x7c,0x01,0xe4,0x00,0xff
-# W32: v_cmp_eq_u16 vcc_lo, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0xe4,0x00,0xff]
-# W64: v_cmp_eq_u16 vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0xe4,0x00,0xff]
+# W32-REAL16: v_cmp_eq_u16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0xe4,0x00,0xff]
+# W64-REAL16: v_cmp_eq_u16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0xe4,0x00,0xff]
+# W32-FAKE16: v_cmp_eq_u16 vcc_lo, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0xe4,0x00,0xff]
+# W64-FAKE16: v_cmp_eq_u16 vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0xe4,0x00,0xff]
 
 0xfa,0x04,0x74,0x7c,0x01,0x40,0x01,0xff
-# W32: v_cmp_eq_u16 vcc_lo, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x40,0x01,0xff]
-# W64: v_cmp_eq_u16 vcc, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x40,0x01,0xff]
+# W32-REAL16: v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x40,0x01,0xff]
+# W64-REAL16: v_cmp_eq_u16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x40,0x01,0xff]
+# W32-FAKE16: v_cmp_eq_u16 vcc_lo, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x40,0x01,0xff]
+# W64-FAKE16: v_cmp_eq_u16 vcc, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x40,0x01,0xff]
 
 0xfa,0x04,0x74,0x7c,0x01,0x41,0x01,0xff
-# W32: v_cmp_eq_u16 vcc_lo, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x41,0x01,0xff]
-# W64: v_cmp_eq_u16 vcc, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x41,0x01,0xff]
+# W32-REAL16: v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x41,0x01,0xff]
+# W64-REAL16: v_cmp_eq_u16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x41,0x01,0xff]
+# W32-FAKE16: v_cmp_eq_u16 vcc_lo, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x41,0x01,0xff]
+# W64-FAKE16: v_cmp_eq_u16 vcc, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x41,0x01,0xff]
 
 0xfa,0x04,0x74,0x7c,0x01,0x01,0x01,0xff
-# W32: v_cmp_eq_u16 vcc_lo, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x01,0x01,0xff]
-# W64: v_cmp_eq_u16 vcc, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x01,0x01,0xff]
+# W32-REAL16: v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x01,0x01,0xff]
+# W64-REAL16: v_cmp_eq_u16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x01,0x01,0xff]
+# W32-FAKE16: v_cmp_eq_u16 vcc_lo, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x01,0x01,0xff]
+# W64-FAKE16: v_cmp_eq_u16 vcc, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x01,0x01,0xff]
 
 0xfa,0x04,0x74,0x7c,0x01,0x0f,0x01,0xff
-# W32: v_cmp_eq_u16 vcc_lo, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x0f,0x01,0xff]
-# W64: v_cmp_eq_u16 vcc, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x0f,0x01,0xff]
+# W32-REAL16: v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x0f,0x01,0xff]
+# W64-REAL16: v_cmp_eq_u16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x0f,0x01,0xff]
+# W32-FAKE16: v_cmp_eq_u16 vcc_lo, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x0f,0x01,0xff]
+# W64-FAKE16: v_cmp_eq_u16 vcc, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x0f,0x01,0xff]
 
 0xfa,0x04,0x74,0x7c,0x01,0x11,0x01,0xff
-# W32: v_cmp_eq_u16 vcc_lo, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x11,0x01,0xff]
-# W64: v_cmp_eq_u16 vcc, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x11,0x01,0xff]
+# W32-REAL16: v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x11,0x01,0xff]
+# W64-REAL16: v_cmp_eq_u16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x11,0x01,0xff]
+# W32-FAKE16: v_cmp_eq_u16 vcc_lo, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x11,0x01,0xff]
+# W64-FAKE16: v_cmp_eq_u16 vcc, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x11,0x01,0xff]
 
 0xfa,0x04,0x74,0x7c,0x01,0x1f,0x01,0xff
-# W32: v_cmp_eq_u16 vcc_lo, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x1f,0x01,0xff]
-# W64: v_cmp_eq_u16 vcc, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x1f,0x01,0xff]
+# W32-REAL16: v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x1f,0x01,0xff]
+# W64-REAL16: v_cmp_eq_u16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x1f,0x01,0xff]
+# W32-FAKE16: v_cmp_eq_u16 vcc_lo, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x1f,0x01,0xff]
+# W64-FAKE16: v_cmp_eq_u16 vcc, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x1f,0x01,0xff]
 
 0xfa,0x04,0x74,0x7c,0x01,0x21,0x01,0xff
-# W32: v_cmp_eq_u16 vcc_lo, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x21,0x01,0xff]
-# W64: v_cmp_eq_u16 vcc, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x21,0x01,0xff]
+# W32-REAL16: v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x21,0x01,0xff]
+# W64-REAL16: v_cmp_eq_u16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x21,0x01,0xff]
+# W32-FAKE16: v_cmp_eq_u16 vcc_lo, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x21,0x01,0xff]
+# W64-FAKE16: v_cmp_eq_u16 vcc, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x21,0x01,0xff]
 
 0xfa,0x04,0x74,0x7c,0x01,0x2f,0x01,0xff
-# W32: v_cmp_eq_u16 vcc_lo, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x2f,0x01,0xff]
-# W64: v_cmp_eq_u16 vcc, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x2f,0x01,0xff]
+# W32-REAL16: v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x2f,0x01,0xff]
+# W64-REAL16: v_cmp_eq_u16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x2f,0x01,0xff]
+# W32-FAKE16: v_cmp_eq_u16 vcc_lo, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x2f,0x01,0xff]
+# W64-FAKE16: v_cmp_eq_u16 vcc, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x2f,0x01,0xff]
 
 0xfa,0x04,0x74,0x7c,0x01,0x50,0x01,0xff
-# W32: v_cmp_eq_u16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x50,0x01,0xff]
-# W64: v_cmp_eq_u16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x50,0x01,0xff]
+# W32-REAL16: v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x50,0x01,0xff]
+# W64-REAL16: v_cmp_eq_u16 vcc, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x50,0x01,0xff]
+# W32-FAKE16: v_cmp_eq_u16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x50,0x01,0xff]
+# W64-FAKE16: v_cmp_eq_u16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x50,0x01,0xff]
 
 0xfa,0x04,0x74,0x7c,0x01,0x5f,0x01,0x01
-# W32: v_cmp_eq_u16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x5f,0x01,0x01]
-# W64: v_cmp_eq_u16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x5f,0x01,0x01]
+# W32-REAL16: v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x5f,0x01,0x01]
+# W64-REAL16: v_cmp_eq_u16 vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x5f,0x01,0x01]
+# W32-FAKE16: v_cmp_eq_u16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x5f,0x01,0x01]
+# W64-FAKE16: v_cmp_eq_u16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x5f,0x01,0x01]
 
 0xfa,0x04,0x74,0x7c,0x01,0x60,0x01,0x13
-# W32: v_cmp_eq_u16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x60,0x01,0x13]
-# W64: v_cmp_eq_u16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x60,0x01,0x13]
+# W32-REAL16: v_cmp_eq_u16 vcc_lo, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_eq_u16 vcc, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_eq_u16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_eq_u16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x74,0x7c,0x01,0x60,0x01,0x13]
 
 0xfa,0xfe,0x74,0x7c,0x7f,0x6f,0x0d,0x30
-# W32: v_cmp_eq_u16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x74,0x7c,0x7f,0x6f,0x0d,0x30]
-# W64: v_cmp_eq_u16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x74,0x7c,0x7f,0x6f,0x0d,0x30]
+# W32-REAL16: v_cmp_eq_u16 vcc_lo, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x74,0x7c,0x7f,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_eq_u16 vcc, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x74,0x7c,0x7f,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_eq_u16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x74,0x7c,0x7f,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_eq_u16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x74,0x7c,0x7f,0x6f,0x0d,0x30]
+
+0xfa,0x04,0x75,0x7c,0x81,0x60,0x01,0x13
+# W32-REAL16: v_cmp_eq_u16 vcc_lo, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x75,0x7c,0x81,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_eq_u16 vcc, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x75,0x7c,0x81,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_eq_u16 vcc_lo, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x75,0x7c,0x81,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_eq_u16 vcc, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x75,0x7c,0x81,0x60,0x01,0x13]
+
+0xfa,0xfe,0x75,0x7c,0xff,0x6f,0x0d,0x30
+# W32-REAL16: v_cmp_eq_u16 vcc_lo, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x75,0x7c,0xff,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_eq_u16 vcc, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x75,0x7c,0xff,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_eq_u16 vcc_lo, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x75,0x7c,0xff,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_eq_u16 vcc, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x75,0x7c,0xff,0x6f,0x0d,0x30]
 
 0xfa,0x04,0x94,0x7c,0x01,0x1b,0x00,0xff
 # W32: v_cmp_eq_u32 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x94,0x7c,0x01,0x1b,0x00,0xff]
@@ -565,60 +645,100 @@
 # W64: v_cmp_ge_f32 vcc, -|v255|, -|v255| row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x2d,0x7c,0xff,0x6f,0xfd,0x30]
 
 0xfa,0x04,0x6c,0x7c,0x01,0x1b,0x00,0xff
-# W32: v_cmp_ge_i16 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x1b,0x00,0xff]
-# W64: v_cmp_ge_i16 vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x1b,0x00,0xff]
+# W32-REAL16: v_cmp_ge_i16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x1b,0x00,0xff]
+# W64-REAL16: v_cmp_ge_i16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x1b,0x00,0xff]
+# W32-FAKE16: v_cmp_ge_i16 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x1b,0x00,0xff]
+# W64-FAKE16: v_cmp_ge_i16 vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x1b,0x00,0xff]
 
 0xfa,0x04,0x6c,0x7c,0x01,0xe4,0x00,0xff
-# W32: v_cmp_ge_i16 vcc_lo, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0xe4,0x00,0xff]
-# W64: v_cmp_ge_i16 vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0xe4,0x00,0xff]
+# W32-REAL16: v_cmp_ge_i16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0xe4,0x00,0xff]
+# W64-REAL16: v_cmp_ge_i16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0xe4,0x00,0xff]
+# W32-FAKE16: v_cmp_ge_i16 vcc_lo, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0xe4,0x00,0xff]
+# W64-FAKE16: v_cmp_ge_i16 vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0xe4,0x00,0xff]
 
 0xfa,0x04,0x6c,0x7c,0x01,0x40,0x01,0xff
-# W32: v_cmp_ge_i16 vcc_lo, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x40,0x01,0xff]
-# W64: v_cmp_ge_i16 vcc, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x40,0x01,0xff]
+# W32-REAL16: v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x40,0x01,0xff]
+# W64-REAL16: v_cmp_ge_i16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x40,0x01,0xff]
+# W32-FAKE16: v_cmp_ge_i16 vcc_lo, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x40,0x01,0xff]
+# W64-FAKE16: v_cmp_ge_i16 vcc, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x40,0x01,0xff]
 
 0xfa,0x04,0x6c,0x7c,0x01,0x41,0x01,0xff
-# W32: v_cmp_ge_i16 vcc_lo, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x41,0x01,0xff]
-# W64: v_cmp_ge_i16 vcc, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x41,0x01,0xff]
+# W32-REAL16: v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x41,0x01,0xff]
+# W64-REAL16: v_cmp_ge_i16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x41,0x01,0xff]
+# W32-FAKE16: v_cmp_ge_i16 vcc_lo, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x41,0x01,0xff]
+# W64-FAKE16: v_cmp_ge_i16 vcc, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x41,0x01,0xff]
 
 0xfa,0x04,0x6c,0x7c,0x01,0x01,0x01,0xff
-# W32: v_cmp_ge_i16 vcc_lo, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x01,0x01,0xff]
-# W64: v_cmp_ge_i16 vcc, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x01,0x01,0xff]
+# W32-REAL16: v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x01,0x01,0xff]
+# W64-REAL16: v_cmp_ge_i16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x01,0x01,0xff]
+# W32-FAKE16: v_cmp_ge_i16 vcc_lo, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x01,0x01,0xff]
+# W64-FAKE16: v_cmp_ge_i16 vcc, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x01,0x01,0xff]
 
 0xfa,0x04,0x6c,0x7c,0x01,0x0f,0x01,0xff
-# W32: v_cmp_ge_i16 vcc_lo, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x0f,0x01,0xff]
-# W64: v_cmp_ge_i16 vcc, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x0f,0x01,0xff]
+# W32-REAL16: v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x0f,0x01,0xff]
+# W64-REAL16: v_cmp_ge_i16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x0f,0x01,0xff]
+# W32-FAKE16: v_cmp_ge_i16 vcc_lo, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x0f,0x01,0xff]
+# W64-FAKE16: v_cmp_ge_i16 vcc, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x0f,0x01,0xff]
 
 0xfa,0x04,0x6c,0x7c,0x01,0x11,0x01,0xff
-# W32: v_cmp_ge_i16 vcc_lo, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x11,0x01,0xff]
-# W64: v_cmp_ge_i16 vcc, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x11,0x01,0xff]
+# W32-REAL16: v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x11,0x01,0xff]
+# W64-REAL16: v_cmp_ge_i16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x11,0x01,0xff]
+# W32-FAKE16: v_cmp_ge_i16 vcc_lo, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x11,0x01,0xff]
+# W64-FAKE16: v_cmp_ge_i16 vcc, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x11,0x01,0xff]
 
 0xfa,0x04,0x6c,0x7c,0x01,0x1f,0x01,0xff
-# W32: v_cmp_ge_i16 vcc_lo, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x1f,0x01,0xff]
-# W64: v_cmp_ge_i16 vcc, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x1f,0x01,0xff]
+# W32-REAL16: v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x1f,0x01,0xff]
+# W64-REAL16: v_cmp_ge_i16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x1f,0x01,0xff]
+# W32-FAKE16: v_cmp_ge_i16 vcc_lo, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x1f,0x01,0xff]
+# W64-FAKE16: v_cmp_ge_i16 vcc, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x1f,0x01,0xff]
 
 0xfa,0x04,0x6c,0x7c,0x01,0x21,0x01,0xff
-# W32: v_cmp_ge_i16 vcc_lo, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x21,0x01,0xff]
-# W64: v_cmp_ge_i16 vcc, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x21,0x01,0xff]
+# W32-REAL16: v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x21,0x01,0xff]
+# W64-REAL16: v_cmp_ge_i16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x21,0x01,0xff]
+# W32-FAKE16: v_cmp_ge_i16 vcc_lo, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x21,0x01,0xff]
+# W64-FAKE16: v_cmp_ge_i16 vcc, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x21,0x01,0xff]
 
 0xfa,0x04,0x6c,0x7c,0x01,0x2f,0x01,0xff
-# W32: v_cmp_ge_i16 vcc_lo, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x2f,0x01,0xff]
-# W64: v_cmp_ge_i16 vcc, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x2f,0x01,0xff]
+# W32-REAL16: v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x2f,0x01,0xff]
+# W64-REAL16: v_cmp_ge_i16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x2f,0x01,0xff]
+# W32-FAKE16: v_cmp_ge_i16 vcc_lo, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x2f,0x01,0xff]
+# W64-FAKE16: v_cmp_ge_i16 vcc, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x2f,0x01,0xff]
 
 0xfa,0x04,0x6c,0x7c,0x01,0x50,0x01,0xff
-# W32: v_cmp_ge_i16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x50,0x01,0xff]
-# W64: v_cmp_ge_i16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x50,0x01,0xff]
+# W32-REAL16: v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x50,0x01,0xff]
+# W64-REAL16: v_cmp_ge_i16 vcc, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x50,0x01,0xff]
+# W32-FAKE16: v_cmp_ge_i16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x50,0x01,0xff]
+# W64-FAKE16: v_cmp_ge_i16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x50,0x01,0xff]
 
 0xfa,0x04,0x6c,0x7c,0x01,0x5f,0x01,0x01
-# W32: v_cmp_ge_i16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x5f,0x01,0x01]
-# W64: v_cmp_ge_i16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x5f,0x01,0x01]
+# W32-REAL16: v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x5f,0x01,0x01]
+# W64-REAL16: v_cmp_ge_i16 vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x5f,0x01,0x01]
+# W32-FAKE16: v_cmp_ge_i16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x5f,0x01,0x01]
+# W64-FAKE16: v_cmp_ge_i16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x5f,0x01,0x01]
 
 0xfa,0x04,0x6c,0x7c,0x01,0x60,0x01,0x13
-# W32: v_cmp_ge_i16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x60,0x01,0x13]
-# W64: v_cmp_ge_i16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x60,0x01,0x13]
+# W32-REAL16: v_cmp_ge_i16 vcc_lo, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_ge_i16 vcc, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_ge_i16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_ge_i16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x6c,0x7c,0x01,0x60,0x01,0x13]
 
 0xfa,0xfe,0x6c,0x7c,0x7f,0x6f,0x0d,0x30
-# W32: v_cmp_ge_i16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x6c,0x7c,0x7f,0x6f,0x0d,0x30]
-# W64: v_cmp_ge_i16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x6c,0x7c,0x7f,0x6f,0x0d,0x30]
+# W32-REAL16: v_cmp_ge_i16 vcc_lo, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x6c,0x7c,0x7f,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_ge_i16 vcc, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x6c,0x7c,0x7f,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_ge_i16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x6c,0x7c,0x7f,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_ge_i16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x6c,0x7c,0x7f,0x6f,0x0d,0x30]
+
+0xfa,0x04,0x6d,0x7c,0x81,0x60,0x01,0x13
+# W32-REAL16: v_cmp_ge_i16 vcc_lo, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x6d,0x7c,0x81,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_ge_i16 vcc, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x6d,0x7c,0x81,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_ge_i16 vcc_lo, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x6d,0x7c,0x81,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_ge_i16 vcc, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x6d,0x7c,0x81,0x60,0x01,0x13]
+
+0xfa,0xfe,0x6d,0x7c,0xff,0x6f,0x0d,0x30
+# W32-REAL16: v_cmp_ge_i16 vcc_lo, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x6d,0x7c,0xff,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_ge_i16 vcc, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x6d,0x7c,0xff,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_ge_i16 vcc_lo, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x6d,0x7c,0xff,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_ge_i16 vcc, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x6d,0x7c,0xff,0x6f,0x0d,0x30]
 
 0xfa,0x04,0x8c,0x7c,0x01,0x1b,0x00,0xff
 # W32: v_cmp_ge_i32 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x8c,0x7c,0x01,0x1b,0x00,0xff]
@@ -677,60 +797,100 @@
 # W64: v_cmp_ge_i32 vcc, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x8d,0x7c,0xff,0x6f,0x0d,0x30]
 
 0xfa,0x04,0x7c,0x7c,0x01,0x1b,0x00,0xff
-# W32: v_cmp_ge_u16 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x1b,0x00,0xff]
-# W64: v_cmp_ge_u16 vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x1b,0x00,0xff]
+# W32-REAL16: v_cmp_ge_u16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x1b,0x00,0xff]
+# W64-REAL16: v_cmp_ge_u16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x1b,0x00,0xff]
+# W32-FAKE16: v_cmp_ge_u16 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x1b,0x00,0xff]
+# W64-FAKE16: v_cmp_ge_u16 vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x1b,0x00,0xff]
 
 0xfa,0x04,0x7c,0x7c,0x01,0xe4,0x00,0xff
-# W32: v_cmp_ge_u16 vcc_lo, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0xe4,0x00,0xff]
-# W64: v_cmp_ge_u16 vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0xe4,0x00,0xff]
+# W32-REAL16: v_cmp_ge_u16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0xe4,0x00,0xff]
+# W64-REAL16: v_cmp_ge_u16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0xe4,0x00,0xff]
+# W32-FAKE16: v_cmp_ge_u16 vcc_lo, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0xe4,0x00,0xff]
+# W64-FAKE16: v_cmp_ge_u16 vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0xe4,0x00,0xff]
 
 0xfa,0x04,0x7c,0x7c,0x01,0x40,0x01,0xff
-# W32: v_cmp_ge_u16 vcc_lo, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x40,0x01,0xff]
-# W64: v_cmp_ge_u16 vcc, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x40,0x01,0xff]
+# W32-REAL16: v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x40,0x01,0xff]
+# W64-REAL16: v_cmp_ge_u16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x40,0x01,0xff]
+# W32-FAKE16: v_cmp_ge_u16 vcc_lo, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x40,0x01,0xff]
+# W64-FAKE16: v_cmp_ge_u16 vcc, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x40,0x01,0xff]
 
 0xfa,0x04,0x7c,0x7c,0x01,0x41,0x01,0xff
-# W32: v_cmp_ge_u16 vcc_lo, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x41,0x01,0xff]
-# W64: v_cmp_ge_u16 vcc, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x41,0x01,0xff]
+# W32-REAL16: v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x41,0x01,0xff]
+# W64-REAL16: v_cmp_ge_u16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x41,0x01,0xff]
+# W32-FAKE16: v_cmp_ge_u16 vcc_lo, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x41,0x01,0xff]
+# W64-FAKE16: v_cmp_ge_u16 vcc, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x41,0x01,0xff]
 
 0xfa,0x04,0x7c,0x7c,0x01,0x01,0x01,0xff
-# W32: v_cmp_ge_u16 vcc_lo, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x01,0x01,0xff]
-# W64: v_cmp_ge_u16 vcc, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x01,0x01,0xff]
+# W32-REAL16: v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x01,0x01,0xff]
+# W64-REAL16: v_cmp_ge_u16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x01,0x01,0xff]
+# W32-FAKE16: v_cmp_ge_u16 vcc_lo, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x01,0x01,0xff]
+# W64-FAKE16: v_cmp_ge_u16 vcc, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x01,0x01,0xff]
 
 0xfa,0x04,0x7c,0x7c,0x01,0x0f,0x01,0xff
-# W32: v_cmp_ge_u16 vcc_lo, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x0f,0x01,0xff]
-# W64: v_cmp_ge_u16 vcc, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x0f,0x01,0xff]
+# W32-REAL16: v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x0f,0x01,0xff]
+# W64-REAL16: v_cmp_ge_u16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x0f,0x01,0xff]
+# W32-FAKE16: v_cmp_ge_u16 vcc_lo, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x0f,0x01,0xff]
+# W64-FAKE16: v_cmp_ge_u16 vcc, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x0f,0x01,0xff]
 
 0xfa,0x04,0x7c,0x7c,0x01,0x11,0x01,0xff
-# W32: v_cmp_ge_u16 vcc_lo, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x11,0x01,0xff]
-# W64: v_cmp_ge_u16 vcc, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x11,0x01,0xff]
+# W32-REAL16: v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x11,0x01,0xff]
+# W64-REAL16: v_cmp_ge_u16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x11,0x01,0xff]
+# W32-FAKE16: v_cmp_ge_u16 vcc_lo, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x11,0x01,0xff]
+# W64-FAKE16: v_cmp_ge_u16 vcc, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x11,0x01,0xff]
 
 0xfa,0x04,0x7c,0x7c,0x01,0x1f,0x01,0xff
-# W32: v_cmp_ge_u16 vcc_lo, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x1f,0x01,0xff]
-# W64: v_cmp_ge_u16 vcc, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x1f,0x01,0xff]
+# W32-REAL16: v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x1f,0x01,0xff]
+# W64-REAL16: v_cmp_ge_u16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x1f,0x01,0xff]
+# W32-FAKE16: v_cmp_ge_u16 vcc_lo, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x1f,0x01,0xff]
+# W64-FAKE16: v_cmp_ge_u16 vcc, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x1f,0x01,0xff]
 
 0xfa,0x04,0x7c,0x7c,0x01,0x21,0x01,0xff
-# W32: v_cmp_ge_u16 vcc_lo, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x21,0x01,0xff]
-# W64: v_cmp_ge_u16 vcc, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x21,0x01,0xff]
+# W32-REAL16: v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x21,0x01,0xff]
+# W64-REAL16: v_cmp_ge_u16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x21,0x01,0xff]
+# W32-FAKE16: v_cmp_ge_u16 vcc_lo, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x21,0x01,0xff]
+# W64-FAKE16: v_cmp_ge_u16 vcc, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x21,0x01,0xff]
 
 0xfa,0x04,0x7c,0x7c,0x01,0x2f,0x01,0xff
-# W32: v_cmp_ge_u16 vcc_lo, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x2f,0x01,0xff]
-# W64: v_cmp_ge_u16 vcc, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x2f,0x01,0xff]
+# W32-REAL16: v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x2f,0x01,0xff]
+# W64-REAL16: v_cmp_ge_u16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x2f,0x01,0xff]
+# W32-FAKE16: v_cmp_ge_u16 vcc_lo, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x2f,0x01,0xff]
+# W64-FAKE16: v_cmp_ge_u16 vcc, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x2f,0x01,0xff]
 
 0xfa,0x04,0x7c,0x7c,0x01,0x50,0x01,0xff
-# W32: v_cmp_ge_u16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x50,0x01,0xff]
-# W64: v_cmp_ge_u16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x50,0x01,0xff]
+# W32-REAL16: v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x50,0x01,0xff]
+# W64-REAL16: v_cmp_ge_u16 vcc, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x50,0x01,0xff]
+# W32-FAKE16: v_cmp_ge_u16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x50,0x01,0xff]
+# W64-FAKE16: v_cmp_ge_u16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x50,0x01,0xff]
 
 0xfa,0x04,0x7c,0x7c,0x01,0x5f,0x01,0x01
-# W32: v_cmp_ge_u16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x5f,0x01,0x01]
-# W64: v_cmp_ge_u16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x5f,0x01,0x01]
+# W32-REAL16: v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x5f,0x01,0x01]
+# W64-REAL16: v_cmp_ge_u16 vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x5f,0x01,0x01]
+# W32-FAKE16: v_cmp_ge_u16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x5f,0x01,0x01]
+# W64-FAKE16: v_cmp_ge_u16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x5f,0x01,0x01]
 
 0xfa,0x04,0x7c,0x7c,0x01,0x60,0x01,0x13
-# W32: v_cmp_ge_u16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x60,0x01,0x13]
-# W64: v_cmp_ge_u16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x60,0x01,0x13]
+# W32-REAL16: v_cmp_ge_u16 vcc_lo, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_ge_u16 vcc, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_ge_u16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_ge_u16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x7c,0x7c,0x01,0x60,0x01,0x13]
 
 0xfa,0xfe,0x7c,0x7c,0x7f,0x6f,0x0d,0x30
-# W32: v_cmp_ge_u16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x7c,0x7c,0x7f,0x6f,0x0d,0x30]
-# W64: v_cmp_ge_u16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x7c,0x7c,0x7f,0x6f,0x0d,0x30]
+# W32-REAL16: v_cmp_ge_u16 vcc_lo, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x7c,0x7c,0x7f,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_ge_u16 vcc, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x7c,0x7c,0x7f,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_ge_u16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x7c,0x7c,0x7f,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_ge_u16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x7c,0x7c,0x7f,0x6f,0x0d,0x30]
+
+0xfa,0x04,0x7d,0x7c,0x81,0x60,0x01,0x13
+# W32-REAL16: v_cmp_ge_u16 vcc_lo, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x7d,0x7c,0x81,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_ge_u16 vcc, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x7d,0x7c,0x81,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_ge_u16 vcc_lo, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x7d,0x7c,0x81,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_ge_u16 vcc, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x7d,0x7c,0x81,0x60,0x01,0x13]
+
+0xfa,0xfe,0x7d,0x7c,0xff,0x6f,0x0d,0x30
+# W32-REAL16: v_cmp_ge_u16 vcc_lo, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x7d,0x7c,0xff,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_ge_u16 vcc, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x7d,0x7c,0xff,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_ge_u16 vcc_lo, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x7d,0x7c,0xff,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_ge_u16 vcc, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x7d,0x7c,0xff,0x6f,0x0d,0x30]
 
 0xfa,0x04,0x9c,0x7c,0x01,0x1b,0x00,0xff
 # W32: v_cmp_ge_u32 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x9c,0x7c,0x01,0x1b,0x00,0xff]
@@ -901,60 +1061,100 @@
 # W64: v_cmp_gt_f32 vcc, -|v255|, -|v255| row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x29,0x7c,0xff,0x6f,0xfd,0x30]
 
 0xfa,0x04,0x68,0x7c,0x01,0x1b,0x00,0xff
-# W32: v_cmp_gt_i16 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x1b,0x00,0xff]
-# W64: v_cmp_gt_i16 vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x1b,0x00,0xff]
+# W32-REAL16: v_cmp_gt_i16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x1b,0x00,0xff]
+# W64-REAL16: v_cmp_gt_i16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x1b,0x00,0xff]
+# W32-FAKE16: v_cmp_gt_i16 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x1b,0x00,0xff]
+# W64-FAKE16: v_cmp_gt_i16 vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x1b,0x00,0xff]
 
 0xfa,0x04,0x68,0x7c,0x01,0xe4,0x00,0xff
-# W32: v_cmp_gt_i16 vcc_lo, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0xe4,0x00,0xff]
-# W64: v_cmp_gt_i16 vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0xe4,0x00,0xff]
+# W32-REAL16: v_cmp_gt_i16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0xe4,0x00,0xff]
+# W64-REAL16: v_cmp_gt_i16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0xe4,0x00,0xff]
+# W32-FAKE16: v_cmp_gt_i16 vcc_lo, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0xe4,0x00,0xff]
+# W64-FAKE16: v_cmp_gt_i16 vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0xe4,0x00,0xff]
 
 0xfa,0x04,0x68,0x7c,0x01,0x40,0x01,0xff
-# W32: v_cmp_gt_i16 vcc_lo, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x40,0x01,0xff]
-# W64: v_cmp_gt_i16 vcc, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x40,0x01,0xff]
+# W32-REAL16: v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x40,0x01,0xff]
+# W64-REAL16: v_cmp_gt_i16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x40,0x01,0xff]
+# W32-FAKE16: v_cmp_gt_i16 vcc_lo, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x40,0x01,0xff]
+# W64-FAKE16: v_cmp_gt_i16 vcc, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x40,0x01,0xff]
 
 0xfa,0x04,0x68,0x7c,0x01,0x41,0x01,0xff
-# W32: v_cmp_gt_i16 vcc_lo, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x41,0x01,0xff]
-# W64: v_cmp_gt_i16 vcc, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x41,0x01,0xff]
+# W32-REAL16: v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x41,0x01,0xff]
+# W64-REAL16: v_cmp_gt_i16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x41,0x01,0xff]
+# W32-FAKE16: v_cmp_gt_i16 vcc_lo, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x41,0x01,0xff]
+# W64-FAKE16: v_cmp_gt_i16 vcc, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x41,0x01,0xff]
 
 0xfa,0x04,0x68,0x7c,0x01,0x01,0x01,0xff
-# W32: v_cmp_gt_i16 vcc_lo, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x01,0x01,0xff]
-# W64: v_cmp_gt_i16 vcc, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x01,0x01,0xff]
+# W32-REAL16: v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x01,0x01,0xff]
+# W64-REAL16: v_cmp_gt_i16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x01,0x01,0xff]
+# W32-FAKE16: v_cmp_gt_i16 vcc_lo, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x01,0x01,0xff]
+# W64-FAKE16: v_cmp_gt_i16 vcc, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x01,0x01,0xff]
 
 0xfa,0x04,0x68,0x7c,0x01,0x0f,0x01,0xff
-# W32: v_cmp_gt_i16 vcc_lo, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x0f,0x01,0xff]
-# W64: v_cmp_gt_i16 vcc, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x0f,0x01,0xff]
+# W32-REAL16: v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x0f,0x01,0xff]
+# W64-REAL16: v_cmp_gt_i16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x0f,0x01,0xff]
+# W32-FAKE16: v_cmp_gt_i16 vcc_lo, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x0f,0x01,0xff]
+# W64-FAKE16: v_cmp_gt_i16 vcc, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x0f,0x01,0xff]
 
 0xfa,0x04,0x68,0x7c,0x01,0x11,0x01,0xff
-# W32: v_cmp_gt_i16 vcc_lo, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x11,0x01,0xff]
-# W64: v_cmp_gt_i16 vcc, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x11,0x01,0xff]
+# W32-REAL16: v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x11,0x01,0xff]
+# W64-REAL16: v_cmp_gt_i16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x11,0x01,0xff]
+# W32-FAKE16: v_cmp_gt_i16 vcc_lo, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x11,0x01,0xff]
+# W64-FAKE16: v_cmp_gt_i16 vcc, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x11,0x01,0xff]
 
 0xfa,0x04,0x68,0x7c,0x01,0x1f,0x01,0xff
-# W32: v_cmp_gt_i16 vcc_lo, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x1f,0x01,0xff]
-# W64: v_cmp_gt_i16 vcc, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x1f,0x01,0xff]
+# W32-REAL16: v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x1f,0x01,0xff]
+# W64-REAL16: v_cmp_gt_i16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x1f,0x01,0xff]
+# W32-FAKE16: v_cmp_gt_i16 vcc_lo, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x1f,0x01,0xff]
+# W64-FAKE16: v_cmp_gt_i16 vcc, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x1f,0x01,0xff]
 
 0xfa,0x04,0x68,0x7c,0x01,0x21,0x01,0xff
-# W32: v_cmp_gt_i16 vcc_lo, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x21,0x01,0xff]
-# W64: v_cmp_gt_i16 vcc, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x21,0x01,0xff]
+# W32-REAL16: v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x21,0x01,0xff]
+# W64-REAL16: v_cmp_gt_i16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x21,0x01,0xff]
+# W32-FAKE16: v_cmp_gt_i16 vcc_lo, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x21,0x01,0xff]
+# W64-FAKE16: v_cmp_gt_i16 vcc, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x21,0x01,0xff]
 
 0xfa,0x04,0x68,0x7c,0x01,0x2f,0x01,0xff
-# W32: v_cmp_gt_i16 vcc_lo, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x2f,0x01,0xff]
-# W64: v_cmp_gt_i16 vcc, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x2f,0x01,0xff]
+# W32-REAL16: v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x2f,0x01,0xff]
+# W64-REAL16: v_cmp_gt_i16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x2f,0x01,0xff]
+# W32-FAKE16: v_cmp_gt_i16 vcc_lo, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x2f,0x01,0xff]
+# W64-FAKE16: v_cmp_gt_i16 vcc, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x2f,0x01,0xff]
 
 0xfa,0x04,0x68,0x7c,0x01,0x50,0x01,0xff
-# W32: v_cmp_gt_i16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x50,0x01,0xff]
-# W64: v_cmp_gt_i16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x50,0x01,0xff]
+# W32-REAL16: v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x50,0x01,0xff]
+# W64-REAL16: v_cmp_gt_i16 vcc, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x50,0x01,0xff]
+# W32-FAKE16: v_cmp_gt_i16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x50,0x01,0xff]
+# W64-FAKE16: v_cmp_gt_i16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x50,0x01,0xff]
 
 0xfa,0x04,0x68,0x7c,0x01,0x5f,0x01,0x01
-# W32: v_cmp_gt_i16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x5f,0x01,0x01]
-# W64: v_cmp_gt_i16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x5f,0x01,0x01]
+# W32-REAL16: v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x5f,0x01,0x01]
+# W64-REAL16: v_cmp_gt_i16 vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x5f,0x01,0x01]
+# W32-FAKE16: v_cmp_gt_i16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x5f,0x01,0x01]
+# W64-FAKE16: v_cmp_gt_i16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x5f,0x01,0x01]
 
 0xfa,0x04,0x68,0x7c,0x01,0x60,0x01,0x13
-# W32: v_cmp_gt_i16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x60,0x01,0x13]
-# W64: v_cmp_gt_i16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x60,0x01,0x13]
+# W32-REAL16: v_cmp_gt_i16 vcc_lo, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_gt_i16 vcc, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_gt_i16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_gt_i16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x68,0x7c,0x01,0x60,0x01,0x13]
 
 0xfa,0xfe,0x68,0x7c,0x7f,0x6f,0x0d,0x30
-# W32: v_cmp_gt_i16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x68,0x7c,0x7f,0x6f,0x0d,0x30]
-# W64: v_cmp_gt_i16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x68,0x7c,0x7f,0x6f,0x0d,0x30]
+# W32-REAL16: v_cmp_gt_i16 vcc_lo, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x68,0x7c,0x7f,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_gt_i16 vcc, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x68,0x7c,0x7f,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_gt_i16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x68,0x7c,0x7f,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_gt_i16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x68,0x7c,0x7f,0x6f,0x0d,0x30]
+
+0xfa,0x04,0x69,0x7c,0x81,0x60,0x01,0x13
+# W32-REAL16: v_cmp_gt_i16 vcc_lo, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x69,0x7c,0x81,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_gt_i16 vcc, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x69,0x7c,0x81,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_gt_i16 vcc_lo, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x69,0x7c,0x81,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_gt_i16 vcc, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x69,0x7c,0x81,0x60,0x01,0x13]
+
+0xfa,0xfe,0x69,0x7c,0xff,0x6f,0x0d,0x30
+# W32-REAL16: v_cmp_gt_i16 vcc_lo, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x69,0x7c,0xff,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_gt_i16 vcc, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x69,0x7c,0xff,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_gt_i16 vcc_lo, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x69,0x7c,0xff,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_gt_i16 vcc, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x69,0x7c,0xff,0x6f,0x0d,0x30]
 
 0xfa,0x04,0x88,0x7c,0x01,0x1b,0x00,0xff
 # W32: v_cmp_gt_i32 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x88,0x7c,0x01,0x1b,0x00,0xff]
@@ -1013,60 +1213,100 @@
 # W64: v_cmp_gt_i32 vcc, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x89,0x7c,0xff,0x6f,0x0d,0x30]
 
 0xfa,0x04,0x78,0x7c,0x01,0x1b,0x00,0xff
-# W32: v_cmp_gt_u16 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x1b,0x00,0xff]
-# W64: v_cmp_gt_u16 vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x1b,0x00,0xff]
+# W32-REAL16: v_cmp_gt_u16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x1b,0x00,0xff]
+# W64-REAL16: v_cmp_gt_u16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x1b,0x00,0xff]
+# W32-FAKE16: v_cmp_gt_u16 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x1b,0x00,0xff]
+# W64-FAKE16: v_cmp_gt_u16 vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x1b,0x00,0xff]
 
 0xfa,0x04,0x78,0x7c,0x01,0xe4,0x00,0xff
-# W32: v_cmp_gt_u16 vcc_lo, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0xe4,0x00,0xff]
-# W64: v_cmp_gt_u16 vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0xe4,0x00,0xff]
+# W32-REAL16: v_cmp_gt_u16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0xe4,0x00,0xff]
+# W64-REAL16: v_cmp_gt_u16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0xe4,0x00,0xff]
+# W32-FAKE16: v_cmp_gt_u16 vcc_lo, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0xe4,0x00,0xff]
+# W64-FAKE16: v_cmp_gt_u16 vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0xe4,0x00,0xff]
 
 0xfa,0x04,0x78,0x7c,0x01,0x40,0x01,0xff
-# W32: v_cmp_gt_u16 vcc_lo, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x40,0x01,0xff]
-# W64: v_cmp_gt_u16 vcc, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x40,0x01,0xff]
+# W32-REAL16: v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x40,0x01,0xff]
+# W64-REAL16: v_cmp_gt_u16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x40,0x01,0xff]
+# W32-FAKE16: v_cmp_gt_u16 vcc_lo, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x40,0x01,0xff]
+# W64-FAKE16: v_cmp_gt_u16 vcc, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x40,0x01,0xff]
 
 0xfa,0x04,0x78,0x7c,0x01,0x41,0x01,0xff
-# W32: v_cmp_gt_u16 vcc_lo, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x41,0x01,0xff]
-# W64: v_cmp_gt_u16 vcc, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x41,0x01,0xff]
+# W32-REAL16: v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x41,0x01,0xff]
+# W64-REAL16: v_cmp_gt_u16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x41,0x01,0xff]
+# W32-FAKE16: v_cmp_gt_u16 vcc_lo, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x41,0x01,0xff]
+# W64-FAKE16: v_cmp_gt_u16 vcc, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x41,0x01,0xff]
 
 0xfa,0x04,0x78,0x7c,0x01,0x01,0x01,0xff
-# W32: v_cmp_gt_u16 vcc_lo, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x01,0x01,0xff]
-# W64: v_cmp_gt_u16 vcc, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x01,0x01,0xff]
+# W32-REAL16: v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x01,0x01,0xff]
+# W64-REAL16: v_cmp_gt_u16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x01,0x01,0xff]
+# W32-FAKE16: v_cmp_gt_u16 vcc_lo, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x01,0x01,0xff]
+# W64-FAKE16: v_cmp_gt_u16 vcc, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x01,0x01,0xff]
 
 0xfa,0x04,0x78,0x7c,0x01,0x0f,0x01,0xff
-# W32: v_cmp_gt_u16 vcc_lo, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x0f,0x01,0xff]
-# W64: v_cmp_gt_u16 vcc, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x0f,0x01,0xff]
+# W32-REAL16: v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x0f,0x01,0xff]
+# W64-REAL16: v_cmp_gt_u16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x0f,0x01,0xff]
+# W32-FAKE16: v_cmp_gt_u16 vcc_lo, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x0f,0x01,0xff]
+# W64-FAKE16: v_cmp_gt_u16 vcc, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x0f,0x01,0xff]
 
 0xfa,0x04,0x78,0x7c,0x01,0x11,0x01,0xff
-# W32: v_cmp_gt_u16 vcc_lo, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x11,0x01,0xff]
-# W64: v_cmp_gt_u16 vcc, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x11,0x01,0xff]
+# W32-REAL16: v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x11,0x01,0xff]
+# W64-REAL16: v_cmp_gt_u16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x11,0x01,0xff]
+# W32-FAKE16: v_cmp_gt_u16 vcc_lo, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x11,0x01,0xff]
+# W64-FAKE16: v_cmp_gt_u16 vcc, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x11,0x01,0xff]
 
 0xfa,0x04,0x78,0x7c,0x01,0x1f,0x01,0xff
-# W32: v_cmp_gt_u16 vcc_lo, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x1f,0x01,0xff]
-# W64: v_cmp_gt_u16 vcc, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x1f,0x01,0xff]
+# W32-REAL16: v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x1f,0x01,0xff]
+# W64-REAL16: v_cmp_gt_u16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x1f,0x01,0xff]
+# W32-FAKE16: v_cmp_gt_u16 vcc_lo, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x1f,0x01,0xff]
+# W64-FAKE16: v_cmp_gt_u16 vcc, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x1f,0x01,0xff]
 
 0xfa,0x04,0x78,0x7c,0x01,0x21,0x01,0xff
-# W32: v_cmp_gt_u16 vcc_lo, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x21,0x01,0xff]
-# W64: v_cmp_gt_u16 vcc, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x21,0x01,0xff]
+# W32-REAL16: v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x21,0x01,0xff]
+# W64-REAL16: v_cmp_gt_u16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x21,0x01,0xff]
+# W32-FAKE16: v_cmp_gt_u16 vcc_lo, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x21,0x01,0xff]
+# W64-FAKE16: v_cmp_gt_u16 vcc, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x21,0x01,0xff]
 
 0xfa,0x04,0x78,0x7c,0x01,0x2f,0x01,0xff
-# W32: v_cmp_gt_u16 vcc_lo, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x2f,0x01,0xff]
-# W64: v_cmp_gt_u16 vcc, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x2f,0x01,0xff]
+# W32-REAL16: v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x2f,0x01,0xff]
+# W64-REAL16: v_cmp_gt_u16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x2f,0x01,0xff]
+# W32-FAKE16: v_cmp_gt_u16 vcc_lo, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x2f,0x01,0xff]
+# W64-FAKE16: v_cmp_gt_u16 vcc, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x2f,0x01,0xff]
 
 0xfa,0x04,0x78,0x7c,0x01,0x50,0x01,0xff
-# W32: v_cmp_gt_u16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x50,0x01,0xff]
-# W64: v_cmp_gt_u16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x50,0x01,0xff]
+# W32-REAL16: v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x50,0x01,0xff]
+# W64-REAL16: v_cmp_gt_u16 vcc, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x50,0x01,0xff]
+# W32-FAKE16: v_cmp_gt_u16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x50,0x01,0xff]
+# W64-FAKE16: v_cmp_gt_u16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x50,0x01,0xff]
 
 0xfa,0x04,0x78,0x7c,0x01,0x5f,0x01,0x01
-# W32: v_cmp_gt_u16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x5f,0x01,0x01]
-# W64: v_cmp_gt_u16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x5f,0x01,0x01]
+# W32-REAL16: v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x5f,0x01,0x01]
+# W64-REAL16: v_cmp_gt_u16 vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x5f,0x01,0x01]
+# W32-FAKE16: v_cmp_gt_u16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x5f,0x01,0x01]
+# W64-FAKE16: v_cmp_gt_u16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x5f,0x01,0x01]
 
 0xfa,0x04,0x78,0x7c,0x01,0x60,0x01,0x13
-# W32: v_cmp_gt_u16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x60,0x01,0x13]
-# W64: v_cmp_gt_u16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x60,0x01,0x13]
+# W32-REAL16: v_cmp_gt_u16 vcc_lo, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_gt_u16 vcc, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_gt_u16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_gt_u16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x78,0x7c,0x01,0x60,0x01,0x13]
 
 0xfa,0xfe,0x78,0x7c,0x7f,0x6f,0x0d,0x30
-# W32: v_cmp_gt_u16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x78,0x7c,0x7f,0x6f,0x0d,0x30]
-# W64: v_cmp_gt_u16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x78,0x7c,0x7f,0x6f,0x0d,0x30]
+# W32-REAL16: v_cmp_gt_u16 vcc_lo, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x78,0x7c,0x7f,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_gt_u16 vcc, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x78,0x7c,0x7f,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_gt_u16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x78,0x7c,0x7f,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_gt_u16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x78,0x7c,0x7f,0x6f,0x0d,0x30]
+
+0xfa,0x04,0x79,0x7c,0x81,0x60,0x01,0x13
+# W32-REAL16: v_cmp_gt_u16 vcc_lo, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x79,0x7c,0x81,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_gt_u16 vcc, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x79,0x7c,0x81,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_gt_u16 vcc_lo, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x79,0x7c,0x81,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_gt_u16 vcc, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x79,0x7c,0x81,0x60,0x01,0x13]
+
+0xfa,0xfe,0x79,0x7c,0xff,0x6f,0x0d,0x30
+# W32-REAL16: v_cmp_gt_u16 vcc_lo, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x79,0x7c,0xff,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_gt_u16 vcc, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x79,0x7c,0xff,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_gt_u16 vcc_lo, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x79,0x7c,0xff,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_gt_u16 vcc, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x79,0x7c,0xff,0x6f,0x0d,0x30]
 
 0xfa,0x04,0x98,0x7c,0x01,0x1b,0x00,0xff
 # W32: v_cmp_gt_u32 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x98,0x7c,0x01,0x1b,0x00,0xff]
@@ -1237,60 +1477,100 @@
 # W64: v_cmp_le_f32 vcc, -|v255|, -|v255| row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x27,0x7c,0xff,0x6f,0xfd,0x30]
 
 0xfa,0x04,0x66,0x7c,0x01,0x1b,0x00,0xff
-# W32: v_cmp_le_i16 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x1b,0x00,0xff]
-# W64: v_cmp_le_i16 vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x1b,0x00,0xff]
+# W32-REAL16: v_cmp_le_i16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x1b,0x00,0xff]
+# W64-REAL16: v_cmp_le_i16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x1b,0x00,0xff]
+# W32-FAKE16: v_cmp_le_i16 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x1b,0x00,0xff]
+# W64-FAKE16: v_cmp_le_i16 vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x1b,0x00,0xff]
 
 0xfa,0x04,0x66,0x7c,0x01,0xe4,0x00,0xff
-# W32: v_cmp_le_i16 vcc_lo, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0xe4,0x00,0xff]
-# W64: v_cmp_le_i16 vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0xe4,0x00,0xff]
+# W32-REAL16: v_cmp_le_i16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0xe4,0x00,0xff]
+# W64-REAL16: v_cmp_le_i16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0xe4,0x00,0xff]
+# W32-FAKE16: v_cmp_le_i16 vcc_lo, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0xe4,0x00,0xff]
+# W64-FAKE16: v_cmp_le_i16 vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0xe4,0x00,0xff]
 
 0xfa,0x04,0x66,0x7c,0x01,0x40,0x01,0xff
-# W32: v_cmp_le_i16 vcc_lo, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x40,0x01,0xff]
-# W64: v_cmp_le_i16 vcc, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x40,0x01,0xff]
+# W32-REAL16: v_cmp_le_i16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x40,0x01,0xff]
+# W64-REAL16: v_cmp_le_i16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x40,0x01,0xff]
+# W32-FAKE16: v_cmp_le_i16 vcc_lo, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x40,0x01,0xff]
+# W64-FAKE16: v_cmp_le_i16 vcc, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x40,0x01,0xff]
 
 0xfa,0x04,0x66,0x7c,0x01,0x41,0x01,0xff
-# W32: v_cmp_le_i16 vcc_lo, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x41,0x01,0xff]
-# W64: v_cmp_le_i16 vcc, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x41,0x01,0xff]
+# W32-REAL16: v_cmp_le_i16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x41,0x01,0xff]
+# W64-REAL16: v_cmp_le_i16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x41,0x01,0xff]
+# W32-FAKE16: v_cmp_le_i16 vcc_lo, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x41,0x01,0xff]
+# W64-FAKE16: v_cmp_le_i16 vcc, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x41,0x01,0xff]
 
 0xfa,0x04,0x66,0x7c,0x01,0x01,0x01,0xff
-# W32: v_cmp_le_i16 vcc_lo, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x01,0x01,0xff]
-# W64: v_cmp_le_i16 vcc, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x01,0x01,0xff]
+# W32-REAL16: v_cmp_le_i16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x01,0x01,0xff]
+# W64-REAL16: v_cmp_le_i16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x01,0x01,0xff]
+# W32-FAKE16: v_cmp_le_i16 vcc_lo, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x01,0x01,0xff]
+# W64-FAKE16: v_cmp_le_i16 vcc, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x01,0x01,0xff]
 
 0xfa,0x04,0x66,0x7c,0x01,0x0f,0x01,0xff
-# W32: v_cmp_le_i16 vcc_lo, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x0f,0x01,0xff]
-# W64: v_cmp_le_i16 vcc, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x0f,0x01,0xff]
+# W32-REAL16: v_cmp_le_i16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x0f,0x01,0xff]
+# W64-REAL16: v_cmp_le_i16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x0f,0x01,0xff]
+# W32-FAKE16: v_cmp_le_i16 vcc_lo, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x0f,0x01,0xff]
+# W64-FAKE16: v_cmp_le_i16 vcc, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x0f,0x01,0xff]
 
 0xfa,0x04,0x66,0x7c,0x01,0x11,0x01,0xff
-# W32: v_cmp_le_i16 vcc_lo, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x11,0x01,0xff]
-# W64: v_cmp_le_i16 vcc, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x11,0x01,0xff]
+# W32-REAL16: v_cmp_le_i16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x11,0x01,0xff]
+# W64-REAL16: v_cmp_le_i16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x11,0x01,0xff]
+# W32-FAKE16: v_cmp_le_i16 vcc_lo, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x11,0x01,0xff]
+# W64-FAKE16: v_cmp_le_i16 vcc, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x11,0x01,0xff]
 
 0xfa,0x04,0x66,0x7c,0x01,0x1f,0x01,0xff
-# W32: v_cmp_le_i16 vcc_lo, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x1f,0x01,0xff]
-# W64: v_cmp_le_i16 vcc, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x1f,0x01,0xff]
+# W32-REAL16: v_cmp_le_i16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x1f,0x01,0xff]
+# W64-REAL16: v_cmp_le_i16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x1f,0x01,0xff]
+# W32-FAKE16: v_cmp_le_i16 vcc_lo, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x1f,0x01,0xff]
+# W64-FAKE16: v_cmp_le_i16 vcc, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x1f,0x01,0xff]
 
 0xfa,0x04,0x66,0x7c,0x01,0x21,0x01,0xff
-# W32: v_cmp_le_i16 vcc_lo, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x21,0x01,0xff]
-# W64: v_cmp_le_i16 vcc, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x21,0x01,0xff]
+# W32-REAL16: v_cmp_le_i16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x21,0x01,0xff]
+# W64-REAL16: v_cmp_le_i16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x21,0x01,0xff]
+# W32-FAKE16: v_cmp_le_i16 vcc_lo, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x21,0x01,0xff]
+# W64-FAKE16: v_cmp_le_i16 vcc, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x21,0x01,0xff]
 
 0xfa,0x04,0x66,0x7c,0x01,0x2f,0x01,0xff
-# W32: v_cmp_le_i16 vcc_lo, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x2f,0x01,0xff]
-# W64: v_cmp_le_i16 vcc, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x2f,0x01,0xff]
+# W32-REAL16: v_cmp_le_i16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x2f,0x01,0xff]
+# W64-REAL16: v_cmp_le_i16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x2f,0x01,0xff]
+# W32-FAKE16: v_cmp_le_i16 vcc_lo, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x2f,0x01,0xff]
+# W64-FAKE16: v_cmp_le_i16 vcc, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x2f,0x01,0xff]
 
 0xfa,0x04,0x66,0x7c,0x01,0x50,0x01,0xff
-# W32: v_cmp_le_i16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x50,0x01,0xff]
-# W64: v_cmp_le_i16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x50,0x01,0xff]
+# W32-REAL16: v_cmp_le_i16 vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x50,0x01,0xff]
+# W64-REAL16: v_cmp_le_i16 vcc, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x50,0x01,0xff]
+# W32-FAKE16: v_cmp_le_i16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x50,0x01,0xff]
+# W64-FAKE16: v_cmp_le_i16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x50,0x01,0xff]
 
 0xfa,0x04,0x66,0x7c,0x01,0x5f,0x01,0x01
-# W32: v_cmp_le_i16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x5f,0x01,0x01]
-# W64: v_cmp_le_i16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x5f,0x01,0x01]
+# W32-REAL16: v_cmp_le_i16 vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x5f,0x01,0x01]
+# W64-REAL16: v_cmp_le_i16 vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x5f,0x01,0x01]
+# W32-FAKE16: v_cmp_le_i16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x5f,0x01,0x01]
+# W64-FAKE16: v_cmp_le_i16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x5f,0x01,0x01]
 
 0xfa,0x04,0x66,0x7c,0x01,0x60,0x01,0x13
-# W32: v_cmp_le_i16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x60,0x01,0x13]
-# W64: v_cmp_le_i16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x60,0x01,0x13]
+# W32-REAL16: v_cmp_le_i16 vcc_lo, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_le_i16 vcc, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_le_i16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_le_i16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x66,0x7c,0x01,0x60,0x01,0x13]
 
 0xfa,0xfe,0x66,0x7c,0x7f,0x6f,0x0d,0x30
-# W32: v_cmp_le_i16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x66,0x7c,0x7f,0x6f,0x0d,0x30]
-# W64: v_cmp_le_i16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x66,0x7c,0x7f,0x6f,0x0d,0x30]
+# W32-REAL16: v_cmp_le_i16 vcc_lo, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x66,0x7c,0x7f,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_le_i16 vcc, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x66,0x7c,0x7f,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_le_i16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x66,0x7c,0x7f,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_le_i16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x66,0x7c,0x7f,0x6f,0x0d,0x30]
+
+0xfa,0x04,0x67,0x7c,0x81,0x60,0x01,0x13
+# W32-REAL16: v_cmp_le_i16 vcc_lo, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x67,0x7c,0x81,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_le_i16 vcc, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x67,0x7c,0x81,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_le_i16 vcc_lo, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x67,0x7c,0x81,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_le_i16 vcc, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x67,0x7c,0x81,0x60,0x01,0x13]
+
+0xfa,0xfe,0x67,0x7c,0xff,0x6f,0x0d,0x30
+# W32-REAL16: v_cmp_le_i16 vcc_lo, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x67,0x7c,0xff,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_le_i16 vcc, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x67,0x7c,0xff,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_le_i16 vcc_lo, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x67,0x7c,0xff,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_le_i16 vcc, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x67,0x7c,0xff,0x6f,0x0d,0x30]
 
 0xfa,0x04,0x86,0x7c,0x01,0x1b,0x00,0xff
 # W32: v_cmp_le_i32 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x86,0x7c,0x01,0x1b,0x00,0xff]
@@ -1349,60 +1629,100 @@
 # W64: v_cmp_le_i32 vcc, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x87,0x7c,0xff,0x6f,0x0d,0x30]
 
 0xfa,0x04,0x76,0x7c,0x01,0x1b,0x00,0xff
-# W32: v_cmp_le_u16 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x1b,0x00,0xff]
-# W64: v_cmp_le_u16 vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x1b,0x00,0xff]
+# W32-REAL16: v_cmp_le_u16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x1b,0x00,0xff]
+# W64-REAL16: v_cmp_le_u16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x1b,0x00,0xff]
+# W32-FAKE16: v_cmp_le_u16 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x1b,0x00,0xff]
+# W64-FAKE16: v_cmp_le_u16 vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x1b,0x00,0xff]
 
 0xfa,0x04,0x76,0x7c,0x01,0xe4,0x00,0xff
-# W32: v_cmp_le_u16 vcc_lo, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0xe4,0x00,0xff]
-# W64: v_cmp_le_u16 vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0xe4,0x00,0xff]
+# W32-REAL16: v_cmp_le_u16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0xe4,0x00,0xff]
+# W64-REAL16: v_cmp_le_u16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0xe4,0x00,0xff]
+# W32-FAKE16: v_cmp_le_u16 vcc_lo, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0xe4,0x00,0xff]
+# W64-FAKE16: v_cmp_le_u16 vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0xe4,0x00,0xff]
 
 0xfa,0x04,0x76,0x7c,0x01,0x40,0x01,0xff
-# W32: v_cmp_le_u16 vcc_lo, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x40,0x01,0xff]
-# W64: v_cmp_le_u16 vcc, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x40,0x01,0xff]
+# W32-REAL16: v_cmp_le_u16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x40,0x01,0xff]
+# W64-REAL16: v_cmp_le_u16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x40,0x01,0xff]
+# W32-FAKE16: v_cmp_le_u16 vcc_lo, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x40,0x01,0xff]
+# W64-FAKE16: v_cmp_le_u16 vcc, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x40,0x01,0xff]
 
 0xfa,0x04,0x76,0x7c,0x01,0x41,0x01,0xff
-# W32: v_cmp_le_u16 vcc_lo, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x41,0x01,0xff]
-# W64: v_cmp_le_u16 vcc, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x41,0x01,0xff]
+# W32-REAL16: v_cmp_le_u16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x41,0x01,0xff]
+# W64-REAL16: v_cmp_le_u16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x41,0x01,0xff]
+# W32-FAKE16: v_cmp_le_u16 vcc_lo, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x41,0x01,0xff]
+# W64-FAKE16: v_cmp_le_u16 vcc, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x41,0x01,0xff]
 
 0xfa,0x04,0x76,0x7c,0x01,0x01,0x01,0xff
-# W32: v_cmp_le_u16 vcc_lo, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x01,0x01,0xff]
-# W64: v_cmp_le_u16 vcc, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x01,0x01,0xff]
+# W32-REAL16: v_cmp_le_u16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x01,0x01,0xff]
+# W64-REAL16: v_cmp_le_u16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x01,0x01,0xff]
+# W32-FAKE16: v_cmp_le_u16 vcc_lo, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x01,0x01,0xff]
+# W64-FAKE16: v_cmp_le_u16 vcc, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x01,0x01,0xff]
 
 0xfa,0x04,0x76,0x7c,0x01,0x0f,0x01,0xff
-# W32: v_cmp_le_u16 vcc_lo, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x0f,0x01,0xff]
-# W64: v_cmp_le_u16 vcc, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x0f,0x01,0xff]
+# W32-REAL16: v_cmp_le_u16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x0f,0x01,0xff]
+# W64-REAL16: v_cmp_le_u16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x0f,0x01,0xff]
+# W32-FAKE16: v_cmp_le_u16 vcc_lo, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x0f,0x01,0xff]
+# W64-FAKE16: v_cmp_le_u16 vcc, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x0f,0x01,0xff]
 
 0xfa,0x04,0x76,0x7c,0x01,0x11,0x01,0xff
-# W32: v_cmp_le_u16 vcc_lo, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x11,0x01,0xff]
-# W64: v_cmp_le_u16 vcc, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x11,0x01,0xff]
+# W32-REAL16: v_cmp_le_u16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x11,0x01,0xff]
+# W64-REAL16: v_cmp_le_u16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x11,0x01,0xff]
+# W32-FAKE16: v_cmp_le_u16 vcc_lo, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x11,0x01,0xff]
+# W64-FAKE16: v_cmp_le_u16 vcc, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x11,0x01,0xff]
 
 0xfa,0x04,0x76,0x7c,0x01,0x1f,0x01,0xff
-# W32: v_cmp_le_u16 vcc_lo, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x1f,0x01,0xff]
-# W64: v_cmp_le_u16 vcc, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x1f,0x01,0xff]
+# W32-REAL16: v_cmp_le_u16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x1f,0x01,0xff]
+# W64-REAL16: v_cmp_le_u16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x1f,0x01,0xff]
+# W32-FAKE16: v_cmp_le_u16 vcc_lo, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x1f,0x01,0xff]
+# W64-FAKE16: v_cmp_le_u16 vcc, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x1f,0x01,0xff]
 
 0xfa,0x04,0x76,0x7c,0x01,0x21,0x01,0xff
-# W32: v_cmp_le_u16 vcc_lo, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x21,0x01,0xff]
-# W64: v_cmp_le_u16 vcc, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x21,0x01,0xff]
+# W32-REAL16: v_cmp_le_u16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x21,0x01,0xff]
+# W64-REAL16: v_cmp_le_u16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x21,0x01,0xff]
+# W32-FAKE16: v_cmp_le_u16 vcc_lo, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x21,0x01,0xff]
+# W64-FAKE16: v_cmp_le_u16 vcc, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x21,0x01,0xff]
 
 0xfa,0x04,0x76,0x7c,0x01,0x2f,0x01,0xff
-# W32: v_cmp_le_u16 vcc_lo, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x2f,0x01,0xff]
-# W64: v_cmp_le_u16 vcc, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x2f,0x01,0xff]
+# W32-REAL16: v_cmp_le_u16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x2f,0x01,0xff]
+# W64-REAL16: v_cmp_le_u16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x2f,0x01,0xff]
+# W32-FAKE16: v_cmp_le_u16 vcc_lo, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x2f,0x01,0xff]
+# W64-FAKE16: v_cmp_le_u16 vcc, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x2f,0x01,0xff]
 
 0xfa,0x04,0x76,0x7c,0x01,0x50,0x01,0xff
-# W32: v_cmp_le_u16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x50,0x01,0xff]
-# W64: v_cmp_le_u16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x50,0x01,0xff]
+# W32-REAL16: v_cmp_le_u16 vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x50,0x01,0xff]
+# W64-REAL16: v_cmp_le_u16 vcc, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x50,0x01,0xff]
+# W32-FAKE16: v_cmp_le_u16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x50,0x01,0xff]
+# W64-FAKE16: v_cmp_le_u16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x50,0x01,0xff]
 
 0xfa,0x04,0x76,0x7c,0x01,0x5f,0x01,0x01
-# W32: v_cmp_le_u16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x5f,0x01,0x01]
-# W64: v_cmp_le_u16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x5f,0x01,0x01]
+# W32-REAL16: v_cmp_le_u16 vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x5f,0x01,0x01]
+# W64-REAL16: v_cmp_le_u16 vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x5f,0x01,0x01]
+# W32-FAKE16: v_cmp_le_u16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x5f,0x01,0x01]
+# W64-FAKE16: v_cmp_le_u16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x5f,0x01,0x01]
 
 0xfa,0x04,0x76,0x7c,0x01,0x60,0x01,0x13
-# W32: v_cmp_le_u16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x60,0x01,0x13]
-# W64: v_cmp_le_u16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x60,0x01,0x13]
+# W32-REAL16: v_cmp_le_u16 vcc_lo, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_le_u16 vcc, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_le_u16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_le_u16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x76,0x7c,0x01,0x60,0x01,0x13]
 
 0xfa,0xfe,0x76,0x7c,0x7f,0x6f,0x0d,0x30
-# W32: v_cmp_le_u16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x76,0x7c,0x7f,0x6f,0x0d,0x30]
-# W64: v_cmp_le_u16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x76,0x7c,0x7f,0x6f,0x0d,0x30]
+# W32-REAL16: v_cmp_le_u16 vcc_lo, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x76,0x7c,0x7f,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_le_u16 vcc, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x76,0x7c,0x7f,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_le_u16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x76,0x7c,0x7f,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_le_u16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x76,0x7c,0x7f,0x6f,0x0d,0x30]
+
+0xfa,0x04,0x77,0x7c,0x81,0x60,0x01,0x13
+# W32-REAL16: v_cmp_le_u16 vcc_lo, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x77,0x7c,0x81,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_le_u16 vcc, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x77,0x7c,0x81,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_le_u16 vcc_lo, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x77,0x7c,0x81,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_le_u16 vcc, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x77,0x7c,0x81,0x60,0x01,0x13]
+
+0xfa,0xfe,0x77,0x7c,0xff,0x6f,0x0d,0x30
+# W32-REAL16: v_cmp_le_u16 vcc_lo, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x77,0x7c,0xff,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_le_u16 vcc, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x77,0x7c,0xff,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_le_u16 vcc_lo, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x77,0x7c,0xff,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_le_u16 vcc, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x77,0x7c,0xff,0x6f,0x0d,0x30]
 
 0xfa,0x04,0x96,0x7c,0x01,0x1b,0x00,0xff
 # W32: v_cmp_le_u32 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x96,0x7c,0x01,0x1b,0x00,0xff]
@@ -1725,60 +2045,100 @@
 # W64: v_cmp_lt_f32 vcc, -|v255|, -|v255| row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x23,0x7c,0xff,0x6f,0xfd,0x30]
 
 0xfa,0x04,0x62,0x7c,0x01,0x1b,0x00,0xff
-# W32: v_cmp_lt_i16 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x1b,0x00,0xff]
-# W64: v_cmp_lt_i16 vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x1b,0x00,0xff]
+# W32-REAL16: v_cmp_lt_i16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x1b,0x00,0xff]
+# W64-REAL16: v_cmp_lt_i16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x1b,0x00,0xff]
+# W32-FAKE16: v_cmp_lt_i16 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x1b,0x00,0xff]
+# W64-FAKE16: v_cmp_lt_i16 vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x1b,0x00,0xff]
 
 0xfa,0x04,0x62,0x7c,0x01,0xe4,0x00,0xff
-# W32: v_cmp_lt_i16 vcc_lo, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0xe4,0x00,0xff]
-# W64: v_cmp_lt_i16 vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0xe4,0x00,0xff]
+# W32-REAL16: v_cmp_lt_i16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0xe4,0x00,0xff]
+# W64-REAL16: v_cmp_lt_i16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0xe4,0x00,0xff]
+# W32-FAKE16: v_cmp_lt_i16 vcc_lo, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0xe4,0x00,0xff]
+# W64-FAKE16: v_cmp_lt_i16 vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0xe4,0x00,0xff]
 
 0xfa,0x04,0x62,0x7c,0x01,0x40,0x01,0xff
-# W32: v_cmp_lt_i16 vcc_lo, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x40,0x01,0xff]
-# W64: v_cmp_lt_i16 vcc, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x40,0x01,0xff]
+# W32-REAL16: v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x40,0x01,0xff]
+# W64-REAL16: v_cmp_lt_i16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x40,0x01,0xff]
+# W32-FAKE16: v_cmp_lt_i16 vcc_lo, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x40,0x01,0xff]
+# W64-FAKE16: v_cmp_lt_i16 vcc, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x40,0x01,0xff]
 
 0xfa,0x04,0x62,0x7c,0x01,0x41,0x01,0xff
-# W32: v_cmp_lt_i16 vcc_lo, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x41,0x01,0xff]
-# W64: v_cmp_lt_i16 vcc, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x41,0x01,0xff]
+# W32-REAL16: v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x41,0x01,0xff]
+# W64-REAL16: v_cmp_lt_i16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x41,0x01,0xff]
+# W32-FAKE16: v_cmp_lt_i16 vcc_lo, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x41,0x01,0xff]
+# W64-FAKE16: v_cmp_lt_i16 vcc, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x41,0x01,0xff]
 
 0xfa,0x04,0x62,0x7c,0x01,0x01,0x01,0xff
-# W32: v_cmp_lt_i16 vcc_lo, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x01,0x01,0xff]
-# W64: v_cmp_lt_i16 vcc, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x01,0x01,0xff]
+# W32-REAL16: v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x01,0x01,0xff]
+# W64-REAL16: v_cmp_lt_i16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x01,0x01,0xff]
+# W32-FAKE16: v_cmp_lt_i16 vcc_lo, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x01,0x01,0xff]
+# W64-FAKE16: v_cmp_lt_i16 vcc, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x01,0x01,0xff]
 
 0xfa,0x04,0x62,0x7c,0x01,0x0f,0x01,0xff
-# W32: v_cmp_lt_i16 vcc_lo, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x0f,0x01,0xff]
-# W64: v_cmp_lt_i16 vcc, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x0f,0x01,0xff]
+# W32-REAL16: v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x0f,0x01,0xff]
+# W64-REAL16: v_cmp_lt_i16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x0f,0x01,0xff]
+# W32-FAKE16: v_cmp_lt_i16 vcc_lo, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x0f,0x01,0xff]
+# W64-FAKE16: v_cmp_lt_i16 vcc, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x0f,0x01,0xff]
 
 0xfa,0x04,0x62,0x7c,0x01,0x11,0x01,0xff
-# W32: v_cmp_lt_i16 vcc_lo, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x11,0x01,0xff]
-# W64: v_cmp_lt_i16 vcc, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x11,0x01,0xff]
+# W32-REAL16: v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x11,0x01,0xff]
+# W64-REAL16: v_cmp_lt_i16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x11,0x01,0xff]
+# W32-FAKE16: v_cmp_lt_i16 vcc_lo, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x11,0x01,0xff]
+# W64-FAKE16: v_cmp_lt_i16 vcc, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x11,0x01,0xff]
 
 0xfa,0x04,0x62,0x7c,0x01,0x1f,0x01,0xff
-# W32: v_cmp_lt_i16 vcc_lo, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x1f,0x01,0xff]
-# W64: v_cmp_lt_i16 vcc, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x1f,0x01,0xff]
+# W32-REAL16: v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x1f,0x01,0xff]
+# W64-REAL16: v_cmp_lt_i16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x1f,0x01,0xff]
+# W32-FAKE16: v_cmp_lt_i16 vcc_lo, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x1f,0x01,0xff]
+# W64-FAKE16: v_cmp_lt_i16 vcc, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x1f,0x01,0xff]
 
 0xfa,0x04,0x62,0x7c,0x01,0x21,0x01,0xff
-# W32: v_cmp_lt_i16 vcc_lo, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x21,0x01,0xff]
-# W64: v_cmp_lt_i16 vcc, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x21,0x01,0xff]
+# W32-REAL16: v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x21,0x01,0xff]
+# W64-REAL16: v_cmp_lt_i16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x21,0x01,0xff]
+# W32-FAKE16: v_cmp_lt_i16 vcc_lo, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x21,0x01,0xff]
+# W64-FAKE16: v_cmp_lt_i16 vcc, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x21,0x01,0xff]
 
 0xfa,0x04,0x62,0x7c,0x01,0x2f,0x01,0xff
-# W32: v_cmp_lt_i16 vcc_lo, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x2f,0x01,0xff]
-# W64: v_cmp_lt_i16 vcc, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x2f,0x01,0xff]
+# W32-REAL16: v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x2f,0x01,0xff]
+# W64-REAL16: v_cmp_lt_i16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x2f,0x01,0xff]
+# W32-FAKE16: v_cmp_lt_i16 vcc_lo, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x2f,0x01,0xff]
+# W64-FAKE16: v_cmp_lt_i16 vcc, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x2f,0x01,0xff]
 
 0xfa,0x04,0x62,0x7c,0x01,0x50,0x01,0xff
-# W32: v_cmp_lt_i16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x50,0x01,0xff]
-# W64: v_cmp_lt_i16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x50,0x01,0xff]
+# W32-REAL16: v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x50,0x01,0xff]
+# W64-REAL16: v_cmp_lt_i16 vcc, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x50,0x01,0xff]
+# W32-FAKE16: v_cmp_lt_i16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x50,0x01,0xff]
+# W64-FAKE16: v_cmp_lt_i16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x50,0x01,0xff]
 
 0xfa,0x04,0x62,0x7c,0x01,0x5f,0x01,0x01
-# W32: v_cmp_lt_i16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x5f,0x01,0x01]
-# W64: v_cmp_lt_i16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x5f,0x01,0x01]
+# W32-REAL16: v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x5f,0x01,0x01]
+# W64-REAL16: v_cmp_lt_i16 vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x5f,0x01,0x01]
+# W32-FAKE16: v_cmp_lt_i16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x5f,0x01,0x01]
+# W64-FAKE16: v_cmp_lt_i16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x5f,0x01,0x01]
 
 0xfa,0x04,0x62,0x7c,0x01,0x60,0x01,0x13
-# W32: v_cmp_lt_i16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x60,0x01,0x13]
-# W64: v_cmp_lt_i16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x60,0x01,0x13]
+# W32-REAL16: v_cmp_lt_i16 vcc_lo, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_lt_i16 vcc, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_lt_i16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_lt_i16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x62,0x7c,0x01,0x60,0x01,0x13]
 
 0xfa,0xfe,0x62,0x7c,0x7f,0x6f,0x0d,0x30
-# W32: v_cmp_lt_i16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x62,0x7c,0x7f,0x6f,0x0d,0x30]
-# W64: v_cmp_lt_i16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x62,0x7c,0x7f,0x6f,0x0d,0x30]
+# W32-REAL16: v_cmp_lt_i16 vcc_lo, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x62,0x7c,0x7f,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_lt_i16 vcc, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x62,0x7c,0x7f,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_lt_i16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x62,0x7c,0x7f,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_lt_i16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x62,0x7c,0x7f,0x6f,0x0d,0x30]
+
+0xfa,0x04,0x63,0x7c,0x81,0x60,0x01,0x13
+# W32-REAL16: v_cmp_lt_i16 vcc_lo, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x63,0x7c,0x81,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_lt_i16 vcc, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x63,0x7c,0x81,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_lt_i16 vcc_lo, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x63,0x7c,0x81,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_lt_i16 vcc, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x63,0x7c,0x81,0x60,0x01,0x13]
+
+0xfa,0xfe,0x63,0x7c,0xff,0x6f,0x0d,0x30
+# W32-REAL16: v_cmp_lt_i16 vcc_lo, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x63,0x7c,0xff,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_lt_i16 vcc, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x63,0x7c,0xff,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_lt_i16 vcc_lo, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x63,0x7c,0xff,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_lt_i16 vcc, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x63,0x7c,0xff,0x6f,0x0d,0x30]
 
 0xfa,0x04,0x82,0x7c,0x01,0x1b,0x00,0xff
 # W32: v_cmp_lt_i32 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x82,0x7c,0x01,0x1b,0x00,0xff]
@@ -1837,60 +2197,100 @@
 # W64: v_cmp_lt_i32 vcc, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x83,0x7c,0xff,0x6f,0x0d,0x30]
 
 0xfa,0x04,0x72,0x7c,0x01,0x1b,0x00,0xff
-# W32: v_cmp_lt_u16 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x1b,0x00,0xff]
-# W64: v_cmp_lt_u16 vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x1b,0x00,0xff]
+# W32-REAL16: v_cmp_lt_u16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x1b,0x00,0xff]
+# W64-REAL16: v_cmp_lt_u16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x1b,0x00,0xff]
+# W32-FAKE16: v_cmp_lt_u16 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x1b,0x00,0xff]
+# W64-FAKE16: v_cmp_lt_u16 vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x1b,0x00,0xff]
 
 0xfa,0x04,0x72,0x7c,0x01,0xe4,0x00,0xff
-# W32: v_cmp_lt_u16 vcc_lo, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0xe4,0x00,0xff]
-# W64: v_cmp_lt_u16 vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0xe4,0x00,0xff]
+# W32-REAL16: v_cmp_lt_u16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0xe4,0x00,0xff]
+# W64-REAL16: v_cmp_lt_u16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0xe4,0x00,0xff]
+# W32-FAKE16: v_cmp_lt_u16 vcc_lo, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0xe4,0x00,0xff]
+# W64-FAKE16: v_cmp_lt_u16 vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0xe4,0x00,0xff]
 
 0xfa,0x04,0x72,0x7c,0x01,0x40,0x01,0xff
-# W32: v_cmp_lt_u16 vcc_lo, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x40,0x01,0xff]
-# W64: v_cmp_lt_u16 vcc, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x40,0x01,0xff]
+# W32-REAL16: v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x40,0x01,0xff]
+# W64-REAL16: v_cmp_lt_u16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x40,0x01,0xff]
+# W32-FAKE16: v_cmp_lt_u16 vcc_lo, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x40,0x01,0xff]
+# W64-FAKE16: v_cmp_lt_u16 vcc, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x40,0x01,0xff]
 
 0xfa,0x04,0x72,0x7c,0x01,0x41,0x01,0xff
-# W32: v_cmp_lt_u16 vcc_lo, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x41,0x01,0xff]
-# W64: v_cmp_lt_u16 vcc, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x41,0x01,0xff]
+# W32-REAL16: v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x41,0x01,0xff]
+# W64-REAL16: v_cmp_lt_u16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x41,0x01,0xff]
+# W32-FAKE16: v_cmp_lt_u16 vcc_lo, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x41,0x01,0xff]
+# W64-FAKE16: v_cmp_lt_u16 vcc, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x41,0x01,0xff]
 
 0xfa,0x04,0x72,0x7c,0x01,0x01,0x01,0xff
-# W32: v_cmp_lt_u16 vcc_lo, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x01,0x01,0xff]
-# W64: v_cmp_lt_u16 vcc, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x01,0x01,0xff]
+# W32-REAL16: v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x01,0x01,0xff]
+# W64-REAL16: v_cmp_lt_u16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x01,0x01,0xff]
+# W32-FAKE16: v_cmp_lt_u16 vcc_lo, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x01,0x01,0xff]
+# W64-FAKE16: v_cmp_lt_u16 vcc, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x01,0x01,0xff]
 
 0xfa,0x04,0x72,0x7c,0x01,0x0f,0x01,0xff
-# W32: v_cmp_lt_u16 vcc_lo, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x0f,0x01,0xff]
-# W64: v_cmp_lt_u16 vcc, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x0f,0x01,0xff]
+# W32-REAL16: v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x0f,0x01,0xff]
+# W64-REAL16: v_cmp_lt_u16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x0f,0x01,0xff]
+# W32-FAKE16: v_cmp_lt_u16 vcc_lo, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x0f,0x01,0xff]
+# W64-FAKE16: v_cmp_lt_u16 vcc, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x0f,0x01,0xff]
 
 0xfa,0x04,0x72,0x7c,0x01,0x11,0x01,0xff
-# W32: v_cmp_lt_u16 vcc_lo, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x11,0x01,0xff]
-# W64: v_cmp_lt_u16 vcc, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x11,0x01,0xff]
+# W32-REAL16: v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x11,0x01,0xff]
+# W64-REAL16: v_cmp_lt_u16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x11,0x01,0xff]
+# W32-FAKE16: v_cmp_lt_u16 vcc_lo, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x11,0x01,0xff]
+# W64-FAKE16: v_cmp_lt_u16 vcc, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x11,0x01,0xff]
 
 0xfa,0x04,0x72,0x7c,0x01,0x1f,0x01,0xff
-# W32: v_cmp_lt_u16 vcc_lo, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x1f,0x01,0xff]
-# W64: v_cmp_lt_u16 vcc, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x1f,0x01,0xff]
+# W32-REAL16: v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x1f,0x01,0xff]
+# W64-REAL16: v_cmp_lt_u16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x1f,0x01,0xff]
+# W32-FAKE16: v_cmp_lt_u16 vcc_lo, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x1f,0x01,0xff]
+# W64-FAKE16: v_cmp_lt_u16 vcc, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x1f,0x01,0xff]
 
 0xfa,0x04,0x72,0x7c,0x01,0x21,0x01,0xff
-# W32: v_cmp_lt_u16 vcc_lo, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x21,0x01,0xff]
-# W64: v_cmp_lt_u16 vcc, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x21,0x01,0xff]
+# W32-REAL16: v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x21,0x01,0xff]
+# W64-REAL16: v_cmp_lt_u16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x21,0x01,0xff]
+# W32-FAKE16: v_cmp_lt_u16 vcc_lo, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x21,0x01,0xff]
+# W64-FAKE16: v_cmp_lt_u16 vcc, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x21,0x01,0xff]
 
 0xfa,0x04,0x72,0x7c,0x01,0x2f,0x01,0xff
-# W32: v_cmp_lt_u16 vcc_lo, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x2f,0x01,0xff]
-# W64: v_cmp_lt_u16 vcc, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x2f,0x01,0xff]
+# W32-REAL16: v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x2f,0x01,0xff]
+# W64-REAL16: v_cmp_lt_u16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x2f,0x01,0xff]
+# W32-FAKE16: v_cmp_lt_u16 vcc_lo, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x2f,0x01,0xff]
+# W64-FAKE16: v_cmp_lt_u16 vcc, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x2f,0x01,0xff]
 
 0xfa,0x04,0x72,0x7c,0x01,0x50,0x01,0xff
-# W32: v_cmp_lt_u16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x50,0x01,0xff]
-# W64: v_cmp_lt_u16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x50,0x01,0xff]
+# W32-REAL16: v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x50,0x01,0xff]
+# W64-REAL16: v_cmp_lt_u16 vcc, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x50,0x01,0xff]
+# W32-FAKE16: v_cmp_lt_u16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x50,0x01,0xff]
+# W64-FAKE16: v_cmp_lt_u16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x50,0x01,0xff]
 
 0xfa,0x04,0x72,0x7c,0x01,0x5f,0x01,0x01
-# W32: v_cmp_lt_u16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x5f,0x01,0x01]
-# W64: v_cmp_lt_u16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x5f,0x01,0x01]
+# W32-REAL16: v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x5f,0x01,0x01]
+# W64-REAL16: v_cmp_lt_u16 vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x5f,0x01,0x01]
+# W32-FAKE16: v_cmp_lt_u16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x5f,0x01,0x01]
+# W64-FAKE16: v_cmp_lt_u16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x5f,0x01,0x01]
 
 0xfa,0x04,0x72,0x7c,0x01,0x60,0x01,0x13
-# W32: v_cmp_lt_u16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x60,0x01,0x13]
-# W64: v_cmp_lt_u16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x60,0x01,0x13]
+# W32-REAL16: v_cmp_lt_u16 vcc_lo, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_lt_u16 vcc, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_lt_u16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_lt_u16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x72,0x7c,0x01,0x60,0x01,0x13]
 
 0xfa,0xfe,0x72,0x7c,0x7f,0x6f,0x0d,0x30
-# W32: v_cmp_lt_u16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x72,0x7c,0x7f,0x6f,0x0d,0x30]
-# W64: v_cmp_lt_u16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x72,0x7c,0x7f,0x6f,0x0d,0x30]
+# W32-REAL16: v_cmp_lt_u16 vcc_lo, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x72,0x7c,0x7f,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_lt_u16 vcc, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x72,0x7c,0x7f,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_lt_u16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x72,0x7c,0x7f,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_lt_u16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x72,0x7c,0x7f,0x6f,0x0d,0x30]
+
+0xfa,0x04,0x73,0x7c,0x81,0x60,0x01,0x13
+# W32-REAL16: v_cmp_lt_u16 vcc_lo, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x73,0x7c,0x81,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_lt_u16 vcc, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x73,0x7c,0x81,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_lt_u16 vcc_lo, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x73,0x7c,0x81,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_lt_u16 vcc, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x73,0x7c,0x81,0x60,0x01,0x13]
+
+0xfa,0xfe,0x73,0x7c,0xff,0x6f,0x0d,0x30
+# W32-REAL16: v_cmp_lt_u16 vcc_lo, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x73,0x7c,0xff,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_lt_u16 vcc, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x73,0x7c,0xff,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_lt_u16 vcc_lo, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x73,0x7c,0xff,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_lt_u16 vcc, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x73,0x7c,0xff,0x6f,0x0d,0x30]
 
 0xfa,0x04,0x92,0x7c,0x01,0x1b,0x00,0xff
 # W32: v_cmp_lt_u32 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x92,0x7c,0x01,0x1b,0x00,0xff]
@@ -1949,60 +2349,100 @@
 # W64: v_cmp_lt_u32 vcc, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x93,0x7c,0xff,0x6f,0x0d,0x30]
 
 0xfa,0x04,0x6a,0x7c,0x01,0x1b,0x00,0xff
-# W32: v_cmp_ne_i16 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x1b,0x00,0xff]
-# W64: v_cmp_ne_i16 vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x1b,0x00,0xff]
+# W32-REAL16: v_cmp_ne_i16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x1b,0x00,0xff]
+# W64-REAL16: v_cmp_ne_i16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x1b,0x00,0xff]
+# W32-FAKE16: v_cmp_ne_i16 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x1b,0x00,0xff]
+# W64-FAKE16: v_cmp_ne_i16 vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x1b,0x00,0xff]
 
 0xfa,0x04,0x6a,0x7c,0x01,0xe4,0x00,0xff
-# W32: v_cmp_ne_i16 vcc_lo, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0xe4,0x00,0xff]
-# W64: v_cmp_ne_i16 vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0xe4,0x00,0xff]
+# W32-REAL16: v_cmp_ne_i16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0xe4,0x00,0xff]
+# W64-REAL16: v_cmp_ne_i16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0xe4,0x00,0xff]
+# W32-FAKE16: v_cmp_ne_i16 vcc_lo, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0xe4,0x00,0xff]
+# W64-FAKE16: v_cmp_ne_i16 vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0xe4,0x00,0xff]
 
 0xfa,0x04,0x6a,0x7c,0x01,0x40,0x01,0xff
-# W32: v_cmp_ne_i16 vcc_lo, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x40,0x01,0xff]
-# W64: v_cmp_ne_i16 vcc, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x40,0x01,0xff]
+# W32-REAL16: v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x40,0x01,0xff]
+# W64-REAL16: v_cmp_ne_i16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x40,0x01,0xff]
+# W32-FAKE16: v_cmp_ne_i16 vcc_lo, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x40,0x01,0xff]
+# W64-FAKE16: v_cmp_ne_i16 vcc, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x40,0x01,0xff]
 
 0xfa,0x04,0x6a,0x7c,0x01,0x41,0x01,0xff
-# W32: v_cmp_ne_i16 vcc_lo, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x41,0x01,0xff]
-# W64: v_cmp_ne_i16 vcc, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x41,0x01,0xff]
+# W32-REAL16: v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x41,0x01,0xff]
+# W64-REAL16: v_cmp_ne_i16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x41,0x01,0xff]
+# W32-FAKE16: v_cmp_ne_i16 vcc_lo, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x41,0x01,0xff]
+# W64-FAKE16: v_cmp_ne_i16 vcc, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x41,0x01,0xff]
 
 0xfa,0x04,0x6a,0x7c,0x01,0x01,0x01,0xff
-# W32: v_cmp_ne_i16 vcc_lo, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x01,0x01,0xff]
-# W64: v_cmp_ne_i16 vcc, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x01,0x01,0xff]
+# W32-REAL16: v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x01,0x01,0xff]
+# W64-REAL16: v_cmp_ne_i16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x01,0x01,0xff]
+# W32-FAKE16: v_cmp_ne_i16 vcc_lo, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x01,0x01,0xff]
+# W64-FAKE16: v_cmp_ne_i16 vcc, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x01,0x01,0xff]
 
 0xfa,0x04,0x6a,0x7c,0x01,0x0f,0x01,0xff
-# W32: v_cmp_ne_i16 vcc_lo, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x0f,0x01,0xff]
-# W64: v_cmp_ne_i16 vcc, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x0f,0x01,0xff]
+# W32-REAL16: v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x0f,0x01,0xff]
+# W64-REAL16: v_cmp_ne_i16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x0f,0x01,0xff]
+# W32-FAKE16: v_cmp_ne_i16 vcc_lo, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x0f,0x01,0xff]
+# W64-FAKE16: v_cmp_ne_i16 vcc, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x0f,0x01,0xff]
 
 0xfa,0x04,0x6a,0x7c,0x01,0x11,0x01,0xff
-# W32: v_cmp_ne_i16 vcc_lo, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x11,0x01,0xff]
-# W64: v_cmp_ne_i16 vcc, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x11,0x01,0xff]
+# W32-REAL16: v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x11,0x01,0xff]
+# W64-REAL16: v_cmp_ne_i16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x11,0x01,0xff]
+# W32-FAKE16: v_cmp_ne_i16 vcc_lo, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x11,0x01,0xff]
+# W64-FAKE16: v_cmp_ne_i16 vcc, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x11,0x01,0xff]
 
 0xfa,0x04,0x6a,0x7c,0x01,0x1f,0x01,0xff
-# W32: v_cmp_ne_i16 vcc_lo, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x1f,0x01,0xff]
-# W64: v_cmp_ne_i16 vcc, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x1f,0x01,0xff]
+# W32-REAL16: v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x1f,0x01,0xff]
+# W64-REAL16: v_cmp_ne_i16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x1f,0x01,0xff]
+# W32-FAKE16: v_cmp_ne_i16 vcc_lo, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x1f,0x01,0xff]
+# W64-FAKE16: v_cmp_ne_i16 vcc, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x1f,0x01,0xff]
 
 0xfa,0x04,0x6a,0x7c,0x01,0x21,0x01,0xff
-# W32: v_cmp_ne_i16 vcc_lo, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x21,0x01,0xff]
-# W64: v_cmp_ne_i16 vcc, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x21,0x01,0xff]
+# W32-REAL16: v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x21,0x01,0xff]
+# W64-REAL16: v_cmp_ne_i16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x21,0x01,0xff]
+# W32-FAKE16: v_cmp_ne_i16 vcc_lo, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x21,0x01,0xff]
+# W64-FAKE16: v_cmp_ne_i16 vcc, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x21,0x01,0xff]
 
 0xfa,0x04,0x6a,0x7c,0x01,0x2f,0x01,0xff
-# W32: v_cmp_ne_i16 vcc_lo, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x2f,0x01,0xff]
-# W64: v_cmp_ne_i16 vcc, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x2f,0x01,0xff]
+# W32-REAL16: v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x2f,0x01,0xff]
+# W64-REAL16: v_cmp_ne_i16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x2f,0x01,0xff]
+# W32-FAKE16: v_cmp_ne_i16 vcc_lo, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x2f,0x01,0xff]
+# W64-FAKE16: v_cmp_ne_i16 vcc, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x2f,0x01,0xff]
 
 0xfa,0x04,0x6a,0x7c,0x01,0x50,0x01,0xff
-# W32: v_cmp_ne_i16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x50,0x01,0xff]
-# W64: v_cmp_ne_i16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x50,0x01,0xff]
+# W32-REAL16: v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x50,0x01,0xff]
+# W64-REAL16: v_cmp_ne_i16 vcc, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x50,0x01,0xff]
+# W32-FAKE16: v_cmp_ne_i16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x50,0x01,0xff]
+# W64-FAKE16: v_cmp_ne_i16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x50,0x01,0xff]
 
 0xfa,0x04,0x6a,0x7c,0x01,0x5f,0x01,0x01
-# W32: v_cmp_ne_i16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x5f,0x01,0x01]
-# W64: v_cmp_ne_i16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x5f,0x01,0x01]
+# W32-REAL16: v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x5f,0x01,0x01]
+# W64-REAL16: v_cmp_ne_i16 vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x5f,0x01,0x01]
+# W32-FAKE16: v_cmp_ne_i16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x5f,0x01,0x01]
+# W64-FAKE16: v_cmp_ne_i16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x5f,0x01,0x01]
 
 0xfa,0x04,0x6a,0x7c,0x01,0x60,0x01,0x13
-# W32: v_cmp_ne_i16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x60,0x01,0x13]
-# W64: v_cmp_ne_i16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x60,0x01,0x13]
+# W32-REAL16: v_cmp_ne_i16 vcc_lo, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_ne_i16 vcc, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_ne_i16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_ne_i16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x6a,0x7c,0x01,0x60,0x01,0x13]
 
 0xfa,0xfe,0x6a,0x7c,0x7f,0x6f,0x0d,0x30
-# W32: v_cmp_ne_i16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x6a,0x7c,0x7f,0x6f,0x0d,0x30]
-# W64: v_cmp_ne_i16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x6a,0x7c,0x7f,0x6f,0x0d,0x30]
+# W32-REAL16: v_cmp_ne_i16 vcc_lo, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x6a,0x7c,0x7f,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_ne_i16 vcc, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x6a,0x7c,0x7f,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_ne_i16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x6a,0x7c,0x7f,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_ne_i16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x6a,0x7c,0x7f,0x6f,0x0d,0x30]
+
+0xfa,0x04,0x6b,0x7c,0x81,0x60,0x01,0x13
+# W32-REAL16: v_cmp_ne_i16 vcc_lo, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x6b,0x7c,0x81,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_ne_i16 vcc, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x6b,0x7c,0x81,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_ne_i16 vcc_lo, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x6b,0x7c,0x81,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_ne_i16 vcc, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x6b,0x7c,0x81,0x60,0x01,0x13]
+
+0xfa,0xfe,0x6b,0x7c,0xff,0x6f,0x0d,0x30
+# W32-REAL16: v_cmp_ne_i16 vcc_lo, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x6b,0x7c,0xff,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_ne_i16 vcc, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x6b,0x7c,0xff,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_ne_i16 vcc_lo, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x6b,0x7c,0xff,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_ne_i16 vcc, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x6b,0x7c,0xff,0x6f,0x0d,0x30]
 
 0xfa,0x04,0x8a,0x7c,0x01,0x1b,0x00,0xff
 # W32: v_cmp_ne_i32 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x8a,0x7c,0x01,0x1b,0x00,0xff]
@@ -2061,60 +2501,100 @@
 # W64: v_cmp_ne_i32 vcc, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x8b,0x7c,0xff,0x6f,0x0d,0x30]
 
 0xfa,0x04,0x7a,0x7c,0x01,0x1b,0x00,0xff
-# W32: v_cmp_ne_u16 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x1b,0x00,0xff]
-# W64: v_cmp_ne_u16 vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x1b,0x00,0xff]
+# W32-REAL16: v_cmp_ne_u16 vcc_lo, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x1b,0x00,0xff]
+# W64-REAL16: v_cmp_ne_u16 vcc, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x1b,0x00,0xff]
+# W32-FAKE16: v_cmp_ne_u16 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x1b,0x00,0xff]
+# W64-FAKE16: v_cmp_ne_u16 vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x1b,0x00,0xff]
 
 0xfa,0x04,0x7a,0x7c,0x01,0xe4,0x00,0xff
-# W32: v_cmp_ne_u16 vcc_lo, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0xe4,0x00,0xff]
-# W64: v_cmp_ne_u16 vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0xe4,0x00,0xff]
+# W32-REAL16: v_cmp_ne_u16 vcc_lo, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0xe4,0x00,0xff]
+# W64-REAL16: v_cmp_ne_u16 vcc, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0xe4,0x00,0xff]
+# W32-FAKE16: v_cmp_ne_u16 vcc_lo, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0xe4,0x00,0xff]
+# W64-FAKE16: v_cmp_ne_u16 vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0xe4,0x00,0xff]
 
 0xfa,0x04,0x7a,0x7c,0x01,0x40,0x01,0xff
-# W32: v_cmp_ne_u16 vcc_lo, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x40,0x01,0xff]
-# W64: v_cmp_ne_u16 vcc, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x40,0x01,0xff]
+# W32-REAL16: v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x40,0x01,0xff]
+# W64-REAL16: v_cmp_ne_u16 vcc, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x40,0x01,0xff]
+# W32-FAKE16: v_cmp_ne_u16 vcc_lo, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x40,0x01,0xff]
+# W64-FAKE16: v_cmp_ne_u16 vcc, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x40,0x01,0xff]
 
 0xfa,0x04,0x7a,0x7c,0x01,0x41,0x01,0xff
-# W32: v_cmp_ne_u16 vcc_lo, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x41,0x01,0xff]
-# W64: v_cmp_ne_u16 vcc, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x41,0x01,0xff]
+# W32-REAL16: v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x41,0x01,0xff]
+# W64-REAL16: v_cmp_ne_u16 vcc, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x41,0x01,0xff]
+# W32-FAKE16: v_cmp_ne_u16 vcc_lo, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x41,0x01,0xff]
+# W64-FAKE16: v_cmp_ne_u16 vcc, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x41,0x01,0xff]
 
 0xfa,0x04,0x7a,0x7c,0x01,0x01,0x01,0xff
-# W32: v_cmp_ne_u16 vcc_lo, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x01,0x01,0xff]
-# W64: v_cmp_ne_u16 vcc, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x01,0x01,0xff]
+# W32-REAL16: v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x01,0x01,0xff]
+# W64-REAL16: v_cmp_ne_u16 vcc, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x01,0x01,0xff]
+# W32-FAKE16: v_cmp_ne_u16 vcc_lo, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x01,0x01,0xff]
+# W64-FAKE16: v_cmp_ne_u16 vcc, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x01,0x01,0xff]
 
 0xfa,0x04,0x7a,0x7c,0x01,0x0f,0x01,0xff
-# W32: v_cmp_ne_u16 vcc_lo, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x0f,0x01,0xff]
-# W64: v_cmp_ne_u16 vcc, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x0f,0x01,0xff]
+# W32-REAL16: v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x0f,0x01,0xff]
+# W64-REAL16: v_cmp_ne_u16 vcc, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x0f,0x01,0xff]
+# W32-FAKE16: v_cmp_ne_u16 vcc_lo, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x0f,0x01,0xff]
+# W64-FAKE16: v_cmp_ne_u16 vcc, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x0f,0x01,0xff]
 
 0xfa,0x04,0x7a,0x7c,0x01,0x11,0x01,0xff
-# W32: v_cmp_ne_u16 vcc_lo, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x11,0x01,0xff]
-# W64: v_cmp_ne_u16 vcc, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x11,0x01,0xff]
+# W32-REAL16: v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x11,0x01,0xff]
+# W64-REAL16: v_cmp_ne_u16 vcc, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x11,0x01,0xff]
+# W32-FAKE16: v_cmp_ne_u16 vcc_lo, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x11,0x01,0xff]
+# W64-FAKE16: v_cmp_ne_u16 vcc, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x11,0x01,0xff]
 
 0xfa,0x04,0x7a,0x7c,0x01,0x1f,0x01,0xff
-# W32: v_cmp_ne_u16 vcc_lo, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x1f,0x01,0xff]
-# W64: v_cmp_ne_u16 vcc, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x1f,0x01,0xff]
+# W32-REAL16: v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x1f,0x01,0xff]
+# W64-REAL16: v_cmp_ne_u16 vcc, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x1f,0x01,0xff]
+# W32-FAKE16: v_cmp_ne_u16 vcc_lo, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x1f,0x01,0xff]
+# W64-FAKE16: v_cmp_ne_u16 vcc, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x1f,0x01,0xff]
 
 0xfa,0x04,0x7a,0x7c,0x01,0x21,0x01,0xff
-# W32: v_cmp_ne_u16 vcc_lo, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x21,0x01,0xff]
-# W64: v_cmp_ne_u16 vcc, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x21,0x01,0xff]
+# W32-REAL16: v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x21,0x01,0xff]
+# W64-REAL16: v_cmp_ne_u16 vcc, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x21,0x01,0xff]
+# W32-FAKE16: v_cmp_ne_u16 vcc_lo, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x21,0x01,0xff]
+# W64-FAKE16: v_cmp_ne_u16 vcc, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x21,0x01,0xff]
 
 0xfa,0x04,0x7a,0x7c,0x01,0x2f,0x01,0xff
-# W32: v_cmp_ne_u16 vcc_lo, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x2f,0x01,0xff]
-# W64: v_cmp_ne_u16 vcc, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x2f,0x01,0xff]
+# W32-REAL16: v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x2f,0x01,0xff]
+# W64-REAL16: v_cmp_ne_u16 vcc, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x2f,0x01,0xff]
+# W32-FAKE16: v_cmp_ne_u16 vcc_lo, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x2f,0x01,0xff]
+# W64-FAKE16: v_cmp_ne_u16 vcc, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x2f,0x01,0xff]
 
 0xfa,0x04,0x7a,0x7c,0x01,0x50,0x01,0xff
-# W32: v_cmp_ne_u16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x50,0x01,0xff]
-# W64: v_cmp_ne_u16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x50,0x01,0xff]
+# W32-REAL16: v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x50,0x01,0xff]
+# W64-REAL16: v_cmp_ne_u16 vcc, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x50,0x01,0xff]
+# W32-FAKE16: v_cmp_ne_u16 vcc_lo, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x50,0x01,0xff]
+# W64-FAKE16: v_cmp_ne_u16 vcc, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x50,0x01,0xff]
 
 0xfa,0x04,0x7a,0x7c,0x01,0x5f,0x01,0x01
-# W32: v_cmp_ne_u16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x5f,0x01,0x01]
-# W64: v_cmp_ne_u16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x5f,0x01,0x01]
+# W32-REAL16: v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x5f,0x01,0x01]
+# W64-REAL16: v_cmp_ne_u16 vcc, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x5f,0x01,0x01]
+# W32-FAKE16: v_cmp_ne_u16 vcc_lo, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x5f,0x01,0x01]
+# W64-FAKE16: v_cmp_ne_u16 vcc, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x5f,0x01,0x01]
 
 0xfa,0x04,0x7a,0x7c,0x01,0x60,0x01,0x13
-# W32: v_cmp_ne_u16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x60,0x01,0x13]
-# W64: v_cmp_ne_u16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x60,0x01,0x13]
+# W32-REAL16: v_cmp_ne_u16 vcc_lo, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_ne_u16 vcc, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_ne_u16 vcc_lo, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_ne_u16 vcc, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x7a,0x7c,0x01,0x60,0x01,0x13]
 
 0xfa,0xfe,0x7a,0x7c,0x7f,0x6f,0x0d,0x30
-# W32: v_cmp_ne_u16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x7a,0x7c,0x7f,0x6f,0x0d,0x30]
-# W64: v_cmp_ne_u16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x7a,0x7c,0x7f,0x6f,0x0d,0x30]
+# W32-REAL16: v_cmp_ne_u16 vcc_lo, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x7a,0x7c,0x7f,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_ne_u16 vcc, v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x7a,0x7c,0x7f,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_ne_u16 vcc_lo, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x7a,0x7c,0x7f,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_ne_u16 vcc, v127, v127 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x7a,0x7c,0x7f,0x6f,0x0d,0x30]
+
+0xfa,0x04,0x7b,0x7c,0x81,0x60,0x01,0x13
+# W32-REAL16: v_cmp_ne_u16 vcc_lo, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x7b,0x7c,0x81,0x60,0x01,0x13]
+# W64-REAL16: v_cmp_ne_u16 vcc, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x7b,0x7c,0x81,0x60,0x01,0x13]
+# W32-FAKE16: v_cmp_ne_u16 vcc_lo, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x7b,0x7c,0x81,0x60,0x01,0x13]
+# W64-FAKE16: v_cmp_ne_u16 vcc, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:0 row_mask:0x1 bank_mask:0x3 ; encoding: [0xfa,0x04,0x7b,0x7c,0x81,0x60,0x01,0x13]
+
+0xfa,0xfe,0x7b,0x7c,0xff,0x6f,0x0d,0x30
+# W32-REAL16: v_cmp_ne_u16 vcc_lo, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x7b,0x7c,0xff,0x6f,0x0d,0x30]
+# W64-REAL16: v_cmp_ne_u16 vcc, v127.h, v127.h row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x7b,0x7c,0xff,0x6f,0x0d,0x30]
+# W32-FAKE16: v_cmp_ne_u16 vcc_lo, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x7b,0x7c,0xff,0x6f,0x0d,0x30]
+# W64-FAKE16: v_cmp_ne_u16 vcc, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:1 fi:1 ; encoding: [0xfa,0xfe,0x7b,0x7c,0xff,0x6f,0x0d,0x30]
 
 0xfa,0x04,0x9a,0x7c,0x01,0x1b,0x00,0xff
 # W32: v_cmp_ne_u32 vcc_lo, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x9a,0x7c,0x01,0x1b,0x00,0xff]
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopc_dpp8.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopc_dpp8.txt
index 3ff28315626e95..d1ba8a45950864 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopc_dpp8.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopc_dpp8.txt
@@ -37,12 +37,29 @@
 # W64: v_cmp_eq_f32 vcc, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x25,0x7c,0xff,0x00,0x00,0x00]
 
 0xe9,0x04,0x64,0x7c,0x01,0x77,0x39,0x05
-# W32: v_cmp_eq_i16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x64,0x7c,0x01,0x77,0x39,0x05]
-# W64: v_cmp_eq_i16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x64,0x7c,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_eq_i16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x64,0x7c,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_eq_i16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x64,0x7c,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_eq_i16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x64,0x7c,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_eq_i16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x64,0x7c,0x01,0x77,0x39,0x05]
 
 0xea,0xfe,0x64,0x7c,0x7f,0x00,0x00,0x00
-# W32: v_cmp_eq_i16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x64,0x7c,0x7f,0x00,0x00,0x00]
-# W64: v_cmp_eq_i16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x64,0x7c,0x7f,0x00,0x00,0x00]
+# W32-REAL16: v_cmp_eq_i16 vcc_lo, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x64,0x7c,0x7f,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_eq_i16 vcc, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x64,0x7c,0x7f,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_eq_i16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x64,0x7c,0x7f,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_eq_i16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x64,0x7c,0x7f,0x00,0x00,0x00]
+
+0xe9,0x04,0x65,0x7c,0x81,0x77,0x39,0x05
+# W32-REAL16: v_cmp_eq_i16 vcc_lo, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x65,0x7c,0x81,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_eq_i16 vcc, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x65,0x7c,0x81,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_eq_i16 vcc_lo, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x65,0x7c,0x81,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_eq_i16 vcc, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x65,0x7c,0x81,0x77,0x39,0x05]
+
+0xea,0xfe,0x65,0x7c,0xff,0x00,0x00,0x00
+# W32-REAL16: v_cmp_eq_i16 vcc_lo, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x65,0x7c,0xff,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_eq_i16 vcc, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x65,0x7c,0xff,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_eq_i16 vcc_lo, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x65,0x7c,0xff,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_eq_i16 vcc, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x65,0x7c,0xff,0x00,0x00,0x00]
+
 
 0xe9,0x04,0x84,0x7c,0x01,0x77,0x39,0x05
 # W32: v_cmp_eq_i32 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x84,0x7c,0x01,0x77,0x39,0x05]
@@ -53,12 +70,29 @@
 # W64: v_cmp_eq_i32 vcc, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x85,0x7c,0xff,0x00,0x00,0x00]
 
 0xe9,0x04,0x74,0x7c,0x01,0x77,0x39,0x05
-# W32: v_cmp_eq_u16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x74,0x7c,0x01,0x77,0x39,0x05]
-# W64: v_cmp_eq_u16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x74,0x7c,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_eq_u16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x74,0x7c,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_eq_u16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x74,0x7c,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_eq_u16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x74,0x7c,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_eq_u16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x74,0x7c,0x01,0x77,0x39,0x05]
 
 0xea,0xfe,0x74,0x7c,0x7f,0x00,0x00,0x00
-# W32: v_cmp_eq_u16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x74,0x7c,0x7f,0x00,0x00,0x00]
-# W64: v_cmp_eq_u16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x74,0x7c,0x7f,0x00,0x00,0x00]
+# W32-REAL16: v_cmp_eq_u16 vcc_lo, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x74,0x7c,0x7f,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_eq_u16 vcc, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x74,0x7c,0x7f,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_eq_u16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x74,0x7c,0x7f,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_eq_u16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x74,0x7c,0x7f,0x00,0x00,0x00]
+
+0xe9,0x04,0x75,0x7c,0x81,0x77,0x39,0x05
+# W32-REAL16: v_cmp_eq_u16 vcc_lo, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x75,0x7c,0x81,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_eq_u16 vcc, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x75,0x7c,0x81,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_eq_u16 vcc_lo, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x75,0x7c,0x81,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_eq_u16 vcc, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x75,0x7c,0x81,0x77,0x39,0x05]
+
+0xea,0xfe,0x75,0x7c,0xff,0x00,0x00,0x00
+# W32-REAL16: v_cmp_eq_u16 vcc_lo, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x75,0x7c,0xff,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_eq_u16 vcc, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x75,0x7c,0xff,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_eq_u16 vcc_lo, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x75,0x7c,0xff,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_eq_u16 vcc, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x75,0x7c,0xff,0x00,0x00,0x00]
+
 
 0xe9,0x04,0x94,0x7c,0x01,0x77,0x39,0x05
 # W32: v_cmp_eq_u32 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x94,0x7c,0x01,0x77,0x39,0x05]
@@ -85,12 +119,29 @@
 # W64: v_cmp_ge_f32 vcc, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x2d,0x7c,0xff,0x00,0x00,0x00]
 
 0xe9,0x04,0x6c,0x7c,0x01,0x77,0x39,0x05
-# W32: v_cmp_ge_i16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x6c,0x7c,0x01,0x77,0x39,0x05]
-# W64: v_cmp_ge_i16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x6c,0x7c,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_ge_i16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x6c,0x7c,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_ge_i16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x6c,0x7c,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_ge_i16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x6c,0x7c,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_ge_i16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x6c,0x7c,0x01,0x77,0x39,0x05]
 
 0xea,0xfe,0x6c,0x7c,0x7f,0x00,0x00,0x00
-# W32: v_cmp_ge_i16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x6c,0x7c,0x7f,0x00,0x00,0x00]
-# W64: v_cmp_ge_i16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x6c,0x7c,0x7f,0x00,0x00,0x00]
+# W32-REAL16: v_cmp_ge_i16 vcc_lo, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x6c,0x7c,0x7f,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_ge_i16 vcc, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x6c,0x7c,0x7f,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_ge_i16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x6c,0x7c,0x7f,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_ge_i16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x6c,0x7c,0x7f,0x00,0x00,0x00]
+
+0xe9,0x04,0x6d,0x7c,0x81,0x77,0x39,0x05
+# W32-REAL16: v_cmp_ge_i16 vcc_lo, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x6d,0x7c,0x81,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_ge_i16 vcc, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x6d,0x7c,0x81,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_ge_i16 vcc_lo, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x6d,0x7c,0x81,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_ge_i16 vcc, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x6d,0x7c,0x81,0x77,0x39,0x05]
+
+0xea,0xfe,0x6d,0x7c,0xff,0x00,0x00,0x00
+# W32-REAL16: v_cmp_ge_i16 vcc_lo, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x6d,0x7c,0xff,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_ge_i16 vcc, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x6d,0x7c,0xff,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_ge_i16 vcc_lo, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x6d,0x7c,0xff,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_ge_i16 vcc, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x6d,0x7c,0xff,0x00,0x00,0x00]
+
 
 0xe9,0x04,0x8c,0x7c,0x01,0x77,0x39,0x05
 # W32: v_cmp_ge_i32 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x8c,0x7c,0x01,0x77,0x39,0x05]
@@ -101,12 +152,29 @@
 # W64: v_cmp_ge_i32 vcc, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x8d,0x7c,0xff,0x00,0x00,0x00]
 
 0xe9,0x04,0x7c,0x7c,0x01,0x77,0x39,0x05
-# W32: v_cmp_ge_u16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x7c,0x7c,0x01,0x77,0x39,0x05]
-# W64: v_cmp_ge_u16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x7c,0x7c,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_ge_u16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x7c,0x7c,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_ge_u16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x7c,0x7c,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_ge_u16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x7c,0x7c,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_ge_u16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x7c,0x7c,0x01,0x77,0x39,0x05]
 
 0xea,0xfe,0x7c,0x7c,0x7f,0x00,0x00,0x00
-# W32: v_cmp_ge_u16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x7c,0x7c,0x7f,0x00,0x00,0x00]
-# W64: v_cmp_ge_u16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x7c,0x7c,0x7f,0x00,0x00,0x00]
+# W32-REAL16: v_cmp_ge_u16 vcc_lo, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x7c,0x7c,0x7f,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_ge_u16 vcc, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x7c,0x7c,0x7f,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_ge_u16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x7c,0x7c,0x7f,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_ge_u16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x7c,0x7c,0x7f,0x00,0x00,0x00]
+
+0xe9,0x04,0x7d,0x7c,0x81,0x77,0x39,0x05
+# W32-REAL16: v_cmp_ge_u16 vcc_lo, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x7d,0x7c,0x81,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_ge_u16 vcc, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x7d,0x7c,0x81,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_ge_u16 vcc_lo, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x7d,0x7c,0x81,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_ge_u16 vcc, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x7d,0x7c,0x81,0x77,0x39,0x05]
+
+0xea,0xfe,0x7d,0x7c,0xff,0x00,0x00,0x00
+# W32-REAL16: v_cmp_ge_u16 vcc_lo, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x7d,0x7c,0xff,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_ge_u16 vcc, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x7d,0x7c,0xff,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_ge_u16 vcc_lo, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x7d,0x7c,0xff,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_ge_u16 vcc, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x7d,0x7c,0xff,0x00,0x00,0x00]
+
 
 0xe9,0x04,0x9c,0x7c,0x01,0x77,0x39,0x05
 # W32: v_cmp_ge_u32 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x9c,0x7c,0x01,0x77,0x39,0x05]
@@ -133,12 +201,29 @@
 # W64: v_cmp_gt_f32 vcc, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x29,0x7c,0xff,0x00,0x00,0x00]
 
 0xe9,0x04,0x68,0x7c,0x01,0x77,0x39,0x05
-# W32: v_cmp_gt_i16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x68,0x7c,0x01,0x77,0x39,0x05]
-# W64: v_cmp_gt_i16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x68,0x7c,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_gt_i16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x68,0x7c,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_gt_i16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x68,0x7c,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_gt_i16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x68,0x7c,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_gt_i16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x68,0x7c,0x01,0x77,0x39,0x05]
 
 0xea,0xfe,0x68,0x7c,0x7f,0x00,0x00,0x00
-# W32: v_cmp_gt_i16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x68,0x7c,0x7f,0x00,0x00,0x00]
-# W64: v_cmp_gt_i16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x68,0x7c,0x7f,0x00,0x00,0x00]
+# W32-REAL16: v_cmp_gt_i16 vcc_lo, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x68,0x7c,0x7f,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_gt_i16 vcc, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x68,0x7c,0x7f,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_gt_i16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x68,0x7c,0x7f,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_gt_i16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x68,0x7c,0x7f,0x00,0x00,0x00]
+
+0xe9,0x04,0x69,0x7c,0x81,0x77,0x39,0x05
+# W32-REAL16: v_cmp_gt_i16 vcc_lo, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x69,0x7c,0x81,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_gt_i16 vcc, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x69,0x7c,0x81,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_gt_i16 vcc_lo, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x69,0x7c,0x81,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_gt_i16 vcc, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x69,0x7c,0x81,0x77,0x39,0x05]
+
+0xea,0xfe,0x69,0x7c,0xff,0x00,0x00,0x00
+# W32-REAL16: v_cmp_gt_i16 vcc_lo, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x69,0x7c,0xff,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_gt_i16 vcc, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x69,0x7c,0xff,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_gt_i16 vcc_lo, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x69,0x7c,0xff,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_gt_i16 vcc, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x69,0x7c,0xff,0x00,0x00,0x00]
+
 
 0xe9,0x04,0x88,0x7c,0x01,0x77,0x39,0x05
 # W32: v_cmp_gt_i32 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x88,0x7c,0x01,0x77,0x39,0x05]
@@ -149,12 +234,29 @@
 # W64: v_cmp_gt_i32 vcc, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x89,0x7c,0xff,0x00,0x00,0x00]
 
 0xe9,0x04,0x78,0x7c,0x01,0x77,0x39,0x05
-# W32: v_cmp_gt_u16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x78,0x7c,0x01,0x77,0x39,0x05]
-# W64: v_cmp_gt_u16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x78,0x7c,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_gt_u16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x78,0x7c,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_gt_u16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x78,0x7c,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_gt_u16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x78,0x7c,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_gt_u16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x78,0x7c,0x01,0x77,0x39,0x05]
 
 0xea,0xfe,0x78,0x7c,0x7f,0x00,0x00,0x00
-# W32: v_cmp_gt_u16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x78,0x7c,0x7f,0x00,0x00,0x00]
-# W64: v_cmp_gt_u16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x78,0x7c,0x7f,0x00,0x00,0x00]
+# W32-REAL16: v_cmp_gt_u16 vcc_lo, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x78,0x7c,0x7f,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_gt_u16 vcc, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x78,0x7c,0x7f,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_gt_u16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x78,0x7c,0x7f,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_gt_u16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x78,0x7c,0x7f,0x00,0x00,0x00]
+
+0xe9,0x04,0x79,0x7c,0x81,0x77,0x39,0x05
+# W32-REAL16: v_cmp_gt_u16 vcc_lo, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x79,0x7c,0x81,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_gt_u16 vcc, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x79,0x7c,0x81,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_gt_u16 vcc_lo, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x79,0x7c,0x81,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_gt_u16 vcc, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x79,0x7c,0x81,0x77,0x39,0x05]
+
+0xea,0xfe,0x79,0x7c,0xff,0x00,0x00,0x00
+# W32-REAL16: v_cmp_gt_u16 vcc_lo, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x79,0x7c,0xff,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_gt_u16 vcc, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x79,0x7c,0xff,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_gt_u16 vcc_lo, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x79,0x7c,0xff,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_gt_u16 vcc, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x79,0x7c,0xff,0x00,0x00,0x00]
+
 
 0xe9,0x04,0x98,0x7c,0x01,0x77,0x39,0x05
 # W32: v_cmp_gt_u32 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x98,0x7c,0x01,0x77,0x39,0x05]
@@ -181,12 +283,29 @@
 # W64: v_cmp_le_f32 vcc, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x27,0x7c,0xff,0x00,0x00,0x00]
 
 0xe9,0x04,0x66,0x7c,0x01,0x77,0x39,0x05
-# W32: v_cmp_le_i16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x66,0x7c,0x01,0x77,0x39,0x05]
-# W64: v_cmp_le_i16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x66,0x7c,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_le_i16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x66,0x7c,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_le_i16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x66,0x7c,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_le_i16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x66,0x7c,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_le_i16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x66,0x7c,0x01,0x77,0x39,0x05]
 
 0xea,0xfe,0x66,0x7c,0x7f,0x00,0x00,0x00
-# W32: v_cmp_le_i16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x66,0x7c,0x7f,0x00,0x00,0x00]
-# W64: v_cmp_le_i16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x66,0x7c,0x7f,0x00,0x00,0x00]
+# W32-REAL16: v_cmp_le_i16 vcc_lo, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x66,0x7c,0x7f,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_le_i16 vcc, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x66,0x7c,0x7f,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_le_i16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x66,0x7c,0x7f,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_le_i16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x66,0x7c,0x7f,0x00,0x00,0x00]
+
+0xe9,0x04,0x67,0x7c,0x81,0x77,0x39,0x05
+# W32-REAL16: v_cmp_le_i16 vcc_lo, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x67,0x7c,0x81,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_le_i16 vcc, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x67,0x7c,0x81,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_le_i16 vcc_lo, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x67,0x7c,0x81,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_le_i16 vcc, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x67,0x7c,0x81,0x77,0x39,0x05]
+
+0xea,0xfe,0x67,0x7c,0xff,0x00,0x00,0x00
+# W32-REAL16: v_cmp_le_i16 vcc_lo, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x67,0x7c,0xff,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_le_i16 vcc, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x67,0x7c,0xff,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_le_i16 vcc_lo, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x67,0x7c,0xff,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_le_i16 vcc, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x67,0x7c,0xff,0x00,0x00,0x00]
+
 
 0xe9,0x04,0x86,0x7c,0x01,0x77,0x39,0x05
 # W32: v_cmp_le_i32 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x86,0x7c,0x01,0x77,0x39,0x05]
@@ -197,12 +316,29 @@
 # W64: v_cmp_le_i32 vcc, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x87,0x7c,0xff,0x00,0x00,0x00]
 
 0xe9,0x04,0x76,0x7c,0x01,0x77,0x39,0x05
-# W32: v_cmp_le_u16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x76,0x7c,0x01,0x77,0x39,0x05]
-# W64: v_cmp_le_u16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x76,0x7c,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_le_u16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x76,0x7c,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_le_u16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x76,0x7c,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_le_u16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x76,0x7c,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_le_u16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x76,0x7c,0x01,0x77,0x39,0x05]
 
 0xea,0xfe,0x76,0x7c,0x7f,0x00,0x00,0x00
-# W32: v_cmp_le_u16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x76,0x7c,0x7f,0x00,0x00,0x00]
-# W64: v_cmp_le_u16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x76,0x7c,0x7f,0x00,0x00,0x00]
+# W32-REAL16: v_cmp_le_u16 vcc_lo, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x76,0x7c,0x7f,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_le_u16 vcc, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x76,0x7c,0x7f,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_le_u16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x76,0x7c,0x7f,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_le_u16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x76,0x7c,0x7f,0x00,0x00,0x00]
+
+0xe9,0x04,0x77,0x7c,0x81,0x77,0x39,0x05
+# W32-REAL16: v_cmp_le_u16 vcc_lo, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x77,0x7c,0x81,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_le_u16 vcc, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x77,0x7c,0x81,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_le_u16 vcc_lo, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x77,0x7c,0x81,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_le_u16 vcc, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x77,0x7c,0x81,0x77,0x39,0x05]
+
+0xea,0xfe,0x77,0x7c,0xff,0x00,0x00,0x00
+# W32-REAL16: v_cmp_le_u16 vcc_lo, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x77,0x7c,0xff,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_le_u16 vcc, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x77,0x7c,0xff,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_le_u16 vcc_lo, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x77,0x7c,0xff,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_le_u16 vcc, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x77,0x7c,0xff,0x00,0x00,0x00]
+
 
 0xe9,0x04,0x96,0x7c,0x01,0x77,0x39,0x05
 # W32: v_cmp_le_u32 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x96,0x7c,0x01,0x77,0x39,0x05]
@@ -261,12 +397,29 @@
 # W64: v_cmp_lt_f32 vcc, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x23,0x7c,0xff,0x00,0x00,0x00]
 
 0xe9,0x04,0x62,0x7c,0x01,0x77,0x39,0x05
-# W32: v_cmp_lt_i16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x62,0x7c,0x01,0x77,0x39,0x05]
-# W64: v_cmp_lt_i16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x62,0x7c,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_lt_i16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x62,0x7c,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_lt_i16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x62,0x7c,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_lt_i16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x62,0x7c,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_lt_i16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x62,0x7c,0x01,0x77,0x39,0x05]
 
 0xea,0xfe,0x62,0x7c,0x7f,0x00,0x00,0x00
-# W32: v_cmp_lt_i16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x62,0x7c,0x7f,0x00,0x00,0x00]
-# W64: v_cmp_lt_i16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x62,0x7c,0x7f,0x00,0x00,0x00]
+# W32-REAL16: v_cmp_lt_i16 vcc_lo, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x62,0x7c,0x7f,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_lt_i16 vcc, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x62,0x7c,0x7f,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_lt_i16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x62,0x7c,0x7f,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_lt_i16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x62,0x7c,0x7f,0x00,0x00,0x00]
+
+0xe9,0x04,0x63,0x7c,0x81,0x77,0x39,0x05
+# W32-REAL16: v_cmp_lt_i16 vcc_lo, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x63,0x7c,0x81,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_lt_i16 vcc, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x63,0x7c,0x81,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_lt_i16 vcc_lo, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x63,0x7c,0x81,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_lt_i16 vcc, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x63,0x7c,0x81,0x77,0x39,0x05]
+
+0xea,0xfe,0x63,0x7c,0xff,0x00,0x00,0x00
+# W32-REAL16: v_cmp_lt_i16 vcc_lo, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x63,0x7c,0xff,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_lt_i16 vcc, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x63,0x7c,0xff,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_lt_i16 vcc_lo, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x63,0x7c,0xff,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_lt_i16 vcc, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x63,0x7c,0xff,0x00,0x00,0x00]
+
 
 0xe9,0x04,0x82,0x7c,0x01,0x77,0x39,0x05
 # W32: v_cmp_lt_i32 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x82,0x7c,0x01,0x77,0x39,0x05]
@@ -277,12 +430,29 @@
 # W64: v_cmp_lt_i32 vcc, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x83,0x7c,0xff,0x00,0x00,0x00]
 
 0xe9,0x04,0x72,0x7c,0x01,0x77,0x39,0x05
-# W32: v_cmp_lt_u16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x72,0x7c,0x01,0x77,0x39,0x05]
-# W64: v_cmp_lt_u16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x72,0x7c,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_lt_u16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x72,0x7c,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_lt_u16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x72,0x7c,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_lt_u16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x72,0x7c,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_lt_u16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x72,0x7c,0x01,0x77,0x39,0x05]
 
 0xea,0xfe,0x72,0x7c,0x7f,0x00,0x00,0x00
-# W32: v_cmp_lt_u16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x72,0x7c,0x7f,0x00,0x00,0x00]
-# W64: v_cmp_lt_u16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x72,0x7c,0x7f,0x00,0x00,0x00]
+# W32-REAL16: v_cmp_lt_u16 vcc_lo, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x72,0x7c,0x7f,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_lt_u16 vcc, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x72,0x7c,0x7f,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_lt_u16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x72,0x7c,0x7f,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_lt_u16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x72,0x7c,0x7f,0x00,0x00,0x00]
+
+0xe9,0x04,0x73,0x7c,0x81,0x77,0x39,0x05
+# W32-REAL16: v_cmp_lt_u16 vcc_lo, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x73,0x7c,0x81,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_lt_u16 vcc, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x73,0x7c,0x81,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_lt_u16 vcc_lo, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x73,0x7c,0x81,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_lt_u16 vcc, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x73,0x7c,0x81,0x77,0x39,0x05]
+
+0xea,0xfe,0x73,0x7c,0xff,0x00,0x00,0x00
+# W32-REAL16: v_cmp_lt_u16 vcc_lo, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x73,0x7c,0xff,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_lt_u16 vcc, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x73,0x7c,0xff,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_lt_u16 vcc_lo, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x73,0x7c,0xff,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_lt_u16 vcc, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x73,0x7c,0xff,0x00,0x00,0x00]
+
 
 0xe9,0x04,0x92,0x7c,0x01,0x77,0x39,0x05
 # W32: v_cmp_lt_u32 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x92,0x7c,0x01,0x77,0x39,0x05]
@@ -293,12 +463,29 @@
 # W64: v_cmp_lt_u32 vcc, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x93,0x7c,0xff,0x00,0x00,0x00]
 
 0xe9,0x04,0x6a,0x7c,0x01,0x77,0x39,0x05
-# W32: v_cmp_ne_i16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x6a,0x7c,0x01,0x77,0x39,0x05]
-# W64: v_cmp_ne_i16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x6a,0x7c,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_ne_i16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x6a,0x7c,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_ne_i16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x6a,0x7c,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_ne_i16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x6a,0x7c,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_ne_i16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x6a,0x7c,0x01,0x77,0x39,0x05]
 
 0xea,0xfe,0x6a,0x7c,0x7f,0x00,0x00,0x00
-# W32: v_cmp_ne_i16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x6a,0x7c,0x7f,0x00,0x00,0x00]
-# W64: v_cmp_ne_i16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x6a,0x7c,0x7f,0x00,0x00,0x00]
+# W32-REAL16: v_cmp_ne_i16 vcc_lo, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x6a,0x7c,0x7f,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_ne_i16 vcc, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x6a,0x7c,0x7f,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_ne_i16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x6a,0x7c,0x7f,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_ne_i16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x6a,0x7c,0x7f,0x00,0x00,0x00]
+
+0xe9,0x04,0x6b,0x7c,0x81,0x77,0x39,0x05
+# W32-REAL16: v_cmp_ne_i16 vcc_lo, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x6b,0x7c,0x81,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_ne_i16 vcc, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x6b,0x7c,0x81,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_ne_i16 vcc_lo, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x6b,0x7c,0x81,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_ne_i16 vcc, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x6b,0x7c,0x81,0x77,0x39,0x05]
+
+0xea,0xfe,0x6b,0x7c,0xff,0x00,0x00,0x00
+# W32-REAL16: v_cmp_ne_i16 vcc_lo, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x6b,0x7c,0xff,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_ne_i16 vcc, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x6b,0x7c,0xff,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_ne_i16 vcc_lo, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x6b,0x7c,0xff,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_ne_i16 vcc, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x6b,0x7c,0xff,0x00,0x00,0x00]
+
 
 0xe9,0x04,0x8a,0x7c,0x01,0x77,0x39,0x05
 # W32: v_cmp_ne_i32 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x8a,0x7c,0x01,0x77,0x39,0x05]
@@ -309,12 +496,29 @@
 # W64: v_cmp_ne_i32 vcc, v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x8b,0x7c,0xff,0x00,0x00,0x00]
 
 0xe9,0x04,0x7a,0x7c,0x01,0x77,0x39,0x05
-# W32: v_cmp_ne_u16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x7a,0x7c,0x01,0x77,0x39,0x05]
-# W64: v_cmp_ne_u16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x7a,0x7c,0x01,0x77,0x39,0x05]
+# W32-REAL16: v_cmp_ne_u16 vcc_lo, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x7a,0x7c,0x01,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_ne_u16 vcc, v1.l, v2.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x7a,0x7c,0x01,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_ne_u16 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x7a,0x7c,0x01,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_ne_u16 vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x7a,0x7c,0x01,0x77,0x39,0x05]
 
 0xea,0xfe,0x7a,0x7c,0x7f,0x00,0x00,0x00
-# W32: v_cmp_ne_u16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x7a,0x7c,0x7f,0x00,0x00,0x00]
-# W64: v_cmp_ne_u16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x7a,0x7c,0x7f,0x00,0x00,0x00]
+# W32-REAL16: v_cmp_ne_u16 vcc_lo, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x7a,0x7c,0x7f,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_ne_u16 vcc, v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x7a,0x7c,0x7f,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_ne_u16 vcc_lo, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x7a,0x7c,0x7f,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_ne_u16 vcc, v127, v127 dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x7a,0x7c,0x7f,0x00,0x00,0x00]
+
+0xe9,0x04,0x7b,0x7c,0x81,0x77,0x39,0x05
+# W32-REAL16: v_cmp_ne_u16 vcc_lo, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x7b,0x7c,0x81,0x77,0x39,0x05]
+# W64-REAL16: v_cmp_ne_u16 vcc, v1.h, v2.h dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x7b,0x7c,0x81,0x77,0x39,0x05]
+# W32-FAKE16: v_cmp_ne_u16 vcc_lo, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x7b,0x7c,0x81,0x77,0x39,0x05]
+# W64-FAKE16: v_cmp_ne_u16 vcc, v129/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v130/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x7b,0x7c,0x81,0x77,0x39,0x05]
+
+0xea,0xfe,0x7b,0x7c,0xff,0x00,0x00,0x00
+# W32-REAL16: v_cmp_ne_u16 vcc_lo, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x7b,0x7c,0xff,0x00,0x00,0x00]
+# W64-REAL16: v_cmp_ne_u16 vcc, v127.h, v127.h dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x7b,0x7c,0xff,0x00,0x00,0x00]
+# W32-FAKE16: v_cmp_ne_u16 vcc_lo, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x7b,0x7c,0xff,0x00,0x00,0x00]
+# W64-FAKE16: v_cmp_ne_u16 vcc, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/, v255/*Invalid register, operand has 'VGPR_32_Lo128' register class*/ dpp8:[0,0,0,0,0,0,0,0] fi:1 ; encoding: [0xea,0xfe,0x7b,0x7c,0xff,0x00,0x00,0x00]
+
 
 0xe9,0x04,0x9a,0x7c,0x01,0x77,0x39,0x05
 # W32: v_cmp_ne_u32 vcc_lo, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x9a,0x7c,0x01,0x77,0x39,0x05]