[llvm] [AMDGPU][True16][CodeGen]Support V2S copy with True16 flow (PR #118037)

[Brox Chen via llvm-commits]

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@@ -1075,10 +1075,25 @@ void SIFixSGPRCopies::lowerVGPR2SGPRCopies(MachineFunction &MF) {
         TRI->getRegClassForOperandReg(*MRI, MI->getOperand(1));
     size_t SrcSize = TRI->getRegSizeInBits(*SrcRC);
     if (SrcSize == 16) {
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broxigarchen wrote:

Hi Matt. Can you help to elaborate a bit here? Do you think we should not see this 16bit handling in this pass? Thanks!

https://github.com/llvm/llvm-project/pull/118037