[llvm] LVer: regen a test with UTC (NFC) (PR #122876)
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Tue Jan 14 01:52:25 PST 2025
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-llvm-transforms
Author: Ramkumar Ramachandra (artagnon)
<details>
<summary>Changes</summary>
---
Full diff: https://github.com/llvm/llvm-project/pull/122876.diff
1 Files Affected:
- (modified) llvm/test/Transforms/LoopVersioning/incorrect-phi.ll (+96-11)
``````````diff
diff --git a/llvm/test/Transforms/LoopVersioning/incorrect-phi.ll b/llvm/test/Transforms/LoopVersioning/incorrect-phi.ll
index e5ef8df9fc9cd9..4e5e62b40d7cd0 100644
--- a/llvm/test/Transforms/LoopVersioning/incorrect-phi.ll
+++ b/llvm/test/Transforms/LoopVersioning/incorrect-phi.ll
@@ -1,15 +1,59 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
; RUN: opt -passes=loop-versioning -S < %s | FileCheck %s
; Make sure all PHIs are properly updated in the exit block. Based on
; PR28037.
-target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
-target triple = "x86_64-unknown-linux-gnu"
-
@x = external global [2 x [3 x [5 x i16]]]
-; CHECK-LABEL: @phi_with_undef
define void @phi_with_undef() {
+; CHECK-LABEL: define void @phi_with_undef() {
+; CHECK-NEXT: [[BB6_LVER_CHECK:.*:]]
+; CHECK-NEXT: [[MUL:%.*]] = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 10, i64 0)
+; CHECK-NEXT: [[MUL_RESULT:%.*]] = extractvalue { i64, i1 } [[MUL]], 0
+; CHECK-NEXT: [[MUL_OVERFLOW:%.*]] = extractvalue { i64, i1 } [[MUL]], 1
+; CHECK-NEXT: [[TMP0:%.*]] = sub i64 0, [[MUL_RESULT]]
+; CHECK-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr @x, i64 [[MUL_RESULT]]
+; CHECK-NEXT: [[TMP2:%.*]] = icmp ult ptr [[TMP1]], @x
+; CHECK-NEXT: [[TMP3:%.*]] = or i1 [[TMP2]], [[MUL_OVERFLOW]]
+; CHECK-NEXT: br i1 [[TMP3]], label %[[BB6_PH_LVER_ORIG:.*]], label %[[BB6_PH:.*]]
+; CHECK: [[BB6_PH_LVER_ORIG]]:
+; CHECK-NEXT: br label %[[BB6_LVER_ORIG:.*]]
+; CHECK: [[BB6_LVER_ORIG]]:
+; CHECK-NEXT: [[_TMP1423_LVER_ORIG:%.*]] = phi i64 [ undef, %[[BB6_PH_LVER_ORIG]] ], [ [[_TMP142_LVER_ORIG:%.*]], %[[BB6_LVER_ORIG]] ]
+; CHECK-NEXT: [[_TMP123_LVER_ORIG:%.*]] = getelementptr [2 x [3 x [5 x i16]]], ptr @x, i16 0, i64 undef
+; CHECK-NEXT: [[_TMP126_LVER_ORIG:%.*]] = getelementptr [3 x [5 x i16]], ptr [[_TMP123_LVER_ORIG]], i16 0, i64 [[_TMP1423_LVER_ORIG]]
+; CHECK-NEXT: [[_TMP129_LVER_ORIG:%.*]] = getelementptr [5 x i16], ptr [[_TMP126_LVER_ORIG]], i16 0, i64 undef
+; CHECK-NEXT: [[_TMP130_LVER_ORIG:%.*]] = load i16, ptr [[_TMP129_LVER_ORIG]], align 2
+; CHECK-NEXT: store i16 undef, ptr @x, align 2
+; CHECK-NEXT: [[_TMP142_LVER_ORIG]] = add i64 [[_TMP1423_LVER_ORIG]], 1
+; CHECK-NEXT: br i1 false, label %[[BB6_LVER_ORIG]], label %[[LOOP_EXIT_LOOPEXIT:.*]]
+; CHECK: [[BB6_PH]]:
+; CHECK-NEXT: br label %[[BB6:.*]]
+; CHECK: [[BB6]]:
+; CHECK-NEXT: [[_TMP1423:%.*]] = phi i64 [ undef, %[[BB6_PH]] ], [ [[_TMP142:%.*]], %[[BB6]] ]
+; CHECK-NEXT: [[_TMP123:%.*]] = getelementptr [2 x [3 x [5 x i16]]], ptr @x, i16 0, i64 undef
+; CHECK-NEXT: [[_TMP126:%.*]] = getelementptr [3 x [5 x i16]], ptr [[_TMP123]], i16 0, i64 [[_TMP1423]]
+; CHECK-NEXT: [[_TMP129:%.*]] = getelementptr [5 x i16], ptr [[_TMP126]], i16 0, i64 undef
+; CHECK-NEXT: [[_TMP130:%.*]] = load i16, ptr [[_TMP129]], align 2
+; CHECK-NEXT: store i16 undef, ptr @x, align 2
+; CHECK-NEXT: [[_TMP142]] = add i64 [[_TMP1423]], 1
+; CHECK-NEXT: br i1 false, label %[[BB6]], label %[[LOOP_EXIT_LOOPEXIT1:.*]]
+; CHECK: [[LOOP_EXIT_LOOPEXIT]]:
+; CHECK-NEXT: [[_TMP142_LCSSA_PH:%.*]] = phi i64 [ [[_TMP142_LVER_ORIG]], %[[BB6_LVER_ORIG]] ]
+; CHECK-NEXT: [[SPLIT_PH:%.*]] = phi i16 [ undef, %[[BB6_LVER_ORIG]] ]
+; CHECK-NEXT: br label %[[LOOP_EXIT:.*]]
+; CHECK: [[LOOP_EXIT_LOOPEXIT1]]:
+; CHECK-NEXT: [[_TMP142_LCSSA_PH2:%.*]] = phi i64 [ [[_TMP142]], %[[BB6]] ]
+; CHECK-NEXT: [[SPLIT_PH3:%.*]] = phi i16 [ undef, %[[BB6]] ]
+; CHECK-NEXT: br label %[[LOOP_EXIT]]
+; CHECK: [[LOOP_EXIT]]:
+; CHECK-NEXT: [[_TMP142_LCSSA:%.*]] = phi i64 [ [[_TMP142_LCSSA_PH]], %[[LOOP_EXIT_LOOPEXIT]] ], [ [[_TMP142_LCSSA_PH2]], %[[LOOP_EXIT_LOOPEXIT1]] ]
+; CHECK-NEXT: [[SPLIT:%.*]] = phi i16 [ [[SPLIT_PH]], %[[LOOP_EXIT_LOOPEXIT]] ], [ [[SPLIT_PH3]], %[[LOOP_EXIT_LOOPEXIT1]] ]
+; CHECK-NEXT: br label %[[BB9:.*]]
+; CHECK: [[BB9]]:
+; CHECK-NEXT: ret void
+;
bb6.lr.ph: ; preds = %bb5.preheader
br label %bb6
@@ -26,17 +70,61 @@ bb6: ; preds = %bb6.lr.ph, %bb6
loop.exit: ; preds = %bb6
%_tmp142.lcssa = phi i64 [ %_tmp142, %bb6 ]
%split = phi i16 [ undef, %bb6 ]
-; CHECK: %split.ph = phi i16 [ undef, %bb6.lver.orig ]
-; CHECK: %split.ph3 = phi i16 [ undef, %bb6 ]
-; CHECK: %split = phi i16 [ %split.ph, %loop.exit.loopexit ], [ %split.ph3, %loop.exit.loopexit1 ]
br label %bb9
bb9: ; preds = %bb9.loopexit, %bb1
ret void
}
-; CHECK-LABEL: @phi_with_non_loop_defined_value
define void @phi_with_non_loop_defined_value() {
+; CHECK-LABEL: define void @phi_with_non_loop_defined_value() {
+; CHECK-NEXT: [[BB6_LVER_CHECK:.*:]]
+; CHECK-NEXT: [[T:%.*]] = add i16 1, 1
+; CHECK-NEXT: [[MUL:%.*]] = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 10, i64 0)
+; CHECK-NEXT: [[MUL_RESULT:%.*]] = extractvalue { i64, i1 } [[MUL]], 0
+; CHECK-NEXT: [[MUL_OVERFLOW:%.*]] = extractvalue { i64, i1 } [[MUL]], 1
+; CHECK-NEXT: [[TMP0:%.*]] = sub i64 0, [[MUL_RESULT]]
+; CHECK-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr @x, i64 [[MUL_RESULT]]
+; CHECK-NEXT: [[TMP2:%.*]] = icmp ult ptr [[TMP1]], @x
+; CHECK-NEXT: [[TMP3:%.*]] = or i1 [[TMP2]], [[MUL_OVERFLOW]]
+; CHECK-NEXT: br i1 [[TMP3]], label %[[BB6_PH_LVER_ORIG:.*]], label %[[BB6_PH:.*]]
+; CHECK: [[BB6_PH_LVER_ORIG]]:
+; CHECK-NEXT: br label %[[BB6_LVER_ORIG:.*]]
+; CHECK: [[BB6_LVER_ORIG]]:
+; CHECK-NEXT: [[_TMP1423_LVER_ORIG:%.*]] = phi i64 [ undef, %[[BB6_PH_LVER_ORIG]] ], [ [[_TMP142_LVER_ORIG:%.*]], %[[BB6_LVER_ORIG]] ]
+; CHECK-NEXT: [[_TMP123_LVER_ORIG:%.*]] = getelementptr [2 x [3 x [5 x i16]]], ptr @x, i16 0, i64 undef
+; CHECK-NEXT: [[_TMP126_LVER_ORIG:%.*]] = getelementptr [3 x [5 x i16]], ptr [[_TMP123_LVER_ORIG]], i16 0, i64 [[_TMP1423_LVER_ORIG]]
+; CHECK-NEXT: [[_TMP129_LVER_ORIG:%.*]] = getelementptr [5 x i16], ptr [[_TMP126_LVER_ORIG]], i16 0, i64 undef
+; CHECK-NEXT: [[_TMP130_LVER_ORIG:%.*]] = load i16, ptr [[_TMP129_LVER_ORIG]], align 2
+; CHECK-NEXT: store i16 undef, ptr @x, align 2
+; CHECK-NEXT: [[_TMP142_LVER_ORIG]] = add i64 [[_TMP1423_LVER_ORIG]], 1
+; CHECK-NEXT: br i1 false, label %[[BB6_LVER_ORIG]], label %[[LOOP_EXIT_LOOPEXIT:.*]]
+; CHECK: [[BB6_PH]]:
+; CHECK-NEXT: br label %[[BB6:.*]]
+; CHECK: [[BB6]]:
+; CHECK-NEXT: [[_TMP1423:%.*]] = phi i64 [ undef, %[[BB6_PH]] ], [ [[_TMP142:%.*]], %[[BB6]] ]
+; CHECK-NEXT: [[_TMP123:%.*]] = getelementptr [2 x [3 x [5 x i16]]], ptr @x, i16 0, i64 undef
+; CHECK-NEXT: [[_TMP126:%.*]] = getelementptr [3 x [5 x i16]], ptr [[_TMP123]], i16 0, i64 [[_TMP1423]]
+; CHECK-NEXT: [[_TMP129:%.*]] = getelementptr [5 x i16], ptr [[_TMP126]], i16 0, i64 undef
+; CHECK-NEXT: [[_TMP130:%.*]] = load i16, ptr [[_TMP129]], align 2
+; CHECK-NEXT: store i16 undef, ptr @x, align 2
+; CHECK-NEXT: [[_TMP142]] = add i64 [[_TMP1423]], 1
+; CHECK-NEXT: br i1 false, label %[[BB6]], label %[[LOOP_EXIT_LOOPEXIT1:.*]]
+; CHECK: [[LOOP_EXIT_LOOPEXIT]]:
+; CHECK-NEXT: [[_TMP142_LCSSA_PH:%.*]] = phi i64 [ [[_TMP142_LVER_ORIG]], %[[BB6_LVER_ORIG]] ]
+; CHECK-NEXT: [[SPLIT_PH:%.*]] = phi i16 [ [[T]], %[[BB6_LVER_ORIG]] ]
+; CHECK-NEXT: br label %[[LOOP_EXIT:.*]]
+; CHECK: [[LOOP_EXIT_LOOPEXIT1]]:
+; CHECK-NEXT: [[_TMP142_LCSSA_PH2:%.*]] = phi i64 [ [[_TMP142]], %[[BB6]] ]
+; CHECK-NEXT: [[SPLIT_PH3:%.*]] = phi i16 [ [[T]], %[[BB6]] ]
+; CHECK-NEXT: br label %[[LOOP_EXIT]]
+; CHECK: [[LOOP_EXIT]]:
+; CHECK-NEXT: [[_TMP142_LCSSA:%.*]] = phi i64 [ [[_TMP142_LCSSA_PH]], %[[LOOP_EXIT_LOOPEXIT]] ], [ [[_TMP142_LCSSA_PH2]], %[[LOOP_EXIT_LOOPEXIT1]] ]
+; CHECK-NEXT: [[SPLIT:%.*]] = phi i16 [ [[SPLIT_PH]], %[[LOOP_EXIT_LOOPEXIT]] ], [ [[SPLIT_PH3]], %[[LOOP_EXIT_LOOPEXIT1]] ]
+; CHECK-NEXT: br label %[[BB9:.*]]
+; CHECK: [[BB9]]:
+; CHECK-NEXT: ret void
+;
bb6.lr.ph: ; preds = %bb5.preheader
%t = add i16 1, 1
br label %bb6
@@ -54,9 +142,6 @@ bb6: ; preds = %bb6.lr.ph, %bb6
loop.exit: ; preds = %bb6
%_tmp142.lcssa = phi i64 [ %_tmp142, %bb6 ]
%split = phi i16 [ %t, %bb6 ]
-; CHECK: %split.ph = phi i16 [ %t, %bb6.lver.orig ]
-; CHECK: %split.ph3 = phi i16 [ %t, %bb6 ]
-; CHECK: %split = phi i16 [ %split.ph, %loop.exit.loopexit ], [ %split.ph3, %loop.exit.loopexit1 ]
br label %bb9
bb9: ; preds = %bb9.loopexit, %bb1
``````````
</details>
https://github.com/llvm/llvm-project/pull/122876
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