[llvm] [AMDGPU][True16][CodeGen]Support V2S copy with True16 flow (PR #118037)

[Brox Chen via llvm-commits]

================
@@ -1075,10 +1075,25 @@ void SIFixSGPRCopies::lowerVGPR2SGPRCopies(MachineFunction &MF) {
         TRI->getRegClassForOperandReg(*MRI, MI->getOperand(1));
     size_t SrcSize = TRI->getRegSizeInBits(*SrcRC);
     if (SrcSize == 16) {
----------------
broxigarchen wrote:

Hi Matt. Yes previously we get 32bit reg for 16bit but in true16 flow we get 16bit reg thus we update this part

https://github.com/llvm/llvm-project/pull/118037