[llvm] PreISelIntrinsicLowering: Lower llvm.exp/llvm.exp2 to a loop if scalable vec arg (PR #117568)

[Stephen Long via llvm-commits]

steplong wrote:

Hi, what can be done to get this in? For the fixed vector case, it looks like it's being handled by SelectionDAG, specifically `ISD::FEXP` is getting expanded in `VectorLegalizer::LegalizeOp(llvm::SDValue)`

https://github.com/llvm/llvm-project/pull/117568