[llvm] [RISCV] Support [mh]edelegh (PR #121634)

[via llvm-commits]

dong-miao wrote:

> > [RISCV]Add Sm1p13、Ss1p13 extensions
> 
> * Still missing the space after ]
> * `、` is not a comma and a space, it's a single character that looks like a backwards comma
> * Sm1p13 and Ss1p13 are not actual ISA extensions that this patch makes LLVM support
> 
> > According to the newest RISC-V Privileged Spec v1.13, CSRs have been updated. And [mh]edelegh CSRs are just for RV32.
> 
> * "CSRs have been updated" sounds like you've changed existing ones
> * "And [mh]edelegh CSRs are just for RV32" sounds like you've changed them, not added them
> 
> A better commit message would be something like:
> 
> > [RISCV] Support [mh]edelegh
> > These RV32-only CSRs are defined in privileged spec v1.13.
> 
> or:
> 
> > [RISCV] Support RV32-only [mh]edelegh CSRs from privileged spec 1.13

Thanks for your help,I will be more careful next time.

https://github.com/llvm/llvm-project/pull/121634