[llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (NFCI) (PR #113903)

[Florian Hahn via llvm-commits]

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@@ -2694,6 +2772,201 @@ class VPReductionEVLRecipe : public VPReductionRecipe {
   }
 };
 
+/// A recipe to represent inloop extended reduction operations, performing a
+/// reduction on a extended vector operand into a scalar value, and adding the
+/// result to a chain. This recipe is abstract and needs to be lowered to
+/// concrete recipes before codegen. The Operands are {ChainOp, VecOp,
+/// [Condition]}.
+class VPExtendedReductionRecipe : public VPReductionRecipe {
+  Instruction::CastOps ExtOp;
+  DebugLoc RedDL;
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fhahn wrote:

Thinking about this again, IIUC  we should only ever create this recipe if it can be lowered to a single instruction in the backend. In that case, it will have a single debug location, so would it be sufficient to just use a single debug location here? This changes the debug location of some of the components in the IR, but it should be fine, as the final result will only have a single location.

https://github.com/llvm/llvm-project/pull/113903