[llvm] 13cf5c9 - [RISCV] Re-generate memcmp test checks missed in #121530. NFC
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Fri Jan 3 09:53:33 PST 2025
Author: Craig Topper
Date: 2025-01-03T09:48:41-08:00
New Revision: 13cf5c9c227a502f86f8c0e3c7d5fe147bc91b8b
URL: https://github.com/llvm/llvm-project/commit/13cf5c9c227a502f86f8c0e3c7d5fe147bc91b8b
DIFF: https://github.com/llvm/llvm-project/commit/13cf5c9c227a502f86f8c0e3c7d5fe147bc91b8b.diff
LOG: [RISCV] Re-generate memcmp test checks missed in #121530. NFC
A patch landed to these tests while #121530 was in review and I
forgot to rebase.
Added:
Modified:
llvm/test/CodeGen/RISCV/memcmp-optsize.ll
llvm/test/CodeGen/RISCV/memcmp.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/RISCV/memcmp-optsize.ll b/llvm/test/CodeGen/RISCV/memcmp-optsize.ll
index 829fdd55926839..f9086ba9d6354d 100644
--- a/llvm/test/CodeGen/RISCV/memcmp-optsize.ll
+++ b/llvm/test/CodeGen/RISCV/memcmp-optsize.ll
@@ -2459,9 +2459,9 @@ define i32 @memcmp_size_3(ptr %s1, ptr %s2) nounwind optsize {
; CHECK-UNALIGNED-RV32-ZBB-NEXT: or a1, a1, a3
; CHECK-UNALIGNED-RV32-ZBB-NEXT: rev8 a0, a0
; CHECK-UNALIGNED-RV32-ZBB-NEXT: rev8 a1, a1
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: sltu a2, a1, a0
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: sltu a0, a0, a1
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: sub a0, a2, a0
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: sltu a2, a0, a1
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: sltu a0, a1, a0
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: sub a0, a0, a2
; CHECK-UNALIGNED-RV32-ZBB-NEXT: ret
;
; CHECK-UNALIGNED-RV64-ZBB-LABEL: memcmp_size_3:
@@ -2478,9 +2478,9 @@ define i32 @memcmp_size_3(ptr %s1, ptr %s2) nounwind optsize {
; CHECK-UNALIGNED-RV64-ZBB-NEXT: rev8 a1, a1
; CHECK-UNALIGNED-RV64-ZBB-NEXT: srli a0, a0, 32
; CHECK-UNALIGNED-RV64-ZBB-NEXT: srli a1, a1, 32
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: sltu a2, a1, a0
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: sltu a0, a0, a1
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: sub a0, a2, a0
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: sltu a2, a0, a1
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: sltu a0, a1, a0
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: sub a0, a0, a2
; CHECK-UNALIGNED-RV64-ZBB-NEXT: ret
;
; CHECK-UNALIGNED-RV32-ZBKB-LABEL: memcmp_size_3:
@@ -2493,9 +2493,9 @@ define i32 @memcmp_size_3(ptr %s1, ptr %s2) nounwind optsize {
; CHECK-UNALIGNED-RV32-ZBKB-NEXT: pack a1, a3, a1
; CHECK-UNALIGNED-RV32-ZBKB-NEXT: rev8 a0, a0
; CHECK-UNALIGNED-RV32-ZBKB-NEXT: rev8 a1, a1
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: sltu a2, a1, a0
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: sltu a0, a0, a1
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: sub a0, a2, a0
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: sltu a2, a0, a1
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: sltu a0, a1, a0
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: sub a0, a0, a2
; CHECK-UNALIGNED-RV32-ZBKB-NEXT: ret
;
; CHECK-UNALIGNED-RV64-ZBKB-LABEL: memcmp_size_3:
@@ -2512,9 +2512,9 @@ define i32 @memcmp_size_3(ptr %s1, ptr %s2) nounwind optsize {
; CHECK-UNALIGNED-RV64-ZBKB-NEXT: rev8 a1, a1
; CHECK-UNALIGNED-RV64-ZBKB-NEXT: srli a0, a0, 32
; CHECK-UNALIGNED-RV64-ZBKB-NEXT: srli a1, a1, 32
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: sltu a2, a1, a0
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: sltu a0, a0, a1
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: sub a0, a2, a0
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: sltu a2, a0, a1
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: sltu a0, a1, a0
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: sub a0, a0, a2
; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ret
;
; CHECK-UNALIGNED-RV32-V-LABEL: memcmp_size_3:
@@ -2845,9 +2845,9 @@ define i32 @memcmp_size_5(ptr %s1, ptr %s2) nounwind optsize {
; CHECK-UNALIGNED-RV64-ZBB-NEXT: or a1, a1, a3
; CHECK-UNALIGNED-RV64-ZBB-NEXT: rev8 a0, a0
; CHECK-UNALIGNED-RV64-ZBB-NEXT: rev8 a1, a1
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: sltu a2, a1, a0
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: sltu a0, a0, a1
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: sub a0, a2, a0
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: sltu a2, a0, a1
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: sltu a0, a1, a0
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: sub a0, a0, a2
; CHECK-UNALIGNED-RV64-ZBB-NEXT: ret
;
; CHECK-UNALIGNED-RV32-ZBKB-LABEL: memcmp_size_5:
@@ -2878,9 +2878,9 @@ define i32 @memcmp_size_5(ptr %s1, ptr %s2) nounwind optsize {
; CHECK-UNALIGNED-RV64-ZBKB-NEXT: pack a1, a3, a1
; CHECK-UNALIGNED-RV64-ZBKB-NEXT: rev8 a0, a0
; CHECK-UNALIGNED-RV64-ZBKB-NEXT: rev8 a1, a1
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: sltu a2, a1, a0
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: sltu a0, a0, a1
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: sub a0, a2, a0
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: sltu a2, a0, a1
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: sltu a0, a1, a0
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: sub a0, a0, a2
; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ret
;
; CHECK-UNALIGNED-RV32-V-LABEL: memcmp_size_5:
@@ -3044,9 +3044,9 @@ define i32 @memcmp_size_6(ptr %s1, ptr %s2) nounwind optsize {
; CHECK-UNALIGNED-RV64-ZBB-NEXT: or a1, a1, a3
; CHECK-UNALIGNED-RV64-ZBB-NEXT: rev8 a0, a0
; CHECK-UNALIGNED-RV64-ZBB-NEXT: rev8 a1, a1
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: sltu a2, a1, a0
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: sltu a0, a0, a1
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: sub a0, a2, a0
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: sltu a2, a0, a1
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: sltu a0, a1, a0
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: sub a0, a0, a2
; CHECK-UNALIGNED-RV64-ZBB-NEXT: ret
;
; CHECK-UNALIGNED-RV32-ZBKB-LABEL: memcmp_size_6:
@@ -3083,9 +3083,9 @@ define i32 @memcmp_size_6(ptr %s1, ptr %s2) nounwind optsize {
; CHECK-UNALIGNED-RV64-ZBKB-NEXT: pack a1, a3, a1
; CHECK-UNALIGNED-RV64-ZBKB-NEXT: rev8 a0, a0
; CHECK-UNALIGNED-RV64-ZBKB-NEXT: rev8 a1, a1
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: sltu a2, a1, a0
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: sltu a0, a0, a1
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: sub a0, a2, a0
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: sltu a2, a0, a1
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: sltu a0, a1, a0
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: sub a0, a0, a2
; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ret
;
; CHECK-UNALIGNED-RV32-V-LABEL: memcmp_size_6:
diff --git a/llvm/test/CodeGen/RISCV/memcmp.ll b/llvm/test/CodeGen/RISCV/memcmp.ll
index bc6cf0a858be88..831e21af43807c 100644
--- a/llvm/test/CodeGen/RISCV/memcmp.ll
+++ b/llvm/test/CodeGen/RISCV/memcmp.ll
@@ -3155,9 +3155,9 @@ define i32 @memcmp_size_3(ptr %s1, ptr %s2) nounwind {
; CHECK-UNALIGNED-RV32-ZBB-NEXT: or a1, a1, a3
; CHECK-UNALIGNED-RV32-ZBB-NEXT: rev8 a0, a0
; CHECK-UNALIGNED-RV32-ZBB-NEXT: rev8 a1, a1
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: sltu a2, a1, a0
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: sltu a0, a0, a1
-; CHECK-UNALIGNED-RV32-ZBB-NEXT: sub a0, a2, a0
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: sltu a2, a0, a1
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: sltu a0, a1, a0
+; CHECK-UNALIGNED-RV32-ZBB-NEXT: sub a0, a0, a2
; CHECK-UNALIGNED-RV32-ZBB-NEXT: ret
;
; CHECK-UNALIGNED-RV64-ZBB-LABEL: memcmp_size_3:
@@ -3174,9 +3174,9 @@ define i32 @memcmp_size_3(ptr %s1, ptr %s2) nounwind {
; CHECK-UNALIGNED-RV64-ZBB-NEXT: rev8 a1, a1
; CHECK-UNALIGNED-RV64-ZBB-NEXT: srli a0, a0, 32
; CHECK-UNALIGNED-RV64-ZBB-NEXT: srli a1, a1, 32
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: sltu a2, a1, a0
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: sltu a0, a0, a1
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: sub a0, a2, a0
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: sltu a2, a0, a1
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: sltu a0, a1, a0
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: sub a0, a0, a2
; CHECK-UNALIGNED-RV64-ZBB-NEXT: ret
;
; CHECK-UNALIGNED-RV32-ZBKB-LABEL: memcmp_size_3:
@@ -3189,9 +3189,9 @@ define i32 @memcmp_size_3(ptr %s1, ptr %s2) nounwind {
; CHECK-UNALIGNED-RV32-ZBKB-NEXT: pack a1, a3, a1
; CHECK-UNALIGNED-RV32-ZBKB-NEXT: rev8 a0, a0
; CHECK-UNALIGNED-RV32-ZBKB-NEXT: rev8 a1, a1
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: sltu a2, a1, a0
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: sltu a0, a0, a1
-; CHECK-UNALIGNED-RV32-ZBKB-NEXT: sub a0, a2, a0
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: sltu a2, a0, a1
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: sltu a0, a1, a0
+; CHECK-UNALIGNED-RV32-ZBKB-NEXT: sub a0, a0, a2
; CHECK-UNALIGNED-RV32-ZBKB-NEXT: ret
;
; CHECK-UNALIGNED-RV64-ZBKB-LABEL: memcmp_size_3:
@@ -3208,9 +3208,9 @@ define i32 @memcmp_size_3(ptr %s1, ptr %s2) nounwind {
; CHECK-UNALIGNED-RV64-ZBKB-NEXT: rev8 a1, a1
; CHECK-UNALIGNED-RV64-ZBKB-NEXT: srli a0, a0, 32
; CHECK-UNALIGNED-RV64-ZBKB-NEXT: srli a1, a1, 32
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: sltu a2, a1, a0
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: sltu a0, a0, a1
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: sub a0, a2, a0
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: sltu a2, a0, a1
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: sltu a0, a1, a0
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: sub a0, a0, a2
; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ret
;
; CHECK-UNALIGNED-RV32-V-LABEL: memcmp_size_3:
@@ -3541,9 +3541,9 @@ define i32 @memcmp_size_5(ptr %s1, ptr %s2) nounwind {
; CHECK-UNALIGNED-RV64-ZBB-NEXT: or a1, a1, a3
; CHECK-UNALIGNED-RV64-ZBB-NEXT: rev8 a0, a0
; CHECK-UNALIGNED-RV64-ZBB-NEXT: rev8 a1, a1
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: sltu a2, a1, a0
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: sltu a0, a0, a1
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: sub a0, a2, a0
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: sltu a2, a0, a1
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: sltu a0, a1, a0
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: sub a0, a0, a2
; CHECK-UNALIGNED-RV64-ZBB-NEXT: ret
;
; CHECK-UNALIGNED-RV32-ZBKB-LABEL: memcmp_size_5:
@@ -3574,9 +3574,9 @@ define i32 @memcmp_size_5(ptr %s1, ptr %s2) nounwind {
; CHECK-UNALIGNED-RV64-ZBKB-NEXT: pack a1, a3, a1
; CHECK-UNALIGNED-RV64-ZBKB-NEXT: rev8 a0, a0
; CHECK-UNALIGNED-RV64-ZBKB-NEXT: rev8 a1, a1
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: sltu a2, a1, a0
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: sltu a0, a0, a1
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: sub a0, a2, a0
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: sltu a2, a0, a1
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: sltu a0, a1, a0
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: sub a0, a0, a2
; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ret
;
; CHECK-UNALIGNED-RV32-V-LABEL: memcmp_size_5:
@@ -3740,9 +3740,9 @@ define i32 @memcmp_size_6(ptr %s1, ptr %s2) nounwind {
; CHECK-UNALIGNED-RV64-ZBB-NEXT: or a1, a1, a3
; CHECK-UNALIGNED-RV64-ZBB-NEXT: rev8 a0, a0
; CHECK-UNALIGNED-RV64-ZBB-NEXT: rev8 a1, a1
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: sltu a2, a1, a0
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: sltu a0, a0, a1
-; CHECK-UNALIGNED-RV64-ZBB-NEXT: sub a0, a2, a0
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: sltu a2, a0, a1
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: sltu a0, a1, a0
+; CHECK-UNALIGNED-RV64-ZBB-NEXT: sub a0, a0, a2
; CHECK-UNALIGNED-RV64-ZBB-NEXT: ret
;
; CHECK-UNALIGNED-RV32-ZBKB-LABEL: memcmp_size_6:
@@ -3779,9 +3779,9 @@ define i32 @memcmp_size_6(ptr %s1, ptr %s2) nounwind {
; CHECK-UNALIGNED-RV64-ZBKB-NEXT: pack a1, a3, a1
; CHECK-UNALIGNED-RV64-ZBKB-NEXT: rev8 a0, a0
; CHECK-UNALIGNED-RV64-ZBKB-NEXT: rev8 a1, a1
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: sltu a2, a1, a0
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: sltu a0, a0, a1
-; CHECK-UNALIGNED-RV64-ZBKB-NEXT: sub a0, a2, a0
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: sltu a2, a0, a1
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: sltu a0, a1, a0
+; CHECK-UNALIGNED-RV64-ZBKB-NEXT: sub a0, a0, a2
; CHECK-UNALIGNED-RV64-ZBKB-NEXT: ret
;
; CHECK-UNALIGNED-RV32-V-LABEL: memcmp_size_6:
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