[llvm] [RISCV] GISel custom lowering for addiw (PR #121587)

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``````````bash
git-clang-format --diff cb1ad985b53c87b53974e37bba60129acb294f0d 267124579fbcc182516325b247d675b0a1f1e505 --extensions cpp -- llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
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View the diff from clang-format here.
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``````````diff
diff --git a/llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp b/llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
index a8d83308df..2bcc39a6cc 100644
--- a/llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
+++ b/llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
@@ -1342,10 +1342,10 @@ bool RISCVLegalizerInfo::legalizeCustom(
     Helper.Observer.changingInstr(MI);
     Helper.widenScalarSrc(MI, LLT::scalar(64), 1, TargetOpcode::G_ANYEXT);
     Helper.widenScalarSrc(MI, LLT::scalar(64), 2, TargetOpcode::G_ANYEXT);
-    
+
     Register DstAdd = MRI.createGenericVirtualRegister(sXLen);
     Register DstSext = MRI.createGenericVirtualRegister(sXLen);
-    
+
     MachineOperand &MO = MI.getOperand(0);
     MIRBuilder.setInsertPt(MIRBuilder.getMBB(), ++MIRBuilder.getInsertPt());
     MIRBuilder.buildSExtInReg(DstSext, DstAdd, 32);

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https://github.com/llvm/llvm-project/pull/121587